Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:50:28.770531 lava-dispatcher, installed at version: 2023.01
2 12:50:28.770744 start: 0 validate
3 12:50:28.770885 Start time: 2023-03-22 12:50:28.770879+00:00 (UTC)
4 12:50:28.771019 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:28.771171 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:50:29.062104 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:29.062302 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:29.351723 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:29.351901 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:50:29.637114 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:50:29.637292 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:50:29.927660 validate duration: 1.16
14 12:50:29.928052 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:50:29.928182 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:50:29.928297 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:50:29.928410 Not decompressing ramdisk as can be used compressed.
18 12:50:29.928505 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:50:29.928583 saving as /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/ramdisk/initrd.cpio.gz
20 12:50:29.928656 total size: 5672849 (5MB)
21 12:50:29.929627 progress 0% (0MB)
22 12:50:29.931326 progress 5% (0MB)
23 12:50:29.932978 progress 10% (0MB)
24 12:50:29.934454 progress 15% (0MB)
25 12:50:29.936103 progress 20% (1MB)
26 12:50:29.937764 progress 25% (1MB)
27 12:50:29.939252 progress 30% (1MB)
28 12:50:29.940878 progress 35% (1MB)
29 12:50:29.942499 progress 40% (2MB)
30 12:50:29.944017 progress 45% (2MB)
31 12:50:29.945644 progress 50% (2MB)
32 12:50:29.947268 progress 55% (3MB)
33 12:50:29.948712 progress 60% (3MB)
34 12:50:29.950319 progress 65% (3MB)
35 12:50:29.951947 progress 70% (3MB)
36 12:50:29.953444 progress 75% (4MB)
37 12:50:29.955061 progress 80% (4MB)
38 12:50:29.956686 progress 85% (4MB)
39 12:50:29.958125 progress 90% (4MB)
40 12:50:29.959747 progress 95% (5MB)
41 12:50:29.961380 progress 100% (5MB)
42 12:50:29.961509 5MB downloaded in 0.03s (164.70MB/s)
43 12:50:29.961676 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:50:29.961948 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:50:29.962048 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:50:29.962146 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:50:29.962266 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:50:29.962346 saving as /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/kernel/bzImage
50 12:50:29.962419 total size: 11646080 (11MB)
51 12:50:29.962488 No compression specified
52 12:50:29.963488 progress 0% (0MB)
53 12:50:29.966556 progress 5% (0MB)
54 12:50:29.969780 progress 10% (1MB)
55 12:50:29.973037 progress 15% (1MB)
56 12:50:29.976240 progress 20% (2MB)
57 12:50:29.979256 progress 25% (2MB)
58 12:50:29.982444 progress 30% (3MB)
59 12:50:29.985626 progress 35% (3MB)
60 12:50:29.988832 progress 40% (4MB)
61 12:50:29.991862 progress 45% (5MB)
62 12:50:29.995047 progress 50% (5MB)
63 12:50:29.998236 progress 55% (6MB)
64 12:50:30.001462 progress 60% (6MB)
65 12:50:30.004708 progress 65% (7MB)
66 12:50:30.007706 progress 70% (7MB)
67 12:50:30.010838 progress 75% (8MB)
68 12:50:30.013978 progress 80% (8MB)
69 12:50:30.017148 progress 85% (9MB)
70 12:50:30.020167 progress 90% (10MB)
71 12:50:30.023316 progress 95% (10MB)
72 12:50:30.026461 progress 100% (11MB)
73 12:50:30.026636 11MB downloaded in 0.06s (172.97MB/s)
74 12:50:30.026799 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:50:30.027064 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:50:30.027174 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:50:30.027273 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:50:30.027391 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:50:30.027474 saving as /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/nfsrootfs/full.rootfs.tar
81 12:50:30.027545 total size: 125916488 (120MB)
82 12:50:30.027614 Using unxz to decompress xz
83 12:50:30.031078 progress 0% (0MB)
84 12:50:30.527742 progress 5% (6MB)
85 12:50:31.034513 progress 10% (12MB)
86 12:50:31.543853 progress 15% (18MB)
87 12:50:32.053988 progress 20% (24MB)
88 12:50:32.424095 progress 25% (30MB)
89 12:50:32.804372 progress 30% (36MB)
90 12:50:33.089186 progress 35% (42MB)
91 12:50:33.300978 progress 40% (48MB)
92 12:50:33.694684 progress 45% (54MB)
93 12:50:34.099503 progress 50% (60MB)
94 12:50:34.481648 progress 55% (66MB)
95 12:50:34.874354 progress 60% (72MB)
96 12:50:35.243964 progress 65% (78MB)
97 12:50:35.668534 progress 70% (84MB)
98 12:50:36.129988 progress 75% (90MB)
99 12:50:36.590914 progress 80% (96MB)
100 12:50:36.699811 progress 85% (102MB)
101 12:50:36.877374 progress 90% (108MB)
102 12:50:37.244186 progress 95% (114MB)
103 12:50:37.655070 progress 100% (120MB)
104 12:50:37.661710 120MB downloaded in 7.63s (15.73MB/s)
105 12:50:37.662081 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:50:37.662416 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:50:37.662524 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:50:37.662650 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:50:37.662817 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:50:37.662905 saving as /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/modules/modules.tar
112 12:50:37.663000 total size: 497788 (0MB)
113 12:50:37.663074 Using unxz to decompress xz
114 12:50:37.666449 progress 6% (0MB)
115 12:50:37.666874 progress 13% (0MB)
116 12:50:37.667156 progress 19% (0MB)
117 12:50:37.668509 progress 26% (0MB)
118 12:50:37.670816 progress 32% (0MB)
119 12:50:37.673095 progress 39% (0MB)
120 12:50:37.675070 progress 46% (0MB)
121 12:50:37.677178 progress 52% (0MB)
122 12:50:37.679709 progress 59% (0MB)
123 12:50:37.681832 progress 65% (0MB)
124 12:50:37.684068 progress 72% (0MB)
125 12:50:37.686126 progress 78% (0MB)
126 12:50:37.688251 progress 85% (0MB)
127 12:50:37.690463 progress 92% (0MB)
128 12:50:37.692662 progress 98% (0MB)
129 12:50:37.700178 0MB downloaded in 0.04s (12.77MB/s)
130 12:50:37.700500 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:50:37.700802 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:50:37.700920 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:50:37.701029 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:50:39.616263 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729650/extract-nfsrootfs-p9v8pmt9
136 12:50:39.616500 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:50:39.616658 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:50:39.616869 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r
139 12:50:39.617045 makedir: /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin
140 12:50:39.617186 makedir: /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/tests
141 12:50:39.617331 makedir: /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/results
142 12:50:39.617495 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-add-keys
143 12:50:39.617712 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-add-sources
144 12:50:39.617866 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-background-process-start
145 12:50:39.617998 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-background-process-stop
146 12:50:39.618126 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-common-functions
147 12:50:39.618252 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-echo-ipv4
148 12:50:39.618377 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-install-packages
149 12:50:39.618502 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-installed-packages
150 12:50:39.618624 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-os-build
151 12:50:39.618746 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-probe-channel
152 12:50:39.618869 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-probe-ip
153 12:50:39.618993 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-target-ip
154 12:50:39.619136 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-target-mac
155 12:50:39.619262 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-target-storage
156 12:50:39.619390 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-case
157 12:50:39.619514 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-event
158 12:50:39.619636 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-feedback
159 12:50:39.619760 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-raise
160 12:50:39.619882 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-reference
161 12:50:39.620003 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-runner
162 12:50:39.620130 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-set
163 12:50:39.620254 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-test-shell
164 12:50:39.620377 Updating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-install-packages (oe)
165 12:50:39.620503 Updating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/bin/lava-installed-packages (oe)
166 12:50:39.620612 Creating /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/environment
167 12:50:39.620709 LAVA metadata
168 12:50:39.620786 - LAVA_JOB_ID=9729650
169 12:50:39.620858 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:50:39.620965 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 12:50:39.621037 skipped lava-vland-overlay
172 12:50:39.621122 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:50:39.621212 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 12:50:39.621282 skipped lava-multinode-overlay
175 12:50:39.621363 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:50:39.621452 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 12:50:39.621534 Loading test definitions
178 12:50:39.621638 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
179 12:50:39.621717 Using /lava-9729650 at stage 0
180 12:50:39.621821 Fetching tests from https://github.com/kernelci/test-definitions
181 12:50:39.621906 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/0/tests/0_ltp-timers'
182 12:50:51.317495 Running '/usr/bin/git checkout kernelci.org
183 12:50:51.468369 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 12:50:51.469124 uuid=9729650_1.5.2.3.1 testdef=None
185 12:50:51.469311 end: 1.5.2.3.1 git-repo-action (duration 00:00:12) [common]
187 12:50:51.469626 start: 1.5.2.3.2 test-overlay (timeout 00:09:38) [common]
188 12:50:51.470383 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:50:51.470687 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:38) [common]
191 12:50:51.471631 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:50:51.471944 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:38) [common]
194 12:50:51.472821 runner path: /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/0/tests/0_ltp-timers test_uuid 9729650_1.5.2.3.1
195 12:50:51.472931 GRP_TEST='TMR'
196 12:50:51.473020 SKIPFILE='skipfile-lkft.yaml'
197 12:50:51.473111 SKIP_INSTALL='true'
198 12:50:51.473201 TST_CMDFILES=''
199 12:50:51.473380 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 12:50:51.473648 Creating lava-test-runner.conf files
202 12:50:51.473741 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729650/lava-overlay-0vtely7r/lava-9729650/0 for stage 0
203 12:50:51.473864 - 0_ltp-timers
204 12:50:51.473998 end: 1.5.2.3 test-definition (duration 00:00:12) [common]
205 12:50:51.474122 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
206 12:50:59.797727 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
207 12:50:59.797913 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
208 12:50:59.798023 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:50:59.798139 end: 1.5.2 lava-overlay (duration 00:00:20) [common]
210 12:50:59.798241 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
211 12:50:59.917802 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:50:59.918201 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
213 12:50:59.918327 extracting modules file /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729650/extract-nfsrootfs-p9v8pmt9
214 12:50:59.932893 extracting modules file /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729650/extract-overlay-ramdisk-kq0rtlqg/ramdisk
215 12:50:59.947010 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:50:59.947177 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
217 12:50:59.947287 [common] Applying overlay to NFS
218 12:50:59.947370 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729650/compress-overlay-ho8t9ut5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729650/extract-nfsrootfs-p9v8pmt9
219 12:51:00.821789 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 12:51:00.821977 start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
221 12:51:00.822087 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:51:00.822192 start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
223 12:51:00.822287 Building ramdisk /var/lib/lava/dispatcher/tmp/9729650/extract-overlay-ramdisk-kq0rtlqg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729650/extract-overlay-ramdisk-kq0rtlqg/ramdisk
224 12:51:00.868117 >> 31110 blocks
225 12:51:01.491602 rename /var/lib/lava/dispatcher/tmp/9729650/extract-overlay-ramdisk-kq0rtlqg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/ramdisk/ramdisk.cpio.gz
226 12:51:01.492058 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:51:01.492195 start: 1.5.8 prepare-kernel (timeout 00:09:28) [common]
228 12:51:01.492316 start: 1.5.8.1 prepare-fit (timeout 00:09:28) [common]
229 12:51:01.492425 No mkimage arch provided, not using FIT.
230 12:51:01.492531 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:51:01.492639 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:51:01.492762 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
233 12:51:01.492913 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:28) [common]
234 12:51:01.493012 No LXC device requested
235 12:51:01.493107 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:51:01.493216 start: 1.7 deploy-device-env (timeout 00:09:28) [common]
237 12:51:01.493316 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:51:01.493397 Checking files for TFTP limit of 4294967296 bytes.
239 12:51:01.493831 end: 1 tftp-deploy (duration 00:00:32) [common]
240 12:51:01.493951 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:51:01.494058 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:51:01.494204 substitutions:
243 12:51:01.494284 - {DTB}: None
244 12:51:01.494359 - {INITRD}: 9729650/tftp-deploy-3jr0kg4q/ramdisk/ramdisk.cpio.gz
245 12:51:01.494430 - {KERNEL}: 9729650/tftp-deploy-3jr0kg4q/kernel/bzImage
246 12:51:01.494499 - {LAVA_MAC}: None
247 12:51:01.494566 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729650/extract-nfsrootfs-p9v8pmt9
248 12:51:01.494637 - {NFS_SERVER_IP}: 192.168.201.1
249 12:51:01.494703 - {PRESEED_CONFIG}: None
250 12:51:01.494769 - {PRESEED_LOCAL}: None
251 12:51:01.494833 - {RAMDISK}: 9729650/tftp-deploy-3jr0kg4q/ramdisk/ramdisk.cpio.gz
252 12:51:01.494897 - {ROOT_PART}: None
253 12:51:01.494961 - {ROOT}: None
254 12:51:01.495025 - {SERVER_IP}: 192.168.201.1
255 12:51:01.495106 - {TEE}: None
256 12:51:01.495174 Parsed boot commands:
257 12:51:01.495238 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:51:01.495411 Parsed boot commands: tftpboot 192.168.201.1 9729650/tftp-deploy-3jr0kg4q/kernel/bzImage 9729650/tftp-deploy-3jr0kg4q/kernel/cmdline 9729650/tftp-deploy-3jr0kg4q/ramdisk/ramdisk.cpio.gz
259 12:51:01.495517 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:51:01.495619 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:51:01.495728 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:51:01.495830 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:51:01.495912 Not connected, no need to disconnect.
264 12:51:01.496002 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:51:01.496100 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:51:01.496183 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
267 12:51:01.499446 Setting prompt string to ['lava-test: # ']
268 12:51:01.499778 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:51:01.499903 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:51:01.500013 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:51:01.500128 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:51:01.500316 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 12:51:06.633211 >> Command sent successfully.
274 12:51:06.635476 Returned 0 in 5 seconds
275 12:51:06.736293 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:51:06.736663 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:51:06.736776 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:51:06.736873 Setting prompt string to 'Starting depthcharge on Helios...'
280 12:51:06.736948 Changing prompt to 'Starting depthcharge on Helios...'
281 12:51:06.737028 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 12:51:06.737336 [Enter `^Ec?' for help]
283 12:51:07.357832
284 12:51:07.358012
285 12:51:07.367363 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 12:51:07.370695 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 12:51:07.377290 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 12:51:07.381148 CPU: AES supported, TXT NOT supported, VT supported
289 12:51:07.387635 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 12:51:07.390955 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 12:51:07.397743 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 12:51:07.400945 VBOOT: Loading verstage.
293 12:51:07.404168 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 12:51:07.410772 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 12:51:07.413932 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 12:51:07.417681 CBFS @ c08000 size 3f8000
297 12:51:07.423889 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 12:51:07.427389 CBFS: Locating 'fallback/verstage'
299 12:51:07.430455 CBFS: Found @ offset 10fb80 size 1072c
300 12:51:07.434230
301 12:51:07.434342
302 12:51:07.444854 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 12:51:07.458650 Probing TPM: . done!
304 12:51:07.461863 TPM ready after 0 ms
305 12:51:07.465743 Connected to device vid:did:rid of 1ae0:0028:00
306 12:51:07.475660 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
307 12:51:07.478908 Initialized TPM device CR50 revision 0
308 12:51:07.522808 tlcl_send_startup: Startup return code is 0
309 12:51:07.522960 TPM: setup succeeded
310 12:51:07.535449 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 12:51:07.539077 Chrome EC: UHEPI supported
312 12:51:07.542270 Phase 1
313 12:51:07.545442 FMAP: area GBB found @ c05000 (12288 bytes)
314 12:51:07.552407 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 12:51:07.555598 Phase 2
316 12:51:07.555700 Phase 3
317 12:51:07.558739 FMAP: area GBB found @ c05000 (12288 bytes)
318 12:51:07.565796 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 12:51:07.572390 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 12:51:07.575613 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 12:51:07.582139 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 12:51:07.598151 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 12:51:07.601342 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 12:51:07.607622 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 12:51:07.612147 Phase 4
326 12:51:07.615316 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 12:51:07.621688 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 12:51:07.801204 VB2:vb2_rsa_verify_digest() Digest check failed!
329 12:51:07.807817 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 12:51:07.807923 Saving nvdata
331 12:51:07.811823 Reboot requested (10020007)
332 12:51:07.814781 board_reset() called!
333 12:51:07.814879 full_reset() called!
334 12:51:12.324662
335 12:51:12.324838
336 12:51:12.334363 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 12:51:12.338241 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 12:51:12.344792 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 12:51:12.347995 CPU: AES supported, TXT NOT supported, VT supported
340 12:51:12.354386 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 12:51:12.357744 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 12:51:12.364389 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 12:51:12.367639 VBOOT: Loading verstage.
344 12:51:12.370956 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 12:51:12.377470 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 12:51:12.384634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 12:51:12.384849 CBFS @ c08000 size 3f8000
348 12:51:12.390974 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 12:51:12.394044 CBFS: Locating 'fallback/verstage'
350 12:51:12.397602 CBFS: Found @ offset 10fb80 size 1072c
351 12:51:12.401349
352 12:51:12.401543
353 12:51:12.411858 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 12:51:12.425918 Probing TPM: . done!
355 12:51:12.429327 TPM ready after 0 ms
356 12:51:12.432440 Connected to device vid:did:rid of 1ae0:0028:00
357 12:51:12.442780 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 12:51:12.446111 Initialized TPM device CR50 revision 0
359 12:51:12.489776 tlcl_send_startup: Startup return code is 0
360 12:51:12.489945 TPM: setup succeeded
361 12:51:12.502406 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 12:51:12.506015 Chrome EC: UHEPI supported
363 12:51:12.509694 Phase 1
364 12:51:12.512769 FMAP: area GBB found @ c05000 (12288 bytes)
365 12:51:12.519280 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 12:51:12.525897 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 12:51:12.529052 Recovery requested (1009000e)
368 12:51:12.535275 Saving nvdata
369 12:51:12.541352 tlcl_extend: response is 0
370 12:51:12.550115 tlcl_extend: response is 0
371 12:51:12.557226 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 12:51:12.560454 CBFS @ c08000 size 3f8000
373 12:51:12.566957 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 12:51:12.570143 CBFS: Locating 'fallback/romstage'
375 12:51:12.573452 CBFS: Found @ offset 80 size 145fc
376 12:51:12.576797 Accumulated console time in verstage 98 ms
377 12:51:12.576959
378 12:51:12.577040
379 12:51:12.589803 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 12:51:12.596296 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 12:51:12.599647 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 12:51:12.602870 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 12:51:12.609821 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 12:51:12.612825 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 12:51:12.616380 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 12:51:12.619423 TCO_STS: 0000 0000
387 12:51:12.623120 GEN_PMCON: e0015238 00000200
388 12:51:12.626095 GBLRST_CAUSE: 00000000 00000000
389 12:51:12.626296 prev_sleep_state 5
390 12:51:12.629774 Boot Count incremented to 48651
391 12:51:12.636442 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 12:51:12.640164 CBFS @ c08000 size 3f8000
393 12:51:12.646680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 12:51:12.646846 CBFS: Locating 'fspm.bin'
395 12:51:12.652780 CBFS: Found @ offset 5ffc0 size 71000
396 12:51:12.656444 Chrome EC: UHEPI supported
397 12:51:12.662756 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 12:51:12.666800 Probing TPM: done!
399 12:51:12.673129 Connected to device vid:did:rid of 1ae0:0028:00
400 12:51:12.682927 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
401 12:51:12.689244 Initialized TPM device CR50 revision 0
402 12:51:12.698422 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 12:51:12.704888 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 12:51:12.708121 MRC cache found, size 1948
405 12:51:12.711459 bootmode is set to: 2
406 12:51:12.714661 PRMRR disabled by config.
407 12:51:12.717854 SPD INDEX = 1
408 12:51:12.721579 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 12:51:12.724745 CBFS @ c08000 size 3f8000
410 12:51:12.731309 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 12:51:12.731485 CBFS: Locating 'spd.bin'
412 12:51:12.734200 CBFS: Found @ offset 5fb80 size 400
413 12:51:12.737945 SPD: module type is LPDDR3
414 12:51:12.740828 SPD: module part is
415 12:51:12.748009 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 12:51:12.750902 SPD: device width 4 bits, bus width 8 bits
417 12:51:12.754543 SPD: module size is 4096 MB (per channel)
418 12:51:12.757516 memory slot: 0 configuration done.
419 12:51:12.760650 memory slot: 2 configuration done.
420 12:51:12.811867 CBMEM:
421 12:51:12.815629 IMD: root @ 99fff000 254 entries.
422 12:51:12.818771 IMD: root @ 99ffec00 62 entries.
423 12:51:12.821982 External stage cache:
424 12:51:12.825181 IMD: root @ 9abff000 254 entries.
425 12:51:12.829170 IMD: root @ 9abfec00 62 entries.
426 12:51:12.832359 Chrome EC: clear events_b mask to 0x0000000020004000
427 12:51:12.847668 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 12:51:12.860927 tlcl_write: response is 0
429 12:51:12.870058 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 12:51:12.876984 MRC: TPM MRC hash updated successfully.
431 12:51:12.877195 2 DIMMs found
432 12:51:12.880166 SMM Memory Map
433 12:51:12.883473 SMRAM : 0x9a000000 0x1000000
434 12:51:12.886781 Subregion 0: 0x9a000000 0xa00000
435 12:51:12.889987 Subregion 1: 0x9aa00000 0x200000
436 12:51:12.893816 Subregion 2: 0x9ac00000 0x400000
437 12:51:12.896988 top_of_ram = 0x9a000000
438 12:51:12.899763 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 12:51:12.906826 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 12:51:12.910058 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 12:51:12.916693 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:51:12.919850 CBFS @ c08000 size 3f8000
443 12:51:12.923105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:51:12.926922 CBFS: Locating 'fallback/postcar'
445 12:51:12.929984 CBFS: Found @ offset 107000 size 4b44
446 12:51:12.936385 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 12:51:12.948872 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 12:51:12.951923 Processing 180 relocs. Offset value of 0x97c0c000
449 12:51:12.960156 Accumulated console time in romstage 286 ms
450 12:51:12.960338
451 12:51:12.960422
452 12:51:12.970503 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 12:51:12.976829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:51:12.979871 CBFS @ c08000 size 3f8000
455 12:51:12.986792 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 12:51:12.989997 CBFS: Locating 'fallback/ramstage'
457 12:51:12.993183 CBFS: Found @ offset 43380 size 1b9e8
458 12:51:12.999736 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 12:51:13.032245 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 12:51:13.035422 Processing 3976 relocs. Offset value of 0x98db0000
461 12:51:13.041849 Accumulated console time in postcar 52 ms
462 12:51:13.042053
463 12:51:13.042170
464 12:51:13.051877 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 12:51:13.058610 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 12:51:13.061645 WARNING: RO_VPD is uninitialized or empty.
467 12:51:13.065210 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:51:13.071927 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 12:51:13.072132 Normal boot.
470 12:51:13.078554 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 12:51:13.081718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 12:51:13.085371 CBFS @ c08000 size 3f8000
473 12:51:13.091891 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 12:51:13.095193 CBFS: Locating 'cpu_microcode_blob.bin'
475 12:51:13.098419 CBFS: Found @ offset 14700 size 2ec00
476 12:51:13.101672 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 12:51:13.104973 Skip microcode update
478 12:51:13.111767 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:51:13.111930 CBFS @ c08000 size 3f8000
480 12:51:13.118388 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:51:13.121485 CBFS: Locating 'fsps.bin'
482 12:51:13.124816 CBFS: Found @ offset d1fc0 size 35000
483 12:51:13.150179 Detected 4 core, 8 thread CPU.
484 12:51:13.153379 Setting up SMI for CPU
485 12:51:13.156902 IED base = 0x9ac00000
486 12:51:13.157044 IED size = 0x00400000
487 12:51:13.160155 Will perform SMM setup.
488 12:51:13.167019 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 12:51:13.173309 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 12:51:13.177037 Processing 16 relocs. Offset value of 0x00030000
491 12:51:13.180174 Attempting to start 7 APs
492 12:51:13.183400 Waiting for 10ms after sending INIT.
493 12:51:13.199795 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
494 12:51:13.199949 done.
495 12:51:13.202984 AP: slot 4 apic_id 4.
496 12:51:13.206330 AP: slot 1 apic_id 5.
497 12:51:13.210149 Waiting for 2nd SIPI to complete...done.
498 12:51:13.213556 AP: slot 2 apic_id 7.
499 12:51:13.213698 AP: slot 5 apic_id 6.
500 12:51:13.216893 AP: slot 6 apic_id 3.
501 12:51:13.220169 AP: slot 7 apic_id 2.
502 12:51:13.226718 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 12:51:13.233100 Processing 13 relocs. Offset value of 0x00038000
504 12:51:13.236359 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 12:51:13.242726 Installing SMM handler to 0x9a000000
506 12:51:13.249841 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 12:51:13.256374 Processing 658 relocs. Offset value of 0x9a010000
508 12:51:13.262887 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 12:51:13.266082 Processing 13 relocs. Offset value of 0x9a008000
510 12:51:13.272904 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 12:51:13.279157 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 12:51:13.285936 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 12:51:13.289152 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 12:51:13.295758 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 12:51:13.302360 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 12:51:13.305911 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 12:51:13.312368 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 12:51:13.316382 Clearing SMI status registers
519 12:51:13.319065 SMI_STS: PM1
520 12:51:13.319209 PM1_STS: PWRBTN
521 12:51:13.322886 TCO_STS: SECOND_TO
522 12:51:13.326236 New SMBASE 0x9a000000
523 12:51:13.329521 In relocation handler: CPU 0
524 12:51:13.332820 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 12:51:13.336143 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:51:13.339393 Relocation complete.
527 12:51:13.342386 New SMBASE 0x99fff400
528 12:51:13.346120 In relocation handler: CPU 3
529 12:51:13.349232 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 12:51:13.352414 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:51:13.355721 Relocation complete.
532 12:51:13.358993 New SMBASE 0x99ffe400
533 12:51:13.359204 In relocation handler: CPU 7
534 12:51:13.365633 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
535 12:51:13.368925 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 12:51:13.372107 Relocation complete.
537 12:51:13.375336 New SMBASE 0x99ffe800
538 12:51:13.375532 In relocation handler: CPU 6
539 12:51:13.382063 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
540 12:51:13.385723 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 12:51:13.388626 Relocation complete.
542 12:51:13.388802 New SMBASE 0x99fff800
543 12:51:13.392319 In relocation handler: CPU 2
544 12:51:13.398583 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
545 12:51:13.402151 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 12:51:13.405321 Relocation complete.
547 12:51:13.405461 New SMBASE 0x99ffec00
548 12:51:13.408874 In relocation handler: CPU 5
549 12:51:13.415742 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 12:51:13.418900 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:51:13.422157 Relocation complete.
552 12:51:13.422263 New SMBASE 0x99fff000
553 12:51:13.425481 In relocation handler: CPU 4
554 12:51:13.428607 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 12:51:13.435124 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:51:13.438493 Relocation complete.
557 12:51:13.438604 New SMBASE 0x99fffc00
558 12:51:13.441659 In relocation handler: CPU 1
559 12:51:13.444902 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
560 12:51:13.451745 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:51:13.455308 Relocation complete.
562 12:51:13.455424 Initializing CPU #0
563 12:51:13.458468 CPU: vendor Intel device 806ec
564 12:51:13.461870 CPU: family 06, model 8e, stepping 0c
565 12:51:13.465192 Clearing out pending MCEs
566 12:51:13.468394 Setting up local APIC...
567 12:51:13.471660 apic_id: 0x00 done.
568 12:51:13.471769 Turbo is available but hidden
569 12:51:13.474836 Turbo is available and visible
570 12:51:13.478156 VMX status: enabled
571 12:51:13.481476 IA32_FEATURE_CONTROL status: locked
572 12:51:13.484757 Skip microcode update
573 12:51:13.484867 CPU #0 initialized
574 12:51:13.488435 Initializing CPU #3
575 12:51:13.491578 Initializing CPU #7
576 12:51:13.491685 Initializing CPU #6
577 12:51:13.494610 CPU: vendor Intel device 806ec
578 12:51:13.498259 CPU: family 06, model 8e, stepping 0c
579 12:51:13.501372 CPU: vendor Intel device 806ec
580 12:51:13.504479 CPU: family 06, model 8e, stepping 0c
581 12:51:13.508152 Clearing out pending MCEs
582 12:51:13.511010 Clearing out pending MCEs
583 12:51:13.514689 Setting up local APIC...
584 12:51:13.514816 Initializing CPU #2
585 12:51:13.518293 Initializing CPU #5
586 12:51:13.521220 CPU: vendor Intel device 806ec
587 12:51:13.524600 CPU: family 06, model 8e, stepping 0c
588 12:51:13.527832 CPU: vendor Intel device 806ec
589 12:51:13.531576 CPU: family 06, model 8e, stepping 0c
590 12:51:13.534839 Clearing out pending MCEs
591 12:51:13.538247 Initializing CPU #1
592 12:51:13.538362 Initializing CPU #4
593 12:51:13.541559 CPU: vendor Intel device 806ec
594 12:51:13.544631 CPU: family 06, model 8e, stepping 0c
595 12:51:13.547856 CPU: vendor Intel device 806ec
596 12:51:13.551042 CPU: family 06, model 8e, stepping 0c
597 12:51:13.554131 Clearing out pending MCEs
598 12:51:13.557800 Clearing out pending MCEs
599 12:51:13.561062 Setting up local APIC...
600 12:51:13.564380 Setting up local APIC...
601 12:51:13.564499 Setting up local APIC...
602 12:51:13.567586 CPU: vendor Intel device 806ec
603 12:51:13.570796 CPU: family 06, model 8e, stepping 0c
604 12:51:13.573999 Clearing out pending MCEs
605 12:51:13.577297 apic_id: 0x06 done.
606 12:51:13.580659 Clearing out pending MCEs
607 12:51:13.580770 VMX status: enabled
608 12:51:13.584407 Setting up local APIC...
609 12:51:13.587747 Setting up local APIC...
610 12:51:13.590979 IA32_FEATURE_CONTROL status: locked
611 12:51:13.591097 apic_id: 0x07 done.
612 12:51:13.594148 Skip microcode update
613 12:51:13.597171 VMX status: enabled
614 12:51:13.597280 CPU #5 initialized
615 12:51:13.600853 IA32_FEATURE_CONTROL status: locked
616 12:51:13.603936 apic_id: 0x04 done.
617 12:51:13.607663 apic_id: 0x05 done.
618 12:51:13.607806 VMX status: enabled
619 12:51:13.610737 VMX status: enabled
620 12:51:13.614239 IA32_FEATURE_CONTROL status: locked
621 12:51:13.617385 IA32_FEATURE_CONTROL status: locked
622 12:51:13.620431 Skip microcode update
623 12:51:13.623995 Skip microcode update
624 12:51:13.624138 CPU #4 initialized
625 12:51:13.627060 CPU #1 initialized
626 12:51:13.627186 apic_id: 0x03 done.
627 12:51:13.630421 apic_id: 0x02 done.
628 12:51:13.633602 VMX status: enabled
629 12:51:13.633717 VMX status: enabled
630 12:51:13.637452 IA32_FEATURE_CONTROL status: locked
631 12:51:13.640246 IA32_FEATURE_CONTROL status: locked
632 12:51:13.643533 Skip microcode update
633 12:51:13.647402 Skip microcode update
634 12:51:13.647532 CPU #6 initialized
635 12:51:13.650510 CPU #7 initialized
636 12:51:13.653813 Skip microcode update
637 12:51:13.653972 Setting up local APIC...
638 12:51:13.657151 CPU #2 initialized
639 12:51:13.660234 apic_id: 0x01 done.
640 12:51:13.660378 VMX status: enabled
641 12:51:13.663875 IA32_FEATURE_CONTROL status: locked
642 12:51:13.667079 Skip microcode update
643 12:51:13.670260 CPU #3 initialized
644 12:51:13.673431 bsp_do_flight_plan done after 461 msecs.
645 12:51:13.676716 CPU: frequency set to 4200 MHz
646 12:51:13.676879 Enabling SMIs.
647 12:51:13.679868 Locking SMM.
648 12:51:13.694431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 12:51:13.697564 CBFS @ c08000 size 3f8000
650 12:51:13.703769 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 12:51:13.703952 CBFS: Locating 'vbt.bin'
652 12:51:13.707386 CBFS: Found @ offset 5f5c0 size 499
653 12:51:13.714069 Found a VBT of 4608 bytes after decompression
654 12:51:13.896392 Display FSP Version Info HOB
655 12:51:13.899566 Reference Code - CPU = 9.0.1e.30
656 12:51:13.903329 uCode Version = 0.0.0.ca
657 12:51:13.906659 TXT ACM version = ff.ff.ff.ffff
658 12:51:13.909820 Display FSP Version Info HOB
659 12:51:13.913089 Reference Code - ME = 9.0.1e.30
660 12:51:13.916398 MEBx version = 0.0.0.0
661 12:51:13.919507 ME Firmware Version = Consumer SKU
662 12:51:13.922672 Display FSP Version Info HOB
663 12:51:13.926361 Reference Code - CML PCH = 9.0.1e.30
664 12:51:13.929512 PCH-CRID Status = Disabled
665 12:51:13.933225 PCH-CRID Original Value = ff.ff.ff.ffff
666 12:51:13.936389 PCH-CRID New Value = ff.ff.ff.ffff
667 12:51:13.939411 OPROM - RST - RAID = ff.ff.ff.ffff
668 12:51:13.943066 ChipsetInit Base Version = ff.ff.ff.ffff
669 12:51:13.946149 ChipsetInit Oem Version = ff.ff.ff.ffff
670 12:51:13.949163 Display FSP Version Info HOB
671 12:51:13.955743 Reference Code - SA - System Agent = 9.0.1e.30
672 12:51:13.959016 Reference Code - MRC = 0.7.1.6c
673 12:51:13.959134 SA - PCIe Version = 9.0.1e.30
674 12:51:13.962861 SA-CRID Status = Disabled
675 12:51:13.966075 SA-CRID Original Value = 0.0.0.c
676 12:51:13.969313 SA-CRID New Value = 0.0.0.c
677 12:51:13.972612 OPROM - VBIOS = ff.ff.ff.ffff
678 12:51:13.975801 RTC Init
679 12:51:13.979468 Set power on after power failure.
680 12:51:13.979566 Disabling Deep S3
681 12:51:13.982445 Disabling Deep S3
682 12:51:13.982544 Disabling Deep S4
683 12:51:13.985547 Disabling Deep S4
684 12:51:13.989437 Disabling Deep S5
685 12:51:13.989536 Disabling Deep S5
686 12:51:13.996016 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
687 12:51:13.996115 Enumerating buses...
688 12:51:14.002530 Show all devs... Before device enumeration.
689 12:51:14.005765 Root Device: enabled 1
690 12:51:14.005865 CPU_CLUSTER: 0: enabled 1
691 12:51:14.009090 DOMAIN: 0000: enabled 1
692 12:51:14.012267 APIC: 00: enabled 1
693 12:51:14.012368 PCI: 00:00.0: enabled 1
694 12:51:14.015480 PCI: 00:02.0: enabled 1
695 12:51:14.018875 PCI: 00:04.0: enabled 0
696 12:51:14.022098 PCI: 00:05.0: enabled 0
697 12:51:14.022196 PCI: 00:12.0: enabled 1
698 12:51:14.025232 PCI: 00:12.5: enabled 0
699 12:51:14.028922 PCI: 00:12.6: enabled 0
700 12:51:14.031918 PCI: 00:14.0: enabled 1
701 12:51:14.032016 PCI: 00:14.1: enabled 0
702 12:51:14.035754 PCI: 00:14.3: enabled 1
703 12:51:14.038814 PCI: 00:14.5: enabled 0
704 12:51:14.038912 PCI: 00:15.0: enabled 1
705 12:51:14.041993 PCI: 00:15.1: enabled 1
706 12:51:14.045754 PCI: 00:15.2: enabled 0
707 12:51:14.048798 PCI: 00:15.3: enabled 0
708 12:51:14.048896 PCI: 00:16.0: enabled 1
709 12:51:14.052344 PCI: 00:16.1: enabled 0
710 12:51:14.055429 PCI: 00:16.2: enabled 0
711 12:51:14.058652 PCI: 00:16.3: enabled 0
712 12:51:14.058749 PCI: 00:16.4: enabled 0
713 12:51:14.062015 PCI: 00:16.5: enabled 0
714 12:51:14.065060 PCI: 00:17.0: enabled 1
715 12:51:14.068298 PCI: 00:19.0: enabled 1
716 12:51:14.068395 PCI: 00:19.1: enabled 0
717 12:51:14.072183 PCI: 00:19.2: enabled 0
718 12:51:14.075356 PCI: 00:1a.0: enabled 0
719 12:51:14.075453 PCI: 00:1c.0: enabled 0
720 12:51:14.078595 PCI: 00:1c.1: enabled 0
721 12:51:14.081738 PCI: 00:1c.2: enabled 0
722 12:51:14.085385 PCI: 00:1c.3: enabled 0
723 12:51:14.085483 PCI: 00:1c.4: enabled 0
724 12:51:14.088538 PCI: 00:1c.5: enabled 0
725 12:51:14.091790 PCI: 00:1c.6: enabled 0
726 12:51:14.094987 PCI: 00:1c.7: enabled 0
727 12:51:14.095092 PCI: 00:1d.0: enabled 1
728 12:51:14.098288 PCI: 00:1d.1: enabled 0
729 12:51:14.101565 PCI: 00:1d.2: enabled 0
730 12:51:14.104835 PCI: 00:1d.3: enabled 0
731 12:51:14.104932 PCI: 00:1d.4: enabled 0
732 12:51:14.108634 PCI: 00:1d.5: enabled 1
733 12:51:14.111715 PCI: 00:1e.0: enabled 1
734 12:51:14.114832 PCI: 00:1e.1: enabled 0
735 12:51:14.114932 PCI: 00:1e.2: enabled 1
736 12:51:14.118160 PCI: 00:1e.3: enabled 1
737 12:51:14.121570 PCI: 00:1f.0: enabled 1
738 12:51:14.121667 PCI: 00:1f.1: enabled 1
739 12:51:14.124743 PCI: 00:1f.2: enabled 1
740 12:51:14.127994 PCI: 00:1f.3: enabled 1
741 12:51:14.131103 PCI: 00:1f.4: enabled 1
742 12:51:14.131203 PCI: 00:1f.5: enabled 1
743 12:51:14.134552 PCI: 00:1f.6: enabled 0
744 12:51:14.138355 USB0 port 0: enabled 1
745 12:51:14.141379 I2C: 00:15: enabled 1
746 12:51:14.141487 I2C: 00:5d: enabled 1
747 12:51:14.145036 GENERIC: 0.0: enabled 1
748 12:51:14.148227 I2C: 00:1a: enabled 1
749 12:51:14.148342 I2C: 00:38: enabled 1
750 12:51:14.151299 I2C: 00:39: enabled 1
751 12:51:14.154364 I2C: 00:3a: enabled 1
752 12:51:14.154462 I2C: 00:3b: enabled 1
753 12:51:14.157974 PCI: 00:00.0: enabled 1
754 12:51:14.161117 SPI: 00: enabled 1
755 12:51:14.161215 SPI: 01: enabled 1
756 12:51:14.164776 PNP: 0c09.0: enabled 1
757 12:51:14.167966 USB2 port 0: enabled 1
758 12:51:14.168065 USB2 port 1: enabled 1
759 12:51:14.171045 USB2 port 2: enabled 0
760 12:51:14.174404 USB2 port 3: enabled 0
761 12:51:14.174501 USB2 port 5: enabled 0
762 12:51:14.177751 USB2 port 6: enabled 1
763 12:51:14.180835 USB2 port 9: enabled 1
764 12:51:14.184181 USB3 port 0: enabled 1
765 12:51:14.184279 USB3 port 1: enabled 1
766 12:51:14.187898 USB3 port 2: enabled 1
767 12:51:14.190837 USB3 port 3: enabled 1
768 12:51:14.190935 USB3 port 4: enabled 0
769 12:51:14.194104 APIC: 05: enabled 1
770 12:51:14.197889 APIC: 07: enabled 1
771 12:51:14.197987 APIC: 01: enabled 1
772 12:51:14.201019 APIC: 04: enabled 1
773 12:51:14.201117 APIC: 06: enabled 1
774 12:51:14.204410 APIC: 03: enabled 1
775 12:51:14.207526 APIC: 02: enabled 1
776 12:51:14.207623 Compare with tree...
777 12:51:14.210783 Root Device: enabled 1
778 12:51:14.213985 CPU_CLUSTER: 0: enabled 1
779 12:51:14.217806 APIC: 00: enabled 1
780 12:51:14.217903 APIC: 05: enabled 1
781 12:51:14.221140 APIC: 07: enabled 1
782 12:51:14.224352 APIC: 01: enabled 1
783 12:51:14.224449 APIC: 04: enabled 1
784 12:51:14.227537 APIC: 06: enabled 1
785 12:51:14.230838 APIC: 03: enabled 1
786 12:51:14.230936 APIC: 02: enabled 1
787 12:51:14.234107 DOMAIN: 0000: enabled 1
788 12:51:14.237371 PCI: 00:00.0: enabled 1
789 12:51:14.240487 PCI: 00:02.0: enabled 1
790 12:51:14.240586 PCI: 00:04.0: enabled 0
791 12:51:14.243817 PCI: 00:05.0: enabled 0
792 12:51:14.247419 PCI: 00:12.0: enabled 1
793 12:51:14.250498 PCI: 00:12.5: enabled 0
794 12:51:14.254053 PCI: 00:12.6: enabled 0
795 12:51:14.254151 PCI: 00:14.0: enabled 1
796 12:51:14.257115 USB0 port 0: enabled 1
797 12:51:14.260709 USB2 port 0: enabled 1
798 12:51:14.263644 USB2 port 1: enabled 1
799 12:51:14.267198 USB2 port 2: enabled 0
800 12:51:14.270798 USB2 port 3: enabled 0
801 12:51:14.270896 USB2 port 5: enabled 0
802 12:51:14.273714 USB2 port 6: enabled 1
803 12:51:14.276843 USB2 port 9: enabled 1
804 12:51:14.280134 USB3 port 0: enabled 1
805 12:51:14.283532 USB3 port 1: enabled 1
806 12:51:14.283630 USB3 port 2: enabled 1
807 12:51:14.286875 USB3 port 3: enabled 1
808 12:51:14.290184 USB3 port 4: enabled 0
809 12:51:14.293876 PCI: 00:14.1: enabled 0
810 12:51:14.296841 PCI: 00:14.3: enabled 1
811 12:51:14.296939 PCI: 00:14.5: enabled 0
812 12:51:14.300583 PCI: 00:15.0: enabled 1
813 12:51:14.303899 I2C: 00:15: enabled 1
814 12:51:14.307054 PCI: 00:15.1: enabled 1
815 12:51:14.310369 I2C: 00:5d: enabled 1
816 12:51:14.310470 GENERIC: 0.0: enabled 1
817 12:51:14.313684 PCI: 00:15.2: enabled 0
818 12:51:14.316956 PCI: 00:15.3: enabled 0
819 12:51:14.320368 PCI: 00:16.0: enabled 1
820 12:51:14.323491 PCI: 00:16.1: enabled 0
821 12:51:14.323590 PCI: 00:16.2: enabled 0
822 12:51:14.326850 PCI: 00:16.3: enabled 0
823 12:51:14.330042 PCI: 00:16.4: enabled 0
824 12:51:14.333144 PCI: 00:16.5: enabled 0
825 12:51:14.336468 PCI: 00:17.0: enabled 1
826 12:51:14.336566 PCI: 00:19.0: enabled 1
827 12:51:14.339770 I2C: 00:1a: enabled 1
828 12:51:14.342981 I2C: 00:38: enabled 1
829 12:51:14.346956 I2C: 00:39: enabled 1
830 12:51:14.347054 I2C: 00:3a: enabled 1
831 12:51:14.349723 I2C: 00:3b: enabled 1
832 12:51:14.352968 PCI: 00:19.1: enabled 0
833 12:51:14.356647 PCI: 00:19.2: enabled 0
834 12:51:14.359819 PCI: 00:1a.0: enabled 0
835 12:51:14.359917 PCI: 00:1c.0: enabled 0
836 12:51:14.362924 PCI: 00:1c.1: enabled 0
837 12:51:14.366690 PCI: 00:1c.2: enabled 0
838 12:51:14.369724 PCI: 00:1c.3: enabled 0
839 12:51:14.373390 PCI: 00:1c.4: enabled 0
840 12:51:14.373488 PCI: 00:1c.5: enabled 0
841 12:51:14.376416 PCI: 00:1c.6: enabled 0
842 12:51:14.380099 PCI: 00:1c.7: enabled 0
843 12:51:14.383030 PCI: 00:1d.0: enabled 1
844 12:51:14.383140 PCI: 00:1d.1: enabled 0
845 12:51:14.386055 PCI: 00:1d.2: enabled 0
846 12:51:14.389766 PCI: 00:1d.3: enabled 0
847 12:51:14.392984 PCI: 00:1d.4: enabled 0
848 12:51:14.396245 PCI: 00:1d.5: enabled 1
849 12:51:14.396343 PCI: 00:00.0: enabled 1
850 12:51:14.399797 PCI: 00:1e.0: enabled 1
851 12:51:14.402911 PCI: 00:1e.1: enabled 0
852 12:51:14.406053 PCI: 00:1e.2: enabled 1
853 12:51:14.409441 SPI: 00: enabled 1
854 12:51:14.409539 PCI: 00:1e.3: enabled 1
855 12:51:14.412744 SPI: 01: enabled 1
856 12:51:14.415966 PCI: 00:1f.0: enabled 1
857 12:51:14.419214 PNP: 0c09.0: enabled 1
858 12:51:14.419311 PCI: 00:1f.1: enabled 1
859 12:51:14.422466 PCI: 00:1f.2: enabled 1
860 12:51:14.425819 PCI: 00:1f.3: enabled 1
861 12:51:14.428974 PCI: 00:1f.4: enabled 1
862 12:51:14.432785 PCI: 00:1f.5: enabled 1
863 12:51:14.432883 PCI: 00:1f.6: enabled 0
864 12:51:14.436086 Root Device scanning...
865 12:51:14.439438 scan_static_bus for Root Device
866 12:51:14.442663 CPU_CLUSTER: 0 enabled
867 12:51:14.445906 DOMAIN: 0000 enabled
868 12:51:14.446003 DOMAIN: 0000 scanning...
869 12:51:14.449217 PCI: pci_scan_bus for bus 00
870 12:51:14.452457 PCI: 00:00.0 [8086/0000] ops
871 12:51:14.455676 PCI: 00:00.0 [8086/9b61] enabled
872 12:51:14.459310 PCI: 00:02.0 [8086/0000] bus ops
873 12:51:14.462420 PCI: 00:02.0 [8086/9b41] enabled
874 12:51:14.465684 PCI: 00:04.0 [8086/1903] disabled
875 12:51:14.468796 PCI: 00:08.0 [8086/1911] enabled
876 12:51:14.472540 PCI: 00:12.0 [8086/02f9] enabled
877 12:51:14.475815 PCI: 00:14.0 [8086/0000] bus ops
878 12:51:14.478761 PCI: 00:14.0 [8086/02ed] enabled
879 12:51:14.482356 PCI: 00:14.2 [8086/02ef] enabled
880 12:51:14.485416 PCI: 00:14.3 [8086/02f0] enabled
881 12:51:14.489085 PCI: 00:15.0 [8086/0000] bus ops
882 12:51:14.492222 PCI: 00:15.0 [8086/02e8] enabled
883 12:51:14.495372 PCI: 00:15.1 [8086/0000] bus ops
884 12:51:14.498707 PCI: 00:15.1 [8086/02e9] enabled
885 12:51:14.502313 PCI: 00:16.0 [8086/0000] ops
886 12:51:14.505406 PCI: 00:16.0 [8086/02e0] enabled
887 12:51:14.508988 PCI: 00:17.0 [8086/0000] ops
888 12:51:14.512327 PCI: 00:17.0 [8086/02d3] enabled
889 12:51:14.515518 PCI: 00:19.0 [8086/0000] bus ops
890 12:51:14.518819 PCI: 00:19.0 [8086/02c5] enabled
891 12:51:14.522035 PCI: 00:1d.0 [8086/0000] bus ops
892 12:51:14.525405 PCI: 00:1d.0 [8086/02b0] enabled
893 12:51:14.531845 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 12:51:14.535018 PCI: 00:1e.0 [8086/0000] ops
895 12:51:14.538341 PCI: 00:1e.0 [8086/02a8] enabled
896 12:51:14.541722 PCI: 00:1e.2 [8086/0000] bus ops
897 12:51:14.545578 PCI: 00:1e.2 [8086/02aa] enabled
898 12:51:14.548796 PCI: 00:1e.3 [8086/0000] bus ops
899 12:51:14.552065 PCI: 00:1e.3 [8086/02ab] enabled
900 12:51:14.555263 PCI: 00:1f.0 [8086/0000] bus ops
901 12:51:14.558535 PCI: 00:1f.0 [8086/0284] enabled
902 12:51:14.561764 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 12:51:14.568721 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 12:51:14.571966 PCI: 00:1f.3 [8086/0000] bus ops
905 12:51:14.575109 PCI: 00:1f.3 [8086/02c8] enabled
906 12:51:14.578264 PCI: 00:1f.4 [8086/0000] bus ops
907 12:51:14.582037 PCI: 00:1f.4 [8086/02a3] enabled
908 12:51:14.585167 PCI: 00:1f.5 [8086/0000] bus ops
909 12:51:14.588436 PCI: 00:1f.5 [8086/02a4] enabled
910 12:51:14.592071 PCI: Leftover static devices:
911 12:51:14.592170 PCI: 00:05.0
912 12:51:14.594935 PCI: 00:12.5
913 12:51:14.595033 PCI: 00:12.6
914 12:51:14.598753 PCI: 00:14.1
915 12:51:14.598851 PCI: 00:14.5
916 12:51:14.598927 PCI: 00:15.2
917 12:51:14.601786 PCI: 00:15.3
918 12:51:14.601884 PCI: 00:16.1
919 12:51:14.604733 PCI: 00:16.2
920 12:51:14.604830 PCI: 00:16.3
921 12:51:14.604907 PCI: 00:16.4
922 12:51:14.608539 PCI: 00:16.5
923 12:51:14.608638 PCI: 00:19.1
924 12:51:14.611571 PCI: 00:19.2
925 12:51:14.611668 PCI: 00:1a.0
926 12:51:14.615313 PCI: 00:1c.0
927 12:51:14.615410 PCI: 00:1c.1
928 12:51:14.615488 PCI: 00:1c.2
929 12:51:14.618484 PCI: 00:1c.3
930 12:51:14.618584 PCI: 00:1c.4
931 12:51:14.621775 PCI: 00:1c.5
932 12:51:14.621873 PCI: 00:1c.6
933 12:51:14.621951 PCI: 00:1c.7
934 12:51:14.625003 PCI: 00:1d.1
935 12:51:14.625101 PCI: 00:1d.2
936 12:51:14.628272 PCI: 00:1d.3
937 12:51:14.628371 PCI: 00:1d.4
938 12:51:14.628448 PCI: 00:1d.5
939 12:51:14.631517 PCI: 00:1e.1
940 12:51:14.631615 PCI: 00:1f.1
941 12:51:14.634656 PCI: 00:1f.2
942 12:51:14.634753 PCI: 00:1f.6
943 12:51:14.638418 PCI: Check your devicetree.cb.
944 12:51:14.641783 PCI: 00:02.0 scanning...
945 12:51:14.645003 scan_generic_bus for PCI: 00:02.0
946 12:51:14.648214 scan_generic_bus for PCI: 00:02.0 done
947 12:51:14.654766 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
948 12:51:14.657954 PCI: 00:14.0 scanning...
949 12:51:14.661189 scan_static_bus for PCI: 00:14.0
950 12:51:14.661286 USB0 port 0 enabled
951 12:51:14.664503 USB0 port 0 scanning...
952 12:51:14.668302 scan_static_bus for USB0 port 0
953 12:51:14.671422 USB2 port 0 enabled
954 12:51:14.671519 USB2 port 1 enabled
955 12:51:14.674561 USB2 port 2 disabled
956 12:51:14.677738 USB2 port 3 disabled
957 12:51:14.677838 USB2 port 5 disabled
958 12:51:14.680914 USB2 port 6 enabled
959 12:51:14.681012 USB2 port 9 enabled
960 12:51:14.684613 USB3 port 0 enabled
961 12:51:14.687920 USB3 port 1 enabled
962 12:51:14.688018 USB3 port 2 enabled
963 12:51:14.690920 USB3 port 3 enabled
964 12:51:14.694586 USB3 port 4 disabled
965 12:51:14.694684 USB2 port 0 scanning...
966 12:51:14.697851 scan_static_bus for USB2 port 0
967 12:51:14.704594 scan_static_bus for USB2 port 0 done
968 12:51:14.707627 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
969 12:51:14.711182 USB2 port 1 scanning...
970 12:51:14.714245 scan_static_bus for USB2 port 1
971 12:51:14.717309 scan_static_bus for USB2 port 1 done
972 12:51:14.724382 scan_bus: scanning of bus USB2 port 1 took 9698 usecs
973 12:51:14.724484 USB2 port 6 scanning...
974 12:51:14.727707 scan_static_bus for USB2 port 6
975 12:51:14.734164 scan_static_bus for USB2 port 6 done
976 12:51:14.737404 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
977 12:51:14.740581 USB2 port 9 scanning...
978 12:51:14.743881 scan_static_bus for USB2 port 9
979 12:51:14.747110 scan_static_bus for USB2 port 9 done
980 12:51:14.754291 scan_bus: scanning of bus USB2 port 9 took 9688 usecs
981 12:51:14.754390 USB3 port 0 scanning...
982 12:51:14.757503 scan_static_bus for USB3 port 0
983 12:51:14.763907 scan_static_bus for USB3 port 0 done
984 12:51:14.767868 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
985 12:51:14.770933 USB3 port 1 scanning...
986 12:51:14.774088 scan_static_bus for USB3 port 1
987 12:51:14.777319 scan_static_bus for USB3 port 1 done
988 12:51:14.783896 scan_bus: scanning of bus USB3 port 1 took 9706 usecs
989 12:51:14.783995 USB3 port 2 scanning...
990 12:51:14.787688 scan_static_bus for USB3 port 2
991 12:51:14.794129 scan_static_bus for USB3 port 2 done
992 12:51:14.797291 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
993 12:51:14.800948 USB3 port 3 scanning...
994 12:51:14.804186 scan_static_bus for USB3 port 3
995 12:51:14.807262 scan_static_bus for USB3 port 3 done
996 12:51:14.813984 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
997 12:51:14.817233 scan_static_bus for USB0 port 0 done
998 12:51:14.823716 scan_bus: scanning of bus USB0 port 0 took 155346 usecs
999 12:51:14.826914 scan_static_bus for PCI: 00:14.0 done
1000 12:51:14.830545 scan_bus: scanning of bus PCI: 00:14.0 took 172975 usecs
1001 12:51:14.833668 PCI: 00:15.0 scanning...
1002 12:51:14.836870 scan_generic_bus for PCI: 00:15.0
1003 12:51:14.840758 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 12:51:14.847274 scan_generic_bus for PCI: 00:15.0 done
1005 12:51:14.850490 scan_bus: scanning of bus PCI: 00:15.0 took 14311 usecs
1006 12:51:14.853751 PCI: 00:15.1 scanning...
1007 12:51:14.857010 scan_generic_bus for PCI: 00:15.1
1008 12:51:14.860285 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 12:51:14.866595 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 12:51:14.870582 scan_generic_bus for PCI: 00:15.1 done
1011 12:51:14.877013 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
1012 12:51:14.877179 PCI: 00:19.0 scanning...
1013 12:51:14.883509 scan_generic_bus for PCI: 00:19.0
1014 12:51:14.886694 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 12:51:14.890030 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 12:51:14.893173 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 12:51:14.897083 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 12:51:14.903392 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 12:51:14.906392 scan_generic_bus for PCI: 00:19.0 done
1020 12:51:14.913409 scan_bus: scanning of bus PCI: 00:19.0 took 30744 usecs
1021 12:51:14.913574 PCI: 00:1d.0 scanning...
1022 12:51:14.916530 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:51:14.919630 PCI: pci_scan_bus for bus 01
1024 12:51:14.922716 PCI: 01:00.0 [1c5c/1327] enabled
1025 12:51:14.929437 Enabling Common Clock Configuration
1026 12:51:14.933013 L1 Sub-State supported from root port 29
1027 12:51:14.936134 L1 Sub-State Support = 0xf
1028 12:51:14.939733 CommonModeRestoreTime = 0x28
1029 12:51:14.942733 Power On Value = 0x16, Power On Scale = 0x0
1030 12:51:14.942887 ASPM: Enabled L1
1031 12:51:14.949780 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1032 12:51:14.953073 PCI: 00:1e.2 scanning...
1033 12:51:14.956266 scan_generic_bus for PCI: 00:1e.2
1034 12:51:14.959581 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 12:51:14.962802 scan_generic_bus for PCI: 00:1e.2 done
1036 12:51:14.969220 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
1037 12:51:14.972669 PCI: 00:1e.3 scanning...
1038 12:51:14.975950 scan_generic_bus for PCI: 00:1e.3
1039 12:51:14.979174 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 12:51:14.982531 scan_generic_bus for PCI: 00:1e.3 done
1041 12:51:14.988989 scan_bus: scanning of bus PCI: 00:1e.3 took 13996 usecs
1042 12:51:14.992245 PCI: 00:1f.0 scanning...
1043 12:51:14.996141 scan_static_bus for PCI: 00:1f.0
1044 12:51:14.996282 PNP: 0c09.0 enabled
1045 12:51:14.999497 scan_static_bus for PCI: 00:1f.0 done
1046 12:51:15.005754 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1047 12:51:15.008925 PCI: 00:1f.3 scanning...
1048 12:51:15.015863 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1049 12:51:15.016053 PCI: 00:1f.4 scanning...
1050 12:51:15.022198 scan_generic_bus for PCI: 00:1f.4
1051 12:51:15.025320 scan_generic_bus for PCI: 00:1f.4 done
1052 12:51:15.029033 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1053 12:51:15.032200 PCI: 00:1f.5 scanning...
1054 12:51:15.035928 scan_generic_bus for PCI: 00:1f.5
1055 12:51:15.038949 scan_generic_bus for PCI: 00:1f.5 done
1056 12:51:15.045356 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1057 12:51:15.052255 scan_bus: scanning of bus DOMAIN: 0000 took 604965 usecs
1058 12:51:15.055618 scan_static_bus for Root Device done
1059 12:51:15.062194 scan_bus: scanning of bus Root Device took 624818 usecs
1060 12:51:15.062336 done
1061 12:51:15.065376 Chrome EC: UHEPI supported
1062 12:51:15.071939 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 12:51:15.075205 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 12:51:15.081792 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 12:51:15.089401 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 12:51:15.092715 SPI flash protection: WPSW=0 SRP0=0
1067 12:51:15.099071 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 12:51:15.102409 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1069 12:51:15.105705 found VGA at PCI: 00:02.0
1070 12:51:15.108918 Setting up VGA for PCI: 00:02.0
1071 12:51:15.115404 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 12:51:15.119076 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 12:51:15.122338 Allocating resources...
1074 12:51:15.125426 Reading resources...
1075 12:51:15.128989 Root Device read_resources bus 0 link: 0
1076 12:51:15.132130 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 12:51:15.138855 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 12:51:15.141889 DOMAIN: 0000 read_resources bus 0 link: 0
1079 12:51:15.149256 PCI: 00:14.0 read_resources bus 0 link: 0
1080 12:51:15.152390 USB0 port 0 read_resources bus 0 link: 0
1081 12:51:15.161126 USB0 port 0 read_resources bus 0 link: 0 done
1082 12:51:15.164321 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 12:51:15.171662 PCI: 00:15.0 read_resources bus 1 link: 0
1084 12:51:15.174869 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 12:51:15.181335 PCI: 00:15.1 read_resources bus 2 link: 0
1086 12:51:15.184536 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 12:51:15.192294 PCI: 00:19.0 read_resources bus 3 link: 0
1088 12:51:15.198794 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 12:51:15.202057 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 12:51:15.208479 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 12:51:15.211668 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 12:51:15.218198 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 12:51:15.221965 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 12:51:15.228258 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 12:51:15.232030 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 12:51:15.238747 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 12:51:15.244933 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 12:51:15.248040 Root Device read_resources bus 0 link: 0 done
1099 12:51:15.251759 Done reading resources.
1100 12:51:15.254758 Show resources in subtree (Root Device)...After reading.
1101 12:51:15.261596 Root Device child on link 0 CPU_CLUSTER: 0
1102 12:51:15.265056 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 12:51:15.265211 APIC: 00
1104 12:51:15.268359 APIC: 05
1105 12:51:15.268470 APIC: 07
1106 12:51:15.271448 APIC: 01
1107 12:51:15.271549 APIC: 04
1108 12:51:15.271627 APIC: 06
1109 12:51:15.274843 APIC: 03
1110 12:51:15.274944 APIC: 02
1111 12:51:15.278078 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 12:51:15.288341 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 12:51:15.341372 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 12:51:15.341805 PCI: 00:00.0
1115 12:51:15.341936 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 12:51:15.342518 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 12:51:15.343256 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 12:51:15.344361 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 12:51:15.390548 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 12:51:15.390973 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 12:51:15.391124 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 12:51:15.391459 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 12:51:15.391586 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 12:51:15.395162 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 12:51:15.401987 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 12:51:15.411845 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 12:51:15.421619 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 12:51:15.432011 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 12:51:15.441580 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 12:51:15.451470 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 12:51:15.451668 PCI: 00:02.0
1132 12:51:15.461670 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 12:51:15.471275 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 12:51:15.481538 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 12:51:15.481741 PCI: 00:04.0
1136 12:51:15.484812 PCI: 00:08.0
1137 12:51:15.494390 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 12:51:15.494554 PCI: 00:12.0
1139 12:51:15.504137 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 12:51:15.511215 PCI: 00:14.0 child on link 0 USB0 port 0
1141 12:51:15.521058 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 12:51:15.524213 USB0 port 0 child on link 0 USB2 port 0
1143 12:51:15.527636 USB2 port 0
1144 12:51:15.527785 USB2 port 1
1145 12:51:15.530771 USB2 port 2
1146 12:51:15.530903 USB2 port 3
1147 12:51:15.534040 USB2 port 5
1148 12:51:15.534176 USB2 port 6
1149 12:51:15.537271 USB2 port 9
1150 12:51:15.537446 USB3 port 0
1151 12:51:15.540528 USB3 port 1
1152 12:51:15.540663 USB3 port 2
1153 12:51:15.544389 USB3 port 3
1154 12:51:15.544575 USB3 port 4
1155 12:51:15.547648 PCI: 00:14.2
1156 12:51:15.557438 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 12:51:15.567313 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 12:51:15.567495 PCI: 00:14.3
1159 12:51:15.577248 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 12:51:15.584076 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 12:51:15.593794 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 12:51:15.593978 I2C: 01:15
1163 12:51:15.597077 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 12:51:15.606793 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:51:15.609938 I2C: 02:5d
1166 12:51:15.610085 GENERIC: 0.0
1167 12:51:15.613168 PCI: 00:16.0
1168 12:51:15.623376 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:51:15.623549 PCI: 00:17.0
1170 12:51:15.633225 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 12:51:15.642914 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 12:51:15.649542 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 12:51:15.659759 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 12:51:15.666522 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 12:51:15.676558 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 12:51:15.679495 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 12:51:15.689424 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 12:51:15.692706 I2C: 03:1a
1179 12:51:15.692896 I2C: 03:38
1180 12:51:15.696612 I2C: 03:39
1181 12:51:15.696811 I2C: 03:3a
1182 12:51:15.699705 I2C: 03:3b
1183 12:51:15.702984 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 12:51:15.712797 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 12:51:15.722988 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 12:51:15.732720 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 12:51:15.732932 PCI: 01:00.0
1188 12:51:15.742437 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 12:51:15.745792 PCI: 00:1e.0
1190 12:51:15.755604 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 12:51:15.765902 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 12:51:15.769090 PCI: 00:1e.2 child on link 0 SPI: 00
1193 12:51:15.778990 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:51:15.782001 SPI: 00
1195 12:51:15.785703 PCI: 00:1e.3 child on link 0 SPI: 01
1196 12:51:15.795673 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:51:15.795894 SPI: 01
1198 12:51:15.798798 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 12:51:15.808686 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 12:51:15.818401 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 12:51:15.818614 PNP: 0c09.0
1202 12:51:15.828468 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 12:51:15.828679 PCI: 00:1f.3
1204 12:51:15.838850 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:51:15.848662 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 12:51:15.851881 PCI: 00:1f.4
1207 12:51:15.861617 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 12:51:15.871443 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 12:51:15.871651 PCI: 00:1f.5
1210 12:51:15.881497 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 12:51:15.888288 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 12:51:15.894959 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 12:51:15.901658 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 12:51:15.904622 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 12:51:15.907868 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 12:51:15.911017 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 12:51:15.914382 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 12:51:15.921033 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 12:51:15.927989 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 12:51:15.937696 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 12:51:15.943960 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 12:51:15.950616 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 12:51:15.953904 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 12:51:15.963799 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 12:51:15.967712 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 12:51:15.974303 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 12:51:15.977591 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 12:51:15.984063 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 12:51:15.987141 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 12:51:15.990208 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 12:51:15.996883 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 12:51:16.000621 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 12:51:16.007288 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 12:51:16.010366 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 12:51:16.017291 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 12:51:16.020544 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 12:51:16.026916 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 12:51:16.030161 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 12:51:16.037071 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 12:51:16.040413 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 12:51:16.046845 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 12:51:16.050157 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 12:51:16.056703 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 12:51:16.059944 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 12:51:16.066384 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 12:51:16.069650 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 12:51:16.072961 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 12:51:16.083365 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 12:51:16.086730 avoid_fixed_resources: DOMAIN: 0000
1250 12:51:16.093072 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 12:51:16.099683 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 12:51:16.106015 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 12:51:16.112712 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 12:51:16.122616 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 12:51:16.129761 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 12:51:16.136245 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 12:51:16.145810 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 12:51:16.152752 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 12:51:16.159284 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 12:51:16.165759 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 12:51:16.175448 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 12:51:16.175649 Setting resources...
1263 12:51:16.182070 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 12:51:16.185341 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 12:51:16.192543 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 12:51:16.195693 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 12:51:16.198808 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 12:51:16.205773 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 12:51:16.212054 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 12:51:16.218702 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 12:51:16.225578 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 12:51:16.231752 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 12:51:16.234924 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 12:51:16.241565 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 12:51:16.245351 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 12:51:16.248632 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 12:51:16.255167 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 12:51:16.258296 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 12:51:16.264825 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 12:51:16.268031 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 12:51:16.275012 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 12:51:16.278285 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 12:51:16.284782 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 12:51:16.287943 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 12:51:16.294402 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 12:51:16.297705 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 12:51:16.304860 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 12:51:16.308037 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 12:51:16.314370 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 12:51:16.318063 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 12:51:16.321046 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 12:51:16.327687 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 12:51:16.331345 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 12:51:16.337559 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 12:51:16.344076 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 12:51:16.350933 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 12:51:16.360740 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 12:51:16.367740 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 12:51:16.371049 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 12:51:16.380703 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 12:51:16.383913 Root Device assign_resources, bus 0 link: 0
1302 12:51:16.387234 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 12:51:16.397369 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 12:51:16.403890 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 12:51:16.414229 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 12:51:16.420358 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 12:51:16.430323 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 12:51:16.437007 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 12:51:16.443565 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:51:16.447205 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 12:51:16.457144 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 12:51:16.463643 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 12:51:16.470024 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 12:51:16.480535 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 12:51:16.483690 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:51:16.490234 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 12:51:16.496767 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 12:51:16.503849 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:51:16.507042 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 12:51:16.516960 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 12:51:16.523326 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 12:51:16.530026 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 12:51:16.539941 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 12:51:16.546714 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 12:51:16.553368 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 12:51:16.563032 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 12:51:16.569398 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 12:51:16.575932 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:51:16.579231 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 12:51:16.589027 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 12:51:16.595671 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 12:51:16.605960 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 12:51:16.609379 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 12:51:16.619100 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 12:51:16.622445 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 12:51:16.631940 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 12:51:16.638807 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 12:51:16.645121 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:51:16.648924 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 12:51:16.658450 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 12:51:16.661709 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:51:16.665385 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 12:51:16.672119 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:51:16.674645 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 12:51:16.681780 LPC: Trying to open IO window from 800 size 1ff
1346 12:51:16.687944 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 12:51:16.698486 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 12:51:16.704503 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 12:51:16.714524 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 12:51:16.717854 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 12:51:16.724480 Root Device assign_resources, bus 0 link: 0
1352 12:51:16.724689 Done setting resources.
1353 12:51:16.731139 Show resources in subtree (Root Device)...After assigning values.
1354 12:51:16.737729 Root Device child on link 0 CPU_CLUSTER: 0
1355 12:51:16.740885 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 12:51:16.741034 APIC: 00
1357 12:51:16.744597 APIC: 05
1358 12:51:16.744762 APIC: 07
1359 12:51:16.744844 APIC: 01
1360 12:51:16.747893 APIC: 04
1361 12:51:16.748026 APIC: 06
1362 12:51:16.751052 APIC: 03
1363 12:51:16.751222 APIC: 02
1364 12:51:16.754260 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 12:51:16.764299 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 12:51:16.777580 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 12:51:16.777753 PCI: 00:00.0
1368 12:51:16.787635 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 12:51:16.797503 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 12:51:16.806834 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 12:51:16.813986 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 12:51:16.823318 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 12:51:16.833103 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 12:51:16.843051 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 12:51:16.853502 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 12:51:16.863063 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 12:51:16.869680 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 12:51:16.879477 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 12:51:16.889380 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 12:51:16.899271 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 12:51:16.909113 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 12:51:16.918848 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 12:51:16.929026 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 12:51:16.929231 PCI: 00:02.0
1385 12:51:16.938991 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 12:51:16.951887 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 12:51:16.958409 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 12:51:16.961690 PCI: 00:04.0
1389 12:51:16.961879 PCI: 00:08.0
1390 12:51:16.972046 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 12:51:16.975227 PCI: 00:12.0
1392 12:51:16.984669 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 12:51:16.987852 PCI: 00:14.0 child on link 0 USB0 port 0
1394 12:51:17.001217 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 12:51:17.004475 USB0 port 0 child on link 0 USB2 port 0
1396 12:51:17.004658 USB2 port 0
1397 12:51:17.007835 USB2 port 1
1398 12:51:17.011282 USB2 port 2
1399 12:51:17.011455 USB2 port 3
1400 12:51:17.014512 USB2 port 5
1401 12:51:17.014674 USB2 port 6
1402 12:51:17.017987 USB2 port 9
1403 12:51:17.018160 USB3 port 0
1404 12:51:17.020739 USB3 port 1
1405 12:51:17.020922 USB3 port 2
1406 12:51:17.024221 USB3 port 3
1407 12:51:17.024388 USB3 port 4
1408 12:51:17.027377 PCI: 00:14.2
1409 12:51:17.037560 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 12:51:17.047170 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 12:51:17.050475 PCI: 00:14.3
1412 12:51:17.060763 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 12:51:17.064000 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 12:51:17.073846 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 12:51:17.077255 I2C: 01:15
1416 12:51:17.080253 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 12:51:17.090146 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 12:51:17.090312 I2C: 02:5d
1419 12:51:17.093933 GENERIC: 0.0
1420 12:51:17.094074 PCI: 00:16.0
1421 12:51:17.106668 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 12:51:17.106835 PCI: 00:17.0
1423 12:51:17.116702 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 12:51:17.127050 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 12:51:17.136736 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 12:51:17.146490 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 12:51:17.153366 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 12:51:17.166348 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 12:51:17.169665 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 12:51:17.179406 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 12:51:17.179568 I2C: 03:1a
1432 12:51:17.182733 I2C: 03:38
1433 12:51:17.182833 I2C: 03:39
1434 12:51:17.185946 I2C: 03:3a
1435 12:51:17.186043 I2C: 03:3b
1436 12:51:17.192805 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 12:51:17.199253 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 12:51:17.213008 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 12:51:17.222817 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 12:51:17.222996 PCI: 01:00.0
1441 12:51:17.232954 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 12:51:17.235639 PCI: 00:1e.0
1443 12:51:17.246030 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 12:51:17.255781 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 12:51:17.262455 PCI: 00:1e.2 child on link 0 SPI: 00
1446 12:51:17.271958 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 12:51:17.272122 SPI: 00
1448 12:51:17.275357 PCI: 00:1e.3 child on link 0 SPI: 01
1449 12:51:17.285359 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 12:51:17.288546 SPI: 01
1451 12:51:17.291683 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 12:51:17.302229 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 12:51:17.308784 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 12:51:17.311928 PNP: 0c09.0
1455 12:51:17.321851 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 12:51:17.322042 PCI: 00:1f.3
1457 12:51:17.331901 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 12:51:17.341558 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 12:51:17.344991 PCI: 00:1f.4
1460 12:51:17.354830 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 12:51:17.364408 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 12:51:17.364576 PCI: 00:1f.5
1463 12:51:17.374706 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 12:51:17.378129 Done allocating resources.
1465 12:51:17.384065 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 12:51:17.387494 Enabling resources...
1467 12:51:17.390780 PCI: 00:00.0 subsystem <- 8086/9b61
1468 12:51:17.394529 PCI: 00:00.0 cmd <- 06
1469 12:51:17.397674 PCI: 00:02.0 subsystem <- 8086/9b41
1470 12:51:17.400876 PCI: 00:02.0 cmd <- 03
1471 12:51:17.400979 PCI: 00:08.0 cmd <- 06
1472 12:51:17.407522 PCI: 00:12.0 subsystem <- 8086/02f9
1473 12:51:17.407631 PCI: 00:12.0 cmd <- 02
1474 12:51:17.411238 PCI: 00:14.0 subsystem <- 8086/02ed
1475 12:51:17.414546 PCI: 00:14.0 cmd <- 02
1476 12:51:17.417201 PCI: 00:14.2 cmd <- 02
1477 12:51:17.420498 PCI: 00:14.3 subsystem <- 8086/02f0
1478 12:51:17.424427 PCI: 00:14.3 cmd <- 02
1479 12:51:17.427490 PCI: 00:15.0 subsystem <- 8086/02e8
1480 12:51:17.430574 PCI: 00:15.0 cmd <- 02
1481 12:51:17.434039 PCI: 00:15.1 subsystem <- 8086/02e9
1482 12:51:17.437539 PCI: 00:15.1 cmd <- 02
1483 12:51:17.440837 PCI: 00:16.0 subsystem <- 8086/02e0
1484 12:51:17.443581 PCI: 00:16.0 cmd <- 02
1485 12:51:17.447106 PCI: 00:17.0 subsystem <- 8086/02d3
1486 12:51:17.447204 PCI: 00:17.0 cmd <- 03
1487 12:51:17.454143 PCI: 00:19.0 subsystem <- 8086/02c5
1488 12:51:17.454256 PCI: 00:19.0 cmd <- 02
1489 12:51:17.457477 PCI: 00:1d.0 bridge ctrl <- 0013
1490 12:51:17.460834 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 12:51:17.464293 PCI: 00:1d.0 cmd <- 06
1492 12:51:17.467623 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 12:51:17.470458 PCI: 00:1e.0 cmd <- 06
1494 12:51:17.473873 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 12:51:17.477388 PCI: 00:1e.2 cmd <- 06
1496 12:51:17.480909 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 12:51:17.483632 PCI: 00:1e.3 cmd <- 02
1498 12:51:17.486997 PCI: 00:1f.0 subsystem <- 8086/0284
1499 12:51:17.490342 PCI: 00:1f.0 cmd <- 407
1500 12:51:17.493628 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 12:51:17.497027 PCI: 00:1f.3 cmd <- 02
1502 12:51:17.500230 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 12:51:17.503361 PCI: 00:1f.4 cmd <- 03
1504 12:51:17.506622 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 12:51:17.506743 PCI: 00:1f.5 cmd <- 406
1506 12:51:17.517460 PCI: 01:00.0 cmd <- 02
1507 12:51:17.522584 done.
1508 12:51:17.536084 ME: Version: 14.0.39.1367
1509 12:51:17.542182 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1510 12:51:17.545531 Initializing devices...
1511 12:51:17.545673 Root Device init ...
1512 12:51:17.552422 Chrome EC: Set SMI mask to 0x0000000000000000
1513 12:51:17.555904 Chrome EC: clear events_b mask to 0x0000000000000000
1514 12:51:17.562561 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 12:51:17.568707 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 12:51:17.575559 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 12:51:17.579067 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 12:51:17.581824 Root Device init finished in 35188 usecs
1519 12:51:17.586068 CPU_CLUSTER: 0 init ...
1520 12:51:17.592192 CPU_CLUSTER: 0 init finished in 2449 usecs
1521 12:51:17.596917 PCI: 00:00.0 init ...
1522 12:51:17.599622 CPU TDP: 15 Watts
1523 12:51:17.602941 CPU PL2 = 64 Watts
1524 12:51:17.606401 PCI: 00:00.0 init finished in 7083 usecs
1525 12:51:17.609671 PCI: 00:02.0 init ...
1526 12:51:17.613175 PCI: 00:02.0 init finished in 2254 usecs
1527 12:51:17.616422 PCI: 00:08.0 init ...
1528 12:51:17.619484 PCI: 00:08.0 init finished in 2253 usecs
1529 12:51:17.623287 PCI: 00:12.0 init ...
1530 12:51:17.626459 PCI: 00:12.0 init finished in 2252 usecs
1531 12:51:17.629776 PCI: 00:14.0 init ...
1532 12:51:17.633122 PCI: 00:14.0 init finished in 2253 usecs
1533 12:51:17.636408 PCI: 00:14.2 init ...
1534 12:51:17.639679 PCI: 00:14.2 init finished in 2254 usecs
1535 12:51:17.642909 PCI: 00:14.3 init ...
1536 12:51:17.646135 PCI: 00:14.3 init finished in 2273 usecs
1537 12:51:17.649545 PCI: 00:15.0 init ...
1538 12:51:17.652842 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 12:51:17.655666 PCI: 00:15.0 init finished in 5979 usecs
1540 12:51:17.659633 PCI: 00:15.1 init ...
1541 12:51:17.663022 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 12:51:17.669092 PCI: 00:15.1 init finished in 5977 usecs
1543 12:51:17.669211 PCI: 00:16.0 init ...
1544 12:51:17.675884 PCI: 00:16.0 init finished in 2253 usecs
1545 12:51:17.679351 PCI: 00:19.0 init ...
1546 12:51:17.682838 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 12:51:17.685520 PCI: 00:19.0 init finished in 5978 usecs
1548 12:51:17.688965 PCI: 00:1d.0 init ...
1549 12:51:17.692431 Initializing PCH PCIe bridge.
1550 12:51:17.695866 PCI: 00:1d.0 init finished in 5278 usecs
1551 12:51:17.698671 PCI: 00:1f.0 init ...
1552 12:51:17.702067 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 12:51:17.708867 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 12:51:17.709000 IOAPIC: ID = 0x02
1555 12:51:17.712330 IOAPIC: Dumping registers
1556 12:51:17.715722 reg 0x0000: 0x02000000
1557 12:51:17.718943 reg 0x0001: 0x00770020
1558 12:51:17.719041 reg 0x0002: 0x00000000
1559 12:51:17.725412 PCI: 00:1f.0 init finished in 23535 usecs
1560 12:51:17.728564 PCI: 00:1f.4 init ...
1561 12:51:17.731716 PCI: 00:1f.4 init finished in 2263 usecs
1562 12:51:17.742967 PCI: 01:00.0 init ...
1563 12:51:17.745904 PCI: 01:00.0 init finished in 2244 usecs
1564 12:51:17.750473 PNP: 0c09.0 init ...
1565 12:51:17.753427 Google Chrome EC uptime: 11.047 seconds
1566 12:51:17.760291 Google Chrome AP resets since EC boot: 0
1567 12:51:17.763716 Google Chrome most recent AP reset causes:
1568 12:51:17.769905 Google Chrome EC reset flags at last EC boot: reset-pin
1569 12:51:17.773196 PNP: 0c09.0 init finished in 20580 usecs
1570 12:51:17.776622 Devices initialized
1571 12:51:17.780034 Show all devs... After init.
1572 12:51:17.780197 Root Device: enabled 1
1573 12:51:17.783554 CPU_CLUSTER: 0: enabled 1
1574 12:51:17.787013 DOMAIN: 0000: enabled 1
1575 12:51:17.787179 APIC: 00: enabled 1
1576 12:51:17.789744 PCI: 00:00.0: enabled 1
1577 12:51:17.793213 PCI: 00:02.0: enabled 1
1578 12:51:17.796636 PCI: 00:04.0: enabled 0
1579 12:51:17.796785 PCI: 00:05.0: enabled 0
1580 12:51:17.799964 PCI: 00:12.0: enabled 1
1581 12:51:17.803443 PCI: 00:12.5: enabled 0
1582 12:51:17.806119 PCI: 00:12.6: enabled 0
1583 12:51:17.806224 PCI: 00:14.0: enabled 1
1584 12:51:17.809484 PCI: 00:14.1: enabled 0
1585 12:51:17.812976 PCI: 00:14.3: enabled 1
1586 12:51:17.813097 PCI: 00:14.5: enabled 0
1587 12:51:17.816424 PCI: 00:15.0: enabled 1
1588 12:51:17.819862 PCI: 00:15.1: enabled 1
1589 12:51:17.822573 PCI: 00:15.2: enabled 0
1590 12:51:17.822713 PCI: 00:15.3: enabled 0
1591 12:51:17.825893 PCI: 00:16.0: enabled 1
1592 12:51:17.829124 PCI: 00:16.1: enabled 0
1593 12:51:17.832988 PCI: 00:16.2: enabled 0
1594 12:51:17.833120 PCI: 00:16.3: enabled 0
1595 12:51:17.836191 PCI: 00:16.4: enabled 0
1596 12:51:17.839327 PCI: 00:16.5: enabled 0
1597 12:51:17.842488 PCI: 00:17.0: enabled 1
1598 12:51:17.842627 PCI: 00:19.0: enabled 1
1599 12:51:17.845659 PCI: 00:19.1: enabled 0
1600 12:51:17.849498 PCI: 00:19.2: enabled 0
1601 12:51:17.852800 PCI: 00:1a.0: enabled 0
1602 12:51:17.852938 PCI: 00:1c.0: enabled 0
1603 12:51:17.856018 PCI: 00:1c.1: enabled 0
1604 12:51:17.859208 PCI: 00:1c.2: enabled 0
1605 12:51:17.859342 PCI: 00:1c.3: enabled 0
1606 12:51:17.862481 PCI: 00:1c.4: enabled 0
1607 12:51:17.865875 PCI: 00:1c.5: enabled 0
1608 12:51:17.869335 PCI: 00:1c.6: enabled 0
1609 12:51:17.869473 PCI: 00:1c.7: enabled 0
1610 12:51:17.872124 PCI: 00:1d.0: enabled 1
1611 12:51:17.875514 PCI: 00:1d.1: enabled 0
1612 12:51:17.878880 PCI: 00:1d.2: enabled 0
1613 12:51:17.879027 PCI: 00:1d.3: enabled 0
1614 12:51:17.882270 PCI: 00:1d.4: enabled 0
1615 12:51:17.885648 PCI: 00:1d.5: enabled 0
1616 12:51:17.888996 PCI: 00:1e.0: enabled 1
1617 12:51:17.889151 PCI: 00:1e.1: enabled 0
1618 12:51:17.892296 PCI: 00:1e.2: enabled 1
1619 12:51:17.895755 PCI: 00:1e.3: enabled 1
1620 12:51:17.899234 PCI: 00:1f.0: enabled 1
1621 12:51:17.899339 PCI: 00:1f.1: enabled 0
1622 12:51:17.901842 PCI: 00:1f.2: enabled 0
1623 12:51:17.905189 PCI: 00:1f.3: enabled 1
1624 12:51:17.905296 PCI: 00:1f.4: enabled 1
1625 12:51:17.908653 PCI: 00:1f.5: enabled 1
1626 12:51:17.912107 PCI: 00:1f.6: enabled 0
1627 12:51:17.915486 USB0 port 0: enabled 1
1628 12:51:17.915593 I2C: 01:15: enabled 1
1629 12:51:17.918937 I2C: 02:5d: enabled 1
1630 12:51:17.922310 GENERIC: 0.0: enabled 1
1631 12:51:17.922417 I2C: 03:1a: enabled 1
1632 12:51:17.925640 I2C: 03:38: enabled 1
1633 12:51:17.928314 I2C: 03:39: enabled 1
1634 12:51:17.928422 I2C: 03:3a: enabled 1
1635 12:51:17.932119 I2C: 03:3b: enabled 1
1636 12:51:17.935353 PCI: 00:00.0: enabled 1
1637 12:51:17.935462 SPI: 00: enabled 1
1638 12:51:17.938454 SPI: 01: enabled 1
1639 12:51:17.941632 PNP: 0c09.0: enabled 1
1640 12:51:17.941741 USB2 port 0: enabled 1
1641 12:51:17.944935 USB2 port 1: enabled 1
1642 12:51:17.948152 USB2 port 2: enabled 0
1643 12:51:17.952051 USB2 port 3: enabled 0
1644 12:51:17.952161 USB2 port 5: enabled 0
1645 12:51:17.955318 USB2 port 6: enabled 1
1646 12:51:17.958460 USB2 port 9: enabled 1
1647 12:51:17.958562 USB3 port 0: enabled 1
1648 12:51:17.961781 USB3 port 1: enabled 1
1649 12:51:17.965137 USB3 port 2: enabled 1
1650 12:51:17.968321 USB3 port 3: enabled 1
1651 12:51:17.968419 USB3 port 4: enabled 0
1652 12:51:17.971618 APIC: 05: enabled 1
1653 12:51:17.971716 APIC: 07: enabled 1
1654 12:51:17.975001 APIC: 01: enabled 1
1655 12:51:17.978506 APIC: 04: enabled 1
1656 12:51:17.978603 APIC: 06: enabled 1
1657 12:51:17.981271 APIC: 03: enabled 1
1658 12:51:17.984775 APIC: 02: enabled 1
1659 12:51:17.984872 PCI: 00:08.0: enabled 1
1660 12:51:17.988196 PCI: 00:14.2: enabled 1
1661 12:51:17.991601 PCI: 01:00.0: enabled 1
1662 12:51:17.994995 Disabling ACPI via APMC:
1663 12:51:17.998380 done.
1664 12:51:18.001905 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 12:51:18.005245 ELOG: NV offset 0xaf0000 size 0x4000
1666 12:51:18.011980 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 12:51:18.018199 ELOG: Event(17) added with size 13 at 2023-03-22 12:51:16 UTC
1668 12:51:18.025167 ELOG: Event(92) added with size 9 at 2023-03-22 12:51:16 UTC
1669 12:51:18.032006 ELOG: Event(93) added with size 9 at 2023-03-22 12:51:16 UTC
1670 12:51:18.038104 ELOG: Event(9A) added with size 9 at 2023-03-22 12:51:17 UTC
1671 12:51:18.045124 ELOG: Event(9E) added with size 10 at 2023-03-22 12:51:17 UTC
1672 12:51:18.051528 ELOG: Event(9F) added with size 14 at 2023-03-22 12:51:17 UTC
1673 12:51:18.054808 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1674 12:51:18.062380 ELOG: Event(A1) added with size 10 at 2023-03-22 12:51:17 UTC
1675 12:51:18.072202 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 12:51:18.078755 ELOG: Event(A0) added with size 9 at 2023-03-22 12:51:17 UTC
1677 12:51:18.082198 elog_add_boot_reason: Logged dev mode boot
1678 12:51:18.084988 Finalize devices...
1679 12:51:18.085086 PCI: 00:17.0 final
1680 12:51:18.088430 Devices finalized
1681 12:51:18.091939 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 12:51:18.098651 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 12:51:18.101955 ME: HFSTS1 : 0x90000245
1684 12:51:18.105310 ME: HFSTS2 : 0x3B850126
1685 12:51:18.111971 ME: HFSTS3 : 0x00000020
1686 12:51:18.114659 ME: HFSTS4 : 0x00004800
1687 12:51:18.118042 ME: HFSTS5 : 0x00000000
1688 12:51:18.121608 ME: HFSTS6 : 0x40400006
1689 12:51:18.124983 ME: Manufacturing Mode : NO
1690 12:51:18.128423 ME: FW Partition Table : OK
1691 12:51:18.131281 ME: Bringup Loader Failure : NO
1692 12:51:18.134707 ME: Firmware Init Complete : YES
1693 12:51:18.138203 ME: Boot Options Present : NO
1694 12:51:18.141584 ME: Update In Progress : NO
1695 12:51:18.144976 ME: D0i3 Support : YES
1696 12:51:18.148200 ME: Low Power State Enabled : NO
1697 12:51:18.151478 ME: CPU Replaced : NO
1698 12:51:18.154688 ME: CPU Replacement Valid : YES
1699 12:51:18.157809 ME: Current Working State : 5
1700 12:51:18.161343 ME: Current Operation State : 1
1701 12:51:18.164491 ME: Current Operation Mode : 0
1702 12:51:18.167676 ME: Error Code : 0
1703 12:51:18.171357 ME: CPU Debug Disabled : YES
1704 12:51:18.174623 ME: TXT Support : NO
1705 12:51:18.180949 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 12:51:18.187647 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 12:51:18.187760 CBFS @ c08000 size 3f8000
1708 12:51:18.194443 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 12:51:18.197754 CBFS: Locating 'fallback/dsdt.aml'
1710 12:51:18.201265 CBFS: Found @ offset 10bb80 size 3fa5
1711 12:51:18.207331 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 12:51:18.210702 CBFS @ c08000 size 3f8000
1713 12:51:18.214054 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 12:51:18.217457 CBFS: Locating 'fallback/slic'
1715 12:51:18.222972 CBFS: 'fallback/slic' not found.
1716 12:51:18.229704 ACPI: Writing ACPI tables at 99b3e000.
1717 12:51:18.229817 ACPI: * FACS
1718 12:51:18.232484 ACPI: * DSDT
1719 12:51:18.235923 Ramoops buffer: 0x100000@0x99a3d000.
1720 12:51:18.239335 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 12:51:18.245505 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 12:51:18.248933 Google Chrome EC: version:
1723 12:51:18.252307 ro: helios_v2.0.2659-56403530b
1724 12:51:18.255729 rw: helios_v2.0.2849-c41de27e7d
1725 12:51:18.255830 running image: 1
1726 12:51:18.259732 ACPI: * FADT
1727 12:51:18.259831 SCI is IRQ9
1728 12:51:18.266778 ACPI: added table 1/32, length now 40
1729 12:51:18.266882 ACPI: * SSDT
1730 12:51:18.269937 Found 1 CPU(s) with 8 core(s) each.
1731 12:51:18.273035 Error: Could not locate 'wifi_sar' in VPD.
1732 12:51:18.280100 Checking CBFS for default SAR values
1733 12:51:18.283175 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 12:51:18.286351 CBFS @ c08000 size 3f8000
1735 12:51:18.293378 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 12:51:18.296640 CBFS: Locating 'wifi_sar_defaults.hex'
1737 12:51:18.300041 CBFS: Found @ offset 5fac0 size 77
1738 12:51:18.303269 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 12:51:18.310036 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 12:51:18.312759 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 12:51:18.319484 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 12:51:18.322883 failed to find key in VPD: dsm_calib_r0_0
1743 12:51:18.332613 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 12:51:18.335947 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 12:51:18.339460 failed to find key in VPD: dsm_calib_r0_1
1746 12:51:18.349785 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 12:51:18.356049 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 12:51:18.359428 failed to find key in VPD: dsm_calib_r0_2
1749 12:51:18.369339 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 12:51:18.372703 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 12:51:18.379160 failed to find key in VPD: dsm_calib_r0_3
1752 12:51:18.385401 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 12:51:18.392429 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 12:51:18.395616 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 12:51:18.402092 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 12:51:18.405902 EC returned error result code 1
1757 12:51:18.409396 EC returned error result code 1
1758 12:51:18.412835 EC returned error result code 1
1759 12:51:18.415507 PS2K: Bad resp from EC. Vivaldi disabled!
1760 12:51:18.422459 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 12:51:18.429278 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 12:51:18.432734 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 12:51:18.438869 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 12:51:18.442273 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 12:51:18.449142 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 12:51:18.455239 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 12:51:18.462045 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 12:51:18.465521 ACPI: added table 2/32, length now 44
1769 12:51:18.465634 ACPI: * MCFG
1770 12:51:18.472138 ACPI: added table 3/32, length now 48
1771 12:51:18.472280 ACPI: * TPM2
1772 12:51:18.475490 TPM2 log created at 99a2d000
1773 12:51:18.478279 ACPI: added table 4/32, length now 52
1774 12:51:18.482194 ACPI: * MADT
1775 12:51:18.482298 SCI is IRQ9
1776 12:51:18.485409 ACPI: added table 5/32, length now 56
1777 12:51:18.488667 current = 99b43ac0
1778 12:51:18.488770 ACPI: * DMAR
1779 12:51:18.491840 ACPI: added table 6/32, length now 60
1780 12:51:18.495102 ACPI: * IGD OpRegion
1781 12:51:18.498332 GMA: Found VBT in CBFS
1782 12:51:18.501627 GMA: Found valid VBT in CBFS
1783 12:51:18.504904 ACPI: added table 7/32, length now 64
1784 12:51:18.505054 ACPI: * HPET
1785 12:51:18.508140 ACPI: added table 8/32, length now 68
1786 12:51:18.511968 ACPI: done.
1787 12:51:18.515200 ACPI tables: 31744 bytes.
1788 12:51:18.518322 smbios_write_tables: 99a2c000
1789 12:51:18.521782 EC returned error result code 3
1790 12:51:18.524497 Couldn't obtain OEM name from CBI
1791 12:51:18.528027 Create SMBIOS type 17
1792 12:51:18.531465 PCI: 00:00.0 (Intel Cannonlake)
1793 12:51:18.531571 PCI: 00:14.3 (Intel WiFi)
1794 12:51:18.534280 SMBIOS tables: 939 bytes.
1795 12:51:18.537777 Writing table forward entry at 0x00000500
1796 12:51:18.544818 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 12:51:18.548203 Writing coreboot table at 0x99b62000
1798 12:51:18.554330 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 12:51:18.561183 1. 0000000000001000-000000000009ffff: RAM
1800 12:51:18.564634 2. 00000000000a0000-00000000000fffff: RESERVED
1801 12:51:18.567432 3. 0000000000100000-0000000099a2bfff: RAM
1802 12:51:18.574076 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 12:51:18.577454 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 12:51:18.584167 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 12:51:18.590745 7. 000000009a000000-000000009f7fffff: RESERVED
1806 12:51:18.593912 8. 00000000e0000000-00000000efffffff: RESERVED
1807 12:51:18.601007 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 12:51:18.604301 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 12:51:18.607640 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 12:51:18.614125 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 12:51:18.617421 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 12:51:18.623833 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 12:51:18.626981 15. 0000000100000000-000000045e7fffff: RAM
1814 12:51:18.630473 Graphics framebuffer located at 0xc0000000
1815 12:51:18.633949 Passing 5 GPIOs to payload:
1816 12:51:18.640126 NAME | PORT | POLARITY | VALUE
1817 12:51:18.643616 write protect | undefined | high | low
1818 12:51:18.650445 lid | undefined | high | high
1819 12:51:18.657221 power | undefined | high | low
1820 12:51:18.660062 oprom | undefined | high | low
1821 12:51:18.666918 EC in RW | 0x000000cb | high | low
1822 12:51:18.667024 Board ID: 4
1823 12:51:18.673139 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 12:51:18.676457 CBFS @ c08000 size 3f8000
1825 12:51:18.679919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 12:51:18.686908 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 12:51:18.690187 coreboot table: 1492 bytes.
1828 12:51:18.693483 IMD ROOT 0. 99fff000 00001000
1829 12:51:18.696655 IMD SMALL 1. 99ffe000 00001000
1830 12:51:18.699818 FSP MEMORY 2. 99c4e000 003b0000
1831 12:51:18.702997 CONSOLE 3. 99c2e000 00020000
1832 12:51:18.706962 FMAP 4. 99c2d000 0000054e
1833 12:51:18.710091 TIME STAMP 5. 99c2c000 00000910
1834 12:51:18.713301 VBOOT WORK 6. 99c18000 00014000
1835 12:51:18.716382 MRC DATA 7. 99c16000 00001958
1836 12:51:18.720152 ROMSTG STCK 8. 99c15000 00001000
1837 12:51:18.723341 AFTER CAR 9. 99c0b000 0000a000
1838 12:51:18.726538 RAMSTAGE 10. 99baf000 0005c000
1839 12:51:18.729639 REFCODE 11. 99b7a000 00035000
1840 12:51:18.733404 SMM BACKUP 12. 99b6a000 00010000
1841 12:51:18.736214 COREBOOT 13. 99b62000 00008000
1842 12:51:18.739521 ACPI 14. 99b3e000 00024000
1843 12:51:18.743011 ACPI GNVS 15. 99b3d000 00001000
1844 12:51:18.746475 RAMOOPS 16. 99a3d000 00100000
1845 12:51:18.749845 TPM2 TCGLOG17. 99a2d000 00010000
1846 12:51:18.753274 SMBIOS 18. 99a2c000 00000800
1847 12:51:18.756774 IMD small region:
1848 12:51:18.759497 IMD ROOT 0. 99ffec00 00000400
1849 12:51:18.762766 FSP RUNTIME 1. 99ffebe0 00000004
1850 12:51:18.766164 EC HOSTEVENT 2. 99ffebc0 00000008
1851 12:51:18.769535 POWER STATE 3. 99ffeb80 00000040
1852 12:51:18.772937 ROMSTAGE 4. 99ffeb60 00000004
1853 12:51:18.776348 MEM INFO 5. 99ffe9a0 000001b9
1854 12:51:18.779619 VPD 6. 99ffe920 0000006c
1855 12:51:18.783050 MTRR: Physical address space:
1856 12:51:18.789300 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 12:51:18.796150 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 12:51:18.802882 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 12:51:18.806118 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 12:51:18.812675 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 12:51:18.819103 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 12:51:18.826175 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 12:51:18.829207 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 12:51:18.835681 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 12:51:18.839417 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 12:51:18.842150 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 12:51:18.845637 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 12:51:18.852624 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 12:51:18.855392 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 12:51:18.858787 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 12:51:18.862171 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 12:51:18.868945 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 12:51:18.872360 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 12:51:18.875740 call enable_fixed_mtrr()
1875 12:51:18.879060 CPU physical address size: 39 bits
1876 12:51:18.882508 MTRR: default type WB/UC MTRR counts: 6/8.
1877 12:51:18.885175 MTRR: WB selected as default type.
1878 12:51:18.892072 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 12:51:18.898833 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 12:51:18.904938 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 12:51:18.911760 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 12:51:18.918376 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 12:51:18.921622 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 12:51:18.929391 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 12:51:18.932486 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:51:18.935550 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:51:18.942599 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:51:18.945754 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:51:18.949249 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:51:18.952005 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:51:18.955430 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:51:18.962273 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:51:18.965672 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:51:18.968857 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:51:18.968973
1896 12:51:18.971606 MTRR check
1897 12:51:18.971714 Fixed MTRRs : Enabled
1898 12:51:18.975066 Variable MTRRs: Enabled
1899 12:51:18.975171
1900 12:51:18.978439 call enable_fixed_mtrr()
1901 12:51:18.985260 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 12:51:18.988730 CPU physical address size: 39 bits
1903 12:51:18.992092 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 12:51:18.998310 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:51:19.001711 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:51:19.004501 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:51:19.007968 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:51:19.014860 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:51:19.018122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:51:19.021583 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:51:19.024737 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:51:19.031141 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:51:19.034430 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:51:19.037780 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:51:19.041029 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 12:51:19.044094 call enable_fixed_mtrr()
1917 12:51:19.047293 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 12:51:19.053755 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 12:51:19.057168 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 12:51:19.060636 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 12:51:19.064045 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 12:51:19.070913 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 12:51:19.073724 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 12:51:19.077202 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 12:51:19.080450 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 12:51:19.087135 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 12:51:19.090753 CPU physical address size: 39 bits
1928 12:51:19.093628 call enable_fixed_mtrr()
1929 12:51:19.097002 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:51:19.100404 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 12:51:19.103888 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 12:51:19.110060 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 12:51:19.113495 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 12:51:19.116901 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 12:51:19.120268 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 12:51:19.123664 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 12:51:19.130167 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 12:51:19.133389 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 12:51:19.136506 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 12:51:19.139803 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 12:51:19.146202 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 12:51:19.150058 call enable_fixed_mtrr()
1943 12:51:19.152763 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 12:51:19.156500 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 12:51:19.159633 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 12:51:19.166146 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 12:51:19.169610 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 12:51:19.172967 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 12:51:19.176500 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 12:51:19.179924 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 12:51:19.185949 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 12:51:19.189284 CPU physical address size: 39 bits
1953 12:51:19.192696 call enable_fixed_mtrr()
1954 12:51:19.196181 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:51:19.199470 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 12:51:19.202729 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 12:51:19.209571 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 12:51:19.212333 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 12:51:19.215814 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 12:51:19.219251 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 12:51:19.226144 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 12:51:19.228825 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 12:51:19.232249 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 12:51:19.235492 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 12:51:19.242562 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 12:51:19.242706 call enable_fixed_mtrr()
1967 12:51:19.249506 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 12:51:19.252623 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 12:51:19.255804 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 12:51:19.258984 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 12:51:19.265721 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 12:51:19.268854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 12:51:19.272093 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 12:51:19.275406 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 12:51:19.278808 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 12:51:19.285569 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 12:51:19.288852 CPU physical address size: 39 bits
1978 12:51:19.292356 call enable_fixed_mtrr()
1979 12:51:19.295171 CPU physical address size: 39 bits
1980 12:51:19.298545 CPU physical address size: 39 bits
1981 12:51:19.301930 CBFS @ c08000 size 3f8000
1982 12:51:19.305412 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1983 12:51:19.308674 CBFS: Locating 'fallback/payload'
1984 12:51:19.312153 CPU physical address size: 39 bits
1985 12:51:19.318243 CBFS: Found @ offset 1c96c0 size 3f798
1986 12:51:19.321667 Checking segment from ROM address 0xffdd16f8
1987 12:51:19.325080 Checking segment from ROM address 0xffdd1714
1988 12:51:19.331917 Loading segment from ROM address 0xffdd16f8
1989 12:51:19.332066 code (compression=0)
1990 12:51:19.341927 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 12:51:19.351772 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 12:51:19.351943 it's not compressed!
1993 12:51:19.444522 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 12:51:19.451258 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 12:51:19.454568 Loading segment from ROM address 0xffdd1714
1996 12:51:19.457809 Entry Point 0x30000000
1997 12:51:19.461056 Loaded segments
1998 12:51:19.466810 Finalizing chipset.
1999 12:51:19.469881 Finalizing SMM.
2000 12:51:19.473138 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 12:51:19.476319 mp_park_aps done after 0 msecs.
2002 12:51:19.482855 Jumping to boot code at 30000000(99b62000)
2003 12:51:19.489837 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 12:51:19.490000
2005 12:51:19.490120
2006 12:51:19.490231
2007 12:51:19.493234 Starting depthcharge on Helios...
2008 12:51:19.493368
2009 12:51:19.493816 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 12:51:19.493984 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 12:51:19.494121 Setting prompt string to ['hatch:']
2012 12:51:19.494258 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 12:51:19.502787 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 12:51:19.502940
2015 12:51:19.509613 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 12:51:19.509757
2017 12:51:19.516267 board_setup: Info: eMMC controller not present; skipping
2018 12:51:19.516427
2019 12:51:19.519742 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 12:51:19.519875
2021 12:51:19.526036 board_setup: Info: SDHCI controller not present; skipping
2022 12:51:19.526188
2023 12:51:19.532901 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 12:51:19.533052
2025 12:51:19.533171 Wipe memory regions:
2026 12:51:19.533285
2027 12:51:19.535697 [0x00000000001000, 0x000000000a0000)
2028 12:51:19.535828
2029 12:51:19.542298 [0x00000000100000, 0x00000030000000)
2030 12:51:19.606207
2031 12:51:19.610162 [0x00000030657430, 0x00000099a2c000)
2032 12:51:19.756148
2033 12:51:19.758687 [0x00000100000000, 0x0000045e800000)
2034 12:51:21.215483
2035 12:51:21.215675 R8152: Initializing
2036 12:51:21.215794
2037 12:51:21.218685 Version 9 (ocp_data = 6010)
2038 12:51:21.222652
2039 12:51:21.222779 R8152: Done initializing
2040 12:51:21.222893
2041 12:51:21.225867 Adding net device
2042 12:51:21.709184
2043 12:51:21.709339 R8152: Initializing
2044 12:51:21.709424
2045 12:51:21.711888 Version 6 (ocp_data = 5c30)
2046 12:51:21.711976
2047 12:51:21.715371 R8152: Done initializing
2048 12:51:21.715463
2049 12:51:21.718724 net_add_device: Attemp to include the same device
2050 12:51:21.722237
2051 12:51:21.729257 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 12:51:21.729349
2053 12:51:21.729426
2054 12:51:21.729495
2055 12:51:21.729785 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 12:51:21.830634 hatch: tftpboot 192.168.201.1 9729650/tftp-deploy-3jr0kg4q/kernel/bzImage 9729650/tftp-deploy-3jr0kg4q/kernel/cmdline 9729650/tftp-deploy-3jr0kg4q/ramdisk/ramdisk.cpio.gz
2058 12:51:21.830824 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 12:51:21.830919 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 12:51:21.835949 tftpboot 192.168.201.1 9729650/tftp-deploy-3jr0kg4q/kernel/bzImoy-3jr0kg4q/kernel/cmdline 9729650/tftp-deploy-3jr0kg4q/ramdisk/ramdisk.cpio.gz
2061 12:51:21.836050
2062 12:51:21.836125 Waiting for link
2063 12:51:22.036425
2064 12:51:22.036600 done.
2065 12:51:22.036711
2066 12:51:22.036802 MAC: 00:24:32:50:1a:59
2067 12:51:22.036892
2068 12:51:22.040035 Sending DHCP discover... done.
2069 12:51:22.040179
2070 12:51:22.043380 Waiting for reply... done.
2071 12:51:22.043515
2072 12:51:22.046792 Sending DHCP request... done.
2073 12:51:22.046898
2074 12:51:22.049660 Waiting for reply... done.
2075 12:51:22.049759
2076 12:51:22.053165 My ip is 192.168.201.14
2077 12:51:22.053264
2078 12:51:22.056576 The DHCP server ip is 192.168.201.1
2079 12:51:22.056677
2080 12:51:22.059184 TFTP server IP predefined by user: 192.168.201.1
2081 12:51:22.059301
2082 12:51:22.065827 Bootfile predefined by user: 9729650/tftp-deploy-3jr0kg4q/kernel/bzImage
2083 12:51:22.065929
2084 12:51:22.069160 Sending tftp read request... done.
2085 12:51:22.072415
2086 12:51:22.075820 Waiting for the transfer...
2087 12:51:22.075922
2088 12:51:22.616701 00000000 ################################################################
2089 12:51:22.616862
2090 12:51:23.153345 00080000 ################################################################
2091 12:51:23.153497
2092 12:51:23.720436 00100000 ################################################################
2093 12:51:23.720592
2094 12:51:24.270671 00180000 ################################################################
2095 12:51:24.270832
2096 12:51:24.873922 00200000 ################################################################
2097 12:51:24.874081
2098 12:51:25.441745 00280000 ################################################################
2099 12:51:25.441897
2100 12:51:26.040183 00300000 ################################################################
2101 12:51:26.040647
2102 12:51:26.698693 00380000 ################################################################
2103 12:51:26.699248
2104 12:51:27.394195 00400000 ################################################################
2105 12:51:27.394347
2106 12:51:28.012609 00480000 ################################################################
2107 12:51:28.012770
2108 12:51:28.597402 00500000 ################################################################
2109 12:51:28.597555
2110 12:51:29.218186 00580000 ################################################################
2111 12:51:29.218348
2112 12:51:29.848095 00600000 ################################################################
2113 12:51:29.848688
2114 12:51:30.449399 00680000 ################################################################
2115 12:51:30.449558
2116 12:51:31.075196 00700000 ################################################################
2117 12:51:31.076050
2118 12:51:31.668259 00780000 ################################################################
2119 12:51:31.668415
2120 12:51:32.186987 00800000 ################################################################
2121 12:51:32.187150
2122 12:51:32.719430 00880000 ################################################################
2123 12:51:32.719578
2124 12:51:33.245601 00900000 ################################################################
2125 12:51:33.245766
2126 12:51:33.768943 00980000 ################################################################
2127 12:51:33.769112
2128 12:51:34.285020 00a00000 ################################################################
2129 12:51:34.285186
2130 12:51:34.805602 00a80000 ################################################################
2131 12:51:34.805755
2132 12:51:34.916896 00b00000 ############## done.
2133 12:51:34.917040
2134 12:51:34.920434 The bootfile was 11646080 bytes long.
2135 12:51:34.920548
2136 12:51:34.923288 Sending tftp read request... done.
2137 12:51:34.923375
2138 12:51:34.926710 Waiting for the transfer...
2139 12:51:34.926814
2140 12:51:35.444162 00000000 ################################################################
2141 12:51:35.444321
2142 12:51:35.963421 00080000 ################################################################
2143 12:51:35.963576
2144 12:51:36.495935 00100000 ################################################################
2145 12:51:36.496096
2146 12:51:37.011679 00180000 ################################################################
2147 12:51:37.011835
2148 12:51:37.530262 00200000 ################################################################
2149 12:51:37.530424
2150 12:51:38.063568 00280000 ################################################################
2151 12:51:38.063722
2152 12:51:38.625146 00300000 ################################################################
2153 12:51:38.625305
2154 12:51:39.146941 00380000 ################################################################
2155 12:51:39.147109
2156 12:51:39.672675 00400000 ################################################################
2157 12:51:39.672825
2158 12:51:40.190794 00480000 ################################################################
2159 12:51:40.190949
2160 12:51:40.709574 00500000 ################################################################
2161 12:51:40.709733
2162 12:51:41.246198 00580000 ################################################################
2163 12:51:41.246348
2164 12:51:41.368562 00600000 ############### done.
2165 12:51:41.368705
2166 12:51:41.371497 Sending tftp read request... done.
2167 12:51:41.371587
2168 12:51:41.375025 Waiting for the transfer...
2169 12:51:41.375129
2170 12:51:41.375203 00000000 # done.
2171 12:51:41.375274
2172 12:51:41.385020 Command line loaded dynamically from TFTP file: 9729650/tftp-deploy-3jr0kg4q/kernel/cmdline
2173 12:51:41.385122
2174 12:51:41.408048 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729650/extract-nfsrootfs-p9v8pmt9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2175 12:51:41.408168
2176 12:51:41.411524 ec_init(0): CrosEC protocol v3 supported (256, 256)
2177 12:51:41.417995
2178 12:51:41.421533 Shutting down all USB controllers.
2179 12:51:41.421631
2180 12:51:41.421708 Removing current net device
2181 12:51:41.425100
2182 12:51:41.425198 Finalizing coreboot
2183 12:51:41.425276
2184 12:51:41.431620 Exiting depthcharge with code 4 at timestamp: 29286856
2185 12:51:41.431718
2186 12:51:41.431795
2187 12:51:41.431868 Starting kernel ...
2188 12:51:41.431937
2189 12:51:41.432004
2190 12:51:41.432410 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2191 12:51:41.432519 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2192 12:51:41.432604 Setting prompt string to ['Linux version [0-9]']
2193 12:51:41.432700 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2194 12:51:41.432780 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2196 12:56:01.432786 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2198 12:56:01.433026 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2200 12:56:01.433214 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2203 12:56:01.433511 end: 2 depthcharge-action (duration 00:05:00) [common]
2205 12:56:01.433794 Cleaning after the job
2206 12:56:01.433902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/ramdisk
2207 12:56:01.434470 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/kernel
2208 12:56:01.435372 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/nfsrootfs
2209 12:56:01.488854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729650/tftp-deploy-3jr0kg4q/modules
2210 12:56:01.489371 start: 4.1 power-off (timeout 00:00:30) [common]
2211 12:56:01.489560 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2212 12:56:01.566098 >> Command sent successfully.
2213 12:56:01.568600 Returned 0 in 0 seconds
2214 12:56:01.669418 end: 4.1 power-off (duration 00:00:00) [common]
2216 12:56:01.669823 start: 4.2 read-feedback (timeout 00:10:00) [common]
2217 12:56:01.670108 Listened to connection for namespace 'common' for up to 1s
2219 12:56:01.670733 Listened to connection for namespace 'common' for up to 1s
2220 12:56:02.671180 Finalising connection for namespace 'common'
2221 12:56:02.671374 Disconnecting from shell: Finalise
2222 12:56:02.671465
2223 12:56:02.772227 end: 4.2 read-feedback (duration 00:00:01) [common]
2224 12:56:02.772406 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729650
2225 12:56:02.946243 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729650
2226 12:56:02.946470 JobError: Your job cannot terminate cleanly.