Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Warnings: 0
- Kernel Errors: 0
1 13:49:03.261867 lava-dispatcher, installed at version: 2023.05.1
2 13:49:03.262083 start: 0 validate
3 13:49:03.262276 Start time: 2023-07-11 13:49:03.262266+00:00 (UTC)
4 13:49:03.262445 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:49:03.262580 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:49:03.530663 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:49:03.530883 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.184-cip36-13-g8201543bbc8b6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:49:03.798689 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:49:03.799529 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.184-cip36-13-g8201543bbc8b6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:49:17.273307 validate duration: 14.01
12 13:49:17.273576 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:49:17.273672 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:49:17.273757 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:49:17.273881 Not decompressing ramdisk as can be used compressed.
16 13:49:17.273965 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:49:17.274029 saving as /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/ramdisk/rootfs.cpio.gz
18 13:49:17.274088 total size: 8418130 (8MB)
19 13:49:19.175773 progress 0% (0MB)
20 13:49:19.180654 progress 5% (0MB)
21 13:49:19.182902 progress 10% (0MB)
22 13:49:19.185180 progress 15% (1MB)
23 13:49:19.187444 progress 20% (1MB)
24 13:49:19.189656 progress 25% (2MB)
25 13:49:19.191877 progress 30% (2MB)
26 13:49:19.193911 progress 35% (2MB)
27 13:49:19.196578 progress 40% (3MB)
28 13:49:19.198799 progress 45% (3MB)
29 13:49:19.201172 progress 50% (4MB)
30 13:49:19.203458 progress 55% (4MB)
31 13:49:19.205632 progress 60% (4MB)
32 13:49:19.207739 progress 65% (5MB)
33 13:49:19.210024 progress 70% (5MB)
34 13:49:19.212196 progress 75% (6MB)
35 13:49:19.214352 progress 80% (6MB)
36 13:49:19.216630 progress 85% (6MB)
37 13:49:19.218893 progress 90% (7MB)
38 13:49:19.221178 progress 95% (7MB)
39 13:49:19.223255 progress 100% (8MB)
40 13:49:19.223501 8MB downloaded in 1.95s (4.12MB/s)
41 13:49:19.223650 end: 1.1.1 http-download (duration 00:00:02) [common]
43 13:49:19.223886 end: 1.1 download-retry (duration 00:00:02) [common]
44 13:49:19.223972 start: 1.2 download-retry (timeout 00:09:58) [common]
45 13:49:19.224057 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 13:49:19.224229 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.184-cip36-13-g8201543bbc8b6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:49:19.224300 saving as /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/kernel/bzImage
48 13:49:19.224361 total size: 13402336 (12MB)
49 13:49:19.224436 No compression specified
50 13:49:19.225627 progress 0% (0MB)
51 13:49:19.229311 progress 5% (0MB)
52 13:49:19.232731 progress 10% (1MB)
53 13:49:19.236331 progress 15% (1MB)
54 13:49:19.239810 progress 20% (2MB)
55 13:49:19.243481 progress 25% (3MB)
56 13:49:19.246932 progress 30% (3MB)
57 13:49:19.250652 progress 35% (4MB)
58 13:49:19.254182 progress 40% (5MB)
59 13:49:19.257881 progress 45% (5MB)
60 13:49:19.261384 progress 50% (6MB)
61 13:49:19.264855 progress 55% (7MB)
62 13:49:19.268515 progress 60% (7MB)
63 13:49:19.271957 progress 65% (8MB)
64 13:49:19.275639 progress 70% (8MB)
65 13:49:19.279079 progress 75% (9MB)
66 13:49:19.282660 progress 80% (10MB)
67 13:49:19.286054 progress 85% (10MB)
68 13:49:19.289592 progress 90% (11MB)
69 13:49:19.292983 progress 95% (12MB)
70 13:49:19.296544 progress 100% (12MB)
71 13:49:19.296666 12MB downloaded in 0.07s (176.79MB/s)
72 13:49:19.296830 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:49:19.297092 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:49:19.297200 start: 1.3 download-retry (timeout 00:09:58) [common]
76 13:49:19.297302 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 13:49:19.297462 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.184-cip36-13-g8201543bbc8b6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:49:19.297563 saving as /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/modules/modules.tar
79 13:49:19.297667 total size: 526860 (0MB)
80 13:49:19.297769 Using unxz to decompress xz
81 13:49:19.301912 progress 6% (0MB)
82 13:49:19.302327 progress 12% (0MB)
83 13:49:19.302581 progress 18% (0MB)
84 13:49:19.304183 progress 24% (0MB)
85 13:49:19.306074 progress 31% (0MB)
86 13:49:19.308162 progress 37% (0MB)
87 13:49:19.310136 progress 43% (0MB)
88 13:49:19.312023 progress 49% (0MB)
89 13:49:19.314426 progress 55% (0MB)
90 13:49:19.316481 progress 62% (0MB)
91 13:49:19.318419 progress 68% (0MB)
92 13:49:19.320561 progress 74% (0MB)
93 13:49:19.322610 progress 80% (0MB)
94 13:49:19.324768 progress 87% (0MB)
95 13:49:19.326733 progress 93% (0MB)
96 13:49:19.328954 progress 99% (0MB)
97 13:49:19.335919 0MB downloaded in 0.04s (13.14MB/s)
98 13:49:19.336236 end: 1.3.1 http-download (duration 00:00:00) [common]
100 13:49:19.336535 end: 1.3 download-retry (duration 00:00:00) [common]
101 13:49:19.336661 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
102 13:49:19.336774 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
103 13:49:19.336871 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 13:49:19.336977 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
105 13:49:19.337250 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1
106 13:49:19.337431 makedir: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin
107 13:49:19.337579 makedir: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/tests
108 13:49:19.337722 makedir: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/results
109 13:49:19.337877 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-add-keys
110 13:49:19.338074 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-add-sources
111 13:49:19.338255 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-background-process-start
112 13:49:19.338434 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-background-process-stop
113 13:49:19.338584 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-common-functions
114 13:49:19.338747 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-echo-ipv4
115 13:49:19.338897 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-install-packages
116 13:49:19.339072 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-installed-packages
117 13:49:19.339270 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-os-build
118 13:49:19.339431 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-probe-channel
119 13:49:19.339576 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-probe-ip
120 13:49:19.339723 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-target-ip
121 13:49:19.339872 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-target-mac
122 13:49:19.340046 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-target-storage
123 13:49:19.340224 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-case
124 13:49:19.340397 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-event
125 13:49:19.340571 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-feedback
126 13:49:19.340745 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-raise
127 13:49:19.340920 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-reference
128 13:49:19.341096 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-runner
129 13:49:19.341270 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-set
130 13:49:19.341446 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-test-shell
131 13:49:19.341626 Updating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-install-packages (oe)
132 13:49:19.341830 Updating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/bin/lava-installed-packages (oe)
133 13:49:19.342000 Creating /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/environment
134 13:49:19.342140 LAVA metadata
135 13:49:19.342251 - LAVA_JOB_ID=11061512
136 13:49:19.342359 - LAVA_DISPATCHER_IP=192.168.201.1
137 13:49:19.342492 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
138 13:49:19.342569 skipped lava-vland-overlay
139 13:49:19.342692 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 13:49:19.342823 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
141 13:49:19.342920 skipped lava-multinode-overlay
142 13:49:19.343050 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 13:49:19.343176 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
144 13:49:19.343339 Loading test definitions
145 13:49:19.343482 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
146 13:49:19.343594 Using /lava-11061512 at stage 0
147 13:49:19.344058 uuid=11061512_1.4.2.3.1 testdef=None
148 13:49:19.344184 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 13:49:19.344311 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
150 13:49:19.345086 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 13:49:19.345462 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
153 13:49:19.346132 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 13:49:19.346396 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
156 13:49:19.347045 runner path: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/0/tests/0_dmesg test_uuid 11061512_1.4.2.3.1
157 13:49:19.347229 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 13:49:19.347524 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
160 13:49:19.347607 Using /lava-11061512 at stage 1
161 13:49:19.348030 uuid=11061512_1.4.2.3.5 testdef=None
162 13:49:19.348156 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 13:49:19.348259 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
164 13:49:19.348954 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 13:49:19.349326 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
167 13:49:19.349995 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 13:49:19.350259 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
170 13:49:19.350914 runner path: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/1/tests/1_bootrr test_uuid 11061512_1.4.2.3.5
171 13:49:19.351088 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 13:49:19.351386 Creating lava-test-runner.conf files
174 13:49:19.351470 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/0 for stage 0
175 13:49:19.351589 - 0_dmesg
176 13:49:19.351681 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11061512/lava-overlay-rql59ny1/lava-11061512/1 for stage 1
177 13:49:19.351817 - 1_bootrr
178 13:49:19.351930 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 13:49:19.352035 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
180 13:49:19.361108 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 13:49:19.361235 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
182 13:49:19.361344 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 13:49:19.361452 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 13:49:19.361557 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
185 13:49:19.612766 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 13:49:19.613166 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
187 13:49:19.613294 extracting modules file /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11061512/extract-overlay-ramdisk-5eo7qh9w/ramdisk
188 13:49:19.638877 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 13:49:19.639049 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
190 13:49:19.639185 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11061512/compress-overlay-rqyuigzn/overlay-1.4.2.4.tar.gz to ramdisk
191 13:49:19.639315 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11061512/compress-overlay-rqyuigzn/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11061512/extract-overlay-ramdisk-5eo7qh9w/ramdisk
192 13:49:19.647874 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 13:49:19.648012 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
194 13:49:19.648121 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 13:49:19.648232 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
196 13:49:19.648326 Building ramdisk /var/lib/lava/dispatcher/tmp/11061512/extract-overlay-ramdisk-5eo7qh9w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11061512/extract-overlay-ramdisk-5eo7qh9w/ramdisk
197 13:49:19.785716 >> 54145 blocks
198 13:49:20.700681 rename /var/lib/lava/dispatcher/tmp/11061512/extract-overlay-ramdisk-5eo7qh9w/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/ramdisk/ramdisk.cpio.gz
199 13:49:20.701226 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 13:49:20.701410 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
201 13:49:20.701594 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
202 13:49:20.701727 No mkimage arch provided, not using FIT.
203 13:49:20.701861 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 13:49:20.701984 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 13:49:20.702137 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 13:49:20.702275 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
207 13:49:20.702395 No LXC device requested
208 13:49:20.702515 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 13:49:20.702648 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
210 13:49:20.702778 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 13:49:20.702890 Checking files for TFTP limit of 4294967296 bytes.
212 13:49:20.703457 end: 1 tftp-deploy (duration 00:00:03) [common]
213 13:49:20.703604 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 13:49:20.703735 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 13:49:20.703908 substitutions:
216 13:49:20.704007 - {DTB}: None
217 13:49:20.704106 - {INITRD}: 11061512/tftp-deploy-kjp9xmeu/ramdisk/ramdisk.cpio.gz
218 13:49:20.704200 - {KERNEL}: 11061512/tftp-deploy-kjp9xmeu/kernel/bzImage
219 13:49:20.704294 - {LAVA_MAC}: None
220 13:49:20.704386 - {PRESEED_CONFIG}: None
221 13:49:20.704477 - {PRESEED_LOCAL}: None
222 13:49:20.704568 - {RAMDISK}: 11061512/tftp-deploy-kjp9xmeu/ramdisk/ramdisk.cpio.gz
223 13:49:20.704660 - {ROOT_PART}: None
224 13:49:20.704751 - {ROOT}: None
225 13:49:20.704840 - {SERVER_IP}: 192.168.201.1
226 13:49:20.704925 - {TEE}: None
227 13:49:20.705015 Parsed boot commands:
228 13:49:20.705106 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 13:49:20.705342 Parsed boot commands: tftpboot 192.168.201.1 11061512/tftp-deploy-kjp9xmeu/kernel/bzImage 11061512/tftp-deploy-kjp9xmeu/kernel/cmdline 11061512/tftp-deploy-kjp9xmeu/ramdisk/ramdisk.cpio.gz
230 13:49:20.705477 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 13:49:20.705610 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 13:49:20.705755 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 13:49:20.705888 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 13:49:20.705995 Not connected, no need to disconnect.
235 13:49:20.706111 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 13:49:20.706236 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 13:49:20.706341 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cbv514-1h-34uz-brya-cbg-9'
238 13:49:20.710505 Setting prompt string to ['lava-test: # ']
239 13:49:20.710933 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 13:49:20.711098 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 13:49:20.711250 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 13:49:20.711416 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 13:49:20.711791 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
244 13:49:25.861334 >> Command sent successfully.
245 13:49:25.866771 Returned 0 in 5 seconds
246 13:49:25.967443 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 13:49:25.968977 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 13:49:25.969498 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 13:49:25.969969 Setting prompt string to 'Starting depthcharge on Volmar...'
251 13:49:25.970362 Changing prompt to 'Starting depthcharge on Volmar...'
252 13:49:25.970734 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 13:49:25.972043 [Enter `^Ec?' for help]
254 13:49:27.343654
255 13:49:27.344244
256 13:49:27.351407 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 13:49:27.355075 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 13:49:27.358779 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 13:49:27.366218 CPU: AES supported, TXT NOT supported, VT supported
260 13:49:27.373058 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 13:49:27.373537 Cache size = 10 MiB
262 13:49:27.380128 MCH: device id 4609 (rev 04) is Alderlake-P
263 13:49:27.383910 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 13:49:27.386988 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 13:49:27.390883 VBOOT: Loading verstage.
266 13:49:27.394631 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 13:49:27.402252 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 13:49:27.406012 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 13:49:27.412887 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 13:49:27.422644 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 13:49:27.423139
272 13:49:27.423564
273 13:49:27.432347 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 13:49:27.436824 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 13:49:27.440389 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 13:49:27.443812 I2C TX abort detected (00000001)
277 13:49:27.446852 cr50_i2c_read: Address write failed
278 13:49:27.460183 .done! DID_VID 0x00281ae0
279 13:49:27.463159 TPM ready after 0 ms
280 13:49:27.466712 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 13:49:27.480287 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 13:49:27.486964 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 13:49:27.527926 tlcl_send_startup: Startup return code is 0
284 13:49:27.528501 TPM: setup succeeded
285 13:49:27.548244 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 13:49:27.570361 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 13:49:27.574014 Chrome EC: UHEPI supported
288 13:49:27.577048 Reading cr50 boot mode
289 13:49:27.592092 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 13:49:27.592647 Phase 1
291 13:49:27.598969 FMAP: area GBB found @ 1805000 (458752 bytes)
292 13:49:27.606629 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 13:49:27.613768 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 13:49:27.620716 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 13:49:27.621294 Phase 2
296 13:49:27.621735 Phase 3
297 13:49:27.627160 FMAP: area GBB found @ 1805000 (458752 bytes)
298 13:49:27.630707 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 13:49:27.637934 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 13:49:27.643769 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 13:49:27.651203 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 13:49:27.657470 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 13:49:27.664494 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 13:49:27.678075 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 13:49:27.681749 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 13:49:27.688893 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 13:49:27.692285 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 13:49:27.699016 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 13:49:27.708644 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 13:49:27.711896 Phase 4
311 13:49:27.715043 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 13:49:27.721975 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 13:49:27.933886 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 13:49:27.940147 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 13:49:27.943319 Saving vboot hash.
316 13:49:27.950062 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 13:49:27.966189 tlcl_extend: response is 0
318 13:49:27.972581 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 13:49:27.979476 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 13:49:27.993907 tlcl_extend: response is 0
321 13:49:28.000306 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 13:49:28.019697 tlcl_lock_nv_write: response is 0
323 13:49:28.038409 tlcl_lock_nv_write: response is 0
324 13:49:28.038975 Slot A is selected
325 13:49:28.044985 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 13:49:28.051815 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 13:49:28.058608 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 13:49:28.064662 BS: verstage times (exec / console): total (unknown) / 264 ms
329 13:49:28.065198
330 13:49:28.065546
331 13:49:28.071583 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 13:49:28.075560 Google Chrome EC: version:
333 13:49:28.079277 ro: volmar_v2.0.14126-e605144e9c
334 13:49:28.082566 rw: volmar_v0.0.55-22d1557
335 13:49:28.086170 running image: 2
336 13:49:28.089250 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 13:49:28.099133 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 13:49:28.105786 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 13:49:28.112706 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 13:49:28.122305 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 13:49:28.132275 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 13:49:28.136047 EC took 972us to calculate image hash
343 13:49:28.145843 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 13:49:28.148878 VB2:sync_ec() select_rw=RW(active)
345 13:49:28.161148 Waited 280us to clear limit power flag.
346 13:49:28.164740 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 13:49:28.168045 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 13:49:28.171423 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 13:49:28.177889 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 13:49:28.181376 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
351 13:49:28.184753 TCO_STS: 0000 0000
352 13:49:28.185198 GEN_PMCON: d0015038 00002200
353 13:49:28.187708 GBLRST_CAUSE: 00000000 00000000
354 13:49:28.191127 HPR_CAUSE0: 00000000
355 13:49:28.194337 prev_sleep_state 5
356 13:49:28.197703 Abort disabling TXT, as CPU is not TXT capable.
357 13:49:28.205736 cse_lite: Number of partitions = 3
358 13:49:28.208374 cse_lite: Current partition = RO
359 13:49:28.208792 cse_lite: Next partition = RO
360 13:49:28.211918 cse_lite: Flags = 0x7
361 13:49:28.218676 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 13:49:28.228885 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 13:49:28.231713 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 13:49:28.238826 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 13:49:28.245461 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 13:49:28.251862 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 13:49:28.254855 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 13:49:28.261797 cse_lite: Set Boot Partition Info Command (RW)
369 13:49:28.264864 HECI: Global Reset(Type:1) Command
370 13:49:29.705137 �3g�Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
371 13:49:29.708162 Cache size = 10 MiB
372 13:49:29.711924 MCH: device id 4609 (rev 04) is Alderlake-P
373 13:49:29.718218 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
374 13:49:29.721504 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
375 13:49:29.726193 VBOOT: Loading verstage.
376 13:49:29.729979 FMAP: Found "FLASH" version 1.1 at 0x1804000.
377 13:49:29.733224 FMAP: base = 0x0 size = 0x2000000 #areas = 37
378 13:49:29.740215 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
379 13:49:29.747441 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
380 13:49:29.754061 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
381 13:49:29.758737
382 13:49:29.759477
383 13:49:29.765006 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
384 13:49:29.772029 Probing TPM I2C: I2C bus 1 version 0x3230302a
385 13:49:29.774751 DW I2C bus 1 at 0xfe022000 (400 KHz)
386 13:49:29.778487 done! DID_VID 0x00281ae0
387 13:49:29.782094 TPM ready after 0 ms
388 13:49:29.785824 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
389 13:49:29.794684 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
390 13:49:29.801374 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
391 13:49:29.841185 tlcl_send_startup: Startup return code is 0
392 13:49:29.841751 TPM: setup succeeded
393 13:49:29.862529 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
394 13:49:29.884232 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
395 13:49:29.888133 Chrome EC: UHEPI supported
396 13:49:29.891721 Reading cr50 boot mode
397 13:49:29.906684 Cr50 says boot_mode is VERIFIED_RW(0x00).
398 13:49:29.907275 Phase 1
399 13:49:29.913190 FMAP: area GBB found @ 1805000 (458752 bytes)
400 13:49:29.920424 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
401 13:49:29.926481 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
402 13:49:29.933495 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
403 13:49:29.934067 Phase 2
404 13:49:29.936540 Phase 3
405 13:49:29.939958 FMAP: area GBB found @ 1805000 (458752 bytes)
406 13:49:29.946599 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 13:49:29.950003 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 13:49:29.956454 VB2:vb2_verify_keyblock() Checking keyblock signature...
409 13:49:29.963075 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
410 13:49:29.970236 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
411 13:49:29.979879 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
412 13:49:29.991390 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 13:49:29.994951 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 13:49:30.001762 VB2:vb2_verify_fw_preamble() Verifying preamble.
415 13:49:30.008386 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
416 13:49:30.014732 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
417 13:49:30.021227 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
418 13:49:30.025594 Phase 4
419 13:49:30.029231 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
420 13:49:30.035335 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
421 13:49:30.248260 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
422 13:49:30.254919 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
423 13:49:30.258066 Saving vboot hash.
424 13:49:30.264672 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
425 13:49:30.280763 tlcl_extend: response is 0
426 13:49:30.287428 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
427 13:49:30.290849 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
428 13:49:30.308181 tlcl_extend: response is 0
429 13:49:30.314851 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
430 13:49:30.333718 tlcl_lock_nv_write: response is 0
431 13:49:30.352946 tlcl_lock_nv_write: response is 0
432 13:49:30.353534 Slot A is selected
433 13:49:30.359133 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
434 13:49:30.366101 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
435 13:49:30.372451 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
436 13:49:30.379007 BS: verstage times (exec / console): total (unknown) / 256 ms
437 13:49:30.379507
438 13:49:30.379879
439 13:49:30.385468 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
440 13:49:30.389752 Google Chrome EC: version:
441 13:49:30.392899 ro: volmar_v2.0.14126-e605144e9c
442 13:49:30.396190 rw: volmar_v0.0.55-22d1557
443 13:49:30.399452 running image: 2
444 13:49:30.402873 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 13:49:30.413001 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
446 13:49:30.419696 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
447 13:49:30.426602 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
448 13:49:30.436296 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
449 13:49:30.446259 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 13:49:30.449955 EC took 941us to calculate image hash
451 13:49:30.459749 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 13:49:30.462774 VB2:sync_ec() select_rw=RW(active)
453 13:49:30.474317 Waited 300us to clear limit power flag.
454 13:49:30.477827 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
455 13:49:30.480986 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
456 13:49:30.484444 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
457 13:49:30.491030 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
458 13:49:30.494705 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
459 13:49:30.497739 TCO_STS: 0000 0000
460 13:49:30.498341 GEN_PMCON: d1001038 00002200
461 13:49:30.501363 GBLRST_CAUSE: 00000040 00000000
462 13:49:30.504118 HPR_CAUSE0: 00000000
463 13:49:30.507641 prev_sleep_state 5
464 13:49:30.511663 Abort disabling TXT, as CPU is not TXT capable.
465 13:49:30.515345 cse_lite: Number of partitions = 3
466 13:49:30.518659 cse_lite: Current partition = RW
467 13:49:30.522009 cse_lite: Next partition = RW
468 13:49:30.525592 cse_lite: Flags = 0x7
469 13:49:30.532115 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
470 13:49:30.542256 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
471 13:49:30.545964 FMAP: area SI_ME found @ 1000 (5238784 bytes)
472 13:49:30.552339 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
473 13:49:30.558834 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
474 13:49:30.565490 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
475 13:49:30.568846 cse_lite: CSE CBFS RW version : 16.1.25.2049
476 13:49:30.572329 Boot Count incremented to 3690
477 13:49:30.578713 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
478 13:49:30.585473 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
479 13:49:30.597725 Probing TPM I2C: done! DID_VID 0x00281ae0
480 13:49:30.601379 Locality already claimed
481 13:49:30.604378 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
482 13:49:30.623739 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
483 13:49:30.630919 MRC: Hash idx 0x100d comparison successful.
484 13:49:30.634214 MRC cache found, size f6c8
485 13:49:30.634779 bootmode is set to: 2
486 13:49:30.637889 EC returned error result code 3
487 13:49:30.641217 FW_CONFIG value from CBI is 0x131
488 13:49:30.647863 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
489 13:49:30.650976 SPD index = 0
490 13:49:30.657316 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
491 13:49:30.657750 SPD: module type is LPDDR4X
492 13:49:30.664334 SPD: module part number is K4U6E3S4AB-MGCL
493 13:49:30.670825 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
494 13:49:30.674066 SPD: device width 16 bits, bus width 16 bits
495 13:49:30.677689 SPD: module size is 1024 MB (per channel)
496 13:49:30.746759 CBMEM:
497 13:49:30.750340 IMD: root @ 0x76fff000 254 entries.
498 13:49:30.753307 IMD: root @ 0x76ffec00 62 entries.
499 13:49:30.761709 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
500 13:49:30.765483 RO_VPD is uninitialized or empty.
501 13:49:30.768173 FMAP: area RW_VPD found @ f29000 (8192 bytes)
502 13:49:30.771580 RW_VPD is uninitialized or empty.
503 13:49:30.778129 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
504 13:49:30.781202 External stage cache:
505 13:49:30.784936 IMD: root @ 0x7bbff000 254 entries.
506 13:49:30.787773 IMD: root @ 0x7bbfec00 62 entries.
507 13:49:30.795098 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 13:49:30.801276 MRC: Checking cached data update for 'RW_MRC_CACHE'.
509 13:49:30.804910 MRC: 'RW_MRC_CACHE' does not need update.
510 13:49:30.805507 8 DIMMs found
511 13:49:30.808395 SMM Memory Map
512 13:49:30.811581 SMRAM : 0x7b800000 0x800000
513 13:49:30.814576 Subregion 0: 0x7b800000 0x200000
514 13:49:30.818143 Subregion 1: 0x7ba00000 0x200000
515 13:49:30.821374 Subregion 2: 0x7bc00000 0x400000
516 13:49:30.824471 top_of_ram = 0x77000000
517 13:49:30.827961 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
518 13:49:30.834849 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
519 13:49:30.841517 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
520 13:49:30.845140 MTRR Range: Start=ff000000 End=0 (Size 1000000)
521 13:49:30.845605 Normal boot
522 13:49:30.854747 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
523 13:49:30.861361 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
524 13:49:30.868309 Processing 237 relocs. Offset value of 0x74ab9000
525 13:49:30.876001 BS: romstage times (exec / console): total (unknown) / 380 ms
526 13:49:30.883162
527 13:49:30.883676
528 13:49:30.890240 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
529 13:49:30.890797 Normal boot
530 13:49:30.896821 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
531 13:49:30.903598 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
532 13:49:30.909789 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
533 13:49:30.919934 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
534 13:49:30.968037 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
535 13:49:30.974438 Processing 5931 relocs. Offset value of 0x72a2f000
536 13:49:30.977944 BS: postcar times (exec / console): total (unknown) / 51 ms
537 13:49:30.981071
538 13:49:30.981584
539 13:49:30.987678 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
540 13:49:30.990645 Reserving BERT start 76a1e000, size 10000
541 13:49:30.994502 Normal boot
542 13:49:30.998027 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 13:49:31.004583 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 13:49:31.014243 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 13:49:31.018231 FMAP: area RW_VPD found @ f29000 (8192 bytes)
546 13:49:31.020933 Google Chrome EC: version:
547 13:49:31.024335 ro: volmar_v2.0.14126-e605144e9c
548 13:49:31.027496 rw: volmar_v0.0.55-22d1557
549 13:49:31.027966 running image: 2
550 13:49:31.034569 ACPI _SWS is PM1 Index 8 GPE Index -1
551 13:49:31.037929 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
552 13:49:31.042552 EC returned error result code 3
553 13:49:31.046102 FW_CONFIG value from CBI is 0x131
554 13:49:31.052669 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
555 13:49:31.056160 PCI: 00:1c.2 disabled by fw_config
556 13:49:31.062161 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 13:49:31.066199 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 13:49:31.072313 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 13:49:31.075983 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
560 13:49:31.082492 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
561 13:49:31.089362 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
562 13:49:31.093412 microcode: sig=0x906a4 pf=0x80 revision=0x423
563 13:49:31.099915 microcode: Update skipped, already up-to-date
564 13:49:31.106486 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
565 13:49:31.138370 Detected 6 core, 8 thread CPU.
566 13:49:31.141505 Setting up SMI for CPU
567 13:49:31.144812 IED base = 0x7bc00000
568 13:49:31.145297 IED size = 0x00400000
569 13:49:31.148240 Will perform SMM setup.
570 13:49:31.151910 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
571 13:49:31.155198 LAPIC 0x0 in XAPIC mode.
572 13:49:31.164802 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
573 13:49:31.168070 Processing 18 relocs. Offset value of 0x00030000
574 13:49:31.172954 Attempting to start 7 APs
575 13:49:31.176114 Waiting for 10ms after sending INIT.
576 13:49:31.189487 Waiting for SIPI to complete...
577 13:49:31.192411 done.
578 13:49:31.192942 LAPIC 0x10 in XAPIC mode.
579 13:49:31.195769 LAPIC 0x1 in XAPIC mode.
580 13:49:31.202935 AP: slot 3 apic_id 10, MCU rev: 0x00000423
581 13:49:31.203637 LAPIC 0x14 in XAPIC mode.
582 13:49:31.206439 LAPIC 0x12 in XAPIC mode.
583 13:49:31.209205 AP: slot 5 apic_id 1, MCU rev: 0x00000423
584 13:49:31.215686 AP: slot 4 apic_id 12, MCU rev: 0x00000423
585 13:49:31.218790 AP: slot 1 apic_id 14, MCU rev: 0x00000423
586 13:49:31.222596 LAPIC 0x16 in XAPIC mode.
587 13:49:31.225856 LAPIC 0x8 in XAPIC mode.
588 13:49:31.229013 AP: slot 2 apic_id 16, MCU rev: 0x00000423
589 13:49:31.232215 LAPIC 0x9 in XAPIC mode.
590 13:49:31.235960 AP: slot 6 apic_id 8, MCU rev: 0x00000423
591 13:49:31.239333 Waiting for SIPI to complete...
592 13:49:31.239804 done.
593 13:49:31.242635 AP: slot 7 apic_id 9, MCU rev: 0x00000423
594 13:49:31.246103 smm_setup_relocation_handler: enter
595 13:49:31.249083 smm_setup_relocation_handler: exit
596 13:49:31.259188 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
597 13:49:31.262543 Processing 11 relocs. Offset value of 0x00038000
598 13:49:31.268995 smm_module_setup_stub: stack_top = 0x7b804000
599 13:49:31.272705 smm_module_setup_stub: per cpu stack_size = 0x800
600 13:49:31.279098 smm_module_setup_stub: runtime.start32_offset = 0x4c
601 13:49:31.282962 smm_module_setup_stub: runtime.smm_size = 0x10000
602 13:49:31.289097 SMM Module: stub loaded at 38000. Will call 0x76a52094
603 13:49:31.292406 Installing permanent SMM handler to 0x7b800000
604 13:49:31.298907 smm_load_module: total_smm_space_needed e468, available -> 200000
605 13:49:31.308977 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
606 13:49:31.313187 Processing 255 relocs. Offset value of 0x7b9f6000
607 13:49:31.318865 smm_load_module: smram_start: 0x7b800000
608 13:49:31.322441 smm_load_module: smram_end: 7ba00000
609 13:49:31.325694 smm_load_module: handler start 0x7b9f6d5f
610 13:49:31.329099 smm_load_module: handler_size 98d0
611 13:49:31.332178 smm_load_module: fxsave_area 0x7b9ff000
612 13:49:31.335576 smm_load_module: fxsave_size 1000
613 13:49:31.339292 smm_load_module: CONFIG_MSEG_SIZE 0x0
614 13:49:31.346056 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
615 13:49:31.352606 smm_load_module: handler_mod_params.smbase = 0x7b800000
616 13:49:31.355707 smm_load_module: per_cpu_save_state_size = 0x400
617 13:49:31.358896 smm_load_module: num_cpus = 0x8
618 13:49:31.365948 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
619 13:49:31.369245 smm_load_module: total_save_state_size = 0x2000
620 13:49:31.372585 smm_load_module: cpu0 entry: 7b9e6000
621 13:49:31.378931 smm_create_map: cpus allowed in one segment 30
622 13:49:31.382170 smm_create_map: min # of segments needed 1
623 13:49:31.382758 CPU 0x0
624 13:49:31.385752 smbase 7b9e6000 entry 7b9ee000
625 13:49:31.392136 ss_start 7b9f5c00 code_end 7b9ee208
626 13:49:31.392764 CPU 0x1
627 13:49:31.395601 smbase 7b9e5c00 entry 7b9edc00
628 13:49:31.402330 ss_start 7b9f5800 code_end 7b9ede08
629 13:49:31.402809 CPU 0x2
630 13:49:31.405368 smbase 7b9e5800 entry 7b9ed800
631 13:49:31.408999 ss_start 7b9f5400 code_end 7b9eda08
632 13:49:31.411979 CPU 0x3
633 13:49:31.415498 smbase 7b9e5400 entry 7b9ed400
634 13:49:31.418920 ss_start 7b9f5000 code_end 7b9ed608
635 13:49:31.419446 CPU 0x4
636 13:49:31.425406 smbase 7b9e5000 entry 7b9ed000
637 13:49:31.428607 ss_start 7b9f4c00 code_end 7b9ed208
638 13:49:31.429082 CPU 0x5
639 13:49:31.432046 smbase 7b9e4c00 entry 7b9ecc00
640 13:49:31.438754 ss_start 7b9f4800 code_end 7b9ece08
641 13:49:31.439294 CPU 0x6
642 13:49:31.441961 smbase 7b9e4800 entry 7b9ec800
643 13:49:31.448868 ss_start 7b9f4400 code_end 7b9eca08
644 13:49:31.449457 CPU 0x7
645 13:49:31.452001 smbase 7b9e4400 entry 7b9ec400
646 13:49:31.455150 ss_start 7b9f4000 code_end 7b9ec608
647 13:49:31.465408 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
648 13:49:31.468875 Processing 11 relocs. Offset value of 0x7b9ee000
649 13:49:31.475478 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
650 13:49:31.481929 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
651 13:49:31.488450 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
652 13:49:31.495157 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
653 13:49:31.501796 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
654 13:49:31.505216 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
655 13:49:31.512127 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
656 13:49:31.518583 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
657 13:49:31.524969 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
658 13:49:31.531556 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
659 13:49:31.538178 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
660 13:49:31.544774 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
661 13:49:31.551714 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
662 13:49:31.558297 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
663 13:49:31.564940 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
664 13:49:31.568090 smm_module_setup_stub: stack_top = 0x7b804000
665 13:49:31.571743 smm_module_setup_stub: per cpu stack_size = 0x800
666 13:49:31.578098 smm_module_setup_stub: runtime.start32_offset = 0x4c
667 13:49:31.584789 smm_module_setup_stub: runtime.smm_size = 0x200000
668 13:49:31.588420 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
669 13:49:31.593086 Clearing SMI status registers
670 13:49:31.596399 SMI_STS: PM1
671 13:49:31.597059 PM1_STS: WAK PWRBTN
672 13:49:31.606312 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
673 13:49:31.609846 In relocation handler: CPU 0
674 13:49:31.612860 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
675 13:49:31.616420 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 13:49:31.619840 Relocation complete.
677 13:49:31.626418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
678 13:49:31.629983 In relocation handler: CPU 5
679 13:49:31.633231 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
680 13:49:31.636110 Relocation complete.
681 13:49:31.642970 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
682 13:49:31.646570 In relocation handler: CPU 1
683 13:49:31.649660 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
684 13:49:31.656440 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 13:49:31.656973 Relocation complete.
686 13:49:31.663338 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
687 13:49:31.666536 In relocation handler: CPU 3
688 13:49:31.669969 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
689 13:49:31.676516 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 13:49:31.679890 Relocation complete.
691 13:49:31.686086 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
692 13:49:31.689834 In relocation handler: CPU 2
693 13:49:31.692728 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
694 13:49:31.695799 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 13:49:31.699560 Relocation complete.
696 13:49:31.706230 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
697 13:49:31.709357 In relocation handler: CPU 4
698 13:49:31.712668 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
699 13:49:31.719343 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 13:49:31.719828 Relocation complete.
701 13:49:31.729191 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
702 13:49:31.729675 In relocation handler: CPU 7
703 13:49:31.736357 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
704 13:49:31.736840 Relocation complete.
705 13:49:31.742959 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
706 13:49:31.746162 In relocation handler: CPU 6
707 13:49:31.752684 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
708 13:49:31.755886 Writing SMRR. base = 0x7b800006, mask=0xff800c00
709 13:49:31.759306 Relocation complete.
710 13:49:31.759780 Initializing CPU #0
711 13:49:31.763035 CPU: vendor Intel device 906a4
712 13:49:31.766736 CPU: family 06, model 9a, stepping 04
713 13:49:31.769182 Clearing out pending MCEs
714 13:49:31.772652 cpu: energy policy set to 7
715 13:49:31.775883 Turbo is available but hidden
716 13:49:31.779068 Turbo is available and visible
717 13:49:31.782462 microcode: Update skipped, already up-to-date
718 13:49:31.785668 CPU #0 initialized
719 13:49:31.789108 Initializing CPU #5
720 13:49:31.789691 Initializing CPU #3
721 13:49:31.792366 Initializing CPU #4
722 13:49:31.792834 Initializing CPU #1
723 13:49:31.795609 CPU: vendor Intel device 906a4
724 13:49:31.799153 CPU: family 06, model 9a, stepping 04
725 13:49:31.802491 CPU: vendor Intel device 906a4
726 13:49:31.809468 CPU: family 06, model 9a, stepping 04
727 13:49:31.809944 CPU: vendor Intel device 906a4
728 13:49:31.815635 CPU: family 06, model 9a, stepping 04
729 13:49:31.816107 Initializing CPU #2
730 13:49:31.819279 Clearing out pending MCEs
731 13:49:31.822563 Clearing out pending MCEs
732 13:49:31.825722 Clearing out pending MCEs
733 13:49:31.826197 cpu: energy policy set to 7
734 13:49:31.829370 CPU: vendor Intel device 906a4
735 13:49:31.835570 CPU: family 06, model 9a, stepping 04
736 13:49:31.836112 cpu: energy policy set to 7
737 13:49:31.839190 Clearing out pending MCEs
738 13:49:31.845991 microcode: Update skipped, already up-to-date
739 13:49:31.846547 CPU #3 initialized
740 13:49:31.849028 cpu: energy policy set to 7
741 13:49:31.852783 microcode: Update skipped, already up-to-date
742 13:49:31.855724 CPU #1 initialized
743 13:49:31.859334 microcode: Update skipped, already up-to-date
744 13:49:31.862474 CPU #4 initialized
745 13:49:31.866419 cpu: energy policy set to 7
746 13:49:31.869333 CPU: vendor Intel device 906a4
747 13:49:31.872543 CPU: family 06, model 9a, stepping 04
748 13:49:31.875721 microcode: Update skipped, already up-to-date
749 13:49:31.879312 CPU #2 initialized
750 13:49:31.879914 Initializing CPU #6
751 13:49:31.882891 Clearing out pending MCEs
752 13:49:31.885672 CPU: vendor Intel device 906a4
753 13:49:31.889072 CPU: family 06, model 9a, stepping 04
754 13:49:31.892612 cpu: energy policy set to 7
755 13:49:31.895880 Clearing out pending MCEs
756 13:49:31.898882 Initializing CPU #7
757 13:49:31.903040 microcode: Update skipped, already up-to-date
758 13:49:31.905818 CPU #5 initialized
759 13:49:31.906370 CPU: vendor Intel device 906a4
760 13:49:31.912870 CPU: family 06, model 9a, stepping 04
761 13:49:31.913430 cpu: energy policy set to 7
762 13:49:31.915458 Clearing out pending MCEs
763 13:49:31.922177 microcode: Update skipped, already up-to-date
764 13:49:31.922836 CPU #6 initialized
765 13:49:31.925864 cpu: energy policy set to 7
766 13:49:31.928612 microcode: Update skipped, already up-to-date
767 13:49:31.932044 CPU #7 initialized
768 13:49:31.935436 bsp_do_flight_plan done after 693 msecs.
769 13:49:31.939084 CPU: frequency set to 4400 MHz
770 13:49:31.942436 Enabling SMIs.
771 13:49:31.948701 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
772 13:49:31.963841 Probing TPM I2C: done! DID_VID 0x00281ae0
773 13:49:31.966760 Locality already claimed
774 13:49:31.970270 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
775 13:49:31.981968 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
776 13:49:31.985267 Enabling GPIO PM b/c CR50 has long IRQ pulse support
777 13:49:31.991614 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
778 13:49:31.998053 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
779 13:49:32.001733 Found a VBT of 9216 bytes after decompression
780 13:49:32.004698 PCI 1.0, PIN A, using IRQ #16
781 13:49:32.008568 PCI 2.0, PIN A, using IRQ #17
782 13:49:32.012135 PCI 4.0, PIN A, using IRQ #18
783 13:49:32.014922 PCI 5.0, PIN A, using IRQ #16
784 13:49:32.018225 PCI 6.0, PIN A, using IRQ #16
785 13:49:32.021364 PCI 6.2, PIN C, using IRQ #18
786 13:49:32.025094 PCI 7.0, PIN A, using IRQ #19
787 13:49:32.028326 PCI 7.1, PIN B, using IRQ #20
788 13:49:32.031532 PCI 7.2, PIN C, using IRQ #21
789 13:49:32.035289 PCI 7.3, PIN D, using IRQ #22
790 13:49:32.038811 PCI 8.0, PIN A, using IRQ #23
791 13:49:32.041693 PCI D.0, PIN A, using IRQ #17
792 13:49:32.045061 PCI D.1, PIN B, using IRQ #19
793 13:49:32.045596 PCI 10.0, PIN A, using IRQ #24
794 13:49:32.047939 PCI 10.1, PIN B, using IRQ #25
795 13:49:32.051657 PCI 10.6, PIN C, using IRQ #20
796 13:49:32.054583 PCI 10.7, PIN D, using IRQ #21
797 13:49:32.057723 PCI 11.0, PIN A, using IRQ #26
798 13:49:32.061468 PCI 11.1, PIN B, using IRQ #27
799 13:49:32.064642 PCI 11.2, PIN C, using IRQ #28
800 13:49:32.067878 PCI 11.3, PIN D, using IRQ #29
801 13:49:32.071101 PCI 12.0, PIN A, using IRQ #30
802 13:49:32.074431 PCI 12.6, PIN B, using IRQ #31
803 13:49:32.077728 PCI 12.7, PIN C, using IRQ #22
804 13:49:32.081449 PCI 13.0, PIN A, using IRQ #32
805 13:49:32.084432 PCI 13.1, PIN B, using IRQ #33
806 13:49:32.087645 PCI 13.2, PIN C, using IRQ #34
807 13:49:32.090991 PCI 13.3, PIN D, using IRQ #35
808 13:49:32.094212 PCI 14.0, PIN B, using IRQ #23
809 13:49:32.094320 PCI 14.1, PIN A, using IRQ #36
810 13:49:32.097794 PCI 14.3, PIN C, using IRQ #17
811 13:49:32.101024 PCI 15.0, PIN A, using IRQ #37
812 13:49:32.104713 PCI 15.1, PIN B, using IRQ #38
813 13:49:32.107872 PCI 15.2, PIN C, using IRQ #39
814 13:49:32.111200 PCI 15.3, PIN D, using IRQ #40
815 13:49:32.114299 PCI 16.0, PIN A, using IRQ #18
816 13:49:32.117908 PCI 16.1, PIN B, using IRQ #19
817 13:49:32.121068 PCI 16.2, PIN C, using IRQ #20
818 13:49:32.124301 PCI 16.3, PIN D, using IRQ #21
819 13:49:32.127575 PCI 16.4, PIN A, using IRQ #18
820 13:49:32.130935 PCI 16.5, PIN B, using IRQ #19
821 13:49:32.134455 PCI 17.0, PIN A, using IRQ #22
822 13:49:32.137348 PCI 19.0, PIN A, using IRQ #41
823 13:49:32.141035 PCI 19.1, PIN B, using IRQ #42
824 13:49:32.144314 PCI 19.2, PIN C, using IRQ #43
825 13:49:32.147723 PCI 1C.0, PIN A, using IRQ #16
826 13:49:32.147974 PCI 1C.1, PIN B, using IRQ #17
827 13:49:32.151191 PCI 1C.2, PIN C, using IRQ #18
828 13:49:32.154268 PCI 1C.3, PIN D, using IRQ #19
829 13:49:32.157777 PCI 1C.4, PIN A, using IRQ #16
830 13:49:32.160994 PCI 1C.5, PIN B, using IRQ #17
831 13:49:32.164086 PCI 1C.6, PIN C, using IRQ #18
832 13:49:32.167773 PCI 1C.7, PIN D, using IRQ #19
833 13:49:32.171023 PCI 1D.0, PIN A, using IRQ #16
834 13:49:32.174425 PCI 1D.1, PIN B, using IRQ #17
835 13:49:32.177654 PCI 1D.2, PIN C, using IRQ #18
836 13:49:32.180708 PCI 1D.3, PIN D, using IRQ #19
837 13:49:32.184183 PCI 1E.0, PIN A, using IRQ #23
838 13:49:32.187504 PCI 1E.1, PIN B, using IRQ #20
839 13:49:32.191114 PCI 1E.2, PIN C, using IRQ #44
840 13:49:32.194300 PCI 1E.3, PIN D, using IRQ #45
841 13:49:32.197335 PCI 1F.3, PIN B, using IRQ #22
842 13:49:32.197583 PCI 1F.4, PIN C, using IRQ #23
843 13:49:32.201078 PCI 1F.6, PIN D, using IRQ #20
844 13:49:32.204231 PCI 1F.7, PIN A, using IRQ #21
845 13:49:32.210863 IRQ: Using dynamically assigned PCI IO-APIC IRQs
846 13:49:32.217544 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
847 13:49:32.397797 FSPS returned 0
848 13:49:32.400974 Executing Phase 1 of FspMultiPhaseSiInit
849 13:49:32.411039 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
850 13:49:32.414612 port C0 DISC req: usage 1 usb3 1 usb2 1
851 13:49:32.417497 Raw Buffer output 0 00000111
852 13:49:32.420907 Raw Buffer output 1 00000000
853 13:49:32.424476 pmc_send_ipc_cmd succeeded
854 13:49:32.431510 port C1 DISC req: usage 1 usb3 3 usb2 3
855 13:49:32.431619 Raw Buffer output 0 00000331
856 13:49:32.434414 Raw Buffer output 1 00000000
857 13:49:32.438599 pmc_send_ipc_cmd succeeded
858 13:49:32.442661 Detected 6 core, 8 thread CPU.
859 13:49:32.446124 Detected 6 core, 8 thread CPU.
860 13:49:32.451401 Detected 6 core, 8 thread CPU.
861 13:49:32.454320 Detected 6 core, 8 thread CPU.
862 13:49:32.458037 Detected 6 core, 8 thread CPU.
863 13:49:32.461323 Detected 6 core, 8 thread CPU.
864 13:49:32.464687 Detected 6 core, 8 thread CPU.
865 13:49:32.468011 Detected 6 core, 8 thread CPU.
866 13:49:32.471440 Detected 6 core, 8 thread CPU.
867 13:49:32.475061 Detected 6 core, 8 thread CPU.
868 13:49:32.478065 Detected 6 core, 8 thread CPU.
869 13:49:32.481197 Detected 6 core, 8 thread CPU.
870 13:49:32.484478 Detected 6 core, 8 thread CPU.
871 13:49:32.487672 Detected 6 core, 8 thread CPU.
872 13:49:32.491023 Detected 6 core, 8 thread CPU.
873 13:49:32.494452 Detected 6 core, 8 thread CPU.
874 13:49:32.497869 Detected 6 core, 8 thread CPU.
875 13:49:32.501322 Detected 6 core, 8 thread CPU.
876 13:49:32.504541 Detected 6 core, 8 thread CPU.
877 13:49:32.507976 Detected 6 core, 8 thread CPU.
878 13:49:32.511087 Detected 6 core, 8 thread CPU.
879 13:49:32.514757 Detected 6 core, 8 thread CPU.
880 13:49:32.804041 Detected 6 core, 8 thread CPU.
881 13:49:32.807164 Detected 6 core, 8 thread CPU.
882 13:49:32.811120 Detected 6 core, 8 thread CPU.
883 13:49:32.814036 Detected 6 core, 8 thread CPU.
884 13:49:32.817616 Detected 6 core, 8 thread CPU.
885 13:49:32.820536 Detected 6 core, 8 thread CPU.
886 13:49:32.824023 Detected 6 core, 8 thread CPU.
887 13:49:32.827100 Detected 6 core, 8 thread CPU.
888 13:49:32.830758 Detected 6 core, 8 thread CPU.
889 13:49:32.834155 Detected 6 core, 8 thread CPU.
890 13:49:32.837152 Detected 6 core, 8 thread CPU.
891 13:49:32.840541 Detected 6 core, 8 thread CPU.
892 13:49:32.844023 Detected 6 core, 8 thread CPU.
893 13:49:32.847254 Detected 6 core, 8 thread CPU.
894 13:49:32.850678 Detected 6 core, 8 thread CPU.
895 13:49:32.854182 Detected 6 core, 8 thread CPU.
896 13:49:32.857531 Detected 6 core, 8 thread CPU.
897 13:49:32.860774 Detected 6 core, 8 thread CPU.
898 13:49:32.864423 Detected 6 core, 8 thread CPU.
899 13:49:32.864761 Detected 6 core, 8 thread CPU.
900 13:49:32.867592 Display FSP Version Info HOB
901 13:49:32.870891 Reference Code - CPU = c.0.65.70
902 13:49:32.874363 uCode Version = 0.0.4.23
903 13:49:32.877933 TXT ACM version = ff.ff.ff.ffff
904 13:49:32.881518 Reference Code - ME = c.0.65.70
905 13:49:32.884218 MEBx version = 0.0.0.0
906 13:49:32.887521 ME Firmware Version = Lite SKU
907 13:49:32.891020 Reference Code - PCH = c.0.65.70
908 13:49:32.894386 PCH-CRID Status = Disabled
909 13:49:32.897834 PCH-CRID Original Value = ff.ff.ff.ffff
910 13:49:32.901008 PCH-CRID New Value = ff.ff.ff.ffff
911 13:49:32.904408 OPROM - RST - RAID = ff.ff.ff.ffff
912 13:49:32.907738 PCH Hsio Version = 4.0.0.0
913 13:49:32.910980 Reference Code - SA - System Agent = c.0.65.70
914 13:49:32.914403 Reference Code - MRC = 0.0.3.80
915 13:49:32.917605 SA - PCIe Version = c.0.65.70
916 13:49:32.920849 SA-CRID Status = Disabled
917 13:49:32.924471 SA-CRID Original Value = 0.0.0.4
918 13:49:32.927525 SA-CRID New Value = 0.0.0.4
919 13:49:32.930882 OPROM - VBIOS = ff.ff.ff.ffff
920 13:49:32.934539 IO Manageability Engine FW Version = 24.0.4.0
921 13:49:32.937646 PHY Build Version = 0.0.0.2016
922 13:49:32.940775 Thunderbolt(TM) FW Version = 0.0.0.0
923 13:49:32.947525 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
924 13:49:32.954199 BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms
925 13:49:32.954442 Enumerating buses...
926 13:49:32.960700 Show all devs... Before device enumeration.
927 13:49:32.961011 Root Device: enabled 1
928 13:49:32.964635 CPU_CLUSTER: 0: enabled 1
929 13:49:32.967765 DOMAIN: 0000: enabled 1
930 13:49:32.970845 GPIO: 0: enabled 1
931 13:49:32.970928 PCI: 00:00.0: enabled 1
932 13:49:32.974512 PCI: 00:01.0: enabled 0
933 13:49:32.977492 PCI: 00:01.1: enabled 0
934 13:49:32.981032 PCI: 00:02.0: enabled 1
935 13:49:32.981115 PCI: 00:04.0: enabled 1
936 13:49:32.984598 PCI: 00:05.0: enabled 0
937 13:49:32.987449 PCI: 00:06.0: enabled 1
938 13:49:32.987538 PCI: 00:06.2: enabled 0
939 13:49:32.991098 PCI: 00:07.0: enabled 0
940 13:49:32.993966 PCI: 00:07.1: enabled 0
941 13:49:32.997519 PCI: 00:07.2: enabled 0
942 13:49:32.997623 PCI: 00:07.3: enabled 0
943 13:49:33.000685 PCI: 00:08.0: enabled 0
944 13:49:33.003941 PCI: 00:09.0: enabled 0
945 13:49:33.007327 PCI: 00:0a.0: enabled 1
946 13:49:33.007443 PCI: 00:0d.0: enabled 1
947 13:49:33.010669 PCI: 00:0d.1: enabled 0
948 13:49:33.013822 PCI: 00:0d.2: enabled 0
949 13:49:33.017667 PCI: 00:0d.3: enabled 0
950 13:49:33.017822 PCI: 00:0e.0: enabled 0
951 13:49:33.020556 PCI: 00:10.0: enabled 0
952 13:49:33.024255 PCI: 00:10.1: enabled 0
953 13:49:33.024430 PCI: 00:10.6: enabled 0
954 13:49:33.027325 PCI: 00:10.7: enabled 0
955 13:49:33.030535 PCI: 00:12.0: enabled 0
956 13:49:33.034026 PCI: 00:12.6: enabled 0
957 13:49:33.034233 PCI: 00:12.7: enabled 0
958 13:49:33.037711 PCI: 00:13.0: enabled 0
959 13:49:33.040973 PCI: 00:14.0: enabled 1
960 13:49:33.043845 PCI: 00:14.1: enabled 0
961 13:49:33.044086 PCI: 00:14.2: enabled 1
962 13:49:33.047511 PCI: 00:14.3: enabled 1
963 13:49:33.050487 PCI: 00:15.0: enabled 1
964 13:49:33.054296 PCI: 00:15.1: enabled 1
965 13:49:33.054485 PCI: 00:15.2: enabled 0
966 13:49:33.057354 PCI: 00:15.3: enabled 1
967 13:49:33.060644 PCI: 00:16.0: enabled 1
968 13:49:33.064051 PCI: 00:16.1: enabled 0
969 13:49:33.064279 PCI: 00:16.2: enabled 0
970 13:49:33.067370 PCI: 00:16.3: enabled 0
971 13:49:33.070308 PCI: 00:16.4: enabled 0
972 13:49:33.070512 PCI: 00:16.5: enabled 0
973 13:49:33.074114 PCI: 00:17.0: enabled 1
974 13:49:33.077042 PCI: 00:19.0: enabled 0
975 13:49:33.080981 PCI: 00:19.1: enabled 1
976 13:49:33.081211 PCI: 00:19.2: enabled 0
977 13:49:33.083639 PCI: 00:1a.0: enabled 0
978 13:49:33.087169 PCI: 00:1c.0: enabled 0
979 13:49:33.090485 PCI: 00:1c.1: enabled 0
980 13:49:33.090705 PCI: 00:1c.2: enabled 0
981 13:49:33.093958 PCI: 00:1c.3: enabled 0
982 13:49:33.096960 PCI: 00:1c.4: enabled 0
983 13:49:33.100577 PCI: 00:1c.5: enabled 0
984 13:49:33.100752 PCI: 00:1c.6: enabled 0
985 13:49:33.103848 PCI: 00:1c.7: enabled 0
986 13:49:33.106918 PCI: 00:1d.0: enabled 0
987 13:49:33.107160 PCI: 00:1d.1: enabled 0
988 13:49:33.110382 PCI: 00:1d.2: enabled 0
989 13:49:33.113894 PCI: 00:1d.3: enabled 0
990 13:49:33.117045 PCI: 00:1e.0: enabled 1
991 13:49:33.117285 PCI: 00:1e.1: enabled 0
992 13:49:33.120515 PCI: 00:1e.2: enabled 0
993 13:49:33.123879 PCI: 00:1e.3: enabled 1
994 13:49:33.127082 PCI: 00:1f.0: enabled 1
995 13:49:33.127349 PCI: 00:1f.1: enabled 0
996 13:49:33.130568 PCI: 00:1f.2: enabled 1
997 13:49:33.133928 PCI: 00:1f.3: enabled 1
998 13:49:33.136780 PCI: 00:1f.4: enabled 0
999 13:49:33.136998 PCI: 00:1f.5: enabled 1
1000 13:49:33.140724 PCI: 00:1f.6: enabled 0
1001 13:49:33.143761 PCI: 00:1f.7: enabled 0
1002 13:49:33.143922 GENERIC: 0.0: enabled 1
1003 13:49:33.146985 GENERIC: 0.0: enabled 1
1004 13:49:33.150511 GENERIC: 1.0: enabled 1
1005 13:49:33.153644 GENERIC: 0.0: enabled 1
1006 13:49:33.153743 GENERIC: 1.0: enabled 1
1007 13:49:33.157327 USB0 port 0: enabled 1
1008 13:49:33.160194 USB0 port 0: enabled 1
1009 13:49:33.163586 GENERIC: 0.0: enabled 1
1010 13:49:33.163661 I2C: 00:1a: enabled 1
1011 13:49:33.166768 I2C: 00:31: enabled 1
1012 13:49:33.170316 I2C: 00:32: enabled 1
1013 13:49:33.170419 I2C: 00:50: enabled 1
1014 13:49:33.173825 I2C: 00:10: enabled 1
1015 13:49:33.176708 I2C: 00:15: enabled 1
1016 13:49:33.176817 I2C: 00:2c: enabled 1
1017 13:49:33.180207 GENERIC: 0.0: enabled 1
1018 13:49:33.183988 SPI: 00: enabled 1
1019 13:49:33.184074 PNP: 0c09.0: enabled 1
1020 13:49:33.186809 GENERIC: 0.0: enabled 1
1021 13:49:33.190152 USB3 port 0: enabled 1
1022 13:49:33.190276 USB3 port 1: enabled 0
1023 13:49:33.193370 USB3 port 2: enabled 1
1024 13:49:33.197153 USB3 port 3: enabled 0
1025 13:49:33.200263 USB2 port 0: enabled 1
1026 13:49:33.200429 USB2 port 1: enabled 0
1027 13:49:33.203316 USB2 port 2: enabled 1
1028 13:49:33.206955 USB2 port 3: enabled 0
1029 13:49:33.207140 USB2 port 4: enabled 0
1030 13:49:33.210129 USB2 port 5: enabled 1
1031 13:49:33.213350 USB2 port 6: enabled 0
1032 13:49:33.217036 USB2 port 7: enabled 0
1033 13:49:33.217299 USB2 port 8: enabled 1
1034 13:49:33.220378 USB2 port 9: enabled 1
1035 13:49:33.223467 USB3 port 0: enabled 1
1036 13:49:33.223704 USB3 port 1: enabled 0
1037 13:49:33.227052 USB3 port 2: enabled 0
1038 13:49:33.230442 USB3 port 3: enabled 0
1039 13:49:33.230684 GENERIC: 0.0: enabled 1
1040 13:49:33.233842 GENERIC: 1.0: enabled 1
1041 13:49:33.237188 APIC: 00: enabled 1
1042 13:49:33.237427 APIC: 14: enabled 1
1043 13:49:33.240507 APIC: 16: enabled 1
1044 13:49:33.243804 APIC: 10: enabled 1
1045 13:49:33.244040 APIC: 12: enabled 1
1046 13:49:33.247334 APIC: 01: enabled 1
1047 13:49:33.250310 APIC: 08: enabled 1
1048 13:49:33.250549 APIC: 09: enabled 1
1049 13:49:33.253910 Compare with tree...
1050 13:49:33.256712 Root Device: enabled 1
1051 13:49:33.256953 CPU_CLUSTER: 0: enabled 1
1052 13:49:33.260463 APIC: 00: enabled 1
1053 13:49:33.263429 APIC: 14: enabled 1
1054 13:49:33.263669 APIC: 16: enabled 1
1055 13:49:33.266839 APIC: 10: enabled 1
1056 13:49:33.269995 APIC: 12: enabled 1
1057 13:49:33.270233 APIC: 01: enabled 1
1058 13:49:33.273486 APIC: 08: enabled 1
1059 13:49:33.276537 APIC: 09: enabled 1
1060 13:49:33.280101 DOMAIN: 0000: enabled 1
1061 13:49:33.280432 GPIO: 0: enabled 1
1062 13:49:33.283578 PCI: 00:00.0: enabled 1
1063 13:49:33.286409 PCI: 00:01.0: enabled 0
1064 13:49:33.289819 PCI: 00:01.1: enabled 0
1065 13:49:33.289892 PCI: 00:02.0: enabled 1
1066 13:49:33.293395 PCI: 00:04.0: enabled 1
1067 13:49:33.296967 GENERIC: 0.0: enabled 1
1068 13:49:33.299872 PCI: 00:05.0: enabled 0
1069 13:49:33.303388 PCI: 00:06.0: enabled 1
1070 13:49:33.303470 PCI: 00:06.2: enabled 0
1071 13:49:33.306977 PCI: 00:08.0: enabled 0
1072 13:49:33.310012 PCI: 00:09.0: enabled 0
1073 13:49:33.313158 PCI: 00:0a.0: enabled 1
1074 13:49:33.313252 PCI: 00:0d.0: enabled 1
1075 13:49:33.316772 USB0 port 0: enabled 1
1076 13:49:33.319892 USB3 port 0: enabled 1
1077 13:49:33.323553 USB3 port 1: enabled 0
1078 13:49:33.326427 USB3 port 2: enabled 1
1079 13:49:33.329836 USB3 port 3: enabled 0
1080 13:49:33.329958 PCI: 00:0d.1: enabled 0
1081 13:49:33.333083 PCI: 00:0d.2: enabled 0
1082 13:49:33.336638 PCI: 00:0d.3: enabled 0
1083 13:49:33.340124 PCI: 00:0e.0: enabled 0
1084 13:49:33.343460 PCI: 00:10.0: enabled 0
1085 13:49:33.343622 PCI: 00:10.1: enabled 0
1086 13:49:33.346856 PCI: 00:10.6: enabled 0
1087 13:49:33.349653 PCI: 00:10.7: enabled 0
1088 13:49:33.353352 PCI: 00:12.0: enabled 0
1089 13:49:33.356510 PCI: 00:12.6: enabled 0
1090 13:49:33.356875 PCI: 00:12.7: enabled 0
1091 13:49:33.360239 PCI: 00:13.0: enabled 0
1092 13:49:33.362935 PCI: 00:14.0: enabled 1
1093 13:49:33.366515 USB0 port 0: enabled 1
1094 13:49:33.369994 USB2 port 0: enabled 1
1095 13:49:33.370299 USB2 port 1: enabled 0
1096 13:49:33.373437 USB2 port 2: enabled 1
1097 13:49:33.376730 USB2 port 3: enabled 0
1098 13:49:33.379735 USB2 port 4: enabled 0
1099 13:49:33.383124 USB2 port 5: enabled 1
1100 13:49:33.383520 USB2 port 6: enabled 0
1101 13:49:33.386275 USB2 port 7: enabled 0
1102 13:49:33.390195 USB2 port 8: enabled 1
1103 13:49:33.393102 USB2 port 9: enabled 1
1104 13:49:33.396368 USB3 port 0: enabled 1
1105 13:49:33.400045 USB3 port 1: enabled 0
1106 13:49:33.400320 USB3 port 2: enabled 0
1107 13:49:33.403189 USB3 port 3: enabled 0
1108 13:49:33.406381 PCI: 00:14.1: enabled 0
1109 13:49:33.409593 PCI: 00:14.2: enabled 1
1110 13:49:33.413114 PCI: 00:14.3: enabled 1
1111 13:49:33.413518 GENERIC: 0.0: enabled 1
1112 13:49:33.416614 PCI: 00:15.0: enabled 1
1113 13:49:33.419936 I2C: 00:1a: enabled 1
1114 13:49:33.423212 I2C: 00:31: enabled 1
1115 13:49:33.423539 I2C: 00:32: enabled 1
1116 13:49:33.426643 PCI: 00:15.1: enabled 1
1117 13:49:33.429686 I2C: 00:50: enabled 1
1118 13:49:33.433250 PCI: 00:15.2: enabled 0
1119 13:49:33.436515 PCI: 00:15.3: enabled 1
1120 13:49:33.436834 I2C: 00:10: enabled 1
1121 13:49:33.439833 PCI: 00:16.0: enabled 1
1122 13:49:33.443029 PCI: 00:16.1: enabled 0
1123 13:49:33.446302 PCI: 00:16.2: enabled 0
1124 13:49:33.449598 PCI: 00:16.3: enabled 0
1125 13:49:33.449928 PCI: 00:16.4: enabled 0
1126 13:49:33.452683 PCI: 00:16.5: enabled 0
1127 13:49:33.456511 PCI: 00:17.0: enabled 1
1128 13:49:33.459341 PCI: 00:19.0: enabled 0
1129 13:49:33.462653 PCI: 00:19.1: enabled 1
1130 13:49:33.462740 I2C: 00:15: enabled 1
1131 13:49:33.465945 I2C: 00:2c: enabled 1
1132 13:49:33.469750 PCI: 00:19.2: enabled 0
1133 13:49:33.472699 PCI: 00:1a.0: enabled 0
1134 13:49:33.472772 PCI: 00:1e.0: enabled 1
1135 13:49:33.476065 PCI: 00:1e.1: enabled 0
1136 13:49:33.479459 PCI: 00:1e.2: enabled 0
1137 13:49:33.482998 PCI: 00:1e.3: enabled 1
1138 13:49:33.485866 SPI: 00: enabled 1
1139 13:49:33.485954 PCI: 00:1f.0: enabled 1
1140 13:49:33.489294 PNP: 0c09.0: enabled 1
1141 13:49:33.492982 PCI: 00:1f.1: enabled 0
1142 13:49:33.496352 PCI: 00:1f.2: enabled 1
1143 13:49:33.499186 GENERIC: 0.0: enabled 1
1144 13:49:33.499343 GENERIC: 0.0: enabled 1
1145 13:49:33.502911 GENERIC: 1.0: enabled 1
1146 13:49:33.506077 PCI: 00:1f.3: enabled 1
1147 13:49:33.509115 PCI: 00:1f.4: enabled 0
1148 13:49:33.513003 PCI: 00:1f.5: enabled 1
1149 13:49:33.513184 PCI: 00:1f.6: enabled 0
1150 13:49:33.515977 PCI: 00:1f.7: enabled 0
1151 13:49:33.519543 Root Device scanning...
1152 13:49:33.522959 scan_static_bus for Root Device
1153 13:49:33.525933 CPU_CLUSTER: 0 enabled
1154 13:49:33.526231 DOMAIN: 0000 enabled
1155 13:49:33.529776 DOMAIN: 0000 scanning...
1156 13:49:33.532793 PCI: pci_scan_bus for bus 00
1157 13:49:33.536210 PCI: 00:00.0 [8086/0000] ops
1158 13:49:33.539417 PCI: 00:00.0 [8086/4609] enabled
1159 13:49:33.542753 PCI: 00:02.0 [8086/0000] bus ops
1160 13:49:33.546144 PCI: 00:02.0 [8086/46b3] enabled
1161 13:49:33.549375 PCI: 00:04.0 [8086/0000] bus ops
1162 13:49:33.552932 PCI: 00:04.0 [8086/461d] enabled
1163 13:49:33.556379 PCI: 00:06.0 [8086/0000] bus ops
1164 13:49:33.559776 PCI: 00:06.0 [8086/464d] enabled
1165 13:49:33.562840 PCI: 00:08.0 [8086/464f] disabled
1166 13:49:33.566133 PCI: 00:0a.0 [8086/467d] enabled
1167 13:49:33.569389 PCI: 00:0d.0 [8086/0000] bus ops
1168 13:49:33.572678 PCI: 00:0d.0 [8086/461e] enabled
1169 13:49:33.576436 PCI: 00:14.0 [8086/0000] bus ops
1170 13:49:33.579671 PCI: 00:14.0 [8086/51ed] enabled
1171 13:49:33.582926 PCI: 00:14.2 [8086/51ef] enabled
1172 13:49:33.586235 PCI: 00:14.3 [8086/0000] bus ops
1173 13:49:33.589512 PCI: 00:14.3 [8086/51f0] enabled
1174 13:49:33.592858 PCI: 00:15.0 [8086/0000] bus ops
1175 13:49:33.595981 PCI: 00:15.0 [8086/51e8] enabled
1176 13:49:33.599609 PCI: 00:15.1 [8086/0000] bus ops
1177 13:49:33.602957 PCI: 00:15.1 [8086/51e9] enabled
1178 13:49:33.606054 PCI: 00:15.2 [8086/0000] bus ops
1179 13:49:33.609552 PCI: 00:15.2 [8086/51ea] disabled
1180 13:49:33.612748 PCI: 00:15.3 [8086/0000] bus ops
1181 13:49:33.616357 PCI: 00:15.3 [8086/51eb] enabled
1182 13:49:33.619451 PCI: 00:16.0 [8086/0000] ops
1183 13:49:33.623124 PCI: 00:16.0 [8086/51e0] enabled
1184 13:49:33.629244 PCI: Static device PCI: 00:17.0 not found, disabling it.
1185 13:49:33.632541 PCI: 00:19.0 [8086/0000] bus ops
1186 13:49:33.635845 PCI: 00:19.0 [8086/51c5] disabled
1187 13:49:33.639457 PCI: 00:19.1 [8086/0000] bus ops
1188 13:49:33.643011 PCI: 00:19.1 [8086/51c6] enabled
1189 13:49:33.646050 PCI: 00:1e.0 [8086/0000] ops
1190 13:49:33.649678 PCI: 00:1e.0 [8086/51a8] enabled
1191 13:49:33.652624 PCI: 00:1e.3 [8086/0000] bus ops
1192 13:49:33.656156 PCI: 00:1e.3 [8086/51ab] enabled
1193 13:49:33.659210 PCI: 00:1f.0 [8086/0000] bus ops
1194 13:49:33.662327 PCI: 00:1f.0 [8086/5182] enabled
1195 13:49:33.662407 RTC Init
1196 13:49:33.665988 Set power on after power failure.
1197 13:49:33.669683 Disabling Deep S3
1198 13:49:33.673029 Disabling Deep S3
1199 13:49:33.673110 Disabling Deep S4
1200 13:49:33.675848 Disabling Deep S4
1201 13:49:33.675928 Disabling Deep S5
1202 13:49:33.679506 Disabling Deep S5
1203 13:49:33.682853 PCI: 00:1f.2 [0000/0000] hidden
1204 13:49:33.685836 PCI: 00:1f.3 [8086/0000] bus ops
1205 13:49:33.689302 PCI: 00:1f.3 [8086/51c8] enabled
1206 13:49:33.692750 PCI: 00:1f.5 [8086/0000] bus ops
1207 13:49:33.695999 PCI: 00:1f.5 [8086/51a4] enabled
1208 13:49:33.696081 GPIO: 0 enabled
1209 13:49:33.699714 PCI: Leftover static devices:
1210 13:49:33.702919 PCI: 00:01.0
1211 13:49:33.703018 PCI: 00:01.1
1212 13:49:33.703110 PCI: 00:05.0
1213 13:49:33.705761 PCI: 00:06.2
1214 13:49:33.705855 PCI: 00:09.0
1215 13:49:33.709513 PCI: 00:0d.1
1216 13:49:33.709611 PCI: 00:0d.2
1217 13:49:33.709701 PCI: 00:0d.3
1218 13:49:33.712983 PCI: 00:0e.0
1219 13:49:33.713079 PCI: 00:10.0
1220 13:49:33.716141 PCI: 00:10.1
1221 13:49:33.716241 PCI: 00:10.6
1222 13:49:33.719194 PCI: 00:10.7
1223 13:49:33.719305 PCI: 00:12.0
1224 13:49:33.719367 PCI: 00:12.6
1225 13:49:33.722932 PCI: 00:12.7
1226 13:49:33.723031 PCI: 00:13.0
1227 13:49:33.725950 PCI: 00:14.1
1228 13:49:33.726051 PCI: 00:16.1
1229 13:49:33.726141 PCI: 00:16.2
1230 13:49:33.729171 PCI: 00:16.3
1231 13:49:33.729265 PCI: 00:16.4
1232 13:49:33.732976 PCI: 00:16.5
1233 13:49:33.733052 PCI: 00:17.0
1234 13:49:33.733114 PCI: 00:19.2
1235 13:49:33.735774 PCI: 00:1a.0
1236 13:49:33.735867 PCI: 00:1e.1
1237 13:49:33.739284 PCI: 00:1e.2
1238 13:49:33.739356 PCI: 00:1f.1
1239 13:49:33.742678 PCI: 00:1f.4
1240 13:49:33.742772 PCI: 00:1f.6
1241 13:49:33.742859 PCI: 00:1f.7
1242 13:49:33.746182 PCI: Check your devicetree.cb.
1243 13:49:33.749474 PCI: 00:02.0 scanning...
1244 13:49:33.752700 scan_generic_bus for PCI: 00:02.0
1245 13:49:33.756400 scan_generic_bus for PCI: 00:02.0 done
1246 13:49:33.762698 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1247 13:49:33.762815 PCI: 00:04.0 scanning...
1248 13:49:33.766388 scan_generic_bus for PCI: 00:04.0
1249 13:49:33.769669 GENERIC: 0.0 enabled
1250 13:49:33.775728 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1251 13:49:33.779367 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1252 13:49:33.782465 PCI: 00:06.0 scanning...
1253 13:49:33.785836 do_pci_scan_bridge for PCI: 00:06.0
1254 13:49:33.789422 PCI: pci_scan_bus for bus 01
1255 13:49:33.792687 PCI: 01:00.0 [15b7/5009] enabled
1256 13:49:33.796031 Enabling Common Clock Configuration
1257 13:49:33.799259 L1 Sub-State supported from root port 6
1258 13:49:33.803044 L1 Sub-State Support = 0x5
1259 13:49:33.805765 CommonModeRestoreTime = 0x6e
1260 13:49:33.809214 Power On Value = 0x5, Power On Scale = 0x2
1261 13:49:33.812367 ASPM: Enabled L1
1262 13:49:33.815694 PCIe: Max_Payload_Size adjusted to 256
1263 13:49:33.819458 PCI: 01:00.0: Enabled LTR
1264 13:49:33.822493 PCI: 01:00.0: Programmed LTR max latencies
1265 13:49:33.829330 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1266 13:49:33.829438 PCI: 00:0d.0 scanning...
1267 13:49:33.832668 scan_static_bus for PCI: 00:0d.0
1268 13:49:33.836089 USB0 port 0 enabled
1269 13:49:33.839031 USB0 port 0 scanning...
1270 13:49:33.842796 scan_static_bus for USB0 port 0
1271 13:49:33.842907 USB3 port 0 enabled
1272 13:49:33.845745 USB3 port 1 disabled
1273 13:49:33.849163 USB3 port 2 enabled
1274 13:49:33.849235 USB3 port 3 disabled
1275 13:49:33.852752 USB3 port 0 scanning...
1276 13:49:33.855923 scan_static_bus for USB3 port 0
1277 13:49:33.859175 scan_static_bus for USB3 port 0 done
1278 13:49:33.862801 scan_bus: bus USB3 port 0 finished in 6 msecs
1279 13:49:33.865684 USB3 port 2 scanning...
1280 13:49:33.869112 scan_static_bus for USB3 port 2
1281 13:49:33.872766 scan_static_bus for USB3 port 2 done
1282 13:49:33.879321 scan_bus: bus USB3 port 2 finished in 6 msecs
1283 13:49:33.882371 scan_static_bus for USB0 port 0 done
1284 13:49:33.885532 scan_bus: bus USB0 port 0 finished in 43 msecs
1285 13:49:33.889079 scan_static_bus for PCI: 00:0d.0 done
1286 13:49:33.895870 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1287 13:49:33.899168 PCI: 00:14.0 scanning...
1288 13:49:33.902630 scan_static_bus for PCI: 00:14.0
1289 13:49:33.902801 USB0 port 0 enabled
1290 13:49:33.905673 USB0 port 0 scanning...
1291 13:49:33.909270 scan_static_bus for USB0 port 0
1292 13:49:33.909468 USB2 port 0 enabled
1293 13:49:33.912299 USB2 port 1 disabled
1294 13:49:33.916131 USB2 port 2 enabled
1295 13:49:33.916417 USB2 port 3 disabled
1296 13:49:33.919045 USB2 port 4 disabled
1297 13:49:33.922365 USB2 port 5 enabled
1298 13:49:33.922607 USB2 port 6 disabled
1299 13:49:33.925840 USB2 port 7 disabled
1300 13:49:33.928905 USB2 port 8 enabled
1301 13:49:33.928982 USB2 port 9 enabled
1302 13:49:33.932300 USB3 port 0 enabled
1303 13:49:33.932375 USB3 port 1 disabled
1304 13:49:33.935937 USB3 port 2 disabled
1305 13:49:33.939119 USB3 port 3 disabled
1306 13:49:33.939190 USB2 port 0 scanning...
1307 13:49:33.942472 scan_static_bus for USB2 port 0
1308 13:49:33.948955 scan_static_bus for USB2 port 0 done
1309 13:49:33.952667 scan_bus: bus USB2 port 0 finished in 6 msecs
1310 13:49:33.955731 USB2 port 2 scanning...
1311 13:49:33.959192 scan_static_bus for USB2 port 2
1312 13:49:33.962566 scan_static_bus for USB2 port 2 done
1313 13:49:33.965456 scan_bus: bus USB2 port 2 finished in 6 msecs
1314 13:49:33.968996 USB2 port 5 scanning...
1315 13:49:33.972411 scan_static_bus for USB2 port 5
1316 13:49:33.975664 scan_static_bus for USB2 port 5 done
1317 13:49:33.979126 scan_bus: bus USB2 port 5 finished in 6 msecs
1318 13:49:33.982320 USB2 port 8 scanning...
1319 13:49:33.985761 scan_static_bus for USB2 port 8
1320 13:49:33.989154 scan_static_bus for USB2 port 8 done
1321 13:49:33.995730 scan_bus: bus USB2 port 8 finished in 6 msecs
1322 13:49:33.995854 USB2 port 9 scanning...
1323 13:49:33.998882 scan_static_bus for USB2 port 9
1324 13:49:34.002167 scan_static_bus for USB2 port 9 done
1325 13:49:34.008683 scan_bus: bus USB2 port 9 finished in 6 msecs
1326 13:49:34.008765 USB3 port 0 scanning...
1327 13:49:34.012592 scan_static_bus for USB3 port 0
1328 13:49:34.018968 scan_static_bus for USB3 port 0 done
1329 13:49:34.022730 scan_bus: bus USB3 port 0 finished in 6 msecs
1330 13:49:34.025423 scan_static_bus for USB0 port 0 done
1331 13:49:34.029065 scan_bus: bus USB0 port 0 finished in 120 msecs
1332 13:49:34.035410 scan_static_bus for PCI: 00:14.0 done
1333 13:49:34.038724 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1334 13:49:34.042210 PCI: 00:14.3 scanning...
1335 13:49:34.045362 scan_static_bus for PCI: 00:14.3
1336 13:49:34.048874 GENERIC: 0.0 enabled
1337 13:49:34.052116 scan_static_bus for PCI: 00:14.3 done
1338 13:49:34.055548 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1339 13:49:34.058837 PCI: 00:15.0 scanning...
1340 13:49:34.062313 scan_static_bus for PCI: 00:15.0
1341 13:49:34.062638 I2C: 00:1a enabled
1342 13:49:34.065400 I2C: 00:31 enabled
1343 13:49:34.069014 I2C: 00:32 enabled
1344 13:49:34.072203 scan_static_bus for PCI: 00:15.0 done
1345 13:49:34.075982 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1346 13:49:34.079335 PCI: 00:15.1 scanning...
1347 13:49:34.082286 scan_static_bus for PCI: 00:15.1
1348 13:49:34.085994 I2C: 00:50 enabled
1349 13:49:34.089269 scan_static_bus for PCI: 00:15.1 done
1350 13:49:34.092822 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1351 13:49:34.095583 PCI: 00:15.3 scanning...
1352 13:49:34.098805 scan_static_bus for PCI: 00:15.3
1353 13:49:34.099300 I2C: 00:10 enabled
1354 13:49:34.105354 scan_static_bus for PCI: 00:15.3 done
1355 13:49:34.108832 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1356 13:49:34.112089 PCI: 00:19.1 scanning...
1357 13:49:34.115243 scan_static_bus for PCI: 00:19.1
1358 13:49:34.115468 I2C: 00:15 enabled
1359 13:49:34.118408 I2C: 00:2c enabled
1360 13:49:34.121773 scan_static_bus for PCI: 00:19.1 done
1361 13:49:34.128552 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1362 13:49:34.128787 PCI: 00:1e.3 scanning...
1363 13:49:34.132022 scan_generic_bus for PCI: 00:1e.3
1364 13:49:34.135114 SPI: 00 enabled
1365 13:49:34.142025 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1366 13:49:34.145443 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1367 13:49:34.148798 PCI: 00:1f.0 scanning...
1368 13:49:34.151908 scan_static_bus for PCI: 00:1f.0
1369 13:49:34.152301 PNP: 0c09.0 enabled
1370 13:49:34.155322 PNP: 0c09.0 scanning...
1371 13:49:34.158716 scan_static_bus for PNP: 0c09.0
1372 13:49:34.162073 scan_static_bus for PNP: 0c09.0 done
1373 13:49:34.168610 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1374 13:49:34.171827 scan_static_bus for PCI: 00:1f.0 done
1375 13:49:34.175694 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1376 13:49:34.178638 PCI: 00:1f.2 scanning...
1377 13:49:34.181923 scan_static_bus for PCI: 00:1f.2
1378 13:49:34.185424 GENERIC: 0.0 enabled
1379 13:49:34.185721 GENERIC: 0.0 scanning...
1380 13:49:34.188710 scan_static_bus for GENERIC: 0.0
1381 13:49:34.192020 GENERIC: 0.0 enabled
1382 13:49:34.195284 GENERIC: 1.0 enabled
1383 13:49:34.198721 scan_static_bus for GENERIC: 0.0 done
1384 13:49:34.202053 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1385 13:49:34.205304 scan_static_bus for PCI: 00:1f.2 done
1386 13:49:34.212007 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1387 13:49:34.215631 PCI: 00:1f.3 scanning...
1388 13:49:34.218825 scan_static_bus for PCI: 00:1f.3
1389 13:49:34.222075 scan_static_bus for PCI: 00:1f.3 done
1390 13:49:34.225308 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1391 13:49:34.228715 PCI: 00:1f.5 scanning...
1392 13:49:34.231782 scan_generic_bus for PCI: 00:1f.5
1393 13:49:34.235380 scan_generic_bus for PCI: 00:1f.5 done
1394 13:49:34.241795 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1395 13:49:34.245192 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1396 13:49:34.248724 scan_static_bus for Root Device done
1397 13:49:34.254957 scan_bus: bus Root Device finished in 729 msecs
1398 13:49:34.255288 done
1399 13:49:34.261875 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1400 13:49:34.265225 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1401 13:49:34.271639 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1402 13:49:34.275104 SPI flash protection: WPSW=0 SRP0=0
1403 13:49:34.281681 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1404 13:49:34.284956 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1405 13:49:34.288546 found VGA at PCI: 00:02.0
1406 13:49:34.291481 Setting up VGA for PCI: 00:02.0
1407 13:49:34.298371 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1408 13:49:34.301408 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1409 13:49:34.305079 Allocating resources...
1410 13:49:34.308036 Reading resources...
1411 13:49:34.311503 Root Device read_resources bus 0 link: 0
1412 13:49:34.314986 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1413 13:49:34.321891 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1414 13:49:34.324977 DOMAIN: 0000 read_resources bus 0 link: 0
1415 13:49:34.331592 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1416 13:49:34.338199 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1417 13:49:34.344683 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1418 13:49:34.348002 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1419 13:49:34.354589 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1420 13:49:34.361544 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1421 13:49:34.368077 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1422 13:49:34.374461 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1423 13:49:34.381687 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1424 13:49:34.387977 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1425 13:49:34.394673 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1426 13:49:34.401165 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1427 13:49:34.407720 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1428 13:49:34.414196 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1429 13:49:34.421115 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1430 13:49:34.424590 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1431 13:49:34.431040 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1432 13:49:34.437835 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1433 13:49:34.444008 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1434 13:49:34.451222 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1435 13:49:34.457384 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1436 13:49:34.460737 PCI: 00:04.0 read_resources bus 1 link: 0
1437 13:49:34.467662 PCI: 00:04.0 read_resources bus 1 link: 0 done
1438 13:49:34.470607 PCI: 00:06.0 read_resources bus 1 link: 0
1439 13:49:34.474066 PCI: 00:06.0 read_resources bus 1 link: 0 done
1440 13:49:34.480642 PCI: 00:0d.0 read_resources bus 0 link: 0
1441 13:49:34.483950 USB0 port 0 read_resources bus 0 link: 0
1442 13:49:34.487085 USB0 port 0 read_resources bus 0 link: 0 done
1443 13:49:34.493672 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1444 13:49:34.497529 PCI: 00:14.0 read_resources bus 0 link: 0
1445 13:49:34.500795 USB0 port 0 read_resources bus 0 link: 0
1446 13:49:34.503662 USB0 port 0 read_resources bus 0 link: 0 done
1447 13:49:34.510663 PCI: 00:14.0 read_resources bus 0 link: 0 done
1448 13:49:34.513526 PCI: 00:14.3 read_resources bus 0 link: 0
1449 13:49:34.520453 PCI: 00:14.3 read_resources bus 0 link: 0 done
1450 13:49:34.523752 PCI: 00:15.0 read_resources bus 0 link: 0
1451 13:49:34.526859 PCI: 00:15.0 read_resources bus 0 link: 0 done
1452 13:49:34.533750 PCI: 00:15.1 read_resources bus 0 link: 0
1453 13:49:34.536880 PCI: 00:15.1 read_resources bus 0 link: 0 done
1454 13:49:34.540495 PCI: 00:15.3 read_resources bus 0 link: 0
1455 13:49:34.547121 PCI: 00:15.3 read_resources bus 0 link: 0 done
1456 13:49:34.550373 PCI: 00:19.1 read_resources bus 0 link: 0
1457 13:49:34.556971 PCI: 00:19.1 read_resources bus 0 link: 0 done
1458 13:49:34.560997 PCI: 00:1e.3 read_resources bus 2 link: 0
1459 13:49:34.563777 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1460 13:49:34.570666 PCI: 00:1f.0 read_resources bus 0 link: 0
1461 13:49:34.574055 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1462 13:49:34.577212 PCI: 00:1f.2 read_resources bus 0 link: 0
1463 13:49:34.580381 GENERIC: 0.0 read_resources bus 0 link: 0
1464 13:49:34.587349 GENERIC: 0.0 read_resources bus 0 link: 0 done
1465 13:49:34.590394 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1466 13:49:34.596941 DOMAIN: 0000 read_resources bus 0 link: 0 done
1467 13:49:34.600460 Root Device read_resources bus 0 link: 0 done
1468 13:49:34.604192 Done reading resources.
1469 13:49:34.610760 Show resources in subtree (Root Device)...After reading.
1470 13:49:34.613691 Root Device child on link 0 CPU_CLUSTER: 0
1471 13:49:34.617101 CPU_CLUSTER: 0 child on link 0 APIC: 00
1472 13:49:34.620229 APIC: 00
1473 13:49:34.620628 APIC: 14
1474 13:49:34.621036 APIC: 16
1475 13:49:34.623848 APIC: 10
1476 13:49:34.624360 APIC: 12
1477 13:49:34.626988 APIC: 01
1478 13:49:34.627538 APIC: 08
1479 13:49:34.628036 APIC: 09
1480 13:49:34.633510 DOMAIN: 0000 child on link 0 GPIO: 0
1481 13:49:34.640127 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1482 13:49:34.650183 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1483 13:49:34.653516 GPIO: 0
1484 13:49:34.653899 PCI: 00:00.0
1485 13:49:34.663652 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1486 13:49:34.673595 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1487 13:49:34.683758 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1488 13:49:34.690175 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1489 13:49:34.699974 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1490 13:49:34.710151 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1491 13:49:34.720109 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1492 13:49:34.730027 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1493 13:49:34.740084 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1494 13:49:34.750322 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1495 13:49:34.756899 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1496 13:49:34.766914 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1497 13:49:34.776836 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1498 13:49:34.787014 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1499 13:49:34.796250 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1500 13:49:34.803247 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1501 13:49:34.813338 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1502 13:49:34.823012 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1503 13:49:34.832949 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1504 13:49:34.843244 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1505 13:49:34.853135 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1506 13:49:34.862970 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1507 13:49:34.873067 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1508 13:49:34.879745 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1509 13:49:34.892928 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1510 13:49:34.899032 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1511 13:49:34.909227 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1512 13:49:34.919385 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1513 13:49:34.919468 PCI: 00:02.0
1514 13:49:34.932688 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1515 13:49:34.942809 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1516 13:49:34.949348 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1517 13:49:34.955854 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1518 13:49:34.965796 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1519 13:49:34.965902 GENERIC: 0.0
1520 13:49:34.972401 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1521 13:49:34.978940 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1522 13:49:34.989009 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1523 13:49:34.998493 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1524 13:49:34.998572 PCI: 01:00.0
1525 13:49:35.012076 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1526 13:49:35.018588 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1527 13:49:35.021695 PCI: 00:08.0
1528 13:49:35.021798 PCI: 00:0a.0
1529 13:49:35.031904 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1530 13:49:35.038452 PCI: 00:0d.0 child on link 0 USB0 port 0
1531 13:49:35.048366 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1532 13:49:35.051647 USB0 port 0 child on link 0 USB3 port 0
1533 13:49:35.054995 USB3 port 0
1534 13:49:35.055160 USB3 port 1
1535 13:49:35.058300 USB3 port 2
1536 13:49:35.058433 USB3 port 3
1537 13:49:35.065041 PCI: 00:14.0 child on link 0 USB0 port 0
1538 13:49:35.075037 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1539 13:49:35.078339 USB0 port 0 child on link 0 USB2 port 0
1540 13:49:35.082042 USB2 port 0
1541 13:49:35.082418 USB2 port 1
1542 13:49:35.085184 USB2 port 2
1543 13:49:35.085638 USB2 port 3
1544 13:49:35.088654 USB2 port 4
1545 13:49:35.089115 USB2 port 5
1546 13:49:35.092013 USB2 port 6
1547 13:49:35.092450 USB2 port 7
1548 13:49:35.095646 USB2 port 8
1549 13:49:35.096297 USB2 port 9
1550 13:49:35.098670 USB3 port 0
1551 13:49:35.099255 USB3 port 1
1552 13:49:35.102263 USB3 port 2
1553 13:49:35.102881 USB3 port 3
1554 13:49:35.105570 PCI: 00:14.2
1555 13:49:35.115034 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1556 13:49:35.124720 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1557 13:49:35.128237 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1558 13:49:35.138281 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 13:49:35.141455 GENERIC: 0.0
1560 13:49:35.144903 PCI: 00:15.0 child on link 0 I2C: 00:1a
1561 13:49:35.154576 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 13:49:35.158198 I2C: 00:1a
1563 13:49:35.158280 I2C: 00:31
1564 13:49:35.158346 I2C: 00:32
1565 13:49:35.164828 PCI: 00:15.1 child on link 0 I2C: 00:50
1566 13:49:35.174642 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 13:49:35.174726 I2C: 00:50
1568 13:49:35.178017 PCI: 00:15.2
1569 13:49:35.181241 PCI: 00:15.3 child on link 0 I2C: 00:10
1570 13:49:35.191189 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 13:49:35.191312 I2C: 00:10
1572 13:49:35.194677 PCI: 00:16.0
1573 13:49:35.204740 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 13:49:35.204826 PCI: 00:19.0
1575 13:49:35.211152 PCI: 00:19.1 child on link 0 I2C: 00:15
1576 13:49:35.221312 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 13:49:35.221396 I2C: 00:15
1578 13:49:35.224907 I2C: 00:2c
1579 13:49:35.224989 PCI: 00:1e.0
1580 13:49:35.238219 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1581 13:49:35.241216 PCI: 00:1e.3 child on link 0 SPI: 00
1582 13:49:35.251156 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 13:49:35.251268 SPI: 00
1584 13:49:35.254939 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1585 13:49:35.264601 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1586 13:49:35.267818 PNP: 0c09.0
1587 13:49:35.274839 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1588 13:49:35.281391 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1589 13:49:35.287683 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1590 13:49:35.297969 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1591 13:49:35.304539 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1592 13:49:35.304625 GENERIC: 0.0
1593 13:49:35.307991 GENERIC: 1.0
1594 13:49:35.308080 PCI: 00:1f.3
1595 13:49:35.317676 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1596 13:49:35.327721 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1597 13:49:35.331321 PCI: 00:1f.5
1598 13:49:35.337577 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1599 13:49:35.347878 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1600 13:49:35.350845 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1601 13:49:35.357516 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1602 13:49:35.364117 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1603 13:49:35.367659 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1604 13:49:35.374209 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1605 13:49:35.380741 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1606 13:49:35.387553 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1607 13:49:35.394274 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1608 13:49:35.400945 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1609 13:49:35.407493 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1610 13:49:35.417626 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1611 13:49:35.424179 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1612 13:49:35.431136 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1613 13:49:35.434307 DOMAIN: 0000: Resource ranges:
1614 13:49:35.437249 * Base: 1000, Size: 800, Tag: 100
1615 13:49:35.440533 * Base: 1900, Size: e700, Tag: 100
1616 13:49:35.447117 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1617 13:49:35.454360 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1618 13:49:35.460872 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1619 13:49:35.467175 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1620 13:49:35.477252 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1621 13:49:35.483586 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1622 13:49:35.490461 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1623 13:49:35.500546 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1624 13:49:35.507345 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1625 13:49:35.513650 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1626 13:49:35.520226 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1627 13:49:35.530385 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1628 13:49:35.537087 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1629 13:49:35.543690 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1630 13:49:35.553623 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1631 13:49:35.560405 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1632 13:49:35.567188 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1633 13:49:35.576617 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1634 13:49:35.583387 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1635 13:49:35.589993 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1636 13:49:35.600153 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1637 13:49:35.606650 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1638 13:49:35.613458 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1639 13:49:35.623588 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1640 13:49:35.630265 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1641 13:49:35.636873 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1642 13:49:35.646779 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1643 13:49:35.653356 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1644 13:49:35.660055 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1645 13:49:35.669804 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1646 13:49:35.676538 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1647 13:49:35.683116 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1648 13:49:35.693419 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1649 13:49:35.696700 DOMAIN: 0000: Resource ranges:
1650 13:49:35.699796 * Base: 80400000, Size: 3fc00000, Tag: 200
1651 13:49:35.703278 * Base: d0000000, Size: 28000000, Tag: 200
1652 13:49:35.706631 * Base: fa000000, Size: 1000000, Tag: 200
1653 13:49:35.713438 * Base: fb001000, Size: 17ff000, Tag: 200
1654 13:49:35.716477 * Base: fe800000, Size: 300000, Tag: 200
1655 13:49:35.719924 * Base: feb80000, Size: 80000, Tag: 200
1656 13:49:35.726427 * Base: fed00000, Size: 40000, Tag: 200
1657 13:49:35.729644 * Base: fed70000, Size: 10000, Tag: 200
1658 13:49:35.733334 * Base: fed88000, Size: 8000, Tag: 200
1659 13:49:35.736469 * Base: fed93000, Size: d000, Tag: 200
1660 13:49:35.739716 * Base: feda2000, Size: 1e000, Tag: 200
1661 13:49:35.746474 * Base: fede0000, Size: 1220000, Tag: 200
1662 13:49:35.750031 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1663 13:49:35.756339 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1664 13:49:35.763389 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1665 13:49:35.769950 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1666 13:49:35.776564 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1667 13:49:35.782948 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1668 13:49:35.789576 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1669 13:49:35.796205 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1670 13:49:35.802913 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1671 13:49:35.810014 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1672 13:49:35.816127 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1673 13:49:35.823153 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1674 13:49:35.829224 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1675 13:49:35.836058 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1676 13:49:35.842783 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1677 13:49:35.849440 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1678 13:49:35.855863 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1679 13:49:35.863059 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1680 13:49:35.869435 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1681 13:49:35.875872 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1682 13:49:35.886102 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1683 13:49:35.892548 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1684 13:49:35.895628 PCI: 00:06.0: Resource ranges:
1685 13:49:35.899134 * Base: 80400000, Size: 100000, Tag: 200
1686 13:49:35.905881 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1687 13:49:35.912368 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1688 13:49:35.922361 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1689 13:49:35.929017 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1690 13:49:35.932354 Root Device assign_resources, bus 0 link: 0
1691 13:49:35.938960 DOMAIN: 0000 assign_resources, bus 0 link: 0
1692 13:49:35.945549 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1693 13:49:35.952500 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1694 13:49:35.961726 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1695 13:49:35.968592 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1696 13:49:35.975279 PCI: 00:04.0 assign_resources, bus 1 link: 0
1697 13:49:35.978387 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1698 13:49:35.988253 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1699 13:49:35.998355 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1700 13:49:36.004690 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1701 13:49:36.011457 PCI: 00:06.0 assign_resources, bus 1 link: 0
1702 13:49:36.018119 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1703 13:49:36.025081 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1704 13:49:36.031318 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1705 13:49:36.038251 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1706 13:49:36.048373 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1707 13:49:36.051390 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1708 13:49:36.058075 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1709 13:49:36.064524 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1710 13:49:36.067824 PCI: 00:14.0 assign_resources, bus 0 link: 0
1711 13:49:36.074718 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1712 13:49:36.080937 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1713 13:49:36.090889 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1714 13:49:36.097536 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1715 13:49:36.104216 PCI: 00:14.3 assign_resources, bus 0 link: 0
1716 13:49:36.107472 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1717 13:49:36.113923 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1718 13:49:36.120491 PCI: 00:15.0 assign_resources, bus 0 link: 0
1719 13:49:36.124022 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1720 13:49:36.134060 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1721 13:49:36.137507 PCI: 00:15.1 assign_resources, bus 0 link: 0
1722 13:49:36.143777 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1723 13:49:36.150437 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1724 13:49:36.153775 PCI: 00:15.3 assign_resources, bus 0 link: 0
1725 13:49:36.160794 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1726 13:49:36.167013 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1727 13:49:36.177211 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1728 13:49:36.180629 PCI: 00:19.1 assign_resources, bus 0 link: 0
1729 13:49:36.187279 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1730 13:49:36.193805 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1731 13:49:36.197125 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1732 13:49:36.203650 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1733 13:49:36.206778 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1734 13:49:36.213420 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1735 13:49:36.217350 LPC: Trying to open IO window from 800 size 1ff
1736 13:49:36.224010 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1737 13:49:36.233614 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1738 13:49:36.240555 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1739 13:49:36.246655 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1740 13:49:36.250726 Root Device assign_resources, bus 0 link: 0 done
1741 13:49:36.253647 Done setting resources.
1742 13:49:36.260529 Show resources in subtree (Root Device)...After assigning values.
1743 13:49:36.263986 Root Device child on link 0 CPU_CLUSTER: 0
1744 13:49:36.270238 CPU_CLUSTER: 0 child on link 0 APIC: 00
1745 13:49:36.270442 APIC: 00
1746 13:49:36.270602 APIC: 14
1747 13:49:36.273514 APIC: 16
1748 13:49:36.273755 APIC: 10
1749 13:49:36.273947 APIC: 12
1750 13:49:36.277194 APIC: 01
1751 13:49:36.277495 APIC: 08
1752 13:49:36.280278 APIC: 09
1753 13:49:36.283628 DOMAIN: 0000 child on link 0 GPIO: 0
1754 13:49:36.293672 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1755 13:49:36.303625 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1756 13:49:36.304026 GPIO: 0
1757 13:49:36.304335 PCI: 00:00.0
1758 13:49:36.313689 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1759 13:49:36.323290 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1760 13:49:36.333320 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1761 13:49:36.343502 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1762 13:49:36.353386 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1763 13:49:36.360000 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1764 13:49:36.369781 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1765 13:49:36.379753 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1766 13:49:36.389826 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1767 13:49:36.399637 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1768 13:49:36.409869 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1769 13:49:36.419811 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1770 13:49:36.426124 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1771 13:49:36.436245 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1772 13:49:36.445870 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1773 13:49:36.455949 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1774 13:49:36.465987 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1775 13:49:36.475890 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1776 13:49:36.486040 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1777 13:49:36.496022 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1778 13:49:36.502580 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1779 13:49:36.512479 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1780 13:49:36.522280 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1781 13:49:36.532230 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1782 13:49:36.542521 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1783 13:49:36.551951 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1784 13:49:36.561691 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1785 13:49:36.571771 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1786 13:49:36.571858 PCI: 00:02.0
1787 13:49:36.581323 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1788 13:49:36.594866 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1789 13:49:36.601358 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1790 13:49:36.608045 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1791 13:49:36.617688 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1792 13:49:36.617786 GENERIC: 0.0
1793 13:49:36.624505 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1794 13:49:36.634235 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1795 13:49:36.644459 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1796 13:49:36.654372 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1797 13:49:36.657368 PCI: 01:00.0
1798 13:49:36.667545 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1799 13:49:36.677625 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1800 13:49:36.677708 PCI: 00:08.0
1801 13:49:36.680481 PCI: 00:0a.0
1802 13:49:36.690182 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1803 13:49:36.693645 PCI: 00:0d.0 child on link 0 USB0 port 0
1804 13:49:36.707099 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1805 13:49:36.710578 USB0 port 0 child on link 0 USB3 port 0
1806 13:49:36.710704 USB3 port 0
1807 13:49:36.713466 USB3 port 1
1808 13:49:36.717031 USB3 port 2
1809 13:49:36.717115 USB3 port 3
1810 13:49:36.720241 PCI: 00:14.0 child on link 0 USB0 port 0
1811 13:49:36.733869 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1812 13:49:36.736932 USB0 port 0 child on link 0 USB2 port 0
1813 13:49:36.737018 USB2 port 0
1814 13:49:36.740219 USB2 port 1
1815 13:49:36.740303 USB2 port 2
1816 13:49:36.743405 USB2 port 3
1817 13:49:36.746685 USB2 port 4
1818 13:49:36.746769 USB2 port 5
1819 13:49:36.750160 USB2 port 6
1820 13:49:36.750244 USB2 port 7
1821 13:49:36.753722 USB2 port 8
1822 13:49:36.753806 USB2 port 9
1823 13:49:36.756877 USB3 port 0
1824 13:49:36.756961 USB3 port 1
1825 13:49:36.760529 USB3 port 2
1826 13:49:36.760613 USB3 port 3
1827 13:49:36.763681 PCI: 00:14.2
1828 13:49:36.773189 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1829 13:49:36.783276 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1830 13:49:36.786562 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1831 13:49:36.800048 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1832 13:49:36.800135 GENERIC: 0.0
1833 13:49:36.803080 PCI: 00:15.0 child on link 0 I2C: 00:1a
1834 13:49:36.813162 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1835 13:49:36.816697 I2C: 00:1a
1836 13:49:36.816780 I2C: 00:31
1837 13:49:36.819822 I2C: 00:32
1838 13:49:36.822926 PCI: 00:15.1 child on link 0 I2C: 00:50
1839 13:49:36.833111 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1840 13:49:36.836247 I2C: 00:50
1841 13:49:36.836328 PCI: 00:15.2
1842 13:49:36.843173 PCI: 00:15.3 child on link 0 I2C: 00:10
1843 13:49:36.852805 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1844 13:49:36.852915 I2C: 00:10
1845 13:49:36.856210 PCI: 00:16.0
1846 13:49:36.866286 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1847 13:49:36.866375 PCI: 00:19.0
1848 13:49:36.873398 PCI: 00:19.1 child on link 0 I2C: 00:15
1849 13:49:36.882777 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1850 13:49:36.882928 I2C: 00:15
1851 13:49:36.886234 I2C: 00:2c
1852 13:49:36.886355 PCI: 00:1e.0
1853 13:49:36.896707 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1854 13:49:36.903108 PCI: 00:1e.3 child on link 0 SPI: 00
1855 13:49:36.913030 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1856 13:49:36.913299 SPI: 00
1857 13:49:36.919933 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1858 13:49:36.926375 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1859 13:49:36.929546 PNP: 0c09.0
1860 13:49:36.935998 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1861 13:49:36.943297 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1862 13:49:36.949680 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1863 13:49:36.959747 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1864 13:49:36.965775 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1865 13:49:36.965858 GENERIC: 0.0
1866 13:49:36.969374 GENERIC: 1.0
1867 13:49:36.969456 PCI: 00:1f.3
1868 13:49:36.979491 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1869 13:49:36.992345 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1870 13:49:36.992428 PCI: 00:1f.5
1871 13:49:37.002285 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1872 13:49:37.005689 Done allocating resources.
1873 13:49:37.012489 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1874 13:49:37.015558 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1875 13:49:37.022334 Configure audio over I2S with MAX98373 NAU88L25B.
1876 13:49:37.026735 Enabling BT offload
1877 13:49:37.033994 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1878 13:49:37.037166 Enabling resources...
1879 13:49:37.040618 PCI: 00:00.0 subsystem <- 8086/4609
1880 13:49:37.044175 PCI: 00:00.0 cmd <- 06
1881 13:49:37.047397 PCI: 00:02.0 subsystem <- 8086/46b3
1882 13:49:37.050419 PCI: 00:02.0 cmd <- 03
1883 13:49:37.053755 PCI: 00:04.0 subsystem <- 8086/461d
1884 13:49:37.053828 PCI: 00:04.0 cmd <- 02
1885 13:49:37.057475 PCI: 00:06.0 bridge ctrl <- 0013
1886 13:49:37.060882 PCI: 00:06.0 subsystem <- 8086/464d
1887 13:49:37.063916 PCI: 00:06.0 cmd <- 106
1888 13:49:37.067425 PCI: 00:0a.0 subsystem <- 8086/467d
1889 13:49:37.070502 PCI: 00:0a.0 cmd <- 02
1890 13:49:37.073832 PCI: 00:0d.0 subsystem <- 8086/461e
1891 13:49:37.077345 PCI: 00:0d.0 cmd <- 02
1892 13:49:37.080738 PCI: 00:14.0 subsystem <- 8086/51ed
1893 13:49:37.083540 PCI: 00:14.0 cmd <- 02
1894 13:49:37.086978 PCI: 00:14.2 subsystem <- 8086/51ef
1895 13:49:37.087071 PCI: 00:14.2 cmd <- 02
1896 13:49:37.093595 PCI: 00:14.3 subsystem <- 8086/51f0
1897 13:49:37.093707 PCI: 00:14.3 cmd <- 02
1898 13:49:37.097126 PCI: 00:15.0 subsystem <- 8086/51e8
1899 13:49:37.100371 PCI: 00:15.0 cmd <- 02
1900 13:49:37.103903 PCI: 00:15.1 subsystem <- 8086/51e9
1901 13:49:37.107126 PCI: 00:15.1 cmd <- 06
1902 13:49:37.110160 PCI: 00:15.3 subsystem <- 8086/51eb
1903 13:49:37.113457 PCI: 00:15.3 cmd <- 02
1904 13:49:37.116987 PCI: 00:16.0 subsystem <- 8086/51e0
1905 13:49:37.117089 PCI: 00:16.0 cmd <- 02
1906 13:49:37.123603 PCI: 00:19.1 subsystem <- 8086/51c6
1907 13:49:37.123709 PCI: 00:19.1 cmd <- 02
1908 13:49:37.127109 PCI: 00:1e.0 subsystem <- 8086/51a8
1909 13:49:37.130115 PCI: 00:1e.0 cmd <- 06
1910 13:49:37.133498 PCI: 00:1e.3 subsystem <- 8086/51ab
1911 13:49:37.136951 PCI: 00:1e.3 cmd <- 02
1912 13:49:37.140537 PCI: 00:1f.0 subsystem <- 8086/5182
1913 13:49:37.143600 PCI: 00:1f.0 cmd <- 407
1914 13:49:37.147166 PCI: 00:1f.3 subsystem <- 8086/51c8
1915 13:49:37.147642 PCI: 00:1f.3 cmd <- 02
1916 13:49:37.154009 PCI: 00:1f.5 subsystem <- 8086/51a4
1917 13:49:37.154584 PCI: 00:1f.5 cmd <- 406
1918 13:49:37.157241 PCI: 01:00.0 cmd <- 02
1919 13:49:37.157720 done.
1920 13:49:37.163731 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1921 13:49:37.167511 ME: Version: Unavailable
1922 13:49:37.170310 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1923 13:49:37.173669 Initializing devices...
1924 13:49:37.177573 Root Device init
1925 13:49:37.178050 mainboard: EC init
1926 13:49:37.183840 Chrome EC: Set SMI mask to 0x0000000000000000
1927 13:49:37.184319 Chrome EC: UHEPI supported
1928 13:49:37.191520 Chrome EC: clear events_b mask to 0x0000000000000000
1929 13:49:37.198055 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1930 13:49:37.204581 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1931 13:49:37.211048 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1932 13:49:37.214516 Chrome EC: Set WAKE mask to 0x0000000000000000
1933 13:49:37.221874 Root Device init finished in 40 msecs
1934 13:49:37.222416 PCI: 00:00.0 init
1935 13:49:37.225189 CPU TDP = 15 Watts
1936 13:49:37.228526 CPU PL1 = 15 Watts
1937 13:49:37.228996 CPU PL2 = 55 Watts
1938 13:49:37.231976 CPU PL4 = 123 Watts
1939 13:49:37.235394 PCI: 00:00.0 init finished in 8 msecs
1940 13:49:37.238606 PCI: 00:02.0 init
1941 13:49:37.239336 GMA: Found VBT in CBFS
1942 13:49:37.242276 GMA: Found valid VBT in CBFS
1943 13:49:37.248574 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1944 13:49:37.255215 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1945 13:49:37.258616 PCI: 00:02.0 init finished in 18 msecs
1946 13:49:37.262201 PCI: 00:06.0 init
1947 13:49:37.265589 Initializing PCH PCIe bridge.
1948 13:49:37.268506 PCI: 00:06.0 init finished in 3 msecs
1949 13:49:37.271868 PCI: 00:0a.0 init
1950 13:49:37.275334 PCI: 00:0a.0 init finished in 0 msecs
1951 13:49:37.275855 PCI: 00:14.0 init
1952 13:49:37.278593 PCI: 00:14.0 init finished in 0 msecs
1953 13:49:37.281767 PCI: 00:14.2 init
1954 13:49:37.285343 PCI: 00:14.2 init finished in 0 msecs
1955 13:49:37.288350 PCI: 00:15.0 init
1956 13:49:37.291493 I2C bus 0 version 0x3230302a
1957 13:49:37.294668 DW I2C bus 0 at 0x80655000 (400 KHz)
1958 13:49:37.298164 PCI: 00:15.0 init finished in 6 msecs
1959 13:49:37.298247 PCI: 00:15.1 init
1960 13:49:37.301904 I2C bus 1 version 0x3230302a
1961 13:49:37.304736 DW I2C bus 1 at 0x80656000 (400 KHz)
1962 13:49:37.307900 PCI: 00:15.1 init finished in 6 msecs
1963 13:49:37.311726 PCI: 00:15.3 init
1964 13:49:37.314901 I2C bus 3 version 0x3230302a
1965 13:49:37.317934 DW I2C bus 3 at 0x80657000 (400 KHz)
1966 13:49:37.321338 PCI: 00:15.3 init finished in 6 msecs
1967 13:49:37.325237 PCI: 00:16.0 init
1968 13:49:37.327833 PCI: 00:16.0 init finished in 0 msecs
1969 13:49:37.327919 PCI: 00:19.1 init
1970 13:49:37.331096 I2C bus 5 version 0x3230302a
1971 13:49:37.334677 DW I2C bus 5 at 0x80659000 (400 KHz)
1972 13:49:37.341254 PCI: 00:19.1 init finished in 6 msecs
1973 13:49:37.341341 PCI: 00:1f.0 init
1974 13:49:37.344974 IOAPIC: Initializing IOAPIC at 0xfec00000
1975 13:49:37.348538 IOAPIC: ID = 0x02
1976 13:49:37.351672 IOAPIC: Dumping registers
1977 13:49:37.354867 reg 0x0000: 0x02000000
1978 13:49:37.355353 reg 0x0001: 0x00770020
1979 13:49:37.358191 reg 0x0002: 0x00000000
1980 13:49:37.361954 IOAPIC: 120 interrupts
1981 13:49:37.365694 IOAPIC: Clearing IOAPIC at 0xfec00000
1982 13:49:37.368229 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1983 13:49:37.375031 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1984 13:49:37.378063 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1985 13:49:37.384787 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1986 13:49:37.388433 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1987 13:49:37.394719 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1988 13:49:37.398622 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1989 13:49:37.404921 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1990 13:49:37.407848 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1991 13:49:37.411488 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1992 13:49:37.418219 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1993 13:49:37.421340 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1994 13:49:37.428182 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1995 13:49:37.431206 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1996 13:49:37.437772 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1997 13:49:37.441401 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1998 13:49:37.447830 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1999 13:49:37.451620 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2000 13:49:37.454690 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2001 13:49:37.461550 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2002 13:49:37.464984 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2003 13:49:37.471382 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2004 13:49:37.474547 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2005 13:49:37.481501 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2006 13:49:37.484523 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2007 13:49:37.491138 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2008 13:49:37.494593 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2009 13:49:37.497795 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2010 13:49:37.504621 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2011 13:49:37.508183 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2012 13:49:37.515040 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2013 13:49:37.517863 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2014 13:49:37.524472 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2015 13:49:37.527868 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2016 13:49:37.531335 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2017 13:49:37.537746 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2018 13:49:37.541335 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2019 13:49:37.548056 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2020 13:49:37.551131 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2021 13:49:37.557762 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2022 13:49:37.561247 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2023 13:49:37.567799 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2024 13:49:37.570958 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2025 13:49:37.574566 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2026 13:49:37.580907 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2027 13:49:37.584397 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2028 13:49:37.591426 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2029 13:49:37.594128 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2030 13:49:37.601117 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2031 13:49:37.604526 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2032 13:49:37.611157 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2033 13:49:37.614410 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2034 13:49:37.617740 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2035 13:49:37.624399 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2036 13:49:37.627579 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2037 13:49:37.634565 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2038 13:49:37.637527 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2039 13:49:37.643974 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2040 13:49:37.647799 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2041 13:49:37.651029 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2042 13:49:37.657658 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2043 13:49:37.661616 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2044 13:49:37.667365 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2045 13:49:37.670978 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2046 13:49:37.677787 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2047 13:49:37.680995 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2048 13:49:37.687442 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2049 13:49:37.690619 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2050 13:49:37.694139 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2051 13:49:37.700541 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2052 13:49:37.703996 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2053 13:49:37.710633 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2054 13:49:37.713978 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2055 13:49:37.720971 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2056 13:49:37.723901 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2057 13:49:37.730762 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2058 13:49:37.733825 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2059 13:49:37.737163 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2060 13:49:37.744372 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2061 13:49:37.747721 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2062 13:49:37.754312 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2063 13:49:37.757221 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2064 13:49:37.764338 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2065 13:49:37.767352 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2066 13:49:37.773875 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2067 13:49:37.777807 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2068 13:49:37.780794 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2069 13:49:37.787367 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2070 13:49:37.791071 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2071 13:49:37.796957 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2072 13:49:37.800818 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2073 13:49:37.806908 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2074 13:49:37.810386 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2075 13:49:37.813993 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2076 13:49:37.820751 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2077 13:49:37.823829 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2078 13:49:37.830266 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2079 13:49:37.833738 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2080 13:49:37.840857 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2081 13:49:37.843597 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2082 13:49:37.850308 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2083 13:49:37.853674 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2084 13:49:37.857114 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2085 13:49:37.863921 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2086 13:49:37.867358 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2087 13:49:37.873608 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2088 13:49:37.876983 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2089 13:49:37.883435 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2090 13:49:37.887119 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2091 13:49:37.893433 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2092 13:49:37.897055 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2093 13:49:37.900737 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2094 13:49:37.906778 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2095 13:49:37.910140 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2096 13:49:37.916757 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2097 13:49:37.919997 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2098 13:49:37.926678 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2099 13:49:37.930166 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2100 13:49:37.936528 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2101 13:49:37.940111 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2102 13:49:37.943260 IOAPIC: Bootstrap Processor Local APIC = 0x00
2103 13:49:37.950071 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2104 13:49:37.953498 PCI: 00:1f.0 init finished in 607 msecs
2105 13:49:37.956619 PCI: 00:1f.2 init
2106 13:49:37.960062 apm_control: Disabling ACPI.
2107 13:49:37.963732 APMC done.
2108 13:49:37.966760 PCI: 00:1f.2 init finished in 6 msecs
2109 13:49:37.967277 PCI: 00:1f.3 init
2110 13:49:37.970013 PCI: 00:1f.3 init finished in 0 msecs
2111 13:49:37.973286 PCI: 01:00.0 init
2112 13:49:37.976881 PCI: 01:00.0 init finished in 0 msecs
2113 13:49:37.980399 PNP: 0c09.0 init
2114 13:49:37.983391 Google Chrome EC uptime: 12.067 seconds
2115 13:49:37.986738 Google Chrome AP resets since EC boot: 1
2116 13:49:37.993525 Google Chrome most recent AP reset causes:
2117 13:49:37.997161 0.342: 32775 shutdown: entering G3
2118 13:49:38.003258 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2119 13:49:38.006719 PNP: 0c09.0 init finished in 23 msecs
2120 13:49:38.007197 GENERIC: 0.0 init
2121 13:49:38.013285 GENERIC: 0.0 init finished in 0 msecs
2122 13:49:38.013919 GENERIC: 1.0 init
2123 13:49:38.016567 GENERIC: 1.0 init finished in 0 msecs
2124 13:49:38.019970 Devices initialized
2125 13:49:38.023332 Show all devs... After init.
2126 13:49:38.023795 Root Device: enabled 1
2127 13:49:38.026809 CPU_CLUSTER: 0: enabled 1
2128 13:49:38.031067 DOMAIN: 0000: enabled 1
2129 13:49:38.033177 GPIO: 0: enabled 1
2130 13:49:38.033635 PCI: 00:00.0: enabled 1
2131 13:49:38.036626 PCI: 00:01.0: enabled 0
2132 13:49:38.040065 PCI: 00:01.1: enabled 0
2133 13:49:38.043026 PCI: 00:02.0: enabled 1
2134 13:49:38.043541 PCI: 00:04.0: enabled 1
2135 13:49:38.046452 PCI: 00:05.0: enabled 0
2136 13:49:38.049967 PCI: 00:06.0: enabled 1
2137 13:49:38.050467 PCI: 00:06.2: enabled 0
2138 13:49:38.053502 PCI: 00:07.0: enabled 0
2139 13:49:38.056828 PCI: 00:07.1: enabled 0
2140 13:49:38.060101 PCI: 00:07.2: enabled 0
2141 13:49:38.060558 PCI: 00:07.3: enabled 0
2142 13:49:38.062887 PCI: 00:08.0: enabled 0
2143 13:49:38.066699 PCI: 00:09.0: enabled 0
2144 13:49:38.069984 PCI: 00:0a.0: enabled 1
2145 13:49:38.070505 PCI: 00:0d.0: enabled 1
2146 13:49:38.073589 PCI: 00:0d.1: enabled 0
2147 13:49:38.076811 PCI: 00:0d.2: enabled 0
2148 13:49:38.079702 PCI: 00:0d.3: enabled 0
2149 13:49:38.080162 PCI: 00:0e.0: enabled 0
2150 13:49:38.083269 PCI: 00:10.0: enabled 0
2151 13:49:38.086248 PCI: 00:10.1: enabled 0
2152 13:49:38.090088 PCI: 00:10.6: enabled 0
2153 13:49:38.090651 PCI: 00:10.7: enabled 0
2154 13:49:38.093494 PCI: 00:12.0: enabled 0
2155 13:49:38.096247 PCI: 00:12.6: enabled 0
2156 13:49:38.096797 PCI: 00:12.7: enabled 0
2157 13:49:38.099649 PCI: 00:13.0: enabled 0
2158 13:49:38.103464 PCI: 00:14.0: enabled 1
2159 13:49:38.106641 PCI: 00:14.1: enabled 0
2160 13:49:38.107099 PCI: 00:14.2: enabled 1
2161 13:49:38.109602 PCI: 00:14.3: enabled 1
2162 13:49:38.113122 PCI: 00:15.0: enabled 1
2163 13:49:38.116469 PCI: 00:15.1: enabled 1
2164 13:49:38.116928 PCI: 00:15.2: enabled 0
2165 13:49:38.119584 PCI: 00:15.3: enabled 1
2166 13:49:38.122954 PCI: 00:16.0: enabled 1
2167 13:49:38.125966 PCI: 00:16.1: enabled 0
2168 13:49:38.126421 PCI: 00:16.2: enabled 0
2169 13:49:38.129425 PCI: 00:16.3: enabled 0
2170 13:49:38.133118 PCI: 00:16.4: enabled 0
2171 13:49:38.133576 PCI: 00:16.5: enabled 0
2172 13:49:38.136135 PCI: 00:17.0: enabled 0
2173 13:49:38.139756 PCI: 00:19.0: enabled 0
2174 13:49:38.143276 PCI: 00:19.1: enabled 1
2175 13:49:38.143804 PCI: 00:19.2: enabled 0
2176 13:49:38.145934 PCI: 00:1a.0: enabled 0
2177 13:49:38.149316 PCI: 00:1c.0: enabled 0
2178 13:49:38.152989 PCI: 00:1c.1: enabled 0
2179 13:49:38.153445 PCI: 00:1c.2: enabled 0
2180 13:49:38.156209 PCI: 00:1c.3: enabled 0
2181 13:49:38.159735 PCI: 00:1c.4: enabled 0
2182 13:49:38.162630 PCI: 00:1c.5: enabled 0
2183 13:49:38.163089 PCI: 00:1c.6: enabled 0
2184 13:49:38.166362 PCI: 00:1c.7: enabled 0
2185 13:49:38.169302 PCI: 00:1d.0: enabled 0
2186 13:49:38.172789 PCI: 00:1d.1: enabled 0
2187 13:49:38.173246 PCI: 00:1d.2: enabled 0
2188 13:49:38.176057 PCI: 00:1d.3: enabled 0
2189 13:49:38.179464 PCI: 00:1e.0: enabled 1
2190 13:49:38.179923 PCI: 00:1e.1: enabled 0
2191 13:49:38.182549 PCI: 00:1e.2: enabled 0
2192 13:49:38.186432 PCI: 00:1e.3: enabled 1
2193 13:49:38.189502 PCI: 00:1f.0: enabled 1
2194 13:49:38.189961 PCI: 00:1f.1: enabled 0
2195 13:49:38.193073 PCI: 00:1f.2: enabled 1
2196 13:49:38.195777 PCI: 00:1f.3: enabled 1
2197 13:49:38.199390 PCI: 00:1f.4: enabled 0
2198 13:49:38.199942 PCI: 00:1f.5: enabled 1
2199 13:49:38.202387 PCI: 00:1f.6: enabled 0
2200 13:49:38.205939 PCI: 00:1f.7: enabled 0
2201 13:49:38.209105 GENERIC: 0.0: enabled 1
2202 13:49:38.209650 GENERIC: 0.0: enabled 1
2203 13:49:38.212873 GENERIC: 1.0: enabled 1
2204 13:49:38.215648 GENERIC: 0.0: enabled 1
2205 13:49:38.216118 GENERIC: 1.0: enabled 1
2206 13:49:38.218963 USB0 port 0: enabled 1
2207 13:49:38.222532 USB0 port 0: enabled 1
2208 13:49:38.225999 GENERIC: 0.0: enabled 1
2209 13:49:38.226454 I2C: 00:1a: enabled 1
2210 13:49:38.229389 I2C: 00:31: enabled 1
2211 13:49:38.232467 I2C: 00:32: enabled 1
2212 13:49:38.232918 I2C: 00:50: enabled 1
2213 13:49:38.235825 I2C: 00:10: enabled 1
2214 13:49:38.239412 I2C: 00:15: enabled 1
2215 13:49:38.239870 I2C: 00:2c: enabled 1
2216 13:49:38.242376 GENERIC: 0.0: enabled 1
2217 13:49:38.245944 SPI: 00: enabled 1
2218 13:49:38.246401 PNP: 0c09.0: enabled 1
2219 13:49:38.249561 GENERIC: 0.0: enabled 1
2220 13:49:38.252811 USB3 port 0: enabled 1
2221 13:49:38.255785 USB3 port 1: enabled 0
2222 13:49:38.256243 USB3 port 2: enabled 1
2223 13:49:38.259194 USB3 port 3: enabled 0
2224 13:49:38.262591 USB2 port 0: enabled 1
2225 13:49:38.263048 USB2 port 1: enabled 0
2226 13:49:38.265697 USB2 port 2: enabled 1
2227 13:49:38.268882 USB2 port 3: enabled 0
2228 13:49:38.269338 USB2 port 4: enabled 0
2229 13:49:38.272217 USB2 port 5: enabled 1
2230 13:49:38.275763 USB2 port 6: enabled 0
2231 13:49:38.279306 USB2 port 7: enabled 0
2232 13:49:38.279763 USB2 port 8: enabled 1
2233 13:49:38.282430 USB2 port 9: enabled 1
2234 13:49:38.285414 USB3 port 0: enabled 1
2235 13:49:38.285980 USB3 port 1: enabled 0
2236 13:49:38.288978 USB3 port 2: enabled 0
2237 13:49:38.292139 USB3 port 3: enabled 0
2238 13:49:38.295518 GENERIC: 0.0: enabled 1
2239 13:49:38.295982 GENERIC: 1.0: enabled 1
2240 13:49:38.299066 APIC: 00: enabled 1
2241 13:49:38.302678 APIC: 14: enabled 1
2242 13:49:38.303299 APIC: 16: enabled 1
2243 13:49:38.305523 APIC: 10: enabled 1
2244 13:49:38.305982 APIC: 12: enabled 1
2245 13:49:38.308810 APIC: 01: enabled 1
2246 13:49:38.312377 APIC: 08: enabled 1
2247 13:49:38.312837 APIC: 09: enabled 1
2248 13:49:38.316030 PCI: 01:00.0: enabled 1
2249 13:49:38.322162 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2250 13:49:38.325315 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2251 13:49:38.328870 ELOG: NV offset 0xf20000 size 0x4000
2252 13:49:38.336359 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2253 13:49:38.343683 ELOG: Event(17) added with size 13 at 2023-07-11 13:49:39 UTC
2254 13:49:38.350095 ELOG: Event(9E) added with size 10 at 2023-07-11 13:49:39 UTC
2255 13:49:38.356785 ELOG: Event(9F) added with size 14 at 2023-07-11 13:49:39 UTC
2256 13:49:38.363316 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2257 13:49:38.369589 ELOG: Event(A0) added with size 9 at 2023-07-11 13:49:39 UTC
2258 13:49:38.373362 elog_add_boot_reason: Logged dev mode boot
2259 13:49:38.379890 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2260 13:49:38.383181 Finalize devices...
2261 13:49:38.383928 PCI: 00:16.0 final
2262 13:49:38.386222 PCI: 00:1f.2 final
2263 13:49:38.386725 GENERIC: 0.0 final
2264 13:49:38.393365 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2265 13:49:38.396439 GENERIC: 1.0 final
2266 13:49:38.403034 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2267 13:49:38.403783 Devices finalized
2268 13:49:38.409627 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2269 13:49:38.413072 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2270 13:49:38.419307 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2271 13:49:38.426335 ME: HFSTS1 : 0x90000245
2272 13:49:38.429311 ME: HFSTS2 : 0x82100116
2273 13:49:38.432763 ME: HFSTS3 : 0x00000050
2274 13:49:38.439266 ME: HFSTS4 : 0x00004000
2275 13:49:38.442894 ME: HFSTS5 : 0x00000000
2276 13:49:38.446251 ME: HFSTS6 : 0x40600006
2277 13:49:38.450002 ME: Manufacturing Mode : NO
2278 13:49:38.455912 ME: SPI Protection Mode Enabled : YES
2279 13:49:38.459311 ME: FPFs Committed : YES
2280 13:49:38.462544 ME: Manufacturing Vars Locked : YES
2281 13:49:38.465995 ME: FW Partition Table : OK
2282 13:49:38.469262 ME: Bringup Loader Failure : NO
2283 13:49:38.472607 ME: Firmware Init Complete : YES
2284 13:49:38.475917 ME: Boot Options Present : NO
2285 13:49:38.482799 ME: Update In Progress : NO
2286 13:49:38.486042 ME: D0i3 Support : YES
2287 13:49:38.489140 ME: Low Power State Enabled : NO
2288 13:49:38.493008 ME: CPU Replaced : YES
2289 13:49:38.496126 ME: CPU Replacement Valid : YES
2290 13:49:38.499327 ME: Current Working State : 5
2291 13:49:38.502916 ME: Current Operation State : 1
2292 13:49:38.505569 ME: Current Operation Mode : 0
2293 13:49:38.509149 ME: Error Code : 0
2294 13:49:38.515584 ME: Enhanced Debug Mode : NO
2295 13:49:38.518814 ME: CPU Debug Disabled : YES
2296 13:49:38.522237 ME: TXT Support : NO
2297 13:49:38.525885 ME: WP for RO is enabled : YES
2298 13:49:38.532049 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2299 13:49:38.538902 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2300 13:49:38.542460 Ramoops buffer: 0x100000@0x76899000.
2301 13:49:38.545864 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2302 13:49:38.555653 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2303 13:49:38.558774 CBFS: 'fallback/slic' not found.
2304 13:49:38.562407 ACPI: Writing ACPI tables at 7686d000.
2305 13:49:38.563050 ACPI: * FACS
2306 13:49:38.565488 ACPI: * DSDT
2307 13:49:38.572104 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2308 13:49:38.575546 ACPI: * FADT
2309 13:49:38.576039 SCI is IRQ9
2310 13:49:38.578790 ACPI: added table 1/32, length now 40
2311 13:49:38.582285 ACPI: * SSDT
2312 13:49:38.588951 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2313 13:49:38.591919 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2314 13:49:38.598704 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2315 13:49:38.602184 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2316 13:49:38.608807 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2317 13:49:38.611780 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2318 13:49:38.618582 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2319 13:49:38.625233 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2320 13:49:38.628832 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2321 13:49:38.635372 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2322 13:49:38.638606 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2323 13:49:38.644654 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2324 13:49:38.648092 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2325 13:49:38.654622 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2326 13:49:38.661329 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2327 13:49:38.664832 PS2K: Passing 80 keymaps to kernel
2328 13:49:38.671342 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2329 13:49:38.678281 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2330 13:49:38.684683 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2331 13:49:38.691398 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2332 13:49:38.698042 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2333 13:49:38.704338 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2334 13:49:38.708020 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2335 13:49:38.714277 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2336 13:49:38.721150 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2337 13:49:38.727828 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2338 13:49:38.730914 ACPI: added table 2/32, length now 44
2339 13:49:38.734252 ACPI: * MCFG
2340 13:49:38.737699 ACPI: added table 3/32, length now 48
2341 13:49:38.737776 ACPI: * TPM2
2342 13:49:38.740862 TPM2 log created at 0x7685d000
2343 13:49:38.747762 ACPI: added table 4/32, length now 52
2344 13:49:38.747844 ACPI: * LPIT
2345 13:49:38.751041 ACPI: added table 5/32, length now 56
2346 13:49:38.754501 ACPI: * MADT
2347 13:49:38.754608 SCI is IRQ9
2348 13:49:38.757974 ACPI: added table 6/32, length now 60
2349 13:49:38.760797 cmd_reg from pmc_make_ipc_cmd 1052838
2350 13:49:38.767820 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2351 13:49:38.774314 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2352 13:49:38.780628 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2353 13:49:38.784057 PMC CrashLog size in discovery mode: 0xC00
2354 13:49:38.787376 cpu crashlog bar addr: 0x80640000
2355 13:49:38.790965 cpu discovery table offset: 0x6030
2356 13:49:38.797466 cpu_crashlog_discovery_table buffer count: 0x3
2357 13:49:38.804043 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2358 13:49:38.810595 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2359 13:49:38.817305 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2360 13:49:38.820836 PMC crashLog size in discovery mode : 0xC00
2361 13:49:38.827099 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2362 13:49:38.833828 discover mode PMC crashlog size adjusted to: 0x200
2363 13:49:38.840455 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2364 13:49:38.843680 discover mode PMC crashlog size adjusted to: 0x0
2365 13:49:38.847375 m_cpu_crashLog_size : 0x3480 bytes
2366 13:49:38.850224 CPU crashLog present.
2367 13:49:38.853706 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2368 13:49:38.863700 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2369 13:49:38.863789 current = 76876550
2370 13:49:38.867023 ACPI: * DMAR
2371 13:49:38.870301 ACPI: added table 7/32, length now 64
2372 13:49:38.873957 ACPI: added table 8/32, length now 68
2373 13:49:38.874040 ACPI: * HPET
2374 13:49:38.880116 ACPI: added table 9/32, length now 72
2375 13:49:38.880198 ACPI: done.
2376 13:49:38.883635 ACPI tables: 38528 bytes.
2377 13:49:38.887273 smbios_write_tables: 76857000
2378 13:49:38.890635 EC returned error result code 3
2379 13:49:38.893966 Couldn't obtain OEM name from CBI
2380 13:49:38.897366 Create SMBIOS type 16
2381 13:49:38.897447 Create SMBIOS type 17
2382 13:49:38.900462 Create SMBIOS type 20
2383 13:49:38.904067 GENERIC: 0.0 (WIFI Device)
2384 13:49:38.907337 SMBIOS tables: 2156 bytes.
2385 13:49:38.910567 Writing table forward entry at 0x00000500
2386 13:49:38.917336 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2387 13:49:38.920898 Writing coreboot table at 0x76891000
2388 13:49:38.927007 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2389 13:49:38.930636 1. 0000000000001000-000000000009ffff: RAM
2390 13:49:38.934102 2. 00000000000a0000-00000000000fffff: RESERVED
2391 13:49:38.940437 3. 0000000000100000-0000000076856fff: RAM
2392 13:49:38.947150 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2393 13:49:38.950538 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2394 13:49:38.956992 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2395 13:49:38.960889 7. 0000000077000000-00000000803fffff: RESERVED
2396 13:49:38.966935 8. 00000000c0000000-00000000cfffffff: RESERVED
2397 13:49:38.970198 9. 00000000f8000000-00000000f9ffffff: RESERVED
2398 13:49:38.976814 10. 00000000fb000000-00000000fb000fff: RESERVED
2399 13:49:38.980155 11. 00000000fc800000-00000000fe7fffff: RESERVED
2400 13:49:38.983352 12. 00000000feb00000-00000000feb7ffff: RESERVED
2401 13:49:38.990203 13. 00000000fec00000-00000000fecfffff: RESERVED
2402 13:49:38.993787 14. 00000000fed40000-00000000fed6ffff: RESERVED
2403 13:49:39.000235 15. 00000000fed80000-00000000fed87fff: RESERVED
2404 13:49:39.003718 16. 00000000fed90000-00000000fed92fff: RESERVED
2405 13:49:39.010265 17. 00000000feda0000-00000000feda1fff: RESERVED
2406 13:49:39.013402 18. 00000000fedc0000-00000000feddffff: RESERVED
2407 13:49:39.017104 19. 0000000100000000-000000027fbfffff: RAM
2408 13:49:39.020088 Passing 4 GPIOs to payload:
2409 13:49:39.027069 NAME | PORT | POLARITY | VALUE
2410 13:49:39.030026 lid | undefined | high | high
2411 13:49:39.036658 power | undefined | high | low
2412 13:49:39.043508 oprom | undefined | high | low
2413 13:49:39.046805 EC in RW | 0x00000151 | high | high
2414 13:49:39.050121 Board ID: 3
2415 13:49:39.050272 FW config: 0x131
2416 13:49:39.056657 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 9a2e
2417 13:49:39.060168 coreboot table: 1748 bytes.
2418 13:49:39.063258 IMD ROOT 0. 0x76fff000 0x00001000
2419 13:49:39.066487 IMD SMALL 1. 0x76ffe000 0x00001000
2420 13:49:39.069917 FSP MEMORY 2. 0x76afe000 0x00500000
2421 13:49:39.073446 CONSOLE 3. 0x76ade000 0x00020000
2422 13:49:39.077123 RW MCACHE 4. 0x76add000 0x0000043c
2423 13:49:39.083417 RO MCACHE 5. 0x76adc000 0x00000fd8
2424 13:49:39.086753 FMAP 6. 0x76adb000 0x0000064a
2425 13:49:39.090168 TIME STAMP 7. 0x76ada000 0x00000910
2426 13:49:39.093384 VBOOT WORK 8. 0x76ac6000 0x00014000
2427 13:49:39.096745 MEM INFO 9. 0x76ac5000 0x000003b8
2428 13:49:39.100097 ROMSTG STCK10. 0x76ac4000 0x00001000
2429 13:49:39.103641 AFTER CAR 11. 0x76ab8000 0x0000c000
2430 13:49:39.106645 RAMSTAGE 12. 0x76a2e000 0x0008a000
2431 13:49:39.109943 ACPI BERT 13. 0x76a1e000 0x00010000
2432 13:49:39.116814 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2433 13:49:39.120429 REFCODE 15. 0x769ae000 0x0006f000
2434 13:49:39.123618 SMM BACKUP 16. 0x7699e000 0x00010000
2435 13:49:39.126606 IGD OPREGION17. 0x76999000 0x00004203
2436 13:49:39.130320 RAMOOPS 18. 0x76899000 0x00100000
2437 13:49:39.133660 COREBOOT 19. 0x76891000 0x00008000
2438 13:49:39.136786 ACPI 20. 0x7686d000 0x00024000
2439 13:49:39.140390 TPM2 TCGLOG21. 0x7685d000 0x00010000
2440 13:49:39.146660 PMC CRASHLOG22. 0x7685c000 0x00000c00
2441 13:49:39.149834 CPU CRASHLOG23. 0x76858000 0x00003480
2442 13:49:39.153082 SMBIOS 24. 0x76857000 0x00001000
2443 13:49:39.153181 IMD small region:
2444 13:49:39.159884 IMD ROOT 0. 0x76ffec00 0x00000400
2445 13:49:39.163476 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2446 13:49:39.166850 POWER STATE 2. 0x76ffeb80 0x00000044
2447 13:49:39.170066 ROMSTAGE 3. 0x76ffeb60 0x00000004
2448 13:49:39.173443 ACPI GNVS 4. 0x76ffeb00 0x00000048
2449 13:49:39.180104 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2450 13:49:39.183240 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2451 13:49:39.186391 MTRR: Physical address space:
2452 13:49:39.193375 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2453 13:49:39.199958 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2454 13:49:39.206675 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2455 13:49:39.213028 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2456 13:49:39.219592 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2457 13:49:39.226498 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2458 13:49:39.229665 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2459 13:49:39.236194 MTRR: Fixed MSR 0x250 0x0606060606060606
2460 13:49:39.239640 MTRR: Fixed MSR 0x258 0x0606060606060606
2461 13:49:39.243115 MTRR: Fixed MSR 0x259 0x0000000000000000
2462 13:49:39.246149 MTRR: Fixed MSR 0x268 0x0606060606060606
2463 13:49:39.253077 MTRR: Fixed MSR 0x269 0x0606060606060606
2464 13:49:39.256016 MTRR: Fixed MSR 0x26a 0x0606060606060606
2465 13:49:39.259386 MTRR: Fixed MSR 0x26b 0x0606060606060606
2466 13:49:39.262769 MTRR: Fixed MSR 0x26c 0x0606060606060606
2467 13:49:39.269365 MTRR: Fixed MSR 0x26d 0x0606060606060606
2468 13:49:39.272717 MTRR: Fixed MSR 0x26e 0x0606060606060606
2469 13:49:39.276133 MTRR: Fixed MSR 0x26f 0x0606060606060606
2470 13:49:39.279340 call enable_fixed_mtrr()
2471 13:49:39.283066 CPU physical address size: 39 bits
2472 13:49:39.289264 MTRR: default type WB/UC MTRR counts: 6/6.
2473 13:49:39.292720 MTRR: UC selected as default type.
2474 13:49:39.299580 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2475 13:49:39.302307 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2476 13:49:39.309460 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2477 13:49:39.315947 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2478 13:49:39.322528 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2479 13:49:39.329284 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2480 13:49:39.335754 MTRR: Fixed MSR 0x250 0x0606060606060606
2481 13:49:39.339126 MTRR: Fixed MSR 0x258 0x0606060606060606
2482 13:49:39.342332 MTRR: Fixed MSR 0x259 0x0000000000000000
2483 13:49:39.345915 MTRR: Fixed MSR 0x268 0x0606060606060606
2484 13:49:39.352170 MTRR: Fixed MSR 0x269 0x0606060606060606
2485 13:49:39.355510 MTRR: Fixed MSR 0x26a 0x0606060606060606
2486 13:49:39.358992 MTRR: Fixed MSR 0x26b 0x0606060606060606
2487 13:49:39.362547 MTRR: Fixed MSR 0x26c 0x0606060606060606
2488 13:49:39.369011 MTRR: Fixed MSR 0x26d 0x0606060606060606
2489 13:49:39.372468 MTRR: Fixed MSR 0x26e 0x0606060606060606
2490 13:49:39.375819 MTRR: Fixed MSR 0x26f 0x0606060606060606
2491 13:49:39.379134 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 13:49:39.382383 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 13:49:39.389315 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 13:49:39.392300 MTRR: Fixed MSR 0x258 0x0606060606060606
2495 13:49:39.395484 MTRR: Fixed MSR 0x259 0x0000000000000000
2496 13:49:39.398954 MTRR: Fixed MSR 0x268 0x0606060606060606
2497 13:49:39.405448 MTRR: Fixed MSR 0x269 0x0606060606060606
2498 13:49:39.408764 MTRR: Fixed MSR 0x26a 0x0606060606060606
2499 13:49:39.412291 MTRR: Fixed MSR 0x26b 0x0606060606060606
2500 13:49:39.415073 MTRR: Fixed MSR 0x26c 0x0606060606060606
2501 13:49:39.422127 MTRR: Fixed MSR 0x26d 0x0606060606060606
2502 13:49:39.425091 MTRR: Fixed MSR 0x26e 0x0606060606060606
2503 13:49:39.428592 MTRR: Fixed MSR 0x26f 0x0606060606060606
2504 13:49:39.431832 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 13:49:39.435057 call enable_fixed_mtrr()
2506 13:49:39.438454 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 13:49:39.445168 MTRR: Fixed MSR 0x250 0x0606060606060606
2508 13:49:39.448380 MTRR: Fixed MSR 0x250 0x0606060606060606
2509 13:49:39.451663 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 13:49:39.455098 call enable_fixed_mtrr()
2511 13:49:39.458210 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 13:49:39.461941 MTRR: Fixed MSR 0x259 0x0000000000000000
2513 13:49:39.465042 MTRR: Fixed MSR 0x268 0x0606060606060606
2514 13:49:39.471591 MTRR: Fixed MSR 0x269 0x0606060606060606
2515 13:49:39.475185 CPU physical address size: 39 bits
2516 13:49:39.478103 CPU physical address size: 39 bits
2517 13:49:39.481612 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 13:49:39.485252 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 13:49:39.491813 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 13:49:39.494983 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 13:49:39.498131 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 13:49:39.501333 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 13:49:39.505044 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 13:49:39.511528 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 13:49:39.514837 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 13:49:39.517924 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 13:49:39.521658 MTRR: Fixed MSR 0x258 0x0606060606060606
2528 13:49:39.528028 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 13:49:39.531449 MTRR: Fixed MSR 0x26a 0x0606060606060606
2530 13:49:39.534866 MTRR: Fixed MSR 0x269 0x0606060606060606
2531 13:49:39.537912 MTRR: Fixed MSR 0x26a 0x0606060606060606
2532 13:49:39.545009 MTRR: Fixed MSR 0x26b 0x0606060606060606
2533 13:49:39.547818 MTRR: Fixed MSR 0x26c 0x0606060606060606
2534 13:49:39.551428 MTRR: Fixed MSR 0x26d 0x0606060606060606
2535 13:49:39.554690 MTRR: Fixed MSR 0x26e 0x0606060606060606
2536 13:49:39.561480 MTRR: Fixed MSR 0x26f 0x0606060606060606
2537 13:49:39.564776 MTRR: Fixed MSR 0x26b 0x0606060606060606
2538 13:49:39.567907 call enable_fixed_mtrr()
2539 13:49:39.567987 call enable_fixed_mtrr()
2540 13:49:39.571072 CPU physical address size: 39 bits
2541 13:49:39.574523 CPU physical address size: 39 bits
2542 13:49:39.580901 MTRR: Fixed MSR 0x26c 0x0606060606060606
2543 13:49:39.584438 MTRR: Fixed MSR 0x258 0x0606060606060606
2544 13:49:39.588123 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 13:49:39.591544 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 13:49:39.598057 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 13:49:39.600970 MTRR: Fixed MSR 0x259 0x0000000000000000
2548 13:49:39.604630 MTRR: Fixed MSR 0x268 0x0606060606060606
2549 13:49:39.607792 MTRR: Fixed MSR 0x269 0x0606060606060606
2550 13:49:39.614289 MTRR: Fixed MSR 0x26a 0x0606060606060606
2551 13:49:39.617832 MTRR: Fixed MSR 0x26b 0x0606060606060606
2552 13:49:39.620978 MTRR: Fixed MSR 0x26c 0x0606060606060606
2553 13:49:39.624075 MTRR: Fixed MSR 0x26d 0x0606060606060606
2554 13:49:39.627652 MTRR: Fixed MSR 0x26e 0x0606060606060606
2555 13:49:39.634549 MTRR: Fixed MSR 0x26f 0x0606060606060606
2556 13:49:39.634633 call enable_fixed_mtrr()
2557 13:49:39.637949 call enable_fixed_mtrr()
2558 13:49:39.640685 CPU physical address size: 39 bits
2559 13:49:39.644041 CPU physical address size: 39 bits
2560 13:49:39.650961 MTRR: Fixed MSR 0x259 0x0000000000000000
2561 13:49:39.653900 MTRR: Fixed MSR 0x268 0x0606060606060606
2562 13:49:39.657601 MTRR: Fixed MSR 0x269 0x0606060606060606
2563 13:49:39.663929 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 13:49:39.667360 MTRR: Fixed MSR 0x26b 0x0606060606060606
2565 13:49:39.670868 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 13:49:39.673790 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 13:49:39.677349 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 13:49:39.684255 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 13:49:39.687135 call enable_fixed_mtrr()
2570 13:49:39.690647 CPU physical address size: 39 bits
2571 13:49:39.693672
2572 13:49:39.693751 MTRR check
2573 13:49:39.697115 Fixed MTRRs : Enabled
2574 13:49:39.697197 Variable MTRRs: Enabled
2575 13:49:39.697260
2576 13:49:39.703929 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2577 13:49:39.707022 Checking cr50 for pending updates
2578 13:49:39.719830 Reading cr50 TPM mode
2579 13:49:39.734570 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2580 13:49:39.744466 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2581 13:49:39.747999 Checking segment from ROM address 0xf96cbe6c
2582 13:49:39.751172 Checking segment from ROM address 0xf96cbe88
2583 13:49:39.758009 Loading segment from ROM address 0xf96cbe6c
2584 13:49:39.758087 code (compression=1)
2585 13:49:39.767949 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2586 13:49:39.774335 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2587 13:49:39.777613 using LZMA
2588 13:49:39.800114 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2589 13:49:39.806908 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2590 13:49:39.815038 Loading segment from ROM address 0xf96cbe88
2591 13:49:39.818378 Entry Point 0x30000000
2592 13:49:39.818460 Loaded segments
2593 13:49:39.824834 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2594 13:49:39.831639 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2595 13:49:39.835051 Finalizing chipset.
2596 13:49:39.838223 apm_control: Finalizing SMM.
2597 13:49:39.838304 APMC done.
2598 13:49:39.841471 HECI: CSE device 16.1 is disabled
2599 13:49:39.845050 HECI: CSE device 16.2 is disabled
2600 13:49:39.848104 HECI: CSE device 16.3 is disabled
2601 13:49:39.851561 HECI: CSE device 16.4 is disabled
2602 13:49:39.855084 HECI: CSE device 16.5 is disabled
2603 13:49:39.858192 HECI: Sending End-of-Post
2604 13:49:39.867364 CSE: EOP requested action: continue boot
2605 13:49:39.870822 CSE EOP successful, continuing boot
2606 13:49:39.877177 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2607 13:49:39.880520 mp_park_aps done after 0 msecs.
2608 13:49:39.883749 Jumping to boot code at 0x30000000(0x76891000)
2609 13:49:39.893797 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2610 13:49:39.898267
2611 13:49:39.898347
2612 13:49:39.898412
2613 13:49:39.901136 Starting depthcharge on Volmar...
2614 13:49:39.901217
2615 13:49:39.901686 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2616 13:49:39.901789 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2617 13:49:39.901870 Setting prompt string to ['brya:']
2618 13:49:39.901945 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2619 13:49:39.908353 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2620 13:49:39.908437
2621 13:49:39.914679 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2622 13:49:39.914782
2623 13:49:39.921431 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2624 13:49:39.921514
2625 13:49:39.924615 configure_storage: Failed to remap 1C:2
2626 13:49:39.924697
2627 13:49:39.927933 Wipe memory regions:
2628 13:49:39.928013
2629 13:49:39.931331 [0x00000000001000, 0x000000000a0000)
2630 13:49:39.931413
2631 13:49:39.934366 [0x00000000100000, 0x00000030000000)
2632 13:49:40.042497
2633 13:49:40.045380 [0x00000032668e60, 0x00000076857000)
2634 13:49:40.193600
2635 13:49:40.196722 [0x00000100000000, 0x0000027fc00000)
2636 13:49:41.039770
2637 13:49:41.042754 ec_init: CrosEC protocol v3 supported (256, 256)
2638 13:49:41.651814
2639 13:49:41.651951 R8152: Initializing
2640 13:49:41.652017
2641 13:49:41.655066 Version 9 (ocp_data = 6010)
2642 13:49:41.655146
2643 13:49:41.658245 R8152: Done initializing
2644 13:49:41.658326
2645 13:49:41.661794 Adding net device
2646 13:49:41.964089
2647 13:49:41.967189 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2648 13:49:41.967285
2649 13:49:41.967350
2650 13:49:41.967410
2651 13:49:41.967684 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 13:49:42.068029 brya: tftpboot 192.168.201.1 11061512/tftp-deploy-kjp9xmeu/kernel/bzImage 11061512/tftp-deploy-kjp9xmeu/kernel/cmdline 11061512/tftp-deploy-kjp9xmeu/ramdisk/ramdisk.cpio.gz
2654 13:49:42.068184 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 13:49:42.068280 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2656 13:49:42.072831 tftpboot 192.168.201.1 11061512/tftp-deploy-kjp9xmeu/kernel/bzImploy-kjp9xmeu/kernel/cmdline 11061512/tftp-deploy-kjp9xmeu/ramdisk/ramdisk.cpio.gz
2657 13:49:42.072918
2658 13:49:42.072982 Waiting for link
2659 13:49:42.275368
2660 13:49:42.275494 done.
2661 13:49:42.275560
2662 13:49:42.275621 MAC: 00:e0:4c:68:05:70
2663 13:49:42.275681
2664 13:49:42.278945 Sending DHCP discover... done.
2665 13:49:42.279026
2666 13:49:42.282169 Waiting for reply... done.
2667 13:49:42.282250
2668 13:49:42.285303 Sending DHCP request... done.
2669 13:49:42.285384
2670 13:49:42.288482 Waiting for reply... done.
2671 13:49:42.288563
2672 13:49:42.291733 My ip is 192.168.201.16
2673 13:49:42.291814
2674 13:49:42.295077 The DHCP server ip is 192.168.201.1
2675 13:49:42.295184
2676 13:49:42.298378 TFTP server IP predefined by user: 192.168.201.1
2677 13:49:42.301585
2678 13:49:42.308389 Bootfile predefined by user: 11061512/tftp-deploy-kjp9xmeu/kernel/bzImage
2679 13:49:42.308471
2680 13:49:42.312161 Sending tftp read request... done.
2681 13:49:42.312244
2682 13:49:42.315086 Waiting for the transfer...
2683 13:49:42.315203
2684 13:49:42.565736 00000000 ################################################################
2685 13:49:42.565881
2686 13:49:42.822994 00080000 ################################################################
2687 13:49:42.823156
2688 13:49:43.094605 00100000 ################################################################
2689 13:49:43.094740
2690 13:49:43.342048 00180000 ################################################################
2691 13:49:43.342180
2692 13:49:43.593399 00200000 ################################################################
2693 13:49:43.593535
2694 13:49:43.841063 00280000 ################################################################
2695 13:49:43.841199
2696 13:49:44.107533 00300000 ################################################################
2697 13:49:44.107669
2698 13:49:44.350495 00380000 ################################################################
2699 13:49:44.350662
2700 13:49:44.604641 00400000 ################################################################
2701 13:49:44.604792
2702 13:49:44.869382 00480000 ################################################################
2703 13:49:44.869566
2704 13:49:45.128869 00500000 ################################################################
2705 13:49:45.129021
2706 13:49:45.384308 00580000 ################################################################
2707 13:49:45.384444
2708 13:49:45.635240 00600000 ################################################################
2709 13:49:45.635411
2710 13:49:45.885938 00680000 ################################################################
2711 13:49:45.886089
2712 13:49:46.131581 00700000 ################################################################
2713 13:49:46.131789
2714 13:49:46.380717 00780000 ################################################################
2715 13:49:46.380851
2716 13:49:46.630781 00800000 ################################################################
2717 13:49:46.630918
2718 13:49:46.879810 00880000 ################################################################
2719 13:49:46.879945
2720 13:49:47.130887 00900000 ################################################################
2721 13:49:47.131018
2722 13:49:47.384485 00980000 ################################################################
2723 13:49:47.384651
2724 13:49:47.636453 00a00000 ################################################################
2725 13:49:47.636632
2726 13:49:47.895236 00a80000 ################################################################
2727 13:49:47.895384
2728 13:49:48.158267 00b00000 ################################################################
2729 13:49:48.158402
2730 13:49:48.415597 00b80000 ################################################################
2731 13:49:48.415731
2732 13:49:48.677369 00c00000 ################################################################
2733 13:49:48.677504
2734 13:49:48.817560 00c80000 ##################################### done.
2735 13:49:48.817723
2736 13:49:48.820967 The bootfile was 13402336 bytes long.
2737 13:49:48.821082
2738 13:49:48.824492 Sending tftp read request... done.
2739 13:49:48.824586
2740 13:49:48.827696 Waiting for the transfer...
2741 13:49:48.827770
2742 13:49:49.093316 00000000 ################################################################
2743 13:49:49.093453
2744 13:49:49.341015 00080000 ################################################################
2745 13:49:49.341154
2746 13:49:49.619130 00100000 ################################################################
2747 13:49:49.619300
2748 13:49:49.877438 00180000 ################################################################
2749 13:49:49.877569
2750 13:49:50.134747 00200000 ################################################################
2751 13:49:50.134905
2752 13:49:50.388766 00280000 ################################################################
2753 13:49:50.388898
2754 13:49:50.668022 00300000 ################################################################
2755 13:49:50.668177
2756 13:49:50.915595 00380000 ################################################################
2757 13:49:50.915727
2758 13:49:51.168476 00400000 ################################################################
2759 13:49:51.168627
2760 13:49:51.417323 00480000 ################################################################
2761 13:49:51.417486
2762 13:49:51.676178 00500000 ################################################################
2763 13:49:51.676312
2764 13:49:51.942611 00580000 ################################################################
2765 13:49:51.942770
2766 13:49:52.202663 00600000 ################################################################
2767 13:49:52.202799
2768 13:49:52.455733 00680000 ################################################################
2769 13:49:52.455981
2770 13:49:52.715745 00700000 ################################################################
2771 13:49:52.715878
2772 13:49:52.985940 00780000 ################################################################
2773 13:49:52.986074
2774 13:49:53.240451 00800000 ################################################################
2775 13:49:53.240630
2776 13:49:53.410391 00880000 ############################################ done.
2777 13:49:53.410523
2778 13:49:53.413601 Sending tftp read request... done.
2779 13:49:53.413695
2780 13:49:53.416851 Waiting for the transfer...
2781 13:49:53.416941
2782 13:49:53.417037 00000000 # done.
2783 13:49:53.417120
2784 13:49:53.426928 Command line loaded dynamically from TFTP file: 11061512/tftp-deploy-kjp9xmeu/kernel/cmdline
2785 13:49:53.427043
2786 13:49:53.440029 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2787 13:49:53.446269
2788 13:49:53.449656 Shutting down all USB controllers.
2789 13:49:53.449741
2790 13:49:53.449807 Removing current net device
2791 13:49:53.449869
2792 13:49:53.453157 Finalizing coreboot
2793 13:49:53.453242
2794 13:49:53.460030 Exiting depthcharge with code 4 at timestamp: 23793159
2795 13:49:53.460117
2796 13:49:53.460184
2797 13:49:53.460246 Starting kernel ...
2798 13:49:53.460307
2799 13:49:53.460365
2800 13:49:53.460755 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2801 13:49:53.460860 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2802 13:49:53.460939 Setting prompt string to ['Linux version [0-9]']
2803 13:49:53.461010 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2804 13:49:53.461100 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2806 13:54:20.462082 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2808 13:54:20.463169 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2810 13:54:20.464093 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2813 13:54:20.465477 end: 2 depthcharge-action (duration 00:05:00) [common]
2815 13:54:20.466462 Cleaning after the job
2816 13:54:20.466554 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/ramdisk
2817 13:54:20.467863 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/kernel
2818 13:54:20.469841 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061512/tftp-deploy-kjp9xmeu/modules
2819 13:54:20.470437 start: 5.1 power-off (timeout 00:00:30) [common]
2820 13:54:20.470600 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2821 13:54:20.547405 >> Command sent successfully.
2822 13:54:20.558986 Returned 0 in 0 seconds
2823 13:54:20.660354 end: 5.1 power-off (duration 00:00:00) [common]
2825 13:54:20.661922 start: 5.2 read-feedback (timeout 00:10:00) [common]
2826 13:54:20.663245 Listened to connection for namespace 'common' for up to 1s
2828 13:54:20.664631 Listened to connection for namespace 'common' for up to 1s
2829 13:54:21.663519 Finalising connection for namespace 'common'
2830 13:54:21.664206 Disconnecting from shell: Finalise
2831 13:54:21.664602