Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 15:02:48.849851 lava-dispatcher, installed at version: 2023.06
2 15:02:48.850017 start: 0 validate
3 15:02:48.850130 Start time: 2023-09-13 15:02:48.850123+00:00 (UTC)
4 15:02:48.850255 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:02:48.850371 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:02:48.852635 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:02:48.852762 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.191-cip38-29-g9e1aa2001db86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:03:34.124877 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:03:34.125464 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.191-cip38-29-g9e1aa2001db86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:03:34.635512 validate duration: 45.79
12 15:03:34.636567 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:03:34.636993 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:03:34.637344 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:03:34.637793 Not decompressing ramdisk as can be used compressed.
16 15:03:34.638119 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:03:34.638379 saving as /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/ramdisk/rootfs.cpio.gz
18 15:03:34.638618 total size: 8418130 (8 MB)
19 15:03:34.893037 progress 0 % (0 MB)
20 15:03:34.894842 progress 5 % (0 MB)
21 15:03:34.896484 progress 10 % (0 MB)
22 15:03:34.898028 progress 15 % (1 MB)
23 15:03:34.899720 progress 20 % (1 MB)
24 15:03:34.901305 progress 25 % (2 MB)
25 15:03:34.902870 progress 30 % (2 MB)
26 15:03:34.904365 progress 35 % (2 MB)
27 15:03:34.905934 progress 40 % (3 MB)
28 15:03:34.907559 progress 45 % (3 MB)
29 15:03:34.909189 progress 50 % (4 MB)
30 15:03:34.910721 progress 55 % (4 MB)
31 15:03:34.912253 progress 60 % (4 MB)
32 15:03:34.913671 progress 65 % (5 MB)
33 15:03:34.915246 progress 70 % (5 MB)
34 15:03:34.916830 progress 75 % (6 MB)
35 15:03:34.918374 progress 80 % (6 MB)
36 15:03:34.919964 progress 85 % (6 MB)
37 15:03:34.921486 progress 90 % (7 MB)
38 15:03:34.923072 progress 95 % (7 MB)
39 15:03:34.924539 progress 100 % (8 MB)
40 15:03:34.924710 8 MB downloaded in 0.29 s (28.06 MB/s)
41 15:03:34.924847 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:03:34.925045 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:03:34.925112 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:03:34.925176 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:03:34.925294 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.191-cip38-29-g9e1aa2001db86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:03:34.925351 saving as /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/kernel/bzImage
48 15:03:34.925396 total size: 14013312 (13 MB)
49 15:03:34.925446 No compression specified
50 15:03:34.926479 progress 0 % (0 MB)
51 15:03:34.929114 progress 5 % (0 MB)
52 15:03:34.931570 progress 10 % (1 MB)
53 15:03:34.934141 progress 15 % (2 MB)
54 15:03:34.936621 progress 20 % (2 MB)
55 15:03:34.939042 progress 25 % (3 MB)
56 15:03:34.941651 progress 30 % (4 MB)
57 15:03:34.944101 progress 35 % (4 MB)
58 15:03:34.946722 progress 40 % (5 MB)
59 15:03:34.949282 progress 45 % (6 MB)
60 15:03:34.951987 progress 50 % (6 MB)
61 15:03:34.954693 progress 55 % (7 MB)
62 15:03:34.957503 progress 60 % (8 MB)
63 15:03:34.960063 progress 65 % (8 MB)
64 15:03:34.962828 progress 70 % (9 MB)
65 15:03:34.965328 progress 75 % (10 MB)
66 15:03:34.967950 progress 80 % (10 MB)
67 15:03:34.970385 progress 85 % (11 MB)
68 15:03:34.972917 progress 90 % (12 MB)
69 15:03:34.975508 progress 95 % (12 MB)
70 15:03:34.978033 progress 100 % (13 MB)
71 15:03:34.978215 13 MB downloaded in 0.05 s (253.04 MB/s)
72 15:03:34.978364 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:03:34.978612 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:03:34.978681 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:03:34.978813 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:03:34.978961 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.191-cip38-29-g9e1aa2001db86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:03:34.979023 saving as /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/modules/modules.tar
79 15:03:34.979071 total size: 527152 (0 MB)
80 15:03:34.979121 Using unxz to decompress xz
81 15:03:34.982846 progress 6 % (0 MB)
82 15:03:34.983158 progress 12 % (0 MB)
83 15:03:34.983353 progress 18 % (0 MB)
84 15:03:34.985044 progress 24 % (0 MB)
85 15:03:34.986788 progress 31 % (0 MB)
86 15:03:34.988570 progress 37 % (0 MB)
87 15:03:34.990448 progress 43 % (0 MB)
88 15:03:34.992240 progress 49 % (0 MB)
89 15:03:34.993952 progress 55 % (0 MB)
90 15:03:34.995708 progress 62 % (0 MB)
91 15:03:34.997457 progress 68 % (0 MB)
92 15:03:34.999244 progress 74 % (0 MB)
93 15:03:35.001281 progress 80 % (0 MB)
94 15:03:35.002975 progress 87 % (0 MB)
95 15:03:35.004625 progress 93 % (0 MB)
96 15:03:35.006781 progress 99 % (0 MB)
97 15:03:35.012548 0 MB downloaded in 0.03 s (15.02 MB/s)
98 15:03:35.012774 end: 1.3.1 http-download (duration 00:00:00) [common]
100 15:03:35.013006 end: 1.3 download-retry (duration 00:00:00) [common]
101 15:03:35.013083 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 15:03:35.013161 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 15:03:35.013237 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 15:03:35.013308 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 15:03:35.013483 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf
106 15:03:35.013592 makedir: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin
107 15:03:35.013679 makedir: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/tests
108 15:03:35.013765 makedir: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/results
109 15:03:35.013856 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-add-keys
110 15:03:35.013967 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-add-sources
111 15:03:35.014066 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-background-process-start
112 15:03:35.014169 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-background-process-stop
113 15:03:35.014265 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-common-functions
114 15:03:35.014359 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-echo-ipv4
115 15:03:35.014453 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-install-packages
116 15:03:35.014548 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-installed-packages
117 15:03:35.014641 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-os-build
118 15:03:35.014742 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-probe-channel
119 15:03:35.014834 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-probe-ip
120 15:03:35.014926 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-target-ip
121 15:03:35.015018 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-target-mac
122 15:03:35.015113 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-target-storage
123 15:03:35.015209 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-case
124 15:03:35.015303 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-event
125 15:03:35.015394 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-feedback
126 15:03:35.015486 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-raise
127 15:03:35.015579 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-reference
128 15:03:35.015672 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-runner
129 15:03:35.015764 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-set
130 15:03:35.015857 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-test-shell
131 15:03:35.015951 Updating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-install-packages (oe)
132 15:03:35.016105 Updating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/bin/lava-installed-packages (oe)
133 15:03:35.016202 Creating /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/environment
134 15:03:35.016287 LAVA metadata
135 15:03:35.016349 - LAVA_JOB_ID=11516905
136 15:03:35.016402 - LAVA_DISPATCHER_IP=192.168.201.1
137 15:03:35.016486 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 15:03:35.016542 skipped lava-vland-overlay
139 15:03:35.016604 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 15:03:35.016668 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 15:03:35.016718 skipped lava-multinode-overlay
142 15:03:35.016775 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 15:03:35.016838 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 15:03:35.016895 Loading test definitions
145 15:03:35.016967 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 15:03:35.017031 Using /lava-11516905 at stage 0
147 15:03:35.017267 uuid=11516905_1.4.2.3.1 testdef=None
148 15:03:35.017341 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 15:03:35.017412 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 15:03:35.017827 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 15:03:35.018027 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 15:03:35.018538 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 15:03:35.018719 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 15:03:35.019201 runner path: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/0/tests/0_dmesg test_uuid 11516905_1.4.2.3.1
157 15:03:35.019328 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 15:03:35.019516 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 15:03:35.019572 Using /lava-11516905 at stage 1
161 15:03:35.019799 uuid=11516905_1.4.2.3.5 testdef=None
162 15:03:35.019869 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 15:03:35.019933 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 15:03:35.020314 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 15:03:35.020486 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 15:03:35.020995 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 15:03:35.021179 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 15:03:35.021669 runner path: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/1/tests/1_bootrr test_uuid 11516905_1.4.2.3.5
171 15:03:35.021788 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 15:03:35.021954 Creating lava-test-runner.conf files
174 15:03:35.022003 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/0 for stage 0
175 15:03:35.022072 - 0_dmesg
176 15:03:35.022137 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11516905/lava-overlay-p4bjg7kf/lava-11516905/1 for stage 1
177 15:03:35.022207 - 1_bootrr
178 15:03:35.022282 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 15:03:35.022353 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 15:03:35.029056 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 15:03:35.029180 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 15:03:35.029255 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 15:03:35.029323 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 15:03:35.029390 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 15:03:35.199183 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 15:03:35.199456 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 15:03:35.199553 extracting modules file /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11516905/extract-overlay-ramdisk-sq392vce/ramdisk
188 15:03:35.216123 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 15:03:35.216315 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 15:03:35.216400 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11516905/compress-overlay-2v5creqb/overlay-1.4.2.4.tar.gz to ramdisk
191 15:03:35.216488 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11516905/compress-overlay-2v5creqb/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11516905/extract-overlay-ramdisk-sq392vce/ramdisk
192 15:03:35.222388 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 15:03:35.222496 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 15:03:35.222570 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 15:03:35.222637 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 15:03:35.222700 Building ramdisk /var/lib/lava/dispatcher/tmp/11516905/extract-overlay-ramdisk-sq392vce/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11516905/extract-overlay-ramdisk-sq392vce/ramdisk
197 15:03:35.289474 >> 54148 blocks
198 15:03:36.079838 rename /var/lib/lava/dispatcher/tmp/11516905/extract-overlay-ramdisk-sq392vce/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/ramdisk/ramdisk.cpio.gz
199 15:03:36.080173 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 15:03:36.080288 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
201 15:03:36.080367 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
202 15:03:36.080444 No mkimage arch provided, not using FIT.
203 15:03:36.080514 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 15:03:36.080579 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 15:03:36.080657 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 15:03:36.080728 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
207 15:03:36.080794 No LXC device requested
208 15:03:36.080857 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 15:03:36.080922 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
210 15:03:36.080985 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 15:03:36.081044 Checking files for TFTP limit of 4294967296 bytes.
212 15:03:36.081349 end: 1 tftp-deploy (duration 00:00:01) [common]
213 15:03:36.081428 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 15:03:36.081498 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 15:03:36.081593 substitutions:
216 15:03:36.081646 - {DTB}: None
217 15:03:36.081707 - {INITRD}: 11516905/tftp-deploy-d8u1x15q/ramdisk/ramdisk.cpio.gz
218 15:03:36.081753 - {KERNEL}: 11516905/tftp-deploy-d8u1x15q/kernel/bzImage
219 15:03:36.081796 - {LAVA_MAC}: None
220 15:03:36.081868 - {PRESEED_CONFIG}: None
221 15:03:36.081910 - {PRESEED_LOCAL}: None
222 15:03:36.081951 - {RAMDISK}: 11516905/tftp-deploy-d8u1x15q/ramdisk/ramdisk.cpio.gz
223 15:03:36.081994 - {ROOT_PART}: None
224 15:03:36.082036 - {ROOT}: None
225 15:03:36.082078 - {SERVER_IP}: 192.168.201.1
226 15:03:36.082120 - {TEE}: None
227 15:03:36.082162 Parsed boot commands:
228 15:03:36.082203 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 15:03:36.082343 Parsed boot commands: tftpboot 192.168.201.1 11516905/tftp-deploy-d8u1x15q/kernel/bzImage 11516905/tftp-deploy-d8u1x15q/kernel/cmdline 11516905/tftp-deploy-d8u1x15q/ramdisk/ramdisk.cpio.gz
230 15:03:36.082414 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 15:03:36.082478 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 15:03:36.082548 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 15:03:36.082612 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 15:03:36.082667 Not connected, no need to disconnect.
235 15:03:36.082723 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 15:03:36.082785 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 15:03:36.082836 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
238 15:03:36.085759 Setting prompt string to ['lava-test: # ']
239 15:03:36.086051 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 15:03:36.086152 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 15:03:36.086247 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 15:03:36.086326 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 15:03:36.086488 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
244 15:03:41.231978 >> Command sent successfully.
245 15:03:41.239970 Returned 0 in 5 seconds
246 15:03:41.340834 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 15:03:41.341240 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 15:03:41.341366 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 15:03:41.341471 Setting prompt string to 'Starting depthcharge on Volmar...'
251 15:03:41.341555 Changing prompt to 'Starting depthcharge on Volmar...'
252 15:03:41.341643 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 15:03:41.341935 [Enter `^Ec?' for help]
254 15:03:42.709542
255 15:03:42.709711
256 15:03:42.717058 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 15:03:42.720934 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 15:03:42.725274 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 15:03:42.729468 CPU: AES supported, TXT NOT supported, VT supported
260 15:03:42.736869 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 15:03:42.740779 Cache size = 10 MiB
262 15:03:42.744169 MCH: device id 4609 (rev 04) is Alderlake-P
263 15:03:42.748913 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 15:03:42.755322 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 15:03:42.759395 VBOOT: Loading verstage.
266 15:03:42.763231 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 15:03:42.766469 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 15:03:42.773901 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 15:03:42.780834 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 15:03:42.787296 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 15:03:42.790760
272 15:03:42.791263
273 15:03:42.797456 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 15:03:42.804737 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 15:03:42.807839 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 15:03:42.812220 done! DID_VID 0x00281ae0
277 15:03:42.812689 TPM ready after 0 ms
278 15:03:42.818945 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
279 15:03:42.829012 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
280 15:03:42.835391 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
281 15:03:42.888585 tlcl_send_startup: Startup return code is 0
282 15:03:42.889021 TPM: setup succeeded
283 15:03:42.909626 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
284 15:03:42.932068 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
285 15:03:42.935604 Chrome EC: UHEPI supported
286 15:03:42.938981 Reading cr50 boot mode
287 15:03:42.954121 Cr50 says boot_mode is VERIFIED_RW(0x00).
288 15:03:42.954634 Phase 1
289 15:03:42.960204 FMAP: area GBB found @ 1805000 (458752 bytes)
290 15:03:42.966910 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
291 15:03:42.974910 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
292 15:03:42.981899 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
293 15:03:42.982399 Phase 2
294 15:03:42.982677 Phase 3
295 15:03:42.988599 FMAP: area GBB found @ 1805000 (458752 bytes)
296 15:03:42.991985 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 15:03:42.998586 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 15:03:43.004955 VB2:vb2_verify_keyblock() Checking keyblock signature...
299 15:03:43.011713 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
300 15:03:43.018607 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
301 15:03:43.025118 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
302 15:03:43.039564 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 15:03:43.043020 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 15:03:43.050215 VB2:vb2_verify_fw_preamble() Verifying preamble.
305 15:03:43.053559 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
306 15:03:43.060325 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
307 15:03:43.070344 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
308 15:03:43.073793 Phase 4
309 15:03:43.076908 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
310 15:03:43.083154 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
311 15:03:43.295077 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
312 15:03:43.301703 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
313 15:03:43.305475 Saving vboot hash.
314 15:03:43.311257 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
315 15:03:43.327297 tlcl_extend: response is 0
316 15:03:43.333703 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
317 15:03:43.340385 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
318 15:03:43.355011 tlcl_extend: response is 0
319 15:03:43.361473 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
320 15:03:43.380050 tlcl_lock_nv_write: response is 0
321 15:03:43.402001 tlcl_lock_nv_write: response is 0
322 15:03:43.402086 Slot A is selected
323 15:03:43.408411 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 15:03:43.415198 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
325 15:03:43.421995 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
326 15:03:43.428381 BS: verstage times (exec / console): total (unknown) / 256 ms
327 15:03:43.428465
328 15:03:43.428524
329 15:03:43.434972 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
330 15:03:43.440163 Google Chrome EC: version:
331 15:03:43.443183 ro: volmar_v2.0.14126-e605144e9c
332 15:03:43.446494 rw: volmar_v0.0.55-22d1557
333 15:03:43.450411 running image: 2
334 15:03:43.453425 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 15:03:43.463267 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
336 15:03:43.469880 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
337 15:03:43.476531 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
338 15:03:43.486315 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 15:03:43.496280 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 15:03:43.499641 EC took 941us to calculate image hash
341 15:03:43.509738 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 15:03:43.516309 VB2:sync_ec() select_rw=RW(active)
343 15:03:43.521315 Waited 300us to clear limit power flag.
344 15:03:43.528395 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 15:03:43.531938 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 15:03:43.535172 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 15:03:43.542074 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
348 15:03:43.545205 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
349 15:03:43.548397 TCO_STS: 0000 0000
350 15:03:43.548501 GEN_PMCON: d0015038 00002200
351 15:03:43.551636 GBLRST_CAUSE: 00000000 00000000
352 15:03:43.555035 HPR_CAUSE0: 00000000
353 15:03:43.558369 prev_sleep_state 5
354 15:03:43.561668 Abort disabling TXT, as CPU is not TXT capable.
355 15:03:43.569085 cse_lite: Number of partitions = 3
356 15:03:43.572378 cse_lite: Current partition = RO
357 15:03:43.572456 cse_lite: Next partition = RO
358 15:03:43.575697 cse_lite: Flags = 0x7
359 15:03:43.582624 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
360 15:03:43.592517 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
361 15:03:43.595813 FMAP: area SI_ME found @ 1000 (5238784 bytes)
362 15:03:43.602721 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 15:03:43.608798 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
364 15:03:43.615754 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
365 15:03:43.618930 cse_lite: CSE CBFS RW version : 16.1.25.2049
366 15:03:43.625588 cse_lite: Set Boot Partition Info Command (RW)
367 15:03:43.628862 HECI: Global Reset(Type:1) Command
368 15:03:45.051600 �ٶ(R) Core(TM) i3-1215U
369 15:03:45.058117 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
370 15:03:45.061243 CPU: AES supported, TXT NOT supported, VT supported
371 15:03:45.071223 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
372 15:03:45.071607 Cache size = 10 MiB
373 15:03:45.078342 MCH: device id 4609 (rev 04) is Alderlake-P
374 15:03:45.081099 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
375 15:03:45.087793 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
376 15:03:45.088170 VBOOT: Loading verstage.
377 15:03:45.095022 FMAP: Found "FLASH" version 1.1 at 0x1804000.
378 15:03:45.098986 FMAP: base = 0x0 size = 0x2000000 #areas = 37
379 15:03:45.105616 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 15:03:45.112169 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
381 15:03:45.119058 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
382 15:03:45.122559
383 15:03:45.123033
384 15:03:45.129289 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
385 15:03:45.135726 Probing TPM I2C: I2C bus 1 version 0x3230302a
386 15:03:45.138979 DW I2C bus 1 at 0xfe022000 (400 KHz)
387 15:03:45.142219 done! DID_VID 0x00281ae0
388 15:03:45.146228 TPM ready after 0 ms
389 15:03:45.149685 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
390 15:03:45.158375 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
391 15:03:45.165157 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
392 15:03:45.220728 tlcl_send_startup: Startup return code is 0
393 15:03:45.221188 TPM: setup succeeded
394 15:03:45.241502 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
395 15:03:45.263765 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
396 15:03:45.267571 Chrome EC: UHEPI supported
397 15:03:45.270596 Reading cr50 boot mode
398 15:03:45.285701 Cr50 says boot_mode is VERIFIED_RW(0x00).
399 15:03:45.286254 Phase 1
400 15:03:45.292396 FMAP: area GBB found @ 1805000 (458752 bytes)
401 15:03:45.298906 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
402 15:03:45.305513 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
403 15:03:45.312420 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
404 15:03:45.315063 Phase 2
405 15:03:45.315447 Phase 3
406 15:03:45.318731 FMAP: area GBB found @ 1805000 (458752 bytes)
407 15:03:45.325148 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 15:03:45.328301 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 15:03:45.335173 VB2:vb2_verify_keyblock() Checking keyblock signature...
410 15:03:45.341712 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
411 15:03:45.348289 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
412 15:03:45.358413 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
413 15:03:45.370667 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 15:03:45.374028 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 15:03:45.380551 VB2:vb2_verify_fw_preamble() Verifying preamble.
416 15:03:45.387548 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
417 15:03:45.393707 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
418 15:03:45.400388 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
419 15:03:45.404654 Phase 4
420 15:03:45.408210 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
421 15:03:45.414508 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
422 15:03:45.627019 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
423 15:03:45.633668 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
424 15:03:45.636841 Saving vboot hash.
425 15:03:45.643717 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
426 15:03:45.660313 tlcl_extend: response is 0
427 15:03:45.666832 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
428 15:03:45.673137 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
429 15:03:45.687729 tlcl_extend: response is 0
430 15:03:45.694526 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
431 15:03:45.714381 tlcl_lock_nv_write: response is 0
432 15:03:45.733543 tlcl_lock_nv_write: response is 0
433 15:03:45.734040 Slot A is selected
434 15:03:45.740270 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
435 15:03:45.746786 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
436 15:03:45.753494 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
437 15:03:45.760229 BS: verstage times (exec / console): total (unknown) / 256 ms
438 15:03:45.760741
439 15:03:45.761034
440 15:03:45.766942 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
441 15:03:45.771246 Google Chrome EC: version:
442 15:03:45.774887 ro: volmar_v2.0.14126-e605144e9c
443 15:03:45.778209 rw: volmar_v0.0.55-22d1557
444 15:03:45.781776 running image: 2
445 15:03:45.784662 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
446 15:03:45.794853 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
447 15:03:45.801351 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
448 15:03:45.808279 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
449 15:03:45.818098 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 15:03:45.827998 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 15:03:45.830971 EC took 981us to calculate image hash
452 15:03:45.841394 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 15:03:45.844735 VB2:sync_ec() select_rw=RW(active)
454 15:03:45.856956 Waited 270us to clear limit power flag.
455 15:03:45.860137 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
456 15:03:45.863751 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
457 15:03:45.867046 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
458 15:03:45.870727 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
459 15:03:45.877846 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
460 15:03:45.878342 TCO_STS: 0000 0000
461 15:03:45.880997 GEN_PMCON: d1001038 00002200
462 15:03:45.884227 GBLRST_CAUSE: 00000040 00000000
463 15:03:45.887457 HPR_CAUSE0: 00000000
464 15:03:45.887972 prev_sleep_state 5
465 15:03:45.895138 Abort disabling TXT, as CPU is not TXT capable.
466 15:03:45.901906 cse_lite: Number of partitions = 3
467 15:03:45.904993 cse_lite: Current partition = RW
468 15:03:45.905386 cse_lite: Next partition = RW
469 15:03:45.908080 cse_lite: Flags = 0x7
470 15:03:45.915148 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
471 15:03:45.924952 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
472 15:03:45.928160 FMAP: area SI_ME found @ 1000 (5238784 bytes)
473 15:03:45.935207 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
474 15:03:45.941526 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
475 15:03:45.948108 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
476 15:03:45.951663 cse_lite: CSE CBFS RW version : 16.1.25.2049
477 15:03:45.954597 Boot Count incremented to 2393
478 15:03:45.961239 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
479 15:03:45.968176 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
480 15:03:45.980834 Probing TPM I2C: done! DID_VID 0x00281ae0
481 15:03:45.984102 Locality already claimed
482 15:03:45.987860 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
483 15:03:46.007226 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
484 15:03:46.013839 MRC: Hash idx 0x100d comparison successful.
485 15:03:46.017102 MRC cache found, size f6c8
486 15:03:46.017597 bootmode is set to: 2
487 15:03:46.021585 EC returned error result code 3
488 15:03:46.024887 FW_CONFIG value from CBI is 0x131
489 15:03:46.031335 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
490 15:03:46.034533 SPD index = 0
491 15:03:46.041564 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
492 15:03:46.042234 SPD: module type is LPDDR4X
493 15:03:46.050220 SPD: module part number is K4U6E3S4AB-MGCL
494 15:03:46.056800 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
495 15:03:46.059718 SPD: device width 16 bits, bus width 16 bits
496 15:03:46.062611 SPD: module size is 1024 MB (per channel)
497 15:03:46.131708 CBMEM:
498 15:03:46.135318 IMD: root @ 0x76fff000 254 entries.
499 15:03:46.138395 IMD: root @ 0x76ffec00 62 entries.
500 15:03:46.146522 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
501 15:03:46.149763 RO_VPD is uninitialized or empty.
502 15:03:46.152752 FMAP: area RW_VPD found @ f29000 (8192 bytes)
503 15:03:46.159869 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
504 15:03:46.162912 External stage cache:
505 15:03:46.166218 IMD: root @ 0x7bbff000 254 entries.
506 15:03:46.169573 IMD: root @ 0x7bbfec00 62 entries.
507 15:03:46.176486 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 15:03:46.183058 MRC: Checking cached data update for 'RW_MRC_CACHE'.
509 15:03:46.186428 MRC: 'RW_MRC_CACHE' does not need update.
510 15:03:46.186835 8 DIMMs found
511 15:03:46.189345 SMM Memory Map
512 15:03:46.193148 SMRAM : 0x7b800000 0x800000
513 15:03:46.196684 Subregion 0: 0x7b800000 0x200000
514 15:03:46.199563 Subregion 1: 0x7ba00000 0x200000
515 15:03:46.203203 Subregion 2: 0x7bc00000 0x400000
516 15:03:46.206094 top_of_ram = 0x77000000
517 15:03:46.210350 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
518 15:03:46.216379 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
519 15:03:46.222992 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
520 15:03:46.226435 MTRR Range: Start=ff000000 End=0 (Size 1000000)
521 15:03:46.226953 Normal boot
522 15:03:46.236436 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
523 15:03:46.242898 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
524 15:03:46.249415 Processing 237 relocs. Offset value of 0x74ab9000
525 15:03:46.257695 BS: romstage times (exec / console): total (unknown) / 377 ms
526 15:03:46.265132
527 15:03:46.265583
528 15:03:46.272216 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
529 15:03:46.272754 Normal boot
530 15:03:46.278331 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
531 15:03:46.285123 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
532 15:03:46.291599 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
533 15:03:46.301942 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
534 15:03:46.349628 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
535 15:03:46.356537 Processing 5931 relocs. Offset value of 0x72a2f000
536 15:03:46.359660 BS: postcar times (exec / console): total (unknown) / 51 ms
537 15:03:46.362824
538 15:03:46.363301
539 15:03:46.369513 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
540 15:03:46.372690 Reserving BERT start 76a1e000, size 10000
541 15:03:46.376015 Normal boot
542 15:03:46.379218 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 15:03:46.385995 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 15:03:46.395746 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 15:03:46.399194 FMAP: area RW_VPD found @ f29000 (8192 bytes)
546 15:03:46.402626 Google Chrome EC: version:
547 15:03:46.405895 ro: volmar_v2.0.14126-e605144e9c
548 15:03:46.409112 rw: volmar_v0.0.55-22d1557
549 15:03:46.412654 running image: 2
550 15:03:46.415630 ACPI _SWS is PM1 Index 8 GPE Index -1
551 15:03:46.419222 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
552 15:03:46.423339 EC returned error result code 3
553 15:03:46.426620 FW_CONFIG value from CBI is 0x131
554 15:03:46.433035 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
555 15:03:46.436604 PCI: 00:1c.2 disabled by fw_config
556 15:03:46.444199 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 15:03:46.447424 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 15:03:46.454140 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 15:03:46.457233 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
560 15:03:46.463819 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
561 15:03:46.470392 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
562 15:03:46.473805 microcode: sig=0x906a4 pf=0x80 revision=0x423
563 15:03:46.480670 microcode: Update skipped, already up-to-date
564 15:03:46.486959 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
565 15:03:46.519375 Detected 6 core, 8 thread CPU.
566 15:03:46.522409 Setting up SMI for CPU
567 15:03:46.526244 IED base = 0x7bc00000
568 15:03:46.526745 IED size = 0x00400000
569 15:03:46.528973 Will perform SMM setup.
570 15:03:46.532253 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
571 15:03:46.535403 LAPIC 0x0 in XAPIC mode.
572 15:03:46.545503 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
573 15:03:46.548811 Processing 18 relocs. Offset value of 0x00030000
574 15:03:46.553762 Attempting to start 7 APs
575 15:03:46.556830 Waiting for 10ms after sending INIT.
576 15:03:46.570070 Waiting for SIPI to complete...
577 15:03:46.573299 LAPIC 0x1 in XAPIC mode.
578 15:03:46.576442 LAPIC 0x16 in XAPIC mode.
579 15:03:46.579863 LAPIC 0x8 in XAPIC mode.
580 15:03:46.583059 LAPIC 0x10 in XAPIC mode.
581 15:03:46.586501 AP: slot 7 apic_id 8, MCU rev: 0x00000423
582 15:03:46.589862 AP: slot 2 apic_id 16, MCU rev: 0x00000423
583 15:03:46.592844 AP: slot 3 apic_id 10, MCU rev: 0x00000423
584 15:03:46.596378 LAPIC 0x14 in XAPIC mode.
585 15:03:46.599331 LAPIC 0x12 in XAPIC mode.
586 15:03:46.602829 AP: slot 1 apic_id 14, MCU rev: 0x00000423
587 15:03:46.609316 AP: slot 4 apic_id 12, MCU rev: 0x00000423
588 15:03:46.609676 LAPIC 0x9 in XAPIC mode.
589 15:03:46.612776 done.
590 15:03:46.616474 AP: slot 5 apic_id 1, MCU rev: 0x00000423
591 15:03:46.619697 Waiting for SIPI to complete...
592 15:03:46.620289 done.
593 15:03:46.622787 AP: slot 6 apic_id 9, MCU rev: 0x00000423
594 15:03:46.626295 smm_setup_relocation_handler: enter
595 15:03:46.629534 smm_setup_relocation_handler: exit
596 15:03:46.639660 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
597 15:03:46.642802 Processing 11 relocs. Offset value of 0x00038000
598 15:03:46.649336 smm_module_setup_stub: stack_top = 0x7b804000
599 15:03:46.652598 smm_module_setup_stub: per cpu stack_size = 0x800
600 15:03:46.659568 smm_module_setup_stub: runtime.start32_offset = 0x4c
601 15:03:46.662890 smm_module_setup_stub: runtime.smm_size = 0x10000
602 15:03:46.669471 SMM Module: stub loaded at 38000. Will call 0x76a52094
603 15:03:46.673042 Installing permanent SMM handler to 0x7b800000
604 15:03:46.679675 smm_load_module: total_smm_space_needed e468, available -> 200000
605 15:03:46.689163 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
606 15:03:46.692712 Processing 255 relocs. Offset value of 0x7b9f6000
607 15:03:46.699699 smm_load_module: smram_start: 0x7b800000
608 15:03:46.702769 smm_load_module: smram_end: 7ba00000
609 15:03:46.705791 smm_load_module: handler start 0x7b9f6d5f
610 15:03:46.709292 smm_load_module: handler_size 98d0
611 15:03:46.712506 smm_load_module: fxsave_area 0x7b9ff000
612 15:03:46.715721 smm_load_module: fxsave_size 1000
613 15:03:46.719382 smm_load_module: CONFIG_MSEG_SIZE 0x0
614 15:03:46.726320 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
615 15:03:46.732578 smm_load_module: handler_mod_params.smbase = 0x7b800000
616 15:03:46.735718 smm_load_module: per_cpu_save_state_size = 0x400
617 15:03:46.739373 smm_load_module: num_cpus = 0x8
618 15:03:46.745656 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
619 15:03:46.748948 smm_load_module: total_save_state_size = 0x2000
620 15:03:46.755534 smm_load_module: cpu0 entry: 7b9e6000
621 15:03:46.758937 smm_create_map: cpus allowed in one segment 30
622 15:03:46.762553 smm_create_map: min # of segments needed 1
623 15:03:46.763028 CPU 0x0
624 15:03:46.769512 smbase 7b9e6000 entry 7b9ee000
625 15:03:46.772222 ss_start 7b9f5c00 code_end 7b9ee208
626 15:03:46.772613 CPU 0x1
627 15:03:46.775895 smbase 7b9e5c00 entry 7b9edc00
628 15:03:46.782026 ss_start 7b9f5800 code_end 7b9ede08
629 15:03:46.782463 CPU 0x2
630 15:03:46.785178 smbase 7b9e5800 entry 7b9ed800
631 15:03:46.792109 ss_start 7b9f5400 code_end 7b9eda08
632 15:03:46.792633 CPU 0x3
633 15:03:46.795408 smbase 7b9e5400 entry 7b9ed400
634 15:03:46.798839 ss_start 7b9f5000 code_end 7b9ed608
635 15:03:46.802382 CPU 0x4
636 15:03:46.805627 smbase 7b9e5000 entry 7b9ed000
637 15:03:46.808551 ss_start 7b9f4c00 code_end 7b9ed208
638 15:03:46.808940 CPU 0x5
639 15:03:46.815622 smbase 7b9e4c00 entry 7b9ecc00
640 15:03:46.818838 ss_start 7b9f4800 code_end 7b9ece08
641 15:03:46.819332 CPU 0x6
642 15:03:46.822416 smbase 7b9e4800 entry 7b9ec800
643 15:03:46.828427 ss_start 7b9f4400 code_end 7b9eca08
644 15:03:46.828876 CPU 0x7
645 15:03:46.832142 smbase 7b9e4400 entry 7b9ec400
646 15:03:46.838551 ss_start 7b9f4000 code_end 7b9ec608
647 15:03:46.845606 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
648 15:03:46.852216 Processing 11 relocs. Offset value of 0x7b9ee000
649 15:03:46.855202 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
650 15:03:46.861586 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
651 15:03:46.868334 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
652 15:03:46.875263 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
653 15:03:46.881881 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
654 15:03:46.888020 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
655 15:03:46.895243 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
656 15:03:46.898144 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
657 15:03:46.905062 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
658 15:03:46.911659 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
659 15:03:46.918653 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
660 15:03:46.924907 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
661 15:03:46.931721 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
662 15:03:46.938110 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
663 15:03:46.945081 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
664 15:03:46.948216 smm_module_setup_stub: stack_top = 0x7b804000
665 15:03:46.954569 smm_module_setup_stub: per cpu stack_size = 0x800
666 15:03:46.958103 smm_module_setup_stub: runtime.start32_offset = 0x4c
667 15:03:46.964741 smm_module_setup_stub: runtime.smm_size = 0x200000
668 15:03:46.971286 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
669 15:03:46.974478 Clearing SMI status registers
670 15:03:46.978360 SMI_STS: PM1
671 15:03:46.978928 PM1_STS: WAK PWRBTN
672 15:03:46.984451 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
673 15:03:46.987896 In relocation handler: CPU 0
674 15:03:46.994278 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
675 15:03:46.997907 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 15:03:47.001343 Relocation complete.
677 15:03:47.007850 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
678 15:03:47.010756 In relocation handler: CPU 5
679 15:03:47.014535 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
680 15:03:47.018100 Relocation complete.
681 15:03:47.024357 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
682 15:03:47.027551 In relocation handler: CPU 3
683 15:03:47.031225 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
684 15:03:47.034079 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 15:03:47.037506 Relocation complete.
686 15:03:47.044210 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
687 15:03:47.047595 In relocation handler: CPU 2
688 15:03:47.050971 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
689 15:03:47.057753 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 15:03:47.058242 Relocation complete.
691 15:03:47.067636 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
692 15:03:47.068217 In relocation handler: CPU 4
693 15:03:47.073991 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
694 15:03:47.077248 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 15:03:47.080635 Relocation complete.
696 15:03:47.087140 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
697 15:03:47.090708 In relocation handler: CPU 1
698 15:03:47.093970 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
699 15:03:47.097431 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 15:03:47.100963 Relocation complete.
701 15:03:47.107474 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
702 15:03:47.111057 In relocation handler: CPU 6
703 15:03:47.114293 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
704 15:03:47.117440 Relocation complete.
705 15:03:47.123862 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
706 15:03:47.127404 In relocation handler: CPU 7
707 15:03:47.130698 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
708 15:03:47.137125 Writing SMRR. base = 0x7b800006, mask=0xff800c00
709 15:03:47.137563 Relocation complete.
710 15:03:47.140317 Initializing CPU #0
711 15:03:47.144140 CPU: vendor Intel device 906a4
712 15:03:47.147301 CPU: family 06, model 9a, stepping 04
713 15:03:47.150837 Clearing out pending MCEs
714 15:03:47.154010 cpu: energy policy set to 7
715 15:03:47.156841 Turbo is available but hidden
716 15:03:47.160038 Turbo is available and visible
717 15:03:47.163981 microcode: Update skipped, already up-to-date
718 15:03:47.167260 CPU #0 initialized
719 15:03:47.167800 Initializing CPU #5
720 15:03:47.170292 Initializing CPU #2
721 15:03:47.173839 Initializing CPU #1
722 15:03:47.176962 CPU: vendor Intel device 906a4
723 15:03:47.180280 CPU: family 06, model 9a, stepping 04
724 15:03:47.180661 Initializing CPU #3
725 15:03:47.183804 Initializing CPU #4
726 15:03:47.187057 CPU: vendor Intel device 906a4
727 15:03:47.190097 CPU: family 06, model 9a, stepping 04
728 15:03:47.193782 CPU: vendor Intel device 906a4
729 15:03:47.196646 CPU: family 06, model 9a, stepping 04
730 15:03:47.200032 Initializing CPU #6
731 15:03:47.200397 Clearing out pending MCEs
732 15:03:47.203721 Clearing out pending MCEs
733 15:03:47.206969 Clearing out pending MCEs
734 15:03:47.210012 CPU: vendor Intel device 906a4
735 15:03:47.213447 CPU: family 06, model 9a, stepping 04
736 15:03:47.217042 cpu: energy policy set to 7
737 15:03:47.220493 Clearing out pending MCEs
738 15:03:47.223099 cpu: energy policy set to 7
739 15:03:47.226755 CPU: vendor Intel device 906a4
740 15:03:47.229865 CPU: family 06, model 9a, stepping 04
741 15:03:47.232732 cpu: energy policy set to 7
742 15:03:47.236009 microcode: Update skipped, already up-to-date
743 15:03:47.239885 CPU #2 initialized
744 15:03:47.239960 cpu: energy policy set to 7
745 15:03:47.242985 Clearing out pending MCEs
746 15:03:47.249442 microcode: Update skipped, already up-to-date
747 15:03:47.249519 CPU #3 initialized
748 15:03:47.252784 Initializing CPU #7
749 15:03:47.256063 cpu: energy policy set to 7
750 15:03:47.259530 microcode: Update skipped, already up-to-date
751 15:03:47.262884 CPU #4 initialized
752 15:03:47.266695 CPU: vendor Intel device 906a4
753 15:03:47.269829 CPU: family 06, model 9a, stepping 04
754 15:03:47.273103 microcode: Update skipped, already up-to-date
755 15:03:47.276391 CPU #1 initialized
756 15:03:47.276739 Clearing out pending MCEs
757 15:03:47.283534 microcode: Update skipped, already up-to-date
758 15:03:47.283986 CPU #6 initialized
759 15:03:47.286545 CPU: vendor Intel device 906a4
760 15:03:47.292954 CPU: family 06, model 9a, stepping 04
761 15:03:47.293392 cpu: energy policy set to 7
762 15:03:47.295924 Clearing out pending MCEs
763 15:03:47.302606 microcode: Update skipped, already up-to-date
764 15:03:47.302682 CPU #5 initialized
765 15:03:47.306271 cpu: energy policy set to 7
766 15:03:47.309408 microcode: Update skipped, already up-to-date
767 15:03:47.312338 CPU #7 initialized
768 15:03:47.316116 bsp_do_flight_plan done after 693 msecs.
769 15:03:47.319285 CPU: frequency set to 4400 MHz
770 15:03:47.322528 Enabling SMIs.
771 15:03:47.329259 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
772 15:03:47.343632 Probing TPM I2C: done! DID_VID 0x00281ae0
773 15:03:47.347209 Locality already claimed
774 15:03:47.350384 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
775 15:03:47.361818 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
776 15:03:47.365301 Enabling GPIO PM b/c CR50 has long IRQ pulse support
777 15:03:47.371681 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
778 15:03:47.378331 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
779 15:03:47.381514 Found a VBT of 9216 bytes after decompression
780 15:03:47.385021 PCI 1.0, PIN A, using IRQ #16
781 15:03:47.388236 PCI 2.0, PIN A, using IRQ #17
782 15:03:47.391544 PCI 4.0, PIN A, using IRQ #18
783 15:03:47.395069 PCI 5.0, PIN A, using IRQ #16
784 15:03:47.398036 PCI 6.0, PIN A, using IRQ #16
785 15:03:47.402029 PCI 6.2, PIN C, using IRQ #18
786 15:03:47.404733 PCI 7.0, PIN A, using IRQ #19
787 15:03:47.408030 PCI 7.1, PIN B, using IRQ #20
788 15:03:47.411661 PCI 7.2, PIN C, using IRQ #21
789 15:03:47.414891 PCI 7.3, PIN D, using IRQ #22
790 15:03:47.418392 PCI 8.0, PIN A, using IRQ #23
791 15:03:47.421603 PCI D.0, PIN A, using IRQ #17
792 15:03:47.424742 PCI D.1, PIN B, using IRQ #19
793 15:03:47.424819 PCI 10.0, PIN A, using IRQ #24
794 15:03:47.428202 PCI 10.1, PIN B, using IRQ #25
795 15:03:47.431542 PCI 10.6, PIN C, using IRQ #20
796 15:03:47.435248 PCI 10.7, PIN D, using IRQ #21
797 15:03:47.438108 PCI 11.0, PIN A, using IRQ #26
798 15:03:47.441438 PCI 11.1, PIN B, using IRQ #27
799 15:03:47.444638 PCI 11.2, PIN C, using IRQ #28
800 15:03:47.447923 PCI 11.3, PIN D, using IRQ #29
801 15:03:47.451502 PCI 12.0, PIN A, using IRQ #30
802 15:03:47.454616 PCI 12.6, PIN B, using IRQ #31
803 15:03:47.457904 PCI 12.7, PIN C, using IRQ #22
804 15:03:47.461580 PCI 13.0, PIN A, using IRQ #32
805 15:03:47.464840 PCI 13.1, PIN B, using IRQ #33
806 15:03:47.467954 PCI 13.2, PIN C, using IRQ #34
807 15:03:47.471378 PCI 13.3, PIN D, using IRQ #35
808 15:03:47.474528 PCI 14.0, PIN B, using IRQ #23
809 15:03:47.477837 PCI 14.1, PIN A, using IRQ #36
810 15:03:47.481001 PCI 14.3, PIN C, using IRQ #17
811 15:03:47.481078 PCI 15.0, PIN A, using IRQ #37
812 15:03:47.484387 PCI 15.1, PIN B, using IRQ #38
813 15:03:47.487814 PCI 15.2, PIN C, using IRQ #39
814 15:03:47.490962 PCI 15.3, PIN D, using IRQ #40
815 15:03:47.494337 PCI 16.0, PIN A, using IRQ #18
816 15:03:47.497986 PCI 16.1, PIN B, using IRQ #19
817 15:03:47.500998 PCI 16.2, PIN C, using IRQ #20
818 15:03:47.504296 PCI 16.3, PIN D, using IRQ #21
819 15:03:47.507783 PCI 16.4, PIN A, using IRQ #18
820 15:03:47.511158 PCI 16.5, PIN B, using IRQ #19
821 15:03:47.514305 PCI 17.0, PIN A, using IRQ #22
822 15:03:47.517752 PCI 19.0, PIN A, using IRQ #41
823 15:03:47.521137 PCI 19.1, PIN B, using IRQ #42
824 15:03:47.524303 PCI 19.2, PIN C, using IRQ #43
825 15:03:47.527508 PCI 1C.0, PIN A, using IRQ #16
826 15:03:47.531206 PCI 1C.1, PIN B, using IRQ #17
827 15:03:47.534239 PCI 1C.2, PIN C, using IRQ #18
828 15:03:47.534316 PCI 1C.3, PIN D, using IRQ #19
829 15:03:47.537501 PCI 1C.4, PIN A, using IRQ #16
830 15:03:47.540874 PCI 1C.5, PIN B, using IRQ #17
831 15:03:47.543960 PCI 1C.6, PIN C, using IRQ #18
832 15:03:47.547553 PCI 1C.7, PIN D, using IRQ #19
833 15:03:47.550781 PCI 1D.0, PIN A, using IRQ #16
834 15:03:47.554263 PCI 1D.1, PIN B, using IRQ #17
835 15:03:47.557275 PCI 1D.2, PIN C, using IRQ #18
836 15:03:47.561000 PCI 1D.3, PIN D, using IRQ #19
837 15:03:47.564068 PCI 1E.0, PIN A, using IRQ #23
838 15:03:47.567340 PCI 1E.1, PIN B, using IRQ #20
839 15:03:47.570810 PCI 1E.2, PIN C, using IRQ #44
840 15:03:47.574287 PCI 1E.3, PIN D, using IRQ #45
841 15:03:47.577535 PCI 1F.3, PIN B, using IRQ #22
842 15:03:47.580720 PCI 1F.4, PIN C, using IRQ #23
843 15:03:47.584001 PCI 1F.6, PIN D, using IRQ #20
844 15:03:47.587454 PCI 1F.7, PIN A, using IRQ #21
845 15:03:47.590765 IRQ: Using dynamically assigned PCI IO-APIC IRQs
846 15:03:47.597250 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
847 15:03:47.778606 FSPS returned 0
848 15:03:47.781610 Executing Phase 1 of FspMultiPhaseSiInit
849 15:03:47.791450 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
850 15:03:47.794886 port C0 DISC req: usage 1 usb3 1 usb2 1
851 15:03:47.798089 Raw Buffer output 0 00000111
852 15:03:47.801304 Raw Buffer output 1 00000000
853 15:03:47.805016 pmc_send_ipc_cmd succeeded
854 15:03:47.811716 port C1 DISC req: usage 1 usb3 3 usb2 3
855 15:03:47.811795 Raw Buffer output 0 00000331
856 15:03:47.814951 Raw Buffer output 1 00000000
857 15:03:47.819272 pmc_send_ipc_cmd succeeded
858 15:03:47.822907 Detected 6 core, 8 thread CPU.
859 15:03:47.826398 Detected 6 core, 8 thread CPU.
860 15:03:47.831804 Detected 6 core, 8 thread CPU.
861 15:03:47.834896 Detected 6 core, 8 thread CPU.
862 15:03:47.838628 Detected 6 core, 8 thread CPU.
863 15:03:47.841565 Detected 6 core, 8 thread CPU.
864 15:03:47.844911 Detected 6 core, 8 thread CPU.
865 15:03:47.848078 Detected 6 core, 8 thread CPU.
866 15:03:47.851651 Detected 6 core, 8 thread CPU.
867 15:03:47.854804 Detected 6 core, 8 thread CPU.
868 15:03:47.858393 Detected 6 core, 8 thread CPU.
869 15:03:47.861529 Detected 6 core, 8 thread CPU.
870 15:03:47.864883 Detected 6 core, 8 thread CPU.
871 15:03:47.867742 Detected 6 core, 8 thread CPU.
872 15:03:47.871302 Detected 6 core, 8 thread CPU.
873 15:03:47.874661 Detected 6 core, 8 thread CPU.
874 15:03:47.878249 Detected 6 core, 8 thread CPU.
875 15:03:47.881432 Detected 6 core, 8 thread CPU.
876 15:03:47.884679 Detected 6 core, 8 thread CPU.
877 15:03:47.887867 Detected 6 core, 8 thread CPU.
878 15:03:47.891289 Detected 6 core, 8 thread CPU.
879 15:03:47.894505 Detected 6 core, 8 thread CPU.
880 15:03:48.174711 Detected 6 core, 8 thread CPU.
881 15:03:48.177942 Detected 6 core, 8 thread CPU.
882 15:03:48.181085 Detected 6 core, 8 thread CPU.
883 15:03:48.184426 Detected 6 core, 8 thread CPU.
884 15:03:48.187980 Detected 6 core, 8 thread CPU.
885 15:03:48.191191 Detected 6 core, 8 thread CPU.
886 15:03:48.194726 Detected 6 core, 8 thread CPU.
887 15:03:48.197903 Detected 6 core, 8 thread CPU.
888 15:03:48.200910 Detected 6 core, 8 thread CPU.
889 15:03:48.204263 Detected 6 core, 8 thread CPU.
890 15:03:48.207858 Detected 6 core, 8 thread CPU.
891 15:03:48.210902 Detected 6 core, 8 thread CPU.
892 15:03:48.214748 Detected 6 core, 8 thread CPU.
893 15:03:48.217617 Detected 6 core, 8 thread CPU.
894 15:03:48.221304 Detected 6 core, 8 thread CPU.
895 15:03:48.224406 Detected 6 core, 8 thread CPU.
896 15:03:48.227346 Detected 6 core, 8 thread CPU.
897 15:03:48.230846 Detected 6 core, 8 thread CPU.
898 15:03:48.234063 Detected 6 core, 8 thread CPU.
899 15:03:48.237509 Detected 6 core, 8 thread CPU.
900 15:03:48.241006 Display FSP Version Info HOB
901 15:03:48.244284 Reference Code - CPU = c.0.65.70
902 15:03:48.244360 uCode Version = 0.0.4.23
903 15:03:48.247691 TXT ACM version = ff.ff.ff.ffff
904 15:03:48.250935 Reference Code - ME = c.0.65.70
905 15:03:48.253923 MEBx version = 0.0.0.0
906 15:03:48.257449 ME Firmware Version = Lite SKU
907 15:03:48.260787 Reference Code - PCH = c.0.65.70
908 15:03:48.263942 PCH-CRID Status = Disabled
909 15:03:48.267501 PCH-CRID Original Value = ff.ff.ff.ffff
910 15:03:48.271151 PCH-CRID New Value = ff.ff.ff.ffff
911 15:03:48.273900 OPROM - RST - RAID = ff.ff.ff.ffff
912 15:03:48.277604 PCH Hsio Version = 4.0.0.0
913 15:03:48.280685 Reference Code - SA - System Agent = c.0.65.70
914 15:03:48.284311 Reference Code - MRC = 0.0.3.80
915 15:03:48.287472 SA - PCIe Version = c.0.65.70
916 15:03:48.290781 SA-CRID Status = Disabled
917 15:03:48.294147 SA-CRID Original Value = 0.0.0.4
918 15:03:48.297344 SA-CRID New Value = 0.0.0.4
919 15:03:48.300632 OPROM - VBIOS = ff.ff.ff.ffff
920 15:03:48.304016 IO Manageability Engine FW Version = 24.0.4.0
921 15:03:48.307230 PHY Build Version = 0.0.0.2016
922 15:03:48.310716 Thunderbolt(TM) FW Version = 0.0.0.0
923 15:03:48.317212 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
924 15:03:48.323890 BS: BS_DEV_INIT_CHIPS run times (exec / console): 482 / 507 ms
925 15:03:48.327089 Enumerating buses...
926 15:03:48.330547 Show all devs... Before device enumeration.
927 15:03:48.334131 Root Device: enabled 1
928 15:03:48.337467 CPU_CLUSTER: 0: enabled 1
929 15:03:48.337552 DOMAIN: 0000: enabled 1
930 15:03:48.340467 GPIO: 0: enabled 1
931 15:03:48.343863 PCI: 00:00.0: enabled 1
932 15:03:48.343938 PCI: 00:01.0: enabled 0
933 15:03:48.347113 PCI: 00:01.1: enabled 0
934 15:03:48.350540 PCI: 00:02.0: enabled 1
935 15:03:48.353970 PCI: 00:04.0: enabled 1
936 15:03:48.354026 PCI: 00:05.0: enabled 0
937 15:03:48.357271 PCI: 00:06.0: enabled 1
938 15:03:48.360356 PCI: 00:06.2: enabled 0
939 15:03:48.360418 PCI: 00:07.0: enabled 0
940 15:03:48.363721 PCI: 00:07.1: enabled 0
941 15:03:48.367027 PCI: 00:07.2: enabled 0
942 15:03:48.370411 PCI: 00:07.3: enabled 0
943 15:03:48.370470 PCI: 00:08.0: enabled 0
944 15:03:48.373659 PCI: 00:09.0: enabled 0
945 15:03:48.377436 PCI: 00:0a.0: enabled 1
946 15:03:48.380217 PCI: 00:0d.0: enabled 1
947 15:03:48.380280 PCI: 00:0d.1: enabled 0
948 15:03:48.383761 PCI: 00:0d.2: enabled 0
949 15:03:48.387226 PCI: 00:0d.3: enabled 0
950 15:03:48.390579 PCI: 00:0e.0: enabled 0
951 15:03:48.390646 PCI: 00:10.0: enabled 0
952 15:03:48.393772 PCI: 00:10.1: enabled 0
953 15:03:48.396972 PCI: 00:10.6: enabled 0
954 15:03:48.397032 PCI: 00:10.7: enabled 0
955 15:03:48.400252 PCI: 00:12.0: enabled 0
956 15:03:48.403571 PCI: 00:12.6: enabled 0
957 15:03:48.407070 PCI: 00:12.7: enabled 0
958 15:03:48.407145 PCI: 00:13.0: enabled 0
959 15:03:48.410361 PCI: 00:14.0: enabled 1
960 15:03:48.413692 PCI: 00:14.1: enabled 0
961 15:03:48.416792 PCI: 00:14.2: enabled 1
962 15:03:48.416853 PCI: 00:14.3: enabled 1
963 15:03:48.420542 PCI: 00:15.0: enabled 1
964 15:03:48.423705 PCI: 00:15.1: enabled 1
965 15:03:48.426852 PCI: 00:15.2: enabled 0
966 15:03:48.426928 PCI: 00:15.3: enabled 1
967 15:03:48.430041 PCI: 00:16.0: enabled 1
968 15:03:48.433693 PCI: 00:16.1: enabled 0
969 15:03:48.437093 PCI: 00:16.2: enabled 0
970 15:03:48.437169 PCI: 00:16.3: enabled 0
971 15:03:48.440265 PCI: 00:16.4: enabled 0
972 15:03:48.443654 PCI: 00:16.5: enabled 0
973 15:03:48.443730 PCI: 00:17.0: enabled 1
974 15:03:48.446838 PCI: 00:19.0: enabled 0
975 15:03:48.450285 PCI: 00:19.1: enabled 1
976 15:03:48.453418 PCI: 00:19.2: enabled 0
977 15:03:48.453506 PCI: 00:1a.0: enabled 0
978 15:03:48.456759 PCI: 00:1c.0: enabled 0
979 15:03:48.460052 PCI: 00:1c.1: enabled 0
980 15:03:48.463463 PCI: 00:1c.2: enabled 0
981 15:03:48.463539 PCI: 00:1c.3: enabled 0
982 15:03:48.466811 PCI: 00:1c.4: enabled 0
983 15:03:48.469874 PCI: 00:1c.5: enabled 0
984 15:03:48.473291 PCI: 00:1c.6: enabled 0
985 15:03:48.473372 PCI: 00:1c.7: enabled 0
986 15:03:48.476843 PCI: 00:1d.0: enabled 0
987 15:03:48.480054 PCI: 00:1d.1: enabled 0
988 15:03:48.480131 PCI: 00:1d.2: enabled 0
989 15:03:48.483488 PCI: 00:1d.3: enabled 0
990 15:03:48.486761 PCI: 00:1e.0: enabled 1
991 15:03:48.490058 PCI: 00:1e.1: enabled 0
992 15:03:48.490134 PCI: 00:1e.2: enabled 0
993 15:03:48.493212 PCI: 00:1e.3: enabled 1
994 15:03:48.496889 PCI: 00:1f.0: enabled 1
995 15:03:48.499802 PCI: 00:1f.1: enabled 0
996 15:03:48.499871 PCI: 00:1f.2: enabled 1
997 15:03:48.503135 PCI: 00:1f.3: enabled 1
998 15:03:48.506694 PCI: 00:1f.4: enabled 0
999 15:03:48.509870 PCI: 00:1f.5: enabled 1
1000 15:03:48.509946 PCI: 00:1f.6: enabled 0
1001 15:03:48.513757 PCI: 00:1f.7: enabled 0
1002 15:03:48.516844 GENERIC: 0.0: enabled 1
1003 15:03:48.516921 GENERIC: 0.0: enabled 1
1004 15:03:48.519996 GENERIC: 1.0: enabled 1
1005 15:03:48.523474 GENERIC: 0.0: enabled 1
1006 15:03:48.526758 GENERIC: 1.0: enabled 1
1007 15:03:48.526834 USB0 port 0: enabled 1
1008 15:03:48.530250 USB0 port 0: enabled 1
1009 15:03:48.533237 GENERIC: 0.0: enabled 1
1010 15:03:48.536556 I2C: 00:1a: enabled 1
1011 15:03:48.536634 I2C: 00:31: enabled 1
1012 15:03:48.540072 I2C: 00:32: enabled 1
1013 15:03:48.543289 I2C: 00:50: enabled 1
1014 15:03:48.543365 I2C: 00:10: enabled 1
1015 15:03:48.546304 I2C: 00:15: enabled 1
1016 15:03:48.549586 I2C: 00:2c: enabled 1
1017 15:03:48.549669 GENERIC: 0.0: enabled 1
1018 15:03:48.552816 SPI: 00: enabled 1
1019 15:03:48.556647 PNP: 0c09.0: enabled 1
1020 15:03:48.556713 GENERIC: 0.0: enabled 1
1021 15:03:48.559628 USB3 port 0: enabled 1
1022 15:03:48.562796 USB3 port 1: enabled 0
1023 15:03:48.566389 USB3 port 2: enabled 1
1024 15:03:48.566457 USB3 port 3: enabled 0
1025 15:03:48.569817 USB2 port 0: enabled 1
1026 15:03:48.572939 USB2 port 1: enabled 0
1027 15:03:48.573014 USB2 port 2: enabled 1
1028 15:03:48.576255 USB2 port 3: enabled 0
1029 15:03:48.579410 USB2 port 4: enabled 0
1030 15:03:48.579485 USB2 port 5: enabled 1
1031 15:03:48.582708 USB2 port 6: enabled 0
1032 15:03:48.586373 USB2 port 7: enabled 0
1033 15:03:48.589955 USB2 port 8: enabled 1
1034 15:03:48.590031 USB2 port 9: enabled 1
1035 15:03:48.592811 USB3 port 0: enabled 1
1036 15:03:48.596000 USB3 port 1: enabled 0
1037 15:03:48.596084 USB3 port 2: enabled 0
1038 15:03:48.599260 USB3 port 3: enabled 0
1039 15:03:48.602921 GENERIC: 0.0: enabled 1
1040 15:03:48.606073 GENERIC: 1.0: enabled 1
1041 15:03:48.606149 APIC: 00: enabled 1
1042 15:03:48.609314 APIC: 14: enabled 1
1043 15:03:48.609389 APIC: 16: enabled 1
1044 15:03:48.612469 APIC: 10: enabled 1
1045 15:03:48.615767 APIC: 12: enabled 1
1046 15:03:48.615845 APIC: 01: enabled 1
1047 15:03:48.619087 APIC: 09: enabled 1
1048 15:03:48.622320 APIC: 08: enabled 1
1049 15:03:48.622395 Compare with tree...
1050 15:03:48.625925 Root Device: enabled 1
1051 15:03:48.629096 CPU_CLUSTER: 0: enabled 1
1052 15:03:48.629171 APIC: 00: enabled 1
1053 15:03:48.632493 APIC: 14: enabled 1
1054 15:03:48.635875 APIC: 16: enabled 1
1055 15:03:48.635950 APIC: 10: enabled 1
1056 15:03:48.639054 APIC: 12: enabled 1
1057 15:03:48.642256 APIC: 01: enabled 1
1058 15:03:48.645768 APIC: 09: enabled 1
1059 15:03:48.645842 APIC: 08: enabled 1
1060 15:03:48.648965 DOMAIN: 0000: enabled 1
1061 15:03:48.652640 GPIO: 0: enabled 1
1062 15:03:48.652715 PCI: 00:00.0: enabled 1
1063 15:03:48.655831 PCI: 00:01.0: enabled 0
1064 15:03:48.658993 PCI: 00:01.1: enabled 0
1065 15:03:48.662389 PCI: 00:02.0: enabled 1
1066 15:03:48.665564 PCI: 00:04.0: enabled 1
1067 15:03:48.665639 GENERIC: 0.0: enabled 1
1068 15:03:48.669040 PCI: 00:05.0: enabled 0
1069 15:03:48.672254 PCI: 00:06.0: enabled 1
1070 15:03:48.675689 PCI: 00:06.2: enabled 0
1071 15:03:48.678912 PCI: 00:08.0: enabled 0
1072 15:03:48.678987 PCI: 00:09.0: enabled 0
1073 15:03:48.682153 PCI: 00:0a.0: enabled 1
1074 15:03:48.685758 PCI: 00:0d.0: enabled 1
1075 15:03:48.689000 USB0 port 0: enabled 1
1076 15:03:48.692646 USB3 port 0: enabled 1
1077 15:03:48.692722 USB3 port 1: enabled 0
1078 15:03:48.695713 USB3 port 2: enabled 1
1079 15:03:48.698818 USB3 port 3: enabled 0
1080 15:03:48.702255 PCI: 00:0d.1: enabled 0
1081 15:03:48.705607 PCI: 00:0d.2: enabled 0
1082 15:03:48.705682 PCI: 00:0d.3: enabled 0
1083 15:03:48.709131 PCI: 00:0e.0: enabled 0
1084 15:03:48.712400 PCI: 00:10.0: enabled 0
1085 15:03:48.715511 PCI: 00:10.1: enabled 0
1086 15:03:48.718884 PCI: 00:10.6: enabled 0
1087 15:03:48.718958 PCI: 00:10.7: enabled 0
1088 15:03:48.722154 PCI: 00:12.0: enabled 0
1089 15:03:48.725679 PCI: 00:12.6: enabled 0
1090 15:03:48.728848 PCI: 00:12.7: enabled 0
1091 15:03:48.732137 PCI: 00:13.0: enabled 0
1092 15:03:48.732212 PCI: 00:14.0: enabled 1
1093 15:03:48.735652 USB0 port 0: enabled 1
1094 15:03:48.738938 USB2 port 0: enabled 1
1095 15:03:48.742202 USB2 port 1: enabled 0
1096 15:03:48.745466 USB2 port 2: enabled 1
1097 15:03:48.745542 USB2 port 3: enabled 0
1098 15:03:48.748636 USB2 port 4: enabled 0
1099 15:03:48.751873 USB2 port 5: enabled 1
1100 15:03:48.755149 USB2 port 6: enabled 0
1101 15:03:48.758711 USB2 port 7: enabled 0
1102 15:03:48.761990 USB2 port 8: enabled 1
1103 15:03:48.762066 USB2 port 9: enabled 1
1104 15:03:48.765464 USB3 port 0: enabled 1
1105 15:03:48.768469 USB3 port 1: enabled 0
1106 15:03:48.772013 USB3 port 2: enabled 0
1107 15:03:48.775589 USB3 port 3: enabled 0
1108 15:03:48.775665 PCI: 00:14.1: enabled 0
1109 15:03:48.778722 PCI: 00:14.2: enabled 1
1110 15:03:48.782051 PCI: 00:14.3: enabled 1
1111 15:03:48.785345 GENERIC: 0.0: enabled 1
1112 15:03:48.788481 PCI: 00:15.0: enabled 1
1113 15:03:48.788557 I2C: 00:1a: enabled 1
1114 15:03:48.791992 I2C: 00:31: enabled 1
1115 15:03:48.795174 I2C: 00:32: enabled 1
1116 15:03:48.798472 PCI: 00:15.1: enabled 1
1117 15:03:48.801859 I2C: 00:50: enabled 1
1118 15:03:48.801934 PCI: 00:15.2: enabled 0
1119 15:03:48.805253 PCI: 00:15.3: enabled 1
1120 15:03:48.808519 I2C: 00:10: enabled 1
1121 15:03:48.811713 PCI: 00:16.0: enabled 1
1122 15:03:48.815053 PCI: 00:16.1: enabled 0
1123 15:03:48.815129 PCI: 00:16.2: enabled 0
1124 15:03:48.818687 PCI: 00:16.3: enabled 0
1125 15:03:48.821658 PCI: 00:16.4: enabled 0
1126 15:03:48.825246 PCI: 00:16.5: enabled 0
1127 15:03:48.825321 PCI: 00:17.0: enabled 1
1128 15:03:48.828721 PCI: 00:19.0: enabled 0
1129 15:03:48.831760 PCI: 00:19.1: enabled 1
1130 15:03:48.834960 I2C: 00:15: enabled 1
1131 15:03:48.838205 I2C: 00:2c: enabled 1
1132 15:03:48.838280 PCI: 00:19.2: enabled 0
1133 15:03:48.841618 PCI: 00:1a.0: enabled 0
1134 15:03:48.845296 PCI: 00:1e.0: enabled 1
1135 15:03:48.848330 PCI: 00:1e.1: enabled 0
1136 15:03:48.851549 PCI: 00:1e.2: enabled 0
1137 15:03:48.851624 PCI: 00:1e.3: enabled 1
1138 15:03:48.854878 SPI: 00: enabled 1
1139 15:03:48.858418 PCI: 00:1f.0: enabled 1
1140 15:03:48.861551 PNP: 0c09.0: enabled 1
1141 15:03:48.861636 PCI: 00:1f.1: enabled 0
1142 15:03:48.864941 PCI: 00:1f.2: enabled 1
1143 15:03:48.868301 GENERIC: 0.0: enabled 1
1144 15:03:48.871519 GENERIC: 0.0: enabled 1
1145 15:03:48.874887 GENERIC: 1.0: enabled 1
1146 15:03:48.878157 PCI: 00:1f.3: enabled 1
1147 15:03:48.878216 PCI: 00:1f.4: enabled 0
1148 15:03:48.881354 PCI: 00:1f.5: enabled 1
1149 15:03:48.884940 PCI: 00:1f.6: enabled 0
1150 15:03:48.888369 PCI: 00:1f.7: enabled 0
1151 15:03:48.888433 Root Device scanning...
1152 15:03:48.891419 scan_static_bus for Root Device
1153 15:03:48.895129 CPU_CLUSTER: 0 enabled
1154 15:03:48.898254 DOMAIN: 0000 enabled
1155 15:03:48.901454 DOMAIN: 0000 scanning...
1156 15:03:48.901506 PCI: pci_scan_bus for bus 00
1157 15:03:48.904774 PCI: 00:00.0 [8086/0000] ops
1158 15:03:48.908140 PCI: 00:00.0 [8086/4609] enabled
1159 15:03:48.911737 PCI: 00:02.0 [8086/0000] bus ops
1160 15:03:48.914813 PCI: 00:02.0 [8086/46b3] enabled
1161 15:03:48.918444 PCI: 00:04.0 [8086/0000] bus ops
1162 15:03:48.921553 PCI: 00:04.0 [8086/461d] enabled
1163 15:03:48.924737 PCI: 00:06.0 [8086/0000] bus ops
1164 15:03:48.928268 PCI: 00:06.0 [8086/464d] enabled
1165 15:03:48.931501 PCI: 00:08.0 [8086/464f] disabled
1166 15:03:48.934723 PCI: 00:0a.0 [8086/467d] enabled
1167 15:03:48.938222 PCI: 00:0d.0 [8086/0000] bus ops
1168 15:03:48.944469 PCI: 00:0d.0 [8086/461e] enabled
1169 15:03:48.948029 PCI: 00:14.0 [8086/0000] bus ops
1170 15:03:48.951205 PCI: 00:14.0 [8086/51ed] enabled
1171 15:03:48.954590 PCI: 00:14.2 [8086/51ef] enabled
1172 15:03:48.957920 PCI: 00:14.3 [8086/0000] bus ops
1173 15:03:48.961375 PCI: 00:14.3 [8086/51f0] enabled
1174 15:03:48.964795 PCI: 00:15.0 [8086/0000] bus ops
1175 15:03:48.967901 PCI: 00:15.0 [8086/51e8] enabled
1176 15:03:48.971724 PCI: 00:15.1 [8086/0000] bus ops
1177 15:03:48.974382 PCI: 00:15.1 [8086/51e9] enabled
1178 15:03:48.977751 PCI: 00:15.2 [8086/0000] bus ops
1179 15:03:48.981237 PCI: 00:15.2 [8086/51ea] disabled
1180 15:03:48.984317 PCI: 00:15.3 [8086/0000] bus ops
1181 15:03:48.987987 PCI: 00:15.3 [8086/51eb] enabled
1182 15:03:48.991443 PCI: 00:16.0 [8086/0000] ops
1183 15:03:48.994550 PCI: 00:16.0 [8086/51e0] enabled
1184 15:03:48.997711 PCI: Static device PCI: 00:17.0 not found, disabling it.
1185 15:03:49.001306 PCI: 00:19.0 [8086/0000] bus ops
1186 15:03:49.004499 PCI: 00:19.0 [8086/51c5] disabled
1187 15:03:49.007654 PCI: 00:19.1 [8086/0000] bus ops
1188 15:03:49.011007 PCI: 00:19.1 [8086/51c6] enabled
1189 15:03:49.014293 PCI: 00:1e.0 [8086/0000] ops
1190 15:03:49.018464 PCI: 00:1e.0 [8086/51a8] enabled
1191 15:03:49.021119 PCI: 00:1e.3 [8086/0000] bus ops
1192 15:03:49.024397 PCI: 00:1e.3 [8086/51ab] enabled
1193 15:03:49.027649 PCI: 00:1f.0 [8086/0000] bus ops
1194 15:03:49.030875 PCI: 00:1f.0 [8086/5182] enabled
1195 15:03:49.034912 RTC Init
1196 15:03:49.038112 Set power on after power failure.
1197 15:03:49.041726 Disabling Deep S3
1198 15:03:49.041791 Disabling Deep S3
1199 15:03:49.045423 Disabling Deep S4
1200 15:03:49.045480 Disabling Deep S4
1201 15:03:49.048120 Disabling Deep S5
1202 15:03:49.048175 Disabling Deep S5
1203 15:03:49.051656 PCI: 00:1f.2 [0000/0000] hidden
1204 15:03:49.054822 PCI: 00:1f.3 [8086/0000] bus ops
1205 15:03:49.058157 PCI: 00:1f.3 [8086/51c8] enabled
1206 15:03:49.061673 PCI: 00:1f.5 [8086/0000] bus ops
1207 15:03:49.064803 PCI: 00:1f.5 [8086/51a4] enabled
1208 15:03:49.068371 GPIO: 0 enabled
1209 15:03:49.071537 PCI: Leftover static devices:
1210 15:03:49.071626 PCI: 00:01.0
1211 15:03:49.074734 PCI: 00:01.1
1212 15:03:49.074808 PCI: 00:05.0
1213 15:03:49.074860 PCI: 00:06.2
1214 15:03:49.078414 PCI: 00:09.0
1215 15:03:49.078495 PCI: 00:0d.1
1216 15:03:49.081451 PCI: 00:0d.2
1217 15:03:49.081541 PCI: 00:0d.3
1218 15:03:49.081595 PCI: 00:0e.0
1219 15:03:49.084750 PCI: 00:10.0
1220 15:03:49.084811 PCI: 00:10.1
1221 15:03:49.088249 PCI: 00:10.6
1222 15:03:49.088305 PCI: 00:10.7
1223 15:03:49.091425 PCI: 00:12.0
1224 15:03:49.091483 PCI: 00:12.6
1225 15:03:49.091529 PCI: 00:12.7
1226 15:03:49.094845 PCI: 00:13.0
1227 15:03:49.094900 PCI: 00:14.1
1228 15:03:49.098117 PCI: 00:16.1
1229 15:03:49.098173 PCI: 00:16.2
1230 15:03:49.098218 PCI: 00:16.3
1231 15:03:49.101304 PCI: 00:16.4
1232 15:03:49.101364 PCI: 00:16.5
1233 15:03:49.104964 PCI: 00:17.0
1234 15:03:49.105017 PCI: 00:19.2
1235 15:03:49.105061 PCI: 00:1a.0
1236 15:03:49.107974 PCI: 00:1e.1
1237 15:03:49.108027 PCI: 00:1e.2
1238 15:03:49.111487 PCI: 00:1f.1
1239 15:03:49.111561 PCI: 00:1f.4
1240 15:03:49.114789 PCI: 00:1f.6
1241 15:03:49.114864 PCI: 00:1f.7
1242 15:03:49.118451 PCI: Check your devicetree.cb.
1243 15:03:49.121595 PCI: 00:02.0 scanning...
1244 15:03:49.124968 scan_generic_bus for PCI: 00:02.0
1245 15:03:49.128080 scan_generic_bus for PCI: 00:02.0 done
1246 15:03:49.131217 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1247 15:03:49.134587 PCI: 00:04.0 scanning...
1248 15:03:49.138092 scan_generic_bus for PCI: 00:04.0
1249 15:03:49.141323 GENERIC: 0.0 enabled
1250 15:03:49.147857 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1251 15:03:49.151374 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1252 15:03:49.154741 PCI: 00:06.0 scanning...
1253 15:03:49.157979 do_pci_scan_bridge for PCI: 00:06.0
1254 15:03:49.161440 PCI: pci_scan_bus for bus 01
1255 15:03:49.164424 PCI: 01:00.0 [15b7/5009] enabled
1256 15:03:49.167888 Enabling Common Clock Configuration
1257 15:03:49.171343 L1 Sub-State supported from root port 6
1258 15:03:49.174764 L1 Sub-State Support = 0x5
1259 15:03:49.177837 CommonModeRestoreTime = 0x6e
1260 15:03:49.181543 Power On Value = 0x5, Power On Scale = 0x2
1261 15:03:49.184741 ASPM: Enabled L1
1262 15:03:49.187808 PCIe: Max_Payload_Size adjusted to 256
1263 15:03:49.192055 PCI: 01:00.0: Enabled LTR
1264 15:03:49.194435 PCI: 01:00.0: Programmed LTR max latencies
1265 15:03:49.198068 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1266 15:03:49.201276 PCI: 00:0d.0 scanning...
1267 15:03:49.204828 scan_static_bus for PCI: 00:0d.0
1268 15:03:49.207886 USB0 port 0 enabled
1269 15:03:49.207960 USB0 port 0 scanning...
1270 15:03:49.211466 scan_static_bus for USB0 port 0
1271 15:03:49.214591 USB3 port 0 enabled
1272 15:03:49.217831 USB3 port 1 disabled
1273 15:03:49.217919 USB3 port 2 enabled
1274 15:03:49.221119 USB3 port 3 disabled
1275 15:03:49.224369 USB3 port 0 scanning...
1276 15:03:49.227885 scan_static_bus for USB3 port 0
1277 15:03:49.231336 scan_static_bus for USB3 port 0 done
1278 15:03:49.234386 scan_bus: bus USB3 port 0 finished in 6 msecs
1279 15:03:49.237683 USB3 port 2 scanning...
1280 15:03:49.240980 scan_static_bus for USB3 port 2
1281 15:03:49.244346 scan_static_bus for USB3 port 2 done
1282 15:03:49.247606 scan_bus: bus USB3 port 2 finished in 6 msecs
1283 15:03:49.251261 scan_static_bus for USB0 port 0 done
1284 15:03:49.257613 scan_bus: bus USB0 port 0 finished in 43 msecs
1285 15:03:49.261141 scan_static_bus for PCI: 00:0d.0 done
1286 15:03:49.264309 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1287 15:03:49.267714 PCI: 00:14.0 scanning...
1288 15:03:49.270855 scan_static_bus for PCI: 00:14.0
1289 15:03:49.274552 USB0 port 0 enabled
1290 15:03:49.277684 USB0 port 0 scanning...
1291 15:03:49.277759 scan_static_bus for USB0 port 0
1292 15:03:49.281024 USB2 port 0 enabled
1293 15:03:49.284229 USB2 port 1 disabled
1294 15:03:49.284303 USB2 port 2 enabled
1295 15:03:49.287510 USB2 port 3 disabled
1296 15:03:49.291204 USB2 port 4 disabled
1297 15:03:49.291260 USB2 port 5 enabled
1298 15:03:49.294430 USB2 port 6 disabled
1299 15:03:49.297471 USB2 port 7 disabled
1300 15:03:49.297535 USB2 port 8 enabled
1301 15:03:49.301022 USB2 port 9 enabled
1302 15:03:49.301098 USB3 port 0 enabled
1303 15:03:49.304208 USB3 port 1 disabled
1304 15:03:49.307686 USB3 port 2 disabled
1305 15:03:49.307760 USB3 port 3 disabled
1306 15:03:49.311055 USB2 port 0 scanning...
1307 15:03:49.314084 scan_static_bus for USB2 port 0
1308 15:03:49.317783 scan_static_bus for USB2 port 0 done
1309 15:03:49.324329 scan_bus: bus USB2 port 0 finished in 6 msecs
1310 15:03:49.324404 USB2 port 2 scanning...
1311 15:03:49.327336 scan_static_bus for USB2 port 2
1312 15:03:49.330610 scan_static_bus for USB2 port 2 done
1313 15:03:49.337435 scan_bus: bus USB2 port 2 finished in 6 msecs
1314 15:03:49.340624 USB2 port 5 scanning...
1315 15:03:49.340699 scan_static_bus for USB2 port 5
1316 15:03:49.347204 scan_static_bus for USB2 port 5 done
1317 15:03:49.350758 scan_bus: bus USB2 port 5 finished in 6 msecs
1318 15:03:49.353969 USB2 port 8 scanning...
1319 15:03:49.357159 scan_static_bus for USB2 port 8
1320 15:03:49.360452 scan_static_bus for USB2 port 8 done
1321 15:03:49.363938 scan_bus: bus USB2 port 8 finished in 6 msecs
1322 15:03:49.367178 USB2 port 9 scanning...
1323 15:03:49.370630 scan_static_bus for USB2 port 9
1324 15:03:49.374032 scan_static_bus for USB2 port 9 done
1325 15:03:49.377090 scan_bus: bus USB2 port 9 finished in 6 msecs
1326 15:03:49.380751 USB3 port 0 scanning...
1327 15:03:49.383971 scan_static_bus for USB3 port 0
1328 15:03:49.387479 scan_static_bus for USB3 port 0 done
1329 15:03:49.393832 scan_bus: bus USB3 port 0 finished in 6 msecs
1330 15:03:49.397221 scan_static_bus for USB0 port 0 done
1331 15:03:49.400570 scan_bus: bus USB0 port 0 finished in 120 msecs
1332 15:03:49.403645 scan_static_bus for PCI: 00:14.0 done
1333 15:03:49.410568 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1334 15:03:49.413600 PCI: 00:14.3 scanning...
1335 15:03:49.417256 scan_static_bus for PCI: 00:14.3
1336 15:03:49.417331 GENERIC: 0.0 enabled
1337 15:03:49.420392 scan_static_bus for PCI: 00:14.3 done
1338 15:03:49.427049 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1339 15:03:49.430278 PCI: 00:15.0 scanning...
1340 15:03:49.433512 scan_static_bus for PCI: 00:15.0
1341 15:03:49.433587 I2C: 00:1a enabled
1342 15:03:49.437189 I2C: 00:31 enabled
1343 15:03:49.437263 I2C: 00:32 enabled
1344 15:03:49.440376 scan_static_bus for PCI: 00:15.0 done
1345 15:03:49.447057 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1346 15:03:49.450059 PCI: 00:15.1 scanning...
1347 15:03:49.453664 scan_static_bus for PCI: 00:15.1
1348 15:03:49.453739 I2C: 00:50 enabled
1349 15:03:49.456946 scan_static_bus for PCI: 00:15.1 done
1350 15:03:49.463367 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1351 15:03:49.467476 PCI: 00:15.3 scanning...
1352 15:03:49.470013 scan_static_bus for PCI: 00:15.3
1353 15:03:49.470075 I2C: 00:10 enabled
1354 15:03:49.473609 scan_static_bus for PCI: 00:15.3 done
1355 15:03:49.479978 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1356 15:03:49.480060 PCI: 00:19.1 scanning...
1357 15:03:49.483344 scan_static_bus for PCI: 00:19.1
1358 15:03:49.487034 I2C: 00:15 enabled
1359 15:03:49.489938 I2C: 00:2c enabled
1360 15:03:49.493207 scan_static_bus for PCI: 00:19.1 done
1361 15:03:49.496664 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1362 15:03:49.500352 PCI: 00:1e.3 scanning...
1363 15:03:49.503574 scan_generic_bus for PCI: 00:1e.3
1364 15:03:49.506967 SPI: 00 enabled
1365 15:03:49.510152 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1366 15:03:49.516793 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1367 15:03:49.520039 PCI: 00:1f.0 scanning...
1368 15:03:49.523417 scan_static_bus for PCI: 00:1f.0
1369 15:03:49.523492 PNP: 0c09.0 enabled
1370 15:03:49.526619 PNP: 0c09.0 scanning...
1371 15:03:49.529934 scan_static_bus for PNP: 0c09.0
1372 15:03:49.533188 scan_static_bus for PNP: 0c09.0 done
1373 15:03:49.536718 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1374 15:03:49.543073 scan_static_bus for PCI: 00:1f.0 done
1375 15:03:49.546634 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1376 15:03:49.549691 PCI: 00:1f.2 scanning...
1377 15:03:49.553303 scan_static_bus for PCI: 00:1f.2
1378 15:03:49.553378 GENERIC: 0.0 enabled
1379 15:03:49.556418 GENERIC: 0.0 scanning...
1380 15:03:49.559768 scan_static_bus for GENERIC: 0.0
1381 15:03:49.562989 GENERIC: 0.0 enabled
1382 15:03:49.563064 GENERIC: 1.0 enabled
1383 15:03:49.569944 scan_static_bus for GENERIC: 0.0 done
1384 15:03:49.573179 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1385 15:03:49.576381 scan_static_bus for PCI: 00:1f.2 done
1386 15:03:49.583504 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1387 15:03:49.583578 PCI: 00:1f.3 scanning...
1388 15:03:49.586486 scan_static_bus for PCI: 00:1f.3
1389 15:03:49.593150 scan_static_bus for PCI: 00:1f.3 done
1390 15:03:49.596225 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1391 15:03:49.599574 PCI: 00:1f.5 scanning...
1392 15:03:49.602856 scan_generic_bus for PCI: 00:1f.5
1393 15:03:49.606207 scan_generic_bus for PCI: 00:1f.5 done
1394 15:03:49.609837 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1395 15:03:49.616309 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1396 15:03:49.619724 scan_static_bus for Root Device done
1397 15:03:49.622736 scan_bus: bus Root Device finished in 729 msecs
1398 15:03:49.626267 done
1399 15:03:49.629461 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1400 15:03:49.636058 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1401 15:03:49.643101 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1402 15:03:49.646245 SPI flash protection: WPSW=0 SRP0=0
1403 15:03:49.649320 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1404 15:03:49.656115 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1405 15:03:49.659562 found VGA at PCI: 00:02.0
1406 15:03:49.662602 Setting up VGA for PCI: 00:02.0
1407 15:03:49.669544 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1408 15:03:49.672651 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1409 15:03:49.675895 Allocating resources...
1410 15:03:49.675970 Reading resources...
1411 15:03:49.682744 Root Device read_resources bus 0 link: 0
1412 15:03:49.685995 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1413 15:03:49.689608 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1414 15:03:49.695755 DOMAIN: 0000 read_resources bus 0 link: 0
1415 15:03:49.702764 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1416 15:03:49.709081 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1417 15:03:49.712712 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1418 15:03:49.719643 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1419 15:03:49.725818 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1420 15:03:49.732368 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1421 15:03:49.739140 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1422 15:03:49.745554 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1423 15:03:49.752552 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1424 15:03:49.758848 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1425 15:03:49.765587 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1426 15:03:49.772172 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1427 15:03:49.779004 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1428 15:03:49.782249 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1429 15:03:49.788839 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1430 15:03:49.795495 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1431 15:03:49.802125 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1432 15:03:49.808728 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1433 15:03:49.815250 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1434 15:03:49.821908 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1435 15:03:49.828589 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1436 15:03:49.831863 PCI: 00:04.0 read_resources bus 1 link: 0
1437 15:03:49.835468 PCI: 00:04.0 read_resources bus 1 link: 0 done
1438 15:03:49.841817 PCI: 00:06.0 read_resources bus 1 link: 0
1439 15:03:49.845229 PCI: 00:06.0 read_resources bus 1 link: 0 done
1440 15:03:49.848744 PCI: 00:0d.0 read_resources bus 0 link: 0
1441 15:03:49.855100 USB0 port 0 read_resources bus 0 link: 0
1442 15:03:49.858563 USB0 port 0 read_resources bus 0 link: 0 done
1443 15:03:49.861919 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1444 15:03:49.868542 PCI: 00:14.0 read_resources bus 0 link: 0
1445 15:03:49.871867 USB0 port 0 read_resources bus 0 link: 0
1446 15:03:49.875450 USB0 port 0 read_resources bus 0 link: 0 done
1447 15:03:49.881974 PCI: 00:14.0 read_resources bus 0 link: 0 done
1448 15:03:49.885604 PCI: 00:14.3 read_resources bus 0 link: 0
1449 15:03:49.888573 PCI: 00:14.3 read_resources bus 0 link: 0 done
1450 15:03:49.895275 PCI: 00:15.0 read_resources bus 0 link: 0
1451 15:03:49.898547 PCI: 00:15.0 read_resources bus 0 link: 0 done
1452 15:03:49.902266 PCI: 00:15.1 read_resources bus 0 link: 0
1453 15:03:49.908444 PCI: 00:15.1 read_resources bus 0 link: 0 done
1454 15:03:49.911944 PCI: 00:15.3 read_resources bus 0 link: 0
1455 15:03:49.915205 PCI: 00:15.3 read_resources bus 0 link: 0 done
1456 15:03:49.922055 PCI: 00:19.1 read_resources bus 0 link: 0
1457 15:03:49.925501 PCI: 00:19.1 read_resources bus 0 link: 0 done
1458 15:03:49.928636 PCI: 00:1e.3 read_resources bus 2 link: 0
1459 15:03:49.935429 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1460 15:03:49.938850 PCI: 00:1f.0 read_resources bus 0 link: 0
1461 15:03:49.945150 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1462 15:03:49.948427 PCI: 00:1f.2 read_resources bus 0 link: 0
1463 15:03:49.951921 GENERIC: 0.0 read_resources bus 0 link: 0
1464 15:03:49.958710 GENERIC: 0.0 read_resources bus 0 link: 0 done
1465 15:03:49.961819 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1466 15:03:49.968326 DOMAIN: 0000 read_resources bus 0 link: 0 done
1467 15:03:49.971875 Root Device read_resources bus 0 link: 0 done
1468 15:03:49.975377 Done reading resources.
1469 15:03:49.978520 Show resources in subtree (Root Device)...After reading.
1470 15:03:49.985084 Root Device child on link 0 CPU_CLUSTER: 0
1471 15:03:49.988780 CPU_CLUSTER: 0 child on link 0 APIC: 00
1472 15:03:49.988856 APIC: 00
1473 15:03:49.991933 APIC: 14
1474 15:03:49.992034 APIC: 16
1475 15:03:49.992122 APIC: 10
1476 15:03:49.995451 APIC: 12
1477 15:03:49.995530 APIC: 01
1478 15:03:49.998515 APIC: 09
1479 15:03:49.998582 APIC: 08
1480 15:03:50.001990 DOMAIN: 0000 child on link 0 GPIO: 0
1481 15:03:50.012004 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1482 15:03:50.022011 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1483 15:03:50.022073 GPIO: 0
1484 15:03:50.025111 PCI: 00:00.0
1485 15:03:50.035069 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1486 15:03:50.041702 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1487 15:03:50.051616 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1488 15:03:50.062072 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1489 15:03:50.071574 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1490 15:03:50.081564 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1491 15:03:50.091435 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1492 15:03:50.098239 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1493 15:03:50.108124 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1494 15:03:50.118151 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1495 15:03:50.127991 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1496 15:03:50.137942 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1497 15:03:50.148040 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1498 15:03:50.158091 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1499 15:03:50.164606 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1500 15:03:50.174411 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1501 15:03:50.184431 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1502 15:03:50.194143 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1503 15:03:50.204115 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1504 15:03:50.213945 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1505 15:03:50.224109 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1506 15:03:50.230622 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1507 15:03:50.240651 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1508 15:03:50.250439 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1509 15:03:50.260296 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1510 15:03:50.270210 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1511 15:03:50.280319 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1512 15:03:50.290239 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1513 15:03:50.290318 PCI: 00:02.0
1514 15:03:50.303186 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1515 15:03:50.313300 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1516 15:03:50.319939 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1517 15:03:50.326753 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1518 15:03:50.336418 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1519 15:03:50.336493 GENERIC: 0.0
1520 15:03:50.339710 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1521 15:03:50.349960 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1522 15:03:50.359626 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1523 15:03:50.369635 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1524 15:03:50.369712 PCI: 01:00.0
1525 15:03:50.379707 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1526 15:03:50.389552 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1527 15:03:50.393064 PCI: 00:08.0
1528 15:03:50.393145 PCI: 00:0a.0
1529 15:03:50.403074 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1530 15:03:50.409668 PCI: 00:0d.0 child on link 0 USB0 port 0
1531 15:03:50.419705 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1532 15:03:50.422758 USB0 port 0 child on link 0 USB3 port 0
1533 15:03:50.426036 USB3 port 0
1534 15:03:50.426109 USB3 port 1
1535 15:03:50.429627 USB3 port 2
1536 15:03:50.429701 USB3 port 3
1537 15:03:50.432844 PCI: 00:14.0 child on link 0 USB0 port 0
1538 15:03:50.442969 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1539 15:03:50.449392 USB0 port 0 child on link 0 USB2 port 0
1540 15:03:50.449467 USB2 port 0
1541 15:03:50.452810 USB2 port 1
1542 15:03:50.452884 USB2 port 2
1543 15:03:50.456394 USB2 port 3
1544 15:03:50.456469 USB2 port 4
1545 15:03:50.459352 USB2 port 5
1546 15:03:50.459427 USB2 port 6
1547 15:03:50.462770 USB2 port 7
1548 15:03:50.466121 USB2 port 8
1549 15:03:50.466195 USB2 port 9
1550 15:03:50.469401 USB3 port 0
1551 15:03:50.469475 USB3 port 1
1552 15:03:50.472603 USB3 port 2
1553 15:03:50.472678 USB3 port 3
1554 15:03:50.476004 PCI: 00:14.2
1555 15:03:50.485977 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1556 15:03:50.496134 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1557 15:03:50.499447 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1558 15:03:50.509330 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 15:03:50.512700 GENERIC: 0.0
1560 15:03:50.516158 PCI: 00:15.0 child on link 0 I2C: 00:1a
1561 15:03:50.525856 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 15:03:50.525932 I2C: 00:1a
1563 15:03:50.529236 I2C: 00:31
1564 15:03:50.529311 I2C: 00:32
1565 15:03:50.535822 PCI: 00:15.1 child on link 0 I2C: 00:50
1566 15:03:50.546025 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 15:03:50.546101 I2C: 00:50
1568 15:03:50.548991 PCI: 00:15.2
1569 15:03:50.552626 PCI: 00:15.3 child on link 0 I2C: 00:10
1570 15:03:50.562332 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 15:03:50.562418 I2C: 00:10
1572 15:03:50.565650 PCI: 00:16.0
1573 15:03:50.575859 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 15:03:50.575947 PCI: 00:19.0
1575 15:03:50.582678 PCI: 00:19.1 child on link 0 I2C: 00:15
1576 15:03:50.592376 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 15:03:50.592458 I2C: 00:15
1578 15:03:50.595639 I2C: 00:2c
1579 15:03:50.595717 PCI: 00:1e.0
1580 15:03:50.605961 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1581 15:03:50.612471 PCI: 00:1e.3 child on link 0 SPI: 00
1582 15:03:50.622419 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 15:03:50.622497 SPI: 00
1584 15:03:50.626005 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1585 15:03:50.635636 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1586 15:03:50.635713 PNP: 0c09.0
1587 15:03:50.645529 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1588 15:03:50.649090 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1589 15:03:50.658768 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1590 15:03:50.668866 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1591 15:03:50.672106 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1592 15:03:50.675285 GENERIC: 0.0
1593 15:03:50.678988 GENERIC: 1.0
1594 15:03:50.679062 PCI: 00:1f.3
1595 15:03:50.688606 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1596 15:03:50.698856 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1597 15:03:50.702109 PCI: 00:1f.5
1598 15:03:50.708556 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1599 15:03:50.718696 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1600 15:03:50.721935 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1601 15:03:50.728425 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1602 15:03:50.735347 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1603 15:03:50.738566 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1604 15:03:50.741667 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1605 15:03:50.751707 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1606 15:03:50.758238 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1607 15:03:50.765018 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1608 15:03:50.771692 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1609 15:03:50.778304 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1610 15:03:50.785282 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1611 15:03:50.794814 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1612 15:03:50.801431 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1613 15:03:50.804949 DOMAIN: 0000: Resource ranges:
1614 15:03:50.807980 * Base: 1000, Size: 800, Tag: 100
1615 15:03:50.811667 * Base: 1900, Size: e700, Tag: 100
1616 15:03:50.818064 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1617 15:03:50.824945 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1618 15:03:50.831576 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1619 15:03:50.837825 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1620 15:03:50.844568 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1621 15:03:50.855048 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1622 15:03:50.861354 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1623 15:03:50.868274 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1624 15:03:50.878070 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1625 15:03:50.884884 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1626 15:03:50.891248 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1627 15:03:50.901393 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1628 15:03:50.907931 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1629 15:03:50.914540 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1630 15:03:50.924183 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1631 15:03:50.931202 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1632 15:03:50.937557 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1633 15:03:50.947656 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1634 15:03:50.954009 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1635 15:03:50.960674 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1636 15:03:50.970751 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1637 15:03:50.977478 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1638 15:03:50.984212 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1639 15:03:50.994348 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1640 15:03:51.001038 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1641 15:03:51.007297 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1642 15:03:51.017411 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1643 15:03:51.023933 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1644 15:03:51.030403 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1645 15:03:51.040366 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1646 15:03:51.047371 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1647 15:03:51.053629 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1648 15:03:51.063509 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1649 15:03:51.067279 DOMAIN: 0000: Resource ranges:
1650 15:03:51.070222 * Base: 80400000, Size: 3fc00000, Tag: 200
1651 15:03:51.073487 * Base: d0000000, Size: 28000000, Tag: 200
1652 15:03:51.077188 * Base: fa000000, Size: 1000000, Tag: 200
1653 15:03:51.083771 * Base: fb001000, Size: 17ff000, Tag: 200
1654 15:03:51.086936 * Base: fe800000, Size: 300000, Tag: 200
1655 15:03:51.090302 * Base: feb80000, Size: 80000, Tag: 200
1656 15:03:51.093505 * Base: fed00000, Size: 40000, Tag: 200
1657 15:03:51.100331 * Base: fed70000, Size: 10000, Tag: 200
1658 15:03:51.103575 * Base: fed88000, Size: 8000, Tag: 200
1659 15:03:51.106844 * Base: fed93000, Size: d000, Tag: 200
1660 15:03:51.110429 * Base: feda2000, Size: 1e000, Tag: 200
1661 15:03:51.116794 * Base: fede0000, Size: 1220000, Tag: 200
1662 15:03:51.120116 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1663 15:03:51.126620 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1664 15:03:51.133418 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1665 15:03:51.139969 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1666 15:03:51.146557 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1667 15:03:51.153383 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1668 15:03:51.160218 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1669 15:03:51.166549 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1670 15:03:51.173258 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1671 15:03:51.179660 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1672 15:03:51.186401 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1673 15:03:51.193052 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1674 15:03:51.199537 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1675 15:03:51.206265 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1676 15:03:51.212984 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1677 15:03:51.219650 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1678 15:03:51.226215 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1679 15:03:51.233192 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1680 15:03:51.239811 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1681 15:03:51.246105 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1682 15:03:51.252978 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1683 15:03:51.262946 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1684 15:03:51.266200 PCI: 00:06.0: Resource ranges:
1685 15:03:51.269642 * Base: 80400000, Size: 100000, Tag: 200
1686 15:03:51.276049 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1687 15:03:51.282413 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1688 15:03:51.292241 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1689 15:03:51.299008 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1690 15:03:51.302799 Root Device assign_resources, bus 0 link: 0
1691 15:03:51.309042 DOMAIN: 0000 assign_resources, bus 0 link: 0
1692 15:03:51.315603 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1693 15:03:51.322451 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1694 15:03:51.332403 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1695 15:03:51.338753 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1696 15:03:51.345658 PCI: 00:04.0 assign_resources, bus 1 link: 0
1697 15:03:51.348906 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1698 15:03:51.358532 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1699 15:03:51.368840 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1700 15:03:51.375413 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1701 15:03:51.381738 PCI: 00:06.0 assign_resources, bus 1 link: 0
1702 15:03:51.388545 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1703 15:03:51.394888 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1704 15:03:51.401603 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1705 15:03:51.408717 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1706 15:03:51.418258 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1707 15:03:51.421451 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1708 15:03:51.428271 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1709 15:03:51.434814 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1710 15:03:51.438114 PCI: 00:14.0 assign_resources, bus 0 link: 0
1711 15:03:51.445071 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1712 15:03:51.451403 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1713 15:03:51.461287 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1714 15:03:51.468092 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1715 15:03:51.474462 PCI: 00:14.3 assign_resources, bus 0 link: 0
1716 15:03:51.478220 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1717 15:03:51.484639 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1718 15:03:51.491298 PCI: 00:15.0 assign_resources, bus 0 link: 0
1719 15:03:51.494357 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1720 15:03:51.504316 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1721 15:03:51.507563 PCI: 00:15.1 assign_resources, bus 0 link: 0
1722 15:03:51.514465 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1723 15:03:51.521085 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1724 15:03:51.524367 PCI: 00:15.3 assign_resources, bus 0 link: 0
1725 15:03:51.531126 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1726 15:03:51.537371 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1727 15:03:51.547652 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1728 15:03:51.550725 PCI: 00:19.1 assign_resources, bus 0 link: 0
1729 15:03:51.557905 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1730 15:03:51.563970 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1731 15:03:51.567425 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1732 15:03:51.574278 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1733 15:03:51.577849 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1734 15:03:51.584365 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1735 15:03:51.587462 LPC: Trying to open IO window from 800 size 1ff
1736 15:03:51.597743 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1737 15:03:51.604126 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1738 15:03:51.610822 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1739 15:03:51.617052 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1740 15:03:51.620551 Root Device assign_resources, bus 0 link: 0 done
1741 15:03:51.623716 Done setting resources.
1742 15:03:51.630751 Show resources in subtree (Root Device)...After assigning values.
1743 15:03:51.633948 Root Device child on link 0 CPU_CLUSTER: 0
1744 15:03:51.640579 CPU_CLUSTER: 0 child on link 0 APIC: 00
1745 15:03:51.640642 APIC: 00
1746 15:03:51.640690 APIC: 14
1747 15:03:51.643721 APIC: 16
1748 15:03:51.643779 APIC: 10
1749 15:03:51.646876 APIC: 12
1750 15:03:51.646931 APIC: 01
1751 15:03:51.646977 APIC: 09
1752 15:03:51.650308 APIC: 08
1753 15:03:51.654042 DOMAIN: 0000 child on link 0 GPIO: 0
1754 15:03:51.663611 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1755 15:03:51.673446 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1756 15:03:51.673527 GPIO: 0
1757 15:03:51.673586 PCI: 00:00.0
1758 15:03:51.683431 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1759 15:03:51.693500 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1760 15:03:51.703022 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1761 15:03:51.713271 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1762 15:03:51.723022 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1763 15:03:51.733227 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1764 15:03:51.739457 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1765 15:03:51.749682 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1766 15:03:51.759777 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1767 15:03:51.769423 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1768 15:03:51.779228 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1769 15:03:51.789545 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1770 15:03:51.799462 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1771 15:03:51.805956 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1772 15:03:51.815901 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1773 15:03:51.826503 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1774 15:03:51.835694 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1775 15:03:51.845783 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1776 15:03:51.855843 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1777 15:03:51.865607 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1778 15:03:51.875501 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1779 15:03:51.882381 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1780 15:03:51.892286 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1781 15:03:51.902186 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1782 15:03:51.912005 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1783 15:03:51.921969 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1784 15:03:51.931782 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1785 15:03:51.941797 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1786 15:03:51.941875 PCI: 00:02.0
1787 15:03:51.951807 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1788 15:03:51.964998 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1789 15:03:51.971865 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1790 15:03:51.978382 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1791 15:03:51.988476 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1792 15:03:51.988544 GENERIC: 0.0
1793 15:03:51.994938 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1794 15:03:52.004978 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1795 15:03:52.014923 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1796 15:03:52.024748 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1797 15:03:52.028035 PCI: 01:00.0
1798 15:03:52.038239 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1799 15:03:52.048197 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1800 15:03:52.048274 PCI: 00:08.0
1801 15:03:52.051099 PCI: 00:0a.0
1802 15:03:52.061281 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1803 15:03:52.064462 PCI: 00:0d.0 child on link 0 USB0 port 0
1804 15:03:52.077760 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1805 15:03:52.081146 USB0 port 0 child on link 0 USB3 port 0
1806 15:03:52.081230 USB3 port 0
1807 15:03:52.084381 USB3 port 1
1808 15:03:52.087662 USB3 port 2
1809 15:03:52.087737 USB3 port 3
1810 15:03:52.091007 PCI: 00:14.0 child on link 0 USB0 port 0
1811 15:03:52.104140 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1812 15:03:52.107585 USB0 port 0 child on link 0 USB2 port 0
1813 15:03:52.107661 USB2 port 0
1814 15:03:52.110778 USB2 port 1
1815 15:03:52.114018 USB2 port 2
1816 15:03:52.114094 USB2 port 3
1817 15:03:52.117187 USB2 port 4
1818 15:03:52.117262 USB2 port 5
1819 15:03:52.120776 USB2 port 6
1820 15:03:52.120836 USB2 port 7
1821 15:03:52.123809 USB2 port 8
1822 15:03:52.123866 USB2 port 9
1823 15:03:52.127276 USB3 port 0
1824 15:03:52.127332 USB3 port 1
1825 15:03:52.130662 USB3 port 2
1826 15:03:52.130720 USB3 port 3
1827 15:03:52.133632 PCI: 00:14.2
1828 15:03:52.143819 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1829 15:03:52.153687 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1830 15:03:52.160670 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1831 15:03:52.170383 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1832 15:03:52.170461 GENERIC: 0.0
1833 15:03:52.173629 PCI: 00:15.0 child on link 0 I2C: 00:1a
1834 15:03:52.186992 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1835 15:03:52.187074 I2C: 00:1a
1836 15:03:52.190301 I2C: 00:31
1837 15:03:52.190378 I2C: 00:32
1838 15:03:52.193340 PCI: 00:15.1 child on link 0 I2C: 00:50
1839 15:03:52.203400 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1840 15:03:52.206523 I2C: 00:50
1841 15:03:52.206598 PCI: 00:15.2
1842 15:03:52.213176 PCI: 00:15.3 child on link 0 I2C: 00:10
1843 15:03:52.223356 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1844 15:03:52.223433 I2C: 00:10
1845 15:03:52.226602 PCI: 00:16.0
1846 15:03:52.236313 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1847 15:03:52.236391 PCI: 00:19.0
1848 15:03:52.243320 PCI: 00:19.1 child on link 0 I2C: 00:15
1849 15:03:52.253026 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1850 15:03:52.253108 I2C: 00:15
1851 15:03:52.256625 I2C: 00:2c
1852 15:03:52.256701 PCI: 00:1e.0
1853 15:03:52.269641 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1854 15:03:52.273124 PCI: 00:1e.3 child on link 0 SPI: 00
1855 15:03:52.282897 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1856 15:03:52.282979 SPI: 00
1857 15:03:52.289563 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1858 15:03:52.296215 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1859 15:03:52.299768 PNP: 0c09.0
1860 15:03:52.306353 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1861 15:03:52.312725 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1862 15:03:52.322914 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1863 15:03:52.329489 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1864 15:03:52.336032 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1865 15:03:52.336113 GENERIC: 0.0
1866 15:03:52.339216 GENERIC: 1.0
1867 15:03:52.339291 PCI: 00:1f.3
1868 15:03:52.352799 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1869 15:03:52.362833 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1870 15:03:52.362918 PCI: 00:1f.5
1871 15:03:52.372574 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1872 15:03:52.375795 Done allocating resources.
1873 15:03:52.382817 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1874 15:03:52.389388 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1875 15:03:52.392490 Configure audio over I2S with MAX98373 NAU88L25B.
1876 15:03:52.397377 Enabling BT offload
1877 15:03:52.404510 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1878 15:03:52.407966 Enabling resources...
1879 15:03:52.411041 PCI: 00:00.0 subsystem <- 8086/4609
1880 15:03:52.414644 PCI: 00:00.0 cmd <- 06
1881 15:03:52.417966 PCI: 00:02.0 subsystem <- 8086/46b3
1882 15:03:52.420941 PCI: 00:02.0 cmd <- 03
1883 15:03:52.424320 PCI: 00:04.0 subsystem <- 8086/461d
1884 15:03:52.424395 PCI: 00:04.0 cmd <- 02
1885 15:03:52.427632 PCI: 00:06.0 bridge ctrl <- 0013
1886 15:03:52.430983 PCI: 00:06.0 subsystem <- 8086/464d
1887 15:03:52.434532 PCI: 00:06.0 cmd <- 106
1888 15:03:52.437713 PCI: 00:0a.0 subsystem <- 8086/467d
1889 15:03:52.440955 PCI: 00:0a.0 cmd <- 02
1890 15:03:52.444939 PCI: 00:0d.0 subsystem <- 8086/461e
1891 15:03:52.447448 PCI: 00:0d.0 cmd <- 02
1892 15:03:52.451035 PCI: 00:14.0 subsystem <- 8086/51ed
1893 15:03:52.454273 PCI: 00:14.0 cmd <- 02
1894 15:03:52.457979 PCI: 00:14.2 subsystem <- 8086/51ef
1895 15:03:52.458059 PCI: 00:14.2 cmd <- 02
1896 15:03:52.464613 PCI: 00:14.3 subsystem <- 8086/51f0
1897 15:03:52.464946 PCI: 00:14.3 cmd <- 02
1898 15:03:52.468040 PCI: 00:15.0 subsystem <- 8086/51e8
1899 15:03:52.471654 PCI: 00:15.0 cmd <- 02
1900 15:03:52.474598 PCI: 00:15.1 subsystem <- 8086/51e9
1901 15:03:52.477741 PCI: 00:15.1 cmd <- 06
1902 15:03:52.480911 PCI: 00:15.3 subsystem <- 8086/51eb
1903 15:03:52.484209 PCI: 00:15.3 cmd <- 02
1904 15:03:52.487691 PCI: 00:16.0 subsystem <- 8086/51e0
1905 15:03:52.488040 PCI: 00:16.0 cmd <- 02
1906 15:03:52.494529 PCI: 00:19.1 subsystem <- 8086/51c6
1907 15:03:52.494970 PCI: 00:19.1 cmd <- 02
1908 15:03:52.497979 PCI: 00:1e.0 subsystem <- 8086/51a8
1909 15:03:52.501052 PCI: 00:1e.0 cmd <- 06
1910 15:03:52.504584 PCI: 00:1e.3 subsystem <- 8086/51ab
1911 15:03:52.507813 PCI: 00:1e.3 cmd <- 02
1912 15:03:52.510924 PCI: 00:1f.0 subsystem <- 8086/5182
1913 15:03:52.514519 PCI: 00:1f.0 cmd <- 407
1914 15:03:52.517690 PCI: 00:1f.3 subsystem <- 8086/51c8
1915 15:03:52.520991 PCI: 00:1f.3 cmd <- 02
1916 15:03:52.524400 PCI: 00:1f.5 subsystem <- 8086/51a4
1917 15:03:52.524867 PCI: 00:1f.5 cmd <- 406
1918 15:03:52.527844 PCI: 01:00.0 cmd <- 02
1919 15:03:52.528352 done.
1920 15:03:52.534077 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1921 15:03:52.537700 ME: Version: Unavailable
1922 15:03:52.540902 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1923 15:03:52.543909 Initializing devices...
1924 15:03:52.547112 Root Device init
1925 15:03:52.547188 mainboard: EC init
1926 15:03:52.553420 Chrome EC: Set SMI mask to 0x0000000000000000
1927 15:03:52.556759 Chrome EC: UHEPI supported
1928 15:03:52.563213 Chrome EC: clear events_b mask to 0x0000000000000000
1929 15:03:52.569891 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1930 15:03:52.576491 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1931 15:03:52.579632 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1932 15:03:52.586505 Chrome EC: Set WAKE mask to 0x0000000000000000
1933 15:03:52.589965 Root Device init finished in 40 msecs
1934 15:03:52.592920 PCI: 00:00.0 init
1935 15:03:52.596335 CPU TDP = 15 Watts
1936 15:03:52.596411 CPU PL1 = 15 Watts
1937 15:03:52.600078 CPU PL2 = 55 Watts
1938 15:03:52.600155 CPU PL4 = 123 Watts
1939 15:03:52.606585 PCI: 00:00.0 init finished in 8 msecs
1940 15:03:52.606669 PCI: 00:02.0 init
1941 15:03:52.609540 GMA: Found VBT in CBFS
1942 15:03:52.612811 GMA: Found valid VBT in CBFS
1943 15:03:52.619158 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1944 15:03:52.626133 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1945 15:03:52.629227 PCI: 00:02.0 init finished in 18 msecs
1946 15:03:52.632796 PCI: 00:06.0 init
1947 15:03:52.632897 Initializing PCH PCIe bridge.
1948 15:03:52.639348 PCI: 00:06.0 init finished in 3 msecs
1949 15:03:52.639424 PCI: 00:0a.0 init
1950 15:03:52.642513 PCI: 00:0a.0 init finished in 0 msecs
1951 15:03:52.646103 PCI: 00:14.0 init
1952 15:03:52.649052 PCI: 00:14.0 init finished in 0 msecs
1953 15:03:52.652652 PCI: 00:14.2 init
1954 15:03:52.655987 PCI: 00:14.2 init finished in 0 msecs
1955 15:03:52.656069 PCI: 00:15.0 init
1956 15:03:52.659131 I2C bus 0 version 0x3230302a
1957 15:03:52.662470 DW I2C bus 0 at 0x80655000 (400 KHz)
1958 15:03:52.665806 PCI: 00:15.0 init finished in 6 msecs
1959 15:03:52.669769 PCI: 00:15.1 init
1960 15:03:52.673168 I2C bus 1 version 0x3230302a
1961 15:03:52.676519 DW I2C bus 1 at 0x80656000 (400 KHz)
1962 15:03:52.679585 PCI: 00:15.1 init finished in 6 msecs
1963 15:03:52.682889 PCI: 00:15.3 init
1964 15:03:52.685869 I2C bus 3 version 0x3230302a
1965 15:03:52.689797 DW I2C bus 3 at 0x80657000 (400 KHz)
1966 15:03:52.692706 PCI: 00:15.3 init finished in 6 msecs
1967 15:03:52.693070 PCI: 00:16.0 init
1968 15:03:52.698997 PCI: 00:16.0 init finished in 0 msecs
1969 15:03:52.699347 PCI: 00:19.1 init
1970 15:03:52.702287 I2C bus 5 version 0x3230302a
1971 15:03:52.705750 DW I2C bus 5 at 0x80659000 (400 KHz)
1972 15:03:52.709394 PCI: 00:19.1 init finished in 6 msecs
1973 15:03:52.712520 PCI: 00:1f.0 init
1974 15:03:52.716403 IOAPIC: Initializing IOAPIC at 0xfec00000
1975 15:03:52.719306 IOAPIC: ID = 0x02
1976 15:03:52.723037 IOAPIC: Dumping registers
1977 15:03:52.723504 reg 0x0000: 0x02000000
1978 15:03:52.726170 reg 0x0001: 0x00770020
1979 15:03:52.729657 reg 0x0002: 0x00000000
1980 15:03:52.732809 IOAPIC: 120 interrupts
1981 15:03:52.736268 IOAPIC: Clearing IOAPIC at 0xfec00000
1982 15:03:52.739373 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1983 15:03:52.746245 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1984 15:03:52.749290 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1985 15:03:52.756158 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1986 15:03:52.759259 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1987 15:03:52.762335 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1988 15:03:52.769373 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1989 15:03:52.772900 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1990 15:03:52.778818 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1991 15:03:52.782252 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1992 15:03:52.788695 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1993 15:03:52.791993 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1994 15:03:52.798821 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1995 15:03:52.802127 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1996 15:03:52.805375 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1997 15:03:52.811842 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1998 15:03:52.815018 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1999 15:03:52.821898 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2000 15:03:52.825301 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2001 15:03:52.831780 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2002 15:03:52.834923 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2003 15:03:52.842119 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2004 15:03:52.845189 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2005 15:03:52.852042 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2006 15:03:52.855107 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2007 15:03:52.858045 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2008 15:03:52.864499 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2009 15:03:52.867995 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2010 15:03:52.874930 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2011 15:03:52.878141 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2012 15:03:52.884529 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2013 15:03:52.887822 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2014 15:03:52.894724 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2015 15:03:52.898653 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2016 15:03:52.901373 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2017 15:03:52.907934 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2018 15:03:52.911522 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2019 15:03:52.918138 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2020 15:03:52.921317 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2021 15:03:52.927637 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2022 15:03:52.931271 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2023 15:03:52.937917 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2024 15:03:52.941134 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2025 15:03:52.944652 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2026 15:03:52.951406 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2027 15:03:52.954677 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2028 15:03:52.960870 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2029 15:03:52.964403 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2030 15:03:52.970826 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2031 15:03:52.974589 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2032 15:03:52.980892 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2033 15:03:52.984456 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2034 15:03:52.987355 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2035 15:03:52.994026 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2036 15:03:52.997496 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2037 15:03:53.003989 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2038 15:03:53.007484 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2039 15:03:53.014511 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2040 15:03:53.017445 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2041 15:03:53.024068 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2042 15:03:53.027421 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2043 15:03:53.031012 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2044 15:03:53.037658 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2045 15:03:53.040994 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2046 15:03:53.047335 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2047 15:03:53.050868 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2048 15:03:53.057288 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2049 15:03:53.060602 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2050 15:03:53.067225 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2051 15:03:53.070603 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2052 15:03:53.073704 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2053 15:03:53.079984 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2054 15:03:53.083659 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2055 15:03:53.090710 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2056 15:03:53.093683 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2057 15:03:53.100476 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2058 15:03:53.103604 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2059 15:03:53.110297 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2060 15:03:53.113732 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2061 15:03:53.117136 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2062 15:03:53.123943 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2063 15:03:53.127000 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2064 15:03:53.133216 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2065 15:03:53.137015 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2066 15:03:53.143608 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2067 15:03:53.147195 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2068 15:03:53.153554 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2069 15:03:53.157116 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2070 15:03:53.159929 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2071 15:03:53.166960 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2072 15:03:53.169890 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2073 15:03:53.176624 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2074 15:03:53.180035 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2075 15:03:53.186380 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2076 15:03:53.190305 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2077 15:03:53.196356 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2078 15:03:53.200124 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2079 15:03:53.203129 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2080 15:03:53.209441 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2081 15:03:53.212910 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2082 15:03:53.219393 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2083 15:03:53.222641 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2084 15:03:53.229413 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2085 15:03:53.232950 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2086 15:03:53.239593 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2087 15:03:53.242431 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2088 15:03:53.249699 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2089 15:03:53.252801 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2090 15:03:53.256203 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2091 15:03:53.262850 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2092 15:03:53.266428 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2093 15:03:53.272645 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2094 15:03:53.275959 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2095 15:03:53.282497 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2096 15:03:53.285969 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2097 15:03:53.292617 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2098 15:03:53.295606 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2099 15:03:53.299366 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2100 15:03:53.306131 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2101 15:03:53.309132 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2102 15:03:53.315831 IOAPIC: Bootstrap Processor Local APIC = 0x00
2103 15:03:53.319085 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2104 15:03:53.322405 PCI: 00:1f.0 init finished in 607 msecs
2105 15:03:53.326170 PCI: 00:1f.2 init
2106 15:03:53.329007 apm_control: Disabling ACPI.
2107 15:03:53.333984 APMC done.
2108 15:03:53.337537 PCI: 00:1f.2 init finished in 7 msecs
2109 15:03:53.340979 PCI: 00:1f.3 init
2110 15:03:53.344184 PCI: 00:1f.3 init finished in 0 msecs
2111 15:03:53.344685 PCI: 01:00.0 init
2112 15:03:53.347100 PCI: 01:00.0 init finished in 0 msecs
2113 15:03:53.351004 PNP: 0c09.0 init
2114 15:03:53.357481 Google Chrome EC uptime: 12.126 seconds
2115 15:03:53.360877 Google Chrome AP resets since EC boot: 1
2116 15:03:53.364022 Google Chrome most recent AP reset causes:
2117 15:03:53.367623 0.341: 32775 shutdown: entering G3
2118 15:03:53.373824 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2119 15:03:53.377207 PNP: 0c09.0 init finished in 23 msecs
2120 15:03:53.380299 GENERIC: 0.0 init
2121 15:03:53.383672 GENERIC: 0.0 init finished in 0 msecs
2122 15:03:53.387144 GENERIC: 1.0 init
2123 15:03:53.390496 GENERIC: 1.0 init finished in 0 msecs
2124 15:03:53.390990 Devices initialized
2125 15:03:53.393782 Show all devs... After init.
2126 15:03:53.396801 Root Device: enabled 1
2127 15:03:53.400681 CPU_CLUSTER: 0: enabled 1
2128 15:03:53.403676 DOMAIN: 0000: enabled 1
2129 15:03:53.404220 GPIO: 0: enabled 1
2130 15:03:53.406798 PCI: 00:00.0: enabled 1
2131 15:03:53.411000 PCI: 00:01.0: enabled 0
2132 15:03:53.411503 PCI: 00:01.1: enabled 0
2133 15:03:53.413688 PCI: 00:02.0: enabled 1
2134 15:03:53.417196 PCI: 00:04.0: enabled 1
2135 15:03:53.420119 PCI: 00:05.0: enabled 0
2136 15:03:53.420429 PCI: 00:06.0: enabled 1
2137 15:03:53.423576 PCI: 00:06.2: enabled 0
2138 15:03:53.426778 PCI: 00:07.0: enabled 0
2139 15:03:53.427249 PCI: 00:07.1: enabled 0
2140 15:03:53.430295 PCI: 00:07.2: enabled 0
2141 15:03:53.433605 PCI: 00:07.3: enabled 0
2142 15:03:53.437040 PCI: 00:08.0: enabled 0
2143 15:03:53.437530 PCI: 00:09.0: enabled 0
2144 15:03:53.440068 PCI: 00:0a.0: enabled 1
2145 15:03:53.443665 PCI: 00:0d.0: enabled 1
2146 15:03:53.446910 PCI: 00:0d.1: enabled 0
2147 15:03:53.447407 PCI: 00:0d.2: enabled 0
2148 15:03:53.450196 PCI: 00:0d.3: enabled 0
2149 15:03:53.453564 PCI: 00:0e.0: enabled 0
2150 15:03:53.456449 PCI: 00:10.0: enabled 0
2151 15:03:53.456889 PCI: 00:10.1: enabled 0
2152 15:03:53.460425 PCI: 00:10.6: enabled 0
2153 15:03:53.463160 PCI: 00:10.7: enabled 0
2154 15:03:53.466441 PCI: 00:12.0: enabled 0
2155 15:03:53.466791 PCI: 00:12.6: enabled 0
2156 15:03:53.470150 PCI: 00:12.7: enabled 0
2157 15:03:53.473141 PCI: 00:13.0: enabled 0
2158 15:03:53.473495 PCI: 00:14.0: enabled 1
2159 15:03:53.476298 PCI: 00:14.1: enabled 0
2160 15:03:53.480187 PCI: 00:14.2: enabled 1
2161 15:03:53.483254 PCI: 00:14.3: enabled 1
2162 15:03:53.483712 PCI: 00:15.0: enabled 1
2163 15:03:53.486333 PCI: 00:15.1: enabled 1
2164 15:03:53.489809 PCI: 00:15.2: enabled 0
2165 15:03:53.493328 PCI: 00:15.3: enabled 1
2166 15:03:53.493677 PCI: 00:16.0: enabled 1
2167 15:03:53.496333 PCI: 00:16.1: enabled 0
2168 15:03:53.499696 PCI: 00:16.2: enabled 0
2169 15:03:53.503546 PCI: 00:16.3: enabled 0
2170 15:03:53.504007 PCI: 00:16.4: enabled 0
2171 15:03:53.506336 PCI: 00:16.5: enabled 0
2172 15:03:53.510173 PCI: 00:17.0: enabled 0
2173 15:03:53.510631 PCI: 00:19.0: enabled 0
2174 15:03:53.513002 PCI: 00:19.1: enabled 1
2175 15:03:53.516545 PCI: 00:19.2: enabled 0
2176 15:03:53.519623 PCI: 00:1a.0: enabled 0
2177 15:03:53.520079 PCI: 00:1c.0: enabled 0
2178 15:03:53.523064 PCI: 00:1c.1: enabled 0
2179 15:03:53.526100 PCI: 00:1c.2: enabled 0
2180 15:03:53.529463 PCI: 00:1c.3: enabled 0
2181 15:03:53.529537 PCI: 00:1c.4: enabled 0
2182 15:03:53.532936 PCI: 00:1c.5: enabled 0
2183 15:03:53.536365 PCI: 00:1c.6: enabled 0
2184 15:03:53.540001 PCI: 00:1c.7: enabled 0
2185 15:03:53.540509 PCI: 00:1d.0: enabled 0
2186 15:03:53.542978 PCI: 00:1d.1: enabled 0
2187 15:03:53.546505 PCI: 00:1d.2: enabled 0
2188 15:03:53.549587 PCI: 00:1d.3: enabled 0
2189 15:03:53.549959 PCI: 00:1e.0: enabled 1
2190 15:03:53.553184 PCI: 00:1e.1: enabled 0
2191 15:03:53.556185 PCI: 00:1e.2: enabled 0
2192 15:03:53.556536 PCI: 00:1e.3: enabled 1
2193 15:03:53.559524 PCI: 00:1f.0: enabled 1
2194 15:03:53.562796 PCI: 00:1f.1: enabled 0
2195 15:03:53.566409 PCI: 00:1f.2: enabled 1
2196 15:03:53.566858 PCI: 00:1f.3: enabled 1
2197 15:03:53.569533 PCI: 00:1f.4: enabled 0
2198 15:03:53.572769 PCI: 00:1f.5: enabled 1
2199 15:03:53.576249 PCI: 00:1f.6: enabled 0
2200 15:03:53.576705 PCI: 00:1f.7: enabled 0
2201 15:03:53.579149 GENERIC: 0.0: enabled 1
2202 15:03:53.582229 GENERIC: 0.0: enabled 1
2203 15:03:53.585743 GENERIC: 1.0: enabled 1
2204 15:03:53.585817 GENERIC: 0.0: enabled 1
2205 15:03:53.588954 GENERIC: 1.0: enabled 1
2206 15:03:53.592128 USB0 port 0: enabled 1
2207 15:03:53.592191 USB0 port 0: enabled 1
2208 15:03:53.595525 GENERIC: 0.0: enabled 1
2209 15:03:53.599159 I2C: 00:1a: enabled 1
2210 15:03:53.602272 I2C: 00:31: enabled 1
2211 15:03:53.602346 I2C: 00:32: enabled 1
2212 15:03:53.605810 I2C: 00:50: enabled 1
2213 15:03:53.609289 I2C: 00:10: enabled 1
2214 15:03:53.609636 I2C: 00:15: enabled 1
2215 15:03:53.612562 I2C: 00:2c: enabled 1
2216 15:03:53.615962 GENERIC: 0.0: enabled 1
2217 15:03:53.616466 SPI: 00: enabled 1
2218 15:03:53.619553 PNP: 0c09.0: enabled 1
2219 15:03:53.622665 GENERIC: 0.0: enabled 1
2220 15:03:53.623124 USB3 port 0: enabled 1
2221 15:03:53.626261 USB3 port 1: enabled 0
2222 15:03:53.629170 USB3 port 2: enabled 1
2223 15:03:53.632130 USB3 port 3: enabled 0
2224 15:03:53.632480 USB2 port 0: enabled 1
2225 15:03:53.635734 USB2 port 1: enabled 0
2226 15:03:53.639324 USB2 port 2: enabled 1
2227 15:03:53.639774 USB2 port 3: enabled 0
2228 15:03:53.642441 USB2 port 4: enabled 0
2229 15:03:53.645892 USB2 port 5: enabled 1
2230 15:03:53.646257 USB2 port 6: enabled 0
2231 15:03:53.648873 USB2 port 7: enabled 0
2232 15:03:53.652522 USB2 port 8: enabled 1
2233 15:03:53.655546 USB2 port 9: enabled 1
2234 15:03:53.655897 USB3 port 0: enabled 1
2235 15:03:53.658925 USB3 port 1: enabled 0
2236 15:03:53.662370 USB3 port 2: enabled 0
2237 15:03:53.662724 USB3 port 3: enabled 0
2238 15:03:53.665901 GENERIC: 0.0: enabled 1
2239 15:03:53.669102 GENERIC: 1.0: enabled 1
2240 15:03:53.671921 APIC: 00: enabled 1
2241 15:03:53.672293 APIC: 14: enabled 1
2242 15:03:53.675836 APIC: 16: enabled 1
2243 15:03:53.676354 APIC: 10: enabled 1
2244 15:03:53.679354 APIC: 12: enabled 1
2245 15:03:53.682127 APIC: 01: enabled 1
2246 15:03:53.682487 APIC: 09: enabled 1
2247 15:03:53.685707 APIC: 08: enabled 1
2248 15:03:53.688776 PCI: 01:00.0: enabled 1
2249 15:03:53.692639 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2250 15:03:53.699030 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2251 15:03:53.702172 ELOG: NV offset 0xf20000 size 0x4000
2252 15:03:53.708540 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2253 15:03:53.715913 ELOG: Event(17) added with size 13 at 2023-09-13 15:03:53 UTC
2254 15:03:53.722264 ELOG: Event(9E) added with size 10 at 2023-09-13 15:03:53 UTC
2255 15:03:53.728704 ELOG: Event(9F) added with size 14 at 2023-09-13 15:03:53 UTC
2256 15:03:53.735091 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2257 15:03:53.741957 ELOG: Event(A0) added with size 9 at 2023-09-13 15:03:53 UTC
2258 15:03:53.745456 elog_add_boot_reason: Logged dev mode boot
2259 15:03:53.751433 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2260 15:03:53.755422 Finalize devices...
2261 15:03:53.755894 PCI: 00:16.0 final
2262 15:03:53.758560 PCI: 00:1f.2 final
2263 15:03:53.759012 GENERIC: 0.0 final
2264 15:03:53.765057 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2265 15:03:53.768209 GENERIC: 1.0 final
2266 15:03:53.775112 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2267 15:03:53.775600 Devices finalized
2268 15:03:53.781444 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2269 15:03:53.784824 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2270 15:03:53.791520 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2271 15:03:53.798276 ME: HFSTS1 : 0x90000245
2272 15:03:53.801718 ME: HFSTS2 : 0x82100116
2273 15:03:53.805148 ME: HFSTS3 : 0x00000050
2274 15:03:53.811574 ME: HFSTS4 : 0x00004000
2275 15:03:53.815133 ME: HFSTS5 : 0x00000000
2276 15:03:53.818430 ME: HFSTS6 : 0x40600006
2277 15:03:53.821534 ME: Manufacturing Mode : NO
2278 15:03:53.827966 ME: SPI Protection Mode Enabled : YES
2279 15:03:53.831259 ME: FPFs Committed : YES
2280 15:03:53.834384 ME: Manufacturing Vars Locked : YES
2281 15:03:53.837573 ME: FW Partition Table : OK
2282 15:03:53.840784 ME: Bringup Loader Failure : NO
2283 15:03:53.844521 ME: Firmware Init Complete : YES
2284 15:03:53.847350 ME: Boot Options Present : NO
2285 15:03:53.853987 ME: Update In Progress : NO
2286 15:03:53.857266 ME: D0i3 Support : YES
2287 15:03:53.860659 ME: Low Power State Enabled : NO
2288 15:03:53.864160 ME: CPU Replaced : YES
2289 15:03:53.867264 ME: CPU Replacement Valid : YES
2290 15:03:53.870702 ME: Current Working State : 5
2291 15:03:53.874153 ME: Current Operation State : 1
2292 15:03:53.877303 ME: Current Operation Mode : 0
2293 15:03:53.880520 ME: Error Code : 0
2294 15:03:53.887133 ME: Enhanced Debug Mode : NO
2295 15:03:53.890736 ME: CPU Debug Disabled : YES
2296 15:03:53.893980 ME: TXT Support : NO
2297 15:03:53.897165 ME: WP for RO is enabled : YES
2298 15:03:53.904022 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2299 15:03:53.910695 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2300 15:03:53.914138 Ramoops buffer: 0x100000@0x76899000.
2301 15:03:53.917319 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2302 15:03:53.927398 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2303 15:03:53.930456 CBFS: 'fallback/slic' not found.
2304 15:03:53.933706 ACPI: Writing ACPI tables at 7686d000.
2305 15:03:53.933781 ACPI: * FACS
2306 15:03:53.937001 ACPI: * DSDT
2307 15:03:53.943457 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2308 15:03:53.947027 ACPI: * FADT
2309 15:03:53.947118 SCI is IRQ9
2310 15:03:53.953572 ACPI: added table 1/32, length now 40
2311 15:03:53.953682 ACPI: * SSDT
2312 15:03:53.960004 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2313 15:03:53.963453 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2314 15:03:53.970105 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2315 15:03:53.973380 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2316 15:03:53.979958 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2317 15:03:53.983268 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2318 15:03:53.989757 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2319 15:03:53.996441 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2320 15:03:53.999957 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2321 15:03:54.006411 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2322 15:03:54.009969 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2323 15:03:54.016467 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2324 15:03:54.019649 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2325 15:03:54.026373 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2326 15:03:54.033060 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2327 15:03:54.036761 PS2K: Passing 80 keymaps to kernel
2328 15:03:54.042723 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2329 15:03:54.049649 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2330 15:03:54.055941 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2331 15:03:54.062630 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2332 15:03:54.066277 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2333 15:03:54.072909 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2334 15:03:54.079105 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2335 15:03:54.085957 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2336 15:03:54.092482 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2337 15:03:54.099114 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2338 15:03:54.102706 ACPI: added table 2/32, length now 44
2339 15:03:54.105895 ACPI: * MCFG
2340 15:03:54.109210 ACPI: added table 3/32, length now 48
2341 15:03:54.109283 ACPI: * TPM2
2342 15:03:54.112463 TPM2 log created at 0x7685d000
2343 15:03:54.115904 ACPI: added table 4/32, length now 52
2344 15:03:54.119157 ACPI: * LPIT
2345 15:03:54.122641 ACPI: added table 5/32, length now 56
2346 15:03:54.125760 ACPI: * MADT
2347 15:03:54.125827 SCI is IRQ9
2348 15:03:54.129268 ACPI: added table 6/32, length now 60
2349 15:03:54.132460 cmd_reg from pmc_make_ipc_cmd 1052838
2350 15:03:54.139012 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2351 15:03:54.145839 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2352 15:03:54.152577 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2353 15:03:54.155466 PMC CrashLog size in discovery mode: 0xC00
2354 15:03:54.158866 cpu crashlog bar addr: 0x80640000
2355 15:03:54.162323 cpu discovery table offset: 0x6030
2356 15:03:54.168868 cpu_crashlog_discovery_table buffer count: 0x3
2357 15:03:54.175465 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2358 15:03:54.181991 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2359 15:03:54.188923 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2360 15:03:54.191967 PMC crashLog size in discovery mode : 0xC00
2361 15:03:54.198729 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2362 15:03:54.201924 discover mode PMC crashlog size adjusted to: 0x200
2363 15:03:54.211786 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2364 15:03:54.215085 discover mode PMC crashlog size adjusted to: 0x0
2365 15:03:54.218647 m_cpu_crashLog_size : 0x3480 bytes
2366 15:03:54.222203 CPU crashLog present.
2367 15:03:54.225410 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2368 15:03:54.231677 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2369 15:03:54.235073 current = 76876550
2370 15:03:54.238646 ACPI: * DMAR
2371 15:03:54.241733 ACPI: added table 7/32, length now 64
2372 15:03:54.245244 ACPI: added table 8/32, length now 68
2373 15:03:54.245319 ACPI: * HPET
2374 15:03:54.248716 ACPI: added table 9/32, length now 72
2375 15:03:54.251921 ACPI: done.
2376 15:03:54.255312 ACPI tables: 38528 bytes.
2377 15:03:54.259051 smbios_write_tables: 76857000
2378 15:03:54.262049 EC returned error result code 3
2379 15:03:54.265293 Couldn't obtain OEM name from CBI
2380 15:03:54.268597 Create SMBIOS type 16
2381 15:03:54.268673 Create SMBIOS type 17
2382 15:03:54.272328 Create SMBIOS type 20
2383 15:03:54.275509 GENERIC: 0.0 (WIFI Device)
2384 15:03:54.278774 SMBIOS tables: 2156 bytes.
2385 15:03:54.281986 Writing table forward entry at 0x00000500
2386 15:03:54.288706 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2387 15:03:54.291644 Writing coreboot table at 0x76891000
2388 15:03:54.298722 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2389 15:03:54.301977 1. 0000000000001000-000000000009ffff: RAM
2390 15:03:54.305305 2. 00000000000a0000-00000000000fffff: RESERVED
2391 15:03:54.311733 3. 0000000000100000-0000000076856fff: RAM
2392 15:03:54.315194 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2393 15:03:54.321894 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2394 15:03:54.328480 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2395 15:03:54.331767 7. 0000000077000000-00000000803fffff: RESERVED
2396 15:03:54.338500 8. 00000000c0000000-00000000cfffffff: RESERVED
2397 15:03:54.341833 9. 00000000f8000000-00000000f9ffffff: RESERVED
2398 15:03:54.345436 10. 00000000fb000000-00000000fb000fff: RESERVED
2399 15:03:54.351801 11. 00000000fc800000-00000000fe7fffff: RESERVED
2400 15:03:54.355185 12. 00000000feb00000-00000000feb7ffff: RESERVED
2401 15:03:54.361758 13. 00000000fec00000-00000000fecfffff: RESERVED
2402 15:03:54.365054 14. 00000000fed40000-00000000fed6ffff: RESERVED
2403 15:03:54.371803 15. 00000000fed80000-00000000fed87fff: RESERVED
2404 15:03:54.374904 16. 00000000fed90000-00000000fed92fff: RESERVED
2405 15:03:54.381610 17. 00000000feda0000-00000000feda1fff: RESERVED
2406 15:03:54.384945 18. 00000000fedc0000-00000000feddffff: RESERVED
2407 15:03:54.388008 19. 0000000100000000-000000027fbfffff: RAM
2408 15:03:54.391180 Passing 4 GPIOs to payload:
2409 15:03:54.397977 NAME | PORT | POLARITY | VALUE
2410 15:03:54.401345 lid | undefined | high | high
2411 15:03:54.408349 power | undefined | high | low
2412 15:03:54.414704 oprom | undefined | high | low
2413 15:03:54.417738 EC in RW | 0x00000151 | high | high
2414 15:03:54.421142 Board ID: 3
2415 15:03:54.421240 FW config: 0x131
2416 15:03:54.427724 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 63fa
2417 15:03:54.431091 coreboot table: 1788 bytes.
2418 15:03:54.434216 IMD ROOT 0. 0x76fff000 0x00001000
2419 15:03:54.437792 IMD SMALL 1. 0x76ffe000 0x00001000
2420 15:03:54.440933 FSP MEMORY 2. 0x76afe000 0x00500000
2421 15:03:54.444453 CONSOLE 3. 0x76ade000 0x00020000
2422 15:03:54.447495 RW MCACHE 4. 0x76add000 0x0000043c
2423 15:03:54.454364 RO MCACHE 5. 0x76adc000 0x00000fd8
2424 15:03:54.457625 FMAP 6. 0x76adb000 0x0000064a
2425 15:03:54.460618 TIME STAMP 7. 0x76ada000 0x00000910
2426 15:03:54.464388 VBOOT WORK 8. 0x76ac6000 0x00014000
2427 15:03:54.467304 MEM INFO 9. 0x76ac5000 0x000003b8
2428 15:03:54.470578 ROMSTG STCK10. 0x76ac4000 0x00001000
2429 15:03:54.474347 AFTER CAR 11. 0x76ab8000 0x0000c000
2430 15:03:54.480596 RAMSTAGE 12. 0x76a2e000 0x0008a000
2431 15:03:54.483950 ACPI BERT 13. 0x76a1e000 0x00010000
2432 15:03:54.487028 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2433 15:03:54.490664 REFCODE 15. 0x769ae000 0x0006f000
2434 15:03:54.493883 SMM BACKUP 16. 0x7699e000 0x00010000
2435 15:03:54.497274 IGD OPREGION17. 0x76999000 0x00004203
2436 15:03:54.500434 RAMOOPS 18. 0x76899000 0x00100000
2437 15:03:54.503632 COREBOOT 19. 0x76891000 0x00008000
2438 15:03:54.510691 ACPI 20. 0x7686d000 0x00024000
2439 15:03:54.514122 TPM2 TCGLOG21. 0x7685d000 0x00010000
2440 15:03:54.517139 PMC CRASHLOG22. 0x7685c000 0x00000c00
2441 15:03:54.520708 CPU CRASHLOG23. 0x76858000 0x00003480
2442 15:03:54.523650 SMBIOS 24. 0x76857000 0x00001000
2443 15:03:54.527236 IMD small region:
2444 15:03:54.530391 IMD ROOT 0. 0x76ffec00 0x00000400
2445 15:03:54.533643 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2446 15:03:54.537147 VPD 2. 0x76ffeb60 0x0000006c
2447 15:03:54.540448 POWER STATE 3. 0x76ffeb00 0x00000044
2448 15:03:54.547153 ROMSTAGE 4. 0x76ffeae0 0x00000004
2449 15:03:54.550074 ACPI GNVS 5. 0x76ffea80 0x00000048
2450 15:03:54.553730 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2451 15:03:54.560108 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2452 15:03:54.563391 MTRR: Physical address space:
2453 15:03:54.570064 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2454 15:03:54.573611 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2455 15:03:54.580100 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2456 15:03:54.586819 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2457 15:03:54.593258 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2458 15:03:54.599915 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2459 15:03:54.606822 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2460 15:03:54.609897 MTRR: Fixed MSR 0x250 0x0606060606060606
2461 15:03:54.613120 MTRR: Fixed MSR 0x258 0x0606060606060606
2462 15:03:54.620309 MTRR: Fixed MSR 0x259 0x0000000000000000
2463 15:03:54.623166 MTRR: Fixed MSR 0x268 0x0606060606060606
2464 15:03:54.626448 MTRR: Fixed MSR 0x269 0x0606060606060606
2465 15:03:54.629823 MTRR: Fixed MSR 0x26a 0x0606060606060606
2466 15:03:54.636465 MTRR: Fixed MSR 0x26b 0x0606060606060606
2467 15:03:54.639658 MTRR: Fixed MSR 0x26c 0x0606060606060606
2468 15:03:54.642933 MTRR: Fixed MSR 0x26d 0x0606060606060606
2469 15:03:54.646464 MTRR: Fixed MSR 0x26e 0x0606060606060606
2470 15:03:54.649505 MTRR: Fixed MSR 0x26f 0x0606060606060606
2471 15:03:54.654390 call enable_fixed_mtrr()
2472 15:03:54.658038 CPU physical address size: 39 bits
2473 15:03:54.664361 MTRR: default type WB/UC MTRR counts: 6/6.
2474 15:03:54.667818 MTRR: UC selected as default type.
2475 15:03:54.674416 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2476 15:03:54.677779 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2477 15:03:54.684429 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2478 15:03:54.690786 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2479 15:03:54.697494 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2480 15:03:54.704255 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2481 15:03:54.710980 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 15:03:54.714128 MTRR: Fixed MSR 0x258 0x0606060606060606
2483 15:03:54.717439 MTRR: Fixed MSR 0x259 0x0000000000000000
2484 15:03:54.720841 MTRR: Fixed MSR 0x268 0x0606060606060606
2485 15:03:54.727285 MTRR: Fixed MSR 0x269 0x0606060606060606
2486 15:03:54.730382 MTRR: Fixed MSR 0x26a 0x0606060606060606
2487 15:03:54.733670 MTRR: Fixed MSR 0x26b 0x0606060606060606
2488 15:03:54.737132 MTRR: Fixed MSR 0x26c 0x0606060606060606
2489 15:03:54.743523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2490 15:03:54.747204 MTRR: Fixed MSR 0x26e 0x0606060606060606
2491 15:03:54.750347 MTRR: Fixed MSR 0x26f 0x0606060606060606
2492 15:03:54.753937 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 15:03:54.760489 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 15:03:54.763706 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 15:03:54.767185 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 15:03:54.770292 MTRR: Fixed MSR 0x259 0x0000000000000000
2497 15:03:54.773969 MTRR: Fixed MSR 0x268 0x0606060606060606
2498 15:03:54.780407 MTRR: Fixed MSR 0x269 0x0606060606060606
2499 15:03:54.783475 MTRR: Fixed MSR 0x258 0x0606060606060606
2500 15:03:54.786956 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 15:03:54.790368 MTRR: Fixed MSR 0x268 0x0606060606060606
2502 15:03:54.797089 MTRR: Fixed MSR 0x269 0x0606060606060606
2503 15:03:54.800251 MTRR: Fixed MSR 0x26a 0x0606060606060606
2504 15:03:54.803286 MTRR: Fixed MSR 0x26b 0x0606060606060606
2505 15:03:54.806560 MTRR: Fixed MSR 0x26c 0x0606060606060606
2506 15:03:54.813215 MTRR: Fixed MSR 0x26d 0x0606060606060606
2507 15:03:54.816782 MTRR: Fixed MSR 0x26e 0x0606060606060606
2508 15:03:54.819960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2509 15:03:54.823510 MTRR: Fixed MSR 0x250 0x0606060606060606
2510 15:03:54.826606 call enable_fixed_mtrr()
2511 15:03:54.830174 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 15:03:54.833163 CPU physical address size: 39 bits
2513 15:03:54.839952 MTRR: Fixed MSR 0x250 0x0606060606060606
2514 15:03:54.843351 MTRR: Fixed MSR 0x258 0x0606060606060606
2515 15:03:54.846817 MTRR: Fixed MSR 0x259 0x0000000000000000
2516 15:03:54.849890 MTRR: Fixed MSR 0x26a 0x0606060606060606
2517 15:03:54.856840 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 15:03:54.859925 MTRR: Fixed MSR 0x268 0x0606060606060606
2519 15:03:54.863155 MTRR: Fixed MSR 0x269 0x0606060606060606
2520 15:03:54.866665 MTRR: Fixed MSR 0x26a 0x0606060606060606
2521 15:03:54.869851 MTRR: Fixed MSR 0x26b 0x0606060606060606
2522 15:03:54.876475 MTRR: Fixed MSR 0x26c 0x0606060606060606
2523 15:03:54.879870 MTRR: Fixed MSR 0x26d 0x0606060606060606
2524 15:03:54.883116 MTRR: Fixed MSR 0x26e 0x0606060606060606
2525 15:03:54.886248 MTRR: Fixed MSR 0x26f 0x0606060606060606
2526 15:03:54.893487 MTRR: Fixed MSR 0x26b 0x0606060606060606
2527 15:03:54.893573 call enable_fixed_mtrr()
2528 15:03:54.899550 MTRR: Fixed MSR 0x258 0x0606060606060606
2529 15:03:54.903295 MTRR: Fixed MSR 0x259 0x0000000000000000
2530 15:03:54.906374 MTRR: Fixed MSR 0x268 0x0606060606060606
2531 15:03:54.909536 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 15:03:54.916400 MTRR: Fixed MSR 0x26a 0x0606060606060606
2533 15:03:54.919511 MTRR: Fixed MSR 0x26b 0x0606060606060606
2534 15:03:54.922799 MTRR: Fixed MSR 0x26c 0x0606060606060606
2535 15:03:54.926115 MTRR: Fixed MSR 0x26d 0x0606060606060606
2536 15:03:54.932901 MTRR: Fixed MSR 0x26e 0x0606060606060606
2537 15:03:54.936309 MTRR: Fixed MSR 0x26f 0x0606060606060606
2538 15:03:54.939485 MTRR: Fixed MSR 0x268 0x0606060606060606
2539 15:03:54.942713 call enable_fixed_mtrr()
2540 15:03:54.946173 CPU physical address size: 39 bits
2541 15:03:54.949467 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 15:03:54.953100 CPU physical address size: 39 bits
2543 15:03:54.955962 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 15:03:54.962821 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 15:03:54.966153 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 15:03:54.969156 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 15:03:54.972696 MTRR: Fixed MSR 0x26a 0x0606060606060606
2548 15:03:54.975879 call enable_fixed_mtrr()
2549 15:03:54.979091 MTRR: Fixed MSR 0x250 0x0606060606060606
2550 15:03:54.982522 call enable_fixed_mtrr()
2551 15:03:54.986100 CPU physical address size: 39 bits
2552 15:03:54.989153 CPU physical address size: 39 bits
2553 15:03:54.993153 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 15:03:54.999883 MTRR: Fixed MSR 0x26b 0x0606060606060606
2555 15:03:55.003317 MTRR: Fixed MSR 0x259 0x0000000000000000
2556 15:03:55.006530 MTRR: Fixed MSR 0x268 0x0606060606060606
2557 15:03:55.010075 MTRR: Fixed MSR 0x269 0x0606060606060606
2558 15:03:55.016373 MTRR: Fixed MSR 0x26c 0x0606060606060606
2559 15:03:55.019541 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 15:03:55.023169 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 15:03:55.026249 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 15:03:55.032953 MTRR: Fixed MSR 0x26a 0x0606060606060606
2563 15:03:55.033029 call enable_fixed_mtrr()
2564 15:03:55.039366 MTRR: Fixed MSR 0x26b 0x0606060606060606
2565 15:03:55.042668 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 15:03:55.046213 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 15:03:55.049297 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 15:03:55.055941 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 15:03:55.059427 CPU physical address size: 39 bits
2570 15:03:55.059503 call enable_fixed_mtrr()
2571 15:03:55.062605 CPU physical address size: 39 bits
2572 15:03:55.067265
2573 15:03:55.067344 MTRR check
2574 15:03:55.070494 Fixed MTRRs : Enabled
2575 15:03:55.070557 Variable MTRRs: Enabled
2576 15:03:55.070603
2577 15:03:55.077170 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2578 15:03:55.080448 Checking cr50 for pending updates
2579 15:03:55.092944 Reading cr50 TPM mode
2580 15:03:55.107847 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2581 15:03:55.118021 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2582 15:03:55.121421 Checking segment from ROM address 0xf96cbe6c
2583 15:03:55.124734 Checking segment from ROM address 0xf96cbe88
2584 15:03:55.131153 Loading segment from ROM address 0xf96cbe6c
2585 15:03:55.131228 code (compression=1)
2586 15:03:55.141461 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2587 15:03:55.150950 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2588 15:03:55.151042 using LZMA
2589 15:03:55.173900 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2590 15:03:55.180730 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2591 15:03:55.188431 Loading segment from ROM address 0xf96cbe88
2592 15:03:55.191663 Entry Point 0x30000000
2593 15:03:55.191743 Loaded segments
2594 15:03:55.198481 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2595 15:03:55.205407 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2596 15:03:55.208577 Finalizing chipset.
2597 15:03:55.211589 apm_control: Finalizing SMM.
2598 15:03:55.211665 APMC done.
2599 15:03:55.214850 HECI: CSE device 16.1 is disabled
2600 15:03:55.218128 HECI: CSE device 16.2 is disabled
2601 15:03:55.221659 HECI: CSE device 16.3 is disabled
2602 15:03:55.225211 HECI: CSE device 16.4 is disabled
2603 15:03:55.228149 HECI: CSE device 16.5 is disabled
2604 15:03:55.231418 HECI: Sending End-of-Post
2605 15:03:55.240188 CSE: EOP requested action: continue boot
2606 15:03:55.243152 CSE EOP successful, continuing boot
2607 15:03:55.249989 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2608 15:03:55.253324 mp_park_aps done after 0 msecs.
2609 15:03:55.256560 Jumping to boot code at 0x30000000(0x76891000)
2610 15:03:55.266668 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2611 15:03:55.270580
2612 15:03:55.270655
2613 15:03:55.270707
2614 15:03:55.274033 Starting depthcharge on Volmar...
2615 15:03:55.274108
2616 15:03:55.274507 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2617 15:03:55.274590 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2618 15:03:55.274655 Setting prompt string to ['brya:']
2619 15:03:55.274714 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2620 15:03:55.280792 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2621 15:03:55.280870
2622 15:03:55.287169 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2623 15:03:55.287251
2624 15:03:55.293851 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2625 15:03:55.293938
2626 15:03:55.297511 configure_storage: Failed to remap 1C:2
2627 15:03:55.297586
2628 15:03:55.300449 Wipe memory regions:
2629 15:03:55.300524
2630 15:03:55.303696 [0x00000000001000, 0x000000000a0000)
2631 15:03:55.303770
2632 15:03:55.307392 [0x00000000100000, 0x00000030000000)
2633 15:03:55.413561
2634 15:03:55.416842 [0x00000032668e60, 0x00000076857000)
2635 15:03:55.565038
2636 15:03:55.568024 [0x00000100000000, 0x0000027fc00000)
2637 15:03:56.406605
2638 15:03:56.409703 ec_init: CrosEC protocol v3 supported (256, 256)
2639 15:03:57.018284
2640 15:03:57.018452 R8152: Initializing
2641 15:03:57.018527
2642 15:03:57.021618 Version 9 (ocp_data = 6010)
2643 15:03:57.021699
2644 15:03:57.024966 R8152: Done initializing
2645 15:03:57.025043
2646 15:03:57.028064 Adding net device
2647 15:03:57.329308
2648 15:03:57.332483 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2649 15:03:57.332575
2650 15:03:57.332645
2651 15:03:57.332698
2652 15:03:57.332961 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2654 15:03:57.433288 brya: tftpboot 192.168.201.1 11516905/tftp-deploy-d8u1x15q/kernel/bzImage 11516905/tftp-deploy-d8u1x15q/kernel/cmdline 11516905/tftp-deploy-d8u1x15q/ramdisk/ramdisk.cpio.gz
2655 15:03:57.433442 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2656 15:03:57.433525 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2657 15:03:57.438361 tftpboot 192.168.201.1 11516905/tftp-deploy-d8u1x15q/kernel/bzImaploy-d8u1x15q/kernel/cmdline 11516905/tftp-deploy-d8u1x15q/ramdisk/ramdisk.cpio.gz
2658 15:03:57.438443
2659 15:03:57.438505 Waiting for link
2660 15:03:57.640752
2661 15:03:57.640910 done.
2662 15:03:57.640971
2663 15:03:57.641021 MAC: 00:e0:4c:68:03:d9
2664 15:03:57.641068
2665 15:03:57.643817 Sending DHCP discover... done.
2666 15:03:57.643900
2667 15:03:57.647078 Waiting for reply... done.
2668 15:03:57.647143
2669 15:03:57.650621 Sending DHCP request... done.
2670 15:03:57.650686
2671 15:03:57.653796 Waiting for reply... done.
2672 15:03:57.657344
2673 15:03:57.657416 My ip is 192.168.201.14
2674 15:03:57.657482
2675 15:03:57.660606 The DHCP server ip is 192.168.201.1
2676 15:03:57.660682
2677 15:03:57.667029 TFTP server IP predefined by user: 192.168.201.1
2678 15:03:57.667125
2679 15:03:57.673618 Bootfile predefined by user: 11516905/tftp-deploy-d8u1x15q/kernel/bzImage
2680 15:03:57.673695
2681 15:03:57.677346 Sending tftp read request... done.
2682 15:03:57.677420
2683 15:03:57.680500 Waiting for the transfer...
2684 15:03:57.680578
2685 15:03:57.908287 00000000 ################################################################
2686 15:03:57.908434
2687 15:03:58.134999 00080000 ################################################################
2688 15:03:58.135132
2689 15:03:58.360969 00100000 ################################################################
2690 15:03:58.361100
2691 15:03:58.594537 00180000 ################################################################
2692 15:03:58.594677
2693 15:03:58.844378 00200000 ################################################################
2694 15:03:58.844523
2695 15:03:59.083272 00280000 ################################################################
2696 15:03:59.083409
2697 15:03:59.309482 00300000 ################################################################
2698 15:03:59.309635
2699 15:03:59.535054 00380000 ################################################################
2700 15:03:59.535194
2701 15:03:59.761360 00400000 ################################################################
2702 15:03:59.761497
2703 15:03:59.987762 00480000 ################################################################
2704 15:03:59.987901
2705 15:04:00.214433 00500000 ################################################################
2706 15:04:00.214573
2707 15:04:00.441731 00580000 ################################################################
2708 15:04:00.441867
2709 15:04:00.668381 00600000 ################################################################
2710 15:04:00.668525
2711 15:04:00.893724 00680000 ################################################################
2712 15:04:00.893871
2713 15:04:01.119150 00700000 ################################################################
2714 15:04:01.119284
2715 15:04:01.344585 00780000 ################################################################
2716 15:04:01.344724
2717 15:04:01.570085 00800000 ################################################################
2718 15:04:01.570222
2719 15:04:01.795918 00880000 ################################################################
2720 15:04:01.796072
2721 15:04:02.022503 00900000 ################################################################
2722 15:04:02.022640
2723 15:04:02.249864 00980000 ################################################################
2724 15:04:02.250000
2725 15:04:02.475335 00a00000 ################################################################
2726 15:04:02.475483
2727 15:04:02.701730 00a80000 ################################################################
2728 15:04:02.701882
2729 15:04:02.927127 00b00000 ################################################################
2730 15:04:02.927305
2731 15:04:03.153347 00b80000 ################################################################
2732 15:04:03.153485
2733 15:04:03.441165 00c00000 ################################################################
2734 15:04:03.441312
2735 15:04:03.707126 00c80000 ################################################################
2736 15:04:03.707304
2737 15:04:03.869854 00d00000 ############################################### done.
2738 15:04:03.869992
2739 15:04:03.872987 The bootfile was 14013312 bytes long.
2740 15:04:03.876551
2741 15:04:03.879803 Sending tftp read request... done.
2742 15:04:03.879888
2743 15:04:03.879948 Waiting for the transfer...
2744 15:04:03.880000
2745 15:04:04.109561 00000000 ################################################################
2746 15:04:04.109704
2747 15:04:04.337581 00080000 ################################################################
2748 15:04:04.337723
2749 15:04:04.564964 00100000 ################################################################
2750 15:04:04.565098
2751 15:04:04.790136 00180000 ################################################################
2752 15:04:04.790273
2753 15:04:05.016553 00200000 ################################################################
2754 15:04:05.016686
2755 15:04:05.243077 00280000 ################################################################
2756 15:04:05.243231
2757 15:04:05.469441 00300000 ################################################################
2758 15:04:05.469569
2759 15:04:05.695485 00380000 ################################################################
2760 15:04:05.695650
2761 15:04:05.921175 00400000 ################################################################
2762 15:04:05.921318
2763 15:04:06.147268 00480000 ################################################################
2764 15:04:06.147397
2765 15:04:06.374000 00500000 ################################################################
2766 15:04:06.374142
2767 15:04:06.599852 00580000 ################################################################
2768 15:04:06.599985
2769 15:04:06.825855 00600000 ################################################################
2770 15:04:06.825989
2771 15:04:07.052329 00680000 ################################################################
2772 15:04:07.052466
2773 15:04:07.278372 00700000 ################################################################
2774 15:04:07.278514
2775 15:04:07.504444 00780000 ################################################################
2776 15:04:07.504576
2777 15:04:07.730170 00800000 ################################################################
2778 15:04:07.730303
2779 15:04:07.886683 00880000 ############################################# done.
2780 15:04:07.886817
2781 15:04:07.890060 Sending tftp read request... done.
2782 15:04:07.890137
2783 15:04:07.893235 Waiting for the transfer...
2784 15:04:07.893298
2785 15:04:07.893360 00000000 # done.
2786 15:04:07.893428
2787 15:04:07.903330 Command line loaded dynamically from TFTP file: 11516905/tftp-deploy-d8u1x15q/kernel/cmdline
2788 15:04:07.903395
2789 15:04:07.919649 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2790 15:04:07.924257
2791 15:04:07.927725 Shutting down all USB controllers.
2792 15:04:07.927788
2793 15:04:07.927851 Removing current net device
2794 15:04:07.927909
2795 15:04:07.931072 Finalizing coreboot
2796 15:04:07.931131
2797 15:04:07.937715 Exiting depthcharge with code 4 at timestamp: 22907305
2798 15:04:07.937781
2799 15:04:07.937847
2800 15:04:07.937911 Starting kernel ...
2801 15:04:07.937970
2802 15:04:07.938028
2803 15:04:07.938390 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2804 15:04:07.938479 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2805 15:04:07.938548 Setting prompt string to ['Linux version [0-9]']
2806 15:04:07.938615 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2807 15:04:07.938682 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2809 15:08:35.939260 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2811 15:08:35.940579 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2813 15:08:35.941588 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2816 15:08:35.943254 end: 2 depthcharge-action (duration 00:05:00) [common]
2818 15:08:35.944307 Cleaning after the job
2819 15:08:35.944649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/ramdisk
2820 15:08:35.948127 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/kernel
2821 15:08:35.954085 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11516905/tftp-deploy-d8u1x15q/modules
2822 15:08:35.956721 start: 5.1 power-off (timeout 00:00:30) [common]
2823 15:08:35.957248 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2824 15:08:36.038326 >> Command sent successfully.
2825 15:08:36.046153 Returned 0 in 0 seconds
2826 15:08:36.147271 end: 5.1 power-off (duration 00:00:00) [common]
2828 15:08:36.148685 start: 5.2 read-feedback (timeout 00:10:00) [common]
2829 15:08:36.149537 Listened to connection for namespace 'common' for up to 1s
2831 15:08:36.150584 Listened to connection for namespace 'common' for up to 1s
2832 15:08:37.150360 Finalising connection for namespace 'common'
2833 15:08:37.150915 Disconnecting from shell: Finalise
2834 15:08:37.151213
2835 15:08:37.252012 end: 5.2 read-feedback (duration 00:00:01) [common]
2836 15:08:37.252497 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11516905
2837 15:08:37.278227 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11516905
2838 15:08:37.278376 JobError: Your job cannot terminate cleanly.