Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 10:56:53.254551 lava-dispatcher, installed at version: 2023.08
2 10:56:53.254743 start: 0 validate
3 10:56:53.254870 Start time: 2023-10-10 10:56:53.254862+00:00 (UTC)
4 10:56:53.254990 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:56:53.255128 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 10:56:53.515069 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:56:53.515264 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.194-553-gd498c00818b88%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:56:53.781160 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:56:53.781365 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.194-553-gd498c00818b88%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:56:58.291770 validate duration: 5.04
12 10:56:58.292121 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:56:58.292290 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:56:58.292437 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:56:58.292606 Not decompressing ramdisk as can be used compressed.
16 10:56:58.292740 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 10:56:58.292847 saving as /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/ramdisk/rootfs.cpio.gz
18 10:56:58.292984 total size: 8418130 (8 MB)
19 10:56:59.083765 progress 0 % (0 MB)
20 10:56:59.096106 progress 5 % (0 MB)
21 10:56:59.108769 progress 10 % (0 MB)
22 10:56:59.119331 progress 15 % (1 MB)
23 10:56:59.125553 progress 20 % (1 MB)
24 10:56:59.130444 progress 25 % (2 MB)
25 10:56:59.134686 progress 30 % (2 MB)
26 10:56:59.138059 progress 35 % (2 MB)
27 10:56:59.141403 progress 40 % (3 MB)
28 10:56:59.144545 progress 45 % (3 MB)
29 10:56:59.147417 progress 50 % (4 MB)
30 10:56:59.150169 progress 55 % (4 MB)
31 10:56:59.152647 progress 60 % (4 MB)
32 10:56:59.154899 progress 65 % (5 MB)
33 10:56:59.157167 progress 70 % (5 MB)
34 10:56:59.159417 progress 75 % (6 MB)
35 10:56:59.161578 progress 80 % (6 MB)
36 10:56:59.163791 progress 85 % (6 MB)
37 10:56:59.166002 progress 90 % (7 MB)
38 10:56:59.168165 progress 95 % (7 MB)
39 10:56:59.170228 progress 100 % (8 MB)
40 10:56:59.170464 8 MB downloaded in 0.88 s (9.15 MB/s)
41 10:56:59.170637 end: 1.1.1 http-download (duration 00:00:01) [common]
43 10:56:59.170909 end: 1.1 download-retry (duration 00:00:01) [common]
44 10:56:59.171009 start: 1.2 download-retry (timeout 00:09:59) [common]
45 10:56:59.171115 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 10:56:59.171257 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.194-553-gd498c00818b88/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:56:59.171333 saving as /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/kernel/bzImage
48 10:56:59.171433 total size: 14016544 (13 MB)
49 10:56:59.171534 No compression specified
50 10:56:59.173191 progress 0 % (0 MB)
51 10:56:59.176822 progress 5 % (0 MB)
52 10:56:59.180354 progress 10 % (1 MB)
53 10:56:59.184047 progress 15 % (2 MB)
54 10:56:59.187607 progress 20 % (2 MB)
55 10:56:59.191126 progress 25 % (3 MB)
56 10:56:59.194809 progress 30 % (4 MB)
57 10:56:59.198297 progress 35 % (4 MB)
58 10:56:59.201952 progress 40 % (5 MB)
59 10:56:59.205438 progress 45 % (6 MB)
60 10:56:59.208918 progress 50 % (6 MB)
61 10:56:59.212580 progress 55 % (7 MB)
62 10:56:59.216141 progress 60 % (8 MB)
63 10:56:59.219856 progress 65 % (8 MB)
64 10:56:59.223397 progress 70 % (9 MB)
65 10:56:59.227009 progress 75 % (10 MB)
66 10:56:59.230631 progress 80 % (10 MB)
67 10:56:59.234181 progress 85 % (11 MB)
68 10:56:59.237614 progress 90 % (12 MB)
69 10:56:59.242572 progress 95 % (12 MB)
70 10:56:59.246250 progress 100 % (13 MB)
71 10:56:59.246470 13 MB downloaded in 0.08 s (178.15 MB/s)
72 10:56:59.246628 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:56:59.246884 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:56:59.247007 start: 1.3 download-retry (timeout 00:09:59) [common]
76 10:56:59.247134 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 10:56:59.247298 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.194-553-gd498c00818b88/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:56:59.247401 saving as /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/modules/modules.tar
79 10:56:59.247499 total size: 527404 (0 MB)
80 10:56:59.247599 Using unxz to decompress xz
81 10:56:59.251415 progress 6 % (0 MB)
82 10:56:59.251888 progress 12 % (0 MB)
83 10:56:59.252209 progress 18 % (0 MB)
84 10:56:59.253613 progress 24 % (0 MB)
85 10:56:59.255577 progress 31 % (0 MB)
86 10:56:59.257636 progress 37 % (0 MB)
87 10:56:59.259948 progress 43 % (0 MB)
88 10:56:59.262006 progress 49 % (0 MB)
89 10:56:59.264022 progress 55 % (0 MB)
90 10:56:59.266076 progress 62 % (0 MB)
91 10:56:59.268006 progress 68 % (0 MB)
92 10:56:59.270044 progress 74 % (0 MB)
93 10:56:59.272063 progress 80 % (0 MB)
94 10:56:59.274026 progress 86 % (0 MB)
95 10:56:59.275899 progress 93 % (0 MB)
96 10:56:59.278547 progress 99 % (0 MB)
97 10:56:59.285033 0 MB downloaded in 0.04 s (13.40 MB/s)
98 10:56:59.285297 end: 1.3.1 http-download (duration 00:00:00) [common]
100 10:56:59.285556 end: 1.3 download-retry (duration 00:00:00) [common]
101 10:56:59.285666 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 10:56:59.285836 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 10:56:59.285952 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 10:56:59.286037 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 10:56:59.286277 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be
106 10:56:59.286402 makedir: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin
107 10:56:59.286502 makedir: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/tests
108 10:56:59.286597 makedir: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/results
109 10:56:59.286711 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-add-keys
110 10:56:59.286853 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-add-sources
111 10:56:59.286976 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-background-process-start
112 10:56:59.287099 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-background-process-stop
113 10:56:59.287219 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-common-functions
114 10:56:59.287337 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-echo-ipv4
115 10:56:59.287454 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-install-packages
116 10:56:59.287571 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-installed-packages
117 10:56:59.287685 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-os-build
118 10:56:59.287802 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-probe-channel
119 10:56:59.287919 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-probe-ip
120 10:56:59.288035 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-target-ip
121 10:56:59.288150 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-target-mac
122 10:56:59.288266 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-target-storage
123 10:56:59.288386 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-case
124 10:56:59.288504 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-event
125 10:56:59.288621 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-feedback
126 10:56:59.288738 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-raise
127 10:56:59.288862 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-reference
128 10:56:59.289017 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-runner
129 10:56:59.289135 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-set
130 10:56:59.289254 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-test-shell
131 10:56:59.289374 Updating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-install-packages (oe)
132 10:56:59.289519 Updating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/bin/lava-installed-packages (oe)
133 10:56:59.289642 Creating /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/environment
134 10:56:59.289737 LAVA metadata
135 10:56:59.289808 - LAVA_JOB_ID=11723970
136 10:56:59.289875 - LAVA_DISPATCHER_IP=192.168.201.1
137 10:56:59.289971 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 10:56:59.290052 skipped lava-vland-overlay
139 10:56:59.290157 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 10:56:59.290263 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 10:56:59.290341 skipped lava-multinode-overlay
142 10:56:59.290414 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 10:56:59.290493 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 10:56:59.290565 Loading test definitions
145 10:56:59.290652 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 10:56:59.290729 Using /lava-11723970 at stage 0
147 10:56:59.291015 uuid=11723970_1.4.2.3.1 testdef=None
148 10:56:59.291101 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 10:56:59.291185 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 10:56:59.291686 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 10:56:59.291903 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 10:56:59.292516 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 10:56:59.292739 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 10:56:59.293365 runner path: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/0/tests/0_dmesg test_uuid 11723970_1.4.2.3.1
157 10:56:59.293513 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 10:56:59.293737 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 10:56:59.293808 Using /lava-11723970 at stage 1
161 10:56:59.294079 uuid=11723970_1.4.2.3.5 testdef=None
162 10:56:59.294169 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 10:56:59.294250 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 10:56:59.294696 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 10:56:59.294906 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 10:56:59.295515 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 10:56:59.295737 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 10:56:59.296330 runner path: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/1/tests/1_bootrr test_uuid 11723970_1.4.2.3.5
171 10:56:59.296509 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 10:56:59.296711 Creating lava-test-runner.conf files
174 10:56:59.296773 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/0 for stage 0
175 10:56:59.296857 - 0_dmesg
176 10:56:59.296937 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11723970/lava-overlay-4m6kw6be/lava-11723970/1 for stage 1
177 10:56:59.297054 - 1_bootrr
178 10:56:59.297143 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 10:56:59.297225 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 10:56:59.305297 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 10:56:59.305404 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 10:56:59.305490 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 10:56:59.305575 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 10:56:59.305659 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 10:56:59.549396 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 10:56:59.549831 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 10:56:59.550007 extracting modules file /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11723970/extract-overlay-ramdisk-873qy8b6/ramdisk
188 10:56:59.587655 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 10:56:59.587865 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 10:56:59.588007 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11723970/compress-overlay-mwf80pnw/overlay-1.4.2.4.tar.gz to ramdisk
191 10:56:59.588123 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11723970/compress-overlay-mwf80pnw/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11723970/extract-overlay-ramdisk-873qy8b6/ramdisk
192 10:56:59.601179 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 10:56:59.601385 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 10:56:59.601522 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 10:56:59.601657 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 10:56:59.601786 Building ramdisk /var/lib/lava/dispatcher/tmp/11723970/extract-overlay-ramdisk-873qy8b6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11723970/extract-overlay-ramdisk-873qy8b6/ramdisk
197 10:56:59.736140 >> 54147 blocks
198 10:57:00.672518 rename /var/lib/lava/dispatcher/tmp/11723970/extract-overlay-ramdisk-873qy8b6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/ramdisk/ramdisk.cpio.gz
199 10:57:00.673036 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 10:57:00.673208 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 10:57:00.673350 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 10:57:00.673486 No mkimage arch provided, not using FIT.
203 10:57:00.673621 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 10:57:00.673749 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 10:57:00.673898 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 10:57:00.674039 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 10:57:00.674161 No LXC device requested
208 10:57:00.674281 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 10:57:00.674417 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 10:57:00.674549 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 10:57:00.674661 Checking files for TFTP limit of 4294967296 bytes.
212 10:57:00.675194 end: 1 tftp-deploy (duration 00:00:02) [common]
213 10:57:00.675337 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 10:57:00.675468 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 10:57:00.675635 substitutions:
216 10:57:00.675743 - {DTB}: None
217 10:57:00.675840 - {INITRD}: 11723970/tftp-deploy-5mlu1jt3/ramdisk/ramdisk.cpio.gz
218 10:57:00.675934 - {KERNEL}: 11723970/tftp-deploy-5mlu1jt3/kernel/bzImage
219 10:57:00.676028 - {LAVA_MAC}: None
220 10:57:00.676124 - {PRESEED_CONFIG}: None
221 10:57:00.676222 - {PRESEED_LOCAL}: None
222 10:57:00.676315 - {RAMDISK}: 11723970/tftp-deploy-5mlu1jt3/ramdisk/ramdisk.cpio.gz
223 10:57:00.676412 - {ROOT_PART}: None
224 10:57:00.676506 - {ROOT}: None
225 10:57:00.676600 - {SERVER_IP}: 192.168.201.1
226 10:57:00.676693 - {TEE}: None
227 10:57:00.676786 Parsed boot commands:
228 10:57:00.676885 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 10:57:00.677128 Parsed boot commands: tftpboot 192.168.201.1 11723970/tftp-deploy-5mlu1jt3/kernel/bzImage 11723970/tftp-deploy-5mlu1jt3/kernel/cmdline 11723970/tftp-deploy-5mlu1jt3/ramdisk/ramdisk.cpio.gz
230 10:57:00.677264 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 10:57:00.677396 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 10:57:00.677530 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 10:57:00.677664 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 10:57:00.677772 Not connected, no need to disconnect.
235 10:57:00.677891 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 10:57:00.678018 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 10:57:00.678128 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
238 10:57:00.682223 Setting prompt string to ['lava-test: # ']
239 10:57:00.682657 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 10:57:00.682808 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 10:57:00.682947 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 10:57:00.683087 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 10:57:00.683383 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
244 10:57:05.817857 >> Command sent successfully.
245 10:57:05.820411 Returned 0 in 5 seconds
246 10:57:05.920800 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 10:57:05.921271 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 10:57:05.921407 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 10:57:05.921537 Setting prompt string to 'Starting depthcharge on Volmar...'
251 10:57:05.921646 Changing prompt to 'Starting depthcharge on Volmar...'
252 10:57:05.921751 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 10:57:05.922114 [Enter `^Ec?' for help]
254 10:57:07.299442
255 10:57:07.299659
256 10:57:07.306115 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 10:57:07.310081 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 10:57:07.316396 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 10:57:07.319697 CPU: AES supported, TXT NOT supported, VT supported
260 10:57:07.327210 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 10:57:07.330850 Cache size = 10 MiB
262 10:57:07.334378 MCH: device id 4609 (rev 04) is Alderlake-P
263 10:57:07.338635 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 10:57:07.345032 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 10:57:07.348426 VBOOT: Loading verstage.
266 10:57:07.352988 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 10:57:07.356028 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 10:57:07.362499 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 10:57:07.369281 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 10:57:07.375570 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 10:57:07.380082
272 10:57:07.380256
273 10:57:07.387694 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 10:57:07.394947 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 10:57:07.397829 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 10:57:07.401575 I2C TX abort detected (00000001)
277 10:57:07.405155 cr50_i2c_read: Address write failed
278 10:57:07.415469 .done! DID_VID 0x00281ae0
279 10:57:07.418911 TPM ready after 0 ms
280 10:57:07.422533 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 10:57:07.436194 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 10:57:07.439373 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 10:57:07.519053 tlcl_send_startup: Startup return code is 0
284 10:57:07.519259 TPM: setup succeeded
285 10:57:07.539903 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 10:57:07.561721 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 10:57:07.565777 Chrome EC: UHEPI supported
288 10:57:07.569468 Reading cr50 boot mode
289 10:57:07.583781 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 10:57:07.583960 Phase 1
291 10:57:07.590663 FMAP: area GBB found @ 1805000 (458752 bytes)
292 10:57:07.597211 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 10:57:07.604050 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 10:57:07.610498 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 10:57:07.614175 Phase 2
296 10:57:07.614305 Phase 3
297 10:57:07.617241 FMAP: area GBB found @ 1805000 (458752 bytes)
298 10:57:07.623872 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 10:57:07.627394 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 10:57:07.633906 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 10:57:07.640565 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 10:57:07.647529 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 10:57:07.657398 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 10:57:07.669361 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 10:57:07.672421 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 10:57:07.679110 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 10:57:07.685979 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 10:57:07.692460 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 10:57:07.699408 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 10:57:07.703156 Phase 4
311 10:57:07.706504 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 10:57:07.713144 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 10:57:07.925883 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 10:57:07.931810 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 10:57:07.935580 Saving vboot hash.
316 10:57:07.942534 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 10:57:07.957861 tlcl_extend: response is 0
318 10:57:07.965870 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 10:57:07.968858 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 10:57:07.985822 tlcl_extend: response is 0
321 10:57:07.992231 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 10:57:08.011538 tlcl_lock_nv_write: response is 0
323 10:57:08.028633 tlcl_lock_nv_write: response is 0
324 10:57:08.028806 Slot A is selected
325 10:57:08.035371 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 10:57:08.041795 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 10:57:08.049060 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 10:57:08.055115 BS: verstage times (exec / console): total (unknown) / 264 ms
329 10:57:08.055272
330 10:57:08.055388
331 10:57:08.062075 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 10:57:08.066326 Google Chrome EC: version:
333 10:57:08.069109 ro: volmar_v2.0.14126-e605144e9c
334 10:57:08.072380 rw: volmar_v0.0.55-22d1557
335 10:57:08.075755 running image: 2
336 10:57:08.079000 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 10:57:08.089118 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 10:57:08.095607 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 10:57:08.102329 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 10:57:08.112778 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 10:57:08.123791 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 10:57:08.126177 EC took 941us to calculate image hash
343 10:57:08.136850 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 10:57:08.139107 VB2:sync_ec() select_rw=RW(active)
345 10:57:08.152077 Waited 274us to clear limit power flag.
346 10:57:08.156055 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 10:57:08.159036 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 10:57:08.162088 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 10:57:08.169348 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 10:57:08.172309 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
351 10:57:08.172399 TCO_STS: 0000 0000
352 10:57:08.175470 GEN_PMCON: d0015038 00002200
353 10:57:08.178782 GBLRST_CAUSE: 00000000 00000000
354 10:57:08.182135 HPR_CAUSE0: 00000000
355 10:57:08.185725 prev_sleep_state 5
356 10:57:08.188624 Abort disabling TXT, as CPU is not TXT capable.
357 10:57:08.196117 cse_lite: Number of partitions = 3
358 10:57:08.199699 cse_lite: Current partition = RO
359 10:57:08.199795 cse_lite: Next partition = RO
360 10:57:08.203254 cse_lite: Flags = 0x7
361 10:57:08.209962 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 10:57:08.220109 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 10:57:08.222851 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 10:57:08.229588 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 10:57:08.236262 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 10:57:08.242923 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 10:57:08.246436 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 10:57:08.252812 cse_lite: Set Boot Partition Info Command (RW)
369 10:57:08.256327 HECI: Global Reset(Type:1) Command
370 10:57:09.686256 lderlake R0 Platform, ucode: 00000423
371 10:57:09.689641 CPU: AES supported, TXT NOT supported, VT supported
372 10:57:09.696608 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
373 10:57:09.699615 Cache size = 10 MiB
374 10:57:09.702977 MCH: device id 4609 (rev 04) is Alderlake-P
375 10:57:09.709676 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
376 10:57:09.713123 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
377 10:57:09.716412 VBOOT: Loading verstage.
378 10:57:09.720693 FMAP: Found "FLASH" version 1.1 at 0x1804000.
379 10:57:09.727156 FMAP: base = 0x0 size = 0x2000000 #areas = 37
380 10:57:09.730716 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 10:57:09.741617 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
382 10:57:09.747862 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
383 10:57:09.747971
384 10:57:09.748039
385 10:57:09.757791 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
386 10:57:09.764575 Probing TPM I2C: I2C bus 1 version 0x3230302a
387 10:57:09.768091 DW I2C bus 1 at 0xfe022000 (400 KHz)
388 10:57:09.770938 done! DID_VID 0x00281ae0
389 10:57:09.771029 TPM ready after 0 ms
390 10:57:09.775162 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
391 10:57:09.789262 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
392 10:57:09.793187 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
393 10:57:09.870028 tlcl_send_startup: Startup return code is 0
394 10:57:09.870174 TPM: setup succeeded
395 10:57:09.890057 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
396 10:57:09.912144 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
397 10:57:09.915644 Chrome EC: UHEPI supported
398 10:57:09.918860 Reading cr50 boot mode
399 10:57:09.934221 Cr50 says boot_mode is VERIFIED_RW(0x00).
400 10:57:09.934351 Phase 1
401 10:57:09.940531 FMAP: area GBB found @ 1805000 (458752 bytes)
402 10:57:09.947101 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 10:57:09.954115 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 10:57:09.960852 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
405 10:57:09.960984 Phase 2
406 10:57:09.964029 Phase 3
407 10:57:09.967325 FMAP: area GBB found @ 1805000 (458752 bytes)
408 10:57:09.973807 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 10:57:09.977533 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 10:57:09.983779 VB2:vb2_verify_keyblock() Checking keyblock signature...
411 10:57:09.990838 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
412 10:57:09.997330 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
413 10:57:10.007215 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
414 10:57:10.018772 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 10:57:10.022376 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 10:57:10.029235 VB2:vb2_verify_fw_preamble() Verifying preamble.
417 10:57:10.035855 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
418 10:57:10.041984 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
419 10:57:10.048907 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
420 10:57:10.053208 Phase 4
421 10:57:10.056549 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
422 10:57:10.063402 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
423 10:57:10.275224 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
424 10:57:10.281829 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
425 10:57:10.285186 Saving vboot hash.
426 10:57:10.291603 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
427 10:57:10.307853 tlcl_extend: response is 0
428 10:57:10.314369 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
429 10:57:10.320958 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
430 10:57:10.335811 tlcl_extend: response is 0
431 10:57:10.341899 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
432 10:57:10.361644 tlcl_lock_nv_write: response is 0
433 10:57:10.378528 tlcl_lock_nv_write: response is 0
434 10:57:10.378674 Slot A is selected
435 10:57:10.385114 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 10:57:10.391696 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
437 10:57:10.398336 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
438 10:57:10.405194 BS: verstage times (exec / console): total (unknown) / 256 ms
439 10:57:10.405320
440 10:57:10.405386
441 10:57:10.411888 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
442 10:57:10.415354 Google Chrome EC: version:
443 10:57:10.418878 ro: volmar_v2.0.14126-e605144e9c
444 10:57:10.421994 rw: volmar_v0.0.55-22d1557
445 10:57:10.425933 running image: 2
446 10:57:10.428797 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
447 10:57:10.438963 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
448 10:57:10.445595 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
449 10:57:10.452689 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
450 10:57:10.462144 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 10:57:10.473806 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 10:57:10.476862 EC took 1426us to calculate image hash
453 10:57:10.486710 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 10:57:10.490272 VB2:sync_ec() select_rw=RW(active)
455 10:57:10.502463 Waited 625us to clear limit power flag.
456 10:57:10.505935 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
457 10:57:10.509090 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
458 10:57:10.512217 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
459 10:57:10.519010 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
460 10:57:10.522451 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
461 10:57:10.525834 TCO_STS: 0000 0000
462 10:57:10.529026 GEN_PMCON: d1001038 00002200
463 10:57:10.529140 GBLRST_CAUSE: 00000040 00000000
464 10:57:10.532546 HPR_CAUSE0: 00000000
465 10:57:10.535716 prev_sleep_state 5
466 10:57:10.539015 Abort disabling TXT, as CPU is not TXT capable.
467 10:57:10.547707 cse_lite: Number of partitions = 3
468 10:57:10.550652 cse_lite: Current partition = RW
469 10:57:10.550762 cse_lite: Next partition = RW
470 10:57:10.553680 cse_lite: Flags = 0x7
471 10:57:10.560652 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
472 10:57:10.570440 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
473 10:57:10.574280 FMAP: area SI_ME found @ 1000 (5238784 bytes)
474 10:57:10.580598 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
475 10:57:10.587420 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
476 10:57:10.594037 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
477 10:57:10.597330 cse_lite: CSE CBFS RW version : 16.1.25.2049
478 10:57:10.600263 Boot Count incremented to 2679
479 10:57:10.606879 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
480 10:57:10.613842 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 10:57:10.626719 Probing TPM I2C: done! DID_VID 0x00281ae0
482 10:57:10.629818 Locality already claimed
483 10:57:10.633168 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 10:57:10.652504 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 10:57:10.659437 MRC: Hash idx 0x100d comparison successful.
486 10:57:10.662814 MRC cache found, size f6c8
487 10:57:10.662914 bootmode is set to: 2
488 10:57:10.666645 EC returned error result code 3
489 10:57:10.669902 FW_CONFIG value from CBI is 0x131
490 10:57:10.676646 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
491 10:57:10.680027 SPD index = 0
492 10:57:10.686882 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
493 10:57:10.687008 SPD: module type is LPDDR4X
494 10:57:10.693748 SPD: module part number is K4U6E3S4AB-MGCL
495 10:57:10.700192 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
496 10:57:10.703496 SPD: device width 16 bits, bus width 16 bits
497 10:57:10.706973 SPD: module size is 1024 MB (per channel)
498 10:57:10.775972 CBMEM:
499 10:57:10.779111 IMD: root @ 0x76fff000 254 entries.
500 10:57:10.781989 IMD: root @ 0x76ffec00 62 entries.
501 10:57:10.789862 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
502 10:57:10.793427 RO_VPD is uninitialized or empty.
503 10:57:10.796537 FMAP: area RW_VPD found @ f29000 (8192 bytes)
504 10:57:10.803588 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
505 10:57:10.806558 External stage cache:
506 10:57:10.809853 IMD: root @ 0x7bbff000 254 entries.
507 10:57:10.813451 IMD: root @ 0x7bbfec00 62 entries.
508 10:57:10.819817 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 10:57:10.826377 MRC: Checking cached data update for 'RW_MRC_CACHE'.
510 10:57:10.829864 MRC: 'RW_MRC_CACHE' does not need update.
511 10:57:10.830011 8 DIMMs found
512 10:57:10.833201 SMM Memory Map
513 10:57:10.836471 SMRAM : 0x7b800000 0x800000
514 10:57:10.839952 Subregion 0: 0x7b800000 0x200000
515 10:57:10.843070 Subregion 1: 0x7ba00000 0x200000
516 10:57:10.846672 Subregion 2: 0x7bc00000 0x400000
517 10:57:10.849946 top_of_ram = 0x77000000
518 10:57:10.852727 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
519 10:57:10.859982 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
520 10:57:10.867032 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
521 10:57:10.870265 MTRR Range: Start=ff000000 End=0 (Size 1000000)
522 10:57:10.870395 Normal boot
523 10:57:10.879765 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
524 10:57:10.886215 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
525 10:57:10.893284 Processing 237 relocs. Offset value of 0x74ab9000
526 10:57:10.901273 BS: romstage times (exec / console): total (unknown) / 377 ms
527 10:57:10.908363
528 10:57:10.908512
529 10:57:10.914926 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
530 10:57:10.915079 Normal boot
531 10:57:10.921829 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
532 10:57:10.928338 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
533 10:57:10.935364 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
534 10:57:10.945248 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
535 10:57:10.992805 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
536 10:57:10.999464 Processing 5931 relocs. Offset value of 0x72a2f000
537 10:57:11.002336 BS: postcar times (exec / console): total (unknown) / 51 ms
538 10:57:11.002432
539 10:57:11.006012
540 10:57:11.012504 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
541 10:57:11.015669 Reserving BERT start 76a1e000, size 10000
542 10:57:11.019501 Normal boot
543 10:57:11.022359 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
544 10:57:11.029569 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
545 10:57:11.039167 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
546 10:57:11.043490 FMAP: area RW_VPD found @ f29000 (8192 bytes)
547 10:57:11.047178 Google Chrome EC: version:
548 10:57:11.050325 ro: volmar_v2.0.14126-e605144e9c
549 10:57:11.053798 rw: volmar_v0.0.55-22d1557
550 10:57:11.053915 running image: 2
551 10:57:11.060793 ACPI _SWS is PM1 Index 8 GPE Index -1
552 10:57:11.064094 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
553 10:57:11.068024 EC returned error result code 3
554 10:57:11.071077 FW_CONFIG value from CBI is 0x131
555 10:57:11.077545 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
556 10:57:11.080739 PCI: 00:1c.2 disabled by fw_config
557 10:57:11.087311 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 10:57:11.090736 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 10:57:11.097780 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 10:57:11.100584 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
561 10:57:11.107550 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
562 10:57:11.114017 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
563 10:57:11.120855 microcode: sig=0x906a4 pf=0x80 revision=0x423
564 10:57:11.124148 microcode: Update skipped, already up-to-date
565 10:57:11.130763 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
566 10:57:11.163857 Detected 6 core, 8 thread CPU.
567 10:57:11.166717 Setting up SMI for CPU
568 10:57:11.169899 IED base = 0x7bc00000
569 10:57:11.170026 IED size = 0x00400000
570 10:57:11.173917 Will perform SMM setup.
571 10:57:11.177417 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
572 10:57:11.180106 LAPIC 0x0 in XAPIC mode.
573 10:57:11.189926 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
574 10:57:11.193356 Processing 18 relocs. Offset value of 0x00030000
575 10:57:11.198383 Attempting to start 7 APs
576 10:57:11.201291 Waiting for 10ms after sending INIT.
577 10:57:11.214185 Waiting for SIPI to complete...
578 10:57:11.218127 LAPIC 0x1 in XAPIC mode.
579 10:57:11.221170 LAPIC 0x10 in XAPIC mode.
580 10:57:11.224104 LAPIC 0x16 in XAPIC mode.
581 10:57:11.227843 LAPIC 0x8 in XAPIC mode.
582 10:57:11.231216 AP: slot 3 apic_id 16, MCU rev: 0x00000423
583 10:57:11.234123 LAPIC 0x12 in XAPIC mode.
584 10:57:11.234212 LAPIC 0x9 in XAPIC mode.
585 10:57:11.240979 AP: slot 1 apic_id 12, MCU rev: 0x00000423
586 10:57:11.244200 AP: slot 4 apic_id 10, MCU rev: 0x00000423
587 10:57:11.247872 LAPIC 0x14 in XAPIC mode.
588 10:57:11.250976 AP: slot 5 apic_id 9, MCU rev: 0x00000423
589 10:57:11.254413 AP: slot 2 apic_id 14, MCU rev: 0x00000423
590 10:57:11.261053 AP: slot 7 apic_id 1, MCU rev: 0x00000423
591 10:57:11.261194 done.
592 10:57:11.264492 Waiting for SIPI to complete...
593 10:57:11.264597 done.
594 10:57:11.268082 AP: slot 6 apic_id 8, MCU rev: 0x00000423
595 10:57:11.271373 smm_setup_relocation_handler: enter
596 10:57:11.274229 smm_setup_relocation_handler: exit
597 10:57:11.284299 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
598 10:57:11.288605 Processing 11 relocs. Offset value of 0x00038000
599 10:57:11.294631 smm_module_setup_stub: stack_top = 0x7b804000
600 10:57:11.297677 smm_module_setup_stub: per cpu stack_size = 0x800
601 10:57:11.303981 smm_module_setup_stub: runtime.start32_offset = 0x4c
602 10:57:11.307857 smm_module_setup_stub: runtime.smm_size = 0x10000
603 10:57:11.314399 SMM Module: stub loaded at 38000. Will call 0x76a52094
604 10:57:11.317816 Installing permanent SMM handler to 0x7b800000
605 10:57:11.324184 smm_load_module: total_smm_space_needed e468, available -> 200000
606 10:57:11.333900 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
607 10:57:11.337170 Processing 255 relocs. Offset value of 0x7b9f6000
608 10:57:11.344130 smm_load_module: smram_start: 0x7b800000
609 10:57:11.347896 smm_load_module: smram_end: 7ba00000
610 10:57:11.350991 smm_load_module: handler start 0x7b9f6d5f
611 10:57:11.354304 smm_load_module: handler_size 98d0
612 10:57:11.357719 smm_load_module: fxsave_area 0x7b9ff000
613 10:57:11.360835 smm_load_module: fxsave_size 1000
614 10:57:11.364344 smm_load_module: CONFIG_MSEG_SIZE 0x0
615 10:57:11.371002 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
616 10:57:11.374309 smm_load_module: handler_mod_params.smbase = 0x7b800000
617 10:57:11.380912 smm_load_module: per_cpu_save_state_size = 0x400
618 10:57:11.383889 smm_load_module: num_cpus = 0x8
619 10:57:11.390570 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
620 10:57:11.394259 smm_load_module: total_save_state_size = 0x2000
621 10:57:11.397404 smm_load_module: cpu0 entry: 7b9e6000
622 10:57:11.404059 smm_create_map: cpus allowed in one segment 30
623 10:57:11.407429 smm_create_map: min # of segments needed 1
624 10:57:11.407541 CPU 0x0
625 10:57:11.411102 smbase 7b9e6000 entry 7b9ee000
626 10:57:11.417659 ss_start 7b9f5c00 code_end 7b9ee208
627 10:57:11.417749 CPU 0x1
628 10:57:11.420598 smbase 7b9e5c00 entry 7b9edc00
629 10:57:11.427265 ss_start 7b9f5800 code_end 7b9ede08
630 10:57:11.427378 CPU 0x2
631 10:57:11.430544 smbase 7b9e5800 entry 7b9ed800
632 10:57:11.434104 ss_start 7b9f5400 code_end 7b9eda08
633 10:57:11.437211 CPU 0x3
634 10:57:11.440849 smbase 7b9e5400 entry 7b9ed400
635 10:57:11.443811 ss_start 7b9f5000 code_end 7b9ed608
636 10:57:11.443898 CPU 0x4
637 10:57:11.450710 smbase 7b9e5000 entry 7b9ed000
638 10:57:11.454351 ss_start 7b9f4c00 code_end 7b9ed208
639 10:57:11.454439 CPU 0x5
640 10:57:11.457849 smbase 7b9e4c00 entry 7b9ecc00
641 10:57:11.463932 ss_start 7b9f4800 code_end 7b9ece08
642 10:57:11.464018 CPU 0x6
643 10:57:11.467502 smbase 7b9e4800 entry 7b9ec800
644 10:57:11.474025 ss_start 7b9f4400 code_end 7b9eca08
645 10:57:11.474141 CPU 0x7
646 10:57:11.477291 smbase 7b9e4400 entry 7b9ec400
647 10:57:11.480605 ss_start 7b9f4000 code_end 7b9ec608
648 10:57:11.491012 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
649 10:57:11.495195 Processing 11 relocs. Offset value of 0x7b9ee000
650 10:57:11.501257 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
651 10:57:11.507971 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
652 10:57:11.515120 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
653 10:57:11.518566 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
654 10:57:11.525220 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
655 10:57:11.531726 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
656 10:57:11.538908 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
657 10:57:11.545514 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
658 10:57:11.552383 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
659 10:57:11.555658 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
660 10:57:11.562514 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
661 10:57:11.568845 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
662 10:57:11.575630 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
663 10:57:11.582210 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
664 10:57:11.588659 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
665 10:57:11.591730 smm_module_setup_stub: stack_top = 0x7b804000
666 10:57:11.598400 smm_module_setup_stub: per cpu stack_size = 0x800
667 10:57:11.605447 smm_module_setup_stub: runtime.start32_offset = 0x4c
668 10:57:11.609145 smm_module_setup_stub: runtime.smm_size = 0x200000
669 10:57:11.615418 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
670 10:57:11.618566 Clearing SMI status registers
671 10:57:11.621904 SMI_STS: PM1
672 10:57:11.622299 PM1_STS: WAK PWRBTN
673 10:57:11.632056 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
674 10:57:11.632542 In relocation handler: CPU 0
675 10:57:11.638748 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
676 10:57:11.642579 Writing SMRR. base = 0x7b800006, mask=0xff800c00
677 10:57:11.645229 Relocation complete.
678 10:57:11.651960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
679 10:57:11.655302 In relocation handler: CPU 7
680 10:57:11.658768 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
681 10:57:11.662294 Relocation complete.
682 10:57:11.669140 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
683 10:57:11.672573 In relocation handler: CPU 1
684 10:57:11.675603 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
685 10:57:11.678795 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 10:57:11.681751 Relocation complete.
687 10:57:11.688882 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
688 10:57:11.691736 In relocation handler: CPU 3
689 10:57:11.695250 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
690 10:57:11.702473 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 10:57:11.702912 Relocation complete.
692 10:57:11.712214 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
693 10:57:11.712615 In relocation handler: CPU 4
694 10:57:11.718819 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
695 10:57:11.721956 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 10:57:11.725283 Relocation complete.
697 10:57:11.732126 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
698 10:57:11.735485 In relocation handler: CPU 2
699 10:57:11.739021 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
700 10:57:11.745348 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 10:57:11.745845 Relocation complete.
702 10:57:11.751860 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
703 10:57:11.755127 In relocation handler: CPU 6
704 10:57:11.758848 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
705 10:57:11.765169 Writing SMRR. base = 0x7b800006, mask=0xff800c00
706 10:57:11.768890 Relocation complete.
707 10:57:11.775257 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
708 10:57:11.778770 In relocation handler: CPU 5
709 10:57:11.782047 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
710 10:57:11.784972 Relocation complete.
711 10:57:11.785401 Initializing CPU #0
712 10:57:11.788717 CPU: vendor Intel device 906a4
713 10:57:11.791917 CPU: family 06, model 9a, stepping 04
714 10:57:11.795127 Clearing out pending MCEs
715 10:57:11.798480 cpu: energy policy set to 7
716 10:57:11.801862 Turbo is available but hidden
717 10:57:11.805263 Turbo is available and visible
718 10:57:11.808467 microcode: Update skipped, already up-to-date
719 10:57:11.812124 CPU #0 initialized
720 10:57:11.812552 Initializing CPU #7
721 10:57:11.815450 Initializing CPU #2
722 10:57:11.818566 Initializing CPU #4
723 10:57:11.819104 Initializing CPU #3
724 10:57:11.821992 CPU: vendor Intel device 906a4
725 10:57:11.825028 CPU: family 06, model 9a, stepping 04
726 10:57:11.828659 Initializing CPU #1
727 10:57:11.831888 Clearing out pending MCEs
728 10:57:11.835613 CPU: vendor Intel device 906a4
729 10:57:11.838712 CPU: family 06, model 9a, stepping 04
730 10:57:11.842085 cpu: energy policy set to 7
731 10:57:11.845097 CPU: vendor Intel device 906a4
732 10:57:11.848389 CPU: family 06, model 9a, stepping 04
733 10:57:11.851903 CPU: vendor Intel device 906a4
734 10:57:11.855150 CPU: family 06, model 9a, stepping 04
735 10:57:11.859072 Clearing out pending MCEs
736 10:57:11.859607 Clearing out pending MCEs
737 10:57:11.861972 CPU: vendor Intel device 906a4
738 10:57:11.865310 CPU: family 06, model 9a, stepping 04
739 10:57:11.871724 microcode: Update skipped, already up-to-date
740 10:57:11.872173 CPU #4 initialized
741 10:57:11.875412 Initializing CPU #5
742 10:57:11.879024 cpu: energy policy set to 7
743 10:57:11.881838 Clearing out pending MCEs
744 10:57:11.886062 microcode: Update skipped, already up-to-date
745 10:57:11.888588 CPU #1 initialized
746 10:57:11.889053 Clearing out pending MCEs
747 10:57:11.891890 cpu: energy policy set to 7
748 10:57:11.895779 cpu: energy policy set to 7
749 10:57:11.898656 microcode: Update skipped, already up-to-date
750 10:57:11.902178 CPU #2 initialized
751 10:57:11.905265 microcode: Update skipped, already up-to-date
752 10:57:11.909023 CPU #3 initialized
753 10:57:11.912284 CPU: vendor Intel device 906a4
754 10:57:11.915879 CPU: family 06, model 9a, stepping 04
755 10:57:11.918489 cpu: energy policy set to 7
756 10:57:11.921784 Initializing CPU #6
757 10:57:11.922216 Clearing out pending MCEs
758 10:57:11.925157 CPU: vendor Intel device 906a4
759 10:57:11.928616 CPU: family 06, model 9a, stepping 04
760 10:57:11.935476 microcode: Update skipped, already up-to-date
761 10:57:11.935910 CPU #7 initialized
762 10:57:11.938933 Clearing out pending MCEs
763 10:57:11.941821 cpu: energy policy set to 7
764 10:57:11.945028 cpu: energy policy set to 7
765 10:57:11.948773 microcode: Update skipped, already up-to-date
766 10:57:11.951797 CPU #5 initialized
767 10:57:11.955025 microcode: Update skipped, already up-to-date
768 10:57:11.958525 CPU #6 initialized
769 10:57:11.961900 bsp_do_flight_plan done after 693 msecs.
770 10:57:11.965786 CPU: frequency set to 4400 MHz
771 10:57:11.966323 Enabling SMIs.
772 10:57:11.971762 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
773 10:57:11.989920 Probing TPM I2C: done! DID_VID 0x00281ae0
774 10:57:11.992366 Locality already claimed
775 10:57:11.996006 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
776 10:57:12.006937 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
777 10:57:12.010515 Enabling GPIO PM b/c CR50 has long IRQ pulse support
778 10:57:12.017223 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
779 10:57:12.023666 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
780 10:57:12.027111 Found a VBT of 9216 bytes after decompression
781 10:57:12.029986 PCI 1.0, PIN A, using IRQ #16
782 10:57:12.033808 PCI 2.0, PIN A, using IRQ #17
783 10:57:12.036676 PCI 4.0, PIN A, using IRQ #18
784 10:57:12.040672 PCI 5.0, PIN A, using IRQ #16
785 10:57:12.043746 PCI 6.0, PIN A, using IRQ #16
786 10:57:12.046771 PCI 6.2, PIN C, using IRQ #18
787 10:57:12.049987 PCI 7.0, PIN A, using IRQ #19
788 10:57:12.053885 PCI 7.1, PIN B, using IRQ #20
789 10:57:12.056896 PCI 7.2, PIN C, using IRQ #21
790 10:57:12.060428 PCI 7.3, PIN D, using IRQ #22
791 10:57:12.063298 PCI 8.0, PIN A, using IRQ #23
792 10:57:12.066743 PCI D.0, PIN A, using IRQ #17
793 10:57:12.066858 PCI D.1, PIN B, using IRQ #19
794 10:57:12.070183 PCI 10.0, PIN A, using IRQ #24
795 10:57:12.073882 PCI 10.1, PIN B, using IRQ #25
796 10:57:12.076742 PCI 10.6, PIN C, using IRQ #20
797 10:57:12.080305 PCI 10.7, PIN D, using IRQ #21
798 10:57:12.083594 PCI 11.0, PIN A, using IRQ #26
799 10:57:12.086763 PCI 11.1, PIN B, using IRQ #27
800 10:57:12.090717 PCI 11.2, PIN C, using IRQ #28
801 10:57:12.093590 PCI 11.3, PIN D, using IRQ #29
802 10:57:12.096645 PCI 12.0, PIN A, using IRQ #30
803 10:57:12.099997 PCI 12.6, PIN B, using IRQ #31
804 10:57:12.103389 PCI 12.7, PIN C, using IRQ #22
805 10:57:12.106791 PCI 13.0, PIN A, using IRQ #32
806 10:57:12.110416 PCI 13.1, PIN B, using IRQ #33
807 10:57:12.114225 PCI 13.2, PIN C, using IRQ #34
808 10:57:12.114311 PCI 13.3, PIN D, using IRQ #35
809 10:57:12.117548 PCI 14.0, PIN B, using IRQ #23
810 10:57:12.120266 PCI 14.1, PIN A, using IRQ #36
811 10:57:12.124001 PCI 14.3, PIN C, using IRQ #17
812 10:57:12.126843 PCI 15.0, PIN A, using IRQ #37
813 10:57:12.130248 PCI 15.1, PIN B, using IRQ #38
814 10:57:12.133605 PCI 15.2, PIN C, using IRQ #39
815 10:57:12.136809 PCI 15.3, PIN D, using IRQ #40
816 10:57:12.140190 PCI 16.0, PIN A, using IRQ #18
817 10:57:12.143901 PCI 16.1, PIN B, using IRQ #19
818 10:57:12.146736 PCI 16.2, PIN C, using IRQ #20
819 10:57:12.150020 PCI 16.3, PIN D, using IRQ #21
820 10:57:12.153478 PCI 16.4, PIN A, using IRQ #18
821 10:57:12.156755 PCI 16.5, PIN B, using IRQ #19
822 10:57:12.160771 PCI 17.0, PIN A, using IRQ #22
823 10:57:12.163943 PCI 19.0, PIN A, using IRQ #41
824 10:57:12.164023 PCI 19.1, PIN B, using IRQ #42
825 10:57:12.166750 PCI 19.2, PIN C, using IRQ #43
826 10:57:12.170523 PCI 1C.0, PIN A, using IRQ #16
827 10:57:12.173590 PCI 1C.1, PIN B, using IRQ #17
828 10:57:12.176712 PCI 1C.2, PIN C, using IRQ #18
829 10:57:12.180516 PCI 1C.3, PIN D, using IRQ #19
830 10:57:12.183555 PCI 1C.4, PIN A, using IRQ #16
831 10:57:12.187077 PCI 1C.5, PIN B, using IRQ #17
832 10:57:12.190148 PCI 1C.6, PIN C, using IRQ #18
833 10:57:12.193493 PCI 1C.7, PIN D, using IRQ #19
834 10:57:12.196935 PCI 1D.0, PIN A, using IRQ #16
835 10:57:12.200012 PCI 1D.1, PIN B, using IRQ #17
836 10:57:12.203594 PCI 1D.2, PIN C, using IRQ #18
837 10:57:12.206975 PCI 1D.3, PIN D, using IRQ #19
838 10:57:12.210077 PCI 1E.0, PIN A, using IRQ #23
839 10:57:12.213421 PCI 1E.1, PIN B, using IRQ #20
840 10:57:12.216803 PCI 1E.2, PIN C, using IRQ #44
841 10:57:12.216968 PCI 1E.3, PIN D, using IRQ #45
842 10:57:12.220296 PCI 1F.3, PIN B, using IRQ #22
843 10:57:12.224498 PCI 1F.4, PIN C, using IRQ #23
844 10:57:12.227575 PCI 1F.6, PIN D, using IRQ #20
845 10:57:12.230486 PCI 1F.7, PIN A, using IRQ #21
846 10:57:12.237152 IRQ: Using dynamically assigned PCI IO-APIC IRQs
847 10:57:12.244238 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
848 10:57:12.420210 FSPS returned 0
849 10:57:12.423328 Executing Phase 1 of FspMultiPhaseSiInit
850 10:57:12.433419 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
851 10:57:12.437071 port C0 DISC req: usage 1 usb3 1 usb2 1
852 10:57:12.440226 Raw Buffer output 0 00000111
853 10:57:12.443533 Raw Buffer output 1 00000000
854 10:57:12.447229 pmc_send_ipc_cmd succeeded
855 10:57:12.450523 port C1 DISC req: usage 1 usb3 3 usb2 3
856 10:57:12.454130 Raw Buffer output 0 00000331
857 10:57:12.457287 Raw Buffer output 1 00000000
858 10:57:12.461065 pmc_send_ipc_cmd succeeded
859 10:57:12.464897 Detected 6 core, 8 thread CPU.
860 10:57:12.468279 Detected 6 core, 8 thread CPU.
861 10:57:12.473092 Detected 6 core, 8 thread CPU.
862 10:57:12.476613 Detected 6 core, 8 thread CPU.
863 10:57:12.480107 Detected 6 core, 8 thread CPU.
864 10:57:12.483847 Detected 6 core, 8 thread CPU.
865 10:57:12.486922 Detected 6 core, 8 thread CPU.
866 10:57:12.490504 Detected 6 core, 8 thread CPU.
867 10:57:12.493880 Detected 6 core, 8 thread CPU.
868 10:57:12.496894 Detected 6 core, 8 thread CPU.
869 10:57:12.500223 Detected 6 core, 8 thread CPU.
870 10:57:12.503521 Detected 6 core, 8 thread CPU.
871 10:57:12.506777 Detected 6 core, 8 thread CPU.
872 10:57:12.510078 Detected 6 core, 8 thread CPU.
873 10:57:12.513729 Detected 6 core, 8 thread CPU.
874 10:57:12.516685 Detected 6 core, 8 thread CPU.
875 10:57:12.520565 Detected 6 core, 8 thread CPU.
876 10:57:12.523694 Detected 6 core, 8 thread CPU.
877 10:57:12.526985 Detected 6 core, 8 thread CPU.
878 10:57:12.530565 Detected 6 core, 8 thread CPU.
879 10:57:12.533468 Detected 6 core, 8 thread CPU.
880 10:57:12.533627 Detected 6 core, 8 thread CPU.
881 10:57:12.825872 Detected 6 core, 8 thread CPU.
882 10:57:12.828968 Detected 6 core, 8 thread CPU.
883 10:57:12.832278 Detected 6 core, 8 thread CPU.
884 10:57:12.835528 Detected 6 core, 8 thread CPU.
885 10:57:12.838983 Detected 6 core, 8 thread CPU.
886 10:57:12.842319 Detected 6 core, 8 thread CPU.
887 10:57:12.845645 Detected 6 core, 8 thread CPU.
888 10:57:12.849088 Detected 6 core, 8 thread CPU.
889 10:57:12.852655 Detected 6 core, 8 thread CPU.
890 10:57:12.855497 Detected 6 core, 8 thread CPU.
891 10:57:12.859302 Detected 6 core, 8 thread CPU.
892 10:57:12.862679 Detected 6 core, 8 thread CPU.
893 10:57:12.866118 Detected 6 core, 8 thread CPU.
894 10:57:12.868844 Detected 6 core, 8 thread CPU.
895 10:57:12.872405 Detected 6 core, 8 thread CPU.
896 10:57:12.875843 Detected 6 core, 8 thread CPU.
897 10:57:12.879247 Detected 6 core, 8 thread CPU.
898 10:57:12.882252 Detected 6 core, 8 thread CPU.
899 10:57:12.886010 Detected 6 core, 8 thread CPU.
900 10:57:12.886110 Detected 6 core, 8 thread CPU.
901 10:57:12.889159 Display FSP Version Info HOB
902 10:57:12.892941 Reference Code - CPU = c.0.65.70
903 10:57:12.895954 uCode Version = 0.0.4.23
904 10:57:12.899569 TXT ACM version = ff.ff.ff.ffff
905 10:57:12.903093 Reference Code - ME = c.0.65.70
906 10:57:12.906335 MEBx version = 0.0.0.0
907 10:57:12.909381 ME Firmware Version = Lite SKU
908 10:57:12.912903 Reference Code - PCH = c.0.65.70
909 10:57:12.916258 PCH-CRID Status = Disabled
910 10:57:12.919777 PCH-CRID Original Value = ff.ff.ff.ffff
911 10:57:12.922992 PCH-CRID New Value = ff.ff.ff.ffff
912 10:57:12.926040 OPROM - RST - RAID = ff.ff.ff.ffff
913 10:57:12.929297 PCH Hsio Version = 4.0.0.0
914 10:57:12.932999 Reference Code - SA - System Agent = c.0.65.70
915 10:57:12.936531 Reference Code - MRC = 0.0.3.80
916 10:57:12.939569 SA - PCIe Version = c.0.65.70
917 10:57:12.942843 SA-CRID Status = Disabled
918 10:57:12.946506 SA-CRID Original Value = 0.0.0.4
919 10:57:12.949570 SA-CRID New Value = 0.0.0.4
920 10:57:12.949729 OPROM - VBIOS = ff.ff.ff.ffff
921 10:57:12.956300 IO Manageability Engine FW Version = 24.0.4.0
922 10:57:12.959941 PHY Build Version = 0.0.0.2016
923 10:57:12.963112 Thunderbolt(TM) FW Version = 0.0.0.0
924 10:57:12.970022 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
925 10:57:12.976533 BS: BS_DEV_INIT_CHIPS run times (exec / console): 488 / 507 ms
926 10:57:12.977028 Enumerating buses...
927 10:57:12.983418 Show all devs... Before device enumeration.
928 10:57:12.983847 Root Device: enabled 1
929 10:57:12.986739 CPU_CLUSTER: 0: enabled 1
930 10:57:12.990170 DOMAIN: 0000: enabled 1
931 10:57:12.990882 GPIO: 0: enabled 1
932 10:57:12.993095 PCI: 00:00.0: enabled 1
933 10:57:12.996393 PCI: 00:01.0: enabled 0
934 10:57:12.999882 PCI: 00:01.1: enabled 0
935 10:57:13.000478 PCI: 00:02.0: enabled 1
936 10:57:13.003300 PCI: 00:04.0: enabled 1
937 10:57:13.006547 PCI: 00:05.0: enabled 0
938 10:57:13.010038 PCI: 00:06.0: enabled 1
939 10:57:13.010484 PCI: 00:06.2: enabled 0
940 10:57:13.013623 PCI: 00:07.0: enabled 0
941 10:57:13.016749 PCI: 00:07.1: enabled 0
942 10:57:13.017354 PCI: 00:07.2: enabled 0
943 10:57:13.020123 PCI: 00:07.3: enabled 0
944 10:57:13.023276 PCI: 00:08.0: enabled 0
945 10:57:13.026776 PCI: 00:09.0: enabled 0
946 10:57:13.027237 PCI: 00:0a.0: enabled 1
947 10:57:13.030110 PCI: 00:0d.0: enabled 1
948 10:57:13.033746 PCI: 00:0d.1: enabled 0
949 10:57:13.036917 PCI: 00:0d.2: enabled 0
950 10:57:13.037385 PCI: 00:0d.3: enabled 0
951 10:57:13.039903 PCI: 00:0e.0: enabled 0
952 10:57:13.043599 PCI: 00:10.0: enabled 0
953 10:57:13.046660 PCI: 00:10.1: enabled 0
954 10:57:13.047375 PCI: 00:10.6: enabled 0
955 10:57:13.049747 PCI: 00:10.7: enabled 0
956 10:57:13.053005 PCI: 00:12.0: enabled 0
957 10:57:13.053395 PCI: 00:12.6: enabled 0
958 10:57:13.056514 PCI: 00:12.7: enabled 0
959 10:57:13.060222 PCI: 00:13.0: enabled 0
960 10:57:13.063062 PCI: 00:14.0: enabled 1
961 10:57:13.063673 PCI: 00:14.1: enabled 0
962 10:57:13.066489 PCI: 00:14.2: enabled 1
963 10:57:13.069752 PCI: 00:14.3: enabled 1
964 10:57:13.073366 PCI: 00:15.0: enabled 1
965 10:57:13.073993 PCI: 00:15.1: enabled 1
966 10:57:13.076881 PCI: 00:15.2: enabled 0
967 10:57:13.080140 PCI: 00:15.3: enabled 1
968 10:57:13.083362 PCI: 00:16.0: enabled 1
969 10:57:13.083668 PCI: 00:16.1: enabled 0
970 10:57:13.086537 PCI: 00:16.2: enabled 0
971 10:57:13.090018 PCI: 00:16.3: enabled 0
972 10:57:13.090325 PCI: 00:16.4: enabled 0
973 10:57:13.092969 PCI: 00:16.5: enabled 0
974 10:57:13.096317 PCI: 00:17.0: enabled 1
975 10:57:13.099850 PCI: 00:19.0: enabled 0
976 10:57:13.100230 PCI: 00:19.1: enabled 1
977 10:57:13.102765 PCI: 00:19.2: enabled 0
978 10:57:13.106735 PCI: 00:1a.0: enabled 0
979 10:57:13.110158 PCI: 00:1c.0: enabled 0
980 10:57:13.110582 PCI: 00:1c.1: enabled 0
981 10:57:13.112967 PCI: 00:1c.2: enabled 0
982 10:57:13.116569 PCI: 00:1c.3: enabled 0
983 10:57:13.120113 PCI: 00:1c.4: enabled 0
984 10:57:13.120677 PCI: 00:1c.5: enabled 0
985 10:57:13.122956 PCI: 00:1c.6: enabled 0
986 10:57:13.126213 PCI: 00:1c.7: enabled 0
987 10:57:13.129904 PCI: 00:1d.0: enabled 0
988 10:57:13.130387 PCI: 00:1d.1: enabled 0
989 10:57:13.133328 PCI: 00:1d.2: enabled 0
990 10:57:13.136360 PCI: 00:1d.3: enabled 0
991 10:57:13.136672 PCI: 00:1e.0: enabled 1
992 10:57:13.139536 PCI: 00:1e.1: enabled 0
993 10:57:13.142986 PCI: 00:1e.2: enabled 0
994 10:57:13.146423 PCI: 00:1e.3: enabled 1
995 10:57:13.146860 PCI: 00:1f.0: enabled 1
996 10:57:13.149784 PCI: 00:1f.1: enabled 0
997 10:57:13.152918 PCI: 00:1f.2: enabled 1
998 10:57:13.156469 PCI: 00:1f.3: enabled 1
999 10:57:13.156697 PCI: 00:1f.4: enabled 0
1000 10:57:13.159795 PCI: 00:1f.5: enabled 1
1001 10:57:13.163306 PCI: 00:1f.6: enabled 0
1002 10:57:13.165921 PCI: 00:1f.7: enabled 0
1003 10:57:13.166151 GENERIC: 0.0: enabled 1
1004 10:57:13.169516 GENERIC: 0.0: enabled 1
1005 10:57:13.172430 GENERIC: 1.0: enabled 1
1006 10:57:13.176199 GENERIC: 0.0: enabled 1
1007 10:57:13.176502 GENERIC: 1.0: enabled 1
1008 10:57:13.179515 USB0 port 0: enabled 1
1009 10:57:13.182760 USB0 port 0: enabled 1
1010 10:57:13.183009 GENERIC: 0.0: enabled 1
1011 10:57:13.185996 I2C: 00:1a: enabled 1
1012 10:57:13.189466 I2C: 00:31: enabled 1
1013 10:57:13.189718 I2C: 00:32: enabled 1
1014 10:57:13.192644 I2C: 00:50: enabled 1
1015 10:57:13.196034 I2C: 00:10: enabled 1
1016 10:57:13.196264 I2C: 00:15: enabled 1
1017 10:57:13.199154 I2C: 00:2c: enabled 1
1018 10:57:13.202627 GENERIC: 0.0: enabled 1
1019 10:57:13.202918 SPI: 00: enabled 1
1020 10:57:13.206046 PNP: 0c09.0: enabled 1
1021 10:57:13.209476 GENERIC: 0.0: enabled 1
1022 10:57:13.213031 USB3 port 0: enabled 1
1023 10:57:13.213262 USB3 port 1: enabled 0
1024 10:57:13.215926 USB3 port 2: enabled 1
1025 10:57:13.219347 USB3 port 3: enabled 0
1026 10:57:13.219591 USB2 port 0: enabled 1
1027 10:57:13.222996 USB2 port 1: enabled 0
1028 10:57:13.226577 USB2 port 2: enabled 1
1029 10:57:13.227004 USB2 port 3: enabled 0
1030 10:57:13.229764 USB2 port 4: enabled 0
1031 10:57:13.232795 USB2 port 5: enabled 1
1032 10:57:13.236135 USB2 port 6: enabled 0
1033 10:57:13.236716 USB2 port 7: enabled 0
1034 10:57:13.239460 USB2 port 8: enabled 1
1035 10:57:13.243003 USB2 port 9: enabled 1
1036 10:57:13.243470 USB3 port 0: enabled 1
1037 10:57:13.246598 USB3 port 1: enabled 0
1038 10:57:13.249381 USB3 port 2: enabled 0
1039 10:57:13.250131 USB3 port 3: enabled 0
1040 10:57:13.252834 GENERIC: 0.0: enabled 1
1041 10:57:13.256479 GENERIC: 1.0: enabled 1
1042 10:57:13.259791 APIC: 00: enabled 1
1043 10:57:13.260227 APIC: 12: enabled 1
1044 10:57:13.263488 APIC: 14: enabled 1
1045 10:57:13.264075 APIC: 16: enabled 1
1046 10:57:13.266507 APIC: 10: enabled 1
1047 10:57:13.269822 APIC: 09: enabled 1
1048 10:57:13.270352 APIC: 08: enabled 1
1049 10:57:13.272894 APIC: 01: enabled 1
1050 10:57:13.276380 Compare with tree...
1051 10:57:13.276862 Root Device: enabled 1
1052 10:57:13.279387 CPU_CLUSTER: 0: enabled 1
1053 10:57:13.282800 APIC: 00: enabled 1
1054 10:57:13.283522 APIC: 12: enabled 1
1055 10:57:13.286308 APIC: 14: enabled 1
1056 10:57:13.289548 APIC: 16: enabled 1
1057 10:57:13.289936 APIC: 10: enabled 1
1058 10:57:13.292749 APIC: 09: enabled 1
1059 10:57:13.296428 APIC: 08: enabled 1
1060 10:57:13.296702 APIC: 01: enabled 1
1061 10:57:13.299356 DOMAIN: 0000: enabled 1
1062 10:57:13.302889 GPIO: 0: enabled 1
1063 10:57:13.305921 PCI: 00:00.0: enabled 1
1064 10:57:13.306014 PCI: 00:01.0: enabled 0
1065 10:57:13.309247 PCI: 00:01.1: enabled 0
1066 10:57:13.312404 PCI: 00:02.0: enabled 1
1067 10:57:13.315680 PCI: 00:04.0: enabled 1
1068 10:57:13.319188 GENERIC: 0.0: enabled 1
1069 10:57:13.319271 PCI: 00:05.0: enabled 0
1070 10:57:13.322550 PCI: 00:06.0: enabled 1
1071 10:57:13.326639 PCI: 00:06.2: enabled 0
1072 10:57:13.329269 PCI: 00:08.0: enabled 0
1073 10:57:13.332643 PCI: 00:09.0: enabled 0
1074 10:57:13.333198 PCI: 00:0a.0: enabled 1
1075 10:57:13.336327 PCI: 00:0d.0: enabled 1
1076 10:57:13.339955 USB0 port 0: enabled 1
1077 10:57:13.342728 USB3 port 0: enabled 1
1078 10:57:13.346425 USB3 port 1: enabled 0
1079 10:57:13.346872 USB3 port 2: enabled 1
1080 10:57:13.349281 USB3 port 3: enabled 0
1081 10:57:13.352612 PCI: 00:0d.1: enabled 0
1082 10:57:13.356045 PCI: 00:0d.2: enabled 0
1083 10:57:13.359396 PCI: 00:0d.3: enabled 0
1084 10:57:13.359873 PCI: 00:0e.0: enabled 0
1085 10:57:13.362914 PCI: 00:10.0: enabled 0
1086 10:57:13.366529 PCI: 00:10.1: enabled 0
1087 10:57:13.369634 PCI: 00:10.6: enabled 0
1088 10:57:13.373538 PCI: 00:10.7: enabled 0
1089 10:57:13.373965 PCI: 00:12.0: enabled 0
1090 10:57:13.376036 PCI: 00:12.6: enabled 0
1091 10:57:13.379654 PCI: 00:12.7: enabled 0
1092 10:57:13.382843 PCI: 00:13.0: enabled 0
1093 10:57:13.386031 PCI: 00:14.0: enabled 1
1094 10:57:13.386484 USB0 port 0: enabled 1
1095 10:57:13.389420 USB2 port 0: enabled 1
1096 10:57:13.392871 USB2 port 1: enabled 0
1097 10:57:13.396177 USB2 port 2: enabled 1
1098 10:57:13.399570 USB2 port 3: enabled 0
1099 10:57:13.400144 USB2 port 4: enabled 0
1100 10:57:13.403070 USB2 port 5: enabled 1
1101 10:57:13.406065 USB2 port 6: enabled 0
1102 10:57:13.409163 USB2 port 7: enabled 0
1103 10:57:13.412573 USB2 port 8: enabled 1
1104 10:57:13.415997 USB2 port 9: enabled 1
1105 10:57:13.416112 USB3 port 0: enabled 1
1106 10:57:13.419331 USB3 port 1: enabled 0
1107 10:57:13.422448 USB3 port 2: enabled 0
1108 10:57:13.426403 USB3 port 3: enabled 0
1109 10:57:13.429224 PCI: 00:14.1: enabled 0
1110 10:57:13.429310 PCI: 00:14.2: enabled 1
1111 10:57:13.432792 PCI: 00:14.3: enabled 1
1112 10:57:13.436552 GENERIC: 0.0: enabled 1
1113 10:57:13.439652 PCI: 00:15.0: enabled 1
1114 10:57:13.442955 I2C: 00:1a: enabled 1
1115 10:57:13.443422 I2C: 00:31: enabled 1
1116 10:57:13.446428 I2C: 00:32: enabled 1
1117 10:57:13.449782 PCI: 00:15.1: enabled 1
1118 10:57:13.453017 I2C: 00:50: enabled 1
1119 10:57:13.453416 PCI: 00:15.2: enabled 0
1120 10:57:13.456066 PCI: 00:15.3: enabled 1
1121 10:57:13.459928 I2C: 00:10: enabled 1
1122 10:57:13.462954 PCI: 00:16.0: enabled 1
1123 10:57:13.466580 PCI: 00:16.1: enabled 0
1124 10:57:13.467160 PCI: 00:16.2: enabled 0
1125 10:57:13.469722 PCI: 00:16.3: enabled 0
1126 10:57:13.472900 PCI: 00:16.4: enabled 0
1127 10:57:13.476284 PCI: 00:16.5: enabled 0
1128 10:57:13.476707 PCI: 00:17.0: enabled 1
1129 10:57:13.479440 PCI: 00:19.0: enabled 0
1130 10:57:13.482871 PCI: 00:19.1: enabled 1
1131 10:57:13.486118 I2C: 00:15: enabled 1
1132 10:57:13.490017 I2C: 00:2c: enabled 1
1133 10:57:13.490322 PCI: 00:19.2: enabled 0
1134 10:57:13.492734 PCI: 00:1a.0: enabled 0
1135 10:57:13.496371 PCI: 00:1e.0: enabled 1
1136 10:57:13.499649 PCI: 00:1e.1: enabled 0
1137 10:57:13.502790 PCI: 00:1e.2: enabled 0
1138 10:57:13.503020 PCI: 00:1e.3: enabled 1
1139 10:57:13.506269 SPI: 00: enabled 1
1140 10:57:13.510079 PCI: 00:1f.0: enabled 1
1141 10:57:13.512905 PNP: 0c09.0: enabled 1
1142 10:57:13.513154 PCI: 00:1f.1: enabled 0
1143 10:57:13.516435 PCI: 00:1f.2: enabled 1
1144 10:57:13.519905 GENERIC: 0.0: enabled 1
1145 10:57:13.522661 GENERIC: 0.0: enabled 1
1146 10:57:13.526308 GENERIC: 1.0: enabled 1
1147 10:57:13.526610 PCI: 00:1f.3: enabled 1
1148 10:57:13.529496 PCI: 00:1f.4: enabled 0
1149 10:57:13.532977 PCI: 00:1f.5: enabled 1
1150 10:57:13.536520 PCI: 00:1f.6: enabled 0
1151 10:57:13.540007 PCI: 00:1f.7: enabled 0
1152 10:57:13.540240 Root Device scanning...
1153 10:57:13.542828 scan_static_bus for Root Device
1154 10:57:13.546339 CPU_CLUSTER: 0 enabled
1155 10:57:13.549370 DOMAIN: 0000 enabled
1156 10:57:13.549612 DOMAIN: 0000 scanning...
1157 10:57:13.552654 PCI: pci_scan_bus for bus 00
1158 10:57:13.556063 PCI: 00:00.0 [8086/0000] ops
1159 10:57:13.559808 PCI: 00:00.0 [8086/4609] enabled
1160 10:57:13.562713 PCI: 00:02.0 [8086/0000] bus ops
1161 10:57:13.566338 PCI: 00:02.0 [8086/46b3] enabled
1162 10:57:13.569202 PCI: 00:04.0 [8086/0000] bus ops
1163 10:57:13.572550 PCI: 00:04.0 [8086/461d] enabled
1164 10:57:13.576078 PCI: 00:06.0 [8086/0000] bus ops
1165 10:57:13.579136 PCI: 00:06.0 [8086/464d] enabled
1166 10:57:13.582403 PCI: 00:08.0 [8086/464f] disabled
1167 10:57:13.586019 PCI: 00:0a.0 [8086/467d] enabled
1168 10:57:13.589530 PCI: 00:0d.0 [8086/0000] bus ops
1169 10:57:13.592899 PCI: 00:0d.0 [8086/461e] enabled
1170 10:57:13.596551 PCI: 00:14.0 [8086/0000] bus ops
1171 10:57:13.599672 PCI: 00:14.0 [8086/51ed] enabled
1172 10:57:13.603240 PCI: 00:14.2 [8086/51ef] enabled
1173 10:57:13.606562 PCI: 00:14.3 [8086/0000] bus ops
1174 10:57:13.609622 PCI: 00:14.3 [8086/51f0] enabled
1175 10:57:13.613139 PCI: 00:15.0 [8086/0000] bus ops
1176 10:57:13.616763 PCI: 00:15.0 [8086/51e8] enabled
1177 10:57:13.619740 PCI: 00:15.1 [8086/0000] bus ops
1178 10:57:13.623313 PCI: 00:15.1 [8086/51e9] enabled
1179 10:57:13.626514 PCI: 00:15.2 [8086/0000] bus ops
1180 10:57:13.633544 PCI: 00:15.2 [8086/51ea] disabled
1181 10:57:13.636618 PCI: 00:15.3 [8086/0000] bus ops
1182 10:57:13.639760 PCI: 00:15.3 [8086/51eb] enabled
1183 10:57:13.639988 PCI: 00:16.0 [8086/0000] ops
1184 10:57:13.642959 PCI: 00:16.0 [8086/51e0] enabled
1185 10:57:13.650015 PCI: Static device PCI: 00:17.0 not found, disabling it.
1186 10:57:13.653142 PCI: 00:19.0 [8086/0000] bus ops
1187 10:57:13.657054 PCI: 00:19.0 [8086/51c5] disabled
1188 10:57:13.659644 PCI: 00:19.1 [8086/0000] bus ops
1189 10:57:13.663074 PCI: 00:19.1 [8086/51c6] enabled
1190 10:57:13.666483 PCI: 00:1e.0 [8086/0000] ops
1191 10:57:13.669671 PCI: 00:1e.0 [8086/51a8] enabled
1192 10:57:13.673131 PCI: 00:1e.3 [8086/0000] bus ops
1193 10:57:13.676360 PCI: 00:1e.3 [8086/51ab] enabled
1194 10:57:13.680271 PCI: 00:1f.0 [8086/0000] bus ops
1195 10:57:13.683916 PCI: 00:1f.0 [8086/5182] enabled
1196 10:57:13.686694 RTC Init
1197 10:57:13.689910 Set power on after power failure.
1198 10:57:13.690138 Disabling Deep S3
1199 10:57:13.693391 Disabling Deep S3
1200 10:57:13.696563 Disabling Deep S4
1201 10:57:13.696863 Disabling Deep S4
1202 10:57:13.699653 Disabling Deep S5
1203 10:57:13.699880 Disabling Deep S5
1204 10:57:13.703233 PCI: 00:1f.2 [0000/0000] hidden
1205 10:57:13.706522 PCI: 00:1f.3 [8086/0000] bus ops
1206 10:57:13.710374 PCI: 00:1f.3 [8086/51c8] enabled
1207 10:57:13.713195 PCI: 00:1f.5 [8086/0000] bus ops
1208 10:57:13.716608 PCI: 00:1f.5 [8086/51a4] enabled
1209 10:57:13.720130 GPIO: 0 enabled
1210 10:57:13.723019 PCI: Leftover static devices:
1211 10:57:13.723250 PCI: 00:01.0
1212 10:57:13.723432 PCI: 00:01.1
1213 10:57:13.726535 PCI: 00:05.0
1214 10:57:13.726813 PCI: 00:06.2
1215 10:57:13.729993 PCI: 00:09.0
1216 10:57:13.730295 PCI: 00:0d.1
1217 10:57:13.730482 PCI: 00:0d.2
1218 10:57:13.733298 PCI: 00:0d.3
1219 10:57:13.733598 PCI: 00:0e.0
1220 10:57:13.736695 PCI: 00:10.0
1221 10:57:13.736955 PCI: 00:10.1
1222 10:57:13.739922 PCI: 00:10.6
1223 10:57:13.740260 PCI: 00:10.7
1224 10:57:13.740555 PCI: 00:12.0
1225 10:57:13.743169 PCI: 00:12.6
1226 10:57:13.743412 PCI: 00:12.7
1227 10:57:13.746870 PCI: 00:13.0
1228 10:57:13.747186 PCI: 00:14.1
1229 10:57:13.747389 PCI: 00:16.1
1230 10:57:13.749627 PCI: 00:16.2
1231 10:57:13.749851 PCI: 00:16.3
1232 10:57:13.753145 PCI: 00:16.4
1233 10:57:13.753370 PCI: 00:16.5
1234 10:57:13.753547 PCI: 00:17.0
1235 10:57:13.756795 PCI: 00:19.2
1236 10:57:13.757039 PCI: 00:1a.0
1237 10:57:13.759535 PCI: 00:1e.1
1238 10:57:13.759762 PCI: 00:1e.2
1239 10:57:13.762946 PCI: 00:1f.1
1240 10:57:13.763173 PCI: 00:1f.4
1241 10:57:13.763369 PCI: 00:1f.6
1242 10:57:13.766878 PCI: 00:1f.7
1243 10:57:13.769791 PCI: Check your devicetree.cb.
1244 10:57:13.770139 PCI: 00:02.0 scanning...
1245 10:57:13.773251 scan_generic_bus for PCI: 00:02.0
1246 10:57:13.780288 scan_generic_bus for PCI: 00:02.0 done
1247 10:57:13.783016 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1248 10:57:13.786913 PCI: 00:04.0 scanning...
1249 10:57:13.789674 scan_generic_bus for PCI: 00:04.0
1250 10:57:13.790052 GENERIC: 0.0 enabled
1251 10:57:13.796243 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1252 10:57:13.803059 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1253 10:57:13.806499 PCI: 00:06.0 scanning...
1254 10:57:13.809945 do_pci_scan_bridge for PCI: 00:06.0
1255 10:57:13.810172 PCI: pci_scan_bus for bus 01
1256 10:57:13.813232 PCI: 01:00.0 [15b7/5009] enabled
1257 10:57:13.819932 Enabling Common Clock Configuration
1258 10:57:13.822838 L1 Sub-State supported from root port 6
1259 10:57:13.826212 L1 Sub-State Support = 0x5
1260 10:57:13.829614 CommonModeRestoreTime = 0x6e
1261 10:57:13.833224 Power On Value = 0x5, Power On Scale = 0x2
1262 10:57:13.833521 ASPM: Enabled L1
1263 10:57:13.839654 PCIe: Max_Payload_Size adjusted to 256
1264 10:57:13.839879 PCI: 01:00.0: Enabled LTR
1265 10:57:13.846623 PCI: 01:00.0: Programmed LTR max latencies
1266 10:57:13.849767 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1267 10:57:13.853234 PCI: 00:0d.0 scanning...
1268 10:57:13.856595 scan_static_bus for PCI: 00:0d.0
1269 10:57:13.856841 USB0 port 0 enabled
1270 10:57:13.860117 USB0 port 0 scanning...
1271 10:57:13.863429 scan_static_bus for USB0 port 0
1272 10:57:13.866535 USB3 port 0 enabled
1273 10:57:13.866760 USB3 port 1 disabled
1274 10:57:13.870012 USB3 port 2 enabled
1275 10:57:13.873490 USB3 port 3 disabled
1276 10:57:13.873790 USB3 port 0 scanning...
1277 10:57:13.876768 scan_static_bus for USB3 port 0
1278 10:57:13.879935 scan_static_bus for USB3 port 0 done
1279 10:57:13.886678 scan_bus: bus USB3 port 0 finished in 6 msecs
1280 10:57:13.886915 USB3 port 2 scanning...
1281 10:57:13.890205 scan_static_bus for USB3 port 2
1282 10:57:13.896524 scan_static_bus for USB3 port 2 done
1283 10:57:13.900143 scan_bus: bus USB3 port 2 finished in 6 msecs
1284 10:57:13.903118 scan_static_bus for USB0 port 0 done
1285 10:57:13.906499 scan_bus: bus USB0 port 0 finished in 43 msecs
1286 10:57:13.913106 scan_static_bus for PCI: 00:0d.0 done
1287 10:57:13.916743 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1288 10:57:13.920232 PCI: 00:14.0 scanning...
1289 10:57:13.923773 scan_static_bus for PCI: 00:14.0
1290 10:57:13.924236 USB0 port 0 enabled
1291 10:57:13.926560 USB0 port 0 scanning...
1292 10:57:13.929926 scan_static_bus for USB0 port 0
1293 10:57:13.933614 USB2 port 0 enabled
1294 10:57:13.934045 USB2 port 1 disabled
1295 10:57:13.936795 USB2 port 2 enabled
1296 10:57:13.940057 USB2 port 3 disabled
1297 10:57:13.940632 USB2 port 4 disabled
1298 10:57:13.943473 USB2 port 5 enabled
1299 10:57:13.946698 USB2 port 6 disabled
1300 10:57:13.946925 USB2 port 7 disabled
1301 10:57:13.950006 USB2 port 8 enabled
1302 10:57:13.950233 USB2 port 9 enabled
1303 10:57:13.953415 USB3 port 0 enabled
1304 10:57:13.956466 USB3 port 1 disabled
1305 10:57:13.956694 USB3 port 2 disabled
1306 10:57:13.959855 USB3 port 3 disabled
1307 10:57:13.963116 USB2 port 0 scanning...
1308 10:57:13.966419 scan_static_bus for USB2 port 0
1309 10:57:13.969778 scan_static_bus for USB2 port 0 done
1310 10:57:13.973216 scan_bus: bus USB2 port 0 finished in 6 msecs
1311 10:57:13.976560 USB2 port 2 scanning...
1312 10:57:13.980033 scan_static_bus for USB2 port 2
1313 10:57:13.983097 scan_static_bus for USB2 port 2 done
1314 10:57:13.986787 scan_bus: bus USB2 port 2 finished in 6 msecs
1315 10:57:13.989889 USB2 port 5 scanning...
1316 10:57:13.993292 scan_static_bus for USB2 port 5
1317 10:57:13.996505 scan_static_bus for USB2 port 5 done
1318 10:57:14.002961 scan_bus: bus USB2 port 5 finished in 6 msecs
1319 10:57:14.003080 USB2 port 8 scanning...
1320 10:57:14.006506 scan_static_bus for USB2 port 8
1321 10:57:14.010052 scan_static_bus for USB2 port 8 done
1322 10:57:14.016152 scan_bus: bus USB2 port 8 finished in 6 msecs
1323 10:57:14.016246 USB2 port 9 scanning...
1324 10:57:14.020069 scan_static_bus for USB2 port 9
1325 10:57:14.026381 scan_static_bus for USB2 port 9 done
1326 10:57:14.029538 scan_bus: bus USB2 port 9 finished in 6 msecs
1327 10:57:14.032888 USB3 port 0 scanning...
1328 10:57:14.036603 scan_static_bus for USB3 port 0
1329 10:57:14.039889 scan_static_bus for USB3 port 0 done
1330 10:57:14.043127 scan_bus: bus USB3 port 0 finished in 6 msecs
1331 10:57:14.046416 scan_static_bus for USB0 port 0 done
1332 10:57:14.053279 scan_bus: bus USB0 port 0 finished in 120 msecs
1333 10:57:14.056518 scan_static_bus for PCI: 00:14.0 done
1334 10:57:14.059747 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1335 10:57:14.063058 PCI: 00:14.3 scanning...
1336 10:57:14.066622 scan_static_bus for PCI: 00:14.3
1337 10:57:14.069573 GENERIC: 0.0 enabled
1338 10:57:14.073403 scan_static_bus for PCI: 00:14.3 done
1339 10:57:14.076418 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1340 10:57:14.079382 PCI: 00:15.0 scanning...
1341 10:57:14.083484 scan_static_bus for PCI: 00:15.0
1342 10:57:14.086934 I2C: 00:1a enabled
1343 10:57:14.087033 I2C: 00:31 enabled
1344 10:57:14.089969 I2C: 00:32 enabled
1345 10:57:14.093036 scan_static_bus for PCI: 00:15.0 done
1346 10:57:14.096348 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1347 10:57:14.099924 PCI: 00:15.1 scanning...
1348 10:57:14.103076 scan_static_bus for PCI: 00:15.1
1349 10:57:14.106519 I2C: 00:50 enabled
1350 10:57:14.109554 scan_static_bus for PCI: 00:15.1 done
1351 10:57:14.112970 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1352 10:57:14.116486 PCI: 00:15.3 scanning...
1353 10:57:14.119739 scan_static_bus for PCI: 00:15.3
1354 10:57:14.122903 I2C: 00:10 enabled
1355 10:57:14.126473 scan_static_bus for PCI: 00:15.3 done
1356 10:57:14.130191 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1357 10:57:14.133561 PCI: 00:19.1 scanning...
1358 10:57:14.136373 scan_static_bus for PCI: 00:19.1
1359 10:57:14.136576 I2C: 00:15 enabled
1360 10:57:14.139523 I2C: 00:2c enabled
1361 10:57:14.143939 scan_static_bus for PCI: 00:19.1 done
1362 10:57:14.149963 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1363 10:57:14.150172 PCI: 00:1e.3 scanning...
1364 10:57:14.152895 scan_generic_bus for PCI: 00:1e.3
1365 10:57:14.156402 SPI: 00 enabled
1366 10:57:14.163034 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1367 10:57:14.166233 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1368 10:57:14.169817 PCI: 00:1f.0 scanning...
1369 10:57:14.173126 scan_static_bus for PCI: 00:1f.0
1370 10:57:14.176236 PNP: 0c09.0 enabled
1371 10:57:14.176540 PNP: 0c09.0 scanning...
1372 10:57:14.179731 scan_static_bus for PNP: 0c09.0
1373 10:57:14.183162 scan_static_bus for PNP: 0c09.0 done
1374 10:57:14.189751 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1375 10:57:14.193338 scan_static_bus for PCI: 00:1f.0 done
1376 10:57:14.196470 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1377 10:57:14.199832 PCI: 00:1f.2 scanning...
1378 10:57:14.203188 scan_static_bus for PCI: 00:1f.2
1379 10:57:14.206245 GENERIC: 0.0 enabled
1380 10:57:14.206534 GENERIC: 0.0 scanning...
1381 10:57:14.209548 scan_static_bus for GENERIC: 0.0
1382 10:57:14.213397 GENERIC: 0.0 enabled
1383 10:57:14.217087 GENERIC: 1.0 enabled
1384 10:57:14.219899 scan_static_bus for GENERIC: 0.0 done
1385 10:57:14.223496 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1386 10:57:14.227032 scan_static_bus for PCI: 00:1f.2 done
1387 10:57:14.233572 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1388 10:57:14.236873 PCI: 00:1f.3 scanning...
1389 10:57:14.239955 scan_static_bus for PCI: 00:1f.3
1390 10:57:14.243598 scan_static_bus for PCI: 00:1f.3 done
1391 10:57:14.246864 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1392 10:57:14.250143 PCI: 00:1f.5 scanning...
1393 10:57:14.253286 scan_generic_bus for PCI: 00:1f.5
1394 10:57:14.256420 scan_generic_bus for PCI: 00:1f.5 done
1395 10:57:14.263238 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1396 10:57:14.266429 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1397 10:57:14.269973 scan_static_bus for Root Device done
1398 10:57:14.276508 scan_bus: bus Root Device finished in 729 msecs
1399 10:57:14.277029 done
1400 10:57:14.282990 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1401 10:57:14.286591 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1402 10:57:14.293125 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1403 10:57:14.296294 SPI flash protection: WPSW=1 SRP0=0
1404 10:57:14.302927 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1405 10:57:14.309861 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1406 10:57:14.309955 found VGA at PCI: 00:02.0
1407 10:57:14.312727 Setting up VGA for PCI: 00:02.0
1408 10:57:14.319335 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1409 10:57:14.323004 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1410 10:57:14.326648 Allocating resources...
1411 10:57:14.329817 Reading resources...
1412 10:57:14.332833 Root Device read_resources bus 0 link: 0
1413 10:57:14.336201 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1414 10:57:14.343077 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1415 10:57:14.346598 DOMAIN: 0000 read_resources bus 0 link: 0
1416 10:57:14.352721 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1417 10:57:14.359790 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1418 10:57:14.365920 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1419 10:57:14.370244 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1420 10:57:14.376107 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1421 10:57:14.382885 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1422 10:57:14.389852 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1423 10:57:14.396489 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1424 10:57:14.402863 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1425 10:57:14.409692 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1426 10:57:14.416248 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1427 10:57:14.423177 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1428 10:57:14.430040 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1429 10:57:14.436226 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1430 10:57:14.439469 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1431 10:57:14.446282 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1432 10:57:14.453714 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1433 10:57:14.459619 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1434 10:57:14.466346 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1435 10:57:14.472975 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1436 10:57:14.479478 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1437 10:57:14.483297 PCI: 00:04.0 read_resources bus 1 link: 0
1438 10:57:14.486348 PCI: 00:04.0 read_resources bus 1 link: 0 done
1439 10:57:14.493211 PCI: 00:06.0 read_resources bus 1 link: 0
1440 10:57:14.496650 PCI: 00:06.0 read_resources bus 1 link: 0 done
1441 10:57:14.499507 PCI: 00:0d.0 read_resources bus 0 link: 0
1442 10:57:14.506295 USB0 port 0 read_resources bus 0 link: 0
1443 10:57:14.509468 USB0 port 0 read_resources bus 0 link: 0 done
1444 10:57:14.513180 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1445 10:57:14.519777 PCI: 00:14.0 read_resources bus 0 link: 0
1446 10:57:14.522808 USB0 port 0 read_resources bus 0 link: 0
1447 10:57:14.526477 USB0 port 0 read_resources bus 0 link: 0 done
1448 10:57:14.532782 PCI: 00:14.0 read_resources bus 0 link: 0 done
1449 10:57:14.536585 PCI: 00:14.3 read_resources bus 0 link: 0
1450 10:57:14.539570 PCI: 00:14.3 read_resources bus 0 link: 0 done
1451 10:57:14.545990 PCI: 00:15.0 read_resources bus 0 link: 0
1452 10:57:14.549483 PCI: 00:15.0 read_resources bus 0 link: 0 done
1453 10:57:14.553097 PCI: 00:15.1 read_resources bus 0 link: 0
1454 10:57:14.559522 PCI: 00:15.1 read_resources bus 0 link: 0 done
1455 10:57:14.562653 PCI: 00:15.3 read_resources bus 0 link: 0
1456 10:57:14.569413 PCI: 00:15.3 read_resources bus 0 link: 0 done
1457 10:57:14.572592 PCI: 00:19.1 read_resources bus 0 link: 0
1458 10:57:14.576461 PCI: 00:19.1 read_resources bus 0 link: 0 done
1459 10:57:14.582677 PCI: 00:1e.3 read_resources bus 2 link: 0
1460 10:57:14.586071 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1461 10:57:14.589099 PCI: 00:1f.0 read_resources bus 0 link: 0
1462 10:57:14.596030 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1463 10:57:14.599618 PCI: 00:1f.2 read_resources bus 0 link: 0
1464 10:57:14.602785 GENERIC: 0.0 read_resources bus 0 link: 0
1465 10:57:14.609344 GENERIC: 0.0 read_resources bus 0 link: 0 done
1466 10:57:14.612796 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1467 10:57:14.619435 DOMAIN: 0000 read_resources bus 0 link: 0 done
1468 10:57:14.623094 Root Device read_resources bus 0 link: 0 done
1469 10:57:14.625822 Done reading resources.
1470 10:57:14.629262 Show resources in subtree (Root Device)...After reading.
1471 10:57:14.635785 Root Device child on link 0 CPU_CLUSTER: 0
1472 10:57:14.639444 CPU_CLUSTER: 0 child on link 0 APIC: 00
1473 10:57:14.639579 APIC: 00
1474 10:57:14.642664 APIC: 12
1475 10:57:14.642793 APIC: 14
1476 10:57:14.645813 APIC: 16
1477 10:57:14.645962 APIC: 10
1478 10:57:14.646081 APIC: 09
1479 10:57:14.649681 APIC: 08
1480 10:57:14.649843 APIC: 01
1481 10:57:14.652528 DOMAIN: 0000 child on link 0 GPIO: 0
1482 10:57:14.662383 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1483 10:57:14.672733 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1484 10:57:14.673052 GPIO: 0
1485 10:57:14.676155 PCI: 00:00.0
1486 10:57:14.686825 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 10:57:14.692915 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1488 10:57:14.703113 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1489 10:57:14.712602 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1490 10:57:14.722651 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1491 10:57:14.732540 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1492 10:57:14.743057 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1493 10:57:14.749573 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1494 10:57:14.759155 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1495 10:57:14.769716 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1496 10:57:14.779343 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1497 10:57:14.789339 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1498 10:57:14.799187 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1499 10:57:14.806053 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1500 10:57:14.815853 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1501 10:57:14.826186 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1502 10:57:14.835810 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1503 10:57:14.845697 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1504 10:57:14.855844 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1505 10:57:14.865623 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1506 10:57:14.875517 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1507 10:57:14.882336 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1508 10:57:14.891981 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1509 10:57:14.902091 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1510 10:57:14.912315 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1511 10:57:14.922110 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1512 10:57:14.932134 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1513 10:57:14.942508 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1514 10:57:14.942748 PCI: 00:02.0
1515 10:57:14.952238 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1516 10:57:14.961909 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1517 10:57:14.972447 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1518 10:57:14.975172 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1519 10:57:14.985118 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1520 10:57:14.989084 GENERIC: 0.0
1521 10:57:14.992399 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1522 10:57:15.002172 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1523 10:57:15.012110 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1524 10:57:15.018825 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1525 10:57:15.022488 PCI: 01:00.0
1526 10:57:15.032003 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1527 10:57:15.041880 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1528 10:57:15.041966 PCI: 00:08.0
1529 10:57:15.044884 PCI: 00:0a.0
1530 10:57:15.055525 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1531 10:57:15.058552 PCI: 00:0d.0 child on link 0 USB0 port 0
1532 10:57:15.068613 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1533 10:57:15.075499 USB0 port 0 child on link 0 USB3 port 0
1534 10:57:15.075597 USB3 port 0
1535 10:57:15.078513 USB3 port 1
1536 10:57:15.078612 USB3 port 2
1537 10:57:15.081656 USB3 port 3
1538 10:57:15.085083 PCI: 00:14.0 child on link 0 USB0 port 0
1539 10:57:15.095220 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1540 10:57:15.098428 USB0 port 0 child on link 0 USB2 port 0
1541 10:57:15.101866 USB2 port 0
1542 10:57:15.101953 USB2 port 1
1543 10:57:15.105285 USB2 port 2
1544 10:57:15.105369 USB2 port 3
1545 10:57:15.108610 USB2 port 4
1546 10:57:15.111578 USB2 port 5
1547 10:57:15.111661 USB2 port 6
1548 10:57:15.115250 USB2 port 7
1549 10:57:15.115375 USB2 port 8
1550 10:57:15.118528 USB2 port 9
1551 10:57:15.118610 USB3 port 0
1552 10:57:15.122360 USB3 port 1
1553 10:57:15.122443 USB3 port 2
1554 10:57:15.125286 USB3 port 3
1555 10:57:15.125365 PCI: 00:14.2
1556 10:57:15.135317 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1557 10:57:15.145633 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1558 10:57:15.152108 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1559 10:57:15.161861 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1560 10:57:15.161987 GENERIC: 0.0
1561 10:57:15.165301 PCI: 00:15.0 child on link 0 I2C: 00:1a
1562 10:57:15.175154 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 10:57:15.178776 I2C: 00:1a
1564 10:57:15.178888 I2C: 00:31
1565 10:57:15.181960 I2C: 00:32
1566 10:57:15.184978 PCI: 00:15.1 child on link 0 I2C: 00:50
1567 10:57:15.194994 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 10:57:15.198364 I2C: 00:50
1569 10:57:15.198501 PCI: 00:15.2
1570 10:57:15.201703 PCI: 00:15.3 child on link 0 I2C: 00:10
1571 10:57:15.211651 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 10:57:15.215090 I2C: 00:10
1573 10:57:15.215257 PCI: 00:16.0
1574 10:57:15.225218 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1575 10:57:15.228294 PCI: 00:19.0
1576 10:57:15.231753 PCI: 00:19.1 child on link 0 I2C: 00:15
1577 10:57:15.241496 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 10:57:15.245325 I2C: 00:15
1579 10:57:15.245436 I2C: 00:2c
1580 10:57:15.248380 PCI: 00:1e.0
1581 10:57:15.258423 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1582 10:57:15.262132 PCI: 00:1e.3 child on link 0 SPI: 00
1583 10:57:15.271745 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1584 10:57:15.271858 SPI: 00
1585 10:57:15.279763 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1586 10:57:15.284777 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1587 10:57:15.288430 PNP: 0c09.0
1588 10:57:15.298414 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1589 10:57:15.301720 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1590 10:57:15.311518 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1591 10:57:15.318227 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1592 10:57:15.324678 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1593 10:57:15.324817 GENERIC: 0.0
1594 10:57:15.328535 GENERIC: 1.0
1595 10:57:15.328629 PCI: 00:1f.3
1596 10:57:15.338113 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1597 10:57:15.351300 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1598 10:57:15.351486 PCI: 00:1f.5
1599 10:57:15.361590 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1600 10:57:15.368580 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1601 10:57:15.374942 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1602 10:57:15.382356 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1603 10:57:15.384970 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1604 10:57:15.391759 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1605 10:57:15.394848 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1606 10:57:15.401566 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1607 10:57:15.408257 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1608 10:57:15.418000 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1609 10:57:15.424863 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1610 10:57:15.431370 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1611 10:57:15.437722 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1612 10:57:15.445086 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1613 10:57:15.454628 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1614 10:57:15.455273 DOMAIN: 0000: Resource ranges:
1615 10:57:15.461700 * Base: 1000, Size: 800, Tag: 100
1616 10:57:15.464554 * Base: 1900, Size: e700, Tag: 100
1617 10:57:15.467934 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1618 10:57:15.474540 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1619 10:57:15.481225 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1620 10:57:15.491569 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1621 10:57:15.498112 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1622 10:57:15.504582 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1623 10:57:15.514884 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1624 10:57:15.521503 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1625 10:57:15.527789 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1626 10:57:15.534756 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1627 10:57:15.544565 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1628 10:57:15.551429 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1629 10:57:15.558003 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1630 10:57:15.568126 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1631 10:57:15.574224 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1632 10:57:15.581421 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1633 10:57:15.591385 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1634 10:57:15.597686 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1635 10:57:15.604228 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1636 10:57:15.614359 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1637 10:57:15.621132 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1638 10:57:15.627885 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1639 10:57:15.638114 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1640 10:57:15.643997 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1641 10:57:15.650553 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1642 10:57:15.660526 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1643 10:57:15.667501 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1644 10:57:15.674564 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1645 10:57:15.684472 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1646 10:57:15.690850 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1647 10:57:15.697370 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1648 10:57:15.707377 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1649 10:57:15.713957 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1650 10:57:15.717640 DOMAIN: 0000: Resource ranges:
1651 10:57:15.720447 * Base: 80400000, Size: 3fc00000, Tag: 200
1652 10:57:15.723767 * Base: d0000000, Size: 28000000, Tag: 200
1653 10:57:15.730637 * Base: fa000000, Size: 1000000, Tag: 200
1654 10:57:15.733770 * Base: fb001000, Size: 17ff000, Tag: 200
1655 10:57:15.737420 * Base: fe800000, Size: 300000, Tag: 200
1656 10:57:15.744232 * Base: feb80000, Size: 80000, Tag: 200
1657 10:57:15.747855 * Base: fed00000, Size: 40000, Tag: 200
1658 10:57:15.750919 * Base: fed70000, Size: 10000, Tag: 200
1659 10:57:15.753762 * Base: fed88000, Size: 8000, Tag: 200
1660 10:57:15.757025 * Base: fed93000, Size: d000, Tag: 200
1661 10:57:15.764322 * Base: feda2000, Size: 1e000, Tag: 200
1662 10:57:15.767181 * Base: fede0000, Size: 1220000, Tag: 200
1663 10:57:15.770740 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1664 10:57:15.780437 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1665 10:57:15.787580 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1666 10:57:15.794021 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1667 10:57:15.800302 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1668 10:57:15.807110 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1669 10:57:15.810460 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1670 10:57:15.817350 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1671 10:57:15.824046 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1672 10:57:15.830321 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1673 10:57:15.837116 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1674 10:57:15.844116 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1675 10:57:15.850509 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1676 10:57:15.856884 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1677 10:57:15.863706 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1678 10:57:15.870171 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1679 10:57:15.877118 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1680 10:57:15.883502 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1681 10:57:15.889961 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1682 10:57:15.896891 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1683 10:57:15.906424 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1684 10:57:15.913061 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1685 10:57:15.916424 PCI: 00:06.0: Resource ranges:
1686 10:57:15.919663 * Base: 80400000, Size: 100000, Tag: 200
1687 10:57:15.926231 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1688 10:57:15.933041 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1689 10:57:15.943176 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1690 10:57:15.949943 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1691 10:57:15.952787 Root Device assign_resources, bus 0 link: 0
1692 10:57:15.959532 DOMAIN: 0000 assign_resources, bus 0 link: 0
1693 10:57:15.966304 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1694 10:57:15.975802 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1695 10:57:15.982476 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1696 10:57:15.989009 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1697 10:57:15.995774 PCI: 00:04.0 assign_resources, bus 1 link: 0
1698 10:57:15.999232 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1699 10:57:16.009336 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1700 10:57:16.019190 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1701 10:57:16.025787 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1702 10:57:16.032295 PCI: 00:06.0 assign_resources, bus 1 link: 0
1703 10:57:16.038701 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1704 10:57:16.048734 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1705 10:57:16.052329 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1706 10:57:16.062411 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1707 10:57:16.069041 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1708 10:57:16.072074 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1709 10:57:16.078856 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1710 10:57:16.086252 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1711 10:57:16.092693 PCI: 00:14.0 assign_resources, bus 0 link: 0
1712 10:57:16.095635 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1713 10:57:16.102712 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1714 10:57:16.112405 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1715 10:57:16.119081 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1716 10:57:16.125373 PCI: 00:14.3 assign_resources, bus 0 link: 0
1717 10:57:16.128740 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1718 10:57:16.139015 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1719 10:57:16.141855 PCI: 00:15.0 assign_resources, bus 0 link: 0
1720 10:57:16.144889 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1721 10:57:16.154967 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1722 10:57:16.158625 PCI: 00:15.1 assign_resources, bus 0 link: 0
1723 10:57:16.165366 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1724 10:57:16.171615 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1725 10:57:16.178111 PCI: 00:15.3 assign_resources, bus 0 link: 0
1726 10:57:16.181817 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1727 10:57:16.187974 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1728 10:57:16.198865 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1729 10:57:16.201612 PCI: 00:19.1 assign_resources, bus 0 link: 0
1730 10:57:16.207876 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1731 10:57:16.214995 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1732 10:57:16.218191 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1733 10:57:16.224482 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1734 10:57:16.228068 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1735 10:57:16.234706 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1736 10:57:16.238252 LPC: Trying to open IO window from 800 size 1ff
1737 10:57:16.248046 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1738 10:57:16.254871 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1739 10:57:16.261589 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1740 10:57:16.268063 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1741 10:57:16.271562 Root Device assign_resources, bus 0 link: 0 done
1742 10:57:16.274956 Done setting resources.
1743 10:57:16.281052 Show resources in subtree (Root Device)...After assigning values.
1744 10:57:16.284910 Root Device child on link 0 CPU_CLUSTER: 0
1745 10:57:16.291439 CPU_CLUSTER: 0 child on link 0 APIC: 00
1746 10:57:16.291728 APIC: 00
1747 10:57:16.291932 APIC: 12
1748 10:57:16.294833 APIC: 14
1749 10:57:16.295092 APIC: 16
1750 10:57:16.298163 APIC: 10
1751 10:57:16.298419 APIC: 09
1752 10:57:16.298623 APIC: 08
1753 10:57:16.301561 APIC: 01
1754 10:57:16.305431 DOMAIN: 0000 child on link 0 GPIO: 0
1755 10:57:16.315248 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1756 10:57:16.324980 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1757 10:57:16.325254 GPIO: 0
1758 10:57:16.327737 PCI: 00:00.0
1759 10:57:16.334470 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1760 10:57:16.344281 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1761 10:57:16.354481 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1762 10:57:16.364402 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1763 10:57:16.374192 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1764 10:57:16.382006 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1765 10:57:16.391209 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1766 10:57:16.401366 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1767 10:57:16.411238 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1768 10:57:16.421004 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1769 10:57:16.431054 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1770 10:57:16.441433 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1771 10:57:16.447994 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1772 10:57:16.457407 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1773 10:57:16.468356 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1774 10:57:16.477879 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1775 10:57:16.487430 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1776 10:57:16.497486 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1777 10:57:16.507551 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1778 10:57:16.517823 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1779 10:57:16.524247 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1780 10:57:16.533939 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1781 10:57:16.543927 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1782 10:57:16.554468 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1783 10:57:16.563920 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1784 10:57:16.573847 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1785 10:57:16.583781 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1786 10:57:16.590327 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1787 10:57:16.593513 PCI: 00:02.0
1788 10:57:16.604102 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1789 10:57:16.614069 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1790 10:57:16.623517 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1791 10:57:16.626802 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1792 10:57:16.640200 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1793 10:57:16.640513 GENERIC: 0.0
1794 10:57:16.646981 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1795 10:57:16.653704 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1796 10:57:16.666903 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1797 10:57:16.676750 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1798 10:57:16.679827 PCI: 01:00.0
1799 10:57:16.689931 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1800 10:57:16.699889 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1801 10:57:16.700291 PCI: 00:08.0
1802 10:57:16.703235 PCI: 00:0a.0
1803 10:57:16.713292 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1804 10:57:16.716369 PCI: 00:0d.0 child on link 0 USB0 port 0
1805 10:57:16.726261 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1806 10:57:16.732834 USB0 port 0 child on link 0 USB3 port 0
1807 10:57:16.733307 USB3 port 0
1808 10:57:16.736003 USB3 port 1
1809 10:57:16.736386 USB3 port 2
1810 10:57:16.739534 USB3 port 3
1811 10:57:16.743007 PCI: 00:14.0 child on link 0 USB0 port 0
1812 10:57:16.752988 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1813 10:57:16.759720 USB0 port 0 child on link 0 USB2 port 0
1814 10:57:16.760106 USB2 port 0
1815 10:57:16.763045 USB2 port 1
1816 10:57:16.763459 USB2 port 2
1817 10:57:16.766234 USB2 port 3
1818 10:57:16.766545 USB2 port 4
1819 10:57:16.769828 USB2 port 5
1820 10:57:16.770130 USB2 port 6
1821 10:57:16.773383 USB2 port 7
1822 10:57:16.773679 USB2 port 8
1823 10:57:16.776266 USB2 port 9
1824 10:57:16.776741 USB3 port 0
1825 10:57:16.780065 USB3 port 1
1826 10:57:16.780362 USB3 port 2
1827 10:57:16.782704 USB3 port 3
1828 10:57:16.786409 PCI: 00:14.2
1829 10:57:16.796273 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1830 10:57:16.806193 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1831 10:57:16.809695 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1832 10:57:16.819545 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1833 10:57:16.823175 GENERIC: 0.0
1834 10:57:16.826442 PCI: 00:15.0 child on link 0 I2C: 00:1a
1835 10:57:16.836439 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1836 10:57:16.839282 I2C: 00:1a
1837 10:57:16.839681 I2C: 00:31
1838 10:57:16.842791 I2C: 00:32
1839 10:57:16.846109 PCI: 00:15.1 child on link 0 I2C: 00:50
1840 10:57:16.856174 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1841 10:57:16.856593 I2C: 00:50
1842 10:57:16.859646 PCI: 00:15.2
1843 10:57:16.862561 PCI: 00:15.3 child on link 0 I2C: 00:10
1844 10:57:16.872569 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1845 10:57:16.876400 I2C: 00:10
1846 10:57:16.876910 PCI: 00:16.0
1847 10:57:16.885663 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1848 10:57:16.889135 PCI: 00:19.0
1849 10:57:16.892402 PCI: 00:19.1 child on link 0 I2C: 00:15
1850 10:57:16.902570 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1851 10:57:16.906184 I2C: 00:15
1852 10:57:16.906590 I2C: 00:2c
1853 10:57:16.908976 PCI: 00:1e.0
1854 10:57:16.919130 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1855 10:57:16.922600 PCI: 00:1e.3 child on link 0 SPI: 00
1856 10:57:16.932885 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1857 10:57:16.935781 SPI: 00
1858 10:57:16.938972 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1859 10:57:16.949005 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1860 10:57:16.949309 PNP: 0c09.0
1861 10:57:16.958967 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1862 10:57:16.962431 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1863 10:57:16.972476 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1864 10:57:16.981847 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1865 10:57:16.985644 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1866 10:57:16.988791 GENERIC: 0.0
1867 10:57:16.988869 GENERIC: 1.0
1868 10:57:16.992056 PCI: 00:1f.3
1869 10:57:17.002058 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1870 10:57:17.011873 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1871 10:57:17.015076 PCI: 00:1f.5
1872 10:57:17.025216 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1873 10:57:17.028261 Done allocating resources.
1874 10:57:17.032098 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1875 10:57:17.039143 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1876 10:57:17.045135 Configure audio over I2S with MAX98373 NAU88L25B.
1877 10:57:17.048436 Enabling BT offload
1878 10:57:17.055396 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1879 10:57:17.058840 Enabling resources...
1880 10:57:17.062207 PCI: 00:00.0 subsystem <- 8086/4609
1881 10:57:17.065327 PCI: 00:00.0 cmd <- 06
1882 10:57:17.069089 PCI: 00:02.0 subsystem <- 8086/46b3
1883 10:57:17.072192 PCI: 00:02.0 cmd <- 03
1884 10:57:17.075629 PCI: 00:04.0 subsystem <- 8086/461d
1885 10:57:17.075891 PCI: 00:04.0 cmd <- 02
1886 10:57:17.078712 PCI: 00:06.0 bridge ctrl <- 0013
1887 10:57:17.082121 PCI: 00:06.0 subsystem <- 8086/464d
1888 10:57:17.085301 PCI: 00:06.0 cmd <- 106
1889 10:57:17.088694 PCI: 00:0a.0 subsystem <- 8086/467d
1890 10:57:17.091979 PCI: 00:0a.0 cmd <- 02
1891 10:57:17.095360 PCI: 00:0d.0 subsystem <- 8086/461e
1892 10:57:17.098904 PCI: 00:0d.0 cmd <- 02
1893 10:57:17.101859 PCI: 00:14.0 subsystem <- 8086/51ed
1894 10:57:17.105757 PCI: 00:14.0 cmd <- 02
1895 10:57:17.108832 PCI: 00:14.2 subsystem <- 8086/51ef
1896 10:57:17.109015 PCI: 00:14.2 cmd <- 02
1897 10:57:17.112051 PCI: 00:14.3 subsystem <- 8086/51f0
1898 10:57:17.115371 PCI: 00:14.3 cmd <- 02
1899 10:57:17.118841 PCI: 00:15.0 subsystem <- 8086/51e8
1900 10:57:17.121945 PCI: 00:15.0 cmd <- 02
1901 10:57:17.125264 PCI: 00:15.1 subsystem <- 8086/51e9
1902 10:57:17.128659 PCI: 00:15.1 cmd <- 06
1903 10:57:17.132247 PCI: 00:15.3 subsystem <- 8086/51eb
1904 10:57:17.135704 PCI: 00:15.3 cmd <- 02
1905 10:57:17.138625 PCI: 00:16.0 subsystem <- 8086/51e0
1906 10:57:17.138769 PCI: 00:16.0 cmd <- 02
1907 10:57:17.142174 PCI: 00:19.1 subsystem <- 8086/51c6
1908 10:57:17.145666 PCI: 00:19.1 cmd <- 02
1909 10:57:17.148714 PCI: 00:1e.0 subsystem <- 8086/51a8
1910 10:57:17.151651 PCI: 00:1e.0 cmd <- 06
1911 10:57:17.155218 PCI: 00:1e.3 subsystem <- 8086/51ab
1912 10:57:17.158749 PCI: 00:1e.3 cmd <- 02
1913 10:57:17.162203 PCI: 00:1f.0 subsystem <- 8086/5182
1914 10:57:17.165201 PCI: 00:1f.0 cmd <- 407
1915 10:57:17.168763 PCI: 00:1f.3 subsystem <- 8086/51c8
1916 10:57:17.168886 PCI: 00:1f.3 cmd <- 02
1917 10:57:17.171981 PCI: 00:1f.5 subsystem <- 8086/51a4
1918 10:57:17.175344 PCI: 00:1f.5 cmd <- 406
1919 10:57:17.178346 PCI: 01:00.0 cmd <- 02
1920 10:57:17.178430 done.
1921 10:57:17.185206 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1922 10:57:17.188622 ME: Version: Unavailable
1923 10:57:17.191622 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1924 10:57:17.195612 Initializing devices...
1925 10:57:17.198851 Root Device init
1926 10:57:17.198938 mainboard: EC init
1927 10:57:17.202173 Chrome EC: Set SMI mask to 0x0000000000000000
1928 10:57:17.205631 Chrome EC: UHEPI supported
1929 10:57:17.212246 Chrome EC: clear events_b mask to 0x0000000000000000
1930 10:57:17.218876 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1931 10:57:17.225247 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1932 10:57:17.232125 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1933 10:57:17.235328 Chrome EC: Set WAKE mask to 0x0000000000000000
1934 10:57:17.242637 Root Device init finished in 40 msecs
1935 10:57:17.242826 PCI: 00:00.0 init
1936 10:57:17.246036 CPU TDP = 15 Watts
1937 10:57:17.249894 CPU PL1 = 15 Watts
1938 10:57:17.250068 CPU PL2 = 55 Watts
1939 10:57:17.253246 CPU PL4 = 123 Watts
1940 10:57:17.256115 PCI: 00:00.0 init finished in 8 msecs
1941 10:57:17.259577 PCI: 00:02.0 init
1942 10:57:17.259717 GMA: Found VBT in CBFS
1943 10:57:17.262748 GMA: Found valid VBT in CBFS
1944 10:57:17.269396 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1945 10:57:17.275900 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1946 10:57:17.279442 PCI: 00:02.0 init finished in 18 msecs
1947 10:57:17.283229 PCI: 00:06.0 init
1948 10:57:17.285836 Initializing PCH PCIe bridge.
1949 10:57:17.289467 PCI: 00:06.0 init finished in 3 msecs
1950 10:57:17.292660 PCI: 00:0a.0 init
1951 10:57:17.296277 PCI: 00:0a.0 init finished in 0 msecs
1952 10:57:17.296391 PCI: 00:14.0 init
1953 10:57:17.299405 PCI: 00:14.0 init finished in 0 msecs
1954 10:57:17.302595 PCI: 00:14.2 init
1955 10:57:17.306503 PCI: 00:14.2 init finished in 0 msecs
1956 10:57:17.309499 PCI: 00:15.0 init
1957 10:57:17.312548 I2C bus 0 version 0x3230302a
1958 10:57:17.315958 DW I2C bus 0 at 0x80655000 (400 KHz)
1959 10:57:17.320565 PCI: 00:15.0 init finished in 6 msecs
1960 10:57:17.320671 PCI: 00:15.1 init
1961 10:57:17.322845 I2C bus 1 version 0x3230302a
1962 10:57:17.326055 DW I2C bus 1 at 0x80656000 (400 KHz)
1963 10:57:17.329417 PCI: 00:15.1 init finished in 6 msecs
1964 10:57:17.332593 PCI: 00:15.3 init
1965 10:57:17.335936 I2C bus 3 version 0x3230302a
1966 10:57:17.339156 DW I2C bus 3 at 0x80657000 (400 KHz)
1967 10:57:17.342657 PCI: 00:15.3 init finished in 6 msecs
1968 10:57:17.346341 PCI: 00:16.0 init
1969 10:57:17.349972 PCI: 00:16.0 init finished in 0 msecs
1970 10:57:17.350089 PCI: 00:19.1 init
1971 10:57:17.352783 I2C bus 5 version 0x3230302a
1972 10:57:17.355886 DW I2C bus 5 at 0x80659000 (400 KHz)
1973 10:57:17.363197 PCI: 00:19.1 init finished in 6 msecs
1974 10:57:17.363347 PCI: 00:1f.0 init
1975 10:57:17.366128 IOAPIC: Initializing IOAPIC at 0xfec00000
1976 10:57:17.369250 IOAPIC: ID = 0x02
1977 10:57:17.372571 IOAPIC: Dumping registers
1978 10:57:17.376392 reg 0x0000: 0x02000000
1979 10:57:17.376508 reg 0x0001: 0x00770020
1980 10:57:17.379398 reg 0x0002: 0x00000000
1981 10:57:17.382515 IOAPIC: 120 interrupts
1982 10:57:17.385765 IOAPIC: Clearing IOAPIC at 0xfec00000
1983 10:57:17.389366 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1984 10:57:17.396234 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1985 10:57:17.399002 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1986 10:57:17.405659 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1987 10:57:17.409169 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1988 10:57:17.415948 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1989 10:57:17.419088 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1990 10:57:17.426088 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1991 10:57:17.429170 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1992 10:57:17.432721 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1993 10:57:17.438952 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1994 10:57:17.442280 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1995 10:57:17.449097 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1996 10:57:17.452460 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1997 10:57:17.459206 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1998 10:57:17.462797 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1999 10:57:17.465884 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2000 10:57:17.472336 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2001 10:57:17.475695 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2002 10:57:17.482557 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2003 10:57:17.485908 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2004 10:57:17.492768 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2005 10:57:17.495734 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2006 10:57:17.502489 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2007 10:57:17.505503 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2008 10:57:17.508942 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2009 10:57:17.515624 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2010 10:57:17.519069 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2011 10:57:17.525454 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2012 10:57:17.528953 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2013 10:57:17.535593 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2014 10:57:17.539873 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2015 10:57:17.545650 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2016 10:57:17.548872 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2017 10:57:17.552347 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2018 10:57:17.558622 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2019 10:57:17.562372 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2020 10:57:17.568978 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2021 10:57:17.572427 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2022 10:57:17.579070 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2023 10:57:17.582293 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2024 10:57:17.588729 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2025 10:57:17.591893 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2026 10:57:17.595123 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2027 10:57:17.602152 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2028 10:57:17.605403 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2029 10:57:17.612118 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2030 10:57:17.615780 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2031 10:57:17.621905 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2032 10:57:17.625540 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2033 10:57:17.628752 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2034 10:57:17.635192 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2035 10:57:17.638451 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2036 10:57:17.646199 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2037 10:57:17.648703 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2038 10:57:17.655501 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2039 10:57:17.658541 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2040 10:57:17.665208 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2041 10:57:17.668505 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2042 10:57:17.671645 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2043 10:57:17.678888 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2044 10:57:17.681989 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2045 10:57:17.688564 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2046 10:57:17.691964 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2047 10:57:17.698335 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2048 10:57:17.702109 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2049 10:57:17.708596 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2050 10:57:17.711886 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2051 10:57:17.715515 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2052 10:57:17.721525 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2053 10:57:17.725793 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2054 10:57:17.731535 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2055 10:57:17.734890 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2056 10:57:17.741552 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2057 10:57:17.745129 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2058 10:57:17.752129 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2059 10:57:17.754906 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2060 10:57:17.758872 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2061 10:57:17.764654 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2062 10:57:17.768516 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2063 10:57:17.775317 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2064 10:57:17.778412 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2065 10:57:17.784973 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2066 10:57:17.788200 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2067 10:57:17.791558 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2068 10:57:17.798476 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2069 10:57:17.801866 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2070 10:57:17.808491 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2071 10:57:17.811621 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2072 10:57:17.818609 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2073 10:57:17.821644 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2074 10:57:17.828105 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2075 10:57:17.831545 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2076 10:57:17.834705 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2077 10:57:17.841276 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2078 10:57:17.845217 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2079 10:57:17.851299 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2080 10:57:17.855977 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2081 10:57:17.861192 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2082 10:57:17.865138 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2083 10:57:17.871526 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2084 10:57:17.874647 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2085 10:57:17.877897 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2086 10:57:17.884798 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2087 10:57:17.888410 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2088 10:57:17.895173 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2089 10:57:17.898458 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2090 10:57:17.904527 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2091 10:57:17.907978 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2092 10:57:17.911050 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2093 10:57:17.918017 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2094 10:57:17.921078 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2095 10:57:17.928120 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2096 10:57:17.931387 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2097 10:57:17.937843 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2098 10:57:17.941344 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2099 10:57:17.947932 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2100 10:57:17.951122 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2101 10:57:17.954738 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2102 10:57:17.960887 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2103 10:57:17.964356 IOAPIC: Bootstrap Processor Local APIC = 0x00
2104 10:57:17.971891 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2105 10:57:17.975012 PCI: 00:1f.0 init finished in 607 msecs
2106 10:57:17.977776 PCI: 00:1f.2 init
2107 10:57:17.977895 apm_control: Disabling ACPI.
2108 10:57:17.983710 APMC done.
2109 10:57:17.986796 PCI: 00:1f.2 init finished in 6 msecs
2110 10:57:17.990075 PCI: 00:1f.3 init
2111 10:57:17.993445 PCI: 00:1f.3 init finished in 0 msecs
2112 10:57:17.993529 PCI: 01:00.0 init
2113 10:57:17.996910 PCI: 01:00.0 init finished in 0 msecs
2114 10:57:18.000508 PNP: 0c09.0 init
2115 10:57:18.003470 Google Chrome EC uptime: 12.111 seconds
2116 10:57:18.010546 Google Chrome AP resets since EC boot: 1
2117 10:57:18.013449 Google Chrome most recent AP reset causes:
2118 10:57:18.017350 0.340: 32775 shutdown: entering G3
2119 10:57:18.023959 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2120 10:57:18.027331 PNP: 0c09.0 init finished in 23 msecs
2121 10:57:18.030487 GENERIC: 0.0 init
2122 10:57:18.033839 GENERIC: 0.0 init finished in 0 msecs
2123 10:57:18.033923 GENERIC: 1.0 init
2124 10:57:18.037228 GENERIC: 1.0 init finished in 0 msecs
2125 10:57:18.040254 Devices initialized
2126 10:57:18.043596 Show all devs... After init.
2127 10:57:18.047144 Root Device: enabled 1
2128 10:57:18.047220 CPU_CLUSTER: 0: enabled 1
2129 10:57:18.050488 DOMAIN: 0000: enabled 1
2130 10:57:18.053577 GPIO: 0: enabled 1
2131 10:57:18.053659 PCI: 00:00.0: enabled 1
2132 10:57:18.057045 PCI: 00:01.0: enabled 0
2133 10:57:18.060596 PCI: 00:01.1: enabled 0
2134 10:57:18.063521 PCI: 00:02.0: enabled 1
2135 10:57:18.063646 PCI: 00:04.0: enabled 1
2136 10:57:18.067008 PCI: 00:05.0: enabled 0
2137 10:57:18.070294 PCI: 00:06.0: enabled 1
2138 10:57:18.073943 PCI: 00:06.2: enabled 0
2139 10:57:18.074025 PCI: 00:07.0: enabled 0
2140 10:57:18.076833 PCI: 00:07.1: enabled 0
2141 10:57:18.080179 PCI: 00:07.2: enabled 0
2142 10:57:18.083504 PCI: 00:07.3: enabled 0
2143 10:57:18.083587 PCI: 00:08.0: enabled 0
2144 10:57:18.087039 PCI: 00:09.0: enabled 0
2145 10:57:18.090592 PCI: 00:0a.0: enabled 1
2146 10:57:18.093510 PCI: 00:0d.0: enabled 1
2147 10:57:18.093597 PCI: 00:0d.1: enabled 0
2148 10:57:18.096664 PCI: 00:0d.2: enabled 0
2149 10:57:18.100116 PCI: 00:0d.3: enabled 0
2150 10:57:18.100199 PCI: 00:0e.0: enabled 0
2151 10:57:18.103696 PCI: 00:10.0: enabled 0
2152 10:57:18.106562 PCI: 00:10.1: enabled 0
2153 10:57:18.110344 PCI: 00:10.6: enabled 0
2154 10:57:18.110462 PCI: 00:10.7: enabled 0
2155 10:57:18.113523 PCI: 00:12.0: enabled 0
2156 10:57:18.116898 PCI: 00:12.6: enabled 0
2157 10:57:18.120178 PCI: 00:12.7: enabled 0
2158 10:57:18.120260 PCI: 00:13.0: enabled 0
2159 10:57:18.123470 PCI: 00:14.0: enabled 1
2160 10:57:18.126928 PCI: 00:14.1: enabled 0
2161 10:57:18.130071 PCI: 00:14.2: enabled 1
2162 10:57:18.130148 PCI: 00:14.3: enabled 1
2163 10:57:18.133449 PCI: 00:15.0: enabled 1
2164 10:57:18.136815 PCI: 00:15.1: enabled 1
2165 10:57:18.136888 PCI: 00:15.2: enabled 0
2166 10:57:18.140568 PCI: 00:15.3: enabled 1
2167 10:57:18.143204 PCI: 00:16.0: enabled 1
2168 10:57:18.146999 PCI: 00:16.1: enabled 0
2169 10:57:18.147109 PCI: 00:16.2: enabled 0
2170 10:57:18.149809 PCI: 00:16.3: enabled 0
2171 10:57:18.153878 PCI: 00:16.4: enabled 0
2172 10:57:18.156199 PCI: 00:16.5: enabled 0
2173 10:57:18.156281 PCI: 00:17.0: enabled 0
2174 10:57:18.159832 PCI: 00:19.0: enabled 0
2175 10:57:18.163277 PCI: 00:19.1: enabled 1
2176 10:57:18.166322 PCI: 00:19.2: enabled 0
2177 10:57:18.166405 PCI: 00:1a.0: enabled 0
2178 10:57:18.170572 PCI: 00:1c.0: enabled 0
2179 10:57:18.173294 PCI: 00:1c.1: enabled 0
2180 10:57:18.176084 PCI: 00:1c.2: enabled 0
2181 10:57:18.176167 PCI: 00:1c.3: enabled 0
2182 10:57:18.179676 PCI: 00:1c.4: enabled 0
2183 10:57:18.183158 PCI: 00:1c.5: enabled 0
2184 10:57:18.186799 PCI: 00:1c.6: enabled 0
2185 10:57:18.186883 PCI: 00:1c.7: enabled 0
2186 10:57:18.189701 PCI: 00:1d.0: enabled 0
2187 10:57:18.193634 PCI: 00:1d.1: enabled 0
2188 10:57:18.193740 PCI: 00:1d.2: enabled 0
2189 10:57:18.196304 PCI: 00:1d.3: enabled 0
2190 10:57:18.199442 PCI: 00:1e.0: enabled 1
2191 10:57:18.202859 PCI: 00:1e.1: enabled 0
2192 10:57:18.202978 PCI: 00:1e.2: enabled 0
2193 10:57:18.206424 PCI: 00:1e.3: enabled 1
2194 10:57:18.209477 PCI: 00:1f.0: enabled 1
2195 10:57:18.213307 PCI: 00:1f.1: enabled 0
2196 10:57:18.213391 PCI: 00:1f.2: enabled 1
2197 10:57:18.216375 PCI: 00:1f.3: enabled 1
2198 10:57:18.219701 PCI: 00:1f.4: enabled 0
2199 10:57:18.222944 PCI: 00:1f.5: enabled 1
2200 10:57:18.223027 PCI: 00:1f.6: enabled 0
2201 10:57:18.226239 PCI: 00:1f.7: enabled 0
2202 10:57:18.229529 GENERIC: 0.0: enabled 1
2203 10:57:18.229613 GENERIC: 0.0: enabled 1
2204 10:57:18.232901 GENERIC: 1.0: enabled 1
2205 10:57:18.235915 GENERIC: 0.0: enabled 1
2206 10:57:18.239442 GENERIC: 1.0: enabled 1
2207 10:57:18.239526 USB0 port 0: enabled 1
2208 10:57:18.243118 USB0 port 0: enabled 1
2209 10:57:18.246182 GENERIC: 0.0: enabled 1
2210 10:57:18.249640 I2C: 00:1a: enabled 1
2211 10:57:18.249797 I2C: 00:31: enabled 1
2212 10:57:18.253095 I2C: 00:32: enabled 1
2213 10:57:18.256113 I2C: 00:50: enabled 1
2214 10:57:18.256221 I2C: 00:10: enabled 1
2215 10:57:18.259274 I2C: 00:15: enabled 1
2216 10:57:18.263151 I2C: 00:2c: enabled 1
2217 10:57:18.263255 GENERIC: 0.0: enabled 1
2218 10:57:18.266049 SPI: 00: enabled 1
2219 10:57:18.269363 PNP: 0c09.0: enabled 1
2220 10:57:18.269469 GENERIC: 0.0: enabled 1
2221 10:57:18.272584 USB3 port 0: enabled 1
2222 10:57:18.275860 USB3 port 1: enabled 0
2223 10:57:18.275942 USB3 port 2: enabled 1
2224 10:57:18.279912 USB3 port 3: enabled 0
2225 10:57:18.282779 USB2 port 0: enabled 1
2226 10:57:18.286536 USB2 port 1: enabled 0
2227 10:57:18.286616 USB2 port 2: enabled 1
2228 10:57:18.289269 USB2 port 3: enabled 0
2229 10:57:18.292541 USB2 port 4: enabled 0
2230 10:57:18.292655 USB2 port 5: enabled 1
2231 10:57:18.295962 USB2 port 6: enabled 0
2232 10:57:18.299924 USB2 port 7: enabled 0
2233 10:57:18.302780 USB2 port 8: enabled 1
2234 10:57:18.302862 USB2 port 9: enabled 1
2235 10:57:18.305983 USB3 port 0: enabled 1
2236 10:57:18.309509 USB3 port 1: enabled 0
2237 10:57:18.309621 USB3 port 2: enabled 0
2238 10:57:18.312962 USB3 port 3: enabled 0
2239 10:57:18.316168 GENERIC: 0.0: enabled 1
2240 10:57:18.316279 GENERIC: 1.0: enabled 1
2241 10:57:18.319330 APIC: 00: enabled 1
2242 10:57:18.323048 APIC: 12: enabled 1
2243 10:57:18.323133 APIC: 14: enabled 1
2244 10:57:18.326609 APIC: 16: enabled 1
2245 10:57:18.329496 APIC: 10: enabled 1
2246 10:57:18.329610 APIC: 09: enabled 1
2247 10:57:18.333651 APIC: 08: enabled 1
2248 10:57:18.333770 APIC: 01: enabled 1
2249 10:57:18.336220 PCI: 01:00.0: enabled 1
2250 10:57:18.342768 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2251 10:57:18.345973 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2252 10:57:18.349490 ELOG: NV offset 0xf20000 size 0x4000
2253 10:57:18.358114 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2254 10:57:18.364369 ELOG: Event(17) added with size 13 at 2023-10-10 10:56:55 UTC
2255 10:57:18.370963 ELOG: Event(9E) added with size 10 at 2023-10-10 10:56:55 UTC
2256 10:57:18.377853 ELOG: Event(9F) added with size 14 at 2023-10-10 10:56:55 UTC
2257 10:57:18.384673 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2258 10:57:18.390816 ELOG: Event(A0) added with size 9 at 2023-10-10 10:56:55 UTC
2259 10:57:18.394129 elog_add_boot_reason: Logged dev mode boot
2260 10:57:18.400829 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2261 10:57:18.404219 Finalize devices...
2262 10:57:18.404358 PCI: 00:16.0 final
2263 10:57:18.407407 PCI: 00:1f.2 final
2264 10:57:18.407491 GENERIC: 0.0 final
2265 10:57:18.414113 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2266 10:57:18.417102 GENERIC: 1.0 final
2267 10:57:18.423685 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2268 10:57:18.423773 Devices finalized
2269 10:57:18.430466 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2270 10:57:18.433848 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2271 10:57:18.440834 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2272 10:57:18.447472 ME: HFSTS1 : 0x90000245
2273 10:57:18.450657 ME: HFSTS2 : 0x82100116
2274 10:57:18.454278 ME: HFSTS3 : 0x00000050
2275 10:57:18.460361 ME: HFSTS4 : 0x00004000
2276 10:57:18.464287 ME: HFSTS5 : 0x00000000
2277 10:57:18.466740 ME: HFSTS6 : 0x40600006
2278 10:57:18.471266 ME: Manufacturing Mode : NO
2279 10:57:18.477301 ME: SPI Protection Mode Enabled : YES
2280 10:57:18.480140 ME: FPFs Committed : YES
2281 10:57:18.483440 ME: Manufacturing Vars Locked : YES
2282 10:57:18.486817 ME: FW Partition Table : OK
2283 10:57:18.490143 ME: Bringup Loader Failure : NO
2284 10:57:18.493292 ME: Firmware Init Complete : YES
2285 10:57:18.496574 ME: Boot Options Present : NO
2286 10:57:18.503391 ME: Update In Progress : NO
2287 10:57:18.507061 ME: D0i3 Support : YES
2288 10:57:18.510315 ME: Low Power State Enabled : NO
2289 10:57:18.513735 ME: CPU Replaced : YES
2290 10:57:18.517472 ME: CPU Replacement Valid : YES
2291 10:57:18.520487 ME: Current Working State : 5
2292 10:57:18.523607 ME: Current Operation State : 1
2293 10:57:18.526790 ME: Current Operation Mode : 0
2294 10:57:18.530210 ME: Error Code : 0
2295 10:57:18.533470 ME: Enhanced Debug Mode : NO
2296 10:57:18.540257 ME: CPU Debug Disabled : YES
2297 10:57:18.543428 ME: TXT Support : NO
2298 10:57:18.546915 ME: WP for RO is enabled : YES
2299 10:57:18.553861 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2300 10:57:18.557041 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2301 10:57:18.563585 Ramoops buffer: 0x100000@0x76899000.
2302 10:57:18.566756 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2303 10:57:18.576734 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2304 10:57:18.580541 CBFS: 'fallback/slic' not found.
2305 10:57:18.583275 ACPI: Writing ACPI tables at 7686d000.
2306 10:57:18.583360 ACPI: * FACS
2307 10:57:18.586718 ACPI: * DSDT
2308 10:57:18.593415 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2309 10:57:18.596530 ACPI: * FADT
2310 10:57:18.596727 SCI is IRQ9
2311 10:57:18.600213 ACPI: added table 1/32, length now 40
2312 10:57:18.603512 ACPI: * SSDT
2313 10:57:18.609830 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2314 10:57:18.613425 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2315 10:57:18.620272 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2316 10:57:18.623501 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2317 10:57:18.629709 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2318 10:57:18.633184 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2319 10:57:18.639991 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2320 10:57:18.646773 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2321 10:57:18.649931 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2322 10:57:18.656436 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2323 10:57:18.660383 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2324 10:57:18.666196 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2325 10:57:18.669598 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2326 10:57:18.672944 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2327 10:57:18.681221 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2328 10:57:18.684627 PS2K: Passing 80 keymaps to kernel
2329 10:57:18.691576 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2330 10:57:18.698265 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2331 10:57:18.704549 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2332 10:57:18.711388 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2333 10:57:18.718048 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2334 10:57:18.724962 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2335 10:57:18.728143 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2336 10:57:18.734579 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2337 10:57:18.741029 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2338 10:57:18.747619 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2339 10:57:18.751022 ACPI: added table 2/32, length now 44
2340 10:57:18.754078 ACPI: * MCFG
2341 10:57:18.757530 ACPI: added table 3/32, length now 48
2342 10:57:18.757617 ACPI: * TPM2
2343 10:57:18.760809 TPM2 log created at 0x7685d000
2344 10:57:18.767521 ACPI: added table 4/32, length now 52
2345 10:57:18.767603 ACPI: * LPIT
2346 10:57:18.770557 ACPI: added table 5/32, length now 56
2347 10:57:18.773970 ACPI: * MADT
2348 10:57:18.774097 SCI is IRQ9
2349 10:57:18.777576 ACPI: added table 6/32, length now 60
2350 10:57:18.780942 cmd_reg from pmc_make_ipc_cmd 1052838
2351 10:57:18.787422 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2352 10:57:18.794008 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2353 10:57:18.800905 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2354 10:57:18.804399 PMC CrashLog size in discovery mode: 0xC00
2355 10:57:18.807495 cpu crashlog bar addr: 0x80640000
2356 10:57:18.810554 cpu discovery table offset: 0x6030
2357 10:57:18.817167 cpu_crashlog_discovery_table buffer count: 0x3
2358 10:57:18.823952 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2359 10:57:18.830477 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2360 10:57:18.837830 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2361 10:57:18.840356 PMC crashLog size in discovery mode : 0xC00
2362 10:57:18.847565 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2363 10:57:18.854172 discover mode PMC crashlog size adjusted to: 0x200
2364 10:57:18.860447 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2365 10:57:18.863875 discover mode PMC crashlog size adjusted to: 0x0
2366 10:57:18.867106 m_cpu_crashLog_size : 0x3480 bytes
2367 10:57:18.871022 CPU crashLog present.
2368 10:57:18.873828 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2369 10:57:18.883751 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2370 10:57:18.883840 current = 76876550
2371 10:57:18.886931 ACPI: * DMAR
2372 10:57:18.890537 ACPI: added table 7/32, length now 64
2373 10:57:18.893644 ACPI: added table 8/32, length now 68
2374 10:57:18.893730 ACPI: * HPET
2375 10:57:18.900472 ACPI: added table 9/32, length now 72
2376 10:57:18.900559 ACPI: done.
2377 10:57:18.903832 ACPI tables: 38528 bytes.
2378 10:57:18.907763 smbios_write_tables: 76857000
2379 10:57:18.910954 EC returned error result code 3
2380 10:57:18.914338 Couldn't obtain OEM name from CBI
2381 10:57:18.917413 Create SMBIOS type 16
2382 10:57:18.920712 Create SMBIOS type 17
2383 10:57:18.920838 Create SMBIOS type 20
2384 10:57:18.923873 GENERIC: 0.0 (WIFI Device)
2385 10:57:18.927131 SMBIOS tables: 2156 bytes.
2386 10:57:18.930597 Writing table forward entry at 0x00000500
2387 10:57:18.937398 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2388 10:57:18.940557 Writing coreboot table at 0x76891000
2389 10:57:18.947216 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2390 10:57:18.950766 1. 0000000000001000-000000000009ffff: RAM
2391 10:57:18.957290 2. 00000000000a0000-00000000000fffff: RESERVED
2392 10:57:18.960608 3. 0000000000100000-0000000076856fff: RAM
2393 10:57:18.967485 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2394 10:57:18.970760 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2395 10:57:18.977157 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2396 10:57:18.984072 7. 0000000077000000-00000000803fffff: RESERVED
2397 10:57:18.987330 8. 00000000c0000000-00000000cfffffff: RESERVED
2398 10:57:18.990748 9. 00000000f8000000-00000000f9ffffff: RESERVED
2399 10:57:18.997083 10. 00000000fb000000-00000000fb000fff: RESERVED
2400 10:57:19.000596 11. 00000000fc800000-00000000fe7fffff: RESERVED
2401 10:57:19.006890 12. 00000000feb00000-00000000feb7ffff: RESERVED
2402 10:57:19.010534 13. 00000000fec00000-00000000fecfffff: RESERVED
2403 10:57:19.016818 14. 00000000fed40000-00000000fed6ffff: RESERVED
2404 10:57:19.020743 15. 00000000fed80000-00000000fed87fff: RESERVED
2405 10:57:19.027345 16. 00000000fed90000-00000000fed92fff: RESERVED
2406 10:57:19.030454 17. 00000000feda0000-00000000feda1fff: RESERVED
2407 10:57:19.033642 18. 00000000fedc0000-00000000feddffff: RESERVED
2408 10:57:19.040458 19. 0000000100000000-000000027fbfffff: RAM
2409 10:57:19.043675 Passing 4 GPIOs to payload:
2410 10:57:19.046967 NAME | PORT | POLARITY | VALUE
2411 10:57:19.053746 lid | undefined | high | high
2412 10:57:19.056821 power | undefined | high | low
2413 10:57:19.063625 oprom | undefined | high | low
2414 10:57:19.067199 EC in RW | 0x00000151 | high | high
2415 10:57:19.070250 Board ID: 3
2416 10:57:19.070334 FW config: 0x131
2417 10:57:19.076685 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum fa0c
2418 10:57:19.080465 coreboot table: 1788 bytes.
2419 10:57:19.083876 IMD ROOT 0. 0x76fff000 0x00001000
2420 10:57:19.087175 IMD SMALL 1. 0x76ffe000 0x00001000
2421 10:57:19.093483 FSP MEMORY 2. 0x76afe000 0x00500000
2422 10:57:19.097067 CONSOLE 3. 0x76ade000 0x00020000
2423 10:57:19.100594 RW MCACHE 4. 0x76add000 0x0000043c
2424 10:57:19.103601 RO MCACHE 5. 0x76adc000 0x00000fd8
2425 10:57:19.106859 FMAP 6. 0x76adb000 0x0000064a
2426 10:57:19.110453 TIME STAMP 7. 0x76ada000 0x00000910
2427 10:57:19.113736 VBOOT WORK 8. 0x76ac6000 0x00014000
2428 10:57:19.117372 MEM INFO 9. 0x76ac5000 0x000003b8
2429 10:57:19.120009 ROMSTG STCK10. 0x76ac4000 0x00001000
2430 10:57:19.127107 AFTER CAR 11. 0x76ab8000 0x0000c000
2431 10:57:19.130062 RAMSTAGE 12. 0x76a2e000 0x0008a000
2432 10:57:19.133498 ACPI BERT 13. 0x76a1e000 0x00010000
2433 10:57:19.136923 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2434 10:57:19.140095 REFCODE 15. 0x769ae000 0x0006f000
2435 10:57:19.143973 SMM BACKUP 16. 0x7699e000 0x00010000
2436 10:57:19.146798 IGD OPREGION17. 0x76999000 0x00004203
2437 10:57:19.150105 RAMOOPS 18. 0x76899000 0x00100000
2438 10:57:19.156813 COREBOOT 19. 0x76891000 0x00008000
2439 10:57:19.159981 ACPI 20. 0x7686d000 0x00024000
2440 10:57:19.163378 TPM2 TCGLOG21. 0x7685d000 0x00010000
2441 10:57:19.166774 PMC CRASHLOG22. 0x7685c000 0x00000c00
2442 10:57:19.170398 CPU CRASHLOG23. 0x76858000 0x00003480
2443 10:57:19.173404 SMBIOS 24. 0x76857000 0x00001000
2444 10:57:19.176693 IMD small region:
2445 10:57:19.180289 IMD ROOT 0. 0x76ffec00 0x00000400
2446 10:57:19.183853 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2447 10:57:19.186814 VPD 2. 0x76ffeb60 0x0000006c
2448 10:57:19.190133 POWER STATE 3. 0x76ffeb00 0x00000044
2449 10:57:19.197041 ROMSTAGE 4. 0x76ffeae0 0x00000004
2450 10:57:19.200785 ACPI GNVS 5. 0x76ffea80 0x00000048
2451 10:57:19.204138 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2452 10:57:19.210337 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2453 10:57:19.213501 MTRR: Physical address space:
2454 10:57:19.220402 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2455 10:57:19.223812 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2456 10:57:19.230020 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2457 10:57:19.236694 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2458 10:57:19.243541 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2459 10:57:19.250403 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2460 10:57:19.256865 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2461 10:57:19.260019 MTRR: Fixed MSR 0x250 0x0606060606060606
2462 10:57:19.263520 MTRR: Fixed MSR 0x258 0x0606060606060606
2463 10:57:19.270284 MTRR: Fixed MSR 0x259 0x0000000000000000
2464 10:57:19.273543 MTRR: Fixed MSR 0x268 0x0606060606060606
2465 10:57:19.276792 MTRR: Fixed MSR 0x269 0x0606060606060606
2466 10:57:19.279719 MTRR: Fixed MSR 0x26a 0x0606060606060606
2467 10:57:19.286426 MTRR: Fixed MSR 0x26b 0x0606060606060606
2468 10:57:19.289953 MTRR: Fixed MSR 0x26c 0x0606060606060606
2469 10:57:19.293125 MTRR: Fixed MSR 0x26d 0x0606060606060606
2470 10:57:19.296378 MTRR: Fixed MSR 0x26e 0x0606060606060606
2471 10:57:19.302878 MTRR: Fixed MSR 0x26f 0x0606060606060606
2472 10:57:19.306156 call enable_fixed_mtrr()
2473 10:57:19.309879 CPU physical address size: 39 bits
2474 10:57:19.312667 MTRR: default type WB/UC MTRR counts: 6/6.
2475 10:57:19.316256 MTRR: UC selected as default type.
2476 10:57:19.323308 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2477 10:57:19.329450 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2478 10:57:19.336065 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2479 10:57:19.342971 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2480 10:57:19.349440 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2481 10:57:19.356049 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2482 10:57:19.359202 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 10:57:19.362799 MTRR: Fixed MSR 0x258 0x0606060606060606
2484 10:57:19.369636 MTRR: Fixed MSR 0x259 0x0000000000000000
2485 10:57:19.372728 MTRR: Fixed MSR 0x268 0x0606060606060606
2486 10:57:19.375882 MTRR: Fixed MSR 0x269 0x0606060606060606
2487 10:57:19.379582 MTRR: Fixed MSR 0x26a 0x0606060606060606
2488 10:57:19.385873 MTRR: Fixed MSR 0x26b 0x0606060606060606
2489 10:57:19.389251 MTRR: Fixed MSR 0x26c 0x0606060606060606
2490 10:57:19.392170 MTRR: Fixed MSR 0x26d 0x0606060606060606
2491 10:57:19.395617 MTRR: Fixed MSR 0x26e 0x0606060606060606
2492 10:57:19.402151 MTRR: Fixed MSR 0x26f 0x0606060606060606
2493 10:57:19.406141 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 10:57:19.408893 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 10:57:19.412385 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 10:57:19.419374 MTRR: Fixed MSR 0x259 0x0000000000000000
2497 10:57:19.422287 MTRR: Fixed MSR 0x268 0x0606060606060606
2498 10:57:19.425900 MTRR: Fixed MSR 0x269 0x0606060606060606
2499 10:57:19.428757 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 10:57:19.432289 MTRR: Fixed MSR 0x250 0x0606060606060606
2501 10:57:19.438769 MTRR: Fixed MSR 0x250 0x0606060606060606
2502 10:57:19.442189 MTRR: Fixed MSR 0x258 0x0606060606060606
2503 10:57:19.445499 MTRR: Fixed MSR 0x259 0x0000000000000000
2504 10:57:19.448711 MTRR: Fixed MSR 0x268 0x0606060606060606
2505 10:57:19.455559 MTRR: Fixed MSR 0x269 0x0606060606060606
2506 10:57:19.458619 MTRR: Fixed MSR 0x26a 0x0606060606060606
2507 10:57:19.462271 MTRR: Fixed MSR 0x26b 0x0606060606060606
2508 10:57:19.466083 MTRR: Fixed MSR 0x26c 0x0606060606060606
2509 10:57:19.472110 MTRR: Fixed MSR 0x26d 0x0606060606060606
2510 10:57:19.475209 MTRR: Fixed MSR 0x26e 0x0606060606060606
2511 10:57:19.479251 MTRR: Fixed MSR 0x26f 0x0606060606060606
2512 10:57:19.482189 call enable_fixed_mtrr()
2513 10:57:19.485675 call enable_fixed_mtrr()
2514 10:57:19.488462 MTRR: Fixed MSR 0x258 0x0606060606060606
2515 10:57:19.492154 MTRR: Fixed MSR 0x258 0x0606060606060606
2516 10:57:19.495423 MTRR: Fixed MSR 0x26a 0x0606060606060606
2517 10:57:19.502266 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 10:57:19.505785 MTRR: Fixed MSR 0x268 0x0606060606060606
2519 10:57:19.508515 MTRR: Fixed MSR 0x269 0x0606060606060606
2520 10:57:19.511925 MTRR: Fixed MSR 0x26a 0x0606060606060606
2521 10:57:19.515068 MTRR: Fixed MSR 0x26b 0x0606060606060606
2522 10:57:19.522080 MTRR: Fixed MSR 0x26c 0x0606060606060606
2523 10:57:19.525387 MTRR: Fixed MSR 0x26d 0x0606060606060606
2524 10:57:19.528501 MTRR: Fixed MSR 0x26e 0x0606060606060606
2525 10:57:19.531801 MTRR: Fixed MSR 0x26f 0x0606060606060606
2526 10:57:19.538579 MTRR: Fixed MSR 0x258 0x0606060606060606
2527 10:57:19.541667 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 10:57:19.545156 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 10:57:19.548536 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 10:57:19.554764 MTRR: Fixed MSR 0x26a 0x0606060606060606
2531 10:57:19.558184 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 10:57:19.561763 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 10:57:19.565430 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 10:57:19.572133 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 10:57:19.574870 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 10:57:19.578097 CPU physical address size: 39 bits
2537 10:57:19.581424 call enable_fixed_mtrr()
2538 10:57:19.585093 MTRR: Fixed MSR 0x26b 0x0606060606060606
2539 10:57:19.588137 CPU physical address size: 39 bits
2540 10:57:19.591407 MTRR: Fixed MSR 0x250 0x0606060606060606
2541 10:57:19.594937 CPU physical address size: 39 bits
2542 10:57:19.598754 MTRR: Fixed MSR 0x258 0x0606060606060606
2543 10:57:19.602181 call enable_fixed_mtrr()
2544 10:57:19.605387 MTRR: Fixed MSR 0x259 0x0000000000000000
2545 10:57:19.611665 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 10:57:19.615140 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 10:57:19.618508 CPU physical address size: 39 bits
2548 10:57:19.621840 MTRR: Fixed MSR 0x259 0x0000000000000000
2549 10:57:19.625388 MTRR: Fixed MSR 0x26c 0x0606060606060606
2550 10:57:19.631971 MTRR: Fixed MSR 0x268 0x0606060606060606
2551 10:57:19.635110 MTRR: Fixed MSR 0x269 0x0606060606060606
2552 10:57:19.638298 MTRR: Fixed MSR 0x26d 0x0606060606060606
2553 10:57:19.642155 MTRR: Fixed MSR 0x26e 0x0606060606060606
2554 10:57:19.648801 MTRR: Fixed MSR 0x26f 0x0606060606060606
2555 10:57:19.651565 MTRR: Fixed MSR 0x26a 0x0606060606060606
2556 10:57:19.654912 call enable_fixed_mtrr()
2557 10:57:19.658167 MTRR: Fixed MSR 0x26b 0x0606060606060606
2558 10:57:19.661665 MTRR: Fixed MSR 0x26c 0x0606060606060606
2559 10:57:19.665541 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 10:57:19.671952 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 10:57:19.675006 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 10:57:19.678413 CPU physical address size: 39 bits
2563 10:57:19.681372 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 10:57:19.684923 call enable_fixed_mtrr()
2565 10:57:19.688724 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 10:57:19.691778 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 10:57:19.698314 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 10:57:19.701721 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 10:57:19.704636 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 10:57:19.708028 CPU physical address size: 39 bits
2571 10:57:19.711452 call enable_fixed_mtrr()
2572 10:57:19.714741 CPU physical address size: 39 bits
2573 10:57:19.714828
2574 10:57:19.719112 MTRR check
2575 10:57:19.721285 Fixed MTRRs : Enabled
2576 10:57:19.721375 Variable MTRRs: Enabled
2577 10:57:19.721461
2578 10:57:19.727883 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2579 10:57:19.731553 Checking cr50 for pending updates
2580 10:57:19.743621 Reading cr50 TPM mode
2581 10:57:19.758895 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2582 10:57:19.768677 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2583 10:57:19.772422 Checking segment from ROM address 0xf96cbe6c
2584 10:57:19.775498 Checking segment from ROM address 0xf96cbe88
2585 10:57:19.782062 Loading segment from ROM address 0xf96cbe6c
2586 10:57:19.782149 code (compression=1)
2587 10:57:19.792144 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2588 10:57:19.798570 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2589 10:57:19.801468 using LZMA
2590 10:57:19.825666 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2591 10:57:19.831522 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2592 10:57:19.839878 Loading segment from ROM address 0xf96cbe88
2593 10:57:19.842843 Entry Point 0x30000000
2594 10:57:19.842979 Loaded segments
2595 10:57:19.849590 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2596 10:57:19.855999 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2597 10:57:19.859908 Finalizing chipset.
2598 10:57:19.860043 apm_control: Finalizing SMM.
2599 10:57:19.862849 APMC done.
2600 10:57:19.866133 HECI: CSE device 16.1 is disabled
2601 10:57:19.869839 HECI: CSE device 16.2 is disabled
2602 10:57:19.872747 HECI: CSE device 16.3 is disabled
2603 10:57:19.876121 HECI: CSE device 16.4 is disabled
2604 10:57:19.879793 HECI: CSE device 16.5 is disabled
2605 10:57:19.883371 HECI: Sending End-of-Post
2606 10:57:19.891134 CSE: EOP requested action: continue boot
2607 10:57:19.894213 CSE EOP successful, continuing boot
2608 10:57:19.900926 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2609 10:57:19.904729 mp_park_aps done after 0 msecs.
2610 10:57:19.907923 Jumping to boot code at 0x30000000(0x76891000)
2611 10:57:19.917874 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2612 10:57:19.921957
2613 10:57:19.922050
2614 10:57:19.922118
2615 10:57:19.925070 Starting depthcharge on Volmar...
2616 10:57:19.925158
2617 10:57:19.925526 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2618 10:57:19.925628 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2619 10:57:19.925713 Setting prompt string to ['brya:']
2620 10:57:19.925793 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2621 10:57:19.932222 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2622 10:57:19.932314
2623 10:57:19.938531 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2624 10:57:19.938622
2625 10:57:19.945058 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2626 10:57:19.945155
2627 10:57:19.948921 configure_storage: Failed to remap 1C:2
2628 10:57:19.949045
2629 10:57:19.949112 Wipe memory regions:
2630 10:57:19.952199
2631 10:57:19.955189 [0x00000000001000, 0x000000000a0000)
2632 10:57:19.955275
2633 10:57:19.958390 [0x00000000100000, 0x00000030000000)
2634 10:57:20.068075
2635 10:57:20.071649 [0x00000032668e60, 0x00000076857000)
2636 10:57:20.223195
2637 10:57:20.226213 [0x00000100000000, 0x0000027fc00000)
2638 10:57:21.080339
2639 10:57:21.083923 ec_init: CrosEC protocol v3 supported (256, 256)
2640 10:57:21.692141
2641 10:57:21.692302 R8152: Initializing
2642 10:57:21.692404
2643 10:57:21.695963 Version 9 (ocp_data = 6010)
2644 10:57:21.696049
2645 10:57:21.699018 R8152: Done initializing
2646 10:57:21.699106
2647 10:57:21.702238 Adding net device
2648 10:57:22.003630
2649 10:57:22.006471 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2650 10:57:22.006582
2651 10:57:22.006679
2652 10:57:22.006773
2653 10:57:22.007085 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 10:57:22.107486 brya: tftpboot 192.168.201.1 11723970/tftp-deploy-5mlu1jt3/kernel/bzImage 11723970/tftp-deploy-5mlu1jt3/kernel/cmdline 11723970/tftp-deploy-5mlu1jt3/ramdisk/ramdisk.cpio.gz
2656 10:57:22.107692 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 10:57:22.107814 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2658 10:57:22.112539 tftpboot 192.168.201.1 11723970/tftp-deploy-5mlu1jt3/kernel/bzIeploy-5mlu1jt3/kernel/cmdline 11723970/tftp-deploy-5mlu1jt3/ramdisk/ramdisk.cpio.gz
2659 10:57:22.112693
2660 10:57:22.112823 Waiting for link
2661 10:57:22.315170
2662 10:57:22.315346 done.
2663 10:57:22.315453
2664 10:57:22.315556 MAC: 00:e0:4c:68:01:8f
2665 10:57:22.315650
2666 10:57:22.318107 Sending DHCP discover... done.
2667 10:57:22.318195
2668 10:57:22.321427 Waiting for reply... done.
2669 10:57:22.321512
2670 10:57:22.324881 Sending DHCP request... done.
2671 10:57:22.324988
2672 10:57:22.354878 Waiting for reply... done.
2673 10:57:22.355012
2674 10:57:22.355080 My ip is 192.168.201.28
2675 10:57:22.355149
2676 10:57:22.358617 The DHCP server ip is 192.168.201.1
2677 10:57:22.361780
2678 10:57:22.365149 TFTP server IP predefined by user: 192.168.201.1
2679 10:57:22.365241
2680 10:57:22.371881 Bootfile predefined by user: 11723970/tftp-deploy-5mlu1jt3/kernel/bzImage
2681 10:57:22.371977
2682 10:57:22.374615 Sending tftp read request... done.
2683 10:57:22.374736
2684 10:57:22.377932 Waiting for the transfer...
2685 10:57:22.378047
2686 10:57:22.620634 00000000 ################################################################
2687 10:57:22.620808
2688 10:57:22.864685 00080000 ################################################################
2689 10:57:22.864878
2690 10:57:23.106125 00100000 ################################################################
2691 10:57:23.106313
2692 10:57:23.352002 00180000 ################################################################
2693 10:57:23.352147
2694 10:57:23.602315 00200000 ################################################################
2695 10:57:23.602464
2696 10:57:23.858462 00280000 ################################################################
2697 10:57:23.858605
2698 10:57:24.118987 00300000 ################################################################
2699 10:57:24.119137
2700 10:57:24.385279 00380000 ################################################################
2701 10:57:24.385435
2702 10:57:24.643289 00400000 ################################################################
2703 10:57:24.643452
2704 10:57:24.911458 00480000 ################################################################
2705 10:57:24.911593
2706 10:57:25.193226 00500000 ################################################################
2707 10:57:25.193384
2708 10:57:25.455998 00580000 ################################################################
2709 10:57:25.456175
2710 10:57:25.718428 00600000 ################################################################
2711 10:57:25.718573
2712 10:57:25.987219 00680000 ################################################################
2713 10:57:25.987367
2714 10:57:26.259456 00700000 ################################################################
2715 10:57:26.259634
2716 10:57:26.533580 00780000 ################################################################
2717 10:57:26.533725
2718 10:57:26.788596 00800000 ################################################################
2719 10:57:26.788746
2720 10:57:27.041785 00880000 ################################################################
2721 10:57:27.041965
2722 10:57:27.298848 00900000 ################################################################
2723 10:57:27.299004
2724 10:57:27.552182 00980000 ################################################################
2725 10:57:27.552317
2726 10:57:27.813738 00a00000 ################################################################
2727 10:57:27.813886
2728 10:57:28.070697 00a80000 ################################################################
2729 10:57:28.070834
2730 10:57:28.321131 00b00000 ################################################################
2731 10:57:28.321289
2732 10:57:28.572764 00b80000 ################################################################
2733 10:57:28.572965
2734 10:57:28.830026 00c00000 ################################################################
2735 10:57:28.830203
2736 10:57:29.086170 00c80000 ################################################################
2737 10:57:29.086321
2738 10:57:29.283169 00d00000 ################################################ done.
2739 10:57:29.283314
2740 10:57:29.286506 The bootfile was 14016544 bytes long.
2741 10:57:29.286584
2742 10:57:29.289635 Sending tftp read request... done.
2743 10:57:29.289718
2744 10:57:29.292841 Waiting for the transfer...
2745 10:57:29.292992
2746 10:57:29.573027 00000000 ################################################################
2747 10:57:29.573181
2748 10:57:29.826298 00080000 ################################################################
2749 10:57:29.826448
2750 10:57:30.079672 00100000 ################################################################
2751 10:57:30.079821
2752 10:57:30.331964 00180000 ################################################################
2753 10:57:30.332108
2754 10:57:30.581033 00200000 ################################################################
2755 10:57:30.581166
2756 10:57:30.878070 00280000 ################################################################
2757 10:57:30.878223
2758 10:57:31.130960 00300000 ################################################################
2759 10:57:31.131110
2760 10:57:31.431643 00380000 ################################################################
2761 10:57:31.431793
2762 10:57:31.683195 00400000 ################################################################
2763 10:57:31.683339
2764 10:57:31.934791 00480000 ################################################################
2765 10:57:31.934934
2766 10:57:32.223765 00500000 ################################################################
2767 10:57:32.223908
2768 10:57:32.473542 00580000 ################################################################
2769 10:57:32.473690
2770 10:57:32.726316 00600000 ################################################################
2771 10:57:32.726458
2772 10:57:32.980207 00680000 ################################################################
2773 10:57:32.980346
2774 10:57:33.230525 00700000 ################################################################
2775 10:57:33.230668
2776 10:57:33.488195 00780000 ################################################################
2777 10:57:33.488334
2778 10:57:33.747434 00800000 ################################################################
2779 10:57:33.747567
2780 10:57:33.915017 00880000 ############################################ done.
2781 10:57:33.915169
2782 10:57:33.918363 Sending tftp read request... done.
2783 10:57:33.918454
2784 10:57:33.921993 Waiting for the transfer...
2785 10:57:33.922070
2786 10:57:33.924833 00000000 # done.
2787 10:57:33.924939
2788 10:57:33.931806 Command line loaded dynamically from TFTP file: 11723970/tftp-deploy-5mlu1jt3/kernel/cmdline
2789 10:57:33.935231
2790 10:57:33.948143 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2791 10:57:33.955281
2792 10:57:33.958444 Shutting down all USB controllers.
2793 10:57:33.958626
2794 10:57:33.958741 Removing current net device
2795 10:57:33.958891
2796 10:57:33.961846 Finalizing coreboot
2797 10:57:33.961999
2798 10:57:33.968337 Exiting depthcharge with code 4 at timestamp: 24309951
2799 10:57:33.968535
2800 10:57:33.968675
2801 10:57:33.968819 Starting kernel ...
2802 10:57:33.969005
2803 10:57:33.969131
2804 10:57:33.969751 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2805 10:57:33.969953 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2806 10:57:33.970106 Setting prompt string to ['Linux version [0-9]']
2807 10:57:33.970248 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2808 10:57:33.970394 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2810 11:02:00.970918 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2812 11:02:00.971999 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2814 11:02:00.972862 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2817 11:02:00.974266 end: 2 depthcharge-action (duration 00:05:00) [common]
2819 11:02:00.975436 Cleaning after the job
2820 11:02:00.975902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/ramdisk
2821 11:02:00.981518 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/kernel
2822 11:02:00.989546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11723970/tftp-deploy-5mlu1jt3/modules
2823 11:02:00.992373 start: 5.1 power-off (timeout 00:00:30) [common]
2824 11:02:00.993353 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
2825 11:02:01.114824 >> Command sent successfully.
2826 11:02:01.125101 Returned 0 in 0 seconds
2827 11:02:01.226319 end: 5.1 power-off (duration 00:00:00) [common]
2829 11:02:01.227798 start: 5.2 read-feedback (timeout 00:10:00) [common]
2830 11:02:01.229117 Listened to connection for namespace 'common' for up to 1s
2832 11:02:01.230485 Listened to connection for namespace 'common' for up to 1s
2833 11:02:02.229257 Finalising connection for namespace 'common'
2834 11:02:02.229885 Disconnecting from shell: Finalise
2835 11:02:02.230344
2836 11:02:02.331407 end: 5.2 read-feedback (duration 00:00:01) [common]
2837 11:02:02.332108 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11723970
2838 11:02:02.383674 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11723970
2839 11:02:02.383924 JobError: Your job cannot terminate cleanly.