Boot log: acer-cbv514-1h-34uz-brya

    1 13:08:16.172801  lava-dispatcher, installed at version: 2023.08
    2 13:08:16.173018  start: 0 validate
    3 13:08:16.173147  Start time: 2023-10-10 13:08:16.173137+00:00 (UTC)
    4 13:08:16.173260  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:08:16.173391  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 13:08:16.176303  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:08:16.176424  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.194-557-g2932db67f070a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:08:31.684511  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:08:31.685277  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.194-557-g2932db67f070a%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:08:32.192456  validate duration: 16.02
   12 13:08:32.192729  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:08:32.192833  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:08:32.192920  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:08:32.193039  Not decompressing ramdisk as can be used compressed.
   16 13:08:32.193125  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 13:08:32.193189  saving as /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/ramdisk/rootfs.cpio.gz
   18 13:08:32.193253  total size: 8418130 (8 MB)
   19 13:08:32.194557  progress   0 % (0 MB)
   20 13:08:32.196940  progress   5 % (0 MB)
   21 13:08:32.199220  progress  10 % (0 MB)
   22 13:08:32.201513  progress  15 % (1 MB)
   23 13:08:32.203843  progress  20 % (1 MB)
   24 13:08:32.206083  progress  25 % (2 MB)
   25 13:08:32.208519  progress  30 % (2 MB)
   26 13:08:32.210695  progress  35 % (2 MB)
   27 13:08:32.212954  progress  40 % (3 MB)
   28 13:08:32.215256  progress  45 % (3 MB)
   29 13:08:32.217518  progress  50 % (4 MB)
   30 13:08:32.219798  progress  55 % (4 MB)
   31 13:08:32.222060  progress  60 % (4 MB)
   32 13:08:32.224146  progress  65 % (5 MB)
   33 13:08:32.226352  progress  70 % (5 MB)
   34 13:08:32.228604  progress  75 % (6 MB)
   35 13:08:32.230850  progress  80 % (6 MB)
   36 13:08:32.233049  progress  85 % (6 MB)
   37 13:08:32.235294  progress  90 % (7 MB)
   38 13:08:32.237492  progress  95 % (7 MB)
   39 13:08:32.239556  progress 100 % (8 MB)
   40 13:08:32.239790  8 MB downloaded in 0.05 s (172.51 MB/s)
   41 13:08:32.239951  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 13:08:32.240192  end: 1.1 download-retry (duration 00:00:00) [common]
   44 13:08:32.240280  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 13:08:32.240368  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 13:08:32.240509  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.194-557-g2932db67f070a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 13:08:32.240583  saving as /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/kernel/bzImage
   48 13:08:32.240644  total size: 14016512 (13 MB)
   49 13:08:32.240705  No compression specified
   50 13:08:32.242055  progress   0 % (0 MB)
   51 13:08:32.245736  progress   5 % (0 MB)
   52 13:08:32.249352  progress  10 % (1 MB)
   53 13:08:32.253135  progress  15 % (2 MB)
   54 13:08:32.256752  progress  20 % (2 MB)
   55 13:08:32.260392  progress  25 % (3 MB)
   56 13:08:32.264242  progress  30 % (4 MB)
   57 13:08:32.267892  progress  35 % (4 MB)
   58 13:08:32.271759  progress  40 % (5 MB)
   59 13:08:32.275395  progress  45 % (6 MB)
   60 13:08:32.279007  progress  50 % (6 MB)
   61 13:08:32.282849  progress  55 % (7 MB)
   62 13:08:32.286509  progress  60 % (8 MB)
   63 13:08:32.290459  progress  65 % (8 MB)
   64 13:08:32.294106  progress  70 % (9 MB)
   65 13:08:32.297721  progress  75 % (10 MB)
   66 13:08:32.301455  progress  80 % (10 MB)
   67 13:08:32.305079  progress  85 % (11 MB)
   68 13:08:32.308665  progress  90 % (12 MB)
   69 13:08:32.312380  progress  95 % (12 MB)
   70 13:08:32.315975  progress 100 % (13 MB)
   71 13:08:32.316189  13 MB downloaded in 0.08 s (176.95 MB/s)
   72 13:08:32.316342  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:08:32.316568  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:08:32.316654  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 13:08:32.316743  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 13:08:32.316864  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.194-557-g2932db67f070a/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 13:08:32.316940  saving as /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/modules/modules.tar
   79 13:08:32.317002  total size: 527952 (0 MB)
   80 13:08:32.317065  Using unxz to decompress xz
   81 13:08:32.321328  progress   6 % (0 MB)
   82 13:08:32.321735  progress  12 % (0 MB)
   83 13:08:32.321980  progress  18 % (0 MB)
   84 13:08:32.323663  progress  24 % (0 MB)
   85 13:08:32.325623  progress  31 % (0 MB)
   86 13:08:32.327628  progress  37 % (0 MB)
   87 13:08:32.329666  progress  43 % (0 MB)
   88 13:08:32.331757  progress  49 % (0 MB)
   89 13:08:32.333705  progress  55 % (0 MB)
   90 13:08:32.335707  progress  62 % (0 MB)
   91 13:08:32.337664  progress  68 % (0 MB)
   92 13:08:32.339713  progress  74 % (0 MB)
   93 13:08:32.341883  progress  80 % (0 MB)
   94 13:08:32.343860  progress  86 % (0 MB)
   95 13:08:32.345677  progress  93 % (0 MB)
   96 13:08:32.348151  progress  99 % (0 MB)
   97 13:08:32.354781  0 MB downloaded in 0.04 s (13.33 MB/s)
   98 13:08:32.355022  end: 1.3.1 http-download (duration 00:00:00) [common]
  100 13:08:32.355284  end: 1.3 download-retry (duration 00:00:00) [common]
  101 13:08:32.355379  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  102 13:08:32.355475  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  103 13:08:32.355557  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  104 13:08:32.355641  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  105 13:08:32.355865  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p
  106 13:08:32.356001  makedir: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin
  107 13:08:32.356109  makedir: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/tests
  108 13:08:32.356210  makedir: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/results
  109 13:08:32.356331  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-add-keys
  110 13:08:32.356482  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-add-sources
  111 13:08:32.356613  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-background-process-start
  112 13:08:32.356745  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-background-process-stop
  113 13:08:32.356877  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-common-functions
  114 13:08:32.357004  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-echo-ipv4
  115 13:08:32.357137  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-install-packages
  116 13:08:32.357263  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-installed-packages
  117 13:08:32.357392  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-os-build
  118 13:08:32.357519  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-probe-channel
  119 13:08:32.357645  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-probe-ip
  120 13:08:32.357774  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-target-ip
  121 13:08:32.357900  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-target-mac
  122 13:08:32.358025  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-target-storage
  123 13:08:32.358156  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-case
  124 13:08:32.358283  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-event
  125 13:08:32.358410  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-feedback
  126 13:08:32.358536  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-raise
  127 13:08:32.358707  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-reference
  128 13:08:32.358836  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-runner
  129 13:08:32.358963  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-set
  130 13:08:32.359091  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-test-shell
  131 13:08:32.359220  Updating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-install-packages (oe)
  132 13:08:32.359384  Updating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/bin/lava-installed-packages (oe)
  133 13:08:32.359509  Creating /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/environment
  134 13:08:32.359615  LAVA metadata
  135 13:08:32.359691  - LAVA_JOB_ID=11725036
  136 13:08:32.359754  - LAVA_DISPATCHER_IP=192.168.201.1
  137 13:08:32.359857  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  138 13:08:32.359927  skipped lava-vland-overlay
  139 13:08:32.360005  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  140 13:08:32.360085  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  141 13:08:32.360147  skipped lava-multinode-overlay
  142 13:08:32.360220  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  143 13:08:32.360299  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  144 13:08:32.360372  Loading test definitions
  145 13:08:32.360464  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  146 13:08:32.360542  Using /lava-11725036 at stage 0
  147 13:08:32.360864  uuid=11725036_1.4.2.3.1 testdef=None
  148 13:08:32.360953  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  149 13:08:32.361041  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  150 13:08:32.361587  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  152 13:08:32.361806  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  153 13:08:32.362448  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  155 13:08:32.362750  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  156 13:08:32.363371  runner path: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/0/tests/0_dmesg test_uuid 11725036_1.4.2.3.1
  157 13:08:32.363529  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  159 13:08:32.363759  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  160 13:08:32.363831  Using /lava-11725036 at stage 1
  161 13:08:32.364133  uuid=11725036_1.4.2.3.5 testdef=None
  162 13:08:32.364222  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  163 13:08:32.364305  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  164 13:08:32.364775  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  166 13:08:32.364989  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  167 13:08:32.365633  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  169 13:08:32.365858  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  170 13:08:32.366491  runner path: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/1/tests/1_bootrr test_uuid 11725036_1.4.2.3.5
  171 13:08:32.366687  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  173 13:08:32.366895  Creating lava-test-runner.conf files
  174 13:08:32.366959  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/0 for stage 0
  175 13:08:32.367048  - 0_dmesg
  176 13:08:32.367128  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11725036/lava-overlay-w4dgyk8p/lava-11725036/1 for stage 1
  177 13:08:32.367221  - 1_bootrr
  178 13:08:32.367317  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  179 13:08:32.367402  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  180 13:08:32.375973  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  181 13:08:32.376088  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  182 13:08:32.376177  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  183 13:08:32.376262  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  184 13:08:32.376350  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  185 13:08:32.628188  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  186 13:08:32.628568  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  187 13:08:32.628686  extracting modules file /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11725036/extract-overlay-ramdisk-wb5qay0x/ramdisk
  188 13:08:32.654061  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  189 13:08:32.654230  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  190 13:08:32.654328  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11725036/compress-overlay-shieq_ef/overlay-1.4.2.4.tar.gz to ramdisk
  191 13:08:32.654400  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11725036/compress-overlay-shieq_ef/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11725036/extract-overlay-ramdisk-wb5qay0x/ramdisk
  192 13:08:32.663008  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  193 13:08:32.663142  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  194 13:08:32.663237  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  195 13:08:32.663324  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  196 13:08:32.663404  Building ramdisk /var/lib/lava/dispatcher/tmp/11725036/extract-overlay-ramdisk-wb5qay0x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11725036/extract-overlay-ramdisk-wb5qay0x/ramdisk
  197 13:08:32.814990  >> 54147 blocks

  198 13:08:33.718231  rename /var/lib/lava/dispatcher/tmp/11725036/extract-overlay-ramdisk-wb5qay0x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/ramdisk/ramdisk.cpio.gz
  199 13:08:33.718712  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  200 13:08:33.718840  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  201 13:08:33.718943  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  202 13:08:33.719041  No mkimage arch provided, not using FIT.
  203 13:08:33.719132  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  204 13:08:33.719215  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  205 13:08:33.719325  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  206 13:08:33.719419  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  207 13:08:33.719503  No LXC device requested
  208 13:08:33.719583  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  209 13:08:33.719672  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  210 13:08:33.719753  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  211 13:08:33.719827  Checking files for TFTP limit of 4294967296 bytes.
  212 13:08:33.720236  end: 1 tftp-deploy (duration 00:00:02) [common]
  213 13:08:33.720341  start: 2 depthcharge-action (timeout 00:05:00) [common]
  214 13:08:33.720432  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  215 13:08:33.720559  substitutions:
  216 13:08:33.720628  - {DTB}: None
  217 13:08:33.720690  - {INITRD}: 11725036/tftp-deploy-rffcpgs5/ramdisk/ramdisk.cpio.gz
  218 13:08:33.720749  - {KERNEL}: 11725036/tftp-deploy-rffcpgs5/kernel/bzImage
  219 13:08:33.720808  - {LAVA_MAC}: None
  220 13:08:33.720867  - {PRESEED_CONFIG}: None
  221 13:08:33.720922  - {PRESEED_LOCAL}: None
  222 13:08:33.720977  - {RAMDISK}: 11725036/tftp-deploy-rffcpgs5/ramdisk/ramdisk.cpio.gz
  223 13:08:33.721033  - {ROOT_PART}: None
  224 13:08:33.721088  - {ROOT}: None
  225 13:08:33.721141  - {SERVER_IP}: 192.168.201.1
  226 13:08:33.721195  - {TEE}: None
  227 13:08:33.721249  Parsed boot commands:
  228 13:08:33.721303  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  229 13:08:33.721479  Parsed boot commands: tftpboot 192.168.201.1 11725036/tftp-deploy-rffcpgs5/kernel/bzImage 11725036/tftp-deploy-rffcpgs5/kernel/cmdline 11725036/tftp-deploy-rffcpgs5/ramdisk/ramdisk.cpio.gz
  230 13:08:33.721567  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  231 13:08:33.721655  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  232 13:08:33.721747  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  233 13:08:33.721831  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  234 13:08:33.721901  Not connected, no need to disconnect.
  235 13:08:33.721975  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  236 13:08:33.722058  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  237 13:08:33.722125  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
  238 13:08:33.725944  Setting prompt string to ['lava-test: # ']
  239 13:08:33.726307  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  240 13:08:33.726419  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  241 13:08:33.726520  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  242 13:08:33.726636  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  243 13:08:33.726909  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
  244 13:08:38.861213  >> Command sent successfully.

  245 13:08:38.863601  Returned 0 in 5 seconds
  246 13:08:38.963977  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  248 13:08:38.964311  end: 2.2.2 reset-device (duration 00:00:05) [common]
  249 13:08:38.964410  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  250 13:08:38.964496  Setting prompt string to 'Starting depthcharge on Volmar...'
  251 13:08:38.964562  Changing prompt to 'Starting depthcharge on Volmar...'
  252 13:08:38.964627  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  253 13:08:38.964882  [Enter `^Ec?' for help]

  254 13:08:40.343336  

  255 13:08:40.343496  

  256 13:08:40.349943  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  257 13:08:40.353352  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  258 13:08:40.360457  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  259 13:08:40.363502  CPU: AES supported, TXT NOT supported, VT supported

  260 13:08:40.370985  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  261 13:08:40.374955  Cache size = 10 MiB

  262 13:08:40.377924  MCH: device id 4609 (rev 04) is Alderlake-P

  263 13:08:40.385109  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  264 13:08:40.388795  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  265 13:08:40.391979  VBOOT: Loading verstage.

  266 13:08:40.396199  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  267 13:08:40.399500  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  268 13:08:40.405950  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  269 13:08:40.412558  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  270 13:08:40.419313  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  271 13:08:40.424167  

  272 13:08:40.424251  

  273 13:08:40.431365  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  274 13:08:40.438080  Probing TPM I2C: I2C bus 1 version 0x3230302a

  275 13:08:40.442376  DW I2C bus 1 at 0xfe022000 (400 KHz)

  276 13:08:40.445353  I2C TX abort detected (00000001)

  277 13:08:40.448991  cr50_i2c_read: Address write failed

  278 13:08:40.459563  .done! DID_VID 0x00281ae0

  279 13:08:40.462800  TPM ready after 0 ms

  280 13:08:40.466254  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  281 13:08:40.479959  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  282 13:08:40.483531  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  283 13:08:40.537983  tlcl_send_startup: Startup return code is 0

  284 13:08:40.538118  TPM: setup succeeded

  285 13:08:40.559829  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  286 13:08:40.582515  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  287 13:08:40.586571  Chrome EC: UHEPI supported

  288 13:08:40.589758  Reading cr50 boot mode

  289 13:08:40.604469  Cr50 says boot_mode is VERIFIED_RW(0x00).

  290 13:08:40.604570  Phase 1

  291 13:08:40.611252  FMAP: area GBB found @ 1805000 (458752 bytes)

  292 13:08:40.618064  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  293 13:08:40.624601  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  294 13:08:40.631215  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  295 13:08:40.631305  Phase 2

  296 13:08:40.634866  Phase 3

  297 13:08:40.637841  FMAP: area GBB found @ 1805000 (458752 bytes)

  298 13:08:40.644565  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  299 13:08:40.648380  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  300 13:08:40.655154  VB2:vb2_verify_keyblock() Checking keyblock signature...

  301 13:08:40.661785  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  302 13:08:40.668488  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  303 13:08:40.675020  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  304 13:08:40.689805  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  305 13:08:40.693014  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  306 13:08:40.699777  VB2:vb2_verify_fw_preamble() Verifying preamble.

  307 13:08:40.706417  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  308 13:08:40.713145  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  309 13:08:40.719713  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  310 13:08:40.723538  Phase 4

  311 13:08:40.726902  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  312 13:08:40.733488  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  313 13:08:40.946401  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  314 13:08:40.952709  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  315 13:08:40.956287  Saving vboot hash.

  316 13:08:40.963075  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  317 13:08:40.978538  tlcl_extend: response is 0

  318 13:08:40.985539  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  319 13:08:40.988818  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  320 13:08:41.006567  tlcl_extend: response is 0

  321 13:08:41.013982  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  322 13:08:41.032826  tlcl_lock_nv_write: response is 0

  323 13:08:41.052240  tlcl_lock_nv_write: response is 0

  324 13:08:41.052386  Slot A is selected

  325 13:08:41.058740  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  326 13:08:41.065891  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  327 13:08:41.072485  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  328 13:08:41.079261  BS: verstage times (exec / console): total (unknown) / 264 ms

  329 13:08:41.079382  

  330 13:08:41.079454  

  331 13:08:41.085660  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  332 13:08:41.089212  Google Chrome EC: version:

  333 13:08:41.092734  	ro: volmar_v2.0.14126-e605144e9c

  334 13:08:41.095960  	rw: volmar_v0.0.55-22d1557

  335 13:08:41.099519    running image: 2

  336 13:08:41.103023  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  337 13:08:41.112918  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  338 13:08:41.119485  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  339 13:08:41.126014  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  340 13:08:41.136129  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  341 13:08:41.146069  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  342 13:08:41.149846  EC took 941us to calculate image hash

  343 13:08:41.159725  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  344 13:08:41.162962  VB2:sync_ec() select_rw=RW(active)

  345 13:08:41.174785  Waited 615us to clear limit power flag.

  346 13:08:41.178160  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  347 13:08:41.181287  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  348 13:08:41.184613  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  349 13:08:41.191302  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  350 13:08:41.194914  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  351 13:08:41.198061  TCO_STS:   0000 0000

  352 13:08:41.201083  GEN_PMCON: d0015038 00002200

  353 13:08:41.204409  GBLRST_CAUSE: 00000000 00000000

  354 13:08:41.204501  HPR_CAUSE0: 00000000

  355 13:08:41.207809  prev_sleep_state 5

  356 13:08:41.211176  Abort disabling TXT, as CPU is not TXT capable.

  357 13:08:41.219319  cse_lite: Number of partitions = 3

  358 13:08:41.222440  cse_lite: Current partition = RO

  359 13:08:41.222542  cse_lite: Next partition = RO

  360 13:08:41.225764  cse_lite: Flags = 0x7

  361 13:08:41.232542  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  362 13:08:41.242527  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  363 13:08:41.245864  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  364 13:08:41.252396  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  365 13:08:41.259556  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  366 13:08:41.266210  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  367 13:08:41.269631  cse_lite: CSE CBFS RW version : 16.1.25.2049

  368 13:08:41.272698  cse_lite: Set Boot Partition Info Command (RW)

  369 13:08:41.280992  HECI: Global Reset(Type:1) Command

  370 13:08:42.692209  

  371 13:08:42.692710  

  372 13:08:42.699094  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  373 13:08:42.702990  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  374 13:08:42.710285  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  375 13:08:42.713168  CPU: AES supported, TXT NOT supported, VT supported

  376 13:08:42.723003  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  377 13:08:42.723507  Cache size = 10 MiB

  378 13:08:42.726241  MCH: device id 4609 (rev 04) is Alderlake-P

  379 13:08:42.733359  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  380 13:08:42.736673  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  381 13:08:42.740696  VBOOT: Loading verstage.

  382 13:08:42.743906  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  383 13:08:42.751451  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  384 13:08:42.754523  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  385 13:08:42.761922  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  386 13:08:42.771994  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  387 13:08:42.772497  

  388 13:08:42.772838  

  389 13:08:42.778395  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  390 13:08:42.786780  Probing TPM I2C: I2C bus 1 version 0x3230302a

  391 13:08:42.790154  DW I2C bus 1 at 0xfe022000 (400 KHz)

  392 13:08:42.793177  done! DID_VID 0x00281ae0

  393 13:08:42.796526  TPM ready after 0 ms

  394 13:08:42.800201  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  395 13:08:42.809426  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  396 13:08:42.816426  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  397 13:08:42.871412  tlcl_send_startup: Startup return code is 0

  398 13:08:42.871904  TPM: setup succeeded

  399 13:08:42.893123  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  400 13:08:42.915105  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  401 13:08:42.918470  Chrome EC: UHEPI supported

  402 13:08:42.922136  Reading cr50 boot mode

  403 13:08:42.936834  Cr50 says boot_mode is VERIFIED_RW(0x00).

  404 13:08:42.937350  Phase 1

  405 13:08:42.943889  FMAP: area GBB found @ 1805000 (458752 bytes)

  406 13:08:42.950112  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  407 13:08:42.956956  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  408 13:08:42.963637  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  409 13:08:42.964073  Phase 2

  410 13:08:42.967091  Phase 3

  411 13:08:42.970433  FMAP: area GBB found @ 1805000 (458752 bytes)

  412 13:08:42.976740  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  413 13:08:42.980468  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  414 13:08:42.987140  VB2:vb2_verify_keyblock() Checking keyblock signature...

  415 13:08:42.993494  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  416 13:08:43.000277  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  417 13:08:43.007228  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  418 13:08:43.022223  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  419 13:08:43.025515  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  420 13:08:43.032191  VB2:vb2_verify_fw_preamble() Verifying preamble.

  421 13:08:43.038418  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  422 13:08:43.045486  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  423 13:08:43.051979  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  424 13:08:43.056022  Phase 4

  425 13:08:43.059141  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  426 13:08:43.065773  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  427 13:08:43.278707  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  428 13:08:43.285269  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  429 13:08:43.288618  Saving vboot hash.

  430 13:08:43.295524  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  431 13:08:43.310853  tlcl_extend: response is 0

  432 13:08:43.317575  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  433 13:08:43.321366  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  434 13:08:43.338779  tlcl_extend: response is 0

  435 13:08:43.345192  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  436 13:08:43.365101  tlcl_lock_nv_write: response is 0

  437 13:08:43.384174  tlcl_lock_nv_write: response is 0

  438 13:08:43.384635  Slot A is selected

  439 13:08:43.390753  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  440 13:08:43.397958  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  441 13:08:43.404096  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  442 13:08:43.410793  BS: verstage times (exec / console): total (unknown) / 256 ms

  443 13:08:43.411351  

  444 13:08:43.411790  

  445 13:08:43.417756  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  446 13:08:43.421491  Google Chrome EC: version:

  447 13:08:43.424670  	ro: volmar_v2.0.14126-e605144e9c

  448 13:08:43.428062  	rw: volmar_v0.0.55-22d1557

  449 13:08:43.431387    running image: 2

  450 13:08:43.435182  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  451 13:08:43.445187  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  452 13:08:43.451415  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  453 13:08:43.458346  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  454 13:08:43.468115  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  455 13:08:43.478445  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  456 13:08:43.481417  EC took 941us to calculate image hash

  457 13:08:43.492075  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  458 13:08:43.494796  VB2:sync_ec() select_rw=RW(active)

  459 13:08:43.508417  Waited 2095us to clear limit power flag.

  460 13:08:43.511909  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  461 13:08:43.515910  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  462 13:08:43.519416  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  463 13:08:43.522864  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  464 13:08:43.529126  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  465 13:08:43.529681  TCO_STS:   0000 0000

  466 13:08:43.532213  GEN_PMCON: d1001038 00002200

  467 13:08:43.536070  GBLRST_CAUSE: 00000040 00000000

  468 13:08:43.539058  HPR_CAUSE0: 00000000

  469 13:08:43.539512  prev_sleep_state 5

  470 13:08:43.546061  Abort disabling TXT, as CPU is not TXT capable.

  471 13:08:43.552777  cse_lite: Number of partitions = 3

  472 13:08:43.555890  cse_lite: Current partition = RW

  473 13:08:43.556316  cse_lite: Next partition = RW

  474 13:08:43.559233  cse_lite: Flags = 0x7

  475 13:08:43.566075  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  476 13:08:43.575899  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  477 13:08:43.579267  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  478 13:08:43.586386  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  479 13:08:43.592747  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  480 13:08:43.599545  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  481 13:08:43.602708  cse_lite: CSE CBFS RW version : 16.1.25.2049

  482 13:08:43.606466  Boot Count incremented to 609

  483 13:08:43.613108  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  484 13:08:43.619588  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  485 13:08:43.631701  Probing TPM I2C: done! DID_VID 0x00281ae0

  486 13:08:43.635148  Locality already claimed

  487 13:08:43.638787  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  488 13:08:43.658157  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  489 13:08:43.665038  MRC: Hash idx 0x100d comparison successful.

  490 13:08:43.668156  MRC cache found, size f6c8

  491 13:08:43.668695  bootmode is set to: 2

  492 13:08:43.671914  EC returned error result code 3

  493 13:08:43.675065  FW_CONFIG value from CBI is 0x131

  494 13:08:43.681433  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  495 13:08:43.684714  SPD index = 0

  496 13:08:43.691319  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  497 13:08:43.691746  SPD: module type is LPDDR4X

  498 13:08:43.698150  SPD: module part number is K4U6E3S4AB-MGCL

  499 13:08:43.705402  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  500 13:08:43.708472  SPD: device width 16 bits, bus width 16 bits

  501 13:08:43.712275  SPD: module size is 1024 MB (per channel)

  502 13:08:43.781236  CBMEM:

  503 13:08:43.784329  IMD: root @ 0x76fff000 254 entries.

  504 13:08:43.787824  IMD: root @ 0x76ffec00 62 entries.

  505 13:08:43.795614  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  506 13:08:43.798786  RO_VPD is uninitialized or empty.

  507 13:08:43.802176  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  508 13:08:43.808963  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  509 13:08:43.812028  External stage cache:

  510 13:08:43.815428  IMD: root @ 0x7bbff000 254 entries.

  511 13:08:43.818770  IMD: root @ 0x7bbfec00 62 entries.

  512 13:08:43.825236  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  513 13:08:43.832103  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  514 13:08:43.835224  MRC: 'RW_MRC_CACHE' does not need update.

  515 13:08:43.835791  8 DIMMs found

  516 13:08:43.838638  SMM Memory Map

  517 13:08:43.842244  SMRAM       : 0x7b800000 0x800000

  518 13:08:43.845578   Subregion 0: 0x7b800000 0x200000

  519 13:08:43.849215   Subregion 1: 0x7ba00000 0x200000

  520 13:08:43.852237   Subregion 2: 0x7bc00000 0x400000

  521 13:08:43.855410  top_of_ram = 0x77000000

  522 13:08:43.858928  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  523 13:08:43.865614  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  524 13:08:43.872515  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  525 13:08:43.875446  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  526 13:08:43.875979  Normal boot

  527 13:08:43.885827  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  528 13:08:43.892499  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  529 13:08:43.899184  Processing 237 relocs. Offset value of 0x74ab9000

  530 13:08:43.906533  BS: romstage times (exec / console): total (unknown) / 377 ms

  531 13:08:43.914341  

  532 13:08:43.914921  

  533 13:08:43.920538  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  534 13:08:43.921037  Normal boot

  535 13:08:43.926893  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  536 13:08:43.933821  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  537 13:08:43.940299  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  538 13:08:43.950258  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  539 13:08:43.998770  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  540 13:08:44.005179  Processing 5931 relocs. Offset value of 0x72a2f000

  541 13:08:44.008645  BS: postcar times (exec / console): total (unknown) / 51 ms

  542 13:08:44.009084  

  543 13:08:44.009419  

  544 13:08:44.018240  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  545 13:08:44.022206  Reserving BERT start 76a1e000, size 10000

  546 13:08:44.025775  Normal boot

  547 13:08:44.029062  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  548 13:08:44.035228  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  549 13:08:44.042177  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  550 13:08:44.048989  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  551 13:08:44.051905  Google Chrome EC: version:

  552 13:08:44.055270  	ro: volmar_v2.0.14126-e605144e9c

  553 13:08:44.059154  	rw: volmar_v0.0.55-22d1557

  554 13:08:44.062532    running image: 2

  555 13:08:44.065276  ACPI _SWS is PM1 Index 8 GPE Index -1

  556 13:08:44.068732  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  557 13:08:44.072882  EC returned error result code 3

  558 13:08:44.076651  FW_CONFIG value from CBI is 0x131

  559 13:08:44.083193  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  560 13:08:44.086346  PCI: 00:1c.2 disabled by fw_config

  561 13:08:44.093587  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  562 13:08:44.096857  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  563 13:08:44.103921  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  564 13:08:44.107097  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  565 13:08:44.113839  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  566 13:08:44.120317  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  567 13:08:44.123975  microcode: sig=0x906a4 pf=0x80 revision=0x423

  568 13:08:44.130690  microcode: Update skipped, already up-to-date

  569 13:08:44.137518  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  570 13:08:44.168688  Detected 6 core, 8 thread CPU.

  571 13:08:44.172335  Setting up SMI for CPU

  572 13:08:44.175313  IED base = 0x7bc00000

  573 13:08:44.175763  IED size = 0x00400000

  574 13:08:44.178787  Will perform SMM setup.

  575 13:08:44.181888  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  576 13:08:44.185352  LAPIC 0x0 in XAPIC mode.

  577 13:08:44.195272  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  578 13:08:44.198681  Processing 18 relocs. Offset value of 0x00030000

  579 13:08:44.203137  Attempting to start 7 APs

  580 13:08:44.206768  Waiting for 10ms after sending INIT.

  581 13:08:44.219474  Waiting for SIPI to complete...

  582 13:08:44.222771  done.

  583 13:08:44.223298  LAPIC 0x1 in XAPIC mode.

  584 13:08:44.226252  Waiting for SIPI to complete...

  585 13:08:44.232827  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  586 13:08:44.233338  LAPIC 0x12 in XAPIC mode.

  587 13:08:44.235951  done.

  588 13:08:44.236376  LAPIC 0x16 in XAPIC mode.

  589 13:08:44.239284  LAPIC 0x10 in XAPIC mode.

  590 13:08:44.242791  LAPIC 0x14 in XAPIC mode.

  591 13:08:44.246254  AP: slot 3 apic_id 16, MCU rev: 0x00000423

  592 13:08:44.249555  LAPIC 0x9 in XAPIC mode.

  593 13:08:44.252869  AP: slot 2 apic_id 14, MCU rev: 0x00000423

  594 13:08:44.259540  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  595 13:08:44.262788  AP: slot 1 apic_id 12, MCU rev: 0x00000423

  596 13:08:44.266564  LAPIC 0x8 in XAPIC mode.

  597 13:08:44.269667  AP: slot 6 apic_id 9, MCU rev: 0x00000423

  598 13:08:44.272944  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  599 13:08:44.276360  smm_setup_relocation_handler: enter

  600 13:08:44.279979  smm_setup_relocation_handler: exit

  601 13:08:44.289859  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  602 13:08:44.293269  Processing 11 relocs. Offset value of 0x00038000

  603 13:08:44.300073  smm_module_setup_stub: stack_top = 0x7b804000

  604 13:08:44.303112  smm_module_setup_stub: per cpu stack_size = 0x800

  605 13:08:44.309582  smm_module_setup_stub: runtime.start32_offset = 0x4c

  606 13:08:44.313376  smm_module_setup_stub: runtime.smm_size = 0x10000

  607 13:08:44.319796  SMM Module: stub loaded at 38000. Will call 0x76a52094

  608 13:08:44.323422  Installing permanent SMM handler to 0x7b800000

  609 13:08:44.329891  smm_load_module: total_smm_space_needed e468, available -> 200000

  610 13:08:44.339938  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  611 13:08:44.343200  Processing 255 relocs. Offset value of 0x7b9f6000

  612 13:08:44.346722  smm_load_module: smram_start: 0x7b800000

  613 13:08:44.350118  smm_load_module: smram_end: 7ba00000

  614 13:08:44.356899  smm_load_module: handler start 0x7b9f6d5f

  615 13:08:44.359896  smm_load_module: handler_size 98d0

  616 13:08:44.363287  smm_load_module: fxsave_area 0x7b9ff000

  617 13:08:44.366907  smm_load_module: fxsave_size 1000

  618 13:08:44.370323  smm_load_module: CONFIG_MSEG_SIZE 0x0

  619 13:08:44.376816  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  620 13:08:44.380221  smm_load_module: handler_mod_params.smbase = 0x7b800000

  621 13:08:44.386845  smm_load_module: per_cpu_save_state_size = 0x400

  622 13:08:44.390305  smm_load_module: num_cpus = 0x8

  623 13:08:44.393513  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  624 13:08:44.400334  smm_load_module: total_save_state_size = 0x2000

  625 13:08:44.403723  smm_load_module: cpu0 entry: 7b9e6000

  626 13:08:44.406749  smm_create_map: cpus allowed in one segment 30

  627 13:08:44.413553  smm_create_map: min # of segments needed 1

  628 13:08:44.414182  CPU 0x0

  629 13:08:44.416890      smbase 7b9e6000  entry 7b9ee000

  630 13:08:44.420365             ss_start 7b9f5c00  code_end 7b9ee208

  631 13:08:44.423712  CPU 0x1

  632 13:08:44.427031      smbase 7b9e5c00  entry 7b9edc00

  633 13:08:44.430404             ss_start 7b9f5800  code_end 7b9ede08

  634 13:08:44.433903  CPU 0x2

  635 13:08:44.436690      smbase 7b9e5800  entry 7b9ed800

  636 13:08:44.440884             ss_start 7b9f5400  code_end 7b9eda08

  637 13:08:44.441536  CPU 0x3

  638 13:08:44.443381      smbase 7b9e5400  entry 7b9ed400

  639 13:08:44.450492             ss_start 7b9f5000  code_end 7b9ed608

  640 13:08:44.451019  CPU 0x4

  641 13:08:44.454020      smbase 7b9e5000  entry 7b9ed000

  642 13:08:44.460518             ss_start 7b9f4c00  code_end 7b9ed208

  643 13:08:44.461046  CPU 0x5

  644 13:08:44.463958      smbase 7b9e4c00  entry 7b9ecc00

  645 13:08:44.466772             ss_start 7b9f4800  code_end 7b9ece08

  646 13:08:44.470448  CPU 0x6

  647 13:08:44.474123      smbase 7b9e4800  entry 7b9ec800

  648 13:08:44.477161             ss_start 7b9f4400  code_end 7b9eca08

  649 13:08:44.477592  CPU 0x7

  650 13:08:44.480738      smbase 7b9e4400  entry 7b9ec400

  651 13:08:44.487126             ss_start 7b9f4000  code_end 7b9ec608

  652 13:08:44.493971  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  653 13:08:44.500387  Processing 11 relocs. Offset value of 0x7b9ee000

  654 13:08:44.507447  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  655 13:08:44.510703  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  656 13:08:44.517208  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  657 13:08:44.523890  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  658 13:08:44.530666  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  659 13:08:44.537536  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  660 13:08:44.544005  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  661 13:08:44.550794  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  662 13:08:44.557659  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  663 13:08:44.560980  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  664 13:08:44.567391  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  665 13:08:44.574552  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  666 13:08:44.580810  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  667 13:08:44.587736  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  668 13:08:44.594390  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  669 13:08:44.597982  smm_module_setup_stub: stack_top = 0x7b804000

  670 13:08:44.604363  smm_module_setup_stub: per cpu stack_size = 0x800

  671 13:08:44.607828  smm_module_setup_stub: runtime.start32_offset = 0x4c

  672 13:08:44.614946  smm_module_setup_stub: runtime.smm_size = 0x200000

  673 13:08:44.618256  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  674 13:08:44.623195  Clearing SMI status registers

  675 13:08:44.626718  SMI_STS: PM1 

  676 13:08:44.627215  PM1_STS: WAK PWRBTN 

  677 13:08:44.636594  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  678 13:08:44.637158  In relocation handler: CPU 0

  679 13:08:44.643420  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  680 13:08:44.646619  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  681 13:08:44.649856  Relocation complete.

  682 13:08:44.656735  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  683 13:08:44.660341  In relocation handler: CPU 5

  684 13:08:44.663359  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  685 13:08:44.666476  Relocation complete.

  686 13:08:44.673690  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  687 13:08:44.677429  In relocation handler: CPU 4

  688 13:08:44.680017  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  689 13:08:44.683907  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  690 13:08:44.686910  Relocation complete.

  691 13:08:44.693543  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  692 13:08:44.697122  In relocation handler: CPU 3

  693 13:08:44.700436  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  694 13:08:44.706741  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  695 13:08:44.707174  Relocation complete.

  696 13:08:44.717281  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  697 13:08:44.717812  In relocation handler: CPU 1

  698 13:08:44.723847  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  699 13:08:44.726909  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  700 13:08:44.730342  Relocation complete.

  701 13:08:44.737008  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  702 13:08:44.740333  In relocation handler: CPU 2

  703 13:08:44.744116  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  704 13:08:44.747141  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  705 13:08:44.750407  Relocation complete.

  706 13:08:44.757186  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  707 13:08:44.760301  In relocation handler: CPU 7

  708 13:08:44.763864  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  709 13:08:44.770052  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  710 13:08:44.774059  Relocation complete.

  711 13:08:44.780485  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  712 13:08:44.783555  In relocation handler: CPU 6

  713 13:08:44.787330  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  714 13:08:44.787858  Relocation complete.

  715 13:08:44.789897  Initializing CPU #0

  716 13:08:44.793727  CPU: vendor Intel device 906a4

  717 13:08:44.796679  CPU: family 06, model 9a, stepping 04

  718 13:08:44.800227  Clearing out pending MCEs

  719 13:08:44.803778  cpu: energy policy set to 7

  720 13:08:44.807037  Turbo is available but hidden

  721 13:08:44.810332  Turbo is available and visible

  722 13:08:44.813440  microcode: Update skipped, already up-to-date

  723 13:08:44.816814  CPU #0 initialized

  724 13:08:44.817241  Initializing CPU #5

  725 13:08:44.820391  Initializing CPU #3

  726 13:08:44.820818  Initializing CPU #4

  727 13:08:44.823881  Initializing CPU #2

  728 13:08:44.827301  CPU: vendor Intel device 906a4

  729 13:08:44.830937  CPU: family 06, model 9a, stepping 04

  730 13:08:44.833418  Initializing CPU #6

  731 13:08:44.836804  CPU: vendor Intel device 906a4

  732 13:08:44.840712  CPU: family 06, model 9a, stepping 04

  733 13:08:44.843355  CPU: vendor Intel device 906a4

  734 13:08:44.847141  CPU: family 06, model 9a, stepping 04

  735 13:08:44.850570  Initializing CPU #1

  736 13:08:44.851035  Clearing out pending MCEs

  737 13:08:44.853693  CPU: vendor Intel device 906a4

  738 13:08:44.857050  CPU: family 06, model 9a, stepping 04

  739 13:08:44.860222  Clearing out pending MCEs

  740 13:08:44.863831  cpu: energy policy set to 7

  741 13:08:44.866917  Clearing out pending MCEs

  742 13:08:44.870537  Clearing out pending MCEs

  743 13:08:44.874020  CPU: vendor Intel device 906a4

  744 13:08:44.877146  CPU: family 06, model 9a, stepping 04

  745 13:08:44.877670  Initializing CPU #7

  746 13:08:44.880513  cpu: energy policy set to 7

  747 13:08:44.883770  cpu: energy policy set to 7

  748 13:08:44.887155  Clearing out pending MCEs

  749 13:08:44.890253  microcode: Update skipped, already up-to-date

  750 13:08:44.893962  CPU #3 initialized

  751 13:08:44.897329  microcode: Update skipped, already up-to-date

  752 13:08:44.900555  CPU #2 initialized

  753 13:08:44.903759  cpu: energy policy set to 7

  754 13:08:44.907360  microcode: Update skipped, already up-to-date

  755 13:08:44.907845  CPU #4 initialized

  756 13:08:44.913898  microcode: Update skipped, already up-to-date

  757 13:08:44.914329  CPU #1 initialized

  758 13:08:44.917892  CPU: vendor Intel device 906a4

  759 13:08:44.920938  CPU: family 06, model 9a, stepping 04

  760 13:08:44.923980  CPU: vendor Intel device 906a4

  761 13:08:44.927340  CPU: family 06, model 9a, stepping 04

  762 13:08:44.930893  cpu: energy policy set to 7

  763 13:08:44.934309  Clearing out pending MCEs

  764 13:08:44.937407  Clearing out pending MCEs

  765 13:08:44.940715  cpu: energy policy set to 7

  766 13:08:44.944461  cpu: energy policy set to 7

  767 13:08:44.947507  microcode: Update skipped, already up-to-date

  768 13:08:44.951085  CPU #7 initialized

  769 13:08:44.954371  microcode: Update skipped, already up-to-date

  770 13:08:44.954834  CPU #6 initialized

  771 13:08:44.961406  microcode: Update skipped, already up-to-date

  772 13:08:44.961943  CPU #5 initialized

  773 13:08:44.967929  bsp_do_flight_plan done after 727 msecs.

  774 13:08:44.970799  CPU: frequency set to 4400 MHz

  775 13:08:44.971223  Enabling SMIs.

  776 13:08:44.978130  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  777 13:08:44.994147  Probing TPM I2C: done! DID_VID 0x00281ae0

  778 13:08:44.997304  Locality already claimed

  779 13:08:45.001047  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  780 13:08:45.011904  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  781 13:08:45.015618  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  782 13:08:45.021981  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  783 13:08:45.029107  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  784 13:08:45.032016  Found a VBT of 9216 bytes after decompression

  785 13:08:45.035549  PCI  1.0, PIN A, using IRQ #16

  786 13:08:45.038939  PCI  2.0, PIN A, using IRQ #17

  787 13:08:45.042010  PCI  4.0, PIN A, using IRQ #18

  788 13:08:45.045559  PCI  5.0, PIN A, using IRQ #16

  789 13:08:45.048857  PCI  6.0, PIN A, using IRQ #16

  790 13:08:45.052284  PCI  6.2, PIN C, using IRQ #18

  791 13:08:45.055608  PCI  7.0, PIN A, using IRQ #19

  792 13:08:45.059013  PCI  7.1, PIN B, using IRQ #20

  793 13:08:45.062411  PCI  7.2, PIN C, using IRQ #21

  794 13:08:45.065755  PCI  7.3, PIN D, using IRQ #22

  795 13:08:45.066273  PCI  8.0, PIN A, using IRQ #23

  796 13:08:45.068858  PCI  D.0, PIN A, using IRQ #17

  797 13:08:45.072344  PCI  D.1, PIN B, using IRQ #19

  798 13:08:45.075930  PCI 10.0, PIN A, using IRQ #24

  799 13:08:45.078962  PCI 10.1, PIN B, using IRQ #25

  800 13:08:45.082409  PCI 10.6, PIN C, using IRQ #20

  801 13:08:45.085923  PCI 10.7, PIN D, using IRQ #21

  802 13:08:45.089012  PCI 11.0, PIN A, using IRQ #26

  803 13:08:45.092417  PCI 11.1, PIN B, using IRQ #27

  804 13:08:45.096083  PCI 11.2, PIN C, using IRQ #28

  805 13:08:45.099316  PCI 11.3, PIN D, using IRQ #29

  806 13:08:45.102472  PCI 12.0, PIN A, using IRQ #30

  807 13:08:45.105520  PCI 12.6, PIN B, using IRQ #31

  808 13:08:45.109153  PCI 12.7, PIN C, using IRQ #22

  809 13:08:45.112382  PCI 13.0, PIN A, using IRQ #32

  810 13:08:45.112804  PCI 13.1, PIN B, using IRQ #33

  811 13:08:45.115970  PCI 13.2, PIN C, using IRQ #34

  812 13:08:45.119562  PCI 13.3, PIN D, using IRQ #35

  813 13:08:45.122425  PCI 14.0, PIN B, using IRQ #23

  814 13:08:45.126018  PCI 14.1, PIN A, using IRQ #36

  815 13:08:45.129276  PCI 14.3, PIN C, using IRQ #17

  816 13:08:45.133182  PCI 15.0, PIN A, using IRQ #37

  817 13:08:45.135792  PCI 15.1, PIN B, using IRQ #38

  818 13:08:45.139125  PCI 15.2, PIN C, using IRQ #39

  819 13:08:45.142738  PCI 15.3, PIN D, using IRQ #40

  820 13:08:45.146095  PCI 16.0, PIN A, using IRQ #18

  821 13:08:45.149264  PCI 16.1, PIN B, using IRQ #19

  822 13:08:45.152702  PCI 16.2, PIN C, using IRQ #20

  823 13:08:45.155925  PCI 16.3, PIN D, using IRQ #21

  824 13:08:45.159154  PCI 16.4, PIN A, using IRQ #18

  825 13:08:45.162262  PCI 16.5, PIN B, using IRQ #19

  826 13:08:45.162713  PCI 17.0, PIN A, using IRQ #22

  827 13:08:45.166032  PCI 19.0, PIN A, using IRQ #41

  828 13:08:45.168977  PCI 19.1, PIN B, using IRQ #42

  829 13:08:45.172808  PCI 19.2, PIN C, using IRQ #43

  830 13:08:45.176622  PCI 1C.0, PIN A, using IRQ #16

  831 13:08:45.179231  PCI 1C.1, PIN B, using IRQ #17

  832 13:08:45.182927  PCI 1C.2, PIN C, using IRQ #18

  833 13:08:45.185821  PCI 1C.3, PIN D, using IRQ #19

  834 13:08:45.189682  PCI 1C.4, PIN A, using IRQ #16

  835 13:08:45.193311  PCI 1C.5, PIN B, using IRQ #17

  836 13:08:45.195789  PCI 1C.6, PIN C, using IRQ #18

  837 13:08:45.199471  PCI 1C.7, PIN D, using IRQ #19

  838 13:08:45.203173  PCI 1D.0, PIN A, using IRQ #16

  839 13:08:45.205802  PCI 1D.1, PIN B, using IRQ #17

  840 13:08:45.209417  PCI 1D.2, PIN C, using IRQ #18

  841 13:08:45.209943  PCI 1D.3, PIN D, using IRQ #19

  842 13:08:45.212777  PCI 1E.0, PIN A, using IRQ #23

  843 13:08:45.216333  PCI 1E.1, PIN B, using IRQ #20

  844 13:08:45.219057  PCI 1E.2, PIN C, using IRQ #44

  845 13:08:45.222484  PCI 1E.3, PIN D, using IRQ #45

  846 13:08:45.225976  PCI 1F.3, PIN B, using IRQ #22

  847 13:08:45.229494  PCI 1F.4, PIN C, using IRQ #23

  848 13:08:45.233096  PCI 1F.6, PIN D, using IRQ #20

  849 13:08:45.236535  PCI 1F.7, PIN A, using IRQ #21

  850 13:08:45.239659  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  851 13:08:45.249452  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  852 13:08:45.430453  FSPS returned 0

  853 13:08:45.433290  Executing Phase 1 of FspMultiPhaseSiInit

  854 13:08:45.443422  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  855 13:08:45.446770  port C0 DISC req: usage 1 usb3 1 usb2 1

  856 13:08:45.450211  Raw Buffer output 0 00000111

  857 13:08:45.453558  Raw Buffer output 1 00000000

  858 13:08:45.456910  pmc_send_ipc_cmd succeeded

  859 13:08:45.463277  port C1 DISC req: usage 1 usb3 3 usb2 3

  860 13:08:45.463811  Raw Buffer output 0 00000331

  861 13:08:45.466768  Raw Buffer output 1 00000000

  862 13:08:45.470935  pmc_send_ipc_cmd succeeded

  863 13:08:45.474677  Detected 6 core, 8 thread CPU.

  864 13:08:45.477899  Detected 6 core, 8 thread CPU.

  865 13:08:45.483259  Detected 6 core, 8 thread CPU.

  866 13:08:45.486625  Detected 6 core, 8 thread CPU.

  867 13:08:45.489929  Detected 6 core, 8 thread CPU.

  868 13:08:45.493961  Detected 6 core, 8 thread CPU.

  869 13:08:45.496915  Detected 6 core, 8 thread CPU.

  870 13:08:45.500239  Detected 6 core, 8 thread CPU.

  871 13:08:45.503555  Detected 6 core, 8 thread CPU.

  872 13:08:45.506835  Detected 6 core, 8 thread CPU.

  873 13:08:45.510297  Detected 6 core, 8 thread CPU.

  874 13:08:45.513565  Detected 6 core, 8 thread CPU.

  875 13:08:45.517080  Detected 6 core, 8 thread CPU.

  876 13:08:45.520505  Detected 6 core, 8 thread CPU.

  877 13:08:45.523658  Detected 6 core, 8 thread CPU.

  878 13:08:45.527245  Detected 6 core, 8 thread CPU.

  879 13:08:45.530398  Detected 6 core, 8 thread CPU.

  880 13:08:45.533739  Detected 6 core, 8 thread CPU.

  881 13:08:45.537348  Detected 6 core, 8 thread CPU.

  882 13:08:45.537884  Detected 6 core, 8 thread CPU.

  883 13:08:45.540119  Detected 6 core, 8 thread CPU.

  884 13:08:45.543376  Detected 6 core, 8 thread CPU.

  885 13:08:45.836680  Detected 6 core, 8 thread CPU.

  886 13:08:45.840169  Detected 6 core, 8 thread CPU.

  887 13:08:45.843306  Detected 6 core, 8 thread CPU.

  888 13:08:45.846203  Detected 6 core, 8 thread CPU.

  889 13:08:45.850258  Detected 6 core, 8 thread CPU.

  890 13:08:45.853611  Detected 6 core, 8 thread CPU.

  891 13:08:45.856600  Detected 6 core, 8 thread CPU.

  892 13:08:45.860033  Detected 6 core, 8 thread CPU.

  893 13:08:45.863019  Detected 6 core, 8 thread CPU.

  894 13:08:45.866288  Detected 6 core, 8 thread CPU.

  895 13:08:45.870224  Detected 6 core, 8 thread CPU.

  896 13:08:45.873628  Detected 6 core, 8 thread CPU.

  897 13:08:45.876755  Detected 6 core, 8 thread CPU.

  898 13:08:45.880038  Detected 6 core, 8 thread CPU.

  899 13:08:45.883446  Detected 6 core, 8 thread CPU.

  900 13:08:45.886833  Detected 6 core, 8 thread CPU.

  901 13:08:45.890487  Detected 6 core, 8 thread CPU.

  902 13:08:45.891068  Detected 6 core, 8 thread CPU.

  903 13:08:45.893667  Detected 6 core, 8 thread CPU.

  904 13:08:45.896911  Detected 6 core, 8 thread CPU.

  905 13:08:45.899951  Display FSP Version Info HOB

  906 13:08:45.903348  Reference Code - CPU = c.0.65.70

  907 13:08:45.907029  uCode Version = 0.0.4.23

  908 13:08:45.909960  TXT ACM version = ff.ff.ff.ffff

  909 13:08:45.913356  Reference Code - ME = c.0.65.70

  910 13:08:45.917038  MEBx version = 0.0.0.0

  911 13:08:45.920359  ME Firmware Version = Lite SKU

  912 13:08:45.923885  Reference Code - PCH = c.0.65.70

  913 13:08:45.924560  PCH-CRID Status = Disabled

  914 13:08:45.930444  PCH-CRID Original Value = ff.ff.ff.ffff

  915 13:08:45.933629  PCH-CRID New Value = ff.ff.ff.ffff

  916 13:08:45.936715  OPROM - RST - RAID = ff.ff.ff.ffff

  917 13:08:45.940277  PCH Hsio Version = 4.0.0.0

  918 13:08:45.943343  Reference Code - SA - System Agent = c.0.65.70

  919 13:08:45.947066  Reference Code - MRC = 0.0.3.80

  920 13:08:45.950538  SA - PCIe Version = c.0.65.70

  921 13:08:45.953793  SA-CRID Status = Disabled

  922 13:08:45.957219  SA-CRID Original Value = 0.0.0.4

  923 13:08:45.960598  SA-CRID New Value = 0.0.0.4

  924 13:08:45.961248  OPROM - VBIOS = ff.ff.ff.ffff

  925 13:08:45.967287  IO Manageability Engine FW Version = 24.0.4.0

  926 13:08:45.970482  PHY Build Version = 0.0.0.2016

  927 13:08:45.973921  Thunderbolt(TM) FW Version = 0.0.0.0

  928 13:08:45.980617  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  929 13:08:45.986994  BS: BS_DEV_INIT_CHIPS run times (exec / console): 493 / 507 ms

  930 13:08:45.987545  Enumerating buses...

  931 13:08:45.993637  Show all devs... Before device enumeration.

  932 13:08:45.994163  Root Device: enabled 1

  933 13:08:45.997129  CPU_CLUSTER: 0: enabled 1

  934 13:08:46.000625  DOMAIN: 0000: enabled 1

  935 13:08:46.001300  GPIO: 0: enabled 1

  936 13:08:46.004126  PCI: 00:00.0: enabled 1

  937 13:08:46.007234  PCI: 00:01.0: enabled 0

  938 13:08:46.010528  PCI: 00:01.1: enabled 0

  939 13:08:46.011085  PCI: 00:02.0: enabled 1

  940 13:08:46.013645  PCI: 00:04.0: enabled 1

  941 13:08:46.017500  PCI: 00:05.0: enabled 0

  942 13:08:46.020582  PCI: 00:06.0: enabled 1

  943 13:08:46.021008  PCI: 00:06.2: enabled 0

  944 13:08:46.024134  PCI: 00:07.0: enabled 0

  945 13:08:46.027206  PCI: 00:07.1: enabled 0

  946 13:08:46.027855  PCI: 00:07.2: enabled 0

  947 13:08:46.030459  PCI: 00:07.3: enabled 0

  948 13:08:46.033958  PCI: 00:08.0: enabled 0

  949 13:08:46.037104  PCI: 00:09.0: enabled 0

  950 13:08:46.037618  PCI: 00:0a.0: enabled 1

  951 13:08:46.040762  PCI: 00:0d.0: enabled 1

  952 13:08:46.044145  PCI: 00:0d.1: enabled 0

  953 13:08:46.047463  PCI: 00:0d.2: enabled 0

  954 13:08:46.047881  PCI: 00:0d.3: enabled 0

  955 13:08:46.050389  PCI: 00:0e.0: enabled 0

  956 13:08:46.053954  PCI: 00:10.0: enabled 0

  957 13:08:46.054625  PCI: 00:10.1: enabled 0

  958 13:08:46.057299  PCI: 00:10.6: enabled 0

  959 13:08:46.060431  PCI: 00:10.7: enabled 0

  960 13:08:46.063954  PCI: 00:12.0: enabled 0

  961 13:08:46.064399  PCI: 00:12.6: enabled 0

  962 13:08:46.067329  PCI: 00:12.7: enabled 0

  963 13:08:46.070805  PCI: 00:13.0: enabled 0

  964 13:08:46.074143  PCI: 00:14.0: enabled 1

  965 13:08:46.074561  PCI: 00:14.1: enabled 0

  966 13:08:46.077529  PCI: 00:14.2: enabled 1

  967 13:08:46.080639  PCI: 00:14.3: enabled 1

  968 13:08:46.083886  PCI: 00:15.0: enabled 1

  969 13:08:46.084379  PCI: 00:15.1: enabled 1

  970 13:08:46.087391  PCI: 00:15.2: enabled 0

  971 13:08:46.090899  PCI: 00:15.3: enabled 1

  972 13:08:46.091394  PCI: 00:16.0: enabled 1

  973 13:08:46.093895  PCI: 00:16.1: enabled 0

  974 13:08:46.097355  PCI: 00:16.2: enabled 0

  975 13:08:46.100543  PCI: 00:16.3: enabled 0

  976 13:08:46.101049  PCI: 00:16.4: enabled 0

  977 13:08:46.104179  PCI: 00:16.5: enabled 0

  978 13:08:46.107485  PCI: 00:17.0: enabled 1

  979 13:08:46.110402  PCI: 00:19.0: enabled 0

  980 13:08:46.110943  PCI: 00:19.1: enabled 1

  981 13:08:46.113919  PCI: 00:19.2: enabled 0

  982 13:08:46.117294  PCI: 00:1a.0: enabled 0

  983 13:08:46.125565  PCI: 00:1c.0: enabled 0

  984 13:08:46.126175  PCI: 00:1c.1: enabled 0

  985 13:08:46.126771  PCI: 00:1c.2: enabled 0

  986 13:08:46.127650  PCI: 00:1c.3: enabled 0

  987 13:08:46.128193  PCI: 00:1c.4: enabled 0

  988 13:08:46.130394  PCI: 00:1c.5: enabled 0

  989 13:08:46.133724  PCI: 00:1c.6: enabled 0

  990 13:08:46.137374  PCI: 00:1c.7: enabled 0

  991 13:08:46.137793  PCI: 00:1d.0: enabled 0

  992 13:08:46.140389  PCI: 00:1d.1: enabled 0

  993 13:08:46.143638  PCI: 00:1d.2: enabled 0

  994 13:08:46.146918  PCI: 00:1d.3: enabled 0

  995 13:08:46.147339  PCI: 00:1e.0: enabled 1

  996 13:08:46.150366  PCI: 00:1e.1: enabled 0

  997 13:08:46.153833  PCI: 00:1e.2: enabled 0

  998 13:08:46.157401  PCI: 00:1e.3: enabled 1

  999 13:08:46.157916  PCI: 00:1f.0: enabled 1

 1000 13:08:46.160601  PCI: 00:1f.1: enabled 0

 1001 13:08:46.163917  PCI: 00:1f.2: enabled 1

 1002 13:08:46.164397  PCI: 00:1f.3: enabled 1

 1003 13:08:46.167231  PCI: 00:1f.4: enabled 0

 1004 13:08:46.170719  PCI: 00:1f.5: enabled 1

 1005 13:08:46.173942  PCI: 00:1f.6: enabled 0

 1006 13:08:46.174439  PCI: 00:1f.7: enabled 0

 1007 13:08:46.177307  GENERIC: 0.0: enabled 1

 1008 13:08:46.180595  GENERIC: 0.0: enabled 1

 1009 13:08:46.184082  GENERIC: 1.0: enabled 1

 1010 13:08:46.184587  GENERIC: 0.0: enabled 1

 1011 13:08:46.187459  GENERIC: 1.0: enabled 1

 1012 13:08:46.190880  USB0 port 0: enabled 1

 1013 13:08:46.191382  USB0 port 0: enabled 1

 1014 13:08:46.193808  GENERIC: 0.0: enabled 1

 1015 13:08:46.197307  I2C: 00:1a: enabled 1

 1016 13:08:46.200685  I2C: 00:31: enabled 1

 1017 13:08:46.201108  I2C: 00:32: enabled 1

 1018 13:08:46.204022  I2C: 00:50: enabled 1

 1019 13:08:46.206993  I2C: 00:10: enabled 1

 1020 13:08:46.207429  I2C: 00:15: enabled 1

 1021 13:08:46.210509  I2C: 00:2c: enabled 1

 1022 13:08:46.213938  GENERIC: 0.0: enabled 1

 1023 13:08:46.214365  SPI: 00: enabled 1

 1024 13:08:46.217429  PNP: 0c09.0: enabled 1

 1025 13:08:46.220422  GENERIC: 0.0: enabled 1

 1026 13:08:46.220867  USB3 port 0: enabled 1

 1027 13:08:46.224222  USB3 port 1: enabled 0

 1028 13:08:46.227168  USB3 port 2: enabled 1

 1029 13:08:46.227588  USB3 port 3: enabled 0

 1030 13:08:46.230696  USB2 port 0: enabled 1

 1031 13:08:46.234028  USB2 port 1: enabled 0

 1032 13:08:46.237418  USB2 port 2: enabled 1

 1033 13:08:46.237900  USB2 port 3: enabled 0

 1034 13:08:46.240756  USB2 port 4: enabled 0

 1035 13:08:46.244167  USB2 port 5: enabled 1

 1036 13:08:46.244586  USB2 port 6: enabled 0

 1037 13:08:46.247431  USB2 port 7: enabled 0

 1038 13:08:46.250765  USB2 port 8: enabled 1

 1039 13:08:46.251188  USB2 port 9: enabled 1

 1040 13:08:46.254238  USB3 port 0: enabled 1

 1041 13:08:46.257757  USB3 port 1: enabled 0

 1042 13:08:46.260786  USB3 port 2: enabled 0

 1043 13:08:46.261292  USB3 port 3: enabled 0

 1044 13:08:46.264111  GENERIC: 0.0: enabled 1

 1045 13:08:46.267677  GENERIC: 1.0: enabled 1

 1046 13:08:46.268130  APIC: 00: enabled 1

 1047 13:08:46.270699  APIC: 12: enabled 1

 1048 13:08:46.273911  APIC: 14: enabled 1

 1049 13:08:46.274330  APIC: 16: enabled 1

 1050 13:08:46.277260  APIC: 10: enabled 1

 1051 13:08:46.277677  APIC: 01: enabled 1

 1052 13:08:46.280733  APIC: 09: enabled 1

 1053 13:08:46.283906  APIC: 08: enabled 1

 1054 13:08:46.284434  Compare with tree...

 1055 13:08:46.287323  Root Device: enabled 1

 1056 13:08:46.290574   CPU_CLUSTER: 0: enabled 1

 1057 13:08:46.293821    APIC: 00: enabled 1

 1058 13:08:46.294241    APIC: 12: enabled 1

 1059 13:08:46.297377    APIC: 14: enabled 1

 1060 13:08:46.300980    APIC: 16: enabled 1

 1061 13:08:46.301488    APIC: 10: enabled 1

 1062 13:08:46.303855    APIC: 01: enabled 1

 1063 13:08:46.307276    APIC: 09: enabled 1

 1064 13:08:46.307795    APIC: 08: enabled 1

 1065 13:08:46.310934   DOMAIN: 0000: enabled 1

 1066 13:08:46.314463    GPIO: 0: enabled 1

 1067 13:08:46.314906    PCI: 00:00.0: enabled 1

 1068 13:08:46.317541    PCI: 00:01.0: enabled 0

 1069 13:08:46.320698    PCI: 00:01.1: enabled 0

 1070 13:08:46.324085    PCI: 00:02.0: enabled 1

 1071 13:08:46.327465    PCI: 00:04.0: enabled 1

 1072 13:08:46.327887     GENERIC: 0.0: enabled 1

 1073 13:08:46.330866    PCI: 00:05.0: enabled 0

 1074 13:08:46.334529    PCI: 00:06.0: enabled 1

 1075 13:08:46.337340    PCI: 00:06.2: enabled 0

 1076 13:08:46.340878    PCI: 00:08.0: enabled 0

 1077 13:08:46.341359    PCI: 00:09.0: enabled 0

 1078 13:08:46.344207    PCI: 00:0a.0: enabled 1

 1079 13:08:46.347461    PCI: 00:0d.0: enabled 1

 1080 13:08:46.350896     USB0 port 0: enabled 1

 1081 13:08:46.351315      USB3 port 0: enabled 1

 1082 13:08:46.354177      USB3 port 1: enabled 0

 1083 13:08:46.357927      USB3 port 2: enabled 1

 1084 13:08:46.360865      USB3 port 3: enabled 0

 1085 13:08:46.364353    PCI: 00:0d.1: enabled 0

 1086 13:08:46.367741    PCI: 00:0d.2: enabled 0

 1087 13:08:46.368163    PCI: 00:0d.3: enabled 0

 1088 13:08:46.370792    PCI: 00:0e.0: enabled 0

 1089 13:08:46.374145    PCI: 00:10.0: enabled 0

 1090 13:08:46.377541    PCI: 00:10.1: enabled 0

 1091 13:08:46.378031    PCI: 00:10.6: enabled 0

 1092 13:08:46.381119    PCI: 00:10.7: enabled 0

 1093 13:08:46.384241    PCI: 00:12.0: enabled 0

 1094 13:08:46.387408    PCI: 00:12.6: enabled 0

 1095 13:08:46.391319    PCI: 00:12.7: enabled 0

 1096 13:08:46.391876    PCI: 00:13.0: enabled 0

 1097 13:08:46.394526    PCI: 00:14.0: enabled 1

 1098 13:08:46.397754     USB0 port 0: enabled 1

 1099 13:08:46.401429      USB2 port 0: enabled 1

 1100 13:08:46.404213      USB2 port 1: enabled 0

 1101 13:08:46.404645      USB2 port 2: enabled 1

 1102 13:08:46.407790      USB2 port 3: enabled 0

 1103 13:08:46.410937      USB2 port 4: enabled 0

 1104 13:08:46.414648      USB2 port 5: enabled 1

 1105 13:08:46.418176      USB2 port 6: enabled 0

 1106 13:08:46.421094      USB2 port 7: enabled 0

 1107 13:08:46.421580      USB2 port 8: enabled 1

 1108 13:08:46.424420      USB2 port 9: enabled 1

 1109 13:08:46.428016      USB3 port 0: enabled 1

 1110 13:08:46.431321      USB3 port 1: enabled 0

 1111 13:08:46.435004      USB3 port 2: enabled 0

 1112 13:08:46.435487      USB3 port 3: enabled 0

 1113 13:08:46.437791    PCI: 00:14.1: enabled 0

 1114 13:08:46.441254    PCI: 00:14.2: enabled 1

 1115 13:08:46.444924    PCI: 00:14.3: enabled 1

 1116 13:08:46.447760     GENERIC: 0.0: enabled 1

 1117 13:08:46.448180    PCI: 00:15.0: enabled 1

 1118 13:08:46.451546     I2C: 00:1a: enabled 1

 1119 13:08:46.454822     I2C: 00:31: enabled 1

 1120 13:08:46.458210     I2C: 00:32: enabled 1

 1121 13:08:46.458662    PCI: 00:15.1: enabled 1

 1122 13:08:46.461149     I2C: 00:50: enabled 1

 1123 13:08:46.464545    PCI: 00:15.2: enabled 0

 1124 13:08:46.467961    PCI: 00:15.3: enabled 1

 1125 13:08:46.471375     I2C: 00:10: enabled 1

 1126 13:08:46.471795    PCI: 00:16.0: enabled 1

 1127 13:08:46.474433    PCI: 00:16.1: enabled 0

 1128 13:08:46.478110    PCI: 00:16.2: enabled 0

 1129 13:08:46.481370    PCI: 00:16.3: enabled 0

 1130 13:08:46.485087    PCI: 00:16.4: enabled 0

 1131 13:08:46.485605    PCI: 00:16.5: enabled 0

 1132 13:08:46.487876    PCI: 00:17.0: enabled 1

 1133 13:08:46.491342    PCI: 00:19.0: enabled 0

 1134 13:08:46.494792    PCI: 00:19.1: enabled 1

 1135 13:08:46.495207     I2C: 00:15: enabled 1

 1136 13:08:46.498014     I2C: 00:2c: enabled 1

 1137 13:08:46.501184    PCI: 00:19.2: enabled 0

 1138 13:08:46.504769    PCI: 00:1a.0: enabled 0

 1139 13:08:46.507803    PCI: 00:1e.0: enabled 1

 1140 13:08:46.508356    PCI: 00:1e.1: enabled 0

 1141 13:08:46.511290    PCI: 00:1e.2: enabled 0

 1142 13:08:46.514707    PCI: 00:1e.3: enabled 1

 1143 13:08:46.518144     SPI: 00: enabled 1

 1144 13:08:46.518566    PCI: 00:1f.0: enabled 1

 1145 13:08:46.521737     PNP: 0c09.0: enabled 1

 1146 13:08:46.525010    PCI: 00:1f.1: enabled 0

 1147 13:08:46.528200    PCI: 00:1f.2: enabled 1

 1148 13:08:46.531334     GENERIC: 0.0: enabled 1

 1149 13:08:46.531756      GENERIC: 0.0: enabled 1

 1150 13:08:46.534554      GENERIC: 1.0: enabled 1

 1151 13:08:46.538078    PCI: 00:1f.3: enabled 1

 1152 13:08:46.541424    PCI: 00:1f.4: enabled 0

 1153 13:08:46.545183    PCI: 00:1f.5: enabled 1

 1154 13:08:46.545691    PCI: 00:1f.6: enabled 0

 1155 13:08:46.548275    PCI: 00:1f.7: enabled 0

 1156 13:08:46.551287  Root Device scanning...

 1157 13:08:46.554894  scan_static_bus for Root Device

 1158 13:08:46.558251  CPU_CLUSTER: 0 enabled

 1159 13:08:46.558801  DOMAIN: 0000 enabled

 1160 13:08:46.561495  DOMAIN: 0000 scanning...

 1161 13:08:46.564617  PCI: pci_scan_bus for bus 00

 1162 13:08:46.568482  PCI: 00:00.0 [8086/0000] ops

 1163 13:08:46.571456  PCI: 00:00.0 [8086/4609] enabled

 1164 13:08:46.575100  PCI: 00:02.0 [8086/0000] bus ops

 1165 13:08:46.578827  PCI: 00:02.0 [8086/46b3] enabled

 1166 13:08:46.581497  PCI: 00:04.0 [8086/0000] bus ops

 1167 13:08:46.585116  PCI: 00:04.0 [8086/461d] enabled

 1168 13:08:46.588654  PCI: 00:06.0 [8086/0000] bus ops

 1169 13:08:46.591256  PCI: 00:06.0 [8086/464d] enabled

 1170 13:08:46.594848  PCI: 00:08.0 [8086/464f] disabled

 1171 13:08:46.598319  PCI: 00:0a.0 [8086/467d] enabled

 1172 13:08:46.602000  PCI: 00:0d.0 [8086/0000] bus ops

 1173 13:08:46.605239  PCI: 00:0d.0 [8086/461e] enabled

 1174 13:08:46.608369  PCI: 00:14.0 [8086/0000] bus ops

 1175 13:08:46.611502  PCI: 00:14.0 [8086/51ed] enabled

 1176 13:08:46.614981  PCI: 00:14.2 [8086/51ef] enabled

 1177 13:08:46.618459  PCI: 00:14.3 [8086/0000] bus ops

 1178 13:08:46.621577  PCI: 00:14.3 [8086/51f0] enabled

 1179 13:08:46.625027  PCI: 00:15.0 [8086/0000] bus ops

 1180 13:08:46.628628  PCI: 00:15.0 [8086/51e8] enabled

 1181 13:08:46.631881  PCI: 00:15.1 [8086/0000] bus ops

 1182 13:08:46.635105  PCI: 00:15.1 [8086/51e9] enabled

 1183 13:08:46.638460  PCI: 00:15.2 [8086/0000] bus ops

 1184 13:08:46.641811  PCI: 00:15.2 [8086/51ea] disabled

 1185 13:08:46.644973  PCI: 00:15.3 [8086/0000] bus ops

 1186 13:08:46.648326  PCI: 00:15.3 [8086/51eb] enabled

 1187 13:08:46.651537  PCI: 00:16.0 [8086/0000] ops

 1188 13:08:46.654848  PCI: 00:16.0 [8086/51e0] enabled

 1189 13:08:46.662114  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1190 13:08:46.665231  PCI: 00:19.0 [8086/0000] bus ops

 1191 13:08:46.668612  PCI: 00:19.0 [8086/51c5] disabled

 1192 13:08:46.671712  PCI: 00:19.1 [8086/0000] bus ops

 1193 13:08:46.675341  PCI: 00:19.1 [8086/51c6] enabled

 1194 13:08:46.678254  PCI: 00:1e.0 [8086/0000] ops

 1195 13:08:46.682213  PCI: 00:1e.0 [8086/51a8] enabled

 1196 13:08:46.685579  PCI: 00:1e.3 [8086/0000] bus ops

 1197 13:08:46.689126  PCI: 00:1e.3 [8086/51ab] enabled

 1198 13:08:46.691752  PCI: 00:1f.0 [8086/0000] bus ops

 1199 13:08:46.695257  PCI: 00:1f.0 [8086/5182] enabled

 1200 13:08:46.695680  RTC Init

 1201 13:08:46.699037  Set power on after power failure.

 1202 13:08:46.701991  Disabling Deep S3

 1203 13:08:46.705413  Disabling Deep S3

 1204 13:08:46.705925  Disabling Deep S4

 1205 13:08:46.708582  Disabling Deep S4

 1206 13:08:46.709091  Disabling Deep S5

 1207 13:08:46.711759  Disabling Deep S5

 1208 13:08:46.715123  PCI: 00:1f.2 [0000/0000] hidden

 1209 13:08:46.718471  PCI: 00:1f.3 [8086/0000] bus ops

 1210 13:08:46.722367  PCI: 00:1f.3 [8086/51c8] enabled

 1211 13:08:46.725330  PCI: 00:1f.5 [8086/0000] bus ops

 1212 13:08:46.728820  PCI: 00:1f.5 [8086/51a4] enabled

 1213 13:08:46.729365  GPIO: 0 enabled

 1214 13:08:46.731977  PCI: Leftover static devices:

 1215 13:08:46.734942  PCI: 00:01.0

 1216 13:08:46.735367  PCI: 00:01.1

 1217 13:08:46.735800  PCI: 00:05.0

 1218 13:08:46.739034  PCI: 00:06.2

 1219 13:08:46.739565  PCI: 00:09.0

 1220 13:08:46.741915  PCI: 00:0d.1

 1221 13:08:46.742339  PCI: 00:0d.2

 1222 13:08:46.742843  PCI: 00:0d.3

 1223 13:08:46.745181  PCI: 00:0e.0

 1224 13:08:46.745703  PCI: 00:10.0

 1225 13:08:46.748735  PCI: 00:10.1

 1226 13:08:46.749229  PCI: 00:10.6

 1227 13:08:46.749573  PCI: 00:10.7

 1228 13:08:46.752270  PCI: 00:12.0

 1229 13:08:46.752834  PCI: 00:12.6

 1230 13:08:46.755541  PCI: 00:12.7

 1231 13:08:46.756046  PCI: 00:13.0

 1232 13:08:46.759063  PCI: 00:14.1

 1233 13:08:46.759483  PCI: 00:16.1

 1234 13:08:46.759816  PCI: 00:16.2

 1235 13:08:46.761875  PCI: 00:16.3

 1236 13:08:46.762290  PCI: 00:16.4

 1237 13:08:46.765213  PCI: 00:16.5

 1238 13:08:46.765634  PCI: 00:17.0

 1239 13:08:46.765965  PCI: 00:19.2

 1240 13:08:46.769014  PCI: 00:1a.0

 1241 13:08:46.769523  PCI: 00:1e.1

 1242 13:08:46.772111  PCI: 00:1e.2

 1243 13:08:46.772532  PCI: 00:1f.1

 1244 13:08:46.772865  PCI: 00:1f.4

 1245 13:08:46.775754  PCI: 00:1f.6

 1246 13:08:46.776266  PCI: 00:1f.7

 1247 13:08:46.778870  PCI: Check your devicetree.cb.

 1248 13:08:46.782060  PCI: 00:02.0 scanning...

 1249 13:08:46.785483  scan_generic_bus for PCI: 00:02.0

 1250 13:08:46.788738  scan_generic_bus for PCI: 00:02.0 done

 1251 13:08:46.795297  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1252 13:08:46.795722  PCI: 00:04.0 scanning...

 1253 13:08:46.799149  scan_generic_bus for PCI: 00:04.0

 1254 13:08:46.802350  GENERIC: 0.0 enabled

 1255 13:08:46.808660  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1256 13:08:46.812057  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1257 13:08:46.815262  PCI: 00:06.0 scanning...

 1258 13:08:46.818880  do_pci_scan_bridge for PCI: 00:06.0

 1259 13:08:46.822096  PCI: pci_scan_bus for bus 01

 1260 13:08:46.825584  PCI: 01:00.0 [15b7/5009] enabled

 1261 13:08:46.828646  Enabling Common Clock Configuration

 1262 13:08:46.832721  L1 Sub-State supported from root port 6

 1263 13:08:46.836110  L1 Sub-State Support = 0x5

 1264 13:08:46.838767  CommonModeRestoreTime = 0x6e

 1265 13:08:46.842070  Power On Value = 0x5, Power On Scale = 0x2

 1266 13:08:46.845397  ASPM: Enabled L1

 1267 13:08:46.848690  PCIe: Max_Payload_Size adjusted to 256

 1268 13:08:46.852524  PCI: 01:00.0: Enabled LTR

 1269 13:08:46.856054  PCI: 01:00.0: Programmed LTR max latencies

 1270 13:08:46.858909  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1271 13:08:46.862128  PCI: 00:0d.0 scanning...

 1272 13:08:46.865599  scan_static_bus for PCI: 00:0d.0

 1273 13:08:46.869121  USB0 port 0 enabled

 1274 13:08:46.872410  USB0 port 0 scanning...

 1275 13:08:46.876326  scan_static_bus for USB0 port 0

 1276 13:08:46.876853  USB3 port 0 enabled

 1277 13:08:46.878873  USB3 port 1 disabled

 1278 13:08:46.879280  USB3 port 2 enabled

 1279 13:08:46.882239  USB3 port 3 disabled

 1280 13:08:46.885761  USB3 port 0 scanning...

 1281 13:08:46.889493  scan_static_bus for USB3 port 0

 1282 13:08:46.892406  scan_static_bus for USB3 port 0 done

 1283 13:08:46.895909  scan_bus: bus USB3 port 0 finished in 6 msecs

 1284 13:08:46.899580  USB3 port 2 scanning...

 1285 13:08:46.903121  scan_static_bus for USB3 port 2

 1286 13:08:46.905999  scan_static_bus for USB3 port 2 done

 1287 13:08:46.909303  scan_bus: bus USB3 port 2 finished in 6 msecs

 1288 13:08:46.912966  scan_static_bus for USB0 port 0 done

 1289 13:08:46.919914  scan_bus: bus USB0 port 0 finished in 43 msecs

 1290 13:08:46.923280  scan_static_bus for PCI: 00:0d.0 done

 1291 13:08:46.925723  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1292 13:08:46.929471  PCI: 00:14.0 scanning...

 1293 13:08:46.932692  scan_static_bus for PCI: 00:14.0

 1294 13:08:46.936120  USB0 port 0 enabled

 1295 13:08:46.939343  USB0 port 0 scanning...

 1296 13:08:46.939820  scan_static_bus for USB0 port 0

 1297 13:08:46.942554  USB2 port 0 enabled

 1298 13:08:46.946146  USB2 port 1 disabled

 1299 13:08:46.946578  USB2 port 2 enabled

 1300 13:08:46.949390  USB2 port 3 disabled

 1301 13:08:46.952441  USB2 port 4 disabled

 1302 13:08:46.952853  USB2 port 5 enabled

 1303 13:08:46.955710  USB2 port 6 disabled

 1304 13:08:46.959500  USB2 port 7 disabled

 1305 13:08:46.959919  USB2 port 8 enabled

 1306 13:08:46.962367  USB2 port 9 enabled

 1307 13:08:46.962832  USB3 port 0 enabled

 1308 13:08:46.965994  USB3 port 1 disabled

 1309 13:08:46.969525  USB3 port 2 disabled

 1310 13:08:46.969946  USB3 port 3 disabled

 1311 13:08:46.972303  USB2 port 0 scanning...

 1312 13:08:46.975668  scan_static_bus for USB2 port 0

 1313 13:08:46.979104  scan_static_bus for USB2 port 0 done

 1314 13:08:46.986100  scan_bus: bus USB2 port 0 finished in 6 msecs

 1315 13:08:46.986528  USB2 port 2 scanning...

 1316 13:08:46.989840  scan_static_bus for USB2 port 2

 1317 13:08:46.992285  scan_static_bus for USB2 port 2 done

 1318 13:08:46.999034  scan_bus: bus USB2 port 2 finished in 6 msecs

 1319 13:08:46.999455  USB2 port 5 scanning...

 1320 13:08:47.002619  scan_static_bus for USB2 port 5

 1321 13:08:47.006048  scan_static_bus for USB2 port 5 done

 1322 13:08:47.012784  scan_bus: bus USB2 port 5 finished in 6 msecs

 1323 13:08:47.016002  USB2 port 8 scanning...

 1324 13:08:47.019205  scan_static_bus for USB2 port 8

 1325 13:08:47.023069  scan_static_bus for USB2 port 8 done

 1326 13:08:47.026333  scan_bus: bus USB2 port 8 finished in 6 msecs

 1327 13:08:47.029595  USB2 port 9 scanning...

 1328 13:08:47.033210  scan_static_bus for USB2 port 9

 1329 13:08:47.036210  scan_static_bus for USB2 port 9 done

 1330 13:08:47.039510  scan_bus: bus USB2 port 9 finished in 6 msecs

 1331 13:08:47.043126  USB3 port 0 scanning...

 1332 13:08:47.046078  scan_static_bus for USB3 port 0

 1333 13:08:47.049853  scan_static_bus for USB3 port 0 done

 1334 13:08:47.053075  scan_bus: bus USB3 port 0 finished in 6 msecs

 1335 13:08:47.060010  scan_static_bus for USB0 port 0 done

 1336 13:08:47.062779  scan_bus: bus USB0 port 0 finished in 120 msecs

 1337 13:08:47.066186  scan_static_bus for PCI: 00:14.0 done

 1338 13:08:47.072981  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1339 13:08:47.073520  PCI: 00:14.3 scanning...

 1340 13:08:47.076695  scan_static_bus for PCI: 00:14.3

 1341 13:08:47.079827  GENERIC: 0.0 enabled

 1342 13:08:47.083284  scan_static_bus for PCI: 00:14.3 done

 1343 13:08:47.086255  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1344 13:08:47.089880  PCI: 00:15.0 scanning...

 1345 13:08:47.093485  scan_static_bus for PCI: 00:15.0

 1346 13:08:47.096205  I2C: 00:1a enabled

 1347 13:08:47.096635  I2C: 00:31 enabled

 1348 13:08:47.099643  I2C: 00:32 enabled

 1349 13:08:47.103195  scan_static_bus for PCI: 00:15.0 done

 1350 13:08:47.109637  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1351 13:08:47.110145  PCI: 00:15.1 scanning...

 1352 13:08:47.113460  scan_static_bus for PCI: 00:15.1

 1353 13:08:47.116010  I2C: 00:50 enabled

 1354 13:08:47.119484  scan_static_bus for PCI: 00:15.1 done

 1355 13:08:47.123153  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1356 13:08:47.126664  PCI: 00:15.3 scanning...

 1357 13:08:47.129447  scan_static_bus for PCI: 00:15.3

 1358 13:08:47.133158  I2C: 00:10 enabled

 1359 13:08:47.136427  scan_static_bus for PCI: 00:15.3 done

 1360 13:08:47.139843  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1361 13:08:47.143189  PCI: 00:19.1 scanning...

 1362 13:08:47.146504  scan_static_bus for PCI: 00:19.1

 1363 13:08:47.149384  I2C: 00:15 enabled

 1364 13:08:47.149798  I2C: 00:2c enabled

 1365 13:08:47.152930  scan_static_bus for PCI: 00:19.1 done

 1366 13:08:47.159793  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1367 13:08:47.162780  PCI: 00:1e.3 scanning...

 1368 13:08:47.166008  scan_generic_bus for PCI: 00:1e.3

 1369 13:08:47.166425  SPI: 00 enabled

 1370 13:08:47.173174  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1371 13:08:47.176264  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1372 13:08:47.179555  PCI: 00:1f.0 scanning...

 1373 13:08:47.183080  scan_static_bus for PCI: 00:1f.0

 1374 13:08:47.186513  PNP: 0c09.0 enabled

 1375 13:08:47.187042  PNP: 0c09.0 scanning...

 1376 13:08:47.189893  scan_static_bus for PNP: 0c09.0

 1377 13:08:47.196438  scan_static_bus for PNP: 0c09.0 done

 1378 13:08:47.199956  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1379 13:08:47.202978  scan_static_bus for PCI: 00:1f.0 done

 1380 13:08:47.206641  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1381 13:08:47.209833  PCI: 00:1f.2 scanning...

 1382 13:08:47.213104  scan_static_bus for PCI: 00:1f.2

 1383 13:08:47.216430  GENERIC: 0.0 enabled

 1384 13:08:47.219842  GENERIC: 0.0 scanning...

 1385 13:08:47.223266  scan_static_bus for GENERIC: 0.0

 1386 13:08:47.223757  GENERIC: 0.0 enabled

 1387 13:08:47.226705  GENERIC: 1.0 enabled

 1388 13:08:47.229974  scan_static_bus for GENERIC: 0.0 done

 1389 13:08:47.233436  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1390 13:08:47.239770  scan_static_bus for PCI: 00:1f.2 done

 1391 13:08:47.243493  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1392 13:08:47.246482  PCI: 00:1f.3 scanning...

 1393 13:08:47.250249  scan_static_bus for PCI: 00:1f.3

 1394 13:08:47.253125  scan_static_bus for PCI: 00:1f.3 done

 1395 13:08:47.256591  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1396 13:08:47.259822  PCI: 00:1f.5 scanning...

 1397 13:08:47.263173  scan_generic_bus for PCI: 00:1f.5

 1398 13:08:47.266786  scan_generic_bus for PCI: 00:1f.5 done

 1399 13:08:47.273335  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1400 13:08:47.276797  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1401 13:08:47.280170  scan_static_bus for Root Device done

 1402 13:08:47.287108  scan_bus: bus Root Device finished in 729 msecs

 1403 13:08:47.287552  done

 1404 13:08:47.293310  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms

 1405 13:08:47.296535  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1406 13:08:47.303650  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1407 13:08:47.306960  SPI flash protection: WPSW=0 SRP0=0

 1408 13:08:47.314003  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1409 13:08:47.316774  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1410 13:08:47.320213  found VGA at PCI: 00:02.0

 1411 13:08:47.323801  Setting up VGA for PCI: 00:02.0

 1412 13:08:47.330403  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1413 13:08:47.333736  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1414 13:08:47.337250  Allocating resources...

 1415 13:08:47.340150  Reading resources...

 1416 13:08:47.343811  Root Device read_resources bus 0 link: 0

 1417 13:08:47.346874  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1418 13:08:47.353824  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1419 13:08:47.357146  DOMAIN: 0000 read_resources bus 0 link: 0

 1420 13:08:47.364376  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1421 13:08:47.370629  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1422 13:08:47.373998  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1423 13:08:47.381077  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1424 13:08:47.387800  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1425 13:08:47.394480  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1426 13:08:47.400919  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1427 13:08:47.408023  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1428 13:08:47.414536  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1429 13:08:47.420836  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1430 13:08:47.427947  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1431 13:08:47.434333  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1432 13:08:47.438059  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1433 13:08:47.444611  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1434 13:08:47.451306  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1435 13:08:47.458260  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1436 13:08:47.464521  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1437 13:08:47.471764  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1438 13:08:47.478036  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1439 13:08:47.481490  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1440 13:08:47.488286  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1441 13:08:47.494612  PCI: 00:04.0 read_resources bus 1 link: 0

 1442 13:08:47.498340  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1443 13:08:47.501516  PCI: 00:06.0 read_resources bus 1 link: 0

 1444 13:08:47.507883  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1445 13:08:47.511752  PCI: 00:0d.0 read_resources bus 0 link: 0

 1446 13:08:47.515023  USB0 port 0 read_resources bus 0 link: 0

 1447 13:08:47.518329  USB0 port 0 read_resources bus 0 link: 0 done

 1448 13:08:47.525095  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1449 13:08:47.528625  PCI: 00:14.0 read_resources bus 0 link: 0

 1450 13:08:47.531817  USB0 port 0 read_resources bus 0 link: 0

 1451 13:08:47.538261  USB0 port 0 read_resources bus 0 link: 0 done

 1452 13:08:47.541792  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1453 13:08:47.548765  PCI: 00:14.3 read_resources bus 0 link: 0

 1454 13:08:47.551891  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1455 13:08:47.555270  PCI: 00:15.0 read_resources bus 0 link: 0

 1456 13:08:47.562059  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1457 13:08:47.564961  PCI: 00:15.1 read_resources bus 0 link: 0

 1458 13:08:47.568303  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1459 13:08:47.575255  PCI: 00:15.3 read_resources bus 0 link: 0

 1460 13:08:47.579140  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1461 13:08:47.581917  PCI: 00:19.1 read_resources bus 0 link: 0

 1462 13:08:47.588471  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1463 13:08:47.591740  PCI: 00:1e.3 read_resources bus 2 link: 0

 1464 13:08:47.595270  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1465 13:08:47.601789  PCI: 00:1f.0 read_resources bus 0 link: 0

 1466 13:08:47.605283  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1467 13:08:47.608526  PCI: 00:1f.2 read_resources bus 0 link: 0

 1468 13:08:47.615324  GENERIC: 0.0 read_resources bus 0 link: 0

 1469 13:08:47.618460  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1470 13:08:47.621991  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1471 13:08:47.628770  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1472 13:08:47.632152  Root Device read_resources bus 0 link: 0 done

 1473 13:08:47.635239  Done reading resources.

 1474 13:08:47.642025  Show resources in subtree (Root Device)...After reading.

 1475 13:08:47.645373   Root Device child on link 0 CPU_CLUSTER: 0

 1476 13:08:47.649048    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1477 13:08:47.652092     APIC: 00

 1478 13:08:47.652543     APIC: 12

 1479 13:08:47.652875     APIC: 14

 1480 13:08:47.655406     APIC: 16

 1481 13:08:47.655833     APIC: 10

 1482 13:08:47.658798     APIC: 01

 1483 13:08:47.659219     APIC: 09

 1484 13:08:47.659553     APIC: 08

 1485 13:08:47.665973    DOMAIN: 0000 child on link 0 GPIO: 0

 1486 13:08:47.672066    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1487 13:08:47.682214    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1488 13:08:47.685405     GPIO: 0

 1489 13:08:47.685820     PCI: 00:00.0

 1490 13:08:47.695624     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1491 13:08:47.705504     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1492 13:08:47.712475     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1493 13:08:47.722542     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1494 13:08:47.732436     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1495 13:08:47.742572     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1496 13:08:47.752176     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1497 13:08:47.762790     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1498 13:08:47.768782     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1499 13:08:47.779274     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1500 13:08:47.789279     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1501 13:08:47.799420     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1502 13:08:47.809274     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1503 13:08:47.818871     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1504 13:08:47.825780     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1505 13:08:47.835630     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1506 13:08:47.846074     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1507 13:08:47.856012     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1508 13:08:47.866258     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1509 13:08:47.876349     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1510 13:08:47.886178     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1511 13:08:47.893052     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1512 13:08:47.902715     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1513 13:08:47.913088     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1514 13:08:47.922916     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1515 13:08:47.932844     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1516 13:08:47.943024     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1517 13:08:47.952839     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1518 13:08:47.953354     PCI: 00:02.0

 1519 13:08:47.962829     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1520 13:08:47.973020     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1521 13:08:47.982977     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1522 13:08:47.986335     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1523 13:08:47.996022     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1524 13:08:47.999880      GENERIC: 0.0

 1525 13:08:48.002967     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1526 13:08:48.013185     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1527 13:08:48.023068     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1528 13:08:48.029824     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1529 13:08:48.033127      PCI: 01:00.0

 1530 13:08:48.043340      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1531 13:08:48.053232      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1532 13:08:48.053722     PCI: 00:08.0

 1533 13:08:48.056343     PCI: 00:0a.0

 1534 13:08:48.066573     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1535 13:08:48.069983     PCI: 00:0d.0 child on link 0 USB0 port 0

 1536 13:08:48.079996     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1537 13:08:48.083361      USB0 port 0 child on link 0 USB3 port 0

 1538 13:08:48.086458       USB3 port 0

 1539 13:08:48.086978       USB3 port 1

 1540 13:08:48.089846       USB3 port 2

 1541 13:08:48.090398       USB3 port 3

 1542 13:08:48.096501     PCI: 00:14.0 child on link 0 USB0 port 0

 1543 13:08:48.106490     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1544 13:08:48.109548      USB0 port 0 child on link 0 USB2 port 0

 1545 13:08:48.113008       USB2 port 0

 1546 13:08:48.113429       USB2 port 1

 1547 13:08:48.116279       USB2 port 2

 1548 13:08:48.116707       USB2 port 3

 1549 13:08:48.119678       USB2 port 4

 1550 13:08:48.120106       USB2 port 5

 1551 13:08:48.123095       USB2 port 6

 1552 13:08:48.123530       USB2 port 7

 1553 13:08:48.126082       USB2 port 8

 1554 13:08:48.126494       USB2 port 9

 1555 13:08:48.129705       USB3 port 0

 1556 13:08:48.130207       USB3 port 1

 1557 13:08:48.133240       USB3 port 2

 1558 13:08:48.136698       USB3 port 3

 1559 13:08:48.137182     PCI: 00:14.2

 1560 13:08:48.146418     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1561 13:08:48.156221     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1562 13:08:48.159653     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1563 13:08:48.170094     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1564 13:08:48.173308      GENERIC: 0.0

 1565 13:08:48.176464     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1566 13:08:48.186903     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1567 13:08:48.189727      I2C: 00:1a

 1568 13:08:48.190131      I2C: 00:31

 1569 13:08:48.193243      I2C: 00:32

 1570 13:08:48.196499     PCI: 00:15.1 child on link 0 I2C: 00:50

 1571 13:08:48.206431     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1572 13:08:48.206977      I2C: 00:50

 1573 13:08:48.209741     PCI: 00:15.2

 1574 13:08:48.213340     PCI: 00:15.3 child on link 0 I2C: 00:10

 1575 13:08:48.223439     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1576 13:08:48.223919      I2C: 00:10

 1577 13:08:48.226844     PCI: 00:16.0

 1578 13:08:48.236862     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1579 13:08:48.237347     PCI: 00:19.0

 1580 13:08:48.243309     PCI: 00:19.1 child on link 0 I2C: 00:15

 1581 13:08:48.253223     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1582 13:08:48.253722      I2C: 00:15

 1583 13:08:48.256608      I2C: 00:2c

 1584 13:08:48.257108     PCI: 00:1e.0

 1585 13:08:48.270433     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1586 13:08:48.273355     PCI: 00:1e.3 child on link 0 SPI: 00

 1587 13:08:48.283239     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1588 13:08:48.283656      SPI: 00

 1589 13:08:48.286712     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1590 13:08:48.296560     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1591 13:08:48.300351      PNP: 0c09.0

 1592 13:08:48.306890      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1593 13:08:48.310206     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1594 13:08:48.320012     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1595 13:08:48.330221     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1596 13:08:48.333398      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1597 13:08:48.337152       GENERIC: 0.0

 1598 13:08:48.340057       GENERIC: 1.0

 1599 13:08:48.340470     PCI: 00:1f.3

 1600 13:08:48.350105     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1601 13:08:48.360542     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1602 13:08:48.363589     PCI: 00:1f.5

 1603 13:08:48.370369     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1604 13:08:48.376990  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1605 13:08:48.383608   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1606 13:08:48.390268   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1607 13:08:48.396999   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1608 13:08:48.400574    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1609 13:08:48.403974    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1610 13:08:48.410728   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1611 13:08:48.420396   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1612 13:08:48.427746   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1613 13:08:48.433798  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1614 13:08:48.440422  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1615 13:08:48.447260   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1616 13:08:48.454078   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1617 13:08:48.463720   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1618 13:08:48.467271   DOMAIN: 0000: Resource ranges:

 1619 13:08:48.470465   * Base: 1000, Size: 800, Tag: 100

 1620 13:08:48.474044   * Base: 1900, Size: e700, Tag: 100

 1621 13:08:48.477340    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1622 13:08:48.483774  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1623 13:08:48.490607  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1624 13:08:48.500884   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1625 13:08:48.507323   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1626 13:08:48.514116   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1627 13:08:48.524325   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1628 13:08:48.531117   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1629 13:08:48.537562   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1630 13:08:48.547763   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1631 13:08:48.554427   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1632 13:08:48.560843   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1633 13:08:48.570953   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1634 13:08:48.577891   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1635 13:08:48.584655   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1636 13:08:48.591268   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1637 13:08:48.601305   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1638 13:08:48.607880   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1639 13:08:48.614521   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1640 13:08:48.624363   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1641 13:08:48.631227   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1642 13:08:48.638094   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1643 13:08:48.648284   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1644 13:08:48.655128   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1645 13:08:48.661175   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1646 13:08:48.667776   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1647 13:08:48.677934   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1648 13:08:48.685005   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1649 13:08:48.691390   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1650 13:08:48.701509   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1651 13:08:48.708257   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1652 13:08:48.714911   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1653 13:08:48.724734   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1654 13:08:48.728078   DOMAIN: 0000: Resource ranges:

 1655 13:08:48.731502   * Base: 80400000, Size: 3fc00000, Tag: 200

 1656 13:08:48.734733   * Base: d0000000, Size: 28000000, Tag: 200

 1657 13:08:48.741731   * Base: fa000000, Size: 1000000, Tag: 200

 1658 13:08:48.744978   * Base: fb001000, Size: 17ff000, Tag: 200

 1659 13:08:48.748571   * Base: fe800000, Size: 300000, Tag: 200

 1660 13:08:48.751885   * Base: feb80000, Size: 80000, Tag: 200

 1661 13:08:48.758557   * Base: fed00000, Size: 40000, Tag: 200

 1662 13:08:48.761896   * Base: fed70000, Size: 10000, Tag: 200

 1663 13:08:48.764941   * Base: fed88000, Size: 8000, Tag: 200

 1664 13:08:48.768463   * Base: fed93000, Size: d000, Tag: 200

 1665 13:08:48.771682   * Base: feda2000, Size: 1e000, Tag: 200

 1666 13:08:48.778165   * Base: fede0000, Size: 1220000, Tag: 200

 1667 13:08:48.781783   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1668 13:08:48.788529    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1669 13:08:48.795392    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1670 13:08:48.801871    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1671 13:08:48.808476    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1672 13:08:48.815303    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1673 13:08:48.821740    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1674 13:08:48.828653    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1675 13:08:48.835351    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1676 13:08:48.842056    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1677 13:08:48.848962    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1678 13:08:48.855322    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1679 13:08:48.862091    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1680 13:08:48.868699    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1681 13:08:48.875256    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1682 13:08:48.881798    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1683 13:08:48.888783    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1684 13:08:48.895690    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1685 13:08:48.901724    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1686 13:08:48.908847    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1687 13:08:48.915170  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1688 13:08:48.925298  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1689 13:08:48.928870   PCI: 00:06.0: Resource ranges:

 1690 13:08:48.932391   * Base: 80400000, Size: 100000, Tag: 200

 1691 13:08:48.938444    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1692 13:08:48.945600    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1693 13:08:48.951791  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1694 13:08:48.958609  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1695 13:08:48.965198  Root Device assign_resources, bus 0 link: 0

 1696 13:08:48.968718  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1697 13:08:48.978651  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1698 13:08:48.985404  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1699 13:08:48.992284  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1700 13:08:49.002126  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1701 13:08:49.005439  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1702 13:08:49.012135  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1703 13:08:49.018504  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1704 13:08:49.028540  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1705 13:08:49.038783  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1706 13:08:49.042395  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1707 13:08:49.048701  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1708 13:08:49.059129  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1709 13:08:49.061897  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1710 13:08:49.071687  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1711 13:08:49.078556  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1712 13:08:49.085842  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1713 13:08:49.088703  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1714 13:08:49.095140  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1715 13:08:49.102398  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1716 13:08:49.105432  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1717 13:08:49.115132  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1718 13:08:49.121757  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1719 13:08:49.128214  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1720 13:08:49.135191  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1721 13:08:49.138318  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1722 13:08:49.148927  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1723 13:08:49.152035  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1724 13:08:49.159263  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1725 13:08:49.165863  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1726 13:08:49.168575  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1727 13:08:49.175307  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1728 13:08:49.181937  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1729 13:08:49.188342  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1730 13:08:49.192095  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1731 13:08:49.198480  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1732 13:08:49.208945  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1733 13:08:49.211775  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1734 13:08:49.218307  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1735 13:08:49.225646  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1736 13:08:49.228739  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1737 13:08:49.235084  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1738 13:08:49.238480  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1739 13:08:49.245106  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1740 13:08:49.248405  LPC: Trying to open IO window from 800 size 1ff

 1741 13:08:49.258796  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1742 13:08:49.264858  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1743 13:08:49.271871  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1744 13:08:49.278353  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1745 13:08:49.281449  Root Device assign_resources, bus 0 link: 0 done

 1746 13:08:49.285234  Done setting resources.

 1747 13:08:49.291688  Show resources in subtree (Root Device)...After assigning values.

 1748 13:08:49.295322   Root Device child on link 0 CPU_CLUSTER: 0

 1749 13:08:49.301768    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1750 13:08:49.302301     APIC: 00

 1751 13:08:49.302671     APIC: 12

 1752 13:08:49.305388     APIC: 14

 1753 13:08:49.305905     APIC: 16

 1754 13:08:49.308566     APIC: 10

 1755 13:08:49.309096     APIC: 01

 1756 13:08:49.309431     APIC: 09

 1757 13:08:49.312130     APIC: 08

 1758 13:08:49.314775    DOMAIN: 0000 child on link 0 GPIO: 0

 1759 13:08:49.325423    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1760 13:08:49.334762    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1761 13:08:49.335294     GPIO: 0

 1762 13:08:49.338463     PCI: 00:00.0

 1763 13:08:49.344801     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1764 13:08:49.354993     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1765 13:08:49.364830     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1766 13:08:49.374415     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1767 13:08:49.384792     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1768 13:08:49.394515     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1769 13:08:49.401365     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1770 13:08:49.411066     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1771 13:08:49.421040     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1772 13:08:49.431435     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1773 13:08:49.441153     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1774 13:08:49.451486     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1775 13:08:49.457822     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1776 13:08:49.468455     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1777 13:08:49.477832     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1778 13:08:49.488002     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1779 13:08:49.498263     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1780 13:08:49.508120     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1781 13:08:49.517665     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1782 13:08:49.528142     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1783 13:08:49.534303     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1784 13:08:49.544529     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1785 13:08:49.554822     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1786 13:08:49.564085     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1787 13:08:49.574349     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1788 13:08:49.584795     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1789 13:08:49.590988     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1790 13:08:49.601126     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1791 13:08:49.604006     PCI: 00:02.0

 1792 13:08:49.614181     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1793 13:08:49.624410     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1794 13:08:49.633755     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1795 13:08:49.637268     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1796 13:08:49.650429     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1797 13:08:49.650909      GENERIC: 0.0

 1798 13:08:49.653836     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1799 13:08:49.663868     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1800 13:08:49.677381     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1801 13:08:49.686995     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1802 13:08:49.687590      PCI: 01:00.0

 1803 13:08:49.700460      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1804 13:08:49.710728      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1805 13:08:49.711358     PCI: 00:08.0

 1806 13:08:49.713787     PCI: 00:0a.0

 1807 13:08:49.723952     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1808 13:08:49.727491     PCI: 00:0d.0 child on link 0 USB0 port 0

 1809 13:08:49.737080     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1810 13:08:49.744025      USB0 port 0 child on link 0 USB3 port 0

 1811 13:08:49.744653       USB3 port 0

 1812 13:08:49.746719       USB3 port 1

 1813 13:08:49.747141       USB3 port 2

 1814 13:08:49.750112       USB3 port 3

 1815 13:08:49.753377     PCI: 00:14.0 child on link 0 USB0 port 0

 1816 13:08:49.763783     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1817 13:08:49.766802      USB0 port 0 child on link 0 USB2 port 0

 1818 13:08:49.770199       USB2 port 0

 1819 13:08:49.773936       USB2 port 1

 1820 13:08:49.774485       USB2 port 2

 1821 13:08:49.776613       USB2 port 3

 1822 13:08:49.777116       USB2 port 4

 1823 13:08:49.780335       USB2 port 5

 1824 13:08:49.780872       USB2 port 6

 1825 13:08:49.783363       USB2 port 7

 1826 13:08:49.783782       USB2 port 8

 1827 13:08:49.786739       USB2 port 9

 1828 13:08:49.787160       USB3 port 0

 1829 13:08:49.789994       USB3 port 1

 1830 13:08:49.790413       USB3 port 2

 1831 13:08:49.793430       USB3 port 3

 1832 13:08:49.793850     PCI: 00:14.2

 1833 13:08:49.806788     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1834 13:08:49.816720     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1835 13:08:49.819794     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1836 13:08:49.830247     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1837 13:08:49.833444      GENERIC: 0.0

 1838 13:08:49.837037     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1839 13:08:49.846360     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1840 13:08:49.849572      I2C: 00:1a

 1841 13:08:49.849990      I2C: 00:31

 1842 13:08:49.853376      I2C: 00:32

 1843 13:08:49.856657     PCI: 00:15.1 child on link 0 I2C: 00:50

 1844 13:08:49.866274     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1845 13:08:49.866801      I2C: 00:50

 1846 13:08:49.869802     PCI: 00:15.2

 1847 13:08:49.873249     PCI: 00:15.3 child on link 0 I2C: 00:10

 1848 13:08:49.883250     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1849 13:08:49.886134      I2C: 00:10

 1850 13:08:49.886551     PCI: 00:16.0

 1851 13:08:49.896559     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1852 13:08:49.899831     PCI: 00:19.0

 1853 13:08:49.903131     PCI: 00:19.1 child on link 0 I2C: 00:15

 1854 13:08:49.912764     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1855 13:08:49.916529      I2C: 00:15

 1856 13:08:49.916948      I2C: 00:2c

 1857 13:08:49.919637     PCI: 00:1e.0

 1858 13:08:49.929885     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1859 13:08:49.933242     PCI: 00:1e.3 child on link 0 SPI: 00

 1860 13:08:49.943245     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1861 13:08:49.946307      SPI: 00

 1862 13:08:49.949692     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1863 13:08:49.960011     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1864 13:08:49.960542      PNP: 0c09.0

 1865 13:08:49.969664      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1866 13:08:49.972873     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1867 13:08:49.982731     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1868 13:08:49.992769     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1869 13:08:49.996704      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1870 13:08:49.999538       GENERIC: 0.0

 1871 13:08:49.999963       GENERIC: 1.0

 1872 13:08:50.002570     PCI: 00:1f.3

 1873 13:08:50.013117     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1874 13:08:50.022924     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1875 13:08:50.025903     PCI: 00:1f.5

 1876 13:08:50.035841     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1877 13:08:50.039109  Done allocating resources.

 1878 13:08:50.042965  BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms

 1879 13:08:50.049899  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1880 13:08:50.053137  Configure audio over I2S with MAX98373 NAU88L25B.

 1881 13:08:50.058815  Enabling BT offload

 1882 13:08:50.066215  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1883 13:08:50.069455  Enabling resources...

 1884 13:08:50.072735  PCI: 00:00.0 subsystem <- 8086/4609

 1885 13:08:50.076269  PCI: 00:00.0 cmd <- 06

 1886 13:08:50.079377  PCI: 00:02.0 subsystem <- 8086/46b3

 1887 13:08:50.082542  PCI: 00:02.0 cmd <- 03

 1888 13:08:50.086254  PCI: 00:04.0 subsystem <- 8086/461d

 1889 13:08:50.086815  PCI: 00:04.0 cmd <- 02

 1890 13:08:50.089642  PCI: 00:06.0 bridge ctrl <- 0013

 1891 13:08:50.092777  PCI: 00:06.0 subsystem <- 8086/464d

 1892 13:08:50.095861  PCI: 00:06.0 cmd <- 106

 1893 13:08:50.099209  PCI: 00:0a.0 subsystem <- 8086/467d

 1894 13:08:50.102624  PCI: 00:0a.0 cmd <- 02

 1895 13:08:50.106284  PCI: 00:0d.0 subsystem <- 8086/461e

 1896 13:08:50.109377  PCI: 00:0d.0 cmd <- 02

 1897 13:08:50.112617  PCI: 00:14.0 subsystem <- 8086/51ed

 1898 13:08:50.115678  PCI: 00:14.0 cmd <- 02

 1899 13:08:50.119002  PCI: 00:14.2 subsystem <- 8086/51ef

 1900 13:08:50.119518  PCI: 00:14.2 cmd <- 02

 1901 13:08:50.126096  PCI: 00:14.3 subsystem <- 8086/51f0

 1902 13:08:50.126818  PCI: 00:14.3 cmd <- 02

 1903 13:08:50.129224  PCI: 00:15.0 subsystem <- 8086/51e8

 1904 13:08:50.132697  PCI: 00:15.0 cmd <- 02

 1905 13:08:50.135736  PCI: 00:15.1 subsystem <- 8086/51e9

 1906 13:08:50.139095  PCI: 00:15.1 cmd <- 06

 1907 13:08:50.142647  PCI: 00:15.3 subsystem <- 8086/51eb

 1908 13:08:50.145823  PCI: 00:15.3 cmd <- 02

 1909 13:08:50.149215  PCI: 00:16.0 subsystem <- 8086/51e0

 1910 13:08:50.149774  PCI: 00:16.0 cmd <- 02

 1911 13:08:50.155912  PCI: 00:19.1 subsystem <- 8086/51c6

 1912 13:08:50.156397  PCI: 00:19.1 cmd <- 02

 1913 13:08:50.159181  PCI: 00:1e.0 subsystem <- 8086/51a8

 1914 13:08:50.162452  PCI: 00:1e.0 cmd <- 06

 1915 13:08:50.165826  PCI: 00:1e.3 subsystem <- 8086/51ab

 1916 13:08:50.168712  PCI: 00:1e.3 cmd <- 02

 1917 13:08:50.172178  PCI: 00:1f.0 subsystem <- 8086/5182

 1918 13:08:50.175923  PCI: 00:1f.0 cmd <- 407

 1919 13:08:50.179072  PCI: 00:1f.3 subsystem <- 8086/51c8

 1920 13:08:50.179494  PCI: 00:1f.3 cmd <- 02

 1921 13:08:50.186120  PCI: 00:1f.5 subsystem <- 8086/51a4

 1922 13:08:50.186679  PCI: 00:1f.5 cmd <- 406

 1923 13:08:50.189165  PCI: 01:00.0 cmd <- 02

 1924 13:08:50.189679  done.

 1925 13:08:50.195962  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1926 13:08:50.199129  ME: Version: Unavailable

 1927 13:08:50.202969  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1928 13:08:50.205971  Initializing devices...

 1929 13:08:50.209033  Root Device init

 1930 13:08:50.209452  mainboard: EC init

 1931 13:08:50.215572  Chrome EC: Set SMI mask to 0x0000000000000000

 1932 13:08:50.219264  Chrome EC: UHEPI supported

 1933 13:08:50.222030  Chrome EC: clear events_b mask to 0x0000000000000000

 1934 13:08:50.229138  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1935 13:08:50.235252  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1936 13:08:50.241915  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1937 13:08:50.245250  Chrome EC: Set WAKE mask to 0x0000000000000000

 1938 13:08:50.252043  Root Device init finished in 39 msecs

 1939 13:08:50.252581  PCI: 00:00.0 init

 1940 13:08:50.255179  CPU TDP = 15 Watts

 1941 13:08:50.258631  CPU PL1 = 15 Watts

 1942 13:08:50.259055  CPU PL2 = 55 Watts

 1943 13:08:50.262207  CPU PL4 = 123 Watts

 1944 13:08:50.265631  PCI: 00:00.0 init finished in 8 msecs

 1945 13:08:50.268335  PCI: 00:02.0 init

 1946 13:08:50.268772  GMA: Found VBT in CBFS

 1947 13:08:50.271715  GMA: Found valid VBT in CBFS

 1948 13:08:50.278674  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1949 13:08:50.285403                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1950 13:08:50.288750  PCI: 00:02.0 init finished in 18 msecs

 1951 13:08:50.292170  PCI: 00:06.0 init

 1952 13:08:50.295482  Initializing PCH PCIe bridge.

 1953 13:08:50.298664  PCI: 00:06.0 init finished in 3 msecs

 1954 13:08:50.299176  PCI: 00:0a.0 init

 1955 13:08:50.305325  PCI: 00:0a.0 init finished in 0 msecs

 1956 13:08:50.305807  PCI: 00:14.0 init

 1957 13:08:50.308778  PCI: 00:14.0 init finished in 0 msecs

 1958 13:08:50.312018  PCI: 00:14.2 init

 1959 13:08:50.315021  PCI: 00:14.2 init finished in 0 msecs

 1960 13:08:50.318732  PCI: 00:15.0 init

 1961 13:08:50.319233  I2C bus 0 version 0x3230302a

 1962 13:08:50.325352  DW I2C bus 0 at 0x80655000 (400 KHz)

 1963 13:08:50.328831  PCI: 00:15.0 init finished in 6 msecs

 1964 13:08:50.329337  PCI: 00:15.1 init

 1965 13:08:50.331907  I2C bus 1 version 0x3230302a

 1966 13:08:50.335124  DW I2C bus 1 at 0x80656000 (400 KHz)

 1967 13:08:50.338311  PCI: 00:15.1 init finished in 6 msecs

 1968 13:08:50.341922  PCI: 00:15.3 init

 1969 13:08:50.344896  I2C bus 3 version 0x3230302a

 1970 13:08:50.348623  DW I2C bus 3 at 0x80657000 (400 KHz)

 1971 13:08:50.351791  PCI: 00:15.3 init finished in 6 msecs

 1972 13:08:50.354846  PCI: 00:16.0 init

 1973 13:08:50.358378  PCI: 00:16.0 init finished in 0 msecs

 1974 13:08:50.358934  PCI: 00:19.1 init

 1975 13:08:50.361840  I2C bus 5 version 0x3230302a

 1976 13:08:50.364625  DW I2C bus 5 at 0x80659000 (400 KHz)

 1977 13:08:50.371407  PCI: 00:19.1 init finished in 6 msecs

 1978 13:08:50.371825  PCI: 00:1f.0 init

 1979 13:08:50.378322  IOAPIC: Initializing IOAPIC at 0xfec00000

 1980 13:08:50.378783  IOAPIC: ID = 0x02

 1981 13:08:50.381284  IOAPIC: Dumping registers

 1982 13:08:50.384932    reg 0x0000: 0x02000000

 1983 13:08:50.385349    reg 0x0001: 0x00770020

 1984 13:08:50.388308    reg 0x0002: 0x00000000

 1985 13:08:50.391278  IOAPIC: 120 interrupts

 1986 13:08:50.394770  IOAPIC: Clearing IOAPIC at 0xfec00000

 1987 13:08:50.398149  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1988 13:08:50.404892  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1989 13:08:50.408449  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1990 13:08:50.414817  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1991 13:08:50.418419  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1992 13:08:50.424836  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1993 13:08:50.428202  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1994 13:08:50.434373  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1995 13:08:50.437608  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1996 13:08:50.441441  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1997 13:08:50.447836  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1998 13:08:50.451398  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1999 13:08:50.458044  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2000 13:08:50.461341  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2001 13:08:50.467644  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2002 13:08:50.471197  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2003 13:08:50.477928  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2004 13:08:50.480909  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2005 13:08:50.484460  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2006 13:08:50.490926  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2007 13:08:50.494241  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2008 13:08:50.501094  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2009 13:08:50.504564  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2010 13:08:50.511324  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2011 13:08:50.514366  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2012 13:08:50.521238  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2013 13:08:50.525222  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2014 13:08:50.528722  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2015 13:08:50.535418  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2016 13:08:50.538701  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2017 13:08:50.542353  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2018 13:08:50.548743  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2019 13:08:50.552019  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2020 13:08:50.558703  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2021 13:08:50.562180  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2022 13:08:50.568648  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2023 13:08:50.571911  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2024 13:08:50.578305  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2025 13:08:50.581924  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2026 13:08:50.585172  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2027 13:08:50.591618  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2028 13:08:50.595242  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2029 13:08:50.602198  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2030 13:08:50.604914  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2031 13:08:50.611951  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2032 13:08:50.614953  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2033 13:08:50.618502  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2034 13:08:50.624873  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2035 13:08:50.628487  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2036 13:08:50.635613  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2037 13:08:50.638695  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2038 13:08:50.645176  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2039 13:08:50.648407  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2040 13:08:50.654904  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2041 13:08:50.658660  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2042 13:08:50.661877  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2043 13:08:50.668643  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2044 13:08:50.671780  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2045 13:08:50.678408  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2046 13:08:50.681744  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2047 13:08:50.688463  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2048 13:08:50.691960  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2049 13:08:50.698819  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2050 13:08:50.701720  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2051 13:08:50.704823  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2052 13:08:50.711907  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2053 13:08:50.714825  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2054 13:08:50.721860  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2055 13:08:50.724784  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2056 13:08:50.731507  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2057 13:08:50.734682  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2058 13:08:50.738369  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2059 13:08:50.744762  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2060 13:08:50.747922  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2061 13:08:50.754479  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2062 13:08:50.757939  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2063 13:08:50.765160  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2064 13:08:50.767756  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2065 13:08:50.774952  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2066 13:08:50.778307  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2067 13:08:50.781071  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2068 13:08:50.788395  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2069 13:08:50.791374  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2070 13:08:50.797787  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2071 13:08:50.801170  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2072 13:08:50.807962  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2073 13:08:50.811471  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2074 13:08:50.817799  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2075 13:08:50.821308  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2076 13:08:50.824518  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2077 13:08:50.831270  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2078 13:08:50.834313  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2079 13:08:50.841176  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2080 13:08:50.844704  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2081 13:08:50.851601  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2082 13:08:50.854425  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2083 13:08:50.857878  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2084 13:08:50.864525  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2085 13:08:50.868042  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2086 13:08:50.874477  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2087 13:08:50.877876  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2088 13:08:50.884342  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2089 13:08:50.887866  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2090 13:08:50.894256  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2091 13:08:50.897836  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2092 13:08:50.900997  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2093 13:08:50.907973  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2094 13:08:50.911066  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2095 13:08:50.917563  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2096 13:08:50.921042  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2097 13:08:50.927808  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2098 13:08:50.931136  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2099 13:08:50.937892  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2100 13:08:50.941193  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2101 13:08:50.944475  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2102 13:08:50.950904  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2103 13:08:50.954447  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2104 13:08:50.960940  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2105 13:08:50.964636  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2106 13:08:50.971244  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2107 13:08:50.974163  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2108 13:08:50.977460  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2109 13:08:50.984376  PCI: 00:1f.0 init finished in 607 msecs

 2110 13:08:50.984794  PCI: 00:1f.2 init

 2111 13:08:50.988144  apm_control: Disabling ACPI.

 2112 13:08:50.992923  APMC done.

 2113 13:08:50.995913  PCI: 00:1f.2 init finished in 6 msecs

 2114 13:08:50.999107  PCI: 00:1f.3 init

 2115 13:08:51.002503  PCI: 00:1f.3 init finished in 0 msecs

 2116 13:08:51.002964  PCI: 01:00.0 init

 2117 13:08:51.005968  PCI: 01:00.0 init finished in 0 msecs

 2118 13:08:51.009324  PNP: 0c09.0 init

 2119 13:08:51.012530  Google Chrome EC uptime: 12.052 seconds

 2120 13:08:51.019264  Google Chrome AP resets since EC boot: 1

 2121 13:08:51.022471  Google Chrome most recent AP reset causes:

 2122 13:08:51.025544  	0.340: 32775 shutdown: entering G3

 2123 13:08:51.032718  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2124 13:08:51.035703  PNP: 0c09.0 init finished in 23 msecs

 2125 13:08:51.039181  GENERIC: 0.0 init

 2126 13:08:51.042479  GENERIC: 0.0 init finished in 0 msecs

 2127 13:08:51.042940  GENERIC: 1.0 init

 2128 13:08:51.045877  GENERIC: 1.0 init finished in 0 msecs

 2129 13:08:51.049414  Devices initialized

 2130 13:08:51.052611  Show all devs... After init.

 2131 13:08:51.055722  Root Device: enabled 1

 2132 13:08:51.056204  CPU_CLUSTER: 0: enabled 1

 2133 13:08:51.059213  DOMAIN: 0000: enabled 1

 2134 13:08:51.062312  GPIO: 0: enabled 1

 2135 13:08:51.065674  PCI: 00:00.0: enabled 1

 2136 13:08:51.066090  PCI: 00:01.0: enabled 0

 2137 13:08:51.069212  PCI: 00:01.1: enabled 0

 2138 13:08:51.072300  PCI: 00:02.0: enabled 1

 2139 13:08:51.072716  PCI: 00:04.0: enabled 1

 2140 13:08:51.075875  PCI: 00:05.0: enabled 0

 2141 13:08:51.079047  PCI: 00:06.0: enabled 1

 2142 13:08:51.082304  PCI: 00:06.2: enabled 0

 2143 13:08:51.082771  PCI: 00:07.0: enabled 0

 2144 13:08:51.085747  PCI: 00:07.1: enabled 0

 2145 13:08:51.089412  PCI: 00:07.2: enabled 0

 2146 13:08:51.092204  PCI: 00:07.3: enabled 0

 2147 13:08:51.092617  PCI: 00:08.0: enabled 0

 2148 13:08:51.095597  PCI: 00:09.0: enabled 0

 2149 13:08:51.099201  PCI: 00:0a.0: enabled 1

 2150 13:08:51.102375  PCI: 00:0d.0: enabled 1

 2151 13:08:51.102940  PCI: 00:0d.1: enabled 0

 2152 13:08:51.105748  PCI: 00:0d.2: enabled 0

 2153 13:08:51.109074  PCI: 00:0d.3: enabled 0

 2154 13:08:51.112472  PCI: 00:0e.0: enabled 0

 2155 13:08:51.112912  PCI: 00:10.0: enabled 0

 2156 13:08:51.115901  PCI: 00:10.1: enabled 0

 2157 13:08:51.119069  PCI: 00:10.6: enabled 0

 2158 13:08:51.119484  PCI: 00:10.7: enabled 0

 2159 13:08:51.122317  PCI: 00:12.0: enabled 0

 2160 13:08:51.125494  PCI: 00:12.6: enabled 0

 2161 13:08:51.128867  PCI: 00:12.7: enabled 0

 2162 13:08:51.129288  PCI: 00:13.0: enabled 0

 2163 13:08:51.132185  PCI: 00:14.0: enabled 1

 2164 13:08:51.135371  PCI: 00:14.1: enabled 0

 2165 13:08:51.139083  PCI: 00:14.2: enabled 1

 2166 13:08:51.139570  PCI: 00:14.3: enabled 1

 2167 13:08:51.141941  PCI: 00:15.0: enabled 1

 2168 13:08:51.145503  PCI: 00:15.1: enabled 1

 2169 13:08:51.148910  PCI: 00:15.2: enabled 0

 2170 13:08:51.149400  PCI: 00:15.3: enabled 1

 2171 13:08:51.152293  PCI: 00:16.0: enabled 1

 2172 13:08:51.155509  PCI: 00:16.1: enabled 0

 2173 13:08:51.156114  PCI: 00:16.2: enabled 0

 2174 13:08:51.158999  PCI: 00:16.3: enabled 0

 2175 13:08:51.162324  PCI: 00:16.4: enabled 0

 2176 13:08:51.165639  PCI: 00:16.5: enabled 0

 2177 13:08:51.166055  PCI: 00:17.0: enabled 0

 2178 13:08:51.168734  PCI: 00:19.0: enabled 0

 2179 13:08:51.172219  PCI: 00:19.1: enabled 1

 2180 13:08:51.175442  PCI: 00:19.2: enabled 0

 2181 13:08:51.175861  PCI: 00:1a.0: enabled 0

 2182 13:08:51.178751  PCI: 00:1c.0: enabled 0

 2183 13:08:51.182367  PCI: 00:1c.1: enabled 0

 2184 13:08:51.185228  PCI: 00:1c.2: enabled 0

 2185 13:08:51.185687  PCI: 00:1c.3: enabled 0

 2186 13:08:51.188906  PCI: 00:1c.4: enabled 0

 2187 13:08:51.192263  PCI: 00:1c.5: enabled 0

 2188 13:08:51.195378  PCI: 00:1c.6: enabled 0

 2189 13:08:51.195792  PCI: 00:1c.7: enabled 0

 2190 13:08:51.198745  PCI: 00:1d.0: enabled 0

 2191 13:08:51.201845  PCI: 00:1d.1: enabled 0

 2192 13:08:51.202262  PCI: 00:1d.2: enabled 0

 2193 13:08:51.205379  PCI: 00:1d.3: enabled 0

 2194 13:08:51.208507  PCI: 00:1e.0: enabled 1

 2195 13:08:51.212072  PCI: 00:1e.1: enabled 0

 2196 13:08:51.212682  PCI: 00:1e.2: enabled 0

 2197 13:08:51.215658  PCI: 00:1e.3: enabled 1

 2198 13:08:51.218370  PCI: 00:1f.0: enabled 1

 2199 13:08:51.222044  PCI: 00:1f.1: enabled 0

 2200 13:08:51.222526  PCI: 00:1f.2: enabled 1

 2201 13:08:51.225446  PCI: 00:1f.3: enabled 1

 2202 13:08:51.228832  PCI: 00:1f.4: enabled 0

 2203 13:08:51.232059  PCI: 00:1f.5: enabled 1

 2204 13:08:51.232541  PCI: 00:1f.6: enabled 0

 2205 13:08:51.235297  PCI: 00:1f.7: enabled 0

 2206 13:08:51.238490  GENERIC: 0.0: enabled 1

 2207 13:08:51.241666  GENERIC: 0.0: enabled 1

 2208 13:08:51.242217  GENERIC: 1.0: enabled 1

 2209 13:08:51.245208  GENERIC: 0.0: enabled 1

 2210 13:08:51.248542  GENERIC: 1.0: enabled 1

 2211 13:08:51.249116  USB0 port 0: enabled 1

 2212 13:08:51.251797  USB0 port 0: enabled 1

 2213 13:08:51.255311  GENERIC: 0.0: enabled 1

 2214 13:08:51.258700  I2C: 00:1a: enabled 1

 2215 13:08:51.259333  I2C: 00:31: enabled 1

 2216 13:08:51.261595  I2C: 00:32: enabled 1

 2217 13:08:51.265293  I2C: 00:50: enabled 1

 2218 13:08:51.265868  I2C: 00:10: enabled 1

 2219 13:08:51.268552  I2C: 00:15: enabled 1

 2220 13:08:51.271653  I2C: 00:2c: enabled 1

 2221 13:08:51.272177  GENERIC: 0.0: enabled 1

 2222 13:08:51.274827  SPI: 00: enabled 1

 2223 13:08:51.278346  PNP: 0c09.0: enabled 1

 2224 13:08:51.278815  GENERIC: 0.0: enabled 1

 2225 13:08:51.281898  USB3 port 0: enabled 1

 2226 13:08:51.285207  USB3 port 1: enabled 0

 2227 13:08:51.285622  USB3 port 2: enabled 1

 2228 13:08:51.288232  USB3 port 3: enabled 0

 2229 13:08:51.291544  USB2 port 0: enabled 1

 2230 13:08:51.294923  USB2 port 1: enabled 0

 2231 13:08:51.295344  USB2 port 2: enabled 1

 2232 13:08:51.298496  USB2 port 3: enabled 0

 2233 13:08:51.301360  USB2 port 4: enabled 0

 2234 13:08:51.301776  USB2 port 5: enabled 1

 2235 13:08:51.304891  USB2 port 6: enabled 0

 2236 13:08:51.308414  USB2 port 7: enabled 0

 2237 13:08:51.311405  USB2 port 8: enabled 1

 2238 13:08:51.311824  USB2 port 9: enabled 1

 2239 13:08:51.314708  USB3 port 0: enabled 1

 2240 13:08:51.318272  USB3 port 1: enabled 0

 2241 13:08:51.318735  USB3 port 2: enabled 0

 2242 13:08:51.321638  USB3 port 3: enabled 0

 2243 13:08:51.324865  GENERIC: 0.0: enabled 1

 2244 13:08:51.328276  GENERIC: 1.0: enabled 1

 2245 13:08:51.328688  APIC: 00: enabled 1

 2246 13:08:51.331946  APIC: 12: enabled 1

 2247 13:08:51.332432  APIC: 14: enabled 1

 2248 13:08:51.334723  APIC: 16: enabled 1

 2249 13:08:51.337926  APIC: 10: enabled 1

 2250 13:08:51.338341  APIC: 01: enabled 1

 2251 13:08:51.341629  APIC: 09: enabled 1

 2252 13:08:51.344964  APIC: 08: enabled 1

 2253 13:08:51.345481  PCI: 01:00.0: enabled 1

 2254 13:08:51.351578  BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms

 2255 13:08:51.354813  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2256 13:08:51.357896  ELOG: NV offset 0xf20000 size 0x4000

 2257 13:08:51.366764  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2258 13:08:51.373615  ELOG: Event(17) added with size 13 at 2023-10-10 13:08:51 UTC

 2259 13:08:51.380022  ELOG: Event(9E) added with size 10 at 2023-10-10 13:08:51 UTC

 2260 13:08:51.386904  ELOG: Event(9F) added with size 14 at 2023-10-10 13:08:51 UTC

 2261 13:08:51.393259  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2262 13:08:51.399907  ELOG: Event(A0) added with size 9 at 2023-10-10 13:08:51 UTC

 2263 13:08:51.403244  elog_add_boot_reason: Logged dev mode boot

 2264 13:08:51.410168  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2265 13:08:51.410727  Finalize devices...

 2266 13:08:51.413268  PCI: 00:16.0 final

 2267 13:08:51.416755  PCI: 00:1f.2 final

 2268 13:08:51.417168  GENERIC: 0.0 final

 2269 13:08:51.423229  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2270 13:08:51.426746  GENERIC: 1.0 final

 2271 13:08:51.430077  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2272 13:08:51.433225  Devices finalized

 2273 13:08:51.439570  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2274 13:08:51.443249  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2275 13:08:51.449949  BS: BS_POST_DEVICE exit times (exec / console): 1 / 5 ms

 2276 13:08:51.453340  ME: HFSTS1                      : 0x90000245

 2277 13:08:51.460173  ME: HFSTS2                      : 0x82100116

 2278 13:08:51.463142  ME: HFSTS3                      : 0x00000050

 2279 13:08:51.466999  ME: HFSTS4                      : 0x00004000

 2280 13:08:51.473506  ME: HFSTS5                      : 0x00000000

 2281 13:08:51.476668  ME: HFSTS6                      : 0x40600006

 2282 13:08:51.480011  ME: Manufacturing Mode          : NO

 2283 13:08:51.483709  ME: SPI Protection Mode Enabled : YES

 2284 13:08:51.489743  ME: FPFs Committed              : YES

 2285 13:08:51.493276  ME: Manufacturing Vars Locked   : YES

 2286 13:08:51.496876  ME: FW Partition Table          : OK

 2287 13:08:51.500225  ME: Bringup Loader Failure      : NO

 2288 13:08:51.503048  ME: Firmware Init Complete      : YES

 2289 13:08:51.506507  ME: Boot Options Present        : NO

 2290 13:08:51.509833  ME: Update In Progress          : NO

 2291 13:08:51.512874  ME: D0i3 Support                : YES

 2292 13:08:51.519636  ME: Low Power State Enabled     : NO

 2293 13:08:51.522935  ME: CPU Replaced                : YES

 2294 13:08:51.526374  ME: CPU Replacement Valid       : YES

 2295 13:08:51.530015  ME: Current Working State       : 5

 2296 13:08:51.532778  ME: Current Operation State     : 1

 2297 13:08:51.536288  ME: Current Operation Mode      : 0

 2298 13:08:51.539449  ME: Error Code                  : 0

 2299 13:08:51.543011  ME: Enhanced Debug Mode         : NO

 2300 13:08:51.549719  ME: CPU Debug Disabled          : YES

 2301 13:08:51.553060  ME: TXT Support                 : NO

 2302 13:08:51.555997  ME: WP for RO is enabled        : YES

 2303 13:08:51.562880  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2304 13:08:51.566204  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2305 13:08:51.572609  Ramoops buffer: 0x100000@0x76899000.

 2306 13:08:51.576080  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2307 13:08:51.586135  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2308 13:08:51.589516  CBFS: 'fallback/slic' not found.

 2309 13:08:51.593017  ACPI: Writing ACPI tables at 7686d000.

 2310 13:08:51.593562  ACPI:    * FACS

 2311 13:08:51.596252  ACPI:    * DSDT

 2312 13:08:51.602699  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2313 13:08:51.606037  ACPI:    * FADT

 2314 13:08:51.606466  SCI is IRQ9

 2315 13:08:51.609337  ACPI: added table 1/32, length now 40

 2316 13:08:51.612865  ACPI:     * SSDT

 2317 13:08:51.616102  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2318 13:08:51.623378  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2319 13:08:51.626909  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2320 13:08:51.630302  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2321 13:08:51.636782  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2322 13:08:51.643507  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2323 13:08:51.650554  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2324 13:08:51.653433  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2325 13:08:51.660321  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2326 13:08:51.663579  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2327 13:08:51.670360  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2328 13:08:51.673821  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2329 13:08:51.680312  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2330 13:08:51.683465  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2331 13:08:51.690870  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2332 13:08:51.693875  PS2K: Passing 80 keymaps to kernel

 2333 13:08:51.700726  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2334 13:08:51.706921  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2335 13:08:51.713756  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2336 13:08:51.720123  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2337 13:08:51.727119  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2338 13:08:51.730755  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2339 13:08:51.736987  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2340 13:08:51.743790  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2341 13:08:51.750447  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2342 13:08:51.757045  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2343 13:08:51.760406  ACPI: added table 2/32, length now 44

 2344 13:08:51.763853  ACPI:    * MCFG

 2345 13:08:51.767182  ACPI: added table 3/32, length now 48

 2346 13:08:51.767672  ACPI:    * TPM2

 2347 13:08:51.770461  TPM2 log created at 0x7685d000

 2348 13:08:51.773625  ACPI: added table 4/32, length now 52

 2349 13:08:51.776754  ACPI:     * LPIT

 2350 13:08:51.780149  ACPI: added table 5/32, length now 56

 2351 13:08:51.783303  ACPI:    * MADT

 2352 13:08:51.783723  SCI is IRQ9

 2353 13:08:51.786888  ACPI: added table 6/32, length now 60

 2354 13:08:51.789999  cmd_reg from pmc_make_ipc_cmd 1052838

 2355 13:08:51.797159  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2356 13:08:51.803387  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2357 13:08:51.810425  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2358 13:08:51.813030  PMC CrashLog size in discovery mode: 0xC00

 2359 13:08:51.816738  cpu crashlog bar addr: 0x80640000

 2360 13:08:51.819920  cpu discovery table offset: 0x6030

 2361 13:08:51.826853  cpu_crashlog_discovery_table buffer count: 0x3

 2362 13:08:51.833306  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2363 13:08:51.839934  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2364 13:08:51.846788  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2365 13:08:51.850213  PMC crashLog size in discovery mode : 0xC00

 2366 13:08:51.856842  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2367 13:08:51.863092  discover mode PMC crashlog size adjusted to: 0x200

 2368 13:08:51.869642  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2369 13:08:51.873152  discover mode PMC crashlog size adjusted to: 0x0

 2370 13:08:51.876223  m_cpu_crashLog_size : 0x3480 bytes

 2371 13:08:51.879989  CPU crashLog present.

 2372 13:08:51.883164  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2373 13:08:51.889430  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2374 13:08:51.893229  current = 76876550

 2375 13:08:51.896231  ACPI:    * DMAR

 2376 13:08:51.899748  ACPI: added table 7/32, length now 64

 2377 13:08:51.903353  ACPI: added table 8/32, length now 68

 2378 13:08:51.903770  ACPI:    * HPET

 2379 13:08:51.909802  ACPI: added table 9/32, length now 72

 2380 13:08:51.910224  ACPI: done.

 2381 13:08:51.912877  ACPI tables: 38528 bytes.

 2382 13:08:51.916793  smbios_write_tables: 76857000

 2383 13:08:51.920273  EC returned error result code 3

 2384 13:08:51.923049  Couldn't obtain OEM name from CBI

 2385 13:08:51.926757  Create SMBIOS type 16

 2386 13:08:51.927195  Create SMBIOS type 17

 2387 13:08:51.930437  Create SMBIOS type 20

 2388 13:08:51.933355  GENERIC: 0.0 (WIFI Device)

 2389 13:08:51.936898  SMBIOS tables: 2156 bytes.

 2390 13:08:51.939988  Writing table forward entry at 0x00000500

 2391 13:08:51.946942  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2392 13:08:51.949895  Writing coreboot table at 0x76891000

 2393 13:08:51.956742   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2394 13:08:51.960464   1. 0000000000001000-000000000009ffff: RAM

 2395 13:08:51.963247   2. 00000000000a0000-00000000000fffff: RESERVED

 2396 13:08:51.970025   3. 0000000000100000-0000000076856fff: RAM

 2397 13:08:51.973118   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2398 13:08:51.979940   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2399 13:08:51.986933   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2400 13:08:51.989956   7. 0000000077000000-00000000803fffff: RESERVED

 2401 13:08:51.993316   8. 00000000c0000000-00000000cfffffff: RESERVED

 2402 13:08:51.999877   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2403 13:08:52.003285  10. 00000000fb000000-00000000fb000fff: RESERVED

 2404 13:08:52.009660  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2405 13:08:52.013568  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2406 13:08:52.019860  13. 00000000fec00000-00000000fecfffff: RESERVED

 2407 13:08:52.023334  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2408 13:08:52.029825  15. 00000000fed80000-00000000fed87fff: RESERVED

 2409 13:08:52.033076  16. 00000000fed90000-00000000fed92fff: RESERVED

 2410 13:08:52.036318  17. 00000000feda0000-00000000feda1fff: RESERVED

 2411 13:08:52.043153  18. 00000000fedc0000-00000000feddffff: RESERVED

 2412 13:08:52.046385  19. 0000000100000000-000000027fbfffff: RAM

 2413 13:08:52.049928  Passing 4 GPIOs to payload:

 2414 13:08:52.056267              NAME |       PORT | POLARITY |     VALUE

 2415 13:08:52.059847               lid |  undefined |     high |      high

 2416 13:08:52.066216             power |  undefined |     high |       low

 2417 13:08:52.069843             oprom |  undefined |     high |       low

 2418 13:08:52.076191          EC in RW | 0x00000151 |     high |      high

 2419 13:08:52.076618  Board ID: 3

 2420 13:08:52.079610  FW config: 0x131

 2421 13:08:52.086397  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007

 2422 13:08:52.089388  coreboot table: 1788 bytes.

 2423 13:08:52.093113  IMD ROOT    0. 0x76fff000 0x00001000

 2424 13:08:52.096658  IMD SMALL   1. 0x76ffe000 0x00001000

 2425 13:08:52.100003  FSP MEMORY  2. 0x76afe000 0x00500000

 2426 13:08:52.102695  CONSOLE     3. 0x76ade000 0x00020000

 2427 13:08:52.106370  RW MCACHE   4. 0x76add000 0x0000043c

 2428 13:08:52.109722  RO MCACHE   5. 0x76adc000 0x00000fd8

 2429 13:08:52.112868  FMAP        6. 0x76adb000 0x0000064a

 2430 13:08:52.119696  TIME STAMP  7. 0x76ada000 0x00000910

 2431 13:08:52.123272  VBOOT WORK  8. 0x76ac6000 0x00014000

 2432 13:08:52.126654  MEM INFO    9. 0x76ac5000 0x000003b8

 2433 13:08:52.129557  ROMSTG STCK10. 0x76ac4000 0x00001000

 2434 13:08:52.133504  AFTER CAR  11. 0x76ab8000 0x0000c000

 2435 13:08:52.136270  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2436 13:08:52.139895  ACPI BERT  13. 0x76a1e000 0x00010000

 2437 13:08:52.143235  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2438 13:08:52.150036  REFCODE    15. 0x769ae000 0x0006f000

 2439 13:08:52.152989  SMM BACKUP 16. 0x7699e000 0x00010000

 2440 13:08:52.156536  IGD OPREGION17. 0x76999000 0x00004203

 2441 13:08:52.159971  RAMOOPS    18. 0x76899000 0x00100000

 2442 13:08:52.163032  COREBOOT   19. 0x76891000 0x00008000

 2443 13:08:52.166542  ACPI       20. 0x7686d000 0x00024000

 2444 13:08:52.169808  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2445 13:08:52.172895  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2446 13:08:52.179706  CPU CRASHLOG23. 0x76858000 0x00003480

 2447 13:08:52.183043  SMBIOS     24. 0x76857000 0x00001000

 2448 13:08:52.183466  IMD small region:

 2449 13:08:52.186186    IMD ROOT    0. 0x76ffec00 0x00000400

 2450 13:08:52.193320    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2451 13:08:52.196444    VPD         2. 0x76ffeb60 0x0000006c

 2452 13:08:52.199677    POWER STATE 3. 0x76ffeb00 0x00000044

 2453 13:08:52.203245    ROMSTAGE    4. 0x76ffeae0 0x00000004

 2454 13:08:52.206692    ACPI GNVS   5. 0x76ffea80 0x00000048

 2455 13:08:52.209717    TYPE_C INFO 6. 0x76ffea60 0x0000000c

 2456 13:08:52.216579  BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms

 2457 13:08:52.219815  MTRR: Physical address space:

 2458 13:08:52.226301  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2459 13:08:52.232978  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2460 13:08:52.239851  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2461 13:08:52.246371  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2462 13:08:52.252831  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2463 13:08:52.256493  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2464 13:08:52.263147  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2465 13:08:52.269365  MTRR: Fixed MSR 0x250 0x0606060606060606

 2466 13:08:52.273066  MTRR: Fixed MSR 0x258 0x0606060606060606

 2467 13:08:52.276439  MTRR: Fixed MSR 0x259 0x0000000000000000

 2468 13:08:52.279358  MTRR: Fixed MSR 0x268 0x0606060606060606

 2469 13:08:52.286232  MTRR: Fixed MSR 0x269 0x0606060606060606

 2470 13:08:52.289590  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2471 13:08:52.293271  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2472 13:08:52.296148  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2473 13:08:52.299534  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2474 13:08:52.306234  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2475 13:08:52.309497  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2476 13:08:52.312862  call enable_fixed_mtrr()

 2477 13:08:52.316208  CPU physical address size: 39 bits

 2478 13:08:52.319562  MTRR: default type WB/UC MTRR counts: 6/6.

 2479 13:08:52.326288  MTRR: UC selected as default type.

 2480 13:08:52.329575  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2481 13:08:52.336375  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2482 13:08:52.342715  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2483 13:08:52.349456  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2484 13:08:52.356026  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2485 13:08:52.362917  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2486 13:08:52.366477  MTRR: Fixed MSR 0x250 0x0606060606060606

 2487 13:08:52.372852  MTRR: Fixed MSR 0x258 0x0606060606060606

 2488 13:08:52.376288  MTRR: Fixed MSR 0x259 0x0000000000000000

 2489 13:08:52.379318  MTRR: Fixed MSR 0x268 0x0606060606060606

 2490 13:08:52.382924  MTRR: Fixed MSR 0x269 0x0606060606060606

 2491 13:08:52.389611  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2492 13:08:52.393037  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2493 13:08:52.395893  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2494 13:08:52.399449  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2495 13:08:52.405870  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2496 13:08:52.409419  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2497 13:08:52.412523  MTRR: Fixed MSR 0x250 0x0606060606060606

 2498 13:08:52.415789  MTRR: Fixed MSR 0x250 0x0606060606060606

 2499 13:08:52.419210  MTRR: Fixed MSR 0x250 0x0606060606060606

 2500 13:08:52.425769  MTRR: Fixed MSR 0x250 0x0606060606060606

 2501 13:08:52.429287  MTRR: Fixed MSR 0x258 0x0606060606060606

 2502 13:08:52.432489  MTRR: Fixed MSR 0x259 0x0000000000000000

 2503 13:08:52.435707  MTRR: Fixed MSR 0x268 0x0606060606060606

 2504 13:08:52.442722  MTRR: Fixed MSR 0x269 0x0606060606060606

 2505 13:08:52.445650  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2506 13:08:52.449612  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2507 13:08:52.452660  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2508 13:08:52.459318  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2509 13:08:52.462469  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2510 13:08:52.465674  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2511 13:08:52.469125  MTRR: Fixed MSR 0x258 0x0606060606060606

 2512 13:08:52.472647  call enable_fixed_mtrr()

 2513 13:08:52.475631  MTRR: Fixed MSR 0x259 0x0000000000000000

 2514 13:08:52.479353  MTRR: Fixed MSR 0x268 0x0606060606060606

 2515 13:08:52.485737  MTRR: Fixed MSR 0x269 0x0606060606060606

 2516 13:08:52.488916  MTRR: Fixed MSR 0x258 0x0606060606060606

 2517 13:08:52.492265  MTRR: Fixed MSR 0x250 0x0606060606060606

 2518 13:08:52.495754  MTRR: Fixed MSR 0x259 0x0000000000000000

 2519 13:08:52.502670  MTRR: Fixed MSR 0x268 0x0606060606060606

 2520 13:08:52.505478  MTRR: Fixed MSR 0x269 0x0606060606060606

 2521 13:08:52.509064  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2522 13:08:52.512111  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2523 13:08:52.518784  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2524 13:08:52.522118  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2525 13:08:52.525605  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2526 13:08:52.528952  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2527 13:08:52.532576  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2528 13:08:52.535552  call enable_fixed_mtrr()

 2529 13:08:52.539093  MTRR: Fixed MSR 0x250 0x0606060606060606

 2530 13:08:52.545704  CPU physical address size: 39 bits

 2531 13:08:52.548839  MTRR: Fixed MSR 0x258 0x0606060606060606

 2532 13:08:52.552096  CPU physical address size: 39 bits

 2533 13:08:52.555829  MTRR: Fixed MSR 0x258 0x0606060606060606

 2534 13:08:52.559193  call enable_fixed_mtrr()

 2535 13:08:52.562491  MTRR: Fixed MSR 0x259 0x0000000000000000

 2536 13:08:52.565703  MTRR: Fixed MSR 0x258 0x0606060606060606

 2537 13:08:52.572479  MTRR: Fixed MSR 0x268 0x0606060606060606

 2538 13:08:52.575636  MTRR: Fixed MSR 0x269 0x0606060606060606

 2539 13:08:52.579264  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2540 13:08:52.581975  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2541 13:08:52.585257  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2542 13:08:52.592253  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2543 13:08:52.595538  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2544 13:08:52.598486  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2545 13:08:52.602128  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2546 13:08:52.605144  call enable_fixed_mtrr()

 2547 13:08:52.608454  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2548 13:08:52.615239  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2549 13:08:52.618870  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2550 13:08:52.622232  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2551 13:08:52.625119  CPU physical address size: 39 bits

 2552 13:08:52.628623  call enable_fixed_mtrr()

 2553 13:08:52.632050  MTRR: Fixed MSR 0x259 0x0000000000000000

 2554 13:08:52.635391  CPU physical address size: 39 bits

 2555 13:08:52.638639  MTRR: Fixed MSR 0x268 0x0606060606060606

 2556 13:08:52.642213  CPU physical address size: 39 bits

 2557 13:08:52.648911  MTRR: Fixed MSR 0x259 0x0000000000000000

 2558 13:08:52.652128  MTRR: Fixed MSR 0x269 0x0606060606060606

 2559 13:08:52.655292  MTRR: Fixed MSR 0x268 0x0606060606060606

 2560 13:08:52.662335  MTRR: Fixed MSR 0x269 0x0606060606060606

 2561 13:08:52.665934  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2562 13:08:52.668889  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2563 13:08:52.672415  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2564 13:08:52.675794  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2565 13:08:52.681975  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2566 13:08:52.685234  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2567 13:08:52.689246  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2568 13:08:52.692003  call enable_fixed_mtrr()

 2569 13:08:52.695318  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2570 13:08:52.698634  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2571 13:08:52.705476  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2572 13:08:52.708773  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2573 13:08:52.712369  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2574 13:08:52.715271  CPU physical address size: 39 bits

 2575 13:08:52.718674  call enable_fixed_mtrr()

 2576 13:08:52.721727  CPU physical address size: 39 bits

 2577 13:08:52.725382  

 2578 13:08:52.725739  MTRR check

 2579 13:08:52.728727  Fixed MTRRs   : Enabled

 2580 13:08:52.729092  Variable MTRRs: Enabled

 2581 13:08:52.729375  

 2582 13:08:52.735269  BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms

 2583 13:08:52.738532  Checking cr50 for pending updates

 2584 13:08:52.751179  Reading cr50 TPM mode

 2585 13:08:52.766246  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2586 13:08:52.776045  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2587 13:08:52.779698  Checking segment from ROM address 0xf96cbe6c

 2588 13:08:52.782740  Checking segment from ROM address 0xf96cbe88

 2589 13:08:52.789703  Loading segment from ROM address 0xf96cbe6c

 2590 13:08:52.790126    code (compression=1)

 2591 13:08:52.799687    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2592 13:08:52.806329  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2593 13:08:52.809738  using LZMA

 2594 13:08:52.831849  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2595 13:08:52.838183  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2596 13:08:52.846972  Loading segment from ROM address 0xf96cbe88

 2597 13:08:52.849660    Entry Point 0x30000000

 2598 13:08:52.850084  Loaded segments

 2599 13:08:52.856262  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2600 13:08:52.863274  BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms

 2601 13:08:52.866737  Finalizing chipset.

 2602 13:08:52.869744  apm_control: Finalizing SMM.

 2603 13:08:52.870164  APMC done.

 2604 13:08:52.873649  HECI: CSE device 16.1 is disabled

 2605 13:08:52.876585  HECI: CSE device 16.2 is disabled

 2606 13:08:52.879781  HECI: CSE device 16.3 is disabled

 2607 13:08:52.883277  HECI: CSE device 16.4 is disabled

 2608 13:08:52.886647  HECI: CSE device 16.5 is disabled

 2609 13:08:52.889734  HECI: Sending End-of-Post

 2610 13:08:52.899208  CSE: EOP requested action: continue boot

 2611 13:08:52.902052  CSE EOP successful, continuing boot

 2612 13:08:52.909090  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2613 13:08:52.912350  mp_park_aps done after 0 msecs.

 2614 13:08:52.915522  Jumping to boot code at 0x30000000(0x76891000)

 2615 13:08:52.925536  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2616 13:08:52.929882  

 2617 13:08:52.930308  

 2618 13:08:52.930902  

 2619 13:08:52.932773  Starting depthcharge on Volmar...

 2620 13:08:52.933185  

 2621 13:08:52.934814  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2622 13:08:52.935322  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2623 13:08:52.935733  Setting prompt string to ['brya:']
 2624 13:08:52.936212  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2625 13:08:52.939760  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2626 13:08:52.940185  

 2627 13:08:52.946123  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2628 13:08:52.946552  

 2629 13:08:52.953130  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2630 13:08:52.953589  

 2631 13:08:52.956326  configure_storage: Failed to remap 1C:2

 2632 13:08:52.956738  

 2633 13:08:52.957117  Wipe memory regions:

 2634 13:08:52.960151  

 2635 13:08:52.963307  	[0x00000000001000, 0x000000000a0000)

 2636 13:08:52.963727  

 2637 13:08:52.966403  	[0x00000000100000, 0x00000030000000)

 2638 13:08:53.074206  

 2639 13:08:53.076824  	[0x00000032668e60, 0x00000076857000)

 2640 13:08:53.228938  

 2641 13:08:53.232011  	[0x00000100000000, 0x0000027fc00000)

 2642 13:08:54.077316  

 2643 13:08:54.080175  ec_init: CrosEC protocol v3 supported (256, 256)

 2644 13:08:54.689002  

 2645 13:08:54.689487  R8152: Initializing

 2646 13:08:54.689821  

 2647 13:08:54.691932  Version 9 (ocp_data = 6010)

 2648 13:08:54.692535  

 2649 13:08:54.695307  R8152: Done initializing

 2650 13:08:54.695718  

 2651 13:08:54.698649  Adding net device

 2652 13:08:54.999451  

 2653 13:08:55.002993  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2654 13:08:55.003407  

 2655 13:08:55.003737  

 2656 13:08:55.004039  

 2657 13:08:55.004822  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2659 13:08:55.106057  brya: tftpboot 192.168.201.1 11725036/tftp-deploy-rffcpgs5/kernel/bzImage 11725036/tftp-deploy-rffcpgs5/kernel/cmdline 11725036/tftp-deploy-rffcpgs5/ramdisk/ramdisk.cpio.gz

 2660 13:08:55.106815  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2661 13:08:55.107216  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2662 13:08:55.111617  tftpboot 192.168.201.1 11725036/tftp-deploy-rffcpgs5/kernel/bzImploy-rffcpgs5/kernel/cmdline 11725036/tftp-deploy-rffcpgs5/ramdisk/ramdisk.cpio.gz

 2663 13:08:55.112054  

 2664 13:08:55.112386  Waiting for link

 2665 13:08:55.314309  

 2666 13:08:55.314827  done.

 2667 13:08:55.315296  

 2668 13:08:55.315694  MAC: 00:e0:4c:68:02:37

 2669 13:08:55.316045  

 2670 13:08:55.317884  Sending DHCP discover... done.

 2671 13:08:55.318300  

 2672 13:08:55.320840  Waiting for reply... done.

 2673 13:08:55.321494  

 2674 13:08:55.324425  Sending DHCP request... done.

 2675 13:08:55.324885  

 2676 13:08:55.330976  Waiting for reply... done.

 2677 13:08:55.331389  

 2678 13:08:55.331717  My ip is 192.168.201.15

 2679 13:08:55.332022  

 2680 13:08:55.333991  The DHCP server ip is 192.168.201.1

 2681 13:08:55.334402  

 2682 13:08:55.340973  TFTP server IP predefined by user: 192.168.201.1

 2683 13:08:55.341609  

 2684 13:08:55.347854  Bootfile predefined by user: 11725036/tftp-deploy-rffcpgs5/kernel/bzImage

 2685 13:08:55.348265  

 2686 13:08:55.350884  Sending tftp read request... done.

 2687 13:08:55.351296  

 2688 13:08:55.359202  Waiting for the transfer... 

 2689 13:08:55.359704  

 2690 13:08:55.784367  00000000 ################################################################

 2691 13:08:55.784880  

 2692 13:08:56.080834  00080000 ################################################################

 2693 13:08:56.080968  

 2694 13:08:56.358701  00100000 ################################################################

 2695 13:08:56.358826  

 2696 13:08:56.646776  00180000 ################################################################

 2697 13:08:56.646904  

 2698 13:08:56.896807  00200000 ################################################################

 2699 13:08:56.896928  

 2700 13:08:57.167999  00280000 ################################################################

 2701 13:08:57.168156  

 2702 13:08:57.462512  00300000 ################################################################

 2703 13:08:57.462658  

 2704 13:08:57.760000  00380000 ################################################################

 2705 13:08:57.760132  

 2706 13:08:58.012289  00400000 ################################################################

 2707 13:08:58.012427  

 2708 13:08:58.263330  00480000 ################################################################

 2709 13:08:58.263470  

 2710 13:08:58.554323  00500000 ################################################################

 2711 13:08:58.554459  

 2712 13:08:58.839493  00580000 ################################################################

 2713 13:08:58.839628  

 2714 13:08:59.124191  00600000 ################################################################

 2715 13:08:59.124325  

 2716 13:08:59.402767  00680000 ################################################################

 2717 13:08:59.402898  

 2718 13:08:59.643253  00700000 ################################################################

 2719 13:08:59.643388  

 2720 13:08:59.899946  00780000 ################################################################

 2721 13:08:59.900107  

 2722 13:09:00.154203  00800000 ################################################################

 2723 13:09:00.154334  

 2724 13:09:00.412662  00880000 ################################################################

 2725 13:09:00.412790  

 2726 13:09:00.678820  00900000 ################################################################

 2727 13:09:00.678952  

 2728 13:09:00.947482  00980000 ################################################################

 2729 13:09:00.947608  

 2730 13:09:01.206950  00a00000 ################################################################

 2731 13:09:01.207117  

 2732 13:09:01.475703  00a80000 ################################################################

 2733 13:09:01.475828  

 2734 13:09:01.759595  00b00000 ################################################################

 2735 13:09:01.759725  

 2736 13:09:02.018360  00b80000 ################################################################

 2737 13:09:02.018512  

 2738 13:09:02.279683  00c00000 ################################################################

 2739 13:09:02.279834  

 2740 13:09:02.543952  00c80000 ################################################################

 2741 13:09:02.544109  

 2742 13:09:02.744111  00d00000 ################################################ done.

 2743 13:09:02.744239  

 2744 13:09:02.747195  The bootfile was 14016512 bytes long.

 2745 13:09:02.747283  

 2746 13:09:02.750369  Sending tftp read request... done.

 2747 13:09:02.750454  

 2748 13:09:02.753621  Waiting for the transfer... 

 2749 13:09:02.753713  

 2750 13:09:03.035030  00000000 ################################################################

 2751 13:09:03.035187  

 2752 13:09:03.306192  00080000 ################################################################

 2753 13:09:03.306323  

 2754 13:09:03.560499  00100000 ################################################################

 2755 13:09:03.560628  

 2756 13:09:03.848716  00180000 ################################################################

 2757 13:09:03.848871  

 2758 13:09:04.124377  00200000 ################################################################

 2759 13:09:04.124504  

 2760 13:09:04.398129  00280000 ################################################################

 2761 13:09:04.398258  

 2762 13:09:04.647021  00300000 ################################################################

 2763 13:09:04.647202  

 2764 13:09:04.889600  00380000 ################################################################

 2765 13:09:04.889733  

 2766 13:09:05.137244  00400000 ################################################################

 2767 13:09:05.137401  

 2768 13:09:05.415731  00480000 ################################################################

 2769 13:09:05.415866  

 2770 13:09:05.683419  00500000 ################################################################

 2771 13:09:05.683574  

 2772 13:09:05.941710  00580000 ################################################################

 2773 13:09:05.941839  

 2774 13:09:06.206801  00600000 ################################################################

 2775 13:09:06.206929  

 2776 13:09:06.475765  00680000 ################################################################

 2777 13:09:06.475895  

 2778 13:09:06.730339  00700000 ################################################################

 2779 13:09:06.730468  

 2780 13:09:07.003248  00780000 ################################################################

 2781 13:09:07.003371  

 2782 13:09:07.265609  00800000 ################################################################

 2783 13:09:07.265741  

 2784 13:09:07.465993  00880000 ############################################## done.

 2785 13:09:07.466125  

 2786 13:09:07.469352  Sending tftp read request... done.

 2787 13:09:07.469436  

 2788 13:09:07.472544  Waiting for the transfer... 

 2789 13:09:07.472628  

 2790 13:09:07.472694  00000000 # done.

 2791 13:09:07.472757  

 2792 13:09:07.482863  Command line loaded dynamically from TFTP file: 11725036/tftp-deploy-rffcpgs5/kernel/cmdline

 2793 13:09:07.482960  

 2794 13:09:07.499177  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2795 13:09:07.504127  

 2796 13:09:07.507504  Shutting down all USB controllers.

 2797 13:09:07.507657  

 2798 13:09:07.507779  Removing current net device

 2799 13:09:07.507893  

 2800 13:09:07.510904  Finalizing coreboot

 2801 13:09:07.511057  

 2802 13:09:07.517685  Exiting depthcharge with code 4 at timestamp: 24835907

 2803 13:09:07.517890  

 2804 13:09:07.518051  

 2805 13:09:07.518201  Starting kernel ...

 2806 13:09:07.518355  

 2807 13:09:07.518496  

 2808 13:09:07.519212  end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
 2809 13:09:07.519436  start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
 2810 13:09:07.519615  Setting prompt string to ['Linux version [0-9]']
 2811 13:09:07.519780  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2812 13:09:07.519951  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2814 13:13:33.520533  end: 2.2.5 auto-login-action (duration 00:04:26) [common]
 2816 13:13:33.521653  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
 2818 13:13:33.522509  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2821 13:13:33.523843  end: 2 depthcharge-action (duration 00:05:00) [common]
 2823 13:13:33.524132  Cleaning after the job
 2824 13:13:33.524242  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/ramdisk
 2825 13:13:33.525711  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/kernel
 2826 13:13:33.528051  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11725036/tftp-deploy-rffcpgs5/modules
 2827 13:13:33.528684  start: 5.1 power-off (timeout 00:00:30) [common]
 2828 13:13:33.528852  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
 2829 13:13:33.612430  >> Command sent successfully.

 2830 13:13:33.617859  Returned 0 in 0 seconds
 2831 13:13:33.718997  end: 5.1 power-off (duration 00:00:00) [common]
 2833 13:13:33.720606  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2834 13:13:33.721956  Listened to connection for namespace 'common' for up to 1s
 2836 13:13:33.723527  Listened to connection for namespace 'common' for up to 1s
 2837 13:13:34.722673  Finalising connection for namespace 'common'
 2838 13:13:34.723338  Disconnecting from shell: Finalise
 2839 13:13:34.723759  
 2840 13:13:34.824858  end: 5.2 read-feedback (duration 00:00:01) [common]
 2841 13:13:34.825664  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11725036
 2842 13:13:34.879742  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11725036
 2843 13:13:34.879932  JobError: Your job cannot terminate cleanly.