Boot log: acer-cbv514-1h-34uz-brya
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:06:26.425667 lava-dispatcher, installed at version: 2023.10
2 12:06:26.425837 start: 0 validate
3 12:06:26.425945 Start time: 2023-12-07 12:06:26.425938+00:00 (UTC)
4 12:06:26.426049 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:06:26.426156 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:06:26.696558 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:06:26.697189 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.201-cip41-28-g38e219eb6aa85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:06:36.708284 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:06:36.708888 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.201-cip41-28-g38e219eb6aa85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:06:37.718070 validate duration: 11.29
12 12:06:37.719075 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:06:37.719469 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:06:37.719803 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:06:37.720257 Not decompressing ramdisk as can be used compressed.
16 12:06:37.720594 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:06:37.720849 saving as /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/ramdisk/rootfs.cpio.gz
18 12:06:37.721084 total size: 8418130 (8 MB)
19 12:06:37.724810 progress 0 % (0 MB)
20 12:06:37.730886 progress 5 % (0 MB)
21 12:06:37.734487 progress 10 % (0 MB)
22 12:06:37.736985 progress 15 % (1 MB)
23 12:06:37.739070 progress 20 % (1 MB)
24 12:06:37.740653 progress 25 % (2 MB)
25 12:06:37.742192 progress 30 % (2 MB)
26 12:06:37.743597 progress 35 % (2 MB)
27 12:06:37.745143 progress 40 % (3 MB)
28 12:06:37.746650 progress 45 % (3 MB)
29 12:06:37.748223 progress 50 % (4 MB)
30 12:06:37.749730 progress 55 % (4 MB)
31 12:06:37.751237 progress 60 % (4 MB)
32 12:06:37.752665 progress 65 % (5 MB)
33 12:06:37.754176 progress 70 % (5 MB)
34 12:06:37.755681 progress 75 % (6 MB)
35 12:06:37.757218 progress 80 % (6 MB)
36 12:06:37.758727 progress 85 % (6 MB)
37 12:06:37.760263 progress 90 % (7 MB)
38 12:06:37.761766 progress 95 % (7 MB)
39 12:06:37.763183 progress 100 % (8 MB)
40 12:06:37.763352 8 MB downloaded in 0.04 s (189.87 MB/s)
41 12:06:37.763484 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:06:37.763677 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:06:37.763745 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:06:37.763809 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:06:37.763919 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.201-cip41-28-g38e219eb6aa85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:06:37.763979 saving as /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/kernel/bzImage
48 12:06:37.764032 total size: 14129248 (13 MB)
49 12:06:37.764116 No compression specified
50 12:06:38.029952 progress 0 % (0 MB)
51 12:06:38.032695 progress 5 % (0 MB)
52 12:06:38.035267 progress 10 % (1 MB)
53 12:06:38.037747 progress 15 % (2 MB)
54 12:06:38.040372 progress 20 % (2 MB)
55 12:06:38.042847 progress 25 % (3 MB)
56 12:06:38.045555 progress 30 % (4 MB)
57 12:06:38.047991 progress 35 % (4 MB)
58 12:06:38.050592 progress 40 % (5 MB)
59 12:06:38.053213 progress 45 % (6 MB)
60 12:06:38.055678 progress 50 % (6 MB)
61 12:06:38.058239 progress 55 % (7 MB)
62 12:06:38.060718 progress 60 % (8 MB)
63 12:06:38.063218 progress 65 % (8 MB)
64 12:06:38.065680 progress 70 % (9 MB)
65 12:06:38.068216 progress 75 % (10 MB)
66 12:06:38.070805 progress 80 % (10 MB)
67 12:06:38.073457 progress 85 % (11 MB)
68 12:06:38.076008 progress 90 % (12 MB)
69 12:06:38.078577 progress 95 % (12 MB)
70 12:06:38.081163 progress 100 % (13 MB)
71 12:06:38.081282 13 MB downloaded in 0.32 s (42.47 MB/s)
72 12:06:38.081443 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:06:38.081700 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:06:38.081803 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:06:38.081900 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:06:38.082053 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.201-cip41-28-g38e219eb6aa85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:06:38.082115 saving as /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/modules/modules.tar
79 12:06:38.082177 total size: 528036 (0 MB)
80 12:06:38.082226 Using unxz to decompress xz
81 12:06:38.085788 progress 6 % (0 MB)
82 12:06:38.086092 progress 12 % (0 MB)
83 12:06:38.086287 progress 18 % (0 MB)
84 12:06:38.087838 progress 24 % (0 MB)
85 12:06:38.089471 progress 31 % (0 MB)
86 12:06:38.091240 progress 37 % (0 MB)
87 12:06:38.093020 progress 43 % (0 MB)
88 12:06:38.094709 progress 49 % (0 MB)
89 12:06:38.096462 progress 55 % (0 MB)
90 12:06:38.098099 progress 62 % (0 MB)
91 12:06:38.099898 progress 68 % (0 MB)
92 12:06:38.101636 progress 74 % (0 MB)
93 12:06:38.103433 progress 80 % (0 MB)
94 12:06:38.105441 progress 86 % (0 MB)
95 12:06:38.107032 progress 93 % (0 MB)
96 12:06:38.108723 progress 99 % (0 MB)
97 12:06:38.115082 0 MB downloaded in 0.03 s (15.30 MB/s)
98 12:06:38.115293 end: 1.3.1 http-download (duration 00:00:00) [common]
100 12:06:38.115529 end: 1.3 download-retry (duration 00:00:00) [common]
101 12:06:38.115606 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 12:06:38.115681 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 12:06:38.115746 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 12:06:38.115816 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 12:06:38.116000 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5
106 12:06:38.116114 makedir: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin
107 12:06:38.116202 makedir: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/tests
108 12:06:38.116282 makedir: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/results
109 12:06:38.116377 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-add-keys
110 12:06:38.116502 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-add-sources
111 12:06:38.116602 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-background-process-start
112 12:06:38.116702 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-background-process-stop
113 12:06:38.116796 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-common-functions
114 12:06:38.116892 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-echo-ipv4
115 12:06:38.116988 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-install-packages
116 12:06:38.117086 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-installed-packages
117 12:06:38.117180 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-os-build
118 12:06:38.117279 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-probe-channel
119 12:06:38.117374 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-probe-ip
120 12:06:38.117475 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-target-ip
121 12:06:38.117570 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-target-mac
122 12:06:38.117664 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-target-storage
123 12:06:38.117763 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-case
124 12:06:38.117858 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-event
125 12:06:38.117952 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-feedback
126 12:06:38.118047 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-raise
127 12:06:38.118142 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-reference
128 12:06:38.118236 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-runner
129 12:06:38.118330 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-set
130 12:06:38.118426 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-test-shell
131 12:06:38.118525 Updating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-install-packages (oe)
132 12:06:38.118648 Updating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/bin/lava-installed-packages (oe)
133 12:06:38.118742 Creating /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/environment
134 12:06:38.118824 LAVA metadata
135 12:06:38.118886 - LAVA_JOB_ID=12207092
136 12:06:38.118941 - LAVA_DISPATCHER_IP=192.168.201.1
137 12:06:38.119026 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 12:06:38.119082 skipped lava-vland-overlay
139 12:06:38.119144 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 12:06:38.119207 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 12:06:38.119257 skipped lava-multinode-overlay
142 12:06:38.119313 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 12:06:38.119376 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 12:06:38.119435 Loading test definitions
145 12:06:38.119510 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 12:06:38.119574 Using /lava-12207092 at stage 0
147 12:06:38.119819 uuid=12207092_1.4.2.3.1 testdef=None
148 12:06:38.119895 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 12:06:38.119979 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 12:06:38.120414 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 12:06:38.120594 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 12:06:38.121177 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 12:06:38.121354 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 12:06:38.121926 runner path: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/0/tests/0_dmesg test_uuid 12207092_1.4.2.3.1
157 12:06:38.122047 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 12:06:38.122229 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 12:06:38.122284 Using /lava-12207092 at stage 1
161 12:06:38.122509 uuid=12207092_1.4.2.3.5 testdef=None
162 12:06:38.122577 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 12:06:38.122642 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 12:06:38.122997 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 12:06:38.123166 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 12:06:38.123686 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 12:06:38.123870 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 12:06:38.124431 runner path: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/1/tests/1_bootrr test_uuid 12207092_1.4.2.3.5
171 12:06:38.124551 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 12:06:38.124717 Creating lava-test-runner.conf files
174 12:06:38.124766 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/0 for stage 0
175 12:06:38.124836 - 0_dmesg
176 12:06:38.124900 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12207092/lava-overlay-i8dhixd5/lava-12207092/1 for stage 1
177 12:06:38.124971 - 1_bootrr
178 12:06:38.125048 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 12:06:38.125121 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 12:06:38.131762 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 12:06:38.131859 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 12:06:38.131934 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 12:06:38.132004 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 12:06:38.132135 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 12:06:38.300759 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 12:06:38.301034 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 12:06:38.301127 extracting modules file /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12207092/extract-overlay-ramdisk-9lqf9hw2/ramdisk
188 12:06:38.317200 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 12:06:38.317336 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 12:06:38.317415 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12207092/compress-overlay-l56f_pmf/overlay-1.4.2.4.tar.gz to ramdisk
191 12:06:38.317471 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12207092/compress-overlay-l56f_pmf/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12207092/extract-overlay-ramdisk-9lqf9hw2/ramdisk
192 12:06:38.323286 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 12:06:38.323399 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 12:06:38.323476 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 12:06:38.323549 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 12:06:38.323609 Building ramdisk /var/lib/lava/dispatcher/tmp/12207092/extract-overlay-ramdisk-9lqf9hw2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12207092/extract-overlay-ramdisk-9lqf9hw2/ramdisk
197 12:06:38.408707 >> 54150 blocks
198 12:06:39.195990 rename /var/lib/lava/dispatcher/tmp/12207092/extract-overlay-ramdisk-9lqf9hw2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/ramdisk/ramdisk.cpio.gz
199 12:06:39.196335 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 12:06:39.196450 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
201 12:06:39.196558 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
202 12:06:39.196647 No mkimage arch provided, not using FIT.
203 12:06:39.196765 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 12:06:39.196842 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 12:06:39.196924 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 12:06:39.197008 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
207 12:06:39.197073 No LXC device requested
208 12:06:39.197137 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 12:06:39.197208 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
210 12:06:39.197275 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 12:06:39.197336 Checking files for TFTP limit of 4294967296 bytes.
212 12:06:39.197661 end: 1 tftp-deploy (duration 00:00:01) [common]
213 12:06:39.197737 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 12:06:39.197803 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 12:06:39.197890 substitutions:
216 12:06:39.197941 - {DTB}: None
217 12:06:39.198001 - {INITRD}: 12207092/tftp-deploy-l_zi3qjb/ramdisk/ramdisk.cpio.gz
218 12:06:39.198045 - {KERNEL}: 12207092/tftp-deploy-l_zi3qjb/kernel/bzImage
219 12:06:39.198089 - {LAVA_MAC}: None
220 12:06:39.198131 - {PRESEED_CONFIG}: None
221 12:06:39.198174 - {PRESEED_LOCAL}: None
222 12:06:39.198217 - {RAMDISK}: 12207092/tftp-deploy-l_zi3qjb/ramdisk/ramdisk.cpio.gz
223 12:06:39.198259 - {ROOT_PART}: None
224 12:06:39.198302 - {ROOT}: None
225 12:06:39.198348 - {SERVER_IP}: 192.168.201.1
226 12:06:39.198407 - {TEE}: None
227 12:06:39.198451 Parsed boot commands:
228 12:06:39.198495 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 12:06:39.198637 Parsed boot commands: tftpboot 192.168.201.1 12207092/tftp-deploy-l_zi3qjb/kernel/bzImage 12207092/tftp-deploy-l_zi3qjb/kernel/cmdline 12207092/tftp-deploy-l_zi3qjb/ramdisk/ramdisk.cpio.gz
230 12:06:39.198718 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 12:06:39.198789 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 12:06:39.198879 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 12:06:39.198953 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 12:06:39.199010 Not connected, no need to disconnect.
235 12:06:39.199069 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 12:06:39.199133 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 12:06:39.199186 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
238 12:06:39.202084 Setting prompt string to ['lava-test: # ']
239 12:06:39.202342 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 12:06:39.202431 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 12:06:39.202520 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 12:06:39.202587 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 12:06:39.202748 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
244 12:06:44.330876 >> Command sent successfully.
245 12:06:44.333140 Returned 0 in 5 seconds
246 12:06:44.433477 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 12:06:44.433778 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 12:06:44.433862 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 12:06:44.433930 Setting prompt string to 'Starting depthcharge on Volmar...'
251 12:06:44.433982 Changing prompt to 'Starting depthcharge on Volmar...'
252 12:06:44.434032 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 12:06:44.434249 [Enter `^Ec?' for help]
254 12:06:45.810262
255 12:06:45.810795
256 12:06:45.817177 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 12:06:45.820744 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 12:06:45.824193 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 12:06:45.831648 CPU: AES supported, TXT NOT supported, VT supported
260 12:06:45.839260 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 12:06:45.839320 Cache size = 10 MiB
262 12:06:45.846930 MCH: device id 4609 (rev 04) is Alderlake-P
263 12:06:45.850758 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 12:06:45.854027 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 12:06:45.858234 VBOOT: Loading verstage.
266 12:06:45.861800 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 12:06:45.868471 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 12:06:45.872460 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 12:06:45.879267 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 12:06:45.888760 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 12:06:45.889206
272 12:06:45.889464
273 12:06:45.898755 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 12:06:45.902872 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 12:06:45.906914 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 12:06:45.909630 done! DID_VID 0x00281ae0
277 12:06:45.913392 TPM ready after 0 ms
278 12:06:45.917698 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
279 12:06:45.929756 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
280 12:06:45.936479 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
281 12:06:45.998129 tlcl_send_startup: Startup return code is 0
282 12:06:45.998606 TPM: setup succeeded
283 12:06:46.020085 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
284 12:06:46.042021 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
285 12:06:46.045672 Chrome EC: UHEPI supported
286 12:06:46.048689 Reading cr50 boot mode
287 12:06:46.063605 Cr50 says boot_mode is VERIFIED_RW(0x00).
288 12:06:46.064147 Phase 1
289 12:06:46.071229 FMAP: area GBB found @ 1805000 (458752 bytes)
290 12:06:46.078119 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
291 12:06:46.084692 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
292 12:06:46.091741 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
293 12:06:46.092305 Phase 2
294 12:06:46.092696 Phase 3
295 12:06:46.098444 FMAP: area GBB found @ 1805000 (458752 bytes)
296 12:06:46.101769 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 12:06:46.108294 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 12:06:46.115225 VB2:vb2_verify_keyblock() Checking keyblock signature...
299 12:06:46.122045 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
300 12:06:46.129111 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
301 12:06:46.135459 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
302 12:06:46.148690 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 12:06:46.151909 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 12:06:46.158489 VB2:vb2_verify_fw_preamble() Verifying preamble.
305 12:06:46.165193 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
306 12:06:46.171662 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
307 12:06:46.178761 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
308 12:06:46.182075 Phase 4
309 12:06:46.185353 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
310 12:06:46.191815 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
311 12:06:46.404253 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
312 12:06:46.411171 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
313 12:06:46.414528 Saving vboot hash.
314 12:06:46.421240 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
315 12:06:46.436764 tlcl_extend: response is 0
316 12:06:46.443673 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
317 12:06:46.450432 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
318 12:06:46.464688 tlcl_extend: response is 0
319 12:06:46.471129 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
320 12:06:46.492627 tlcl_lock_nv_write: response is 0
321 12:06:46.512047 tlcl_lock_nv_write: response is 0
322 12:06:46.512151 Slot A is selected
323 12:06:46.518500 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 12:06:46.525267 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
325 12:06:46.531750 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
326 12:06:46.538392 BS: verstage times (exec / console): total (unknown) / 257 ms
327 12:06:46.538469
328 12:06:46.538523
329 12:06:46.545226 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
330 12:06:46.549220 Google Chrome EC: version:
331 12:06:46.552273 ro: volmar_v2.0.14126-e605144e9c
332 12:06:46.555732 rw: volmar_v0.0.55-22d1557
333 12:06:46.558941 running image: 2
334 12:06:46.562731 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 12:06:46.572533 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
336 12:06:46.579010 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
337 12:06:46.585662 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
338 12:06:46.595751 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 12:06:46.605661 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 12:06:46.612274 EC took 2172us to calculate image hash
341 12:06:46.622664 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 12:06:46.625832 VB2:sync_ec() select_rw=RW(active)
343 12:06:46.636323 Waited 270us to clear limit power flag.
344 12:06:46.639286 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:06:46.642897 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:06:46.646118 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 12:06:46.652813 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
348 12:06:46.656087 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
349 12:06:46.659698 TCO_STS: 0000 0000
350 12:06:46.662675 GEN_PMCON: d0015038 00002200
351 12:06:46.666369 GBLRST_CAUSE: 00000000 00000000
352 12:06:46.666858 HPR_CAUSE0: 00000000
353 12:06:46.669189 prev_sleep_state 5
354 12:06:46.675486 Abort disabling TXT, as CPU is not TXT capable.
355 12:06:46.678968 cse_lite: Number of partitions = 3
356 12:06:46.682330 cse_lite: Current partition = RO
357 12:06:46.685564 cse_lite: Next partition = RO
358 12:06:46.688664 cse_lite: Flags = 0x7
359 12:06:46.695630 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
360 12:06:46.702125 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
361 12:06:46.708753 FMAP: area SI_ME found @ 1000 (5238784 bytes)
362 12:06:46.715463 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 12:06:46.719024 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
364 12:06:46.725149 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
365 12:06:46.731961 cse_lite: CSE CBFS RW version : 16.1.25.2049
366 12:06:46.735082 cse_lite: Set Boot Partition Info Command (RW)
367 12:06:46.742442 HECI: Global Reset(Type:1) Command
368 12:06:48.161577 721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
369 12:06:48.164810 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
370 12:06:48.168176 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
371 12:06:48.175108 CPU: AES supported, TXT NOT supported, VT supported
372 12:06:48.181524 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
373 12:06:48.185182 Cache size = 10 MiB
374 12:06:48.188321 MCH: device id 4609 (rev 04) is Alderlake-P
375 12:06:48.194654 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
376 12:06:48.198397 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
377 12:06:48.201978 VBOOT: Loading verstage.
378 12:06:48.205999 FMAP: Found "FLASH" version 1.1 at 0x1804000.
379 12:06:48.208500 FMAP: base = 0x0 size = 0x2000000 #areas = 37
380 12:06:48.215974 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 12:06:48.223382 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
382 12:06:48.229739 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
383 12:06:48.233563
384 12:06:48.233920
385 12:06:48.240436 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
386 12:06:48.247213 Probing TPM I2C: I2C bus 1 version 0x3230302a
387 12:06:48.250028 DW I2C bus 1 at 0xfe022000 (400 KHz)
388 12:06:48.253601 done! DID_VID 0x00281ae0
389 12:06:48.257366 TPM ready after 0 ms
390 12:06:48.260581 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
391 12:06:48.269976 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
392 12:06:48.276223 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
393 12:06:48.341415 tlcl_send_startup: Startup return code is 0
394 12:06:48.341898 TPM: setup succeeded
395 12:06:48.362322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
396 12:06:48.383165 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
397 12:06:48.387206 Chrome EC: UHEPI supported
398 12:06:48.390308 Reading cr50 boot mode
399 12:06:48.405283 Cr50 says boot_mode is VERIFIED_RW(0x00).
400 12:06:48.405792 Phase 1
401 12:06:48.411806 FMAP: area GBB found @ 1805000 (458752 bytes)
402 12:06:48.418636 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 12:06:48.425187 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 12:06:48.430993 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
405 12:06:48.434901 Phase 2
406 12:06:48.435470 Phase 3
407 12:06:48.438249 FMAP: area GBB found @ 1805000 (458752 bytes)
408 12:06:48.444377 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 12:06:48.447873 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 12:06:48.454798 VB2:vb2_verify_keyblock() Checking keyblock signature...
411 12:06:48.461490 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
412 12:06:48.471255 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
413 12:06:48.477427 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
414 12:06:48.490597 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 12:06:48.493378 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 12:06:48.499945 VB2:vb2_verify_fw_preamble() Verifying preamble.
417 12:06:48.507038 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
418 12:06:48.513434 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
419 12:06:48.520642 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
420 12:06:48.524587 Phase 4
421 12:06:48.527660 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
422 12:06:48.534436 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
423 12:06:48.746432 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
424 12:06:48.753121 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
425 12:06:48.756653 Saving vboot hash.
426 12:06:48.763045 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
427 12:06:48.778961 tlcl_extend: response is 0
428 12:06:48.785531 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
429 12:06:48.792256 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
430 12:06:48.806683 tlcl_extend: response is 0
431 12:06:48.813232 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
432 12:06:48.833015 tlcl_lock_nv_write: response is 0
433 12:06:48.852470 tlcl_lock_nv_write: response is 0
434 12:06:48.852974 Slot A is selected
435 12:06:48.858795 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 12:06:48.865458 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
437 12:06:48.872213 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
438 12:06:48.879317 BS: verstage times (exec / console): total (unknown) / 257 ms
439 12:06:48.879822
440 12:06:48.880147
441 12:06:48.885459 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
442 12:06:48.889906 Google Chrome EC: version:
443 12:06:48.892599 ro: volmar_v2.0.14126-e605144e9c
444 12:06:48.895734 rw: volmar_v0.0.55-22d1557
445 12:06:48.899828 running image: 2
446 12:06:48.902731 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
447 12:06:48.912790 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
448 12:06:48.919560 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
449 12:06:48.926371 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
450 12:06:48.936061 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 12:06:48.945733 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 12:06:48.949624 EC took 942us to calculate image hash
453 12:06:48.959903 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 12:06:48.963141 VB2:sync_ec() select_rw=RW(active)
455 12:06:48.979705 Waited 665us to clear limit power flag.
456 12:06:48.982599 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
457 12:06:48.986227 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
458 12:06:48.989442 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
459 12:06:48.995657 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
460 12:06:48.999707 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
461 12:06:49.002792 TCO_STS: 0000 0000
462 12:06:49.005704 GEN_PMCON: d1001038 00002200
463 12:06:49.009115 GBLRST_CAUSE: 00000040 00000000
464 12:06:49.009617 HPR_CAUSE0: 00000000
465 12:06:49.011962 prev_sleep_state 5
466 12:06:49.015844 Abort disabling TXT, as CPU is not TXT capable.
467 12:06:49.023935 cse_lite: Number of partitions = 3
468 12:06:49.027464 cse_lite: Current partition = RW
469 12:06:49.027971 cse_lite: Next partition = RW
470 12:06:49.031229 cse_lite: Flags = 0x7
471 12:06:49.037053 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
472 12:06:49.047262 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
473 12:06:49.050450 FMAP: area SI_ME found @ 1000 (5238784 bytes)
474 12:06:49.056915 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
475 12:06:49.063844 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
476 12:06:49.070283 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
477 12:06:49.073688 cse_lite: CSE CBFS RW version : 16.1.25.2049
478 12:06:49.077436 Boot Count incremented to 3447
479 12:06:49.083857 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
480 12:06:49.090173 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 12:06:49.103124 Probing TPM I2C: done! DID_VID 0x00281ae0
482 12:06:49.106709 Locality already claimed
483 12:06:49.109831 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 12:06:49.129569 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 12:06:49.136416 MRC: Hash idx 0x100d comparison successful.
486 12:06:49.139400 MRC cache found, size f6c8
487 12:06:49.139911 bootmode is set to: 2
488 12:06:49.143354 EC returned error result code 3
489 12:06:49.146544 FW_CONFIG value from CBI is 0x131
490 12:06:49.153149 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
491 12:06:49.155912 SPD index = 0
492 12:06:49.162913 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
493 12:06:49.163402 SPD: module type is LPDDR4X
494 12:06:49.169888 SPD: module part number is K4U6E3S4AB-MGCL
495 12:06:49.176526 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
496 12:06:49.179852 SPD: device width 16 bits, bus width 16 bits
497 12:06:49.183166 SPD: module size is 1024 MB (per channel)
498 12:06:49.252606 CBMEM:
499 12:06:49.255543 IMD: root @ 0x76fff000 254 entries.
500 12:06:49.258456 IMD: root @ 0x76ffec00 62 entries.
501 12:06:49.266929 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
502 12:06:49.270012 RO_VPD is uninitialized or empty.
503 12:06:49.273628 FMAP: area RW_VPD found @ f29000 (8192 bytes)
504 12:06:49.279662 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
505 12:06:49.283633 External stage cache:
506 12:06:49.286999 IMD: root @ 0x7bbff000 254 entries.
507 12:06:49.290320 IMD: root @ 0x7bbfec00 62 entries.
508 12:06:49.296704 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 12:06:49.303400 MRC: Checking cached data update for 'RW_MRC_CACHE'.
510 12:06:49.306844 MRC: 'RW_MRC_CACHE' does not need update.
511 12:06:49.307247 8 DIMMs found
512 12:06:49.309793 SMM Memory Map
513 12:06:49.313818 SMRAM : 0x7b800000 0x800000
514 12:06:49.316759 Subregion 0: 0x7b800000 0x200000
515 12:06:49.320415 Subregion 1: 0x7ba00000 0x200000
516 12:06:49.323370 Subregion 2: 0x7bc00000 0x400000
517 12:06:49.326863 top_of_ram = 0x77000000
518 12:06:49.330412 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
519 12:06:49.336981 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
520 12:06:49.343603 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
521 12:06:49.346784 MTRR Range: Start=ff000000 End=0 (Size 1000000)
522 12:06:49.347264 Normal boot
523 12:06:49.356721 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
524 12:06:49.363554 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
525 12:06:49.370002 Processing 237 relocs. Offset value of 0x74ab9000
526 12:06:49.378101 BS: romstage times (exec / console): total (unknown) / 377 ms
527 12:06:49.385635
528 12:06:49.386125
529 12:06:49.392153 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
530 12:06:49.392697 Normal boot
531 12:06:49.398750 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
532 12:06:49.405672 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
533 12:06:49.411661 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
534 12:06:49.422400 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
535 12:06:49.470090 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
536 12:06:49.476851 Processing 5931 relocs. Offset value of 0x72a2f000
537 12:06:49.479977 BS: postcar times (exec / console): total (unknown) / 51 ms
538 12:06:49.482957
539 12:06:49.483468
540 12:06:49.489657 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
541 12:06:49.493480 Reserving BERT start 76a1e000, size 10000
542 12:06:49.496300 Normal boot
543 12:06:49.499658 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
544 12:06:49.506253 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
545 12:06:49.516367 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
546 12:06:49.518945 FMAP: area RW_VPD found @ f29000 (8192 bytes)
547 12:06:49.522849 Google Chrome EC: version:
548 12:06:49.526790 ro: volmar_v2.0.14126-e605144e9c
549 12:06:49.529681 rw: volmar_v0.0.55-22d1557
550 12:06:49.533140 running image: 2
551 12:06:49.536376 ACPI _SWS is PM1 Index 8 GPE Index -1
552 12:06:49.539676 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
553 12:06:49.543278 EC returned error result code 3
554 12:06:49.546767 FW_CONFIG value from CBI is 0x131
555 12:06:49.553797 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
556 12:06:49.556877 PCI: 00:1c.2 disabled by fw_config
557 12:06:49.563697 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 12:06:49.566833 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 12:06:49.573474 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 12:06:49.576860 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
561 12:06:49.583546 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
562 12:06:49.589984 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
563 12:06:49.596730 microcode: sig=0x906a4 pf=0x80 revision=0x423
564 12:06:49.599566 microcode: Update skipped, already up-to-date
565 12:06:49.606296 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
566 12:06:49.639681 Detected 6 core, 8 thread CPU.
567 12:06:49.642741 Setting up SMI for CPU
568 12:06:49.646024 IED base = 0x7bc00000
569 12:06:49.646403 IED size = 0x00400000
570 12:06:49.649528 Will perform SMM setup.
571 12:06:49.656162 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
572 12:06:49.656663 LAPIC 0x0 in XAPIC mode.
573 12:06:49.666208 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
574 12:06:49.669072 Processing 18 relocs. Offset value of 0x00030000
575 12:06:49.674279 Attempting to start 7 APs
576 12:06:49.677329 Waiting for 10ms after sending INIT.
577 12:06:49.690345 Waiting for SIPI to complete...
578 12:06:49.693709 LAPIC 0x14 in XAPIC mode.
579 12:06:49.694197 done.
580 12:06:49.697285 Waiting for SIPI to complete...
581 12:06:49.700691 LAPIC 0x1 in XAPIC mode.
582 12:06:49.703781 AP: slot 1 apic_id 14, MCU rev: 0x00000423
583 12:06:49.707431 LAPIC 0x12 in XAPIC mode.
584 12:06:49.710446 LAPIC 0x10 in XAPIC mode.
585 12:06:49.713450 LAPIC 0x9 in XAPIC mode.
586 12:06:49.716848 LAPIC 0x16 in XAPIC mode.
587 12:06:49.720189 AP: slot 4 apic_id 12, MCU rev: 0x00000423
588 12:06:49.720605 done.
589 12:06:49.723740 AP: slot 5 apic_id 1, MCU rev: 0x00000423
590 12:06:49.730645 AP: slot 2 apic_id 16, MCU rev: 0x00000423
591 12:06:49.734008 AP: slot 3 apic_id 10, MCU rev: 0x00000423
592 12:06:49.736875 AP: slot 7 apic_id 9, MCU rev: 0x00000423
593 12:06:49.740392 LAPIC 0x8 in XAPIC mode.
594 12:06:49.743532 AP: slot 6 apic_id 8, MCU rev: 0x00000423
595 12:06:49.746837 smm_setup_relocation_handler: enter
596 12:06:49.750344 smm_setup_relocation_handler: exit
597 12:06:49.760415 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
598 12:06:49.763812 Processing 11 relocs. Offset value of 0x00038000
599 12:06:49.770271 smm_module_setup_stub: stack_top = 0x7b804000
600 12:06:49.773846 smm_module_setup_stub: per cpu stack_size = 0x800
601 12:06:49.780296 smm_module_setup_stub: runtime.start32_offset = 0x4c
602 12:06:49.783700 smm_module_setup_stub: runtime.smm_size = 0x10000
603 12:06:49.790227 SMM Module: stub loaded at 38000. Will call 0x76a52094
604 12:06:49.793375 Installing permanent SMM handler to 0x7b800000
605 12:06:49.800224 smm_load_module: total_smm_space_needed e468, available -> 200000
606 12:06:49.809984 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
607 12:06:49.813733 Processing 255 relocs. Offset value of 0x7b9f6000
608 12:06:49.820069 smm_load_module: smram_start: 0x7b800000
609 12:06:49.823604 smm_load_module: smram_end: 7ba00000
610 12:06:49.826787 smm_load_module: handler start 0x7b9f6d5f
611 12:06:49.830024 smm_load_module: handler_size 98d0
612 12:06:49.833460 smm_load_module: fxsave_area 0x7b9ff000
613 12:06:49.836700 smm_load_module: fxsave_size 1000
614 12:06:49.840125 smm_load_module: CONFIG_MSEG_SIZE 0x0
615 12:06:49.846250 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
616 12:06:49.853019 smm_load_module: handler_mod_params.smbase = 0x7b800000
617 12:06:49.856280 smm_load_module: per_cpu_save_state_size = 0x400
618 12:06:49.859650 smm_load_module: num_cpus = 0x8
619 12:06:49.866211 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
620 12:06:49.869641 smm_load_module: total_save_state_size = 0x2000
621 12:06:49.876597 smm_load_module: cpu0 entry: 7b9e6000
622 12:06:49.879852 smm_create_map: cpus allowed in one segment 30
623 12:06:49.882897 smm_create_map: min # of segments needed 1
624 12:06:49.886846 CPU 0x0
625 12:06:49.889400 smbase 7b9e6000 entry 7b9ee000
626 12:06:49.893001 ss_start 7b9f5c00 code_end 7b9ee208
627 12:06:49.893373 CPU 0x1
628 12:06:49.895767 smbase 7b9e5c00 entry 7b9edc00
629 12:06:49.902723 ss_start 7b9f5800 code_end 7b9ede08
630 12:06:49.903227 CPU 0x2
631 12:06:49.906217 smbase 7b9e5800 entry 7b9ed800
632 12:06:49.912371 ss_start 7b9f5400 code_end 7b9eda08
633 12:06:49.912819 CPU 0x3
634 12:06:49.916154 smbase 7b9e5400 entry 7b9ed400
635 12:06:49.919023 ss_start 7b9f5000 code_end 7b9ed608
636 12:06:49.922673 CPU 0x4
637 12:06:49.926031 smbase 7b9e5000 entry 7b9ed000
638 12:06:49.929179 ss_start 7b9f4c00 code_end 7b9ed208
639 12:06:49.929638 CPU 0x5
640 12:06:49.935891 smbase 7b9e4c00 entry 7b9ecc00
641 12:06:49.939592 ss_start 7b9f4800 code_end 7b9ece08
642 12:06:49.940141 CPU 0x6
643 12:06:49.942687 smbase 7b9e4800 entry 7b9ec800
644 12:06:49.949329 ss_start 7b9f4400 code_end 7b9eca08
645 12:06:49.949865 CPU 0x7
646 12:06:49.952400 smbase 7b9e4400 entry 7b9ec400
647 12:06:49.959330 ss_start 7b9f4000 code_end 7b9ec608
648 12:06:49.965829 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
649 12:06:49.973156 Processing 11 relocs. Offset value of 0x7b9ee000
650 12:06:49.975691 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
651 12:06:49.982891 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
652 12:06:49.989406 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
653 12:06:49.995628 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
654 12:06:50.002179 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
655 12:06:50.008887 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
656 12:06:50.015937 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
657 12:06:50.019112 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
658 12:06:50.025644 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
659 12:06:50.032209 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
660 12:06:50.038828 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
661 12:06:50.045329 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
662 12:06:50.052165 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
663 12:06:50.059245 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
664 12:06:50.065440 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
665 12:06:50.068356 smm_module_setup_stub: stack_top = 0x7b804000
666 12:06:50.075329 smm_module_setup_stub: per cpu stack_size = 0x800
667 12:06:50.078822 smm_module_setup_stub: runtime.start32_offset = 0x4c
668 12:06:50.085131 smm_module_setup_stub: runtime.smm_size = 0x200000
669 12:06:50.091976 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
670 12:06:50.095188 Clearing SMI status registers
671 12:06:50.098254 SMI_STS: PM1
672 12:06:50.098652 PM1_STS: WAK PWRBTN
673 12:06:50.105035 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
674 12:06:50.108119 In relocation handler: CPU 0
675 12:06:50.111984 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
676 12:06:50.118499 Writing SMRR. base = 0x7b800006, mask=0xff800c00
677 12:06:50.121860 Relocation complete.
678 12:06:50.128686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
679 12:06:50.131739 In relocation handler: CPU 5
680 12:06:50.134912 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
681 12:06:50.138981 Relocation complete.
682 12:06:50.145127 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
683 12:06:50.148541 In relocation handler: CPU 4
684 12:06:50.151761 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
685 12:06:50.155122 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 12:06:50.158723 Relocation complete.
687 12:06:50.165530 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
688 12:06:50.168511 In relocation handler: CPU 2
689 12:06:50.171662 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
690 12:06:50.178956 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 12:06:50.179458 Relocation complete.
692 12:06:50.185270 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
693 12:06:50.188437 In relocation handler: CPU 3
694 12:06:50.195016 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
695 12:06:50.198112 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 12:06:50.201413 Relocation complete.
697 12:06:50.208294 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
698 12:06:50.211783 In relocation handler: CPU 1
699 12:06:50.214810 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
700 12:06:50.218056 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 12:06:50.221519 Relocation complete.
702 12:06:50.227895 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
703 12:06:50.230914 In relocation handler: CPU 7
704 12:06:50.234220 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
705 12:06:50.237664 Relocation complete.
706 12:06:50.243836 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
707 12:06:50.247668 In relocation handler: CPU 6
708 12:06:50.250695 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
709 12:06:50.257451 Writing SMRR. base = 0x7b800006, mask=0xff800c00
710 12:06:50.257527 Relocation complete.
711 12:06:50.261515 Initializing CPU #0
712 12:06:50.264840 CPU: vendor Intel device 906a4
713 12:06:50.268092 CPU: family 06, model 9a, stepping 04
714 12:06:50.271377 Clearing out pending MCEs
715 12:06:50.274621 cpu: energy policy set to 7
716 12:06:50.278177 Turbo is available but hidden
717 12:06:50.281837 Turbo is available and visible
718 12:06:50.285013 microcode: Update skipped, already up-to-date
719 12:06:50.287898 CPU #0 initialized
720 12:06:50.288434 Initializing CPU #5
721 12:06:50.291292 Initializing CPU #1
722 12:06:50.294750 CPU: vendor Intel device 906a4
723 12:06:50.297311 CPU: family 06, model 9a, stepping 04
724 12:06:50.300962 Initializing CPU #3
725 12:06:50.301039 Initializing CPU #6
726 12:06:50.304294 CPU: vendor Intel device 906a4
727 12:06:50.307346 CPU: family 06, model 9a, stepping 04
728 12:06:50.310440 CPU: vendor Intel device 906a4
729 12:06:50.313888 CPU: family 06, model 9a, stepping 04
730 12:06:50.317465 Clearing out pending MCEs
731 12:06:50.320577 Initializing CPU #4
732 12:06:50.320637 Initializing CPU #7
733 12:06:50.324079 Clearing out pending MCEs
734 12:06:50.327176 CPU: vendor Intel device 906a4
735 12:06:50.331196 CPU: family 06, model 9a, stepping 04
736 12:06:50.334153 cpu: energy policy set to 7
737 12:06:50.337676 Initializing CPU #2
738 12:06:50.340831 microcode: Update skipped, already up-to-date
739 12:06:50.344113 CPU #3 initialized
740 12:06:50.347347 CPU: vendor Intel device 906a4
741 12:06:50.350809 CPU: family 06, model 9a, stepping 04
742 12:06:50.353984 Clearing out pending MCEs
743 12:06:50.354046 CPU: vendor Intel device 906a4
744 12:06:50.361021 CPU: family 06, model 9a, stepping 04
745 12:06:50.361078 cpu: energy policy set to 7
746 12:06:50.363824 cpu: energy policy set to 7
747 12:06:50.367443 Clearing out pending MCEs
748 12:06:50.370427 Clearing out pending MCEs
749 12:06:50.373817 cpu: energy policy set to 7
750 12:06:50.377240 cpu: energy policy set to 7
751 12:06:50.380818 microcode: Update skipped, already up-to-date
752 12:06:50.384141 CPU #4 initialized
753 12:06:50.387418 microcode: Update skipped, already up-to-date
754 12:06:50.390282 CPU #2 initialized
755 12:06:50.393738 microcode: Update skipped, already up-to-date
756 12:06:50.397400 CPU #1 initialized
757 12:06:50.397458 CPU: vendor Intel device 906a4
758 12:06:50.403745 CPU: family 06, model 9a, stepping 04
759 12:06:50.407249 microcode: Update skipped, already up-to-date
760 12:06:50.410305 CPU #6 initialized
761 12:06:50.410365 Clearing out pending MCEs
762 12:06:50.413715 Clearing out pending MCEs
763 12:06:50.417417 cpu: energy policy set to 7
764 12:06:50.420879 cpu: energy policy set to 7
765 12:06:50.424122 microcode: Update skipped, already up-to-date
766 12:06:50.427517 CPU #7 initialized
767 12:06:50.430744 microcode: Update skipped, already up-to-date
768 12:06:50.433920 CPU #5 initialized
769 12:06:50.437104 bsp_do_flight_plan done after 712 msecs.
770 12:06:50.440717 CPU: frequency set to 4400 MHz
771 12:06:50.440775 Enabling SMIs.
772 12:06:50.446750 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
773 12:06:50.464521 Probing TPM I2C: done! DID_VID 0x00281ae0
774 12:06:50.467743 Locality already claimed
775 12:06:50.471022 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
776 12:06:50.482480 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
777 12:06:50.485693 Enabling GPIO PM b/c CR50 has long IRQ pulse support
778 12:06:50.492188 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
779 12:06:50.498898 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
780 12:06:50.502359 Found a VBT of 9216 bytes after decompression
781 12:06:50.505635 PCI 1.0, PIN A, using IRQ #16
782 12:06:50.508978 PCI 2.0, PIN A, using IRQ #17
783 12:06:50.512115 PCI 4.0, PIN A, using IRQ #18
784 12:06:50.515393 PCI 5.0, PIN A, using IRQ #16
785 12:06:50.518914 PCI 6.0, PIN A, using IRQ #16
786 12:06:50.522167 PCI 6.2, PIN C, using IRQ #18
787 12:06:50.525607 PCI 7.0, PIN A, using IRQ #19
788 12:06:50.529030 PCI 7.1, PIN B, using IRQ #20
789 12:06:50.532235 PCI 7.2, PIN C, using IRQ #21
790 12:06:50.535368 PCI 7.3, PIN D, using IRQ #22
791 12:06:50.538803 PCI 8.0, PIN A, using IRQ #23
792 12:06:50.542177 PCI D.0, PIN A, using IRQ #17
793 12:06:50.545274 PCI D.1, PIN B, using IRQ #19
794 12:06:50.545340 PCI 10.0, PIN A, using IRQ #24
795 12:06:50.548482 PCI 10.1, PIN B, using IRQ #25
796 12:06:50.551855 PCI 10.6, PIN C, using IRQ #20
797 12:06:50.555197 PCI 10.7, PIN D, using IRQ #21
798 12:06:50.558592 PCI 11.0, PIN A, using IRQ #26
799 12:06:50.561960 PCI 11.1, PIN B, using IRQ #27
800 12:06:50.565559 PCI 11.2, PIN C, using IRQ #28
801 12:06:50.568961 PCI 11.3, PIN D, using IRQ #29
802 12:06:50.572213 PCI 12.0, PIN A, using IRQ #30
803 12:06:50.575258 PCI 12.6, PIN B, using IRQ #31
804 12:06:50.578601 PCI 12.7, PIN C, using IRQ #22
805 12:06:50.581969 PCI 13.0, PIN A, using IRQ #32
806 12:06:50.585179 PCI 13.1, PIN B, using IRQ #33
807 12:06:50.588400 PCI 13.2, PIN C, using IRQ #34
808 12:06:50.591975 PCI 13.3, PIN D, using IRQ #35
809 12:06:50.595362 PCI 14.0, PIN B, using IRQ #23
810 12:06:50.598622 PCI 14.1, PIN A, using IRQ #36
811 12:06:50.598695 PCI 14.3, PIN C, using IRQ #17
812 12:06:50.601621 PCI 15.0, PIN A, using IRQ #37
813 12:06:50.605191 PCI 15.1, PIN B, using IRQ #38
814 12:06:50.608882 PCI 15.2, PIN C, using IRQ #39
815 12:06:50.611577 PCI 15.3, PIN D, using IRQ #40
816 12:06:50.615309 PCI 16.0, PIN A, using IRQ #18
817 12:06:50.619005 PCI 16.1, PIN B, using IRQ #19
818 12:06:50.621714 PCI 16.2, PIN C, using IRQ #20
819 12:06:50.624845 PCI 16.3, PIN D, using IRQ #21
820 12:06:50.628260 PCI 16.4, PIN A, using IRQ #18
821 12:06:50.631981 PCI 16.5, PIN B, using IRQ #19
822 12:06:50.634814 PCI 17.0, PIN A, using IRQ #22
823 12:06:50.638264 PCI 19.0, PIN A, using IRQ #41
824 12:06:50.641641 PCI 19.1, PIN B, using IRQ #42
825 12:06:50.645388 PCI 19.2, PIN C, using IRQ #43
826 12:06:50.648271 PCI 1C.0, PIN A, using IRQ #16
827 12:06:50.651350 PCI 1C.1, PIN B, using IRQ #17
828 12:06:50.651410 PCI 1C.2, PIN C, using IRQ #18
829 12:06:50.655051 PCI 1C.3, PIN D, using IRQ #19
830 12:06:50.658289 PCI 1C.4, PIN A, using IRQ #16
831 12:06:50.661386 PCI 1C.5, PIN B, using IRQ #17
832 12:06:50.664806 PCI 1C.6, PIN C, using IRQ #18
833 12:06:50.668131 PCI 1C.7, PIN D, using IRQ #19
834 12:06:50.671710 PCI 1D.0, PIN A, using IRQ #16
835 12:06:50.674810 PCI 1D.1, PIN B, using IRQ #17
836 12:06:50.678214 PCI 1D.2, PIN C, using IRQ #18
837 12:06:50.681411 PCI 1D.3, PIN D, using IRQ #19
838 12:06:50.684867 PCI 1E.0, PIN A, using IRQ #23
839 12:06:50.687963 PCI 1E.1, PIN B, using IRQ #20
840 12:06:50.691418 PCI 1E.2, PIN C, using IRQ #44
841 12:06:50.694848 PCI 1E.3, PIN D, using IRQ #45
842 12:06:50.698024 PCI 1F.3, PIN B, using IRQ #22
843 12:06:50.701257 PCI 1F.4, PIN C, using IRQ #23
844 12:06:50.704589 PCI 1F.6, PIN D, using IRQ #20
845 12:06:50.704661 PCI 1F.7, PIN A, using IRQ #21
846 12:06:50.711367 IRQ: Using dynamically assigned PCI IO-APIC IRQs
847 12:06:50.718310 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
848 12:06:50.897503 FSPS returned 0
849 12:06:50.900676 Executing Phase 1 of FspMultiPhaseSiInit
850 12:06:50.910196 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
851 12:06:50.913770 port C0 DISC req: usage 1 usb3 1 usb2 1
852 12:06:50.917382 Raw Buffer output 0 00000111
853 12:06:50.920180 Raw Buffer output 1 00000000
854 12:06:50.924270 pmc_send_ipc_cmd succeeded
855 12:06:50.931334 port C1 DISC req: usage 1 usb3 3 usb2 3
856 12:06:50.931413 Raw Buffer output 0 00000331
857 12:06:50.933989 Raw Buffer output 1 00000000
858 12:06:50.938171 pmc_send_ipc_cmd succeeded
859 12:06:50.941712 Detected 6 core, 8 thread CPU.
860 12:06:50.944932 Detected 6 core, 8 thread CPU.
861 12:06:50.951286 Detected 6 core, 8 thread CPU.
862 12:06:50.953676 Detected 6 core, 8 thread CPU.
863 12:06:50.957557 Detected 6 core, 8 thread CPU.
864 12:06:50.960648 Detected 6 core, 8 thread CPU.
865 12:06:50.963787 Detected 6 core, 8 thread CPU.
866 12:06:50.967001 Detected 6 core, 8 thread CPU.
867 12:06:50.970458 Detected 6 core, 8 thread CPU.
868 12:06:50.973694 Detected 6 core, 8 thread CPU.
869 12:06:50.977161 Detected 6 core, 8 thread CPU.
870 12:06:50.980218 Detected 6 core, 8 thread CPU.
871 12:06:50.983581 Detected 6 core, 8 thread CPU.
872 12:06:50.986965 Detected 6 core, 8 thread CPU.
873 12:06:50.990284 Detected 6 core, 8 thread CPU.
874 12:06:50.993534 Detected 6 core, 8 thread CPU.
875 12:06:50.996896 Detected 6 core, 8 thread CPU.
876 12:06:51.000344 Detected 6 core, 8 thread CPU.
877 12:06:51.003599 Detected 6 core, 8 thread CPU.
878 12:06:51.007036 Detected 6 core, 8 thread CPU.
879 12:06:51.010190 Detected 6 core, 8 thread CPU.
880 12:06:51.013323 Detected 6 core, 8 thread CPU.
881 12:06:51.303810 Detected 6 core, 8 thread CPU.
882 12:06:51.307066 Detected 6 core, 8 thread CPU.
883 12:06:51.310328 Detected 6 core, 8 thread CPU.
884 12:06:51.313937 Detected 6 core, 8 thread CPU.
885 12:06:51.317035 Detected 6 core, 8 thread CPU.
886 12:06:51.320219 Detected 6 core, 8 thread CPU.
887 12:06:51.323655 Detected 6 core, 8 thread CPU.
888 12:06:51.326971 Detected 6 core, 8 thread CPU.
889 12:06:51.330205 Detected 6 core, 8 thread CPU.
890 12:06:51.334116 Detected 6 core, 8 thread CPU.
891 12:06:51.336940 Detected 6 core, 8 thread CPU.
892 12:06:51.340229 Detected 6 core, 8 thread CPU.
893 12:06:51.343595 Detected 6 core, 8 thread CPU.
894 12:06:51.347023 Detected 6 core, 8 thread CPU.
895 12:06:51.350236 Detected 6 core, 8 thread CPU.
896 12:06:51.353552 Detected 6 core, 8 thread CPU.
897 12:06:51.356889 Detected 6 core, 8 thread CPU.
898 12:06:51.359964 Detected 6 core, 8 thread CPU.
899 12:06:51.363652 Detected 6 core, 8 thread CPU.
900 12:06:51.366634 Detected 6 core, 8 thread CPU.
901 12:06:51.370035 Display FSP Version Info HOB
902 12:06:51.373985 Reference Code - CPU = c.0.65.70
903 12:06:51.374055 uCode Version = 0.0.4.23
904 12:06:51.376805 TXT ACM version = ff.ff.ff.ffff
905 12:06:51.379933 Reference Code - ME = c.0.65.70
906 12:06:51.383372 MEBx version = 0.0.0.0
907 12:06:51.386602 ME Firmware Version = Lite SKU
908 12:06:51.390210 Reference Code - PCH = c.0.65.70
909 12:06:51.393280 PCH-CRID Status = Disabled
910 12:06:51.396906 PCH-CRID Original Value = ff.ff.ff.ffff
911 12:06:51.400256 PCH-CRID New Value = ff.ff.ff.ffff
912 12:06:51.403278 OPROM - RST - RAID = ff.ff.ff.ffff
913 12:06:51.406660 PCH Hsio Version = 4.0.0.0
914 12:06:51.410039 Reference Code - SA - System Agent = c.0.65.70
915 12:06:51.413840 Reference Code - MRC = 0.0.3.80
916 12:06:51.416668 SA - PCIe Version = c.0.65.70
917 12:06:51.419938 SA-CRID Status = Disabled
918 12:06:51.424091 SA-CRID Original Value = 0.0.0.4
919 12:06:51.426876 SA-CRID New Value = 0.0.0.4
920 12:06:51.430003 OPROM - VBIOS = ff.ff.ff.ffff
921 12:06:51.433321 IO Manageability Engine FW Version = 24.0.4.0
922 12:06:51.436605 PHY Build Version = 0.0.0.2016
923 12:06:51.440090 Thunderbolt(TM) FW Version = 0.0.0.0
924 12:06:51.446911 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
925 12:06:51.453478 BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms
926 12:06:51.456922 Enumerating buses...
927 12:06:51.459868 Show all devs... Before device enumeration.
928 12:06:51.463532 Root Device: enabled 1
929 12:06:51.463586 CPU_CLUSTER: 0: enabled 1
930 12:06:51.466507 DOMAIN: 0000: enabled 1
931 12:06:51.469809 GPIO: 0: enabled 1
932 12:06:51.473209 PCI: 00:00.0: enabled 1
933 12:06:51.473264 PCI: 00:01.0: enabled 0
934 12:06:51.476620 PCI: 00:01.1: enabled 0
935 12:06:51.479663 PCI: 00:02.0: enabled 1
936 12:06:51.479725 PCI: 00:04.0: enabled 1
937 12:06:51.483214 PCI: 00:05.0: enabled 0
938 12:06:51.486437 PCI: 00:06.0: enabled 1
939 12:06:51.489833 PCI: 00:06.2: enabled 0
940 12:06:51.489889 PCI: 00:07.0: enabled 0
941 12:06:51.492980 PCI: 00:07.1: enabled 0
942 12:06:51.496245 PCI: 00:07.2: enabled 0
943 12:06:51.499935 PCI: 00:07.3: enabled 0
944 12:06:51.499989 PCI: 00:08.0: enabled 0
945 12:06:51.503160 PCI: 00:09.0: enabled 0
946 12:06:51.506345 PCI: 00:0a.0: enabled 1
947 12:06:51.509903 PCI: 00:0d.0: enabled 1
948 12:06:51.509960 PCI: 00:0d.1: enabled 0
949 12:06:51.513244 PCI: 00:0d.2: enabled 0
950 12:06:51.516770 PCI: 00:0d.3: enabled 0
951 12:06:51.516831 PCI: 00:0e.0: enabled 0
952 12:06:51.519543 PCI: 00:10.0: enabled 0
953 12:06:51.522994 PCI: 00:10.1: enabled 0
954 12:06:51.526425 PCI: 00:10.6: enabled 0
955 12:06:51.526493 PCI: 00:10.7: enabled 0
956 12:06:51.530235 PCI: 00:12.0: enabled 0
957 12:06:51.533174 PCI: 00:12.6: enabled 0
958 12:06:51.536163 PCI: 00:12.7: enabled 0
959 12:06:51.536218 PCI: 00:13.0: enabled 0
960 12:06:51.539455 PCI: 00:14.0: enabled 1
961 12:06:51.543141 PCI: 00:14.1: enabled 0
962 12:06:51.546374 PCI: 00:14.2: enabled 1
963 12:06:51.546428 PCI: 00:14.3: enabled 1
964 12:06:51.549862 PCI: 00:15.0: enabled 1
965 12:06:51.553094 PCI: 00:15.1: enabled 1
966 12:06:51.556649 PCI: 00:15.2: enabled 0
967 12:06:51.556708 PCI: 00:15.3: enabled 1
968 12:06:51.559477 PCI: 00:16.0: enabled 1
969 12:06:51.563015 PCI: 00:16.1: enabled 0
970 12:06:51.563069 PCI: 00:16.2: enabled 0
971 12:06:51.566566 PCI: 00:16.3: enabled 0
972 12:06:51.569555 PCI: 00:16.4: enabled 0
973 12:06:51.572818 PCI: 00:16.5: enabled 0
974 12:06:51.572871 PCI: 00:17.0: enabled 1
975 12:06:51.576236 PCI: 00:19.0: enabled 0
976 12:06:51.579430 PCI: 00:19.1: enabled 1
977 12:06:51.582857 PCI: 00:19.2: enabled 0
978 12:06:51.582919 PCI: 00:1a.0: enabled 0
979 12:06:51.586025 PCI: 00:1c.0: enabled 0
980 12:06:51.589410 PCI: 00:1c.1: enabled 0
981 12:06:51.593017 PCI: 00:1c.2: enabled 0
982 12:06:51.593071 PCI: 00:1c.3: enabled 0
983 12:06:51.596464 PCI: 00:1c.4: enabled 0
984 12:06:51.599370 PCI: 00:1c.5: enabled 0
985 12:06:51.599423 PCI: 00:1c.6: enabled 0
986 12:06:51.603035 PCI: 00:1c.7: enabled 0
987 12:06:51.605866 PCI: 00:1d.0: enabled 0
988 12:06:51.609665 PCI: 00:1d.1: enabled 0
989 12:06:51.609717 PCI: 00:1d.2: enabled 0
990 12:06:51.612688 PCI: 00:1d.3: enabled 0
991 12:06:51.616014 PCI: 00:1e.0: enabled 1
992 12:06:51.619635 PCI: 00:1e.1: enabled 0
993 12:06:51.619694 PCI: 00:1e.2: enabled 0
994 12:06:51.622901 PCI: 00:1e.3: enabled 1
995 12:06:51.625987 PCI: 00:1f.0: enabled 1
996 12:06:51.629323 PCI: 00:1f.1: enabled 0
997 12:06:51.629379 PCI: 00:1f.2: enabled 1
998 12:06:51.632763 PCI: 00:1f.3: enabled 1
999 12:06:51.636110 PCI: 00:1f.4: enabled 0
1000 12:06:51.639418 PCI: 00:1f.5: enabled 1
1001 12:06:51.639475 PCI: 00:1f.6: enabled 0
1002 12:06:51.642547 PCI: 00:1f.7: enabled 0
1003 12:06:51.645923 GENERIC: 0.0: enabled 1
1004 12:06:51.645980 GENERIC: 0.0: enabled 1
1005 12:06:51.649225 GENERIC: 1.0: enabled 1
1006 12:06:51.652732 GENERIC: 0.0: enabled 1
1007 12:06:51.655866 GENERIC: 1.0: enabled 1
1008 12:06:51.655930 USB0 port 0: enabled 1
1009 12:06:51.659468 USB0 port 0: enabled 1
1010 12:06:51.662557 GENERIC: 0.0: enabled 1
1011 12:06:51.662618 I2C: 00:1a: enabled 1
1012 12:06:51.666208 I2C: 00:31: enabled 1
1013 12:06:51.669128 I2C: 00:32: enabled 1
1014 12:06:51.672309 I2C: 00:50: enabled 1
1015 12:06:51.672366 I2C: 00:10: enabled 1
1016 12:06:51.675771 I2C: 00:15: enabled 1
1017 12:06:51.679263 I2C: 00:2c: enabled 1
1018 12:06:51.679330 GENERIC: 0.0: enabled 1
1019 12:06:51.682552 SPI: 00: enabled 1
1020 12:06:51.685843 PNP: 0c09.0: enabled 1
1021 12:06:51.685904 GENERIC: 0.0: enabled 1
1022 12:06:51.689137 USB3 port 0: enabled 1
1023 12:06:51.692659 USB3 port 1: enabled 0
1024 12:06:51.692716 USB3 port 2: enabled 1
1025 12:06:51.695593 USB3 port 3: enabled 0
1026 12:06:51.698861 USB2 port 0: enabled 1
1027 12:06:51.702884 USB2 port 1: enabled 0
1028 12:06:51.702963 USB2 port 2: enabled 1
1029 12:06:51.705546 USB2 port 3: enabled 0
1030 12:06:51.709128 USB2 port 4: enabled 0
1031 12:06:51.709187 USB2 port 5: enabled 1
1032 12:06:51.712282 USB2 port 6: enabled 0
1033 12:06:51.715685 USB2 port 7: enabled 0
1034 12:06:51.715751 USB2 port 8: enabled 1
1035 12:06:51.719082 USB2 port 9: enabled 1
1036 12:06:51.722244 USB3 port 0: enabled 1
1037 12:06:51.725795 USB3 port 1: enabled 0
1038 12:06:51.725850 USB3 port 2: enabled 0
1039 12:06:51.729243 USB3 port 3: enabled 0
1040 12:06:51.732621 GENERIC: 0.0: enabled 1
1041 12:06:51.732678 GENERIC: 1.0: enabled 1
1042 12:06:51.735446 APIC: 00: enabled 1
1043 12:06:51.738705 APIC: 14: enabled 1
1044 12:06:51.738763 APIC: 16: enabled 1
1045 12:06:51.742132 APIC: 10: enabled 1
1046 12:06:51.745696 APIC: 12: enabled 1
1047 12:06:51.745755 APIC: 01: enabled 1
1048 12:06:51.749358 APIC: 08: enabled 1
1049 12:06:51.749423 APIC: 09: enabled 1
1050 12:06:51.752385 Compare with tree...
1051 12:06:51.755864 Root Device: enabled 1
1052 12:06:51.759129 CPU_CLUSTER: 0: enabled 1
1053 12:06:51.759193 APIC: 00: enabled 1
1054 12:06:51.762144 APIC: 14: enabled 1
1055 12:06:51.765725 APIC: 16: enabled 1
1056 12:06:51.765780 APIC: 10: enabled 1
1057 12:06:51.769007 APIC: 12: enabled 1
1058 12:06:51.772286 APIC: 01: enabled 1
1059 12:06:51.772349 APIC: 08: enabled 1
1060 12:06:51.775677 APIC: 09: enabled 1
1061 12:06:51.778886 DOMAIN: 0000: enabled 1
1062 12:06:51.778943 GPIO: 0: enabled 1
1063 12:06:51.782460 PCI: 00:00.0: enabled 1
1064 12:06:51.785684 PCI: 00:01.0: enabled 0
1065 12:06:51.789224 PCI: 00:01.1: enabled 0
1066 12:06:51.792436 PCI: 00:02.0: enabled 1
1067 12:06:51.792495 PCI: 00:04.0: enabled 1
1068 12:06:51.795615 GENERIC: 0.0: enabled 1
1069 12:06:51.798790 PCI: 00:05.0: enabled 0
1070 12:06:51.802064 PCI: 00:06.0: enabled 1
1071 12:06:51.805734 PCI: 00:06.2: enabled 0
1072 12:06:51.805791 PCI: 00:08.0: enabled 0
1073 12:06:51.808864 PCI: 00:09.0: enabled 0
1074 12:06:51.812551 PCI: 00:0a.0: enabled 1
1075 12:06:51.815429 PCI: 00:0d.0: enabled 1
1076 12:06:51.818660 USB0 port 0: enabled 1
1077 12:06:51.818715 USB3 port 0: enabled 1
1078 12:06:51.822155 USB3 port 1: enabled 0
1079 12:06:51.825528 USB3 port 2: enabled 1
1080 12:06:51.828723 USB3 port 3: enabled 0
1081 12:06:51.832355 PCI: 00:0d.1: enabled 0
1082 12:06:51.832417 PCI: 00:0d.2: enabled 0
1083 12:06:51.835456 PCI: 00:0d.3: enabled 0
1084 12:06:51.838605 PCI: 00:0e.0: enabled 0
1085 12:06:51.842656 PCI: 00:10.0: enabled 0
1086 12:06:51.845316 PCI: 00:10.1: enabled 0
1087 12:06:51.845381 PCI: 00:10.6: enabled 0
1088 12:06:51.848796 PCI: 00:10.7: enabled 0
1089 12:06:51.851833 PCI: 00:12.0: enabled 0
1090 12:06:51.855082 PCI: 00:12.6: enabled 0
1091 12:06:51.858424 PCI: 00:12.7: enabled 0
1092 12:06:51.858486 PCI: 00:13.0: enabled 0
1093 12:06:51.861868 PCI: 00:14.0: enabled 1
1094 12:06:51.865208 USB0 port 0: enabled 1
1095 12:06:51.868695 USB2 port 0: enabled 1
1096 12:06:51.871710 USB2 port 1: enabled 0
1097 12:06:51.871767 USB2 port 2: enabled 1
1098 12:06:51.875130 USB2 port 3: enabled 0
1099 12:06:51.878347 USB2 port 4: enabled 0
1100 12:06:51.881511 USB2 port 5: enabled 1
1101 12:06:51.884973 USB2 port 6: enabled 0
1102 12:06:51.888479 USB2 port 7: enabled 0
1103 12:06:51.888533 USB2 port 8: enabled 1
1104 12:06:51.891639 USB2 port 9: enabled 1
1105 12:06:51.894891 USB3 port 0: enabled 1
1106 12:06:51.898399 USB3 port 1: enabled 0
1107 12:06:51.901834 USB3 port 2: enabled 0
1108 12:06:51.905526 USB3 port 3: enabled 0
1109 12:06:51.905581 PCI: 00:14.1: enabled 0
1110 12:06:51.908397 PCI: 00:14.2: enabled 1
1111 12:06:51.911810 PCI: 00:14.3: enabled 1
1112 12:06:51.915444 GENERIC: 0.0: enabled 1
1113 12:06:51.918421 PCI: 00:15.0: enabled 1
1114 12:06:51.918486 I2C: 00:1a: enabled 1
1115 12:06:51.921754 I2C: 00:31: enabled 1
1116 12:06:51.925072 I2C: 00:32: enabled 1
1117 12:06:51.928296 PCI: 00:15.1: enabled 1
1118 12:06:51.928356 I2C: 00:50: enabled 1
1119 12:06:51.931921 PCI: 00:15.2: enabled 0
1120 12:06:51.935137 PCI: 00:15.3: enabled 1
1121 12:06:51.938374 I2C: 00:10: enabled 1
1122 12:06:51.941479 PCI: 00:16.0: enabled 1
1123 12:06:51.941539 PCI: 00:16.1: enabled 0
1124 12:06:51.945067 PCI: 00:16.2: enabled 0
1125 12:06:51.948241 PCI: 00:16.3: enabled 0
1126 12:06:51.951761 PCI: 00:16.4: enabled 0
1127 12:06:51.951816 PCI: 00:16.5: enabled 0
1128 12:06:51.955474 PCI: 00:17.0: enabled 1
1129 12:06:51.958754 PCI: 00:19.0: enabled 0
1130 12:06:51.961657 PCI: 00:19.1: enabled 1
1131 12:06:51.964977 I2C: 00:15: enabled 1
1132 12:06:51.965034 I2C: 00:2c: enabled 1
1133 12:06:51.968367 PCI: 00:19.2: enabled 0
1134 12:06:51.971618 PCI: 00:1a.0: enabled 0
1135 12:06:51.974737 PCI: 00:1e.0: enabled 1
1136 12:06:51.978293 PCI: 00:1e.1: enabled 0
1137 12:06:51.978349 PCI: 00:1e.2: enabled 0
1138 12:06:51.981676 PCI: 00:1e.3: enabled 1
1139 12:06:51.985282 SPI: 00: enabled 1
1140 12:06:51.988050 PCI: 00:1f.0: enabled 1
1141 12:06:51.988104 PNP: 0c09.0: enabled 1
1142 12:06:51.991749 PCI: 00:1f.1: enabled 0
1143 12:06:51.994761 PCI: 00:1f.2: enabled 1
1144 12:06:51.998037 GENERIC: 0.0: enabled 1
1145 12:06:52.001621 GENERIC: 0.0: enabled 1
1146 12:06:52.004671 GENERIC: 1.0: enabled 1
1147 12:06:52.004730 PCI: 00:1f.3: enabled 1
1148 12:06:52.008364 PCI: 00:1f.4: enabled 0
1149 12:06:52.011375 PCI: 00:1f.5: enabled 1
1150 12:06:52.014533 PCI: 00:1f.6: enabled 0
1151 12:06:52.018132 PCI: 00:1f.7: enabled 0
1152 12:06:52.018188 Root Device scanning...
1153 12:06:52.021527 scan_static_bus for Root Device
1154 12:06:52.024763 CPU_CLUSTER: 0 enabled
1155 12:06:52.028267 DOMAIN: 0000 enabled
1156 12:06:52.028323 DOMAIN: 0000 scanning...
1157 12:06:52.031396 PCI: pci_scan_bus for bus 00
1158 12:06:52.035099 PCI: 00:00.0 [8086/0000] ops
1159 12:06:52.038112 PCI: 00:00.0 [8086/4609] enabled
1160 12:06:52.041429 PCI: 00:02.0 [8086/0000] bus ops
1161 12:06:52.044636 PCI: 00:02.0 [8086/46b3] enabled
1162 12:06:52.048214 PCI: 00:04.0 [8086/0000] bus ops
1163 12:06:52.051580 PCI: 00:04.0 [8086/461d] enabled
1164 12:06:52.054568 PCI: 00:06.0 [8086/0000] bus ops
1165 12:06:52.058211 PCI: 00:06.0 [8086/464d] enabled
1166 12:06:52.061282 PCI: 00:08.0 [8086/464f] disabled
1167 12:06:52.064814 PCI: 00:0a.0 [8086/467d] enabled
1168 12:06:52.067982 PCI: 00:0d.0 [8086/0000] bus ops
1169 12:06:52.071534 PCI: 00:0d.0 [8086/461e] enabled
1170 12:06:52.074787 PCI: 00:14.0 [8086/0000] bus ops
1171 12:06:52.078463 PCI: 00:14.0 [8086/51ed] enabled
1172 12:06:52.081526 PCI: 00:14.2 [8086/51ef] enabled
1173 12:06:52.085002 PCI: 00:14.3 [8086/0000] bus ops
1174 12:06:52.087761 PCI: 00:14.3 [8086/51f0] enabled
1175 12:06:52.091426 PCI: 00:15.0 [8086/0000] bus ops
1176 12:06:52.094468 PCI: 00:15.0 [8086/51e8] enabled
1177 12:06:52.097745 PCI: 00:15.1 [8086/0000] bus ops
1178 12:06:52.101509 PCI: 00:15.1 [8086/51e9] enabled
1179 12:06:52.104624 PCI: 00:15.2 [8086/0000] bus ops
1180 12:06:52.111244 PCI: 00:15.2 [8086/51ea] disabled
1181 12:06:52.114396 PCI: 00:15.3 [8086/0000] bus ops
1182 12:06:52.117632 PCI: 00:15.3 [8086/51eb] enabled
1183 12:06:52.117708 PCI: 00:16.0 [8086/0000] ops
1184 12:06:52.120977 PCI: 00:16.0 [8086/51e0] enabled
1185 12:06:52.127536 PCI: Static device PCI: 00:17.0 not found, disabling it.
1186 12:06:52.130953 PCI: 00:19.0 [8086/0000] bus ops
1187 12:06:52.134441 PCI: 00:19.0 [8086/51c5] disabled
1188 12:06:52.138067 PCI: 00:19.1 [8086/0000] bus ops
1189 12:06:52.141160 PCI: 00:19.1 [8086/51c6] enabled
1190 12:06:52.144418 PCI: 00:1e.0 [8086/0000] ops
1191 12:06:52.147879 PCI: 00:1e.0 [8086/51a8] enabled
1192 12:06:52.150949 PCI: 00:1e.3 [8086/0000] bus ops
1193 12:06:52.154318 PCI: 00:1e.3 [8086/51ab] enabled
1194 12:06:52.157908 PCI: 00:1f.0 [8086/0000] bus ops
1195 12:06:52.161324 PCI: 00:1f.0 [8086/5182] enabled
1196 12:06:52.164178 RTC Init
1197 12:06:52.167394 Set power on after power failure.
1198 12:06:52.170738 Disabling Deep S3
1199 12:06:52.170793 Disabling Deep S3
1200 12:06:52.173947 Disabling Deep S4
1201 12:06:52.174004 Disabling Deep S4
1202 12:06:52.177541 Disabling Deep S5
1203 12:06:52.177596 Disabling Deep S5
1204 12:06:52.180925 PCI: 00:1f.2 [0000/0000] hidden
1205 12:06:52.184444 PCI: 00:1f.3 [8086/0000] bus ops
1206 12:06:52.187426 PCI: 00:1f.3 [8086/51c8] enabled
1207 12:06:52.191016 PCI: 00:1f.5 [8086/0000] bus ops
1208 12:06:52.194568 PCI: 00:1f.5 [8086/51a4] enabled
1209 12:06:52.197475 GPIO: 0 enabled
1210 12:06:52.200903 PCI: Leftover static devices:
1211 12:06:52.200967 PCI: 00:01.0
1212 12:06:52.203954 PCI: 00:01.1
1213 12:06:52.204013 PCI: 00:05.0
1214 12:06:52.204072 PCI: 00:06.2
1215 12:06:52.207710 PCI: 00:09.0
1216 12:06:52.207765 PCI: 00:0d.1
1217 12:06:52.210796 PCI: 00:0d.2
1218 12:06:52.210852 PCI: 00:0d.3
1219 12:06:52.210898 PCI: 00:0e.0
1220 12:06:52.214162 PCI: 00:10.0
1221 12:06:52.214216 PCI: 00:10.1
1222 12:06:52.217248 PCI: 00:10.6
1223 12:06:52.217306 PCI: 00:10.7
1224 12:06:52.217352 PCI: 00:12.0
1225 12:06:52.221147 PCI: 00:12.6
1226 12:06:52.221199 PCI: 00:12.7
1227 12:06:52.223904 PCI: 00:13.0
1228 12:06:52.223960 PCI: 00:14.1
1229 12:06:52.227292 PCI: 00:16.1
1230 12:06:52.227347 PCI: 00:16.2
1231 12:06:52.227392 PCI: 00:16.3
1232 12:06:52.230925 PCI: 00:16.4
1233 12:06:52.230978 PCI: 00:16.5
1234 12:06:52.234223 PCI: 00:17.0
1235 12:06:52.234278 PCI: 00:19.2
1236 12:06:52.234330 PCI: 00:1a.0
1237 12:06:52.237545 PCI: 00:1e.1
1238 12:06:52.237600 PCI: 00:1e.2
1239 12:06:52.240515 PCI: 00:1f.1
1240 12:06:52.240569 PCI: 00:1f.4
1241 12:06:52.244131 PCI: 00:1f.6
1242 12:06:52.244188 PCI: 00:1f.7
1243 12:06:52.247153 PCI: Check your devicetree.cb.
1244 12:06:52.250813 PCI: 00:02.0 scanning...
1245 12:06:52.253829 scan_generic_bus for PCI: 00:02.0
1246 12:06:52.256981 scan_generic_bus for PCI: 00:02.0 done
1247 12:06:52.260770 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1248 12:06:52.263795 PCI: 00:04.0 scanning...
1249 12:06:52.266948 scan_generic_bus for PCI: 00:04.0
1250 12:06:52.270318 GENERIC: 0.0 enabled
1251 12:06:52.277411 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1252 12:06:52.280242 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1253 12:06:52.283563 PCI: 00:06.0 scanning...
1254 12:06:52.286839 do_pci_scan_bridge for PCI: 00:06.0
1255 12:06:52.290351 PCI: pci_scan_bus for bus 01
1256 12:06:52.293882 PCI: 01:00.0 [15b7/5009] enabled
1257 12:06:52.297192 Enabling Common Clock Configuration
1258 12:06:52.300425 L1 Sub-State supported from root port 6
1259 12:06:52.303784 L1 Sub-State Support = 0x5
1260 12:06:52.306796 CommonModeRestoreTime = 0x6e
1261 12:06:52.310257 Power On Value = 0x5, Power On Scale = 0x2
1262 12:06:52.313532 ASPM: Enabled L1
1263 12:06:52.316837 PCIe: Max_Payload_Size adjusted to 256
1264 12:06:52.320513 PCI: 01:00.0: Enabled LTR
1265 12:06:52.323764 PCI: 01:00.0: Programmed LTR max latencies
1266 12:06:52.327261 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1267 12:06:52.330730 PCI: 00:0d.0 scanning...
1268 12:06:52.333477 scan_static_bus for PCI: 00:0d.0
1269 12:06:52.337008 USB0 port 0 enabled
1270 12:06:52.337065 USB0 port 0 scanning...
1271 12:06:52.340229 scan_static_bus for USB0 port 0
1272 12:06:52.343539 USB3 port 0 enabled
1273 12:06:52.347343 USB3 port 1 disabled
1274 12:06:52.347400 USB3 port 2 enabled
1275 12:06:52.350145 USB3 port 3 disabled
1276 12:06:52.353566 USB3 port 0 scanning...
1277 12:06:52.356820 scan_static_bus for USB3 port 0
1278 12:06:52.360431 scan_static_bus for USB3 port 0 done
1279 12:06:52.363541 scan_bus: bus USB3 port 0 finished in 6 msecs
1280 12:06:52.367061 USB3 port 2 scanning...
1281 12:06:52.370424 scan_static_bus for USB3 port 2
1282 12:06:52.373699 scan_static_bus for USB3 port 2 done
1283 12:06:52.377040 scan_bus: bus USB3 port 2 finished in 6 msecs
1284 12:06:52.380220 scan_static_bus for USB0 port 0 done
1285 12:06:52.387052 scan_bus: bus USB0 port 0 finished in 43 msecs
1286 12:06:52.390097 scan_static_bus for PCI: 00:0d.0 done
1287 12:06:52.393758 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1288 12:06:52.397060 PCI: 00:14.0 scanning...
1289 12:06:52.400180 scan_static_bus for PCI: 00:14.0
1290 12:06:52.403318 USB0 port 0 enabled
1291 12:06:52.406816 USB0 port 0 scanning...
1292 12:06:52.406880 scan_static_bus for USB0 port 0
1293 12:06:52.410027 USB2 port 0 enabled
1294 12:06:52.413444 USB2 port 1 disabled
1295 12:06:52.413505 USB2 port 2 enabled
1296 12:06:52.416542 USB2 port 3 disabled
1297 12:06:52.420103 USB2 port 4 disabled
1298 12:06:52.420162 USB2 port 5 enabled
1299 12:06:52.423471 USB2 port 6 disabled
1300 12:06:52.426820 USB2 port 7 disabled
1301 12:06:52.426881 USB2 port 8 enabled
1302 12:06:52.430265 USB2 port 9 enabled
1303 12:06:52.430328 USB3 port 0 enabled
1304 12:06:52.433543 USB3 port 1 disabled
1305 12:06:52.436615 USB3 port 2 disabled
1306 12:06:52.436672 USB3 port 3 disabled
1307 12:06:52.439942 USB2 port 0 scanning...
1308 12:06:52.443674 scan_static_bus for USB2 port 0
1309 12:06:52.446924 scan_static_bus for USB2 port 0 done
1310 12:06:52.453224 scan_bus: bus USB2 port 0 finished in 6 msecs
1311 12:06:52.453294 USB2 port 2 scanning...
1312 12:06:52.456831 scan_static_bus for USB2 port 2
1313 12:06:52.460048 scan_static_bus for USB2 port 2 done
1314 12:06:52.466800 scan_bus: bus USB2 port 2 finished in 6 msecs
1315 12:06:52.470029 USB2 port 5 scanning...
1316 12:06:52.470086 scan_static_bus for USB2 port 5
1317 12:06:52.476645 scan_static_bus for USB2 port 5 done
1318 12:06:52.480069 scan_bus: bus USB2 port 5 finished in 6 msecs
1319 12:06:52.483297 USB2 port 8 scanning...
1320 12:06:52.486464 scan_static_bus for USB2 port 8
1321 12:06:52.489795 scan_static_bus for USB2 port 8 done
1322 12:06:52.493125 scan_bus: bus USB2 port 8 finished in 6 msecs
1323 12:06:52.497025 USB2 port 9 scanning...
1324 12:06:52.499927 scan_static_bus for USB2 port 9
1325 12:06:52.503156 scan_static_bus for USB2 port 9 done
1326 12:06:52.506380 scan_bus: bus USB2 port 9 finished in 6 msecs
1327 12:06:52.509906 USB3 port 0 scanning...
1328 12:06:52.513325 scan_static_bus for USB3 port 0
1329 12:06:52.516516 scan_static_bus for USB3 port 0 done
1330 12:06:52.522932 scan_bus: bus USB3 port 0 finished in 6 msecs
1331 12:06:52.526202 scan_static_bus for USB0 port 0 done
1332 12:06:52.529752 scan_bus: bus USB0 port 0 finished in 120 msecs
1333 12:06:52.533507 scan_static_bus for PCI: 00:14.0 done
1334 12:06:52.539547 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1335 12:06:52.543323 PCI: 00:14.3 scanning...
1336 12:06:52.546441 scan_static_bus for PCI: 00:14.3
1337 12:06:52.546500 GENERIC: 0.0 enabled
1338 12:06:52.549720 scan_static_bus for PCI: 00:14.3 done
1339 12:06:52.556235 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1340 12:06:52.559783 PCI: 00:15.0 scanning...
1341 12:06:52.562812 scan_static_bus for PCI: 00:15.0
1342 12:06:52.562867 I2C: 00:1a enabled
1343 12:06:52.566348 I2C: 00:31 enabled
1344 12:06:52.566403 I2C: 00:32 enabled
1345 12:06:52.569389 scan_static_bus for PCI: 00:15.0 done
1346 12:06:52.576297 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1347 12:06:52.579705 PCI: 00:15.1 scanning...
1348 12:06:52.582874 scan_static_bus for PCI: 00:15.1
1349 12:06:52.582928 I2C: 00:50 enabled
1350 12:06:52.585965 scan_static_bus for PCI: 00:15.1 done
1351 12:06:52.592666 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1352 12:06:52.596015 PCI: 00:15.3 scanning...
1353 12:06:52.599333 scan_static_bus for PCI: 00:15.3
1354 12:06:52.599392 I2C: 00:10 enabled
1355 12:06:52.603023 scan_static_bus for PCI: 00:15.3 done
1356 12:06:52.609393 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1357 12:06:52.609465 PCI: 00:19.1 scanning...
1358 12:06:52.612731 scan_static_bus for PCI: 00:19.1
1359 12:06:52.616003 I2C: 00:15 enabled
1360 12:06:52.619568 I2C: 00:2c enabled
1361 12:06:52.622706 scan_static_bus for PCI: 00:19.1 done
1362 12:06:52.626094 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1363 12:06:52.629162 PCI: 00:1e.3 scanning...
1364 12:06:52.632664 scan_generic_bus for PCI: 00:1e.3
1365 12:06:52.635793 SPI: 00 enabled
1366 12:06:52.639452 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1367 12:06:52.645920 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1368 12:06:52.649014 PCI: 00:1f.0 scanning...
1369 12:06:52.652752 scan_static_bus for PCI: 00:1f.0
1370 12:06:52.652807 PNP: 0c09.0 enabled
1371 12:06:52.655851 PNP: 0c09.0 scanning...
1372 12:06:52.659003 scan_static_bus for PNP: 0c09.0
1373 12:06:52.662651 scan_static_bus for PNP: 0c09.0 done
1374 12:06:52.666235 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1375 12:06:52.672431 scan_static_bus for PCI: 00:1f.0 done
1376 12:06:52.675772 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1377 12:06:52.678891 PCI: 00:1f.2 scanning...
1378 12:06:52.682156 scan_static_bus for PCI: 00:1f.2
1379 12:06:52.682212 GENERIC: 0.0 enabled
1380 12:06:52.686340 GENERIC: 0.0 scanning...
1381 12:06:52.689076 scan_static_bus for GENERIC: 0.0
1382 12:06:52.692216 GENERIC: 0.0 enabled
1383 12:06:52.692271 GENERIC: 1.0 enabled
1384 12:06:52.698870 scan_static_bus for GENERIC: 0.0 done
1385 12:06:52.702687 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1386 12:06:52.705284 scan_static_bus for PCI: 00:1f.2 done
1387 12:06:52.711954 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1388 12:06:52.712010 PCI: 00:1f.3 scanning...
1389 12:06:52.715619 scan_static_bus for PCI: 00:1f.3
1390 12:06:52.722091 scan_static_bus for PCI: 00:1f.3 done
1391 12:06:52.725635 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1392 12:06:52.728774 PCI: 00:1f.5 scanning...
1393 12:06:52.732011 scan_generic_bus for PCI: 00:1f.5
1394 12:06:52.735205 scan_generic_bus for PCI: 00:1f.5 done
1395 12:06:52.738516 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1396 12:06:52.744956 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1397 12:06:52.748494 scan_static_bus for Root Device done
1398 12:06:52.751851 scan_bus: bus Root Device finished in 729 msecs
1399 12:06:52.755087 done
1400 12:06:52.758648 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1401 12:06:52.764972 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1402 12:06:52.771808 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1403 12:06:52.775138 SPI flash protection: WPSW=0 SRP0=0
1404 12:06:52.781583 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1405 12:06:52.785235 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1406 12:06:52.788715 found VGA at PCI: 00:02.0
1407 12:06:52.791712 Setting up VGA for PCI: 00:02.0
1408 12:06:52.798270 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1409 12:06:52.801965 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1410 12:06:52.804848 Allocating resources...
1411 12:06:52.808545 Reading resources...
1412 12:06:52.811626 Root Device read_resources bus 0 link: 0
1413 12:06:52.814806 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1414 12:06:52.821841 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1415 12:06:52.825088 DOMAIN: 0000 read_resources bus 0 link: 0
1416 12:06:52.831576 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1417 12:06:52.838397 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1418 12:06:52.841327 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1419 12:06:52.848280 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1420 12:06:52.854735 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1421 12:06:52.861629 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1422 12:06:52.868141 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1423 12:06:52.874676 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1424 12:06:52.881214 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1425 12:06:52.888105 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1426 12:06:52.894498 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1427 12:06:52.901243 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1428 12:06:52.908061 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1429 12:06:52.914407 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1430 12:06:52.917539 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1431 12:06:52.924549 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1432 12:06:52.931012 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1433 12:06:52.937802 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1434 12:06:52.944121 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1435 12:06:52.950942 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1436 12:06:52.957905 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1437 12:06:52.960961 PCI: 00:04.0 read_resources bus 1 link: 0
1438 12:06:52.964163 PCI: 00:04.0 read_resources bus 1 link: 0 done
1439 12:06:52.970720 PCI: 00:06.0 read_resources bus 1 link: 0
1440 12:06:52.974180 PCI: 00:06.0 read_resources bus 1 link: 0 done
1441 12:06:52.977449 PCI: 00:0d.0 read_resources bus 0 link: 0
1442 12:06:52.983932 USB0 port 0 read_resources bus 0 link: 0
1443 12:06:52.987470 USB0 port 0 read_resources bus 0 link: 0 done
1444 12:06:52.990631 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1445 12:06:52.997532 PCI: 00:14.0 read_resources bus 0 link: 0
1446 12:06:53.000824 USB0 port 0 read_resources bus 0 link: 0
1447 12:06:53.003904 USB0 port 0 read_resources bus 0 link: 0 done
1448 12:06:53.010865 PCI: 00:14.0 read_resources bus 0 link: 0 done
1449 12:06:53.014338 PCI: 00:14.3 read_resources bus 0 link: 0
1450 12:06:53.017673 PCI: 00:14.3 read_resources bus 0 link: 0 done
1451 12:06:53.024052 PCI: 00:15.0 read_resources bus 0 link: 0
1452 12:06:53.027584 PCI: 00:15.0 read_resources bus 0 link: 0 done
1453 12:06:53.030667 PCI: 00:15.1 read_resources bus 0 link: 0
1454 12:06:53.037196 PCI: 00:15.1 read_resources bus 0 link: 0 done
1455 12:06:53.040609 PCI: 00:15.3 read_resources bus 0 link: 0
1456 12:06:53.047301 PCI: 00:15.3 read_resources bus 0 link: 0 done
1457 12:06:53.050989 PCI: 00:19.1 read_resources bus 0 link: 0
1458 12:06:53.054121 PCI: 00:19.1 read_resources bus 0 link: 0 done
1459 12:06:53.060867 PCI: 00:1e.3 read_resources bus 2 link: 0
1460 12:06:53.064208 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1461 12:06:53.067607 PCI: 00:1f.0 read_resources bus 0 link: 0
1462 12:06:53.074298 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1463 12:06:53.077408 PCI: 00:1f.2 read_resources bus 0 link: 0
1464 12:06:53.080567 GENERIC: 0.0 read_resources bus 0 link: 0
1465 12:06:53.087758 GENERIC: 0.0 read_resources bus 0 link: 0 done
1466 12:06:53.090806 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1467 12:06:53.097026 DOMAIN: 0000 read_resources bus 0 link: 0 done
1468 12:06:53.100437 Root Device read_resources bus 0 link: 0 done
1469 12:06:53.103666 Done reading resources.
1470 12:06:53.107173 Show resources in subtree (Root Device)...After reading.
1471 12:06:53.113718 Root Device child on link 0 CPU_CLUSTER: 0
1472 12:06:53.117248 CPU_CLUSTER: 0 child on link 0 APIC: 00
1473 12:06:53.117312 APIC: 00
1474 12:06:53.120437 APIC: 14
1475 12:06:53.120497 APIC: 16
1476 12:06:53.123624 APIC: 10
1477 12:06:53.123679 APIC: 12
1478 12:06:53.123725 APIC: 01
1479 12:06:53.127045 APIC: 08
1480 12:06:53.127123 APIC: 09
1481 12:06:53.130514 DOMAIN: 0000 child on link 0 GPIO: 0
1482 12:06:53.140297 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1483 12:06:53.150438 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1484 12:06:53.150518 GPIO: 0
1485 12:06:53.154141 PCI: 00:00.0
1486 12:06:53.163899 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 12:06:53.173947 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1488 12:06:53.180458 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1489 12:06:53.190156 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1490 12:06:53.200675 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1491 12:06:53.210267 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1492 12:06:53.220014 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1493 12:06:53.229922 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1494 12:06:53.239762 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1495 12:06:53.246893 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1496 12:06:53.256783 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1497 12:06:53.266554 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1498 12:06:53.276395 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1499 12:06:53.286221 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1500 12:06:53.296358 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1501 12:06:53.302913 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1502 12:06:53.313000 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1503 12:06:53.322714 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1504 12:06:53.332883 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1505 12:06:53.342872 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1506 12:06:53.352854 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1507 12:06:53.362749 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1508 12:06:53.372839 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1509 12:06:53.379165 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1510 12:06:53.389550 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1511 12:06:53.399173 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1512 12:06:53.409316 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1513 12:06:53.419398 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1514 12:06:53.419473 PCI: 00:02.0
1515 12:06:53.432107 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1516 12:06:53.442318 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1517 12:06:53.449250 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1518 12:06:53.455485 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1519 12:06:53.465366 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1520 12:06:53.465425 GENERIC: 0.0
1521 12:06:53.472405 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1522 12:06:53.478604 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1523 12:06:53.489074 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1524 12:06:53.498844 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1525 12:06:53.498900 PCI: 01:00.0
1526 12:06:53.508559 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1527 12:06:53.518610 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1528 12:06:53.521985 PCI: 00:08.0
1529 12:06:53.522043 PCI: 00:0a.0
1530 12:06:53.532336 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1531 12:06:53.538699 PCI: 00:0d.0 child on link 0 USB0 port 0
1532 12:06:53.548553 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1533 12:06:53.552118 USB0 port 0 child on link 0 USB3 port 0
1534 12:06:53.555130 USB3 port 0
1535 12:06:53.555216 USB3 port 1
1536 12:06:53.558524 USB3 port 2
1537 12:06:53.558580 USB3 port 3
1538 12:06:53.565448 PCI: 00:14.0 child on link 0 USB0 port 0
1539 12:06:53.575308 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1540 12:06:53.578727 USB0 port 0 child on link 0 USB2 port 0
1541 12:06:53.578781 USB2 port 0
1542 12:06:53.581797 USB2 port 1
1543 12:06:53.581850 USB2 port 2
1544 12:06:53.585277 USB2 port 3
1545 12:06:53.588535 USB2 port 4
1546 12:06:53.588593 USB2 port 5
1547 12:06:53.591914 USB2 port 6
1548 12:06:53.591966 USB2 port 7
1549 12:06:53.594890 USB2 port 8
1550 12:06:53.594944 USB2 port 9
1551 12:06:53.598215 USB3 port 0
1552 12:06:53.598269 USB3 port 1
1553 12:06:53.601801 USB3 port 2
1554 12:06:53.601858 USB3 port 3
1555 12:06:53.604869 PCI: 00:14.2
1556 12:06:53.615014 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1557 12:06:53.624785 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1558 12:06:53.628066 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1559 12:06:53.638558 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1560 12:06:53.641417 GENERIC: 0.0
1561 12:06:53.644853 PCI: 00:15.0 child on link 0 I2C: 00:1a
1562 12:06:53.654819 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 12:06:53.654875 I2C: 00:1a
1564 12:06:53.658435 I2C: 00:31
1565 12:06:53.658493 I2C: 00:32
1566 12:06:53.665097 PCI: 00:15.1 child on link 0 I2C: 00:50
1567 12:06:53.675000 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 12:06:53.675071 I2C: 00:50
1569 12:06:53.678304 PCI: 00:15.2
1570 12:06:53.681433 PCI: 00:15.3 child on link 0 I2C: 00:10
1571 12:06:53.691715 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 12:06:53.691792 I2C: 00:10
1573 12:06:53.694790 PCI: 00:16.0
1574 12:06:53.704795 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1575 12:06:53.704873 PCI: 00:19.0
1576 12:06:53.711303 PCI: 00:19.1 child on link 0 I2C: 00:15
1577 12:06:53.721289 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 12:06:53.721368 I2C: 00:15
1579 12:06:53.724700 I2C: 00:2c
1580 12:06:53.724777 PCI: 00:1e.0
1581 12:06:53.734596 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1582 12:06:53.741452 PCI: 00:1e.3 child on link 0 SPI: 00
1583 12:06:53.751360 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1584 12:06:53.751439 SPI: 00
1585 12:06:53.754726 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1586 12:06:53.764528 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1587 12:06:53.764607 PNP: 0c09.0
1588 12:06:53.774865 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1589 12:06:53.777839 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1590 12:06:53.787718 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1591 12:06:53.797772 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1592 12:06:53.801353 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1593 12:06:53.804272 GENERIC: 0.0
1594 12:06:53.807864 GENERIC: 1.0
1595 12:06:53.807942 PCI: 00:1f.3
1596 12:06:53.818098 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1597 12:06:53.827588 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1598 12:06:53.831060 PCI: 00:1f.5
1599 12:06:53.837437 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1600 12:06:53.847493 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1601 12:06:53.850719 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1602 12:06:53.857561 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1603 12:06:53.864346 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1604 12:06:53.867847 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1605 12:06:53.874206 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1606 12:06:53.881024 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1607 12:06:53.887303 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1608 12:06:53.894003 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1609 12:06:53.900619 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1610 12:06:53.907392 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1611 12:06:53.917151 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1612 12:06:53.923970 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1613 12:06:53.930931 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1614 12:06:53.933659 DOMAIN: 0000: Resource ranges:
1615 12:06:53.937065 * Base: 1000, Size: 800, Tag: 100
1616 12:06:53.940295 * Base: 1900, Size: e700, Tag: 100
1617 12:06:53.947277 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1618 12:06:53.953612 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1619 12:06:53.960201 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1620 12:06:53.966854 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1621 12:06:53.976630 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1622 12:06:53.983519 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1623 12:06:53.990215 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1624 12:06:54.000285 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1625 12:06:54.006741 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1626 12:06:54.013362 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1627 12:06:54.023391 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1628 12:06:54.029993 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1629 12:06:54.036528 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1630 12:06:54.043503 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1631 12:06:54.053117 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1632 12:06:54.059730 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1633 12:06:54.066517 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1634 12:06:54.076203 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1635 12:06:54.083221 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1636 12:06:54.089740 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1637 12:06:54.099793 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1638 12:06:54.106265 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1639 12:06:54.113024 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1640 12:06:54.123236 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1641 12:06:54.129542 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1642 12:06:54.136428 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1643 12:06:54.146516 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1644 12:06:54.152837 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1645 12:06:54.159617 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1646 12:06:54.169502 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1647 12:06:54.176212 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1648 12:06:54.182961 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1649 12:06:54.192814 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1650 12:06:54.196288 DOMAIN: 0000: Resource ranges:
1651 12:06:54.199380 * Base: 80400000, Size: 3fc00000, Tag: 200
1652 12:06:54.202666 * Base: d0000000, Size: 28000000, Tag: 200
1653 12:06:54.209358 * Base: fa000000, Size: 1000000, Tag: 200
1654 12:06:54.212543 * Base: fb001000, Size: 17ff000, Tag: 200
1655 12:06:54.216167 * Base: fe800000, Size: 300000, Tag: 200
1656 12:06:54.219425 * Base: feb80000, Size: 80000, Tag: 200
1657 12:06:54.225985 * Base: fed00000, Size: 40000, Tag: 200
1658 12:06:54.229184 * Base: fed70000, Size: 10000, Tag: 200
1659 12:06:54.232551 * Base: fed88000, Size: 8000, Tag: 200
1660 12:06:54.235950 * Base: fed93000, Size: d000, Tag: 200
1661 12:06:54.239234 * Base: feda2000, Size: 1e000, Tag: 200
1662 12:06:54.246167 * Base: fede0000, Size: 1220000, Tag: 200
1663 12:06:54.249101 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1664 12:06:54.255696 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1665 12:06:54.262418 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1666 12:06:54.268922 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1667 12:06:54.275510 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1668 12:06:54.282062 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1669 12:06:54.289262 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1670 12:06:54.295594 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1671 12:06:54.302278 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1672 12:06:54.308659 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1673 12:06:54.315480 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1674 12:06:54.322365 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1675 12:06:54.328551 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1676 12:06:54.335195 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1677 12:06:54.341877 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1678 12:06:54.348424 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1679 12:06:54.354889 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1680 12:06:54.361539 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1681 12:06:54.368780 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1682 12:06:54.374818 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1683 12:06:54.384618 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1684 12:06:54.391802 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1685 12:06:54.394902 PCI: 00:06.0: Resource ranges:
1686 12:06:54.398051 * Base: 80400000, Size: 100000, Tag: 200
1687 12:06:54.404498 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1688 12:06:54.411177 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1689 12:06:54.421226 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1690 12:06:54.427796 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1691 12:06:54.431320 Root Device assign_resources, bus 0 link: 0
1692 12:06:54.437892 DOMAIN: 0000 assign_resources, bus 0 link: 0
1693 12:06:54.444504 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1694 12:06:54.454342 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1695 12:06:54.461419 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1696 12:06:54.468136 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1697 12:06:54.474692 PCI: 00:04.0 assign_resources, bus 1 link: 0
1698 12:06:54.477886 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1699 12:06:54.487559 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1700 12:06:54.498068 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1701 12:06:54.504409 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1702 12:06:54.511173 PCI: 00:06.0 assign_resources, bus 1 link: 0
1703 12:06:54.517609 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1704 12:06:54.524262 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1705 12:06:54.531395 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1706 12:06:54.537508 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1707 12:06:54.547196 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1708 12:06:54.550619 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1709 12:06:54.557422 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1710 12:06:54.564162 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1711 12:06:54.567789 PCI: 00:14.0 assign_resources, bus 0 link: 0
1712 12:06:54.574238 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1713 12:06:54.580650 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1714 12:06:54.590773 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1715 12:06:54.597160 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1716 12:06:54.603597 PCI: 00:14.3 assign_resources, bus 0 link: 0
1717 12:06:54.607103 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1718 12:06:54.613652 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1719 12:06:54.620092 PCI: 00:15.0 assign_resources, bus 0 link: 0
1720 12:06:54.623662 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1721 12:06:54.633640 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1722 12:06:54.636910 PCI: 00:15.1 assign_resources, bus 0 link: 0
1723 12:06:54.643568 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1724 12:06:54.650247 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1725 12:06:54.653482 PCI: 00:15.3 assign_resources, bus 0 link: 0
1726 12:06:54.660071 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1727 12:06:54.667426 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1728 12:06:54.677021 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1729 12:06:54.680003 PCI: 00:19.1 assign_resources, bus 0 link: 0
1730 12:06:54.686749 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1731 12:06:54.693553 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1732 12:06:54.697221 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1733 12:06:54.703393 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1734 12:06:54.706723 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1735 12:06:54.713228 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1736 12:06:54.716746 LPC: Trying to open IO window from 800 size 1ff
1737 12:06:54.726733 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1738 12:06:54.733669 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1739 12:06:54.740049 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1740 12:06:54.746733 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1741 12:06:54.749960 Root Device assign_resources, bus 0 link: 0 done
1742 12:06:54.753413 Done setting resources.
1743 12:06:54.760006 Show resources in subtree (Root Device)...After assigning values.
1744 12:06:54.763634 Root Device child on link 0 CPU_CLUSTER: 0
1745 12:06:54.769736 CPU_CLUSTER: 0 child on link 0 APIC: 00
1746 12:06:54.769813 APIC: 00
1747 12:06:54.769873 APIC: 14
1748 12:06:54.773785 APIC: 16
1749 12:06:54.773844 APIC: 10
1750 12:06:54.773890 APIC: 12
1751 12:06:54.776358 APIC: 01
1752 12:06:54.776411 APIC: 08
1753 12:06:54.779708 APIC: 09
1754 12:06:54.782925 DOMAIN: 0000 child on link 0 GPIO: 0
1755 12:06:54.792819 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1756 12:06:54.802774 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1757 12:06:54.802858 GPIO: 0
1758 12:06:54.802917 PCI: 00:00.0
1759 12:06:54.812677 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1760 12:06:54.823082 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1761 12:06:54.832552 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1762 12:06:54.842711 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1763 12:06:54.852649 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1764 12:06:54.859330 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1765 12:06:54.869254 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1766 12:06:54.879527 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1767 12:06:54.889178 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1768 12:06:54.898904 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1769 12:06:54.908914 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1770 12:06:54.918866 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1771 12:06:54.925697 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1772 12:06:54.935912 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1773 12:06:54.945341 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1774 12:06:54.955704 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1775 12:06:54.965326 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1776 12:06:54.975386 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1777 12:06:54.985376 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1778 12:06:54.995085 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1779 12:06:55.001767 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1780 12:06:55.011682 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1781 12:06:55.021853 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1782 12:06:55.031586 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1783 12:06:55.041796 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1784 12:06:55.051519 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1785 12:06:55.061494 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1786 12:06:55.071915 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1787 12:06:55.071991 PCI: 00:02.0
1788 12:06:55.081763 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1789 12:06:55.091700 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1790 12:06:55.101132 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1791 12:06:55.108094 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1792 12:06:55.118070 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1793 12:06:55.118152 GENERIC: 0.0
1794 12:06:55.124523 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1795 12:06:55.131100 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1796 12:06:55.144530 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1797 12:06:55.154621 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1798 12:06:55.157683 PCI: 01:00.0
1799 12:06:55.167622 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1800 12:06:55.177565 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1801 12:06:55.177621 PCI: 00:08.0
1802 12:06:55.180733 PCI: 00:0a.0
1803 12:06:55.190672 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1804 12:06:55.194655 PCI: 00:0d.0 child on link 0 USB0 port 0
1805 12:06:55.204231 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1806 12:06:55.210771 USB0 port 0 child on link 0 USB3 port 0
1807 12:06:55.210831 USB3 port 0
1808 12:06:55.214220 USB3 port 1
1809 12:06:55.214279 USB3 port 2
1810 12:06:55.217499 USB3 port 3
1811 12:06:55.220975 PCI: 00:14.0 child on link 0 USB0 port 0
1812 12:06:55.230849 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1813 12:06:55.237455 USB0 port 0 child on link 0 USB2 port 0
1814 12:06:55.237526 USB2 port 0
1815 12:06:55.240665 USB2 port 1
1816 12:06:55.240731 USB2 port 2
1817 12:06:55.243908 USB2 port 3
1818 12:06:55.243962 USB2 port 4
1819 12:06:55.247448 USB2 port 5
1820 12:06:55.247514 USB2 port 6
1821 12:06:55.250772 USB2 port 7
1822 12:06:55.250837 USB2 port 8
1823 12:06:55.253856 USB2 port 9
1824 12:06:55.257343 USB3 port 0
1825 12:06:55.257396 USB3 port 1
1826 12:06:55.260474 USB3 port 2
1827 12:06:55.260528 USB3 port 3
1828 12:06:55.264007 PCI: 00:14.2
1829 12:06:55.273925 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1830 12:06:55.284077 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1831 12:06:55.287395 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1832 12:06:55.297280 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1833 12:06:55.300269 GENERIC: 0.0
1834 12:06:55.303712 PCI: 00:15.0 child on link 0 I2C: 00:1a
1835 12:06:55.314038 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1836 12:06:55.316833 I2C: 00:1a
1837 12:06:55.316909 I2C: 00:31
1838 12:06:55.320347 I2C: 00:32
1839 12:06:55.324225 PCI: 00:15.1 child on link 0 I2C: 00:50
1840 12:06:55.333707 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1841 12:06:55.337358 I2C: 00:50
1842 12:06:55.337450 PCI: 00:15.2
1843 12:06:55.340291 PCI: 00:15.3 child on link 0 I2C: 00:10
1844 12:06:55.350128 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1845 12:06:55.353718 I2C: 00:10
1846 12:06:55.353794 PCI: 00:16.0
1847 12:06:55.366854 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1848 12:06:55.366931 PCI: 00:19.0
1849 12:06:55.369946 PCI: 00:19.1 child on link 0 I2C: 00:15
1850 12:06:55.380056 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1851 12:06:55.383601 I2C: 00:15
1852 12:06:55.383678 I2C: 00:2c
1853 12:06:55.386750 PCI: 00:1e.0
1854 12:06:55.396730 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1855 12:06:55.403396 PCI: 00:1e.3 child on link 0 SPI: 00
1856 12:06:55.413376 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1857 12:06:55.413454 SPI: 00
1858 12:06:55.416745 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1859 12:06:55.426620 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1860 12:06:55.426701 PNP: 0c09.0
1861 12:06:55.436336 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1862 12:06:55.439713 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1863 12:06:55.449662 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1864 12:06:55.459805 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1865 12:06:55.463271 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1866 12:06:55.466865 GENERIC: 0.0
1867 12:06:55.470417 GENERIC: 1.0
1868 12:06:55.470881 PCI: 00:1f.3
1869 12:06:55.480431 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1870 12:06:55.490046 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1871 12:06:55.493007 PCI: 00:1f.5
1872 12:06:55.503518 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1873 12:06:55.506516 Done allocating resources.
1874 12:06:55.513260 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1875 12:06:55.516289 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1876 12:06:55.522965 Configure audio over I2S with MAX98373 NAU88L25B.
1877 12:06:55.527124 Enabling BT offload
1878 12:06:55.534604 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1879 12:06:55.537754 Enabling resources...
1880 12:06:55.541164 PCI: 00:00.0 subsystem <- 8086/4609
1881 12:06:55.544183 PCI: 00:00.0 cmd <- 06
1882 12:06:55.547221 PCI: 00:02.0 subsystem <- 8086/46b3
1883 12:06:55.550433 PCI: 00:02.0 cmd <- 03
1884 12:06:55.553668 PCI: 00:04.0 subsystem <- 8086/461d
1885 12:06:55.553743 PCI: 00:04.0 cmd <- 02
1886 12:06:55.557076 PCI: 00:06.0 bridge ctrl <- 0013
1887 12:06:55.560338 PCI: 00:06.0 subsystem <- 8086/464d
1888 12:06:55.563494 PCI: 00:06.0 cmd <- 106
1889 12:06:55.566774 PCI: 00:0a.0 subsystem <- 8086/467d
1890 12:06:55.570218 PCI: 00:0a.0 cmd <- 02
1891 12:06:55.573626 PCI: 00:0d.0 subsystem <- 8086/461e
1892 12:06:55.576834 PCI: 00:0d.0 cmd <- 02
1893 12:06:55.579951 PCI: 00:14.0 subsystem <- 8086/51ed
1894 12:06:55.583474 PCI: 00:14.0 cmd <- 02
1895 12:06:55.586711 PCI: 00:14.2 subsystem <- 8086/51ef
1896 12:06:55.586786 PCI: 00:14.2 cmd <- 02
1897 12:06:55.593757 PCI: 00:14.3 subsystem <- 8086/51f0
1898 12:06:55.593832 PCI: 00:14.3 cmd <- 02
1899 12:06:55.596543 PCI: 00:15.0 subsystem <- 8086/51e8
1900 12:06:55.599804 PCI: 00:15.0 cmd <- 02
1901 12:06:55.603147 PCI: 00:15.1 subsystem <- 8086/51e9
1902 12:06:55.606488 PCI: 00:15.1 cmd <- 06
1903 12:06:55.609811 PCI: 00:15.3 subsystem <- 8086/51eb
1904 12:06:55.613218 PCI: 00:15.3 cmd <- 02
1905 12:06:55.616416 PCI: 00:16.0 subsystem <- 8086/51e0
1906 12:06:55.616498 PCI: 00:16.0 cmd <- 02
1907 12:06:55.623361 PCI: 00:19.1 subsystem <- 8086/51c6
1908 12:06:55.623438 PCI: 00:19.1 cmd <- 02
1909 12:06:55.626766 PCI: 00:1e.0 subsystem <- 8086/51a8
1910 12:06:55.630022 PCI: 00:1e.0 cmd <- 06
1911 12:06:55.633297 PCI: 00:1e.3 subsystem <- 8086/51ab
1912 12:06:55.636654 PCI: 00:1e.3 cmd <- 02
1913 12:06:55.639681 PCI: 00:1f.0 subsystem <- 8086/5182
1914 12:06:55.643300 PCI: 00:1f.0 cmd <- 407
1915 12:06:55.646623 PCI: 00:1f.3 subsystem <- 8086/51c8
1916 12:06:55.649815 PCI: 00:1f.3 cmd <- 02
1917 12:06:55.653037 PCI: 00:1f.5 subsystem <- 8086/51a4
1918 12:06:55.653114 PCI: 00:1f.5 cmd <- 406
1919 12:06:55.656466 PCI: 01:00.0 cmd <- 02
1920 12:06:55.656545 done.
1921 12:06:55.663047 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1922 12:06:55.666720 ME: Version: Unavailable
1923 12:06:55.670159 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1924 12:06:55.673389 Initializing devices...
1925 12:06:55.676801 Root Device init
1926 12:06:55.677244 mainboard: EC init
1927 12:06:55.684146 Chrome EC: Set SMI mask to 0x0000000000000000
1928 12:06:55.686790 Chrome EC: UHEPI supported
1929 12:06:55.693401 Chrome EC: clear events_b mask to 0x0000000000000000
1930 12:06:55.696545 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1931 12:06:55.702978 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1932 12:06:55.710003 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1933 12:06:55.713118 Chrome EC: Set WAKE mask to 0x0000000000000000
1934 12:06:55.719587 Root Device init finished in 39 msecs
1935 12:06:55.720042 PCI: 00:00.0 init
1936 12:06:55.723955 CPU TDP = 15 Watts
1937 12:06:55.727437 CPU PL1 = 15 Watts
1938 12:06:55.727900 CPU PL2 = 55 Watts
1939 12:06:55.730350 CPU PL4 = 123 Watts
1940 12:06:55.733757 PCI: 00:00.0 init finished in 8 msecs
1941 12:06:55.736801 PCI: 00:02.0 init
1942 12:06:55.737256 GMA: Found VBT in CBFS
1943 12:06:55.739747 GMA: Found valid VBT in CBFS
1944 12:06:55.746763 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1945 12:06:55.753223 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1946 12:06:55.756843 PCI: 00:02.0 init finished in 18 msecs
1947 12:06:55.759936 PCI: 00:06.0 init
1948 12:06:55.763206 Initializing PCH PCIe bridge.
1949 12:06:55.766667 PCI: 00:06.0 init finished in 3 msecs
1950 12:06:55.769804 PCI: 00:0a.0 init
1951 12:06:55.773319 PCI: 00:0a.0 init finished in 0 msecs
1952 12:06:55.773813 PCI: 00:14.0 init
1953 12:06:55.776809 PCI: 00:14.0 init finished in 0 msecs
1954 12:06:55.779949 PCI: 00:14.2 init
1955 12:06:55.783426 PCI: 00:14.2 init finished in 0 msecs
1956 12:06:55.786530 PCI: 00:15.0 init
1957 12:06:55.790523 I2C bus 0 version 0x3230302a
1958 12:06:55.793246 DW I2C bus 0 at 0x80655000 (400 KHz)
1959 12:06:55.796920 PCI: 00:15.0 init finished in 6 msecs
1960 12:06:55.797405 PCI: 00:15.1 init
1961 12:06:55.800216 I2C bus 1 version 0x3230302a
1962 12:06:55.803677 DW I2C bus 1 at 0x80656000 (400 KHz)
1963 12:06:55.809522 PCI: 00:15.1 init finished in 6 msecs
1964 12:06:55.809885 PCI: 00:15.3 init
1965 12:06:55.812927 I2C bus 3 version 0x3230302a
1966 12:06:55.816581 DW I2C bus 3 at 0x80657000 (400 KHz)
1967 12:06:55.819608 PCI: 00:15.3 init finished in 6 msecs
1968 12:06:55.823671 PCI: 00:16.0 init
1969 12:06:55.826685 PCI: 00:16.0 init finished in 0 msecs
1970 12:06:55.827166 PCI: 00:19.1 init
1971 12:06:55.829564 I2C bus 5 version 0x3230302a
1972 12:06:55.833569 DW I2C bus 5 at 0x80659000 (400 KHz)
1973 12:06:55.839971 PCI: 00:19.1 init finished in 6 msecs
1974 12:06:55.840467 PCI: 00:1f.0 init
1975 12:06:55.846585 IOAPIC: Initializing IOAPIC at 0xfec00000
1976 12:06:55.847071 IOAPIC: ID = 0x02
1977 12:06:55.849790 IOAPIC: Dumping registers
1978 12:06:55.853500 reg 0x0000: 0x02000000
1979 12:06:55.853989 reg 0x0001: 0x00770020
1980 12:06:55.856625 reg 0x0002: 0x00000000
1981 12:06:55.859592 IOAPIC: 120 interrupts
1982 12:06:55.863322 IOAPIC: Clearing IOAPIC at 0xfec00000
1983 12:06:55.866333 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1984 12:06:55.873041 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1985 12:06:55.876702 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1986 12:06:55.882989 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1987 12:06:55.886347 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1988 12:06:55.892906 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1989 12:06:55.896534 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1990 12:06:55.902837 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1991 12:06:55.906371 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1992 12:06:55.909523 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1993 12:06:55.916384 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1994 12:06:55.919019 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1995 12:06:55.926470 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1996 12:06:55.929033 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1997 12:06:55.936358 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1998 12:06:55.939722 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1999 12:06:55.946011 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2000 12:06:55.949443 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2001 12:06:55.952385 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2002 12:06:55.959216 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2003 12:06:55.962759 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2004 12:06:55.969301 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2005 12:06:55.972602 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2006 12:06:55.978873 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2007 12:06:55.982246 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2008 12:06:55.989685 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2009 12:06:55.992063 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2010 12:06:55.998913 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2011 12:06:56.001969 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2012 12:06:56.005705 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2013 12:06:56.012469 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2014 12:06:56.015458 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2015 12:06:56.021813 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2016 12:06:56.025421 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2017 12:06:56.031963 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2018 12:06:56.035532 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2019 12:06:56.042219 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2020 12:06:56.045208 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2021 12:06:56.048833 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2022 12:06:56.055326 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2023 12:06:56.059056 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2024 12:06:56.065841 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2025 12:06:56.068891 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2026 12:06:56.075502 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2027 12:06:56.078650 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2028 12:06:56.082310 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2029 12:06:56.088727 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2030 12:06:56.091876 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2031 12:06:56.098785 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2032 12:06:56.101872 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2033 12:06:56.108586 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2034 12:06:56.112016 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2035 12:06:56.118231 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2036 12:06:56.121945 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2037 12:06:56.125637 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2038 12:06:56.131538 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2039 12:06:56.135043 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2040 12:06:56.142016 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2041 12:06:56.144927 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2042 12:06:56.152113 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2043 12:06:56.155112 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2044 12:06:56.161696 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2045 12:06:56.165103 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2046 12:06:56.168178 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2047 12:06:56.174814 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2048 12:06:56.178276 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2049 12:06:56.184836 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2050 12:06:56.188555 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2051 12:06:56.194728 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2052 12:06:56.198435 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2053 12:06:56.205220 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2054 12:06:56.207871 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2055 12:06:56.211309 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2056 12:06:56.217479 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2057 12:06:56.221109 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2058 12:06:56.227709 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2059 12:06:56.231389 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2060 12:06:56.237902 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2061 12:06:56.241218 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2062 12:06:56.248080 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2063 12:06:56.251380 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2064 12:06:56.254797 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2065 12:06:56.261294 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2066 12:06:56.264784 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2067 12:06:56.271504 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2068 12:06:56.274690 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2069 12:06:56.281382 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2070 12:06:56.284572 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2071 12:06:56.291382 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2072 12:06:56.295037 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2073 12:06:56.298171 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2074 12:06:56.304516 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2075 12:06:56.308296 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2076 12:06:56.314817 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2077 12:06:56.317655 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2078 12:06:56.324486 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2079 12:06:56.328088 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2080 12:06:56.331317 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2081 12:06:56.337862 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2082 12:06:56.341381 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2083 12:06:56.347879 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2084 12:06:56.350942 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2085 12:06:56.357276 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2086 12:06:56.361039 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2087 12:06:56.367460 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2088 12:06:56.370946 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2089 12:06:56.377521 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2090 12:06:56.381332 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2091 12:06:56.384361 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2092 12:06:56.390961 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2093 12:06:56.393949 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2094 12:06:56.400592 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2095 12:06:56.404284 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2096 12:06:56.410452 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2097 12:06:56.414209 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2098 12:06:56.419995 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2099 12:06:56.423897 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2100 12:06:56.427222 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2101 12:06:56.434612 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2102 12:06:56.437081 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2103 12:06:56.443741 IOAPIC: Bootstrap Processor Local APIC = 0x00
2104 12:06:56.447231 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2105 12:06:56.450205 PCI: 00:1f.0 init finished in 607 msecs
2106 12:06:56.453845 PCI: 00:1f.2 init
2107 12:06:56.456802 apm_control: Disabling ACPI.
2108 12:06:56.461499 APMC done.
2109 12:06:56.465116 PCI: 00:1f.2 init finished in 7 msecs
2110 12:06:56.467910 PCI: 00:1f.3 init
2111 12:06:56.471868 PCI: 00:1f.3 init finished in 0 msecs
2112 12:06:56.472402 PCI: 01:00.0 init
2113 12:06:56.474984 PCI: 01:00.0 init finished in 0 msecs
2114 12:06:56.478453 PNP: 0c09.0 init
2115 12:06:56.484833 Google Chrome EC uptime: 12.157 seconds
2116 12:06:56.488434 Google Chrome AP resets since EC boot: 1
2117 12:06:56.491828 Google Chrome most recent AP reset causes:
2118 12:06:56.494993 0.341: 32775 shutdown: entering G3
2119 12:06:56.501720 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2120 12:06:56.504864 PNP: 0c09.0 init finished in 23 msecs
2121 12:06:56.508242 GENERIC: 0.0 init
2122 12:06:56.511468 GENERIC: 0.0 init finished in 0 msecs
2123 12:06:56.515061 GENERIC: 1.0 init
2124 12:06:56.518391 GENERIC: 1.0 init finished in 0 msecs
2125 12:06:56.518902 Devices initialized
2126 12:06:56.521097 Show all devs... After init.
2127 12:06:56.524363 Root Device: enabled 1
2128 12:06:56.527876 CPU_CLUSTER: 0: enabled 1
2129 12:06:56.531131 DOMAIN: 0000: enabled 1
2130 12:06:56.531482 GPIO: 0: enabled 1
2131 12:06:56.534455 PCI: 00:00.0: enabled 1
2132 12:06:56.538401 PCI: 00:01.0: enabled 0
2133 12:06:56.538856 PCI: 00:01.1: enabled 0
2134 12:06:56.541407 PCI: 00:02.0: enabled 1
2135 12:06:56.544707 PCI: 00:04.0: enabled 1
2136 12:06:56.547623 PCI: 00:05.0: enabled 0
2137 12:06:56.548013 PCI: 00:06.0: enabled 1
2138 12:06:56.551356 PCI: 00:06.2: enabled 0
2139 12:06:56.554909 PCI: 00:07.0: enabled 0
2140 12:06:56.555405 PCI: 00:07.1: enabled 0
2141 12:06:56.558084 PCI: 00:07.2: enabled 0
2142 12:06:56.561019 PCI: 00:07.3: enabled 0
2143 12:06:56.564698 PCI: 00:08.0: enabled 0
2144 12:06:56.565045 PCI: 00:09.0: enabled 0
2145 12:06:56.567591 PCI: 00:0a.0: enabled 1
2146 12:06:56.571317 PCI: 00:0d.0: enabled 1
2147 12:06:56.574623 PCI: 00:0d.1: enabled 0
2148 12:06:56.575107 PCI: 00:0d.2: enabled 0
2149 12:06:56.577693 PCI: 00:0d.3: enabled 0
2150 12:06:56.580934 PCI: 00:0e.0: enabled 0
2151 12:06:56.583922 PCI: 00:10.0: enabled 0
2152 12:06:56.583997 PCI: 00:10.1: enabled 0
2153 12:06:56.587315 PCI: 00:10.6: enabled 0
2154 12:06:56.590994 PCI: 00:10.7: enabled 0
2155 12:06:56.591069 PCI: 00:12.0: enabled 0
2156 12:06:56.594065 PCI: 00:12.6: enabled 0
2157 12:06:56.597355 PCI: 00:12.7: enabled 0
2158 12:06:56.600873 PCI: 00:13.0: enabled 0
2159 12:06:56.600946 PCI: 00:14.0: enabled 1
2160 12:06:56.604437 PCI: 00:14.1: enabled 0
2161 12:06:56.607909 PCI: 00:14.2: enabled 1
2162 12:06:56.611090 PCI: 00:14.3: enabled 1
2163 12:06:56.611644 PCI: 00:15.0: enabled 1
2164 12:06:56.614786 PCI: 00:15.1: enabled 1
2165 12:06:56.618208 PCI: 00:15.2: enabled 0
2166 12:06:56.621049 PCI: 00:15.3: enabled 1
2167 12:06:56.621405 PCI: 00:16.0: enabled 1
2168 12:06:56.624349 PCI: 00:16.1: enabled 0
2169 12:06:56.627837 PCI: 00:16.2: enabled 0
2170 12:06:56.630796 PCI: 00:16.3: enabled 0
2171 12:06:56.631156 PCI: 00:16.4: enabled 0
2172 12:06:56.634170 PCI: 00:16.5: enabled 0
2173 12:06:56.637623 PCI: 00:17.0: enabled 0
2174 12:06:56.638074 PCI: 00:19.0: enabled 0
2175 12:06:56.640807 PCI: 00:19.1: enabled 1
2176 12:06:56.644256 PCI: 00:19.2: enabled 0
2177 12:06:56.647670 PCI: 00:1a.0: enabled 0
2178 12:06:56.648166 PCI: 00:1c.0: enabled 0
2179 12:06:56.651413 PCI: 00:1c.1: enabled 0
2180 12:06:56.654295 PCI: 00:1c.2: enabled 0
2181 12:06:56.657881 PCI: 00:1c.3: enabled 0
2182 12:06:56.658332 PCI: 00:1c.4: enabled 0
2183 12:06:56.660627 PCI: 00:1c.5: enabled 0
2184 12:06:56.664109 PCI: 00:1c.6: enabled 0
2185 12:06:56.667643 PCI: 00:1c.7: enabled 0
2186 12:06:56.668202 PCI: 00:1d.0: enabled 0
2187 12:06:56.670717 PCI: 00:1d.1: enabled 0
2188 12:06:56.674136 PCI: 00:1d.2: enabled 0
2189 12:06:56.677525 PCI: 00:1d.3: enabled 0
2190 12:06:56.678013 PCI: 00:1e.0: enabled 1
2191 12:06:56.681171 PCI: 00:1e.1: enabled 0
2192 12:06:56.684315 PCI: 00:1e.2: enabled 0
2193 12:06:56.684798 PCI: 00:1e.3: enabled 1
2194 12:06:56.687852 PCI: 00:1f.0: enabled 1
2195 12:06:56.690986 PCI: 00:1f.1: enabled 0
2196 12:06:56.694226 PCI: 00:1f.2: enabled 1
2197 12:06:56.694609 PCI: 00:1f.3: enabled 1
2198 12:06:56.697715 PCI: 00:1f.4: enabled 0
2199 12:06:56.701318 PCI: 00:1f.5: enabled 1
2200 12:06:56.704083 PCI: 00:1f.6: enabled 0
2201 12:06:56.704465 PCI: 00:1f.7: enabled 0
2202 12:06:56.707638 GENERIC: 0.0: enabled 1
2203 12:06:56.710844 GENERIC: 0.0: enabled 1
2204 12:06:56.714481 GENERIC: 1.0: enabled 1
2205 12:06:56.714964 GENERIC: 0.0: enabled 1
2206 12:06:56.717196 GENERIC: 1.0: enabled 1
2207 12:06:56.720271 USB0 port 0: enabled 1
2208 12:06:56.720651 USB0 port 0: enabled 1
2209 12:06:56.724403 GENERIC: 0.0: enabled 1
2210 12:06:56.727427 I2C: 00:1a: enabled 1
2211 12:06:56.730693 I2C: 00:31: enabled 1
2212 12:06:56.731176 I2C: 00:32: enabled 1
2213 12:06:56.733854 I2C: 00:50: enabled 1
2214 12:06:56.737553 I2C: 00:10: enabled 1
2215 12:06:56.738007 I2C: 00:15: enabled 1
2216 12:06:56.740656 I2C: 00:2c: enabled 1
2217 12:06:56.744109 GENERIC: 0.0: enabled 1
2218 12:06:56.744697 SPI: 00: enabled 1
2219 12:06:56.747445 PNP: 0c09.0: enabled 1
2220 12:06:56.750633 GENERIC: 0.0: enabled 1
2221 12:06:56.751120 USB3 port 0: enabled 1
2222 12:06:56.753563 USB3 port 1: enabled 0
2223 12:06:56.757405 USB3 port 2: enabled 1
2224 12:06:56.757895 USB3 port 3: enabled 0
2225 12:06:56.760595 USB2 port 0: enabled 1
2226 12:06:56.763762 USB2 port 1: enabled 0
2227 12:06:56.767243 USB2 port 2: enabled 1
2228 12:06:56.767731 USB2 port 3: enabled 0
2229 12:06:56.770968 USB2 port 4: enabled 0
2230 12:06:56.773860 USB2 port 5: enabled 1
2231 12:06:56.774345 USB2 port 6: enabled 0
2232 12:06:56.777131 USB2 port 7: enabled 0
2233 12:06:56.780360 USB2 port 8: enabled 1
2234 12:06:56.783745 USB2 port 9: enabled 1
2235 12:06:56.784167 USB3 port 0: enabled 1
2236 12:06:56.787019 USB3 port 1: enabled 0
2237 12:06:56.790888 USB3 port 2: enabled 0
2238 12:06:56.791370 USB3 port 3: enabled 0
2239 12:06:56.793503 GENERIC: 0.0: enabled 1
2240 12:06:56.797517 GENERIC: 1.0: enabled 1
2241 12:06:56.797978 APIC: 00: enabled 1
2242 12:06:56.800129 APIC: 14: enabled 1
2243 12:06:56.803687 APIC: 16: enabled 1
2244 12:06:56.804208 APIC: 10: enabled 1
2245 12:06:56.807173 APIC: 12: enabled 1
2246 12:06:56.810625 APIC: 01: enabled 1
2247 12:06:56.811110 APIC: 08: enabled 1
2248 12:06:56.813609 APIC: 09: enabled 1
2249 12:06:56.817198 PCI: 01:00.0: enabled 1
2250 12:06:56.819758 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2251 12:06:56.826909 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2252 12:06:56.830219 ELOG: NV offset 0xf20000 size 0x4000
2253 12:06:56.836494 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2254 12:06:56.842841 ELOG: Event(17) added with size 13 at 2023-12-07 12:06:56 UTC
2255 12:06:56.849887 ELOG: Event(9E) added with size 10 at 2023-12-07 12:06:56 UTC
2256 12:06:56.856175 ELOG: Event(9F) added with size 14 at 2023-12-07 12:06:56 UTC
2257 12:06:56.862752 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2258 12:06:56.869413 ELOG: Event(A0) added with size 9 at 2023-12-07 12:06:56 UTC
2259 12:06:56.872828 elog_add_boot_reason: Logged dev mode boot
2260 12:06:56.879292 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2261 12:06:56.879378 Finalize devices...
2262 12:06:56.882608 PCI: 00:16.0 final
2263 12:06:56.886012 PCI: 00:1f.2 final
2264 12:06:56.886091 GENERIC: 0.0 final
2265 12:06:56.892612 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2266 12:06:56.896058 GENERIC: 1.0 final
2267 12:06:56.899415 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2268 12:06:56.902593 Devices finalized
2269 12:06:56.909260 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2270 12:06:56.912647 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2271 12:06:56.919191 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2272 12:06:56.922637 ME: HFSTS1 : 0x90000245
2273 12:06:56.929402 ME: HFSTS2 : 0x82100116
2274 12:06:56.932973 ME: HFSTS3 : 0x00000050
2275 12:06:56.936348 ME: HFSTS4 : 0x00004000
2276 12:06:56.942845 ME: HFSTS5 : 0x00000000
2277 12:06:56.945899 ME: HFSTS6 : 0x40600006
2278 12:06:56.949396 ME: Manufacturing Mode : NO
2279 12:06:56.952795 ME: SPI Protection Mode Enabled : YES
2280 12:06:56.959025 ME: FPFs Committed : YES
2281 12:06:56.962512 ME: Manufacturing Vars Locked : YES
2282 12:06:56.966151 ME: FW Partition Table : OK
2283 12:06:56.969051 ME: Bringup Loader Failure : NO
2284 12:06:56.972537 ME: Firmware Init Complete : YES
2285 12:06:56.975908 ME: Boot Options Present : NO
2286 12:06:56.979308 ME: Update In Progress : NO
2287 12:06:56.985521 ME: D0i3 Support : YES
2288 12:06:56.989058 ME: Low Power State Enabled : NO
2289 12:06:56.992349 ME: CPU Replaced : YES
2290 12:06:56.995625 ME: CPU Replacement Valid : YES
2291 12:06:56.998794 ME: Current Working State : 5
2292 12:06:57.002182 ME: Current Operation State : 1
2293 12:06:57.005684 ME: Current Operation Mode : 0
2294 12:06:57.008904 ME: Error Code : 0
2295 12:06:57.012248 ME: Enhanced Debug Mode : NO
2296 12:06:57.018990 ME: CPU Debug Disabled : YES
2297 12:06:57.022218 ME: TXT Support : NO
2298 12:06:57.025619 ME: WP for RO is enabled : YES
2299 12:06:57.031891 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2300 12:06:57.035452 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2301 12:06:57.042105 Ramoops buffer: 0x100000@0x76899000.
2302 12:06:57.045475 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2303 12:06:57.055225 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2304 12:06:57.059020 CBFS: 'fallback/slic' not found.
2305 12:06:57.062013 ACPI: Writing ACPI tables at 7686d000.
2306 12:06:57.062100 ACPI: * FACS
2307 12:06:57.065568 ACPI: * DSDT
2308 12:06:57.071756 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2309 12:06:57.075126 ACPI: * FADT
2310 12:06:57.075210 SCI is IRQ9
2311 12:06:57.078408 ACPI: added table 1/32, length now 40
2312 12:06:57.081974 ACPI: * SSDT
2313 12:06:57.088306 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2314 12:06:57.091979 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2315 12:06:57.098181 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2316 12:06:57.101706 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2317 12:06:57.108443 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2318 12:06:57.111730 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2319 12:06:57.118445 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2320 12:06:57.125329 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2321 12:06:57.128455 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2322 12:06:57.134663 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2323 12:06:57.138028 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2324 12:06:57.144878 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2325 12:06:57.148462 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2326 12:06:57.154781 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2327 12:06:57.161505 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2328 12:06:57.164535 PS2K: Passing 80 keymaps to kernel
2329 12:06:57.171721 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2330 12:06:57.177804 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2331 12:06:57.184295 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2332 12:06:57.191151 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2333 12:06:57.194440 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2334 12:06:57.201177 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2335 12:06:57.207624 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2336 12:06:57.214474 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2337 12:06:57.220909 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2338 12:06:57.228140 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2339 12:06:57.230966 ACPI: added table 2/32, length now 44
2340 12:06:57.231033 ACPI: * MCFG
2341 12:06:57.237817 ACPI: added table 3/32, length now 48
2342 12:06:57.237878 ACPI: * TPM2
2343 12:06:57.240599 TPM2 log created at 0x7685d000
2344 12:06:57.244322 ACPI: added table 4/32, length now 52
2345 12:06:57.247287 ACPI: * LPIT
2346 12:06:57.250841 ACPI: added table 5/32, length now 56
2347 12:06:57.250895 ACPI: * MADT
2348 12:06:57.253967 SCI is IRQ9
2349 12:06:57.257513 ACPI: added table 6/32, length now 60
2350 12:06:57.261230 cmd_reg from pmc_make_ipc_cmd 1052838
2351 12:06:57.267373 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2352 12:06:57.273957 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2353 12:06:57.280525 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2354 12:06:57.283727 PMC CrashLog size in discovery mode: 0xC00
2355 12:06:57.287407 cpu crashlog bar addr: 0x80640000
2356 12:06:57.290435 cpu discovery table offset: 0x6030
2357 12:06:57.293924 cpu_crashlog_discovery_table buffer count: 0x3
2358 12:06:57.300270 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2359 12:06:57.307411 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2360 12:06:57.314082 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2361 12:06:57.320634 PMC crashLog size in discovery mode : 0xC00
2362 12:06:57.327020 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2363 12:06:57.330275 discover mode PMC crashlog size adjusted to: 0x200
2364 12:06:57.336867 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2365 12:06:57.344251 discover mode PMC crashlog size adjusted to: 0x0
2366 12:06:57.346839 m_cpu_crashLog_size : 0x3480 bytes
2367 12:06:57.346897 CPU crashLog present.
2368 12:06:57.353561 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2369 12:06:57.360279 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2370 12:06:57.363665 current = 76876550
2371 12:06:57.363726 ACPI: * DMAR
2372 12:06:57.367026 ACPI: added table 7/32, length now 64
2373 12:06:57.373530 ACPI: added table 8/32, length now 68
2374 12:06:57.373589 ACPI: * HPET
2375 12:06:57.376911 ACPI: added table 9/32, length now 72
2376 12:06:57.380113 ACPI: done.
2377 12:06:57.380180 ACPI tables: 38528 bytes.
2378 12:06:57.383235 smbios_write_tables: 76857000
2379 12:06:57.387634 EC returned error result code 3
2380 12:06:57.390713 Couldn't obtain OEM name from CBI
2381 12:06:57.394299 Create SMBIOS type 16
2382 12:06:57.397818 Create SMBIOS type 17
2383 12:06:57.401004 Create SMBIOS type 20
2384 12:06:57.401058 GENERIC: 0.0 (WIFI Device)
2385 12:06:57.404124 SMBIOS tables: 2156 bytes.
2386 12:06:57.407173 Writing table forward entry at 0x00000500
2387 12:06:57.414814 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2388 12:06:57.417247 Writing coreboot table at 0x76891000
2389 12:06:57.423899 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2390 12:06:57.430588 1. 0000000000001000-000000000009ffff: RAM
2391 12:06:57.434002 2. 00000000000a0000-00000000000fffff: RESERVED
2392 12:06:57.437123 3. 0000000000100000-0000000076856fff: RAM
2393 12:06:57.443659 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2394 12:06:57.450973 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2395 12:06:57.453942 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2396 12:06:57.460538 7. 0000000077000000-00000000803fffff: RESERVED
2397 12:06:57.463798 8. 00000000c0000000-00000000cfffffff: RESERVED
2398 12:06:57.470309 9. 00000000f8000000-00000000f9ffffff: RESERVED
2399 12:06:57.473560 10. 00000000fb000000-00000000fb000fff: RESERVED
2400 12:06:57.480593 11. 00000000fc800000-00000000fe7fffff: RESERVED
2401 12:06:57.483513 12. 00000000feb00000-00000000feb7ffff: RESERVED
2402 12:06:57.487277 13. 00000000fec00000-00000000fecfffff: RESERVED
2403 12:06:57.493583 14. 00000000fed40000-00000000fed6ffff: RESERVED
2404 12:06:57.497328 15. 00000000fed80000-00000000fed87fff: RESERVED
2405 12:06:57.503600 16. 00000000fed90000-00000000fed92fff: RESERVED
2406 12:06:57.506678 17. 00000000feda0000-00000000feda1fff: RESERVED
2407 12:06:57.513485 18. 00000000fedc0000-00000000feddffff: RESERVED
2408 12:06:57.516889 19. 0000000100000000-000000027fbfffff: RAM
2409 12:06:57.520122 Passing 4 GPIOs to payload:
2410 12:06:57.523565 NAME | PORT | POLARITY | VALUE
2411 12:06:57.529848 lid | undefined | high | high
2412 12:06:57.536527 power | undefined | high | low
2413 12:06:57.540708 oprom | undefined | high | low
2414 12:06:57.546482 EC in RW | 0x00000151 | high | high
2415 12:06:57.546551 Board ID: 3
2416 12:06:57.550124 FW config: 0x131
2417 12:06:57.556467 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 63fa
2418 12:06:57.556539 coreboot table: 1788 bytes.
2419 12:06:57.563379 IMD ROOT 0. 0x76fff000 0x00001000
2420 12:06:57.567014 IMD SMALL 1. 0x76ffe000 0x00001000
2421 12:06:57.570219 FSP MEMORY 2. 0x76afe000 0x00500000
2422 12:06:57.573434 CONSOLE 3. 0x76ade000 0x00020000
2423 12:06:57.576515 RW MCACHE 4. 0x76add000 0x0000043c
2424 12:06:57.580028 RO MCACHE 5. 0x76adc000 0x00000fd8
2425 12:06:57.583306 FMAP 6. 0x76adb000 0x0000064a
2426 12:06:57.586548 TIME STAMP 7. 0x76ada000 0x00000910
2427 12:06:57.593119 VBOOT WORK 8. 0x76ac6000 0x00014000
2428 12:06:57.596703 MEM INFO 9. 0x76ac5000 0x000003b8
2429 12:06:57.599880 ROMSTG STCK10. 0x76ac4000 0x00001000
2430 12:06:57.602853 AFTER CAR 11. 0x76ab8000 0x0000c000
2431 12:06:57.606208 RAMSTAGE 12. 0x76a2e000 0x0008a000
2432 12:06:57.609833 ACPI BERT 13. 0x76a1e000 0x00010000
2433 12:06:57.612787 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2434 12:06:57.616668 REFCODE 15. 0x769ae000 0x0006f000
2435 12:06:57.622878 SMM BACKUP 16. 0x7699e000 0x00010000
2436 12:06:57.626070 IGD OPREGION17. 0x76999000 0x00004203
2437 12:06:57.629927 RAMOOPS 18. 0x76899000 0x00100000
2438 12:06:57.632989 COREBOOT 19. 0x76891000 0x00008000
2439 12:06:57.636233 ACPI 20. 0x7686d000 0x00024000
2440 12:06:57.639878 TPM2 TCGLOG21. 0x7685d000 0x00010000
2441 12:06:57.642856 PMC CRASHLOG22. 0x7685c000 0x00000c00
2442 12:06:57.646467 CPU CRASHLOG23. 0x76858000 0x00003480
2443 12:06:57.653375 SMBIOS 24. 0x76857000 0x00001000
2444 12:06:57.653464 IMD small region:
2445 12:06:57.656386 IMD ROOT 0. 0x76ffec00 0x00000400
2446 12:06:57.663029 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2447 12:06:57.666452 VPD 2. 0x76ffeb60 0x0000006c
2448 12:06:57.670007 POWER STATE 3. 0x76ffeb00 0x00000044
2449 12:06:57.673012 ROMSTAGE 4. 0x76ffeae0 0x00000004
2450 12:06:57.676187 ACPI GNVS 5. 0x76ffea80 0x00000048
2451 12:06:57.679444 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2452 12:06:57.686148 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2453 12:06:57.689652 MTRR: Physical address space:
2454 12:06:57.696682 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2455 12:06:57.702653 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2456 12:06:57.709582 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2457 12:06:57.715801 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2458 12:06:57.722790 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2459 12:06:57.726144 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2460 12:06:57.732607 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2461 12:06:57.739378 MTRR: Fixed MSR 0x250 0x0606060606060606
2462 12:06:57.742530 MTRR: Fixed MSR 0x258 0x0606060606060606
2463 12:06:57.745628 MTRR: Fixed MSR 0x259 0x0000000000000000
2464 12:06:57.749015 MTRR: Fixed MSR 0x268 0x0606060606060606
2465 12:06:57.755619 MTRR: Fixed MSR 0x269 0x0606060606060606
2466 12:06:57.759100 MTRR: Fixed MSR 0x26a 0x0606060606060606
2467 12:06:57.762332 MTRR: Fixed MSR 0x26b 0x0606060606060606
2468 12:06:57.765576 MTRR: Fixed MSR 0x26c 0x0606060606060606
2469 12:06:57.768770 MTRR: Fixed MSR 0x26d 0x0606060606060606
2470 12:06:57.775617 MTRR: Fixed MSR 0x26e 0x0606060606060606
2471 12:06:57.778615 MTRR: Fixed MSR 0x26f 0x0606060606060606
2472 12:06:57.782180 call enable_fixed_mtrr()
2473 12:06:57.785823 CPU physical address size: 39 bits
2474 12:06:57.792190 MTRR: default type WB/UC MTRR counts: 6/6.
2475 12:06:57.795851 MTRR: UC selected as default type.
2476 12:06:57.799001 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2477 12:06:57.805813 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2478 12:06:57.811927 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2479 12:06:57.818591 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2480 12:06:57.825359 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2481 12:06:57.832139 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2482 12:06:57.838587 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 12:06:57.841892 MTRR: Fixed MSR 0x258 0x0606060606060606
2484 12:06:57.845196 MTRR: Fixed MSR 0x259 0x0000000000000000
2485 12:06:57.848843 MTRR: Fixed MSR 0x268 0x0606060606060606
2486 12:06:57.851835 MTRR: Fixed MSR 0x269 0x0606060606060606
2487 12:06:57.858846 MTRR: Fixed MSR 0x26a 0x0606060606060606
2488 12:06:57.862271 MTRR: Fixed MSR 0x26b 0x0606060606060606
2489 12:06:57.865173 MTRR: Fixed MSR 0x26c 0x0606060606060606
2490 12:06:57.868479 MTRR: Fixed MSR 0x26d 0x0606060606060606
2491 12:06:57.875241 MTRR: Fixed MSR 0x26e 0x0606060606060606
2492 12:06:57.878281 MTRR: Fixed MSR 0x26f 0x0606060606060606
2493 12:06:57.881852 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 12:06:57.885568 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 12:06:57.891509 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 12:06:57.895212 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 12:06:57.898450 MTRR: Fixed MSR 0x259 0x0000000000000000
2498 12:06:57.901535 MTRR: Fixed MSR 0x268 0x0606060606060606
2499 12:06:57.908677 MTRR: Fixed MSR 0x269 0x0606060606060606
2500 12:06:57.911715 MTRR: Fixed MSR 0x26a 0x0606060606060606
2501 12:06:57.915247 MTRR: Fixed MSR 0x26b 0x0606060606060606
2502 12:06:57.918418 MTRR: Fixed MSR 0x26c 0x0606060606060606
2503 12:06:57.921768 MTRR: Fixed MSR 0x26d 0x0606060606060606
2504 12:06:57.928417 MTRR: Fixed MSR 0x26e 0x0606060606060606
2505 12:06:57.931524 MTRR: Fixed MSR 0x26f 0x0606060606060606
2506 12:06:57.934826 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 12:06:57.938039 call enable_fixed_mtrr()
2508 12:06:57.941363 MTRR: Fixed MSR 0x258 0x0606060606060606
2509 12:06:57.944743 call enable_fixed_mtrr()
2510 12:06:57.948246 MTRR: Fixed MSR 0x259 0x0000000000000000
2511 12:06:57.951377 MTRR: Fixed MSR 0x268 0x0606060606060606
2512 12:06:57.958072 MTRR: Fixed MSR 0x269 0x0606060606060606
2513 12:06:57.961369 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 12:06:57.964688 MTRR: Fixed MSR 0x26b 0x0606060606060606
2515 12:06:57.967775 MTRR: Fixed MSR 0x26c 0x0606060606060606
2516 12:06:57.974804 MTRR: Fixed MSR 0x26d 0x0606060606060606
2517 12:06:57.978565 MTRR: Fixed MSR 0x26e 0x0606060606060606
2518 12:06:57.981269 MTRR: Fixed MSR 0x26f 0x0606060606060606
2519 12:06:57.984900 MTRR: Fixed MSR 0x258 0x0606060606060606
2520 12:06:57.991395 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 12:06:57.994625 CPU physical address size: 39 bits
2522 12:06:57.997867 MTRR: Fixed MSR 0x259 0x0000000000000000
2523 12:06:58.001150 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 12:06:58.004600 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 12:06:58.011064 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 12:06:58.014512 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 12:06:58.017908 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 12:06:58.020987 MTRR: Fixed MSR 0x269 0x0606060606060606
2529 12:06:58.024575 MTRR: Fixed MSR 0x26a 0x0606060606060606
2530 12:06:58.031125 MTRR: Fixed MSR 0x26b 0x0606060606060606
2531 12:06:58.034187 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 12:06:58.037542 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 12:06:58.040777 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 12:06:58.047792 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 12:06:58.050834 MTRR: Fixed MSR 0x26a 0x0606060606060606
2536 12:06:58.054358 call enable_fixed_mtrr()
2537 12:06:58.057735 MTRR: Fixed MSR 0x258 0x0606060606060606
2538 12:06:58.060791 MTRR: Fixed MSR 0x26b 0x0606060606060606
2539 12:06:58.064362 MTRR: Fixed MSR 0x26c 0x0606060606060606
2540 12:06:58.070750 MTRR: Fixed MSR 0x26d 0x0606060606060606
2541 12:06:58.074211 MTRR: Fixed MSR 0x26e 0x0606060606060606
2542 12:06:58.077612 MTRR: Fixed MSR 0x26f 0x0606060606060606
2543 12:06:58.080722 CPU physical address size: 39 bits
2544 12:06:58.084260 call enable_fixed_mtrr()
2545 12:06:58.087738 call enable_fixed_mtrr()
2546 12:06:58.090745 CPU physical address size: 39 bits
2547 12:06:58.094095 CPU physical address size: 39 bits
2548 12:06:58.097275 CPU physical address size: 39 bits
2549 12:06:58.100917 MTRR: Fixed MSR 0x259 0x0000000000000000
2550 12:06:58.103799 MTRR: Fixed MSR 0x250 0x0606060606060606
2551 12:06:58.110577 MTRR: Fixed MSR 0x268 0x0606060606060606
2552 12:06:58.114213 MTRR: Fixed MSR 0x269 0x0606060606060606
2553 12:06:58.117618 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 12:06:58.120672 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 12:06:58.124198 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 12:06:58.130698 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 12:06:58.133608 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 12:06:58.137238 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 12:06:58.140354 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 12:06:58.147023 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 12:06:58.150334 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 12:06:58.153764 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 12:06:58.157924 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 12:06:58.161355 call enable_fixed_mtrr()
2565 12:06:58.164852 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 12:06:58.171179 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 12:06:58.174821 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 12:06:58.177883 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 12:06:58.181249 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 12:06:58.184468 CPU physical address size: 39 bits
2571 12:06:58.188120 call enable_fixed_mtrr()
2572 12:06:58.191117 CPU physical address size: 39 bits
2573 12:06:58.195940
2574 12:06:58.196004 MTRR check
2575 12:06:58.199643 Fixed MTRRs : Enabled
2576 12:06:58.199707 Variable MTRRs: Enabled
2577 12:06:58.199755
2578 12:06:58.206075 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2579 12:06:58.209476 Checking cr50 for pending updates
2580 12:06:58.221980 Reading cr50 TPM mode
2581 12:06:58.237225 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2582 12:06:58.246767 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2583 12:06:58.250041 Checking segment from ROM address 0xf96cbe6c
2584 12:06:58.253675 Checking segment from ROM address 0xf96cbe88
2585 12:06:58.259884 Loading segment from ROM address 0xf96cbe6c
2586 12:06:58.259942 code (compression=1)
2587 12:06:58.269937 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2588 12:06:58.279697 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2589 12:06:58.279761 using LZMA
2590 12:06:58.301987 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2591 12:06:58.308711 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2592 12:06:58.317093 Loading segment from ROM address 0xf96cbe88
2593 12:06:58.320151 Entry Point 0x30000000
2594 12:06:58.320208 Loaded segments
2595 12:06:58.326468 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2596 12:06:58.333449 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2597 12:06:58.336683 Finalizing chipset.
2598 12:06:58.336738 apm_control: Finalizing SMM.
2599 12:06:58.340015 APMC done.
2600 12:06:58.343119 HECI: CSE device 16.1 is disabled
2601 12:06:58.347183 HECI: CSE device 16.2 is disabled
2602 12:06:58.350131 HECI: CSE device 16.3 is disabled
2603 12:06:58.353587 HECI: CSE device 16.4 is disabled
2604 12:06:58.356510 HECI: CSE device 16.5 is disabled
2605 12:06:58.359918 HECI: Sending End-of-Post
2606 12:06:58.367917 CSE: EOP requested action: continue boot
2607 12:06:58.371441 CSE EOP successful, continuing boot
2608 12:06:58.378201 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2609 12:06:58.381410 mp_park_aps done after 0 msecs.
2610 12:06:58.384588 Jumping to boot code at 0x30000000(0x76891000)
2611 12:06:58.394651 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2612 12:06:58.399029
2613 12:06:58.399085
2614 12:06:58.399133
2615 12:06:58.402230 Starting depthcharge on Volmar...
2616 12:06:58.402285
2617 12:06:58.402631 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2618 12:06:58.402728 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2619 12:06:58.402829 Setting prompt string to ['brya:']
2620 12:06:58.402924 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2621 12:06:58.408715 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2622 12:06:58.408790
2623 12:06:58.415675 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2624 12:06:58.415744
2625 12:06:58.421828 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2626 12:06:58.421893
2627 12:06:58.425382 configure_storage: Failed to remap 1C:2
2628 12:06:58.425446
2629 12:06:58.428576 Wipe memory regions:
2630 12:06:58.428629
2631 12:06:58.432111 [0x00000000001000, 0x000000000a0000)
2632 12:06:58.432178
2633 12:06:58.435253 [0x00000000100000, 0x00000030000000)
2634 12:06:58.540413
2635 12:06:58.543568 [0x00000032668e60, 0x00000076857000)
2636 12:06:58.691414
2637 12:06:58.694843 [0x00000100000000, 0x0000027fc00000)
2638 12:06:59.523091
2639 12:06:59.526249 ec_init: CrosEC protocol v3 supported (256, 256)
2640 12:07:00.137361
2641 12:07:00.137522 R8152: Initializing
2642 12:07:00.137589
2643 12:07:00.140747 Version 9 (ocp_data = 6010)
2644 12:07:00.140810
2645 12:07:00.143699 R8152: Done initializing
2646 12:07:00.143757
2647 12:07:00.147359 Adding net device
2648 12:07:00.448388
2649 12:07:00.451547 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2650 12:07:00.451622
2651 12:07:00.451677
2652 12:07:00.451727
2653 12:07:00.451983 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 12:07:00.552275 brya: tftpboot 192.168.201.1 12207092/tftp-deploy-l_zi3qjb/kernel/bzImage 12207092/tftp-deploy-l_zi3qjb/kernel/cmdline 12207092/tftp-deploy-l_zi3qjb/ramdisk/ramdisk.cpio.gz
2656 12:07:00.552388 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 12:07:00.552476 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2658 12:07:00.557248 tftpboot 192.168.201.1 12207092/tftp-deploy-l_zi3qjb/kernel/bzIploy-l_zi3qjb/kernel/cmdline 12207092/tftp-deploy-l_zi3qjb/ramdisk/ramdisk.cpio.gz
2659 12:07:00.557332
2660 12:07:00.557401 Waiting for link
2661 12:07:00.760665
2662 12:07:00.760786 done.
2663 12:07:00.760851
2664 12:07:00.760901 MAC: 00:e0:4c:68:03:d9
2665 12:07:00.760949
2666 12:07:00.764105 Sending DHCP discover... done.
2667 12:07:00.764178
2668 12:07:00.767177 Waiting for reply... done.
2669 12:07:00.767239
2670 12:07:00.770615 Sending DHCP request... done.
2671 12:07:00.770679
2672 12:07:00.780050 Waiting for reply... done.
2673 12:07:00.780125
2674 12:07:00.780177 My ip is 192.168.201.14
2675 12:07:00.780223
2676 12:07:00.783258 The DHCP server ip is 192.168.201.1
2677 12:07:00.787182
2678 12:07:00.790216 TFTP server IP predefined by user: 192.168.201.1
2679 12:07:00.790304
2680 12:07:00.796930 Bootfile predefined by user: 12207092/tftp-deploy-l_zi3qjb/kernel/bzImage
2681 12:07:00.796995
2682 12:07:00.800629 Sending tftp read request... done.
2683 12:07:00.800685
2684 12:07:00.803462 Waiting for the transfer...
2685 12:07:00.803530
2686 12:07:01.031493 00000000 ################################################################
2687 12:07:01.031615
2688 12:07:01.255357 00080000 ################################################################
2689 12:07:01.255480
2690 12:07:01.482983 00100000 ################################################################
2691 12:07:01.483114
2692 12:07:01.710761 00180000 ################################################################
2693 12:07:01.710893
2694 12:07:01.934934 00200000 ################################################################
2695 12:07:01.935066
2696 12:07:02.158958 00280000 ################################################################
2697 12:07:02.159095
2698 12:07:02.384798 00300000 ################################################################
2699 12:07:02.384923
2700 12:07:02.611766 00380000 ################################################################
2701 12:07:02.611904
2702 12:07:02.836561 00400000 ################################################################
2703 12:07:02.836704
2704 12:07:03.064523 00480000 ################################################################
2705 12:07:03.064653
2706 12:07:03.289529 00500000 ################################################################
2707 12:07:03.289688
2708 12:07:03.516253 00580000 ################################################################
2709 12:07:03.516378
2710 12:07:03.743584 00600000 ################################################################
2711 12:07:03.743721
2712 12:07:03.971470 00680000 ################################################################
2713 12:07:03.971601
2714 12:07:04.199942 00700000 ################################################################
2715 12:07:04.200082
2716 12:07:04.426287 00780000 ################################################################
2717 12:07:04.426413
2718 12:07:04.653110 00800000 ################################################################
2719 12:07:04.653240
2720 12:07:04.879881 00880000 ################################################################
2721 12:07:04.880015
2722 12:07:05.106726 00900000 ################################################################
2723 12:07:05.106865
2724 12:07:05.331800 00980000 ################################################################
2725 12:07:05.331945
2726 12:07:05.559939 00a00000 ################################################################
2727 12:07:05.560073
2728 12:07:05.786915 00a80000 ################################################################
2729 12:07:05.787047
2730 12:07:06.014923 00b00000 ################################################################
2731 12:07:06.015047
2732 12:07:06.243065 00b80000 ################################################################
2733 12:07:06.243195
2734 12:07:06.470651 00c00000 ################################################################
2735 12:07:06.470769
2736 12:07:06.696752 00c80000 ################################################################
2737 12:07:06.696881
2738 12:07:06.914316 00d00000 ############################################################# done.
2739 12:07:06.914460
2740 12:07:06.917686 The bootfile was 14129248 bytes long.
2741 12:07:06.917770
2742 12:07:06.921225 Sending tftp read request... done.
2743 12:07:06.921304
2744 12:07:06.924037 Waiting for the transfer...
2745 12:07:06.924116
2746 12:07:07.151667 00000000 ################################################################
2747 12:07:07.151799
2748 12:07:07.377062 00080000 ################################################################
2749 12:07:07.377218
2750 12:07:07.603030 00100000 ################################################################
2751 12:07:07.603187
2752 12:07:07.831092 00180000 ################################################################
2753 12:07:07.831220
2754 12:07:08.058641 00200000 ################################################################
2755 12:07:08.058788
2756 12:07:08.284088 00280000 ################################################################
2757 12:07:08.284204
2758 12:07:08.510420 00300000 ################################################################
2759 12:07:08.510542
2760 12:07:08.736374 00380000 ################################################################
2761 12:07:08.736491
2762 12:07:08.962454 00400000 ################################################################
2763 12:07:08.962579
2764 12:07:09.188879 00480000 ################################################################
2765 12:07:09.189004
2766 12:07:09.415358 00500000 ################################################################
2767 12:07:09.415477
2768 12:07:09.644117 00580000 ################################################################
2769 12:07:09.644245
2770 12:07:09.870085 00600000 ################################################################
2771 12:07:09.870201
2772 12:07:10.096064 00680000 ################################################################
2773 12:07:10.096184
2774 12:07:10.322877 00700000 ################################################################
2775 12:07:10.323012
2776 12:07:10.549187 00780000 ################################################################
2777 12:07:10.549307
2778 12:07:10.775667 00800000 ################################################################
2779 12:07:10.775792
2780 12:07:10.932759 00880000 ############################################# done.
2781 12:07:10.932899
2782 12:07:10.935871 Sending tftp read request... done.
2783 12:07:10.935949
2784 12:07:10.939359 Waiting for the transfer...
2785 12:07:10.939430
2786 12:07:10.939485 00000000 # done.
2787 12:07:10.939538
2788 12:07:10.949072 Command line loaded dynamically from TFTP file: 12207092/tftp-deploy-l_zi3qjb/kernel/cmdline
2789 12:07:10.949151
2790 12:07:10.965415 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2791 12:07:10.970598
2792 12:07:10.973857 Shutting down all USB controllers.
2793 12:07:10.973934
2794 12:07:10.973988 Removing current net device
2795 12:07:10.974037
2796 12:07:10.977095 Finalizing coreboot
2797 12:07:10.977172
2798 12:07:10.983585 Exiting depthcharge with code 4 at timestamp: 22841975
2799 12:07:10.983664
2800 12:07:10.983718
2801 12:07:10.983767 Starting kernel ...
2802 12:07:10.983813
2803 12:07:10.983857
2804 12:07:10.984205 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2805 12:07:10.984294 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2806 12:07:10.984358 Setting prompt string to ['Linux version [0-9]']
2807 12:07:10.984414 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2808 12:07:10.984469 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2810 12:11:38.985303 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2812 12:11:38.986183 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2814 12:11:38.986810 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2817 12:11:38.987823 end: 2 depthcharge-action (duration 00:05:00) [common]
2819 12:11:38.988716 Cleaning after the job
2820 12:11:38.989045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/ramdisk
2821 12:11:38.990429 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/kernel
2822 12:11:38.991786 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207092/tftp-deploy-l_zi3qjb/modules
2823 12:11:38.992238 start: 5.1 power-off (timeout 00:00:30) [common]
2824 12:11:38.992375 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2825 12:11:39.070869 >> Command sent successfully.
2826 12:11:39.079222 Returned 0 in 0 seconds
2827 12:11:39.180260 end: 5.1 power-off (duration 00:00:00) [common]
2829 12:11:39.181445 start: 5.2 read-feedback (timeout 00:10:00) [common]
2830 12:11:39.182339 Listened to connection for namespace 'common' for up to 1s
2832 12:11:39.183357 Listened to connection for namespace 'common' for up to 1s
2833 12:11:40.183122 Finalising connection for namespace 'common'
2834 12:11:40.183697 Disconnecting from shell: Finalise
2835 12:11:40.183999
2836 12:11:40.284940 end: 5.2 read-feedback (duration 00:00:01) [common]
2837 12:11:40.285468 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12207092
2838 12:11:40.300410 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12207092
2839 12:11:40.300568 JobError: Your job cannot terminate cleanly.