Boot log: acer-cbv514-1h-34uz-brya

    1 12:06:28.697489  lava-dispatcher, installed at version: 2023.10
    2 12:06:28.697706  start: 0 validate
    3 12:06:28.697833  Start time: 2023-12-07 12:06:28.697826+00:00 (UTC)
    4 12:06:28.697949  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:06:28.698071  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:06:28.968752  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:06:28.969495  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.201-cip41-28-g38e219eb6aa85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:06:29.240203  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:06:29.240964  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:06:45.202183  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:06:45.202925  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.201-cip41-28-g38e219eb6aa85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:06:45.471220  validate duration: 16.77
   14 12:06:45.472596  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:06:45.473157  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:06:45.473632  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:06:45.474248  Not decompressing ramdisk as can be used compressed.
   18 12:06:45.474716  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 12:06:45.475068  saving as /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/ramdisk/initrd.cpio.gz
   20 12:06:45.475470  total size: 5432690 (5 MB)
   21 12:06:47.157342  progress   0 % (0 MB)
   22 12:06:47.161887  progress   5 % (0 MB)
   23 12:06:47.163293  progress  10 % (0 MB)
   24 12:06:47.164758  progress  15 % (0 MB)
   25 12:06:47.166350  progress  20 % (1 MB)
   26 12:06:47.167925  progress  25 % (1 MB)
   27 12:06:47.169311  progress  30 % (1 MB)
   28 12:06:47.170849  progress  35 % (1 MB)
   29 12:06:47.172264  progress  40 % (2 MB)
   30 12:06:47.173639  progress  45 % (2 MB)
   31 12:06:47.175022  progress  50 % (2 MB)
   32 12:06:47.176650  progress  55 % (2 MB)
   33 12:06:47.178080  progress  60 % (3 MB)
   34 12:06:47.179498  progress  65 % (3 MB)
   35 12:06:47.181089  progress  70 % (3 MB)
   36 12:06:47.182457  progress  75 % (3 MB)
   37 12:06:47.183862  progress  80 % (4 MB)
   38 12:06:47.185230  progress  85 % (4 MB)
   39 12:06:47.186816  progress  90 % (4 MB)
   40 12:06:47.188268  progress  95 % (4 MB)
   41 12:06:47.189653  progress 100 % (5 MB)
   42 12:06:47.189857  5 MB downloaded in 1.71 s (3.02 MB/s)
   43 12:06:47.190082  end: 1.1.1 http-download (duration 00:00:02) [common]
   45 12:06:47.190320  end: 1.1 download-retry (duration 00:00:02) [common]
   46 12:06:47.190404  start: 1.2 download-retry (timeout 00:09:58) [common]
   47 12:06:47.190486  start: 1.2.1 http-download (timeout 00:09:58) [common]
   48 12:06:47.190624  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.201-cip41-28-g38e219eb6aa85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:06:47.190694  saving as /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/kernel/bzImage
   50 12:06:47.190752  total size: 14129248 (13 MB)
   51 12:06:47.190811  No compression specified
   52 12:06:47.458353  progress   0 % (0 MB)
   53 12:06:47.479965  progress   5 % (0 MB)
   54 12:06:47.497168  progress  10 % (1 MB)
   55 12:06:47.505881  progress  15 % (2 MB)
   56 12:06:47.512659  progress  20 % (2 MB)
   57 12:06:47.518139  progress  25 % (3 MB)
   58 12:06:47.523266  progress  30 % (4 MB)
   59 12:06:47.527636  progress  35 % (4 MB)
   60 12:06:47.531817  progress  40 % (5 MB)
   61 12:06:47.535736  progress  45 % (6 MB)
   62 12:06:47.539362  progress  50 % (6 MB)
   63 12:06:47.543141  progress  55 % (7 MB)
   64 12:06:47.546763  progress  60 % (8 MB)
   65 12:06:47.550611  progress  65 % (8 MB)
   66 12:06:47.554274  progress  70 % (9 MB)
   67 12:06:47.558051  progress  75 % (10 MB)
   68 12:06:47.561653  progress  80 % (10 MB)
   69 12:06:47.565371  progress  85 % (11 MB)
   70 12:06:47.569082  progress  90 % (12 MB)
   71 12:06:47.572640  progress  95 % (12 MB)
   72 12:06:47.576359  progress 100 % (13 MB)
   73 12:06:47.576486  13 MB downloaded in 0.39 s (34.93 MB/s)
   74 12:06:47.576639  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:06:47.576869  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:06:47.576958  start: 1.3 download-retry (timeout 00:09:58) [common]
   78 12:06:47.577045  start: 1.3.1 http-download (timeout 00:09:58) [common]
   79 12:06:47.577186  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 12:06:47.577254  saving as /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/nfsrootfs/full.rootfs.tar
   81 12:06:47.577314  total size: 133380384 (127 MB)
   82 12:06:47.577374  Using unxz to decompress xz
   83 12:06:47.581717  progress   0 % (0 MB)
   84 12:06:47.919748  progress   5 % (6 MB)
   85 12:06:48.268988  progress  10 % (12 MB)
   86 12:06:48.555832  progress  15 % (19 MB)
   87 12:06:48.739732  progress  20 % (25 MB)
   88 12:06:48.984218  progress  25 % (31 MB)
   89 12:06:49.335214  progress  30 % (38 MB)
   90 12:06:49.688897  progress  35 % (44 MB)
   91 12:06:50.102647  progress  40 % (50 MB)
   92 12:06:50.500384  progress  45 % (57 MB)
   93 12:06:50.865541  progress  50 % (63 MB)
   94 12:06:51.244920  progress  55 % (69 MB)
   95 12:06:51.610542  progress  60 % (76 MB)
   96 12:06:51.970651  progress  65 % (82 MB)
   97 12:06:52.342150  progress  70 % (89 MB)
   98 12:06:52.715308  progress  75 % (95 MB)
   99 12:06:53.163072  progress  80 % (101 MB)
  100 12:06:53.608320  progress  85 % (108 MB)
  101 12:06:53.881357  progress  90 % (114 MB)
  102 12:06:54.244757  progress  95 % (120 MB)
  103 12:06:54.635227  progress 100 % (127 MB)
  104 12:06:54.640665  127 MB downloaded in 7.06 s (18.01 MB/s)
  105 12:06:54.640911  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 12:06:54.641167  end: 1.3 download-retry (duration 00:00:07) [common]
  108 12:06:54.641254  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 12:06:54.641361  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 12:06:54.641526  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.201-cip41-28-g38e219eb6aa85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:06:54.641592  saving as /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/modules/modules.tar
  112 12:06:54.641650  total size: 528036 (0 MB)
  113 12:06:54.641709  Using unxz to decompress xz
  114 12:06:54.645771  progress   6 % (0 MB)
  115 12:06:54.646159  progress  12 % (0 MB)
  116 12:06:54.646391  progress  18 % (0 MB)
  117 12:06:54.647939  progress  24 % (0 MB)
  118 12:06:54.649846  progress  31 % (0 MB)
  119 12:06:54.651846  progress  37 % (0 MB)
  120 12:06:54.653825  progress  43 % (0 MB)
  121 12:06:54.655752  progress  49 % (0 MB)
  122 12:06:54.657666  progress  55 % (0 MB)
  123 12:06:54.659532  progress  62 % (0 MB)
  124 12:06:54.661505  progress  68 % (0 MB)
  125 12:06:54.663447  progress  74 % (0 MB)
  126 12:06:54.665421  progress  80 % (0 MB)
  127 12:06:54.667554  progress  86 % (0 MB)
  128 12:06:54.669306  progress  93 % (0 MB)
  129 12:06:54.671169  progress  99 % (0 MB)
  130 12:06:54.678417  0 MB downloaded in 0.04 s (13.70 MB/s)
  131 12:06:54.678652  end: 1.4.1 http-download (duration 00:00:00) [common]
  133 12:06:54.678902  end: 1.4 download-retry (duration 00:00:00) [common]
  134 12:06:54.678994  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  135 12:06:54.679091  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  136 12:06:56.790257  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12207102/extract-nfsrootfs-2he3cwg9
  137 12:06:56.790457  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  138 12:06:56.790556  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  139 12:06:56.790713  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j
  140 12:06:56.790841  makedir: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin
  141 12:06:56.790940  makedir: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/tests
  142 12:06:56.791037  makedir: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/results
  143 12:06:56.791135  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-add-keys
  144 12:06:56.791282  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-add-sources
  145 12:06:56.791494  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-background-process-start
  146 12:06:56.791622  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-background-process-stop
  147 12:06:56.791747  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-common-functions
  148 12:06:56.791871  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-echo-ipv4
  149 12:06:56.791996  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-install-packages
  150 12:06:56.792118  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-installed-packages
  151 12:06:56.792240  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-os-build
  152 12:06:56.792362  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-probe-channel
  153 12:06:56.792484  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-probe-ip
  154 12:06:56.792608  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-target-ip
  155 12:06:56.792731  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-target-mac
  156 12:06:56.792853  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-target-storage
  157 12:06:56.792980  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-case
  158 12:06:56.793104  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-event
  159 12:06:56.793226  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-feedback
  160 12:06:56.793363  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-raise
  161 12:06:56.793510  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-reference
  162 12:06:56.793664  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-runner
  163 12:06:56.793793  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-set
  164 12:06:56.793918  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-test-shell
  165 12:06:56.794044  Updating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-install-packages (oe)
  166 12:06:56.794195  Updating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/bin/lava-installed-packages (oe)
  167 12:06:56.794315  Creating /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/environment
  168 12:06:56.794408  LAVA metadata
  169 12:06:56.794476  - LAVA_JOB_ID=12207102
  170 12:06:56.794538  - LAVA_DISPATCHER_IP=192.168.201.1
  171 12:06:56.794635  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  172 12:06:56.794700  skipped lava-vland-overlay
  173 12:06:56.794772  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  174 12:06:56.794848  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  175 12:06:56.794905  skipped lava-multinode-overlay
  176 12:06:56.794974  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  177 12:06:56.795048  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  178 12:06:56.795117  Loading test definitions
  179 12:06:56.795203  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  180 12:06:56.795269  Using /lava-12207102 at stage 0
  181 12:06:56.795613  uuid=12207102_1.5.2.3.1 testdef=None
  182 12:06:56.795699  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  183 12:06:56.795780  start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
  184 12:06:56.796263  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  186 12:06:56.796479  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  187 12:06:56.797100  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  189 12:06:56.797318  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  190 12:06:56.797920  runner path: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/0/tests/0_dmesg test_uuid 12207102_1.5.2.3.1
  191 12:06:56.798072  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  193 12:06:56.798289  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
  194 12:06:56.798357  Using /lava-12207102 at stage 1
  195 12:06:56.798644  uuid=12207102_1.5.2.3.5 testdef=None
  196 12:06:56.798728  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  197 12:06:56.798807  start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
  198 12:06:56.799262  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  200 12:06:56.799790  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
  201 12:06:56.800419  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  203 12:06:56.800637  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
  204 12:06:56.801264  runner path: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/1/tests/1_bootrr test_uuid 12207102_1.5.2.3.5
  205 12:06:56.801414  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 12:06:56.801610  Creating lava-test-runner.conf files
  208 12:06:56.801671  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/0 for stage 0
  209 12:06:56.801760  - 0_dmesg
  210 12:06:56.801837  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12207102/lava-overlay-xlrxqk1j/lava-12207102/1 for stage 1
  211 12:06:56.801926  - 1_bootrr
  212 12:06:56.802019  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  213 12:06:56.802100  start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
  214 12:06:56.809300  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  215 12:06:56.809400  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
  216 12:06:56.809482  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  217 12:06:56.809568  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  218 12:06:56.809649  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
  219 12:06:56.942778  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  220 12:06:56.943154  start: 1.5.4 extract-modules (timeout 00:09:49) [common]
  221 12:06:56.943272  extracting modules file /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12207102/extract-nfsrootfs-2he3cwg9
  222 12:06:56.967403  extracting modules file /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12207102/extract-overlay-ramdisk-lg898l8q/ramdisk
  223 12:06:56.991454  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  224 12:06:56.991593  start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
  225 12:06:56.991678  [common] Applying overlay to NFS
  226 12:06:56.991744  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12207102/compress-overlay-7_7f51dx/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12207102/extract-nfsrootfs-2he3cwg9
  227 12:06:56.999702  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  228 12:06:56.999820  start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
  229 12:06:56.999905  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  230 12:06:56.999995  start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
  231 12:06:57.000071  Building ramdisk /var/lib/lava/dispatcher/tmp/12207102/extract-overlay-ramdisk-lg898l8q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12207102/extract-overlay-ramdisk-lg898l8q/ramdisk
  232 12:06:57.077283  >> 30521 blocks

  233 12:06:57.665608  rename /var/lib/lava/dispatcher/tmp/12207102/extract-overlay-ramdisk-lg898l8q/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/ramdisk/ramdisk.cpio.gz
  234 12:06:57.666044  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  235 12:06:57.666167  start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
  236 12:06:57.666292  start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
  237 12:06:57.666412  No mkimage arch provided, not using FIT.
  238 12:06:57.666503  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  239 12:06:57.666584  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  240 12:06:57.666685  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  241 12:06:57.666768  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
  242 12:06:57.666840  No LXC device requested
  243 12:06:57.666916  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  244 12:06:57.667001  start: 1.7 deploy-device-env (timeout 00:09:48) [common]
  245 12:06:57.667078  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  246 12:06:57.667149  Checking files for TFTP limit of 4294967296 bytes.
  247 12:06:57.667604  end: 1 tftp-deploy (duration 00:00:12) [common]
  248 12:06:57.667714  start: 2 depthcharge-action (timeout 00:05:00) [common]
  249 12:06:57.667806  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  250 12:06:57.667930  substitutions:
  251 12:06:57.667995  - {DTB}: None
  252 12:06:57.668058  - {INITRD}: 12207102/tftp-deploy-1f0_5gpc/ramdisk/ramdisk.cpio.gz
  253 12:06:57.668116  - {KERNEL}: 12207102/tftp-deploy-1f0_5gpc/kernel/bzImage
  254 12:06:57.668172  - {LAVA_MAC}: None
  255 12:06:57.668228  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12207102/extract-nfsrootfs-2he3cwg9
  256 12:06:57.668282  - {NFS_SERVER_IP}: 192.168.201.1
  257 12:06:57.668365  - {PRESEED_CONFIG}: None
  258 12:06:57.668434  - {PRESEED_LOCAL}: None
  259 12:06:57.668500  - {RAMDISK}: 12207102/tftp-deploy-1f0_5gpc/ramdisk/ramdisk.cpio.gz
  260 12:06:57.668553  - {ROOT_PART}: None
  261 12:06:57.668604  - {ROOT}: None
  262 12:06:57.668657  - {SERVER_IP}: 192.168.201.1
  263 12:06:57.668709  - {TEE}: None
  264 12:06:57.668761  Parsed boot commands:
  265 12:06:57.668813  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  266 12:06:57.668988  Parsed boot commands: tftpboot 192.168.201.1 12207102/tftp-deploy-1f0_5gpc/kernel/bzImage 12207102/tftp-deploy-1f0_5gpc/kernel/cmdline 12207102/tftp-deploy-1f0_5gpc/ramdisk/ramdisk.cpio.gz
  267 12:06:57.669074  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  268 12:06:57.669156  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  269 12:06:57.669246  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  270 12:06:57.669329  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  271 12:06:57.669399  Not connected, no need to disconnect.
  272 12:06:57.669470  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  273 12:06:57.669549  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  274 12:06:57.669612  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
  275 12:06:57.673560  Setting prompt string to ['lava-test: # ']
  276 12:06:57.673905  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  277 12:06:57.674005  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  278 12:06:57.674103  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  279 12:06:57.674234  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  280 12:06:57.674467  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
  281 12:07:02.826302  >> Command sent successfully.

  282 12:07:02.837550  Returned 0 in 5 seconds
  283 12:07:02.938769  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  285 12:07:02.940358  end: 2.2.2 reset-device (duration 00:00:05) [common]
  286 12:07:02.940893  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  287 12:07:02.941370  Setting prompt string to 'Starting depthcharge on Volmar...'
  288 12:07:02.941933  Changing prompt to 'Starting depthcharge on Volmar...'
  289 12:07:02.942385  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  290 12:07:02.943826  [Enter `^Ec?' for help]

  291 12:07:04.305160  

  292 12:07:04.305765  

  293 12:07:04.312727  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  294 12:07:04.316523  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  295 12:07:04.320122  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  296 12:07:04.328192  CPU: AES supported, TXT NOT supported, VT supported

  297 12:07:04.335756  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  298 12:07:04.336528  Cache size = 10 MiB

  299 12:07:04.339332  MCH: device id 4609 (rev 04) is Alderlake-P

  300 12:07:04.346736  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  301 12:07:04.350039  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  302 12:07:04.353953  VBOOT: Loading verstage.

  303 12:07:04.357693  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  304 12:07:04.360965  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  305 12:07:04.367897  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  306 12:07:04.374544  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  307 12:07:04.384649  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  308 12:07:04.385215  

  309 12:07:04.385578  

  310 12:07:04.394312  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  311 12:07:04.398644  Probing TPM I2C: I2C bus 1 version 0x3230302a

  312 12:07:04.401769  DW I2C bus 1 at 0xfe022000 (400 KHz)

  313 12:07:04.405433  I2C TX abort detected (00000001)

  314 12:07:04.408651  cr50_i2c_read: Address write failed

  315 12:07:04.421569  .done! DID_VID 0x00281ae0

  316 12:07:04.424614  TPM ready after 0 ms

  317 12:07:04.427724  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  318 12:07:04.441769  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  319 12:07:04.448601  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  320 12:07:04.506723  tlcl_send_startup: Startup return code is 0

  321 12:07:04.507305  TPM: setup succeeded

  322 12:07:04.526851  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  323 12:07:04.548388  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  324 12:07:04.552195  Chrome EC: UHEPI supported

  325 12:07:04.556050  Reading cr50 boot mode

  326 12:07:04.568251  Cr50 says boot_mode is VERIFIED_RW(0x00).

  327 12:07:04.571143  Phase 1

  328 12:07:04.574687  FMAP: area GBB found @ 1805000 (458752 bytes)

  329 12:07:04.581701  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  330 12:07:04.592026  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  331 12:07:04.598515  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  332 12:07:04.599095  Phase 2

  333 12:07:04.599630  Phase 3

  334 12:07:04.604973  FMAP: area GBB found @ 1805000 (458752 bytes)

  335 12:07:04.608318  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  336 12:07:04.614995  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  337 12:07:04.622369  VB2:vb2_verify_keyblock() Checking keyblock signature...

  338 12:07:04.629212  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  339 12:07:04.636643  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  340 12:07:04.643377  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  341 12:07:04.655729  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  342 12:07:04.659446  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  343 12:07:04.665728  VB2:vb2_verify_fw_preamble() Verifying preamble.

  344 12:07:04.672315  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  345 12:07:04.678911  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  346 12:07:04.686037  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  347 12:07:04.689286  Phase 4

  348 12:07:04.692516  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  349 12:07:04.699174  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  350 12:07:04.912125  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  351 12:07:04.918646  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  352 12:07:04.921958  Saving vboot hash.

  353 12:07:04.929112  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  354 12:07:04.944525  tlcl_extend: response is 0

  355 12:07:04.950743  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  356 12:07:04.957494  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  357 12:07:04.972248  tlcl_extend: response is 0

  358 12:07:04.979239  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  359 12:07:04.998728  tlcl_lock_nv_write: response is 0

  360 12:07:05.017064  tlcl_lock_nv_write: response is 0

  361 12:07:05.017647  Slot A is selected

  362 12:07:05.023543  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  363 12:07:05.029859  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  364 12:07:05.036953  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  365 12:07:05.043223  BS: verstage times (exec / console): total (unknown) / 264 ms

  366 12:07:05.043858  

  367 12:07:05.044268  

  368 12:07:05.050078  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  369 12:07:05.053710  Google Chrome EC: version:

  370 12:07:05.057134  	ro: volmar_v2.0.14126-e605144e9c

  371 12:07:05.060317  	rw: volmar_v0.0.55-22d1557

  372 12:07:05.063998    running image: 2

  373 12:07:05.066751  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  374 12:07:05.077013  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  375 12:07:05.083960  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  376 12:07:05.090496  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  377 12:07:05.100525  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  378 12:07:05.110666  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  379 12:07:05.113882  EC took 966us to calculate image hash

  380 12:07:05.123619  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  381 12:07:05.126806  VB2:sync_ec() select_rw=RW(active)

  382 12:07:05.139867  Waited 1529us to clear limit power flag.

  383 12:07:05.143151  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  384 12:07:05.146360  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  385 12:07:05.149263  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  386 12:07:05.156609  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  387 12:07:05.159398  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  388 12:07:05.163276  TCO_STS:   0000 0000

  389 12:07:05.166000  GEN_PMCON: d0015038 00002200

  390 12:07:05.169702  GBLRST_CAUSE: 00000000 00000000

  391 12:07:05.170180  HPR_CAUSE0: 00000000

  392 12:07:05.172617  prev_sleep_state 5

  393 12:07:05.176518  Abort disabling TXT, as CPU is not TXT capable.

  394 12:07:05.184111  cse_lite: Number of partitions = 3

  395 12:07:05.187516  cse_lite: Current partition = RO

  396 12:07:05.188035  cse_lite: Next partition = RO

  397 12:07:05.190712  cse_lite: Flags = 0x7

  398 12:07:05.197086  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  399 12:07:05.207726  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  400 12:07:05.210839  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  401 12:07:05.217272  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  402 12:07:05.223959  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  403 12:07:05.230764  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  404 12:07:05.234375  cse_lite: CSE CBFS RW version : 16.1.25.2049

  405 12:07:05.240617  cse_lite: Set Boot Partition Info Command (RW)

  406 12:07:05.243983  HECI: Global Reset(Type:1) Command

  407 12:07:06.666060  d�ntel(R) Core(TM) i3-1215U

  408 12:07:06.672306  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  409 12:07:06.675534  CPU: AES supported, TXT NOT supported, VT supported

  410 12:07:06.685814  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  411 12:07:06.686337  Cache size = 10 MiB

  412 12:07:06.692229  MCH: device id 4609 (rev 04) is Alderlake-P

  413 12:07:06.695550  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  414 12:07:06.702422  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  415 12:07:06.706324  VBOOT: Loading verstage.

  416 12:07:06.709727  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  417 12:07:06.712858  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  418 12:07:06.720807  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  419 12:07:06.727451  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  420 12:07:06.733970  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  421 12:07:06.734532  

  422 12:07:06.737330  

  423 12:07:06.743728  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  424 12:07:06.750463  Probing TPM I2C: I2C bus 1 version 0x3230302a

  425 12:07:06.753403  DW I2C bus 1 at 0xfe022000 (400 KHz)

  426 12:07:06.756885  done! DID_VID 0x00281ae0

  427 12:07:06.760861  TPM ready after 0 ms

  428 12:07:06.764379  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  429 12:07:06.773174  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  430 12:07:06.780536  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  431 12:07:06.841602  tlcl_send_startup: Startup return code is 0

  432 12:07:06.842139  TPM: setup succeeded

  433 12:07:06.861864  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  434 12:07:06.883812  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  435 12:07:06.887631  Chrome EC: UHEPI supported

  436 12:07:06.891059  Reading cr50 boot mode

  437 12:07:06.906082  Cr50 says boot_mode is VERIFIED_RW(0x00).

  438 12:07:06.906660  Phase 1

  439 12:07:06.912587  FMAP: area GBB found @ 1805000 (458752 bytes)

  440 12:07:06.919399  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  441 12:07:06.926237  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  442 12:07:06.932580  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  443 12:07:06.933053  Phase 2

  444 12:07:06.936243  Phase 3

  445 12:07:06.939643  FMAP: area GBB found @ 1805000 (458752 bytes)

  446 12:07:06.946063  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  447 12:07:06.949369  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  448 12:07:06.956130  VB2:vb2_verify_keyblock() Checking keyblock signature...

  449 12:07:06.962548  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  450 12:07:06.969456  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  451 12:07:06.979026  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  452 12:07:06.991742  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  453 12:07:06.994495  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  454 12:07:07.001096  VB2:vb2_verify_fw_preamble() Verifying preamble.

  455 12:07:07.007494  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  456 12:07:07.014559  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  457 12:07:07.020812  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  458 12:07:07.025376  Phase 4

  459 12:07:07.028623  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  460 12:07:07.035156  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  461 12:07:07.247730  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  462 12:07:07.254414  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  463 12:07:07.257955  Saving vboot hash.

  464 12:07:07.264238  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  465 12:07:07.280252  tlcl_extend: response is 0

  466 12:07:07.287324  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  467 12:07:07.293373  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  468 12:07:07.307867  tlcl_extend: response is 0

  469 12:07:07.314495  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  470 12:07:07.332949  tlcl_lock_nv_write: response is 0

  471 12:07:07.350712  tlcl_lock_nv_write: response is 0

  472 12:07:07.351293  Slot A is selected

  473 12:07:07.357325  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  474 12:07:07.364312  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  475 12:07:07.370379  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  476 12:07:07.377611  BS: verstage times (exec / console): total (unknown) / 256 ms

  477 12:07:07.378196  

  478 12:07:07.378688  

  479 12:07:07.383811  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  480 12:07:07.388279  Google Chrome EC: version:

  481 12:07:07.391336  	ro: volmar_v2.0.14126-e605144e9c

  482 12:07:07.394802  	rw: volmar_v0.0.55-22d1557

  483 12:07:07.397871    running image: 2

  484 12:07:07.401362  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  485 12:07:07.411137  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  486 12:07:07.418190  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  487 12:07:07.425291  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  488 12:07:07.434674  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  489 12:07:07.445038  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  490 12:07:07.448114  EC took 1418us to calculate image hash

  491 12:07:07.458647  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  492 12:07:07.461942  VB2:sync_ec() select_rw=RW(active)

  493 12:07:07.475667  Waited 304us to clear limit power flag.

  494 12:07:07.479271  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  495 12:07:07.482699  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  496 12:07:07.486191  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  497 12:07:07.492625  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  498 12:07:07.496007  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  499 12:07:07.498920  TCO_STS:   0000 0000

  500 12:07:07.502371  GEN_PMCON: d1001038 00002200

  501 12:07:07.505834  GBLRST_CAUSE: 00000040 00000000

  502 12:07:07.506392  HPR_CAUSE0: 00000000

  503 12:07:07.509138  prev_sleep_state 5

  504 12:07:07.512263  Abort disabling TXT, as CPU is not TXT capable.

  505 12:07:07.520231  cse_lite: Number of partitions = 3

  506 12:07:07.523265  cse_lite: Current partition = RW

  507 12:07:07.523867  cse_lite: Next partition = RW

  508 12:07:07.526468  cse_lite: Flags = 0x7

  509 12:07:07.533403  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  510 12:07:07.543182  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  511 12:07:07.546912  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  512 12:07:07.553177  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  513 12:07:07.559880  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  514 12:07:07.566714  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  515 12:07:07.570314  cse_lite: CSE CBFS RW version : 16.1.25.2049

  516 12:07:07.573192  Boot Count incremented to 4005

  517 12:07:07.579946  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  518 12:07:07.586804  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  519 12:07:07.599673  Probing TPM I2C: done! DID_VID 0x00281ae0

  520 12:07:07.603191  Locality already claimed

  521 12:07:07.606291  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  522 12:07:07.625348  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  523 12:07:07.631919  MRC: Hash idx 0x100d comparison successful.

  524 12:07:07.635307  MRC cache found, size f6c8

  525 12:07:07.635829  bootmode is set to: 2

  526 12:07:07.639327  EC returned error result code 3

  527 12:07:07.642521  FW_CONFIG value from CBI is 0x131

  528 12:07:07.649137  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  529 12:07:07.652444  SPD index = 0

  530 12:07:07.659387  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  531 12:07:07.659859  SPD: module type is LPDDR4X

  532 12:07:07.665784  SPD: module part number is K4U6E3S4AB-MGCL

  533 12:07:07.672466  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  534 12:07:07.675535  SPD: device width 16 bits, bus width 16 bits

  535 12:07:07.679075  SPD: module size is 1024 MB (per channel)

  536 12:07:07.748166  CBMEM:

  537 12:07:07.751980  IMD: root @ 0x76fff000 254 entries.

  538 12:07:07.754837  IMD: root @ 0x76ffec00 62 entries.

  539 12:07:07.762631  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  540 12:07:07.766197  RO_VPD is uninitialized or empty.

  541 12:07:07.769984  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  542 12:07:07.776042  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  543 12:07:07.779708  External stage cache:

  544 12:07:07.783191  IMD: root @ 0x7bbff000 254 entries.

  545 12:07:07.786221  IMD: root @ 0x7bbfec00 62 entries.

  546 12:07:07.792378  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  547 12:07:07.799619  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  548 12:07:07.802865  MRC: 'RW_MRC_CACHE' does not need update.

  549 12:07:07.803481  8 DIMMs found

  550 12:07:07.806138  SMM Memory Map

  551 12:07:07.809223  SMRAM       : 0x7b800000 0x800000

  552 12:07:07.812951   Subregion 0: 0x7b800000 0x200000

  553 12:07:07.816232   Subregion 1: 0x7ba00000 0x200000

  554 12:07:07.819707   Subregion 2: 0x7bc00000 0x400000

  555 12:07:07.823036  top_of_ram = 0x77000000

  556 12:07:07.826463  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  557 12:07:07.833193  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  558 12:07:07.839645  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  559 12:07:07.842749  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  560 12:07:07.843327  Normal boot

  561 12:07:07.852777  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  562 12:07:07.859152  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  563 12:07:07.866059  Processing 237 relocs. Offset value of 0x74ab9000

  564 12:07:07.874037  BS: romstage times (exec / console): total (unknown) / 377 ms

  565 12:07:07.880943  

  566 12:07:07.881414  

  567 12:07:07.887814  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  568 12:07:07.888463  Normal boot

  569 12:07:07.894833  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  570 12:07:07.901204  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  571 12:07:07.907903  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  572 12:07:07.918230  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  573 12:07:07.965751  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  574 12:07:07.972176  Processing 5931 relocs. Offset value of 0x72a2f000

  575 12:07:07.975392  BS: postcar times (exec / console): total (unknown) / 51 ms

  576 12:07:07.979048  

  577 12:07:07.979668  

  578 12:07:07.986270  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  579 12:07:07.989118  Reserving BERT start 76a1e000, size 10000

  580 12:07:07.992525  Normal boot

  581 12:07:07.995312  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  582 12:07:08.002041  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  583 12:07:08.012392  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  584 12:07:08.015427  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  585 12:07:08.019294  Google Chrome EC: version:

  586 12:07:08.022332  	ro: volmar_v2.0.14126-e605144e9c

  587 12:07:08.025763  	rw: volmar_v0.0.55-22d1557

  588 12:07:08.028840    running image: 2

  589 12:07:08.032117  ACPI _SWS is PM1 Index 8 GPE Index -1

  590 12:07:08.035227  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  591 12:07:08.040788  EC returned error result code 3

  592 12:07:08.044194  FW_CONFIG value from CBI is 0x131

  593 12:07:08.050661  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  594 12:07:08.054177  PCI: 00:1c.2 disabled by fw_config

  595 12:07:08.060460  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  596 12:07:08.064084  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  597 12:07:08.070938  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  598 12:07:08.073960  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  599 12:07:08.080780  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  600 12:07:08.087464  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  601 12:07:08.093885  microcode: sig=0x906a4 pf=0x80 revision=0x423

  602 12:07:08.097231  microcode: Update skipped, already up-to-date

  603 12:07:08.103759  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  604 12:07:08.136074  Detected 6 core, 8 thread CPU.

  605 12:07:08.139260  Setting up SMI for CPU

  606 12:07:08.143074  IED base = 0x7bc00000

  607 12:07:08.143703  IED size = 0x00400000

  608 12:07:08.146589  Will perform SMM setup.

  609 12:07:08.149002  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  610 12:07:08.152814  LAPIC 0x0 in XAPIC mode.

  611 12:07:08.162472  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  612 12:07:08.166214  Processing 18 relocs. Offset value of 0x00030000

  613 12:07:08.170687  Attempting to start 7 APs

  614 12:07:08.174067  Waiting for 10ms after sending INIT.

  615 12:07:08.186919  Waiting for SIPI to complete...

  616 12:07:08.190193  LAPIC 0x1 in XAPIC mode.

  617 12:07:08.193538  LAPIC 0x14 in XAPIC mode.

  618 12:07:08.197301  LAPIC 0x10 in XAPIC mode.

  619 12:07:08.200207  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  620 12:07:08.203582  AP: slot 4 apic_id 14, MCU rev: 0x00000423

  621 12:07:08.210576  AP: slot 2 apic_id 10, MCU rev: 0x00000423

  622 12:07:08.211139  done.

  623 12:07:08.213318  LAPIC 0x16 in XAPIC mode.

  624 12:07:08.213882  LAPIC 0x8 in XAPIC mode.

  625 12:07:08.217261  LAPIC 0x9 in XAPIC mode.

  626 12:07:08.220020  LAPIC 0x12 in XAPIC mode.

  627 12:07:08.223709  AP: slot 1 apic_id 16, MCU rev: 0x00000423

  628 12:07:08.230026  AP: slot 3 apic_id 12, MCU rev: 0x00000423

  629 12:07:08.233801  AP: slot 6 apic_id 8, MCU rev: 0x00000423

  630 12:07:08.236509  AP: slot 7 apic_id 9, MCU rev: 0x00000423

  631 12:07:08.239806  Waiting for SIPI to complete...

  632 12:07:08.240606  done.

  633 12:07:08.243335  smm_setup_relocation_handler: enter

  634 12:07:08.246922  smm_setup_relocation_handler: exit

  635 12:07:08.256317  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  636 12:07:08.259872  Processing 11 relocs. Offset value of 0x00038000

  637 12:07:08.266750  smm_module_setup_stub: stack_top = 0x7b804000

  638 12:07:08.270127  smm_module_setup_stub: per cpu stack_size = 0x800

  639 12:07:08.277079  smm_module_setup_stub: runtime.start32_offset = 0x4c

  640 12:07:08.279702  smm_module_setup_stub: runtime.smm_size = 0x10000

  641 12:07:08.286766  SMM Module: stub loaded at 38000. Will call 0x76a52094

  642 12:07:08.289698  Installing permanent SMM handler to 0x7b800000

  643 12:07:08.296643  smm_load_module: total_smm_space_needed e468, available -> 200000

  644 12:07:08.306301  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  645 12:07:08.310379  Processing 255 relocs. Offset value of 0x7b9f6000

  646 12:07:08.316499  smm_load_module: smram_start: 0x7b800000

  647 12:07:08.319835  smm_load_module: smram_end: 7ba00000

  648 12:07:08.322822  smm_load_module: handler start 0x7b9f6d5f

  649 12:07:08.325834  smm_load_module: handler_size 98d0

  650 12:07:08.329621  smm_load_module: fxsave_area 0x7b9ff000

  651 12:07:08.333116  smm_load_module: fxsave_size 1000

  652 12:07:08.336376  smm_load_module: CONFIG_MSEG_SIZE 0x0

  653 12:07:08.342657  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  654 12:07:08.349058  smm_load_module: handler_mod_params.smbase = 0x7b800000

  655 12:07:08.352816  smm_load_module: per_cpu_save_state_size = 0x400

  656 12:07:08.356081  smm_load_module: num_cpus = 0x8

  657 12:07:08.363075  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  658 12:07:08.365943  smm_load_module: total_save_state_size = 0x2000

  659 12:07:08.372466  smm_load_module: cpu0 entry: 7b9e6000

  660 12:07:08.376084  smm_create_map: cpus allowed in one segment 30

  661 12:07:08.379119  smm_create_map: min # of segments needed 1

  662 12:07:08.383050  CPU 0x0

  663 12:07:08.385866      smbase 7b9e6000  entry 7b9ee000

  664 12:07:08.388878             ss_start 7b9f5c00  code_end 7b9ee208

  665 12:07:08.389348  CPU 0x1

  666 12:07:08.392777      smbase 7b9e5c00  entry 7b9edc00

  667 12:07:08.398848             ss_start 7b9f5800  code_end 7b9ede08

  668 12:07:08.399449  CPU 0x2

  669 12:07:08.403014      smbase 7b9e5800  entry 7b9ed800

  670 12:07:08.408965             ss_start 7b9f5400  code_end 7b9eda08

  671 12:07:08.409550  CPU 0x3

  672 12:07:08.412340      smbase 7b9e5400  entry 7b9ed400

  673 12:07:08.415640             ss_start 7b9f5000  code_end 7b9ed608

  674 12:07:08.419190  CPU 0x4

  675 12:07:08.422434      smbase 7b9e5000  entry 7b9ed000

  676 12:07:08.425668             ss_start 7b9f4c00  code_end 7b9ed208

  677 12:07:08.428822  CPU 0x5

  678 12:07:08.432236      smbase 7b9e4c00  entry 7b9ecc00

  679 12:07:08.435929             ss_start 7b9f4800  code_end 7b9ece08

  680 12:07:08.436530  CPU 0x6

  681 12:07:08.438944      smbase 7b9e4800  entry 7b9ec800

  682 12:07:08.445220             ss_start 7b9f4400  code_end 7b9eca08

  683 12:07:08.445694  CPU 0x7

  684 12:07:08.448646      smbase 7b9e4400  entry 7b9ec400

  685 12:07:08.455521             ss_start 7b9f4000  code_end 7b9ec608

  686 12:07:08.461886  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  687 12:07:08.468874  Processing 11 relocs. Offset value of 0x7b9ee000

  688 12:07:08.472010  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  689 12:07:08.479230  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  690 12:07:08.485587  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  691 12:07:08.492900  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  692 12:07:08.499041  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  693 12:07:08.505651  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  694 12:07:08.512138  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  695 12:07:08.515753  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  696 12:07:08.521970  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  697 12:07:08.528798  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  698 12:07:08.535165  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  699 12:07:08.541794  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  700 12:07:08.548339  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  701 12:07:08.555179  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  702 12:07:08.561684  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  703 12:07:08.565540  smm_module_setup_stub: stack_top = 0x7b804000

  704 12:07:08.571614  smm_module_setup_stub: per cpu stack_size = 0x800

  705 12:07:08.575478  smm_module_setup_stub: runtime.start32_offset = 0x4c

  706 12:07:08.581684  smm_module_setup_stub: runtime.smm_size = 0x200000

  707 12:07:08.588343  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  708 12:07:08.591726  Clearing SMI status registers

  709 12:07:08.594976  SMI_STS: PM1 

  710 12:07:08.595587  PM1_STS: WAK PWRBTN 

  711 12:07:08.601800  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  712 12:07:08.604983  In relocation handler: CPU 0

  713 12:07:08.608405  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  714 12:07:08.615205  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  715 12:07:08.618504  Relocation complete.

  716 12:07:08.625262  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  717 12:07:08.628460  In relocation handler: CPU 5

  718 12:07:08.631936  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  719 12:07:08.632503  Relocation complete.

  720 12:07:08.641811  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  721 12:07:08.642376  In relocation handler: CPU 4

  722 12:07:08.648595  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  723 12:07:08.651952  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  724 12:07:08.655072  Relocation complete.

  725 12:07:08.662076  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  726 12:07:08.665135  In relocation handler: CPU 3

  727 12:07:08.668577  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  728 12:07:08.674973  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  729 12:07:08.675744  Relocation complete.

  730 12:07:08.681687  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  731 12:07:08.685772  In relocation handler: CPU 1

  732 12:07:08.688011  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  733 12:07:08.695295  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  734 12:07:08.698418  Relocation complete.

  735 12:07:08.705075  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  736 12:07:08.708462  In relocation handler: CPU 2

  737 12:07:08.712168  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  738 12:07:08.715106  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  739 12:07:08.718726  Relocation complete.

  740 12:07:08.725344  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  741 12:07:08.728431  In relocation handler: CPU 6

  742 12:07:08.731783  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  743 12:07:08.738607  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  744 12:07:08.739172  Relocation complete.

  745 12:07:08.744924  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  746 12:07:08.748384  In relocation handler: CPU 7

  747 12:07:08.754888  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  748 12:07:08.755401  Relocation complete.

  749 12:07:08.758271  Initializing CPU #0

  750 12:07:08.761447  CPU: vendor Intel device 906a4

  751 12:07:08.765231  CPU: family 06, model 9a, stepping 04

  752 12:07:08.768590  Clearing out pending MCEs

  753 12:07:08.772054  cpu: energy policy set to 7

  754 12:07:08.774919  Turbo is available but hidden

  755 12:07:08.775431  Turbo is available and visible

  756 12:07:08.782289  microcode: Update skipped, already up-to-date

  757 12:07:08.782857  CPU #0 initialized

  758 12:07:08.785668  Initializing CPU #5

  759 12:07:08.788662  Initializing CPU #1

  760 12:07:08.789243  Initializing CPU #4

  761 12:07:08.791690  Initializing CPU #3

  762 12:07:08.792157  Initializing CPU #7

  763 12:07:08.795246  Initializing CPU #2

  764 12:07:08.798662  CPU: vendor Intel device 906a4

  765 12:07:08.801848  CPU: family 06, model 9a, stepping 04

  766 12:07:08.805027  CPU: vendor Intel device 906a4

  767 12:07:08.808496  CPU: family 06, model 9a, stepping 04

  768 12:07:08.811575  CPU: vendor Intel device 906a4

  769 12:07:08.814727  CPU: family 06, model 9a, stepping 04

  770 12:07:08.818584  Clearing out pending MCEs

  771 12:07:08.821937  CPU: vendor Intel device 906a4

  772 12:07:08.825576  CPU: family 06, model 9a, stepping 04

  773 12:07:08.828922  Clearing out pending MCEs

  774 12:07:08.831504  Initializing CPU #6

  775 12:07:08.831975  cpu: energy policy set to 7

  776 12:07:08.835469  Clearing out pending MCEs

  777 12:07:08.838560  CPU: vendor Intel device 906a4

  778 12:07:08.842030  CPU: family 06, model 9a, stepping 04

  779 12:07:08.844956  Clearing out pending MCEs

  780 12:07:08.851731  microcode: Update skipped, already up-to-date

  781 12:07:08.852294  CPU #3 initialized

  782 12:07:08.855239  cpu: energy policy set to 7

  783 12:07:08.858277  cpu: energy policy set to 7

  784 12:07:08.861270  cpu: energy policy set to 7

  785 12:07:08.865255  microcode: Update skipped, already up-to-date

  786 12:07:08.868382  CPU #4 initialized

  787 12:07:08.871845  microcode: Update skipped, already up-to-date

  788 12:07:08.875093  CPU #2 initialized

  789 12:07:08.878224  microcode: Update skipped, already up-to-date

  790 12:07:08.881537  CPU #1 initialized

  791 12:07:08.882003  CPU: vendor Intel device 906a4

  792 12:07:08.888313  CPU: family 06, model 9a, stepping 04

  793 12:07:08.891480  CPU: vendor Intel device 906a4

  794 12:07:08.895192  CPU: family 06, model 9a, stepping 04

  795 12:07:08.898194  Clearing out pending MCEs

  796 12:07:08.898756  Clearing out pending MCEs

  797 12:07:08.901682  Clearing out pending MCEs

  798 12:07:08.905040  cpu: energy policy set to 7

  799 12:07:08.908343  cpu: energy policy set to 7

  800 12:07:08.911650  microcode: Update skipped, already up-to-date

  801 12:07:08.915123  CPU #6 initialized

  802 12:07:08.918303  cpu: energy policy set to 7

  803 12:07:08.921730  microcode: Update skipped, already up-to-date

  804 12:07:08.924519  CPU #7 initialized

  805 12:07:08.928321  microcode: Update skipped, already up-to-date

  806 12:07:08.931292  CPU #5 initialized

  807 12:07:08.935161  bsp_do_flight_plan done after 688 msecs.

  808 12:07:08.937875  CPU: frequency set to 4400 MHz

  809 12:07:08.938342  Enabling SMIs.

  810 12:07:08.944952  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms

  811 12:07:08.961723  Probing TPM I2C: done! DID_VID 0x00281ae0

  812 12:07:08.964622  Locality already claimed

  813 12:07:08.967911  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  814 12:07:08.979425  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  815 12:07:08.982983  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  816 12:07:08.989936  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  817 12:07:08.996337  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  818 12:07:08.999526  Found a VBT of 9216 bytes after decompression

  819 12:07:09.002849  PCI  1.0, PIN A, using IRQ #16

  820 12:07:09.006101  PCI  2.0, PIN A, using IRQ #17

  821 12:07:09.009083  PCI  4.0, PIN A, using IRQ #18

  822 12:07:09.012727  PCI  5.0, PIN A, using IRQ #16

  823 12:07:09.016275  PCI  6.0, PIN A, using IRQ #16

  824 12:07:09.019676  PCI  6.2, PIN C, using IRQ #18

  825 12:07:09.022511  PCI  7.0, PIN A, using IRQ #19

  826 12:07:09.026019  PCI  7.1, PIN B, using IRQ #20

  827 12:07:09.029292  PCI  7.2, PIN C, using IRQ #21

  828 12:07:09.032719  PCI  7.3, PIN D, using IRQ #22

  829 12:07:09.035939  PCI  8.0, PIN A, using IRQ #23

  830 12:07:09.039448  PCI  D.0, PIN A, using IRQ #17

  831 12:07:09.042529  PCI  D.1, PIN B, using IRQ #19

  832 12:07:09.043093  PCI 10.0, PIN A, using IRQ #24

  833 12:07:09.045848  PCI 10.1, PIN B, using IRQ #25

  834 12:07:09.049389  PCI 10.6, PIN C, using IRQ #20

  835 12:07:09.052510  PCI 10.7, PIN D, using IRQ #21

  836 12:07:09.056126  PCI 11.0, PIN A, using IRQ #26

  837 12:07:09.059500  PCI 11.1, PIN B, using IRQ #27

  838 12:07:09.062496  PCI 11.2, PIN C, using IRQ #28

  839 12:07:09.065953  PCI 11.3, PIN D, using IRQ #29

  840 12:07:09.069128  PCI 12.0, PIN A, using IRQ #30

  841 12:07:09.072624  PCI 12.6, PIN B, using IRQ #31

  842 12:07:09.076196  PCI 12.7, PIN C, using IRQ #22

  843 12:07:09.079742  PCI 13.0, PIN A, using IRQ #32

  844 12:07:09.082634  PCI 13.1, PIN B, using IRQ #33

  845 12:07:09.085935  PCI 13.2, PIN C, using IRQ #34

  846 12:07:09.089665  PCI 13.3, PIN D, using IRQ #35

  847 12:07:09.090211  PCI 14.0, PIN B, using IRQ #23

  848 12:07:09.092486  PCI 14.1, PIN A, using IRQ #36

  849 12:07:09.096012  PCI 14.3, PIN C, using IRQ #17

  850 12:07:09.099207  PCI 15.0, PIN A, using IRQ #37

  851 12:07:09.102662  PCI 15.1, PIN B, using IRQ #38

  852 12:07:09.105910  PCI 15.2, PIN C, using IRQ #39

  853 12:07:09.109155  PCI 15.3, PIN D, using IRQ #40

  854 12:07:09.112671  PCI 16.0, PIN A, using IRQ #18

  855 12:07:09.116269  PCI 16.1, PIN B, using IRQ #19

  856 12:07:09.119489  PCI 16.2, PIN C, using IRQ #20

  857 12:07:09.123187  PCI 16.3, PIN D, using IRQ #21

  858 12:07:09.125855  PCI 16.4, PIN A, using IRQ #18

  859 12:07:09.129331  PCI 16.5, PIN B, using IRQ #19

  860 12:07:09.132699  PCI 17.0, PIN A, using IRQ #22

  861 12:07:09.135964  PCI 19.0, PIN A, using IRQ #41

  862 12:07:09.139478  PCI 19.1, PIN B, using IRQ #42

  863 12:07:09.140024  PCI 19.2, PIN C, using IRQ #43

  864 12:07:09.142474  PCI 1C.0, PIN A, using IRQ #16

  865 12:07:09.146118  PCI 1C.1, PIN B, using IRQ #17

  866 12:07:09.149043  PCI 1C.2, PIN C, using IRQ #18

  867 12:07:09.152864  PCI 1C.3, PIN D, using IRQ #19

  868 12:07:09.155906  PCI 1C.4, PIN A, using IRQ #16

  869 12:07:09.159230  PCI 1C.5, PIN B, using IRQ #17

  870 12:07:09.162605  PCI 1C.6, PIN C, using IRQ #18

  871 12:07:09.166032  PCI 1C.7, PIN D, using IRQ #19

  872 12:07:09.169492  PCI 1D.0, PIN A, using IRQ #16

  873 12:07:09.172407  PCI 1D.1, PIN B, using IRQ #17

  874 12:07:09.175892  PCI 1D.2, PIN C, using IRQ #18

  875 12:07:09.179590  PCI 1D.3, PIN D, using IRQ #19

  876 12:07:09.182625  PCI 1E.0, PIN A, using IRQ #23

  877 12:07:09.186038  PCI 1E.1, PIN B, using IRQ #20

  878 12:07:09.189290  PCI 1E.2, PIN C, using IRQ #44

  879 12:07:09.189819  PCI 1E.3, PIN D, using IRQ #45

  880 12:07:09.192744  PCI 1F.3, PIN B, using IRQ #22

  881 12:07:09.196290  PCI 1F.4, PIN C, using IRQ #23

  882 12:07:09.199848  PCI 1F.6, PIN D, using IRQ #20

  883 12:07:09.203073  PCI 1F.7, PIN A, using IRQ #21

  884 12:07:09.209415  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  885 12:07:09.216038  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  886 12:07:09.399396  FSPS returned 0

  887 12:07:09.402740  Executing Phase 1 of FspMultiPhaseSiInit

  888 12:07:09.412702  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  889 12:07:09.415791  port C0 DISC req: usage 1 usb3 1 usb2 1

  890 12:07:09.419324  Raw Buffer output 0 00000111

  891 12:07:09.422322  Raw Buffer output 1 00000000

  892 12:07:09.426074  pmc_send_ipc_cmd succeeded

  893 12:07:09.432736  port C1 DISC req: usage 1 usb3 3 usb2 3

  894 12:07:09.433327  Raw Buffer output 0 00000331

  895 12:07:09.436200  Raw Buffer output 1 00000000

  896 12:07:09.439930  pmc_send_ipc_cmd succeeded

  897 12:07:09.444349  Detected 6 core, 8 thread CPU.

  898 12:07:09.447486  Detected 6 core, 8 thread CPU.

  899 12:07:09.452731  Detected 6 core, 8 thread CPU.

  900 12:07:09.455758  Detected 6 core, 8 thread CPU.

  901 12:07:09.459196  Detected 6 core, 8 thread CPU.

  902 12:07:09.462375  Detected 6 core, 8 thread CPU.

  903 12:07:09.465687  Detected 6 core, 8 thread CPU.

  904 12:07:09.469157  Detected 6 core, 8 thread CPU.

  905 12:07:09.472821  Detected 6 core, 8 thread CPU.

  906 12:07:09.476062  Detected 6 core, 8 thread CPU.

  907 12:07:09.479251  Detected 6 core, 8 thread CPU.

  908 12:07:09.482063  Detected 6 core, 8 thread CPU.

  909 12:07:09.486138  Detected 6 core, 8 thread CPU.

  910 12:07:09.489354  Detected 6 core, 8 thread CPU.

  911 12:07:09.492253  Detected 6 core, 8 thread CPU.

  912 12:07:09.495666  Detected 6 core, 8 thread CPU.

  913 12:07:09.499410  Detected 6 core, 8 thread CPU.

  914 12:07:09.502499  Detected 6 core, 8 thread CPU.

  915 12:07:09.505671  Detected 6 core, 8 thread CPU.

  916 12:07:09.509354  Detected 6 core, 8 thread CPU.

  917 12:07:09.512717  Detected 6 core, 8 thread CPU.

  918 12:07:09.516088  Detected 6 core, 8 thread CPU.

  919 12:07:09.805090  Detected 6 core, 8 thread CPU.

  920 12:07:09.807988  Detected 6 core, 8 thread CPU.

  921 12:07:09.811522  Detected 6 core, 8 thread CPU.

  922 12:07:09.814957  Detected 6 core, 8 thread CPU.

  923 12:07:09.818329  Detected 6 core, 8 thread CPU.

  924 12:07:09.821603  Detected 6 core, 8 thread CPU.

  925 12:07:09.825171  Detected 6 core, 8 thread CPU.

  926 12:07:09.828020  Detected 6 core, 8 thread CPU.

  927 12:07:09.831570  Detected 6 core, 8 thread CPU.

  928 12:07:09.835059  Detected 6 core, 8 thread CPU.

  929 12:07:09.838566  Detected 6 core, 8 thread CPU.

  930 12:07:09.841715  Detected 6 core, 8 thread CPU.

  931 12:07:09.845125  Detected 6 core, 8 thread CPU.

  932 12:07:09.848440  Detected 6 core, 8 thread CPU.

  933 12:07:09.851526  Detected 6 core, 8 thread CPU.

  934 12:07:09.854894  Detected 6 core, 8 thread CPU.

  935 12:07:09.858418  Detected 6 core, 8 thread CPU.

  936 12:07:09.861811  Detected 6 core, 8 thread CPU.

  937 12:07:09.862289  Detected 6 core, 8 thread CPU.

  938 12:07:09.864854  Detected 6 core, 8 thread CPU.

  939 12:07:09.868967  Display FSP Version Info HOB

  940 12:07:09.871999  Reference Code - CPU = c.0.65.70

  941 12:07:09.875759  uCode Version = 0.0.4.23

  942 12:07:09.878671  TXT ACM version = ff.ff.ff.ffff

  943 12:07:09.882189  Reference Code - ME = c.0.65.70

  944 12:07:09.885954  MEBx version = 0.0.0.0

  945 12:07:09.888480  ME Firmware Version = Lite SKU

  946 12:07:09.892011  Reference Code - PCH = c.0.65.70

  947 12:07:09.895249  PCH-CRID Status = Disabled

  948 12:07:09.898564  PCH-CRID Original Value = ff.ff.ff.ffff

  949 12:07:09.902659  PCH-CRID New Value = ff.ff.ff.ffff

  950 12:07:09.905342  OPROM - RST - RAID = ff.ff.ff.ffff

  951 12:07:09.908466  PCH Hsio Version = 4.0.0.0

  952 12:07:09.911834  Reference Code - SA - System Agent = c.0.65.70

  953 12:07:09.915477  Reference Code - MRC = 0.0.3.80

  954 12:07:09.918544  SA - PCIe Version = c.0.65.70

  955 12:07:09.921873  SA-CRID Status = Disabled

  956 12:07:09.925349  SA-CRID Original Value = 0.0.0.4

  957 12:07:09.928782  SA-CRID New Value = 0.0.0.4

  958 12:07:09.932067  OPROM - VBIOS = ff.ff.ff.ffff

  959 12:07:09.935288  IO Manageability Engine FW Version = 24.0.4.0

  960 12:07:09.938619  PHY Build Version = 0.0.0.2016

  961 12:07:09.941853  Thunderbolt(TM) FW Version = 0.0.0.0

  962 12:07:09.948614  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  963 12:07:09.955457  BS: BS_DEV_INIT_CHIPS run times (exec / console): 494 / 507 ms

  964 12:07:09.956018  Enumerating buses...

  965 12:07:09.962382  Show all devs... Before device enumeration.

  966 12:07:09.962931  Root Device: enabled 1

  967 12:07:09.964918  CPU_CLUSTER: 0: enabled 1

  968 12:07:09.968567  DOMAIN: 0000: enabled 1

  969 12:07:09.971914  GPIO: 0: enabled 1

  970 12:07:09.972479  PCI: 00:00.0: enabled 1

  971 12:07:09.975079  PCI: 00:01.0: enabled 0

  972 12:07:09.978189  PCI: 00:01.1: enabled 0

  973 12:07:09.978651  PCI: 00:02.0: enabled 1

  974 12:07:09.981830  PCI: 00:04.0: enabled 1

  975 12:07:09.984868  PCI: 00:05.0: enabled 0

  976 12:07:09.988318  PCI: 00:06.0: enabled 1

  977 12:07:09.988785  PCI: 00:06.2: enabled 0

  978 12:07:09.991854  PCI: 00:07.0: enabled 0

  979 12:07:09.994693  PCI: 00:07.1: enabled 0

  980 12:07:09.998923  PCI: 00:07.2: enabled 0

  981 12:07:09.999542  PCI: 00:07.3: enabled 0

  982 12:07:10.001322  PCI: 00:08.0: enabled 0

  983 12:07:10.004976  PCI: 00:09.0: enabled 0

  984 12:07:10.008512  PCI: 00:0a.0: enabled 1

  985 12:07:10.008975  PCI: 00:0d.0: enabled 1

  986 12:07:10.012050  PCI: 00:0d.1: enabled 0

  987 12:07:10.015535  PCI: 00:0d.2: enabled 0

  988 12:07:10.016092  PCI: 00:0d.3: enabled 0

  989 12:07:10.019074  PCI: 00:0e.0: enabled 0

  990 12:07:10.021912  PCI: 00:10.0: enabled 0

  991 12:07:10.025074  PCI: 00:10.1: enabled 0

  992 12:07:10.025632  PCI: 00:10.6: enabled 0

  993 12:07:10.028922  PCI: 00:10.7: enabled 0

  994 12:07:10.032280  PCI: 00:12.0: enabled 0

  995 12:07:10.035221  PCI: 00:12.6: enabled 0

  996 12:07:10.035835  PCI: 00:12.7: enabled 0

  997 12:07:10.038713  PCI: 00:13.0: enabled 0

  998 12:07:10.041966  PCI: 00:14.0: enabled 1

  999 12:07:10.044893  PCI: 00:14.1: enabled 0

 1000 12:07:10.045357  PCI: 00:14.2: enabled 1

 1001 12:07:10.048557  PCI: 00:14.3: enabled 1

 1002 12:07:10.051909  PCI: 00:15.0: enabled 1

 1003 12:07:10.054777  PCI: 00:15.1: enabled 1

 1004 12:07:10.055542  PCI: 00:15.2: enabled 0

 1005 12:07:10.058456  PCI: 00:15.3: enabled 1

 1006 12:07:10.061633  PCI: 00:16.0: enabled 1

 1007 12:07:10.062097  PCI: 00:16.1: enabled 0

 1008 12:07:10.065101  PCI: 00:16.2: enabled 0

 1009 12:07:10.068199  PCI: 00:16.3: enabled 0

 1010 12:07:10.071806  PCI: 00:16.4: enabled 0

 1011 12:07:10.072363  PCI: 00:16.5: enabled 0

 1012 12:07:10.075066  PCI: 00:17.0: enabled 1

 1013 12:07:10.078312  PCI: 00:19.0: enabled 0

 1014 12:07:10.081391  PCI: 00:19.1: enabled 1

 1015 12:07:10.081948  PCI: 00:19.2: enabled 0

 1016 12:07:10.084458  PCI: 00:1a.0: enabled 0

 1017 12:07:10.088249  PCI: 00:1c.0: enabled 0

 1018 12:07:10.091267  PCI: 00:1c.1: enabled 0

 1019 12:07:10.091765  PCI: 00:1c.2: enabled 0

 1020 12:07:10.094754  PCI: 00:1c.3: enabled 0

 1021 12:07:10.098660  PCI: 00:1c.4: enabled 0

 1022 12:07:10.099217  PCI: 00:1c.5: enabled 0

 1023 12:07:10.101530  PCI: 00:1c.6: enabled 0

 1024 12:07:10.105495  PCI: 00:1c.7: enabled 0

 1025 12:07:10.107989  PCI: 00:1d.0: enabled 0

 1026 12:07:10.108449  PCI: 00:1d.1: enabled 0

 1027 12:07:10.111690  PCI: 00:1d.2: enabled 0

 1028 12:07:10.114746  PCI: 00:1d.3: enabled 0

 1029 12:07:10.118349  PCI: 00:1e.0: enabled 1

 1030 12:07:10.119167  PCI: 00:1e.1: enabled 0

 1031 12:07:10.121572  PCI: 00:1e.2: enabled 0

 1032 12:07:10.125086  PCI: 00:1e.3: enabled 1

 1033 12:07:10.127916  PCI: 00:1f.0: enabled 1

 1034 12:07:10.128377  PCI: 00:1f.1: enabled 0

 1035 12:07:10.131309  PCI: 00:1f.2: enabled 1

 1036 12:07:10.134589  PCI: 00:1f.3: enabled 1

 1037 12:07:10.138325  PCI: 00:1f.4: enabled 0

 1038 12:07:10.138877  PCI: 00:1f.5: enabled 1

 1039 12:07:10.141254  PCI: 00:1f.6: enabled 0

 1040 12:07:10.144488  PCI: 00:1f.7: enabled 0

 1041 12:07:10.144947  GENERIC: 0.0: enabled 1

 1042 12:07:10.147704  GENERIC: 0.0: enabled 1

 1043 12:07:10.151321  GENERIC: 1.0: enabled 1

 1044 12:07:10.154825  GENERIC: 0.0: enabled 1

 1045 12:07:10.155430  GENERIC: 1.0: enabled 1

 1046 12:07:10.158051  USB0 port 0: enabled 1

 1047 12:07:10.161180  USB0 port 0: enabled 1

 1048 12:07:10.164387  GENERIC: 0.0: enabled 1

 1049 12:07:10.164901  I2C: 00:1a: enabled 1

 1050 12:07:10.167861  I2C: 00:31: enabled 1

 1051 12:07:10.170942  I2C: 00:32: enabled 1

 1052 12:07:10.171441  I2C: 00:50: enabled 1

 1053 12:07:10.174434  I2C: 00:10: enabled 1

 1054 12:07:10.177971  I2C: 00:15: enabled 1

 1055 12:07:10.178387  I2C: 00:2c: enabled 1

 1056 12:07:10.181532  GENERIC: 0.0: enabled 1

 1057 12:07:10.184739  SPI: 00: enabled 1

 1058 12:07:10.185250  PNP: 0c09.0: enabled 1

 1059 12:07:10.187903  GENERIC: 0.0: enabled 1

 1060 12:07:10.191509  USB3 port 0: enabled 1

 1061 12:07:10.192016  USB3 port 1: enabled 0

 1062 12:07:10.194769  USB3 port 2: enabled 1

 1063 12:07:10.197928  USB3 port 3: enabled 0

 1064 12:07:10.201119  USB2 port 0: enabled 1

 1065 12:07:10.201631  USB2 port 1: enabled 0

 1066 12:07:10.204718  USB2 port 2: enabled 1

 1067 12:07:10.207469  USB2 port 3: enabled 0

 1068 12:07:10.207889  USB2 port 4: enabled 0

 1069 12:07:10.211181  USB2 port 5: enabled 1

 1070 12:07:10.214445  USB2 port 6: enabled 0

 1071 12:07:10.218005  USB2 port 7: enabled 0

 1072 12:07:10.218515  USB2 port 8: enabled 1

 1073 12:07:10.221630  USB2 port 9: enabled 1

 1074 12:07:10.224634  USB3 port 0: enabled 1

 1075 12:07:10.225147  USB3 port 1: enabled 0

 1076 12:07:10.227884  USB3 port 2: enabled 0

 1077 12:07:10.231308  USB3 port 3: enabled 0

 1078 12:07:10.231868  GENERIC: 0.0: enabled 1

 1079 12:07:10.234487  GENERIC: 1.0: enabled 1

 1080 12:07:10.237477  APIC: 00: enabled 1

 1081 12:07:10.237893  APIC: 16: enabled 1

 1082 12:07:10.241456  APIC: 10: enabled 1

 1083 12:07:10.244298  APIC: 12: enabled 1

 1084 12:07:10.244806  APIC: 14: enabled 1

 1085 12:07:10.248007  APIC: 01: enabled 1

 1086 12:07:10.248511  APIC: 08: enabled 1

 1087 12:07:10.250908  APIC: 09: enabled 1

 1088 12:07:10.254523  Compare with tree...

 1089 12:07:10.255053  Root Device: enabled 1

 1090 12:07:10.257465   CPU_CLUSTER: 0: enabled 1

 1091 12:07:10.261012    APIC: 00: enabled 1

 1092 12:07:10.264531    APIC: 16: enabled 1

 1093 12:07:10.265060    APIC: 10: enabled 1

 1094 12:07:10.268027    APIC: 12: enabled 1

 1095 12:07:10.270906    APIC: 14: enabled 1

 1096 12:07:10.271322    APIC: 01: enabled 1

 1097 12:07:10.274596    APIC: 08: enabled 1

 1098 12:07:10.277782    APIC: 09: enabled 1

 1099 12:07:10.278299   DOMAIN: 0000: enabled 1

 1100 12:07:10.280962    GPIO: 0: enabled 1

 1101 12:07:10.284562    PCI: 00:00.0: enabled 1

 1102 12:07:10.287841    PCI: 00:01.0: enabled 0

 1103 12:07:10.288259    PCI: 00:01.1: enabled 0

 1104 12:07:10.290869    PCI: 00:02.0: enabled 1

 1105 12:07:10.294037    PCI: 00:04.0: enabled 1

 1106 12:07:10.297850     GENERIC: 0.0: enabled 1

 1107 12:07:10.300788    PCI: 00:05.0: enabled 0

 1108 12:07:10.301301    PCI: 00:06.0: enabled 1

 1109 12:07:10.304288    PCI: 00:06.2: enabled 0

 1110 12:07:10.307855    PCI: 00:08.0: enabled 0

 1111 12:07:10.310757    PCI: 00:09.0: enabled 0

 1112 12:07:10.314262    PCI: 00:0a.0: enabled 1

 1113 12:07:10.314769    PCI: 00:0d.0: enabled 1

 1114 12:07:10.317454     USB0 port 0: enabled 1

 1115 12:07:10.321293      USB3 port 0: enabled 1

 1116 12:07:10.324238      USB3 port 1: enabled 0

 1117 12:07:10.327606      USB3 port 2: enabled 1

 1118 12:07:10.331114      USB3 port 3: enabled 0

 1119 12:07:10.331687    PCI: 00:0d.1: enabled 0

 1120 12:07:10.333763    PCI: 00:0d.2: enabled 0

 1121 12:07:10.337346    PCI: 00:0d.3: enabled 0

 1122 12:07:10.340858    PCI: 00:0e.0: enabled 0

 1123 12:07:10.341369    PCI: 00:10.0: enabled 0

 1124 12:07:10.344307    PCI: 00:10.1: enabled 0

 1125 12:07:10.347649    PCI: 00:10.6: enabled 0

 1126 12:07:10.350758    PCI: 00:10.7: enabled 0

 1127 12:07:10.354830    PCI: 00:12.0: enabled 0

 1128 12:07:10.355336    PCI: 00:12.6: enabled 0

 1129 12:07:10.357392    PCI: 00:12.7: enabled 0

 1130 12:07:10.360915    PCI: 00:13.0: enabled 0

 1131 12:07:10.363922    PCI: 00:14.0: enabled 1

 1132 12:07:10.367252     USB0 port 0: enabled 1

 1133 12:07:10.367790      USB2 port 0: enabled 1

 1134 12:07:10.370855      USB2 port 1: enabled 0

 1135 12:07:10.374656      USB2 port 2: enabled 1

 1136 12:07:10.377321      USB2 port 3: enabled 0

 1137 12:07:10.380647      USB2 port 4: enabled 0

 1138 12:07:10.384425      USB2 port 5: enabled 1

 1139 12:07:10.384957      USB2 port 6: enabled 0

 1140 12:07:10.387138      USB2 port 7: enabled 0

 1141 12:07:10.390869      USB2 port 8: enabled 1

 1142 12:07:10.394711      USB2 port 9: enabled 1

 1143 12:07:10.397695      USB3 port 0: enabled 1

 1144 12:07:10.398204      USB3 port 1: enabled 0

 1145 12:07:10.401075      USB3 port 2: enabled 0

 1146 12:07:10.403951      USB3 port 3: enabled 0

 1147 12:07:10.408121    PCI: 00:14.1: enabled 0

 1148 12:07:10.410897    PCI: 00:14.2: enabled 1

 1149 12:07:10.414340    PCI: 00:14.3: enabled 1

 1150 12:07:10.414856     GENERIC: 0.0: enabled 1

 1151 12:07:10.417996    PCI: 00:15.0: enabled 1

 1152 12:07:10.421152     I2C: 00:1a: enabled 1

 1153 12:07:10.424246     I2C: 00:31: enabled 1

 1154 12:07:10.424753     I2C: 00:32: enabled 1

 1155 12:07:10.427879    PCI: 00:15.1: enabled 1

 1156 12:07:10.430710     I2C: 00:50: enabled 1

 1157 12:07:10.433956    PCI: 00:15.2: enabled 0

 1158 12:07:10.437800    PCI: 00:15.3: enabled 1

 1159 12:07:10.438312     I2C: 00:10: enabled 1

 1160 12:07:10.440577    PCI: 00:16.0: enabled 1

 1161 12:07:10.444350    PCI: 00:16.1: enabled 0

 1162 12:07:10.447284    PCI: 00:16.2: enabled 0

 1163 12:07:10.447739    PCI: 00:16.3: enabled 0

 1164 12:07:10.450542    PCI: 00:16.4: enabled 0

 1165 12:07:10.454477    PCI: 00:16.5: enabled 0

 1166 12:07:10.457859    PCI: 00:17.0: enabled 1

 1167 12:07:10.461003    PCI: 00:19.0: enabled 0

 1168 12:07:10.461589    PCI: 00:19.1: enabled 1

 1169 12:07:10.464290     I2C: 00:15: enabled 1

 1170 12:07:10.467572     I2C: 00:2c: enabled 1

 1171 12:07:10.470678    PCI: 00:19.2: enabled 0

 1172 12:07:10.473960    PCI: 00:1a.0: enabled 0

 1173 12:07:10.474469    PCI: 00:1e.0: enabled 1

 1174 12:07:10.477539    PCI: 00:1e.1: enabled 0

 1175 12:07:10.480726    PCI: 00:1e.2: enabled 0

 1176 12:07:10.484564    PCI: 00:1e.3: enabled 1

 1177 12:07:10.485075     SPI: 00: enabled 1

 1178 12:07:10.487672    PCI: 00:1f.0: enabled 1

 1179 12:07:10.490810     PNP: 0c09.0: enabled 1

 1180 12:07:10.493897    PCI: 00:1f.1: enabled 0

 1181 12:07:10.497590    PCI: 00:1f.2: enabled 1

 1182 12:07:10.498105     GENERIC: 0.0: enabled 1

 1183 12:07:10.500367      GENERIC: 0.0: enabled 1

 1184 12:07:10.504633      GENERIC: 1.0: enabled 1

 1185 12:07:10.507186    PCI: 00:1f.3: enabled 1

 1186 12:07:10.510859    PCI: 00:1f.4: enabled 0

 1187 12:07:10.513785    PCI: 00:1f.5: enabled 1

 1188 12:07:10.514200    PCI: 00:1f.6: enabled 0

 1189 12:07:10.517434    PCI: 00:1f.7: enabled 0

 1190 12:07:10.520665  Root Device scanning...

 1191 12:07:10.524063  scan_static_bus for Root Device

 1192 12:07:10.527712  CPU_CLUSTER: 0 enabled

 1193 12:07:10.528218  DOMAIN: 0000 enabled

 1194 12:07:10.530705  DOMAIN: 0000 scanning...

 1195 12:07:10.534058  PCI: pci_scan_bus for bus 00

 1196 12:07:10.537357  PCI: 00:00.0 [8086/0000] ops

 1197 12:07:10.540873  PCI: 00:00.0 [8086/4609] enabled

 1198 12:07:10.543867  PCI: 00:02.0 [8086/0000] bus ops

 1199 12:07:10.547086  PCI: 00:02.0 [8086/46b3] enabled

 1200 12:07:10.550553  PCI: 00:04.0 [8086/0000] bus ops

 1201 12:07:10.554174  PCI: 00:04.0 [8086/461d] enabled

 1202 12:07:10.557584  PCI: 00:06.0 [8086/0000] bus ops

 1203 12:07:10.560550  PCI: 00:06.0 [8086/464d] enabled

 1204 12:07:10.564035  PCI: 00:08.0 [8086/464f] disabled

 1205 12:07:10.567133  PCI: 00:0a.0 [8086/467d] enabled

 1206 12:07:10.570565  PCI: 00:0d.0 [8086/0000] bus ops

 1207 12:07:10.573972  PCI: 00:0d.0 [8086/461e] enabled

 1208 12:07:10.577195  PCI: 00:14.0 [8086/0000] bus ops

 1209 12:07:10.580187  PCI: 00:14.0 [8086/51ed] enabled

 1210 12:07:10.583880  PCI: 00:14.2 [8086/51ef] enabled

 1211 12:07:10.587578  PCI: 00:14.3 [8086/0000] bus ops

 1212 12:07:10.591039  PCI: 00:14.3 [8086/51f0] enabled

 1213 12:07:10.594188  PCI: 00:15.0 [8086/0000] bus ops

 1214 12:07:10.597946  PCI: 00:15.0 [8086/51e8] enabled

 1215 12:07:10.600487  PCI: 00:15.1 [8086/0000] bus ops

 1216 12:07:10.603815  PCI: 00:15.1 [8086/51e9] enabled

 1217 12:07:10.607634  PCI: 00:15.2 [8086/0000] bus ops

 1218 12:07:10.610410  PCI: 00:15.2 [8086/51ea] disabled

 1219 12:07:10.613769  PCI: 00:15.3 [8086/0000] bus ops

 1220 12:07:10.617217  PCI: 00:15.3 [8086/51eb] enabled

 1221 12:07:10.621496  PCI: 00:16.0 [8086/0000] ops

 1222 12:07:10.623698  PCI: 00:16.0 [8086/51e0] enabled

 1223 12:07:10.630430  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1224 12:07:10.633751  PCI: 00:19.0 [8086/0000] bus ops

 1225 12:07:10.637104  PCI: 00:19.0 [8086/51c5] disabled

 1226 12:07:10.640289  PCI: 00:19.1 [8086/0000] bus ops

 1227 12:07:10.643791  PCI: 00:19.1 [8086/51c6] enabled

 1228 12:07:10.647215  PCI: 00:1e.0 [8086/0000] ops

 1229 12:07:10.650356  PCI: 00:1e.0 [8086/51a8] enabled

 1230 12:07:10.653863  PCI: 00:1e.3 [8086/0000] bus ops

 1231 12:07:10.656930  PCI: 00:1e.3 [8086/51ab] enabled

 1232 12:07:10.660049  PCI: 00:1f.0 [8086/0000] bus ops

 1233 12:07:10.663838  PCI: 00:1f.0 [8086/5182] enabled

 1234 12:07:10.664296  RTC Init

 1235 12:07:10.666801  Set power on after power failure.

 1236 12:07:10.670460  Disabling Deep S3

 1237 12:07:10.673458  Disabling Deep S3

 1238 12:07:10.673916  Disabling Deep S4

 1239 12:07:10.677281  Disabling Deep S4

 1240 12:07:10.677829  Disabling Deep S5

 1241 12:07:10.680424  Disabling Deep S5

 1242 12:07:10.683671  PCI: 00:1f.2 [0000/0000] hidden

 1243 12:07:10.687080  PCI: 00:1f.3 [8086/0000] bus ops

 1244 12:07:10.690177  PCI: 00:1f.3 [8086/51c8] enabled

 1245 12:07:10.693746  PCI: 00:1f.5 [8086/0000] bus ops

 1246 12:07:10.697271  PCI: 00:1f.5 [8086/51a4] enabled

 1247 12:07:10.697817  GPIO: 0 enabled

 1248 12:07:10.700119  PCI: Leftover static devices:

 1249 12:07:10.703776  PCI: 00:01.0

 1250 12:07:10.704322  PCI: 00:01.1

 1251 12:07:10.704679  PCI: 00:05.0

 1252 12:07:10.707253  PCI: 00:06.2

 1253 12:07:10.707911  PCI: 00:09.0

 1254 12:07:10.710150  PCI: 00:0d.1

 1255 12:07:10.710608  PCI: 00:0d.2

 1256 12:07:10.710965  PCI: 00:0d.3

 1257 12:07:10.713800  PCI: 00:0e.0

 1258 12:07:10.714351  PCI: 00:10.0

 1259 12:07:10.717334  PCI: 00:10.1

 1260 12:07:10.717886  PCI: 00:10.6

 1261 12:07:10.720269  PCI: 00:10.7

 1262 12:07:10.720846  PCI: 00:12.0

 1263 12:07:10.721207  PCI: 00:12.6

 1264 12:07:10.723801  PCI: 00:12.7

 1265 12:07:10.724346  PCI: 00:13.0

 1266 12:07:10.727488  PCI: 00:14.1

 1267 12:07:10.728092  PCI: 00:16.1

 1268 12:07:10.728456  PCI: 00:16.2

 1269 12:07:10.730506  PCI: 00:16.3

 1270 12:07:10.731052  PCI: 00:16.4

 1271 12:07:10.733408  PCI: 00:16.5

 1272 12:07:10.733862  PCI: 00:17.0

 1273 12:07:10.734216  PCI: 00:19.2

 1274 12:07:10.737417  PCI: 00:1a.0

 1275 12:07:10.738008  PCI: 00:1e.1

 1276 12:07:10.740261  PCI: 00:1e.2

 1277 12:07:10.740718  PCI: 00:1f.1

 1278 12:07:10.744109  PCI: 00:1f.4

 1279 12:07:10.744656  PCI: 00:1f.6

 1280 12:07:10.745015  PCI: 00:1f.7

 1281 12:07:10.747276  PCI: Check your devicetree.cb.

 1282 12:07:10.750226  PCI: 00:02.0 scanning...

 1283 12:07:10.753596  scan_generic_bus for PCI: 00:02.0

 1284 12:07:10.757039  scan_generic_bus for PCI: 00:02.0 done

 1285 12:07:10.763498  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1286 12:07:10.763958  PCI: 00:04.0 scanning...

 1287 12:07:10.767149  scan_generic_bus for PCI: 00:04.0

 1288 12:07:10.770343  GENERIC: 0.0 enabled

 1289 12:07:10.776967  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1290 12:07:10.780453  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1291 12:07:10.783719  PCI: 00:06.0 scanning...

 1292 12:07:10.787521  do_pci_scan_bridge for PCI: 00:06.0

 1293 12:07:10.790344  PCI: pci_scan_bus for bus 01

 1294 12:07:10.793670  PCI: 01:00.0 [15b7/5009] enabled

 1295 12:07:10.797284  Enabling Common Clock Configuration

 1296 12:07:10.800504  L1 Sub-State supported from root port 6

 1297 12:07:10.803250  L1 Sub-State Support = 0x5

 1298 12:07:10.807175  CommonModeRestoreTime = 0x6e

 1299 12:07:10.810153  Power On Value = 0x5, Power On Scale = 0x2

 1300 12:07:10.813754  ASPM: Enabled L1

 1301 12:07:10.817160  PCIe: Max_Payload_Size adjusted to 256

 1302 12:07:10.820074  PCI: 01:00.0: Enabled LTR

 1303 12:07:10.823300  PCI: 01:00.0: Programmed LTR max latencies

 1304 12:07:10.830242  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1305 12:07:10.830794  PCI: 00:0d.0 scanning...

 1306 12:07:10.833355  scan_static_bus for PCI: 00:0d.0

 1307 12:07:10.837158  USB0 port 0 enabled

 1308 12:07:10.840109  USB0 port 0 scanning...

 1309 12:07:10.843737  scan_static_bus for USB0 port 0

 1310 12:07:10.844284  USB3 port 0 enabled

 1311 12:07:10.846687  USB3 port 1 disabled

 1312 12:07:10.849994  USB3 port 2 enabled

 1313 12:07:10.850453  USB3 port 3 disabled

 1314 12:07:10.853478  USB3 port 0 scanning...

 1315 12:07:10.857202  scan_static_bus for USB3 port 0

 1316 12:07:10.860209  scan_static_bus for USB3 port 0 done

 1317 12:07:10.863102  scan_bus: bus USB3 port 0 finished in 6 msecs

 1318 12:07:10.866493  USB3 port 2 scanning...

 1319 12:07:10.870151  scan_static_bus for USB3 port 2

 1320 12:07:10.873214  scan_static_bus for USB3 port 2 done

 1321 12:07:10.880104  scan_bus: bus USB3 port 2 finished in 6 msecs

 1322 12:07:10.883323  scan_static_bus for USB0 port 0 done

 1323 12:07:10.886778  scan_bus: bus USB0 port 0 finished in 43 msecs

 1324 12:07:10.890111  scan_static_bus for PCI: 00:0d.0 done

 1325 12:07:10.896971  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1326 12:07:10.899926  PCI: 00:14.0 scanning...

 1327 12:07:10.903181  scan_static_bus for PCI: 00:14.0

 1328 12:07:10.903682  USB0 port 0 enabled

 1329 12:07:10.906239  USB0 port 0 scanning...

 1330 12:07:10.910047  scan_static_bus for USB0 port 0

 1331 12:07:10.910602  USB2 port 0 enabled

 1332 12:07:10.913482  USB2 port 1 disabled

 1333 12:07:10.916562  USB2 port 2 enabled

 1334 12:07:10.917111  USB2 port 3 disabled

 1335 12:07:10.920128  USB2 port 4 disabled

 1336 12:07:10.922941  USB2 port 5 enabled

 1337 12:07:10.923467  USB2 port 6 disabled

 1338 12:07:10.926840  USB2 port 7 disabled

 1339 12:07:10.930061  USB2 port 8 enabled

 1340 12:07:10.930517  USB2 port 9 enabled

 1341 12:07:10.933431  USB3 port 0 enabled

 1342 12:07:10.933983  USB3 port 1 disabled

 1343 12:07:10.936515  USB3 port 2 disabled

 1344 12:07:10.940294  USB3 port 3 disabled

 1345 12:07:10.940843  USB2 port 0 scanning...

 1346 12:07:10.943833  scan_static_bus for USB2 port 0

 1347 12:07:10.949871  scan_static_bus for USB2 port 0 done

 1348 12:07:10.954023  scan_bus: bus USB2 port 0 finished in 6 msecs

 1349 12:07:10.956890  USB2 port 2 scanning...

 1350 12:07:10.959932  scan_static_bus for USB2 port 2

 1351 12:07:10.963042  scan_static_bus for USB2 port 2 done

 1352 12:07:10.966923  scan_bus: bus USB2 port 2 finished in 6 msecs

 1353 12:07:10.969709  USB2 port 5 scanning...

 1354 12:07:10.973216  scan_static_bus for USB2 port 5

 1355 12:07:10.976897  scan_static_bus for USB2 port 5 done

 1356 12:07:10.980204  scan_bus: bus USB2 port 5 finished in 6 msecs

 1357 12:07:10.983294  USB2 port 8 scanning...

 1358 12:07:10.986554  scan_static_bus for USB2 port 8

 1359 12:07:10.989903  scan_static_bus for USB2 port 8 done

 1360 12:07:10.993553  scan_bus: bus USB2 port 8 finished in 6 msecs

 1361 12:07:10.996689  USB2 port 9 scanning...

 1362 12:07:10.999998  scan_static_bus for USB2 port 9

 1363 12:07:11.003598  scan_static_bus for USB2 port 9 done

 1364 12:07:11.009748  scan_bus: bus USB2 port 9 finished in 6 msecs

 1365 12:07:11.010279  USB3 port 0 scanning...

 1366 12:07:11.013052  scan_static_bus for USB3 port 0

 1367 12:07:11.019970  scan_static_bus for USB3 port 0 done

 1368 12:07:11.023578  scan_bus: bus USB3 port 0 finished in 6 msecs

 1369 12:07:11.026562  scan_static_bus for USB0 port 0 done

 1370 12:07:11.029971  scan_bus: bus USB0 port 0 finished in 120 msecs

 1371 12:07:11.036543  scan_static_bus for PCI: 00:14.0 done

 1372 12:07:11.040169  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1373 12:07:11.043591  PCI: 00:14.3 scanning...

 1374 12:07:11.046596  scan_static_bus for PCI: 00:14.3

 1375 12:07:11.047142  GENERIC: 0.0 enabled

 1376 12:07:11.053254  scan_static_bus for PCI: 00:14.3 done

 1377 12:07:11.056549  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1378 12:07:11.060053  PCI: 00:15.0 scanning...

 1379 12:07:11.062921  scan_static_bus for PCI: 00:15.0

 1380 12:07:11.063423  I2C: 00:1a enabled

 1381 12:07:11.066825  I2C: 00:31 enabled

 1382 12:07:11.070385  I2C: 00:32 enabled

 1383 12:07:11.073410  scan_static_bus for PCI: 00:15.0 done

 1384 12:07:11.076773  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1385 12:07:11.079792  PCI: 00:15.1 scanning...

 1386 12:07:11.082997  scan_static_bus for PCI: 00:15.1

 1387 12:07:11.083599  I2C: 00:50 enabled

 1388 12:07:11.089761  scan_static_bus for PCI: 00:15.1 done

 1389 12:07:11.092812  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1390 12:07:11.096635  PCI: 00:15.3 scanning...

 1391 12:07:11.099579  scan_static_bus for PCI: 00:15.3

 1392 12:07:11.100039  I2C: 00:10 enabled

 1393 12:07:11.106308  scan_static_bus for PCI: 00:15.3 done

 1394 12:07:11.109719  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1395 12:07:11.112870  PCI: 00:19.1 scanning...

 1396 12:07:11.116787  scan_static_bus for PCI: 00:19.1

 1397 12:07:11.117338  I2C: 00:15 enabled

 1398 12:07:11.119515  I2C: 00:2c enabled

 1399 12:07:11.122836  scan_static_bus for PCI: 00:19.1 done

 1400 12:07:11.129444  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1401 12:07:11.129986  PCI: 00:1e.3 scanning...

 1402 12:07:11.132989  scan_generic_bus for PCI: 00:1e.3

 1403 12:07:11.136015  SPI: 00 enabled

 1404 12:07:11.142392  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1405 12:07:11.146249  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1406 12:07:11.149334  PCI: 00:1f.0 scanning...

 1407 12:07:11.153162  scan_static_bus for PCI: 00:1f.0

 1408 12:07:11.153711  PNP: 0c09.0 enabled

 1409 12:07:11.156379  PNP: 0c09.0 scanning...

 1410 12:07:11.159665  scan_static_bus for PNP: 0c09.0

 1411 12:07:11.162422  scan_static_bus for PNP: 0c09.0 done

 1412 12:07:11.169266  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1413 12:07:11.172242  scan_static_bus for PCI: 00:1f.0 done

 1414 12:07:11.176203  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1415 12:07:11.179208  PCI: 00:1f.2 scanning...

 1416 12:07:11.182604  scan_static_bus for PCI: 00:1f.2

 1417 12:07:11.186146  GENERIC: 0.0 enabled

 1418 12:07:11.186686  GENERIC: 0.0 scanning...

 1419 12:07:11.189369  scan_static_bus for GENERIC: 0.0

 1420 12:07:11.192325  GENERIC: 0.0 enabled

 1421 12:07:11.195885  GENERIC: 1.0 enabled

 1422 12:07:11.199087  scan_static_bus for GENERIC: 0.0 done

 1423 12:07:11.202310  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1424 12:07:11.208730  scan_static_bus for PCI: 00:1f.2 done

 1425 12:07:11.212342  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1426 12:07:11.215270  PCI: 00:1f.3 scanning...

 1427 12:07:11.219133  scan_static_bus for PCI: 00:1f.3

 1428 12:07:11.222373  scan_static_bus for PCI: 00:1f.3 done

 1429 12:07:11.225811  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1430 12:07:11.228967  PCI: 00:1f.5 scanning...

 1431 12:07:11.232055  scan_generic_bus for PCI: 00:1f.5

 1432 12:07:11.235575  scan_generic_bus for PCI: 00:1f.5 done

 1433 12:07:11.242194  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1434 12:07:11.245533  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1435 12:07:11.248851  scan_static_bus for Root Device done

 1436 12:07:11.255723  scan_bus: bus Root Device finished in 729 msecs

 1437 12:07:11.256342  done

 1438 12:07:11.261888  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1439 12:07:11.265391  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1440 12:07:11.272426  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1441 12:07:11.275515  SPI flash protection: WPSW=0 SRP0=0

 1442 12:07:11.282118  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1443 12:07:11.288563  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1444 12:07:11.289125  found VGA at PCI: 00:02.0

 1445 12:07:11.291877  Setting up VGA for PCI: 00:02.0

 1446 12:07:11.298471  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1447 12:07:11.301974  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1448 12:07:11.305620  Allocating resources...

 1449 12:07:11.308849  Reading resources...

 1450 12:07:11.311960  Root Device read_resources bus 0 link: 0

 1451 12:07:11.315268  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1452 12:07:11.321744  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1453 12:07:11.325356  DOMAIN: 0000 read_resources bus 0 link: 0

 1454 12:07:11.332041  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1455 12:07:11.339001  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1456 12:07:11.345617  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1457 12:07:11.352002  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1458 12:07:11.355095  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1459 12:07:11.361915  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1460 12:07:11.368038  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1461 12:07:11.374665  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1462 12:07:11.381402  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1463 12:07:11.388568  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1464 12:07:11.394826  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1465 12:07:11.401391  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1466 12:07:11.408299  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1467 12:07:11.414920  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1468 12:07:11.421393  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1469 12:07:11.428174  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1470 12:07:11.431333  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1471 12:07:11.438178  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1472 12:07:11.445178  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1473 12:07:11.451482  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1474 12:07:11.458214  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1475 12:07:11.461431  PCI: 00:04.0 read_resources bus 1 link: 0

 1476 12:07:11.468086  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1477 12:07:11.471145  PCI: 00:06.0 read_resources bus 1 link: 0

 1478 12:07:11.474694  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1479 12:07:11.481682  PCI: 00:0d.0 read_resources bus 0 link: 0

 1480 12:07:11.485317  USB0 port 0 read_resources bus 0 link: 0

 1481 12:07:11.488354  USB0 port 0 read_resources bus 0 link: 0 done

 1482 12:07:11.494558  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1483 12:07:11.497858  PCI: 00:14.0 read_resources bus 0 link: 0

 1484 12:07:11.501320  USB0 port 0 read_resources bus 0 link: 0

 1485 12:07:11.507629  USB0 port 0 read_resources bus 0 link: 0 done

 1486 12:07:11.511343  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1487 12:07:11.515169  PCI: 00:14.3 read_resources bus 0 link: 0

 1488 12:07:11.521412  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1489 12:07:11.524532  PCI: 00:15.0 read_resources bus 0 link: 0

 1490 12:07:11.528283  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1491 12:07:11.535115  PCI: 00:15.1 read_resources bus 0 link: 0

 1492 12:07:11.537869  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1493 12:07:11.541253  PCI: 00:15.3 read_resources bus 0 link: 0

 1494 12:07:11.547963  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1495 12:07:11.551059  PCI: 00:19.1 read_resources bus 0 link: 0

 1496 12:07:11.557989  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1497 12:07:11.561585  PCI: 00:1e.3 read_resources bus 2 link: 0

 1498 12:07:11.564136  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1499 12:07:11.571303  PCI: 00:1f.0 read_resources bus 0 link: 0

 1500 12:07:11.574461  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1501 12:07:11.577995  PCI: 00:1f.2 read_resources bus 0 link: 0

 1502 12:07:11.584400  GENERIC: 0.0 read_resources bus 0 link: 0

 1503 12:07:11.587998  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1504 12:07:11.590906  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1505 12:07:11.598068  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1506 12:07:11.601643  Root Device read_resources bus 0 link: 0 done

 1507 12:07:11.604051  Done reading resources.

 1508 12:07:11.611965  Show resources in subtree (Root Device)...After reading.

 1509 12:07:11.614557   Root Device child on link 0 CPU_CLUSTER: 0

 1510 12:07:11.618513    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1511 12:07:11.621764     APIC: 00

 1512 12:07:11.622322     APIC: 16

 1513 12:07:11.622679     APIC: 10

 1514 12:07:11.624316     APIC: 12

 1515 12:07:11.624768     APIC: 14

 1516 12:07:11.627955     APIC: 01

 1517 12:07:11.628405     APIC: 08

 1518 12:07:11.628762     APIC: 09

 1519 12:07:11.634194    DOMAIN: 0000 child on link 0 GPIO: 0

 1520 12:07:11.641376    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1521 12:07:11.651010    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1522 12:07:11.654477     GPIO: 0

 1523 12:07:11.655026     PCI: 00:00.0

 1524 12:07:11.664271     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1525 12:07:11.674499     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1526 12:07:11.684368     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1527 12:07:11.690834     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1528 12:07:11.701391     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1529 12:07:11.711295     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1530 12:07:11.720941     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1531 12:07:11.730823     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1532 12:07:11.740408     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1533 12:07:11.750589     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1534 12:07:11.757568     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1535 12:07:11.766855     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1536 12:07:11.776565     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1537 12:07:11.786848     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1538 12:07:11.797126     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1539 12:07:11.807310     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1540 12:07:11.813338     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1541 12:07:11.823276     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1542 12:07:11.834169     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1543 12:07:11.843569     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1544 12:07:11.853514     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1545 12:07:11.864014     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1546 12:07:11.873525     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1547 12:07:11.883561     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1548 12:07:11.893203     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1549 12:07:11.900070     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1550 12:07:11.910116     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1551 12:07:11.919951     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1552 12:07:11.923909     PCI: 00:02.0

 1553 12:07:11.933420     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1554 12:07:11.943506     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1555 12:07:11.950084     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1556 12:07:11.956752     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1557 12:07:11.966496     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1558 12:07:11.967045      GENERIC: 0.0

 1559 12:07:11.973379     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1560 12:07:11.980187     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1561 12:07:11.989808     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1562 12:07:11.999830     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1563 12:07:12.000369      PCI: 01:00.0

 1564 12:07:12.009655      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1565 12:07:12.019802      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1566 12:07:12.022732     PCI: 00:08.0

 1567 12:07:12.023290     PCI: 00:0a.0

 1568 12:07:12.032900     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1569 12:07:12.040024     PCI: 00:0d.0 child on link 0 USB0 port 0

 1570 12:07:12.049886     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1571 12:07:12.052892      USB0 port 0 child on link 0 USB3 port 0

 1572 12:07:12.056284       USB3 port 0

 1573 12:07:12.056840       USB3 port 1

 1574 12:07:12.059785       USB3 port 2

 1575 12:07:12.060344       USB3 port 3

 1576 12:07:12.065769     PCI: 00:14.0 child on link 0 USB0 port 0

 1577 12:07:12.075918     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1578 12:07:12.079739      USB0 port 0 child on link 0 USB2 port 0

 1579 12:07:12.080300       USB2 port 0

 1580 12:07:12.082945       USB2 port 1

 1581 12:07:12.086509       USB2 port 2

 1582 12:07:12.087072       USB2 port 3

 1583 12:07:12.089777       USB2 port 4

 1584 12:07:12.090334       USB2 port 5

 1585 12:07:12.092695       USB2 port 6

 1586 12:07:12.093251       USB2 port 7

 1587 12:07:12.096230       USB2 port 8

 1588 12:07:12.096812       USB2 port 9

 1589 12:07:12.099468       USB3 port 0

 1590 12:07:12.099923       USB3 port 1

 1591 12:07:12.103403       USB3 port 2

 1592 12:07:12.103966       USB3 port 3

 1593 12:07:12.106448     PCI: 00:14.2

 1594 12:07:12.116325     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1595 12:07:12.126310     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1596 12:07:12.129506     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1597 12:07:12.139547     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1598 12:07:12.142716      GENERIC: 0.0

 1599 12:07:12.146305     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1600 12:07:12.156642     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1601 12:07:12.157204      I2C: 00:1a

 1602 12:07:12.159652      I2C: 00:31

 1603 12:07:12.160107      I2C: 00:32

 1604 12:07:12.166236     PCI: 00:15.1 child on link 0 I2C: 00:50

 1605 12:07:12.176401     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1606 12:07:12.176984      I2C: 00:50

 1607 12:07:12.179855     PCI: 00:15.2

 1608 12:07:12.182682     PCI: 00:15.3 child on link 0 I2C: 00:10

 1609 12:07:12.193090     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1610 12:07:12.193640      I2C: 00:10

 1611 12:07:12.196263     PCI: 00:16.0

 1612 12:07:12.205836     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1613 12:07:12.206304     PCI: 00:19.0

 1614 12:07:12.212559     PCI: 00:19.1 child on link 0 I2C: 00:15

 1615 12:07:12.222836     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1616 12:07:12.223459      I2C: 00:15

 1617 12:07:12.226107      I2C: 00:2c

 1618 12:07:12.226665     PCI: 00:1e.0

 1619 12:07:12.235921     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1620 12:07:12.243060     PCI: 00:1e.3 child on link 0 SPI: 00

 1621 12:07:12.252984     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1622 12:07:12.253539      SPI: 00

 1623 12:07:12.255824     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1624 12:07:12.266107     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1625 12:07:12.266657      PNP: 0c09.0

 1626 12:07:12.275729      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1627 12:07:12.279453     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1628 12:07:12.289249     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1629 12:07:12.299167     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1630 12:07:12.302617      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1631 12:07:12.305654       GENERIC: 0.0

 1632 12:07:12.308936       GENERIC: 1.0

 1633 12:07:12.309386     PCI: 00:1f.3

 1634 12:07:12.319060     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1635 12:07:12.329313     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1636 12:07:12.332652     PCI: 00:1f.5

 1637 12:07:12.339135     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1638 12:07:12.349504  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1639 12:07:12.352049   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1640 12:07:12.359054   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1641 12:07:12.365372   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1642 12:07:12.369218    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1643 12:07:12.372505    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1644 12:07:12.382481   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1645 12:07:12.389294   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1646 12:07:12.395968   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1647 12:07:12.402013  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1648 12:07:12.409138  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1649 12:07:12.415721   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1650 12:07:12.426028   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1651 12:07:12.432670   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1652 12:07:12.436029   DOMAIN: 0000: Resource ranges:

 1653 12:07:12.439416   * Base: 1000, Size: 800, Tag: 100

 1654 12:07:12.442226   * Base: 1900, Size: e700, Tag: 100

 1655 12:07:12.449288    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1656 12:07:12.455730  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1657 12:07:12.462402  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1658 12:07:12.468722   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1659 12:07:12.475497   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1660 12:07:12.485054   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1661 12:07:12.492088   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1662 12:07:12.498779   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1663 12:07:12.508548   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1664 12:07:12.515017   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1665 12:07:12.521778   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1666 12:07:12.532674   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1667 12:07:12.538173   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1668 12:07:12.545246   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1669 12:07:12.554668   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1670 12:07:12.561586   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1671 12:07:12.567953   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1672 12:07:12.578266   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1673 12:07:12.585119   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1674 12:07:12.591797   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1675 12:07:12.601274   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1676 12:07:12.607912   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1677 12:07:12.614445   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1678 12:07:12.624663   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1679 12:07:12.631124   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1680 12:07:12.638232   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1681 12:07:12.647614   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1682 12:07:12.654391   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1683 12:07:12.661325   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1684 12:07:12.671062   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1685 12:07:12.677666   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1686 12:07:12.684112   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1687 12:07:12.691104   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1688 12:07:12.694784   DOMAIN: 0000: Resource ranges:

 1689 12:07:12.701197   * Base: 80400000, Size: 3fc00000, Tag: 200

 1690 12:07:12.704230   * Base: d0000000, Size: 28000000, Tag: 200

 1691 12:07:12.707951   * Base: fa000000, Size: 1000000, Tag: 200

 1692 12:07:12.714486   * Base: fb001000, Size: 17ff000, Tag: 200

 1693 12:07:12.717829   * Base: fe800000, Size: 300000, Tag: 200

 1694 12:07:12.721143   * Base: feb80000, Size: 80000, Tag: 200

 1695 12:07:12.724452   * Base: fed00000, Size: 40000, Tag: 200

 1696 12:07:12.730885   * Base: fed70000, Size: 10000, Tag: 200

 1697 12:07:12.734544   * Base: fed88000, Size: 8000, Tag: 200

 1698 12:07:12.737736   * Base: fed93000, Size: d000, Tag: 200

 1699 12:07:12.741715   * Base: feda2000, Size: 1e000, Tag: 200

 1700 12:07:12.747648   * Base: fede0000, Size: 1220000, Tag: 200

 1701 12:07:12.750733   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1702 12:07:12.757673    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1703 12:07:12.764444    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1704 12:07:12.771576    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1705 12:07:12.777920    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1706 12:07:12.784405    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1707 12:07:12.790839    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1708 12:07:12.797563    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1709 12:07:12.804109    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1710 12:07:12.810962    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1711 12:07:12.817557    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1712 12:07:12.823972    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1713 12:07:12.830905    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1714 12:07:12.837475    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1715 12:07:12.844091    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1716 12:07:12.850619    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1717 12:07:12.857536    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1718 12:07:12.864267    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1719 12:07:12.870664    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1720 12:07:12.877135    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1721 12:07:12.884170  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1722 12:07:12.893657  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1723 12:07:12.896666   PCI: 00:06.0: Resource ranges:

 1724 12:07:12.900266   * Base: 80400000, Size: 100000, Tag: 200

 1725 12:07:12.906837    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1726 12:07:12.913660    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1727 12:07:12.923312  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1728 12:07:12.930398  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1729 12:07:12.933681  Root Device assign_resources, bus 0 link: 0

 1730 12:07:12.937229  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1731 12:07:12.946494  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1732 12:07:12.953490  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1733 12:07:12.963646  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1734 12:07:12.970287  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1735 12:07:12.973136  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1736 12:07:12.980051  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1737 12:07:12.986837  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1738 12:07:12.996908  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1739 12:07:13.007178  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1740 12:07:13.009908  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1741 12:07:13.020117  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1742 12:07:13.026425  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1743 12:07:13.033045  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1744 12:07:13.039961  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1745 12:07:13.049898  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1746 12:07:13.053109  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1747 12:07:13.056671  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1748 12:07:13.066759  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1749 12:07:13.069308  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1750 12:07:13.076205  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1751 12:07:13.083121  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1752 12:07:13.089604  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1753 12:07:13.099479  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1754 12:07:13.102889  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1755 12:07:13.110025  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1756 12:07:13.116226  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1757 12:07:13.122863  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1758 12:07:13.126510  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1759 12:07:13.133234  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1760 12:07:13.139343  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1761 12:07:13.143048  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1762 12:07:13.152852  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1763 12:07:13.156210  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1764 12:07:13.162504  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1765 12:07:13.169422  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1766 12:07:13.176240  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1767 12:07:13.182523  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1768 12:07:13.185895  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1769 12:07:13.196062  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1770 12:07:13.199112  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1771 12:07:13.205586  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1772 12:07:13.209076  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1773 12:07:13.212050  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1774 12:07:13.219021  LPC: Trying to open IO window from 800 size 1ff

 1775 12:07:13.225808  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1776 12:07:13.235588  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1777 12:07:13.242124  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1778 12:07:13.248968  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1779 12:07:13.252072  Root Device assign_resources, bus 0 link: 0 done

 1780 12:07:13.255233  Done setting resources.

 1781 12:07:13.262180  Show resources in subtree (Root Device)...After assigning values.

 1782 12:07:13.265599   Root Device child on link 0 CPU_CLUSTER: 0

 1783 12:07:13.268552    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1784 12:07:13.271752     APIC: 00

 1785 12:07:13.272200     APIC: 16

 1786 12:07:13.272548     APIC: 10

 1787 12:07:13.275725     APIC: 12

 1788 12:07:13.276283     APIC: 14

 1789 12:07:13.278712     APIC: 01

 1790 12:07:13.279255     APIC: 08

 1791 12:07:13.279651     APIC: 09

 1792 12:07:13.285659    DOMAIN: 0000 child on link 0 GPIO: 0

 1793 12:07:13.291998    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1794 12:07:13.302124    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1795 12:07:13.305211     GPIO: 0

 1796 12:07:13.305658     PCI: 00:00.0

 1797 12:07:13.315345     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1798 12:07:13.325237     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1799 12:07:13.334968     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1800 12:07:13.341811     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1801 12:07:13.351381     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1802 12:07:13.361580     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1803 12:07:13.371649     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1804 12:07:13.381506     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1805 12:07:13.392009     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1806 12:07:13.401248     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1807 12:07:13.407665     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1808 12:07:13.418017     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1809 12:07:13.427638     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1810 12:07:13.437905     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1811 12:07:13.447795     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1812 12:07:13.457717     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1813 12:07:13.464280     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1814 12:07:13.474513     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1815 12:07:13.484190     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1816 12:07:13.494365     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1817 12:07:13.504261     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1818 12:07:13.514817     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1819 12:07:13.524006     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1820 12:07:13.533803     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1821 12:07:13.544076     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1822 12:07:13.550626     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1823 12:07:13.560544     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1824 12:07:13.570415     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1825 12:07:13.573753     PCI: 00:02.0

 1826 12:07:13.584388     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1827 12:07:13.593781     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1828 12:07:13.603776     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1829 12:07:13.606941     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1830 12:07:13.616856     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1831 12:07:13.620533      GENERIC: 0.0

 1832 12:07:13.623345     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1833 12:07:13.633958     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1834 12:07:13.647267     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1835 12:07:13.657300     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1836 12:07:13.657856      PCI: 01:00.0

 1837 12:07:13.666574      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1838 12:07:13.680033      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1839 12:07:13.680576     PCI: 00:08.0

 1840 12:07:13.683751     PCI: 00:0a.0

 1841 12:07:13.693747     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1842 12:07:13.696740     PCI: 00:0d.0 child on link 0 USB0 port 0

 1843 12:07:13.706296     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1844 12:07:13.710040      USB0 port 0 child on link 0 USB3 port 0

 1845 12:07:13.713501       USB3 port 0

 1846 12:07:13.716951       USB3 port 1

 1847 12:07:13.717516       USB3 port 2

 1848 12:07:13.719777       USB3 port 3

 1849 12:07:13.723201     PCI: 00:14.0 child on link 0 USB0 port 0

 1850 12:07:13.733465     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1851 12:07:13.736472      USB0 port 0 child on link 0 USB2 port 0

 1852 12:07:13.739870       USB2 port 0

 1853 12:07:13.740421       USB2 port 1

 1854 12:07:13.743392       USB2 port 2

 1855 12:07:13.743947       USB2 port 3

 1856 12:07:13.746450       USB2 port 4

 1857 12:07:13.750091       USB2 port 5

 1858 12:07:13.750640       USB2 port 6

 1859 12:07:13.752993       USB2 port 7

 1860 12:07:13.753562       USB2 port 8

 1861 12:07:13.756271       USB2 port 9

 1862 12:07:13.756815       USB3 port 0

 1863 12:07:13.759700       USB3 port 1

 1864 12:07:13.760208       USB3 port 2

 1865 12:07:13.763308       USB3 port 3

 1866 12:07:13.763912     PCI: 00:14.2

 1867 12:07:13.773370     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1868 12:07:13.786674     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1869 12:07:13.789623     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1870 12:07:13.799703     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1871 12:07:13.803290      GENERIC: 0.0

 1872 12:07:13.806295     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1873 12:07:13.816503     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1874 12:07:13.817063      I2C: 00:1a

 1875 12:07:13.819464      I2C: 00:31

 1876 12:07:13.819912      I2C: 00:32

 1877 12:07:13.826684     PCI: 00:15.1 child on link 0 I2C: 00:50

 1878 12:07:13.836482     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1879 12:07:13.837023      I2C: 00:50

 1880 12:07:13.840021     PCI: 00:15.2

 1881 12:07:13.843262     PCI: 00:15.3 child on link 0 I2C: 00:10

 1882 12:07:13.853140     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1883 12:07:13.856282      I2C: 00:10

 1884 12:07:13.856828     PCI: 00:16.0

 1885 12:07:13.866431     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1886 12:07:13.869251     PCI: 00:19.0

 1887 12:07:13.873033     PCI: 00:19.1 child on link 0 I2C: 00:15

 1888 12:07:13.882950     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1889 12:07:13.886121      I2C: 00:15

 1890 12:07:13.886570      I2C: 00:2c

 1891 12:07:13.889426     PCI: 00:1e.0

 1892 12:07:13.899327     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1893 12:07:13.902812     PCI: 00:1e.3 child on link 0 SPI: 00

 1894 12:07:13.912593     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1895 12:07:13.915522      SPI: 00

 1896 12:07:13.919050     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1897 12:07:13.929057     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1898 12:07:13.929617      PNP: 0c09.0

 1899 12:07:13.939104      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1900 12:07:13.942575     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1901 12:07:13.952210     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1902 12:07:13.962787     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1903 12:07:13.965460      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1904 12:07:13.968566       GENERIC: 0.0

 1905 12:07:13.969048       GENERIC: 1.0

 1906 12:07:13.972351     PCI: 00:1f.3

 1907 12:07:13.982137     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1908 12:07:13.992163     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1909 12:07:13.995720     PCI: 00:1f.5

 1910 12:07:14.005616     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1911 12:07:14.006193  Done allocating resources.

 1912 12:07:14.012483  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1913 12:07:14.018452  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1914 12:07:14.022527  Configure audio over I2S with MAX98373 NAU88L25B.

 1915 12:07:14.028122  Enabling BT offload

 1916 12:07:14.035190  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1917 12:07:14.038750  Enabling resources...

 1918 12:07:14.042175  PCI: 00:00.0 subsystem <- 8086/4609

 1919 12:07:14.045053  PCI: 00:00.0 cmd <- 06

 1920 12:07:14.048459  PCI: 00:02.0 subsystem <- 8086/46b3

 1921 12:07:14.051548  PCI: 00:02.0 cmd <- 03

 1922 12:07:14.055495  PCI: 00:04.0 subsystem <- 8086/461d

 1923 12:07:14.056047  PCI: 00:04.0 cmd <- 02

 1924 12:07:14.058815  PCI: 00:06.0 bridge ctrl <- 0013

 1925 12:07:14.062198  PCI: 00:06.0 subsystem <- 8086/464d

 1926 12:07:14.065246  PCI: 00:06.0 cmd <- 106

 1927 12:07:14.068337  PCI: 00:0a.0 subsystem <- 8086/467d

 1928 12:07:14.072156  PCI: 00:0a.0 cmd <- 02

 1929 12:07:14.075989  PCI: 00:0d.0 subsystem <- 8086/461e

 1930 12:07:14.078136  PCI: 00:0d.0 cmd <- 02

 1931 12:07:14.081967  PCI: 00:14.0 subsystem <- 8086/51ed

 1932 12:07:14.085504  PCI: 00:14.0 cmd <- 02

 1933 12:07:14.088695  PCI: 00:14.2 subsystem <- 8086/51ef

 1934 12:07:14.089265  PCI: 00:14.2 cmd <- 02

 1935 12:07:14.091299  PCI: 00:14.3 subsystem <- 8086/51f0

 1936 12:07:14.094886  PCI: 00:14.3 cmd <- 02

 1937 12:07:14.098638  PCI: 00:15.0 subsystem <- 8086/51e8

 1938 12:07:14.101774  PCI: 00:15.0 cmd <- 02

 1939 12:07:14.104595  PCI: 00:15.1 subsystem <- 8086/51e9

 1940 12:07:14.108190  PCI: 00:15.1 cmd <- 06

 1941 12:07:14.111469  PCI: 00:15.3 subsystem <- 8086/51eb

 1942 12:07:14.114711  PCI: 00:15.3 cmd <- 02

 1943 12:07:14.118421  PCI: 00:16.0 subsystem <- 8086/51e0

 1944 12:07:14.118973  PCI: 00:16.0 cmd <- 02

 1945 12:07:14.121773  PCI: 00:19.1 subsystem <- 8086/51c6

 1946 12:07:14.125269  PCI: 00:19.1 cmd <- 02

 1947 12:07:14.128206  PCI: 00:1e.0 subsystem <- 8086/51a8

 1948 12:07:14.131516  PCI: 00:1e.0 cmd <- 06

 1949 12:07:14.134975  PCI: 00:1e.3 subsystem <- 8086/51ab

 1950 12:07:14.138528  PCI: 00:1e.3 cmd <- 02

 1951 12:07:14.141426  PCI: 00:1f.0 subsystem <- 8086/5182

 1952 12:07:14.144935  PCI: 00:1f.0 cmd <- 407

 1953 12:07:14.148290  PCI: 00:1f.3 subsystem <- 8086/51c8

 1954 12:07:14.148845  PCI: 00:1f.3 cmd <- 02

 1955 12:07:14.151554  PCI: 00:1f.5 subsystem <- 8086/51a4

 1956 12:07:14.154995  PCI: 00:1f.5 cmd <- 406

 1957 12:07:14.158294  PCI: 01:00.0 cmd <- 02

 1958 12:07:14.158842  done.

 1959 12:07:14.165023  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1960 12:07:14.168121  ME: Version: Unavailable

 1961 12:07:14.171315  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1962 12:07:14.174953  Initializing devices...

 1963 12:07:14.178409  Root Device init

 1964 12:07:14.178958  mainboard: EC init

 1965 12:07:14.184843  Chrome EC: Set SMI mask to 0x0000000000000000

 1966 12:07:14.185394  Chrome EC: UHEPI supported

 1967 12:07:14.193407  Chrome EC: clear events_b mask to 0x0000000000000000

 1968 12:07:14.200023  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1969 12:07:14.206849  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1970 12:07:14.213303  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1971 12:07:14.219811  Chrome EC: Set WAKE mask to 0x0000000000000000

 1972 12:07:14.223203  Root Device init finished in 43 msecs

 1973 12:07:14.227251  PCI: 00:00.0 init

 1974 12:07:14.230115  CPU TDP = 15 Watts

 1975 12:07:14.230661  CPU PL1 = 15 Watts

 1976 12:07:14.233183  CPU PL2 = 55 Watts

 1977 12:07:14.237151  CPU PL4 = 123 Watts

 1978 12:07:14.240056  PCI: 00:00.0 init finished in 8 msecs

 1979 12:07:14.240647  PCI: 00:02.0 init

 1980 12:07:14.243531  GMA: Found VBT in CBFS

 1981 12:07:14.247042  GMA: Found valid VBT in CBFS

 1982 12:07:14.253382  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1983 12:07:14.260049                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1984 12:07:14.263524  PCI: 00:02.0 init finished in 18 msecs

 1985 12:07:14.266946  PCI: 00:06.0 init

 1986 12:07:14.267542  Initializing PCH PCIe bridge.

 1987 12:07:14.273899  PCI: 00:06.0 init finished in 3 msecs

 1988 12:07:14.274454  PCI: 00:0a.0 init

 1989 12:07:14.276563  PCI: 00:0a.0 init finished in 0 msecs

 1990 12:07:14.280109  PCI: 00:14.0 init

 1991 12:07:14.283508  PCI: 00:14.0 init finished in 0 msecs

 1992 12:07:14.286823  PCI: 00:14.2 init

 1993 12:07:14.289557  PCI: 00:14.2 init finished in 0 msecs

 1994 12:07:14.290013  PCI: 00:15.0 init

 1995 12:07:14.293374  I2C bus 0 version 0x3230302a

 1996 12:07:14.296766  DW I2C bus 0 at 0x80655000 (400 KHz)

 1997 12:07:14.299834  PCI: 00:15.0 init finished in 6 msecs

 1998 12:07:14.303533  PCI: 00:15.1 init

 1999 12:07:14.306164  I2C bus 1 version 0x3230302a

 2000 12:07:14.309634  DW I2C bus 1 at 0x80656000 (400 KHz)

 2001 12:07:14.312729  PCI: 00:15.1 init finished in 6 msecs

 2002 12:07:14.316183  PCI: 00:15.3 init

 2003 12:07:14.319458  I2C bus 3 version 0x3230302a

 2004 12:07:14.322858  DW I2C bus 3 at 0x80657000 (400 KHz)

 2005 12:07:14.326256  PCI: 00:15.3 init finished in 6 msecs

 2006 12:07:14.326771  PCI: 00:16.0 init

 2007 12:07:14.332896  PCI: 00:16.0 init finished in 0 msecs

 2008 12:07:14.333409  PCI: 00:19.1 init

 2009 12:07:14.336129  I2C bus 5 version 0x3230302a

 2010 12:07:14.339940  DW I2C bus 5 at 0x80659000 (400 KHz)

 2011 12:07:14.343303  PCI: 00:19.1 init finished in 6 msecs

 2012 12:07:14.346188  PCI: 00:1f.0 init

 2013 12:07:14.349158  IOAPIC: Initializing IOAPIC at 0xfec00000

 2014 12:07:14.353185  IOAPIC: ID = 0x02

 2015 12:07:14.356060  IOAPIC: Dumping registers

 2016 12:07:14.356613    reg 0x0000: 0x02000000

 2017 12:07:14.359584    reg 0x0001: 0x00770020

 2018 12:07:14.362495    reg 0x0002: 0x00000000

 2019 12:07:14.366291  IOAPIC: 120 interrupts

 2020 12:07:14.369374  IOAPIC: Clearing IOAPIC at 0xfec00000

 2021 12:07:14.372322  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 2022 12:07:14.379631  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 2023 12:07:14.382911  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 2024 12:07:14.389306  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 2025 12:07:14.392558  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 2026 12:07:14.396046  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 2027 12:07:14.402601  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 2028 12:07:14.405982  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 2029 12:07:14.413225  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 2030 12:07:14.415890  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 2031 12:07:14.422390  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 2032 12:07:14.426064  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2033 12:07:14.429242  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2034 12:07:14.435916  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2035 12:07:14.439708  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2036 12:07:14.445753  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2037 12:07:14.448963  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2038 12:07:14.456356  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2039 12:07:14.459094  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2040 12:07:14.465938  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2041 12:07:14.468818  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2042 12:07:14.472629  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2043 12:07:14.478889  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2044 12:07:14.482480  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2045 12:07:14.488815  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2046 12:07:14.492190  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2047 12:07:14.499153  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2048 12:07:14.502540  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2049 12:07:14.508847  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2050 12:07:14.512007  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2051 12:07:14.515806  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2052 12:07:14.522304  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2053 12:07:14.526153  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2054 12:07:14.532784  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2055 12:07:14.536162  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2056 12:07:14.542424  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2057 12:07:14.545720  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2058 12:07:14.549280  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2059 12:07:14.555399  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2060 12:07:14.558823  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2061 12:07:14.565859  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2062 12:07:14.568477  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2063 12:07:14.575500  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2064 12:07:14.579645  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2065 12:07:14.585288  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2066 12:07:14.588745  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2067 12:07:14.592067  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2068 12:07:14.598731  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2069 12:07:14.602320  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2070 12:07:14.609055  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2071 12:07:14.611978  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2072 12:07:14.618952  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2073 12:07:14.622080  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2074 12:07:14.628570  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2075 12:07:14.632311  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2076 12:07:14.635451  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2077 12:07:14.641465  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2078 12:07:14.645056  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2079 12:07:14.651897  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2080 12:07:14.655145  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2081 12:07:14.661688  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2082 12:07:14.665267  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2083 12:07:14.671744  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2084 12:07:14.675233  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2085 12:07:14.678349  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2086 12:07:14.685366  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2087 12:07:14.688391  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2088 12:07:14.695618  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2089 12:07:14.699120  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2090 12:07:14.705398  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2091 12:07:14.708405  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2092 12:07:14.711309  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2093 12:07:14.718719  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2094 12:07:14.722078  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2095 12:07:14.728073  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2096 12:07:14.731476  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2097 12:07:14.738758  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2098 12:07:14.741549  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2099 12:07:14.748498  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2100 12:07:14.751419  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2101 12:07:14.754624  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2102 12:07:14.761949  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2103 12:07:14.764983  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2104 12:07:14.771578  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2105 12:07:14.775200  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2106 12:07:14.781626  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2107 12:07:14.784839  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2108 12:07:14.791486  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2109 12:07:14.794724  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2110 12:07:14.798436  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2111 12:07:14.805613  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2112 12:07:14.808719  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2113 12:07:14.815261  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2114 12:07:14.818180  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2115 12:07:14.824799  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2116 12:07:14.828200  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2117 12:07:14.831627  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2118 12:07:14.838097  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2119 12:07:14.841583  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2120 12:07:14.848109  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2121 12:07:14.851311  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2122 12:07:14.858238  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2123 12:07:14.861599  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2124 12:07:14.868205  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2125 12:07:14.871427  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2126 12:07:14.874735  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2127 12:07:14.881263  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2128 12:07:14.884940  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2129 12:07:14.891645  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2130 12:07:14.894267  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2131 12:07:14.901293  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2132 12:07:14.904328  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2133 12:07:14.911253  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2134 12:07:14.914526  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2135 12:07:14.917836  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2136 12:07:14.924407  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2137 12:07:14.927733  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2138 12:07:14.934768  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2139 12:07:14.938184  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2140 12:07:14.944510  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2141 12:07:14.947562  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2142 12:07:14.951027  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2143 12:07:14.958533  PCI: 00:1f.0 init finished in 607 msecs

 2144 12:07:14.959098  PCI: 00:1f.2 init

 2145 12:07:14.961141  apm_control: Disabling ACPI.

 2146 12:07:14.965565  APMC done.

 2147 12:07:14.968719  PCI: 00:1f.2 init finished in 6 msecs

 2148 12:07:14.972277  PCI: 00:1f.3 init

 2149 12:07:14.975491  PCI: 00:1f.3 init finished in 0 msecs

 2150 12:07:14.976048  PCI: 01:00.0 init

 2151 12:07:14.978923  PCI: 01:00.0 init finished in 0 msecs

 2152 12:07:14.982297  PNP: 0c09.0 init

 2153 12:07:14.985616  Google Chrome EC uptime: 12.145 seconds

 2154 12:07:14.992114  Google Chrome AP resets since EC boot: 1

 2155 12:07:14.995253  Google Chrome most recent AP reset causes:

 2156 12:07:14.999032  	0.341: 32775 shutdown: entering G3

 2157 12:07:15.005575  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2158 12:07:15.008920  PNP: 0c09.0 init finished in 23 msecs

 2159 12:07:15.012029  GENERIC: 0.0 init

 2160 12:07:15.015484  GENERIC: 0.0 init finished in 0 msecs

 2161 12:07:15.016048  GENERIC: 1.0 init

 2162 12:07:15.022010  GENERIC: 1.0 init finished in 0 msecs

 2163 12:07:15.022569  Devices initialized

 2164 12:07:15.025488  Show all devs... After init.

 2165 12:07:15.028572  Root Device: enabled 1

 2166 12:07:15.031952  CPU_CLUSTER: 0: enabled 1

 2167 12:07:15.032371  DOMAIN: 0000: enabled 1

 2168 12:07:15.035411  GPIO: 0: enabled 1

 2169 12:07:15.038816  PCI: 00:00.0: enabled 1

 2170 12:07:15.039430  PCI: 00:01.0: enabled 0

 2171 12:07:15.042633  PCI: 00:01.1: enabled 0

 2172 12:07:15.045806  PCI: 00:02.0: enabled 1

 2173 12:07:15.048499  PCI: 00:04.0: enabled 1

 2174 12:07:15.048907  PCI: 00:05.0: enabled 0

 2175 12:07:15.051872  PCI: 00:06.0: enabled 1

 2176 12:07:15.055324  PCI: 00:06.2: enabled 0

 2177 12:07:15.055878  PCI: 00:07.0: enabled 0

 2178 12:07:15.058977  PCI: 00:07.1: enabled 0

 2179 12:07:15.062131  PCI: 00:07.2: enabled 0

 2180 12:07:15.065211  PCI: 00:07.3: enabled 0

 2181 12:07:15.065762  PCI: 00:08.0: enabled 0

 2182 12:07:15.068713  PCI: 00:09.0: enabled 0

 2183 12:07:15.071800  PCI: 00:0a.0: enabled 1

 2184 12:07:15.075084  PCI: 00:0d.0: enabled 1

 2185 12:07:15.075535  PCI: 00:0d.1: enabled 0

 2186 12:07:15.078553  PCI: 00:0d.2: enabled 0

 2187 12:07:15.082222  PCI: 00:0d.3: enabled 0

 2188 12:07:15.085222  PCI: 00:0e.0: enabled 0

 2189 12:07:15.085727  PCI: 00:10.0: enabled 0

 2190 12:07:15.088429  PCI: 00:10.1: enabled 0

 2191 12:07:15.091418  PCI: 00:10.6: enabled 0

 2192 12:07:15.091834  PCI: 00:10.7: enabled 0

 2193 12:07:15.095161  PCI: 00:12.0: enabled 0

 2194 12:07:15.098332  PCI: 00:12.6: enabled 0

 2195 12:07:15.101956  PCI: 00:12.7: enabled 0

 2196 12:07:15.102466  PCI: 00:13.0: enabled 0

 2197 12:07:15.105174  PCI: 00:14.0: enabled 1

 2198 12:07:15.108199  PCI: 00:14.1: enabled 0

 2199 12:07:15.111611  PCI: 00:14.2: enabled 1

 2200 12:07:15.112121  PCI: 00:14.3: enabled 1

 2201 12:07:15.115213  PCI: 00:15.0: enabled 1

 2202 12:07:15.118354  PCI: 00:15.1: enabled 1

 2203 12:07:15.121825  PCI: 00:15.2: enabled 0

 2204 12:07:15.122335  PCI: 00:15.3: enabled 1

 2205 12:07:15.125185  PCI: 00:16.0: enabled 1

 2206 12:07:15.128292  PCI: 00:16.1: enabled 0

 2207 12:07:15.132016  PCI: 00:16.2: enabled 0

 2208 12:07:15.132524  PCI: 00:16.3: enabled 0

 2209 12:07:15.135303  PCI: 00:16.4: enabled 0

 2210 12:07:15.138061  PCI: 00:16.5: enabled 0

 2211 12:07:15.138473  PCI: 00:17.0: enabled 0

 2212 12:07:15.141783  PCI: 00:19.0: enabled 0

 2213 12:07:15.145245  PCI: 00:19.1: enabled 1

 2214 12:07:15.148349  PCI: 00:19.2: enabled 0

 2215 12:07:15.148760  PCI: 00:1a.0: enabled 0

 2216 12:07:15.151788  PCI: 00:1c.0: enabled 0

 2217 12:07:15.155065  PCI: 00:1c.1: enabled 0

 2218 12:07:15.158594  PCI: 00:1c.2: enabled 0

 2219 12:07:15.159098  PCI: 00:1c.3: enabled 0

 2220 12:07:15.162160  PCI: 00:1c.4: enabled 0

 2221 12:07:15.164801  PCI: 00:1c.5: enabled 0

 2222 12:07:15.168110  PCI: 00:1c.6: enabled 0

 2223 12:07:15.168530  PCI: 00:1c.7: enabled 0

 2224 12:07:15.171517  PCI: 00:1d.0: enabled 0

 2225 12:07:15.174919  PCI: 00:1d.1: enabled 0

 2226 12:07:15.175478  PCI: 00:1d.2: enabled 0

 2227 12:07:15.178399  PCI: 00:1d.3: enabled 0

 2228 12:07:15.181533  PCI: 00:1e.0: enabled 1

 2229 12:07:15.185123  PCI: 00:1e.1: enabled 0

 2230 12:07:15.185636  PCI: 00:1e.2: enabled 0

 2231 12:07:15.188066  PCI: 00:1e.3: enabled 1

 2232 12:07:15.191770  PCI: 00:1f.0: enabled 1

 2233 12:07:15.194775  PCI: 00:1f.1: enabled 0

 2234 12:07:15.195283  PCI: 00:1f.2: enabled 1

 2235 12:07:15.198335  PCI: 00:1f.3: enabled 1

 2236 12:07:15.201646  PCI: 00:1f.4: enabled 0

 2237 12:07:15.204882  PCI: 00:1f.5: enabled 1

 2238 12:07:15.205387  PCI: 00:1f.6: enabled 0

 2239 12:07:15.208220  PCI: 00:1f.7: enabled 0

 2240 12:07:15.211447  GENERIC: 0.0: enabled 1

 2241 12:07:15.214382  GENERIC: 0.0: enabled 1

 2242 12:07:15.214792  GENERIC: 1.0: enabled 1

 2243 12:07:15.217689  GENERIC: 0.0: enabled 1

 2244 12:07:15.221196  GENERIC: 1.0: enabled 1

 2245 12:07:15.221705  USB0 port 0: enabled 1

 2246 12:07:15.224490  USB0 port 0: enabled 1

 2247 12:07:15.227913  GENERIC: 0.0: enabled 1

 2248 12:07:15.231411  I2C: 00:1a: enabled 1

 2249 12:07:15.231925  I2C: 00:31: enabled 1

 2250 12:07:15.234801  I2C: 00:32: enabled 1

 2251 12:07:15.237760  I2C: 00:50: enabled 1

 2252 12:07:15.238270  I2C: 00:10: enabled 1

 2253 12:07:15.241167  I2C: 00:15: enabled 1

 2254 12:07:15.244367  I2C: 00:2c: enabled 1

 2255 12:07:15.244871  GENERIC: 0.0: enabled 1

 2256 12:07:15.247634  SPI: 00: enabled 1

 2257 12:07:15.250920  PNP: 0c09.0: enabled 1

 2258 12:07:15.251486  GENERIC: 0.0: enabled 1

 2259 12:07:15.254190  USB3 port 0: enabled 1

 2260 12:07:15.257766  USB3 port 1: enabled 0

 2261 12:07:15.261224  USB3 port 2: enabled 1

 2262 12:07:15.261729  USB3 port 3: enabled 0

 2263 12:07:15.264162  USB2 port 0: enabled 1

 2264 12:07:15.267765  USB2 port 1: enabled 0

 2265 12:07:15.268175  USB2 port 2: enabled 1

 2266 12:07:15.270827  USB2 port 3: enabled 0

 2267 12:07:15.273925  USB2 port 4: enabled 0

 2268 12:07:15.277909  USB2 port 5: enabled 1

 2269 12:07:15.278419  USB2 port 6: enabled 0

 2270 12:07:15.281089  USB2 port 7: enabled 0

 2271 12:07:15.283981  USB2 port 8: enabled 1

 2272 12:07:15.284491  USB2 port 9: enabled 1

 2273 12:07:15.287912  USB3 port 0: enabled 1

 2274 12:07:15.291063  USB3 port 1: enabled 0

 2275 12:07:15.291608  USB3 port 2: enabled 0

 2276 12:07:15.294690  USB3 port 3: enabled 0

 2277 12:07:15.297151  GENERIC: 0.0: enabled 1

 2278 12:07:15.300558  GENERIC: 1.0: enabled 1

 2279 12:07:15.301064  APIC: 00: enabled 1

 2280 12:07:15.304097  APIC: 16: enabled 1

 2281 12:07:15.307481  APIC: 10: enabled 1

 2282 12:07:15.307986  APIC: 12: enabled 1

 2283 12:07:15.310637  APIC: 14: enabled 1

 2284 12:07:15.311141  APIC: 01: enabled 1

 2285 12:07:15.314146  APIC: 08: enabled 1

 2286 12:07:15.317235  APIC: 09: enabled 1

 2287 12:07:15.317737  PCI: 01:00.0: enabled 1

 2288 12:07:15.324008  BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms

 2289 12:07:15.327412  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2290 12:07:15.333856  ELOG: NV offset 0xf20000 size 0x4000

 2291 12:07:15.340603  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2292 12:07:15.347895  ELOG: Event(17) added with size 13 at 2023-12-07 12:07:15 UTC

 2293 12:07:15.353812  ELOG: Event(9E) added with size 10 at 2023-12-07 12:07:15 UTC

 2294 12:07:15.360496  ELOG: Event(9F) added with size 14 at 2023-12-07 12:07:15 UTC

 2295 12:07:15.367033  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2296 12:07:15.373486  ELOG: Event(A0) added with size 9 at 2023-12-07 12:07:15 UTC

 2297 12:07:15.376626  elog_add_boot_reason: Logged dev mode boot

 2298 12:07:15.383835  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2299 12:07:15.384289  Finalize devices...

 2300 12:07:15.387123  PCI: 00:16.0 final

 2301 12:07:15.387624  PCI: 00:1f.2 final

 2302 12:07:15.390696  GENERIC: 0.0 final

 2303 12:07:15.397362  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2304 12:07:15.398111  GENERIC: 1.0 final

 2305 12:07:15.403596  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2306 12:07:15.407109  Devices finalized

 2307 12:07:15.410236  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2308 12:07:15.417408  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2309 12:07:15.424140  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2310 12:07:15.427604  ME: HFSTS1                      : 0x90000245

 2311 12:07:15.431285  ME: HFSTS2                      : 0x82100116

 2312 12:07:15.437213  ME: HFSTS3                      : 0x00000050

 2313 12:07:15.440867  ME: HFSTS4                      : 0x00004000

 2314 12:07:15.444274  ME: HFSTS5                      : 0x00000000

 2315 12:07:15.450909  ME: HFSTS6                      : 0x40600006

 2316 12:07:15.454024  ME: Manufacturing Mode          : NO

 2317 12:07:15.457651  ME: SPI Protection Mode Enabled : YES

 2318 12:07:15.460804  ME: FPFs Committed              : YES

 2319 12:07:15.464259  ME: Manufacturing Vars Locked   : YES

 2320 12:07:15.467115  ME: FW Partition Table          : OK

 2321 12:07:15.473566  ME: Bringup Loader Failure      : NO

 2322 12:07:15.477143  ME: Firmware Init Complete      : YES

 2323 12:07:15.480754  ME: Boot Options Present        : NO

 2324 12:07:15.483957  ME: Update In Progress          : NO

 2325 12:07:15.487308  ME: D0i3 Support                : YES

 2326 12:07:15.490517  ME: Low Power State Enabled     : NO

 2327 12:07:15.493727  ME: CPU Replaced                : YES

 2328 12:07:15.500489  ME: CPU Replacement Valid       : YES

 2329 12:07:15.503906  ME: Current Working State       : 5

 2330 12:07:15.506919  ME: Current Operation State     : 1

 2331 12:07:15.510236  ME: Current Operation Mode      : 0

 2332 12:07:15.513984  ME: Error Code                  : 0

 2333 12:07:15.516922  ME: Enhanced Debug Mode         : NO

 2334 12:07:15.520628  ME: CPU Debug Disabled          : YES

 2335 12:07:15.523704  ME: TXT Support                 : NO

 2336 12:07:15.527140  ME: WP for RO is enabled        : YES

 2337 12:07:15.533656  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2338 12:07:15.540044  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2339 12:07:15.543476  Ramoops buffer: 0x100000@0x76899000.

 2340 12:07:15.550600  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2341 12:07:15.556688  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2342 12:07:15.560199  CBFS: 'fallback/slic' not found.

 2343 12:07:15.563769  ACPI: Writing ACPI tables at 7686d000.

 2344 12:07:15.567094  ACPI:    * FACS

 2345 12:07:15.567578  ACPI:    * DSDT

 2346 12:07:15.573379  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2347 12:07:15.578347  ACPI:    * FADT

 2348 12:07:15.578856  SCI is IRQ9

 2349 12:07:15.584974  ACPI: added table 1/32, length now 40

 2350 12:07:15.585480  ACPI:     * SSDT

 2351 12:07:15.591726  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2352 12:07:15.595011  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2353 12:07:15.601691  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2354 12:07:15.604810  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2355 12:07:15.611205  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2356 12:07:15.614743  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2357 12:07:15.621446  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2358 12:07:15.627888  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2359 12:07:15.631403  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2360 12:07:15.637794  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2361 12:07:15.641051  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2362 12:07:15.648081  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2363 12:07:15.651079  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2364 12:07:15.658037  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2365 12:07:15.665408  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2366 12:07:15.668570  PS2K: Passing 80 keymaps to kernel

 2367 12:07:15.674988  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2368 12:07:15.681609  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2369 12:07:15.688024  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2370 12:07:15.695860  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2371 12:07:15.699256  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2372 12:07:15.705837  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2373 12:07:15.712614  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2374 12:07:15.719063  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2375 12:07:15.725744  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2376 12:07:15.732495  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2377 12:07:15.736181  ACPI: added table 2/32, length now 44

 2378 12:07:15.738834  ACPI:    * MCFG

 2379 12:07:15.742239  ACPI: added table 3/32, length now 48

 2380 12:07:15.742739  ACPI:    * TPM2

 2381 12:07:15.745993  TPM2 log created at 0x7685d000

 2382 12:07:15.749398  ACPI: added table 4/32, length now 52

 2383 12:07:15.752331  ACPI:     * LPIT

 2384 12:07:15.755877  ACPI: added table 5/32, length now 56

 2385 12:07:15.756421  ACPI:    * MADT

 2386 12:07:15.759289  SCI is IRQ9

 2387 12:07:15.762455  ACPI: added table 6/32, length now 60

 2388 12:07:15.765636  cmd_reg from pmc_make_ipc_cmd 1052838

 2389 12:07:15.772585  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2390 12:07:15.779070  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2391 12:07:15.785844  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2392 12:07:15.788729  PMC CrashLog size in discovery mode: 0xC00

 2393 12:07:15.792242  cpu crashlog bar addr: 0x80640000

 2394 12:07:15.795670  cpu discovery table offset: 0x6030

 2395 12:07:15.798843  cpu_crashlog_discovery_table buffer count: 0x3

 2396 12:07:15.805540  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2397 12:07:15.812520  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2398 12:07:15.818649  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2399 12:07:15.826031  PMC crashLog size in discovery mode : 0xC00

 2400 12:07:15.831793  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2401 12:07:15.835289  discover mode PMC crashlog size adjusted to: 0x200

 2402 12:07:15.842313  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2403 12:07:15.848638  discover mode PMC crashlog size adjusted to: 0x0

 2404 12:07:15.851861  m_cpu_crashLog_size : 0x3480 bytes

 2405 12:07:15.855297  CPU crashLog present.

 2406 12:07:15.858451  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2407 12:07:15.865130  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2408 12:07:15.868972  current = 76876550

 2409 12:07:15.869521  ACPI:    * DMAR

 2410 12:07:15.871888  ACPI: added table 7/32, length now 64

 2411 12:07:15.878488  ACPI: added table 8/32, length now 68

 2412 12:07:15.879041  ACPI:    * HPET

 2413 12:07:15.881917  ACPI: added table 9/32, length now 72

 2414 12:07:15.885406  ACPI: done.

 2415 12:07:15.885957  ACPI tables: 38528 bytes.

 2416 12:07:15.888202  smbios_write_tables: 76857000

 2417 12:07:15.893143  EC returned error result code 3

 2418 12:07:15.896479  Couldn't obtain OEM name from CBI

 2419 12:07:15.899797  Create SMBIOS type 16

 2420 12:07:15.903043  Create SMBIOS type 17

 2421 12:07:15.903623  Create SMBIOS type 20

 2422 12:07:15.905898  GENERIC: 0.0 (WIFI Device)

 2423 12:07:15.909834  SMBIOS tables: 2156 bytes.

 2424 12:07:15.912864  Writing table forward entry at 0x00000500

 2425 12:07:15.919584  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2426 12:07:15.922631  Writing coreboot table at 0x76891000

 2427 12:07:15.929428   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2428 12:07:15.933003   1. 0000000000001000-000000000009ffff: RAM

 2429 12:07:15.939390   2. 00000000000a0000-00000000000fffff: RESERVED

 2430 12:07:15.943027   3. 0000000000100000-0000000076856fff: RAM

 2431 12:07:15.949285   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2432 12:07:15.952557   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2433 12:07:15.959327   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2434 12:07:15.965496   7. 0000000077000000-00000000803fffff: RESERVED

 2435 12:07:15.969386   8. 00000000c0000000-00000000cfffffff: RESERVED

 2436 12:07:15.975717   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2437 12:07:15.979414  10. 00000000fb000000-00000000fb000fff: RESERVED

 2438 12:07:15.982691  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2439 12:07:15.989443  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2440 12:07:15.992509  13. 00000000fec00000-00000000fecfffff: RESERVED

 2441 12:07:15.999145  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2442 12:07:16.002633  15. 00000000fed80000-00000000fed87fff: RESERVED

 2443 12:07:16.009227  16. 00000000fed90000-00000000fed92fff: RESERVED

 2444 12:07:16.012611  17. 00000000feda0000-00000000feda1fff: RESERVED

 2445 12:07:16.018743  18. 00000000fedc0000-00000000feddffff: RESERVED

 2446 12:07:16.022505  19. 0000000100000000-000000027fbfffff: RAM

 2447 12:07:16.025682  Passing 4 GPIOs to payload:

 2448 12:07:16.029214              NAME |       PORT | POLARITY |     VALUE

 2449 12:07:16.035495               lid |  undefined |     high |      high

 2450 12:07:16.039271             power |  undefined |     high |       low

 2451 12:07:16.045882             oprom |  undefined |     high |       low

 2452 12:07:16.052315          EC in RW | 0x00000151 |     high |      high

 2453 12:07:16.052868  Board ID: 3

 2454 12:07:16.056179  FW config: 0x131

 2455 12:07:16.059011  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 54b6

 2456 12:07:16.062449  coreboot table: 1788 bytes.

 2457 12:07:16.065685  IMD ROOT    0. 0x76fff000 0x00001000

 2458 12:07:16.072284  IMD SMALL   1. 0x76ffe000 0x00001000

 2459 12:07:16.075324  FSP MEMORY  2. 0x76afe000 0x00500000

 2460 12:07:16.079257  CONSOLE     3. 0x76ade000 0x00020000

 2461 12:07:16.082007  RW MCACHE   4. 0x76add000 0x0000043c

 2462 12:07:16.085918  RO MCACHE   5. 0x76adc000 0x00000fd8

 2463 12:07:16.088956  FMAP        6. 0x76adb000 0x0000064a

 2464 12:07:16.092062  TIME STAMP  7. 0x76ada000 0x00000910

 2465 12:07:16.095767  VBOOT WORK  8. 0x76ac6000 0x00014000

 2466 12:07:16.098836  MEM INFO    9. 0x76ac5000 0x000003b8

 2467 12:07:16.105931  ROMSTG STCK10. 0x76ac4000 0x00001000

 2468 12:07:16.109136  AFTER CAR  11. 0x76ab8000 0x0000c000

 2469 12:07:16.112008  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2470 12:07:16.115590  ACPI BERT  13. 0x76a1e000 0x00010000

 2471 12:07:16.118797  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2472 12:07:16.122153  REFCODE    15. 0x769ae000 0x0006f000

 2473 12:07:16.126026  SMM BACKUP 16. 0x7699e000 0x00010000

 2474 12:07:16.128927  IGD OPREGION17. 0x76999000 0x00004203

 2475 12:07:16.135869  RAMOOPS    18. 0x76899000 0x00100000

 2476 12:07:16.138579  COREBOOT   19. 0x76891000 0x00008000

 2477 12:07:16.142343  ACPI       20. 0x7686d000 0x00024000

 2478 12:07:16.145573  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2479 12:07:16.148982  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2480 12:07:16.152226  CPU CRASHLOG23. 0x76858000 0x00003480

 2481 12:07:16.156205  SMBIOS     24. 0x76857000 0x00001000

 2482 12:07:16.159122  IMD small region:

 2483 12:07:16.162277    IMD ROOT    0. 0x76ffec00 0x00000400

 2484 12:07:16.165524    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2485 12:07:16.169155    VPD         2. 0x76ffeb80 0x00000058

 2486 12:07:16.175223    POWER STATE 3. 0x76ffeb20 0x00000044

 2487 12:07:16.179060    ROMSTAGE    4. 0x76ffeb00 0x00000004

 2488 12:07:16.182142    ACPI GNVS   5. 0x76ffeaa0 0x00000048

 2489 12:07:16.185852    TYPE_C INFO 6. 0x76ffea80 0x0000000c

 2490 12:07:16.192086  BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms

 2491 12:07:16.195427  MTRR: Physical address space:

 2492 12:07:16.202493  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2493 12:07:16.209129  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2494 12:07:16.212317  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2495 12:07:16.218759  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2496 12:07:16.225494  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2497 12:07:16.231801  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2498 12:07:16.238953  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2499 12:07:16.242234  MTRR: Fixed MSR 0x250 0x0606060606060606

 2500 12:07:16.248465  MTRR: Fixed MSR 0x258 0x0606060606060606

 2501 12:07:16.252128  MTRR: Fixed MSR 0x259 0x0000000000000000

 2502 12:07:16.255379  MTRR: Fixed MSR 0x268 0x0606060606060606

 2503 12:07:16.258492  MTRR: Fixed MSR 0x269 0x0606060606060606

 2504 12:07:16.261853  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2505 12:07:16.268401  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2506 12:07:16.272048  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2507 12:07:16.274989  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2508 12:07:16.278707  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2509 12:07:16.284946  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2510 12:07:16.288489  call enable_fixed_mtrr()

 2511 12:07:16.291776  CPU physical address size: 39 bits

 2512 12:07:16.295073  MTRR: default type WB/UC MTRR counts: 6/6.

 2513 12:07:16.298762  MTRR: UC selected as default type.

 2514 12:07:16.305008  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2515 12:07:16.311777  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2516 12:07:16.318435  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2517 12:07:16.324753  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2518 12:07:16.331947  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2519 12:07:16.338741  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2520 12:07:16.341691  MTRR: Fixed MSR 0x250 0x0606060606060606

 2521 12:07:16.345100  MTRR: Fixed MSR 0x258 0x0606060606060606

 2522 12:07:16.351505  MTRR: Fixed MSR 0x259 0x0000000000000000

 2523 12:07:16.354897  MTRR: Fixed MSR 0x268 0x0606060606060606

 2524 12:07:16.358324  MTRR: Fixed MSR 0x269 0x0606060606060606

 2525 12:07:16.362032  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2526 12:07:16.368294  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2527 12:07:16.371959  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2528 12:07:16.374803  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2529 12:07:16.377948  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2530 12:07:16.384452  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2531 12:07:16.388230  MTRR: Fixed MSR 0x250 0x0606060606060606

 2532 12:07:16.391374  call enable_fixed_mtrr()

 2533 12:07:16.394676  MTRR: Fixed MSR 0x250 0x0606060606060606

 2534 12:07:16.397922  MTRR: Fixed MSR 0x250 0x0606060606060606

 2535 12:07:16.400822  MTRR: Fixed MSR 0x250 0x0606060606060606

 2536 12:07:16.407982  MTRR: Fixed MSR 0x258 0x0606060606060606

 2537 12:07:16.410770  MTRR: Fixed MSR 0x259 0x0000000000000000

 2538 12:07:16.414238  MTRR: Fixed MSR 0x268 0x0606060606060606

 2539 12:07:16.417279  MTRR: Fixed MSR 0x269 0x0606060606060606

 2540 12:07:16.424245  MTRR: Fixed MSR 0x250 0x0606060606060606

 2541 12:07:16.427476  CPU physical address size: 39 bits

 2542 12:07:16.431010  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2543 12:07:16.434073  MTRR: Fixed MSR 0x258 0x0606060606060606

 2544 12:07:16.437441  MTRR: Fixed MSR 0x250 0x0606060606060606

 2545 12:07:16.443950  MTRR: Fixed MSR 0x258 0x0606060606060606

 2546 12:07:16.447035  MTRR: Fixed MSR 0x259 0x0000000000000000

 2547 12:07:16.450750  MTRR: Fixed MSR 0x268 0x0606060606060606

 2548 12:07:16.454369  MTRR: Fixed MSR 0x269 0x0606060606060606

 2549 12:07:16.457509  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2550 12:07:16.464256  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2551 12:07:16.467152  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2552 12:07:16.470828  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2553 12:07:16.474131  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2554 12:07:16.480945  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2555 12:07:16.484207  MTRR: Fixed MSR 0x259 0x0000000000000000

 2556 12:07:16.487094  call enable_fixed_mtrr()

 2557 12:07:16.490616  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2558 12:07:16.494154  MTRR: Fixed MSR 0x268 0x0606060606060606

 2559 12:07:16.497464  MTRR: Fixed MSR 0x269 0x0606060606060606

 2560 12:07:16.503838  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2561 12:07:16.507405  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2562 12:07:16.510526  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2563 12:07:16.514165  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2564 12:07:16.520115  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2565 12:07:16.523679  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2566 12:07:16.526705  CPU physical address size: 39 bits

 2567 12:07:16.530417  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2568 12:07:16.533384  call enable_fixed_mtrr()

 2569 12:07:16.537338  MTRR: Fixed MSR 0x258 0x0606060606060606

 2570 12:07:16.540679  MTRR: Fixed MSR 0x258 0x0606060606060606

 2571 12:07:16.547310  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2572 12:07:16.550652  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2573 12:07:16.553750  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2574 12:07:16.557311  MTRR: Fixed MSR 0x258 0x0606060606060606

 2575 12:07:16.560099  call enable_fixed_mtrr()

 2576 12:07:16.563579  MTRR: Fixed MSR 0x259 0x0000000000000000

 2577 12:07:16.570412  MTRR: Fixed MSR 0x268 0x0606060606060606

 2578 12:07:16.573277  MTRR: Fixed MSR 0x269 0x0606060606060606

 2579 12:07:16.576359  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2580 12:07:16.579991  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2581 12:07:16.582822  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2582 12:07:16.590081  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2583 12:07:16.593152  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2584 12:07:16.596509  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2585 12:07:16.599557  CPU physical address size: 39 bits

 2586 12:07:16.603315  CPU physical address size: 39 bits

 2587 12:07:16.606048  call enable_fixed_mtrr()

 2588 12:07:16.609731  MTRR: Fixed MSR 0x259 0x0000000000000000

 2589 12:07:16.615960  MTRR: Fixed MSR 0x259 0x0000000000000000

 2590 12:07:16.619711  MTRR: Fixed MSR 0x268 0x0606060606060606

 2591 12:07:16.622602  MTRR: Fixed MSR 0x269 0x0606060606060606

 2592 12:07:16.626290  MTRR: Fixed MSR 0x268 0x0606060606060606

 2593 12:07:16.632596  MTRR: Fixed MSR 0x269 0x0606060606060606

 2594 12:07:16.636388  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2595 12:07:16.639267  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2596 12:07:16.642569  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2597 12:07:16.646106  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2598 12:07:16.652319  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2599 12:07:16.656200  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2600 12:07:16.659309  CPU physical address size: 39 bits

 2601 12:07:16.662478  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2602 12:07:16.665816  call enable_fixed_mtrr()

 2603 12:07:16.669316  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2604 12:07:16.675652  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2605 12:07:16.678884  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2606 12:07:16.683027  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2607 12:07:16.685590  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2608 12:07:16.692227  CPU physical address size: 39 bits

 2609 12:07:16.695666  call enable_fixed_mtrr()

 2610 12:07:16.698757  CPU physical address size: 39 bits

 2611 12:07:16.699304  

 2612 12:07:16.699699  MTRR check

 2613 12:07:16.702320  Fixed MTRRs   : Enabled

 2614 12:07:16.705510  Variable MTRRs: Enabled

 2615 12:07:16.706058  

 2616 12:07:16.712280  BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms

 2617 12:07:16.715625  Checking cr50 for pending updates

 2618 12:07:16.726936  Reading cr50 TPM mode

 2619 12:07:16.741245  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2620 12:07:16.751733  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2621 12:07:16.754610  Checking segment from ROM address 0xf96cbe6c

 2622 12:07:16.757794  Checking segment from ROM address 0xf96cbe88

 2623 12:07:16.765247  Loading segment from ROM address 0xf96cbe6c

 2624 12:07:16.765801    code (compression=1)

 2625 12:07:16.774840    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2626 12:07:16.781672  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2627 12:07:16.784783  using LZMA

 2628 12:07:16.807444  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2629 12:07:16.813936  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2630 12:07:16.821835  Loading segment from ROM address 0xf96cbe88

 2631 12:07:16.825422    Entry Point 0x30000000

 2632 12:07:16.825990  Loaded segments

 2633 12:07:16.831459  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2634 12:07:16.838987  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2635 12:07:16.841355  Finalizing chipset.

 2636 12:07:16.841805  apm_control: Finalizing SMM.

 2637 12:07:16.845231  APMC done.

 2638 12:07:16.848128  HECI: CSE device 16.1 is disabled

 2639 12:07:16.851856  HECI: CSE device 16.2 is disabled

 2640 12:07:16.854839  HECI: CSE device 16.3 is disabled

 2641 12:07:16.859088  HECI: CSE device 16.4 is disabled

 2642 12:07:16.861522  HECI: CSE device 16.5 is disabled

 2643 12:07:16.865129  HECI: Sending End-of-Post

 2644 12:07:16.873232  CSE: EOP requested action: continue boot

 2645 12:07:16.876277  CSE EOP successful, continuing boot

 2646 12:07:16.883294  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2647 12:07:16.886241  mp_park_aps done after 0 msecs.

 2648 12:07:16.889943  Jumping to boot code at 0x30000000(0x76891000)

 2649 12:07:16.899828  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2650 12:07:16.904115  

 2651 12:07:16.904610  

 2652 12:07:16.904927  

 2653 12:07:16.907327  Starting depthcharge on Volmar...

 2654 12:07:16.907883  

 2655 12:07:16.909565  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2656 12:07:16.910070  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2657 12:07:16.910656  Setting prompt string to ['brya:']
 2658 12:07:16.911295  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2659 12:07:16.913660  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2660 12:07:16.914072  

 2661 12:07:16.920707  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2662 12:07:16.921222  

 2663 12:07:16.927183  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2664 12:07:16.927773  

 2665 12:07:16.930970  configure_storage: Failed to remap 1C:2

 2666 12:07:16.931526  

 2667 12:07:16.931855  Wipe memory regions:

 2668 12:07:16.934091  

 2669 12:07:16.937606  	[0x00000000001000, 0x000000000a0000)

 2670 12:07:16.938112  

 2671 12:07:16.940391  	[0x00000000100000, 0x00000030000000)

 2672 12:07:17.046743  

 2673 12:07:17.049442  	[0x00000032668e60, 0x00000076857000)

 2674 12:07:17.197624  

 2675 12:07:17.200999  	[0x00000100000000, 0x0000027fc00000)

 2676 12:07:18.026902  

 2677 12:07:18.030194  ec_init: CrosEC protocol v3 supported (256, 256)

 2678 12:07:18.640308  

 2679 12:07:18.640856  R8152: Initializing

 2680 12:07:18.641210  

 2681 12:07:18.643496  Version 9 (ocp_data = 6010)

 2682 12:07:18.644038  

 2683 12:07:18.646879  R8152: Done initializing

 2684 12:07:18.647482  

 2685 12:07:18.649916  Adding net device

 2686 12:07:18.951959  

 2687 12:07:18.955275  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2688 12:07:18.955881  

 2689 12:07:18.956234  

 2690 12:07:18.956556  

 2691 12:07:18.957342  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2693 12:07:19.058651  brya: tftpboot 192.168.201.1 12207102/tftp-deploy-1f0_5gpc/kernel/bzImage 12207102/tftp-deploy-1f0_5gpc/kernel/cmdline 12207102/tftp-deploy-1f0_5gpc/ramdisk/ramdisk.cpio.gz

 2694 12:07:19.060212  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2695 12:07:19.060665  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2696 12:07:19.065688  tftpboot 192.168.201.1 12207102/tftp-deploy-1f0_5gpc/kernel/bzImploy-1f0_5gpc/kernel/cmdline 12207102/tftp-deploy-1f0_5gpc/ramdisk/ramdisk.cpio.gz

 2697 12:07:19.065873  

 2698 12:07:19.065973  Waiting for link

 2699 12:07:19.268526  

 2700 12:07:19.269070  done.

 2701 12:07:19.269516  

 2702 12:07:19.270042  MAC: 00:e0:4c:68:00:8b

 2703 12:07:19.270383  

 2704 12:07:19.271318  Sending DHCP discover... done.

 2705 12:07:19.271750  

 2706 12:07:19.274905  Waiting for reply... done.

 2707 12:07:19.275677  

 2708 12:07:19.277980  Sending DHCP request... done.

 2709 12:07:19.278427  

 2710 12:07:19.286174  Waiting for reply... done.

 2711 12:07:19.286776  

 2712 12:07:19.287137  My ip is 192.168.201.16

 2713 12:07:19.287525  

 2714 12:07:19.288811  The DHCP server ip is 192.168.201.1

 2715 12:07:19.292035  

 2716 12:07:19.294999  TFTP server IP predefined by user: 192.168.201.1

 2717 12:07:19.295486  

 2718 12:07:19.302386  Bootfile predefined by user: 12207102/tftp-deploy-1f0_5gpc/kernel/bzImage

 2719 12:07:19.302987  

 2720 12:07:19.305304  Sending tftp read request... done.

 2721 12:07:19.305755  

 2722 12:07:19.314184  Waiting for the transfer... 

 2723 12:07:19.314637  

 2724 12:07:19.721332  00000000 ################################################################

 2725 12:07:19.721980  

 2726 12:07:20.083525  00080000 ################################################################

 2727 12:07:20.083665  

 2728 12:07:20.369759  00100000 ################################################################

 2729 12:07:20.369920  

 2730 12:07:20.651402  00180000 ################################################################

 2731 12:07:20.651542  

 2732 12:07:20.933963  00200000 ################################################################

 2733 12:07:20.934126  

 2734 12:07:21.182263  00280000 ################################################################

 2735 12:07:21.182416  

 2736 12:07:21.430347  00300000 ################################################################

 2737 12:07:21.430495  

 2738 12:07:21.678993  00380000 ################################################################

 2739 12:07:21.679151  

 2740 12:07:21.945887  00400000 ################################################################

 2741 12:07:21.946045  

 2742 12:07:22.241231  00480000 ################################################################

 2743 12:07:22.241362  

 2744 12:07:22.536974  00500000 ################################################################

 2745 12:07:22.537101  

 2746 12:07:22.829590  00580000 ################################################################

 2747 12:07:22.829743  

 2748 12:07:23.122780  00600000 ################################################################

 2749 12:07:23.122917  

 2750 12:07:23.416612  00680000 ################################################################

 2751 12:07:23.416739  

 2752 12:07:23.711505  00700000 ################################################################

 2753 12:07:23.711631  

 2754 12:07:24.007074  00780000 ################################################################

 2755 12:07:24.007208  

 2756 12:07:24.300830  00800000 ################################################################

 2757 12:07:24.300970  

 2758 12:07:24.595645  00880000 ################################################################

 2759 12:07:24.595785  

 2760 12:07:24.884460  00900000 ################################################################

 2761 12:07:24.884613  

 2762 12:07:25.235441  00980000 ################################################################

 2763 12:07:25.236020  

 2764 12:07:25.615562  00a00000 ################################################################

 2765 12:07:25.616052  

 2766 12:07:25.920241  00a80000 ################################################################

 2767 12:07:25.920388  

 2768 12:07:26.185331  00b00000 ################################################################

 2769 12:07:26.185458  

 2770 12:07:26.453357  00b80000 ################################################################

 2771 12:07:26.453494  

 2772 12:07:26.746732  00c00000 ################################################################

 2773 12:07:26.746892  

 2774 12:07:27.025556  00c80000 ################################################################

 2775 12:07:27.025710  

 2776 12:07:27.296368  00d00000 ############################################################# done.

 2777 12:07:27.296498  

 2778 12:07:27.299861  The bootfile was 14129248 bytes long.

 2779 12:07:27.299951  

 2780 12:07:27.303129  Sending tftp read request... done.

 2781 12:07:27.303216  

 2782 12:07:27.306198  Waiting for the transfer... 

 2783 12:07:27.306291  

 2784 12:07:27.638687  00000000 ################################################################

 2785 12:07:27.638823  

 2786 12:07:27.934493  00080000 ################################################################

 2787 12:07:27.934626  

 2788 12:07:28.228613  00100000 ################################################################

 2789 12:07:28.228737  

 2790 12:07:28.511915  00180000 ################################################################

 2791 12:07:28.512058  

 2792 12:07:28.781880  00200000 ################################################################

 2793 12:07:28.782039  

 2794 12:07:29.075039  00280000 ################################################################

 2795 12:07:29.075178  

 2796 12:07:29.345849  00300000 ################################################################

 2797 12:07:29.346038  

 2798 12:07:29.640540  00380000 ################################################################

 2799 12:07:29.640672  

 2800 12:07:29.934825  00400000 ################################################################

 2801 12:07:29.934974  

 2802 12:07:30.193618  00480000 ################################################################

 2803 12:07:30.193769  

 2804 12:07:30.459218  00500000 ################################################################

 2805 12:07:30.459406  

 2806 12:07:30.702748  00580000 ####################################################### done.

 2807 12:07:30.702893  

 2808 12:07:30.706292  Sending tftp read request... done.

 2809 12:07:30.706380  

 2810 12:07:30.709159  Waiting for the transfer... 

 2811 12:07:30.709245  

 2812 12:07:30.712608  00000000 # done.

 2813 12:07:30.712781  

 2814 12:07:30.719780  Command line loaded dynamically from TFTP file: 12207102/tftp-deploy-1f0_5gpc/kernel/cmdline

 2815 12:07:30.722878  

 2816 12:07:30.746436  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12207102/extract-nfsrootfs-2he3cwg9,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2817 12:07:30.751863  

 2818 12:07:30.754840  Shutting down all USB controllers.

 2819 12:07:30.755234  

 2820 12:07:30.755510  Removing current net device

 2821 12:07:30.755730  

 2822 12:07:30.758699  Finalizing coreboot

 2823 12:07:30.759111  

 2824 12:07:30.765349  Exiting depthcharge with code 4 at timestamp: 24119618

 2825 12:07:30.765895  

 2826 12:07:30.766246  

 2827 12:07:30.766576  Starting kernel ...

 2828 12:07:30.766890  

 2829 12:07:30.767200  

 2830 12:07:30.768583  end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
 2831 12:07:30.769089  start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
 2832 12:07:30.769475  Setting prompt string to ['Linux version [0-9]']
 2833 12:07:30.769838  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2834 12:07:30.770199  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2836 12:11:57.770010  end: 2.2.5 auto-login-action (duration 00:04:27) [common]
 2838 12:11:57.771061  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
 2840 12:11:57.771909  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2843 12:11:57.773249  end: 2 depthcharge-action (duration 00:05:00) [common]
 2845 12:11:57.774386  Cleaning after the job
 2846 12:11:57.774818  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/ramdisk
 2847 12:11:57.775784  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/kernel
 2848 12:11:57.777864  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/nfsrootfs
 2849 12:11:57.853749  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207102/tftp-deploy-1f0_5gpc/modules
 2850 12:11:57.854441  start: 5.1 power-off (timeout 00:00:30) [common]
 2851 12:11:57.854612  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
 2852 12:11:57.938311  >> Command sent successfully.

 2853 12:11:57.949982  Returned 0 in 0 seconds
 2854 12:11:58.051500  end: 5.1 power-off (duration 00:00:00) [common]
 2856 12:11:58.053019  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2857 12:11:58.054316  Listened to connection for namespace 'common' for up to 1s
 2859 12:11:58.055694  Listened to connection for namespace 'common' for up to 1s
 2860 12:11:59.055037  Finalising connection for namespace 'common'
 2861 12:11:59.055760  Disconnecting from shell: Finalise
 2862 12:11:59.056196  
 2863 12:11:59.157423  end: 5.2 read-feedback (duration 00:00:01) [common]
 2864 12:11:59.158040  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12207102
 2865 12:11:59.472519  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12207102
 2866 12:11:59.472713  JobError: Your job cannot terminate cleanly.