Boot log: acer-chromebox-cxi5-brask

    1 14:16:11.612836  lava-dispatcher, installed at version: 2024.01
    2 14:16:11.612992  start: 0 validate
    3 14:16:11.613097  Start time: 2024-02-05 14:16:11.613090+00:00 (UTC)
    4 14:16:11.613193  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:16:11.613304  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:16:11.879118  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:16:11.879672  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.209-cip44-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:16:12.148313  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:16:12.148920  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.209-cip44-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:16:31.989921  validate duration: 20.38
   12 14:16:31.990173  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:16:31.990265  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:16:31.990344  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:16:31.990455  Not decompressing ramdisk as can be used compressed.
   16 14:16:31.990535  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 14:16:31.990593  saving as /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/ramdisk/rootfs.cpio.gz
   18 14:16:31.990657  total size: 8418130 (8 MB)
   19 14:16:32.909254  progress   0 % (0 MB)
   20 14:16:32.914550  progress   5 % (0 MB)
   21 14:16:32.916068  progress  10 % (0 MB)
   22 14:16:32.917598  progress  15 % (1 MB)
   23 14:16:32.919103  progress  20 % (1 MB)
   24 14:16:32.920613  progress  25 % (2 MB)
   25 14:16:32.922121  progress  30 % (2 MB)
   26 14:16:32.923511  progress  35 % (2 MB)
   27 14:16:32.925025  progress  40 % (3 MB)
   28 14:16:32.926535  progress  45 % (3 MB)
   29 14:16:32.928011  progress  50 % (4 MB)
   30 14:16:32.929499  progress  55 % (4 MB)
   31 14:16:32.930984  progress  60 % (4 MB)
   32 14:16:32.932365  progress  65 % (5 MB)
   33 14:16:32.933869  progress  70 % (5 MB)
   34 14:16:32.935340  progress  75 % (6 MB)
   35 14:16:32.936823  progress  80 % (6 MB)
   36 14:16:32.938299  progress  85 % (6 MB)
   37 14:16:32.939770  progress  90 % (7 MB)
   38 14:16:32.941254  progress  95 % (7 MB)
   39 14:16:32.942639  progress 100 % (8 MB)
   40 14:16:32.942805  8 MB downloaded in 0.95 s (8.43 MB/s)
   41 14:16:32.942940  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:16:32.943133  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:16:32.943200  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:16:32.943264  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:16:32.943370  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.209-cip44-rebase/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 14:16:32.943427  saving as /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/kernel/bzImage
   48 14:16:32.943472  total size: 14127264 (13 MB)
   49 14:16:32.943518  No compression specified
   50 14:16:33.210027  progress   0 % (0 MB)
   51 14:16:33.221663  progress   5 % (0 MB)
   52 14:16:33.230185  progress  10 % (1 MB)
   53 14:16:33.234266  progress  15 % (2 MB)
   54 14:16:33.237037  progress  20 % (2 MB)
   55 14:16:33.239432  progress  25 % (3 MB)
   56 14:16:33.241953  progress  30 % (4 MB)
   57 14:16:33.244347  progress  35 % (4 MB)
   58 14:16:33.246875  progress  40 % (5 MB)
   59 14:16:33.249372  progress  45 % (6 MB)
   60 14:16:33.251763  progress  50 % (6 MB)
   61 14:16:33.254271  progress  55 % (7 MB)
   62 14:16:33.256690  progress  60 % (8 MB)
   63 14:16:33.259249  progress  65 % (8 MB)
   64 14:16:33.261660  progress  70 % (9 MB)
   65 14:16:33.264129  progress  75 % (10 MB)
   66 14:16:33.266486  progress  80 % (10 MB)
   67 14:16:33.268960  progress  85 % (11 MB)
   68 14:16:33.271422  progress  90 % (12 MB)
   69 14:16:33.273798  progress  95 % (12 MB)
   70 14:16:33.276271  progress 100 % (13 MB)
   71 14:16:33.276363  13 MB downloaded in 0.33 s (40.47 MB/s)
   72 14:16:33.276498  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:16:33.276685  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:16:33.276753  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:16:33.276815  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:16:33.276924  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.209-cip44-rebase/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 14:16:33.276980  saving as /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/modules/modules.tar
   79 14:16:33.277026  total size: 527196 (0 MB)
   80 14:16:33.277074  Using unxz to decompress xz
   81 14:16:33.280205  progress   6 % (0 MB)
   82 14:16:33.280521  progress  12 % (0 MB)
   83 14:16:33.280711  progress  18 % (0 MB)
   84 14:16:33.281893  progress  24 % (0 MB)
   85 14:16:33.283484  progress  31 % (0 MB)
   86 14:16:33.285285  progress  37 % (0 MB)
   87 14:16:33.287119  progress  43 % (0 MB)
   88 14:16:33.289083  progress  49 % (0 MB)
   89 14:16:33.290797  progress  55 % (0 MB)
   90 14:16:33.292448  progress  62 % (0 MB)
   91 14:16:33.294199  progress  68 % (0 MB)
   92 14:16:33.295963  progress  74 % (0 MB)
   93 14:16:33.297806  progress  80 % (0 MB)
   94 14:16:33.299550  progress  87 % (0 MB)
   95 14:16:33.301174  progress  93 % (0 MB)
   96 14:16:33.302874  progress  99 % (0 MB)
   97 14:16:33.309372  0 MB downloaded in 0.03 s (15.55 MB/s)
   98 14:16:33.309594  end: 1.3.1 http-download (duration 00:00:00) [common]
  100 14:16:33.309846  end: 1.3 download-retry (duration 00:00:00) [common]
  101 14:16:33.309935  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  102 14:16:33.310037  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  103 14:16:33.310107  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  104 14:16:33.310178  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  105 14:16:33.310347  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um
  106 14:16:33.310455  makedir: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin
  107 14:16:33.310541  makedir: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/tests
  108 14:16:33.310620  makedir: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/results
  109 14:16:33.310714  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-add-keys
  110 14:16:33.310833  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-add-sources
  111 14:16:33.310927  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-background-process-start
  112 14:16:33.311020  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-background-process-stop
  113 14:16:33.311111  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-common-functions
  114 14:16:33.311200  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-echo-ipv4
  115 14:16:33.311289  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-install-packages
  116 14:16:33.311379  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-installed-packages
  117 14:16:33.311467  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-os-build
  118 14:16:33.311555  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-probe-channel
  119 14:16:33.311643  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-probe-ip
  120 14:16:33.311731  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-target-ip
  121 14:16:33.311826  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-target-mac
  122 14:16:33.311913  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-target-storage
  123 14:16:33.312005  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-case
  124 14:16:33.312091  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-event
  125 14:16:33.312178  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-feedback
  126 14:16:33.312265  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-raise
  127 14:16:33.312353  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-reference
  128 14:16:33.312456  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-runner
  129 14:16:33.312554  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-set
  130 14:16:33.312642  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-test-shell
  131 14:16:33.312734  Updating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-install-packages (oe)
  132 14:16:33.312849  Updating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/bin/lava-installed-packages (oe)
  133 14:16:33.312938  Creating /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/environment
  134 14:16:33.313014  LAVA metadata
  135 14:16:33.313074  - LAVA_JOB_ID=12704046
  136 14:16:33.313127  - LAVA_DISPATCHER_IP=192.168.201.1
  137 14:16:33.313207  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  138 14:16:33.313259  skipped lava-vland-overlay
  139 14:16:33.313318  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  140 14:16:33.313379  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  141 14:16:33.313428  skipped lava-multinode-overlay
  142 14:16:33.313484  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  143 14:16:33.313545  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  144 14:16:33.313602  Loading test definitions
  145 14:16:33.313680  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  146 14:16:33.313743  Using /lava-12704046 at stage 0
  147 14:16:33.313968  uuid=12704046_1.4.2.3.1 testdef=None
  148 14:16:33.314038  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  149 14:16:33.314103  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  150 14:16:33.314523  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  152 14:16:33.314697  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  153 14:16:33.315199  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  155 14:16:33.315385  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  156 14:16:33.315863  runner path: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/0/tests/0_dmesg test_uuid 12704046_1.4.2.3.1
  157 14:16:33.315981  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  159 14:16:33.316165  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  160 14:16:33.316220  Using /lava-12704046 at stage 1
  161 14:16:33.316446  uuid=12704046_1.4.2.3.5 testdef=None
  162 14:16:33.316525  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  163 14:16:33.316589  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  164 14:16:33.316940  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  166 14:16:33.317110  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  167 14:16:33.317584  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  169 14:16:33.317756  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  170 14:16:33.318236  runner path: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/1/tests/1_bootrr test_uuid 12704046_1.4.2.3.5
  171 14:16:33.318344  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  173 14:16:33.318504  Creating lava-test-runner.conf files
  174 14:16:33.318552  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/0 for stage 0
  175 14:16:33.318616  - 0_dmesg
  176 14:16:33.318680  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12704046/lava-overlay-gn9ox5um/lava-12704046/1 for stage 1
  177 14:16:33.318749  - 1_bootrr
  178 14:16:33.318821  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  179 14:16:33.318886  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  180 14:16:33.324935  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  181 14:16:33.325024  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  182 14:16:33.325091  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  183 14:16:33.325155  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  184 14:16:33.325220  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  185 14:16:33.487092  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  186 14:16:33.487346  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  187 14:16:33.487439  extracting modules file /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12704046/extract-overlay-ramdisk-kx14ahk1/ramdisk
  188 14:16:33.502362  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  189 14:16:33.502487  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  190 14:16:33.502565  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12704046/compress-overlay-lesnxrwg/overlay-1.4.2.4.tar.gz to ramdisk
  191 14:16:33.502624  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12704046/compress-overlay-lesnxrwg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12704046/extract-overlay-ramdisk-kx14ahk1/ramdisk
  192 14:16:33.508126  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  193 14:16:33.508219  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  194 14:16:33.508295  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  195 14:16:33.508363  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  196 14:16:33.508450  Building ramdisk /var/lib/lava/dispatcher/tmp/12704046/extract-overlay-ramdisk-kx14ahk1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12704046/extract-overlay-ramdisk-kx14ahk1/ramdisk
  197 14:16:33.571061  >> 54152 blocks

  198 14:16:34.351754  rename /var/lib/lava/dispatcher/tmp/12704046/extract-overlay-ramdisk-kx14ahk1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/ramdisk/ramdisk.cpio.gz
  199 14:16:34.352101  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  200 14:16:34.352215  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  201 14:16:34.352301  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  202 14:16:34.352375  No mkimage arch provided, not using FIT.
  203 14:16:34.352466  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  204 14:16:34.352554  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  205 14:16:34.352649  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  206 14:16:34.352733  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  207 14:16:34.352801  No LXC device requested
  208 14:16:34.352872  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  209 14:16:34.352942  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  210 14:16:34.353006  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  211 14:16:34.353065  Checking files for TFTP limit of 4294967296 bytes.
  212 14:16:34.353370  end: 1 tftp-deploy (duration 00:00:02) [common]
  213 14:16:34.353449  start: 2 depthcharge-action (timeout 00:05:00) [common]
  214 14:16:34.353519  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  215 14:16:34.353613  substitutions:
  216 14:16:34.353668  - {DTB}: None
  217 14:16:34.353730  - {INITRD}: 12704046/tftp-deploy-tlgcgm_u/ramdisk/ramdisk.cpio.gz
  218 14:16:34.353775  - {KERNEL}: 12704046/tftp-deploy-tlgcgm_u/kernel/bzImage
  219 14:16:34.353820  - {LAVA_MAC}: None
  220 14:16:34.353864  - {PRESEED_CONFIG}: None
  221 14:16:34.353909  - {PRESEED_LOCAL}: None
  222 14:16:34.353953  - {RAMDISK}: 12704046/tftp-deploy-tlgcgm_u/ramdisk/ramdisk.cpio.gz
  223 14:16:34.353997  - {ROOT_PART}: None
  224 14:16:34.354040  - {ROOT}: None
  225 14:16:34.354086  - {SERVER_IP}: 192.168.201.1
  226 14:16:34.354129  - {TEE}: None
  227 14:16:34.354173  Parsed boot commands:
  228 14:16:34.354217  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  229 14:16:34.354347  Parsed boot commands: tftpboot 192.168.201.1 12704046/tftp-deploy-tlgcgm_u/kernel/bzImage 12704046/tftp-deploy-tlgcgm_u/kernel/cmdline 12704046/tftp-deploy-tlgcgm_u/ramdisk/ramdisk.cpio.gz
  230 14:16:34.354425  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  231 14:16:34.354493  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  232 14:16:34.354564  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  233 14:16:34.354628  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  234 14:16:34.354685  Not connected, no need to disconnect.
  235 14:16:34.354758  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  236 14:16:34.354843  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  237 14:16:34.354897  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi5-brask-cbg-6'
  238 14:16:34.357431  Setting prompt string to ['lava-test: # ']
  239 14:16:34.357689  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  240 14:16:34.357788  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  241 14:16:34.357880  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  242 14:16:34.357949  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  243 14:16:34.358097  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-6' '--port=1' '--command=reboot'
  244 14:16:39.499803  >> Command sent successfully.

  245 14:16:39.505787  Returned 0 in 5 seconds
  246 14:16:39.606377  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  248 14:16:39.607517  end: 2.2.2 reset-device (duration 00:00:05) [common]
  249 14:16:39.607877  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  250 14:16:39.608189  Setting prompt string to 'Starting depthcharge on Moli...'
  251 14:16:39.608470  Changing prompt to 'Starting depthcharge on Moli...'
  252 14:16:39.608728  depthcharge-start: Wait for prompt Starting depthcharge on Moli... (timeout 00:05:00)
  253 14:16:39.609578  [Enter `^Ec?' for help]

  254 14:16:40.814911  

  255 14:16:40.815375  

  256 14:16:40.824640  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 bootblock starting (log level: 8)...

  257 14:16:40.828020  CPU: Intel(R) Celeron(R) 7305

  258 14:16:40.831159  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  259 14:16:40.838278  CPU: AES supported, TXT NOT supported, VT supported

  260 14:16:40.844797  Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384

  261 14:16:40.848301  Cache size = 8 MiB

  262 14:16:40.851813  MCH: device id 4619 (rev 04) is Alderlake-P

  263 14:16:40.858290  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  264 14:16:40.861737  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  265 14:16:40.864986  VBOOT: Loading verstage.

  266 14:16:40.868045  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  267 14:16:40.874809  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  268 14:16:40.878105  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  269 14:16:40.888563  CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes

  270 14:16:40.895539  CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908

  271 14:16:40.895927  

  272 14:16:40.896180  

  273 14:16:40.908802  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 verstage starting (log level: 8)...

  274 14:16:40.915066  Probing TPM I2C: I2C bus 1 version 0x3230302a

  275 14:16:40.918368  DW I2C bus 1 at 0xfe022000 (400 KHz)

  276 14:16:40.921715  I2C TX abort detected (00000001)

  277 14:16:40.924698  cr50_i2c_read: Address write failed

  278 14:16:40.935900  .done! DID_VID 0x00281ae0

  279 14:16:40.939097  TPM ready after 0 ms

  280 14:16:40.942818  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  281 14:16:40.956536  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9

  282 14:16:40.962958  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  283 14:16:41.015919  tlcl_send_startup: Startup return code is 0

  284 14:16:41.016383  TPM: setup succeeded

  285 14:16:41.035359  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  286 14:16:41.057608  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  287 14:16:41.061653  Chrome EC: UHEPI supported

  288 14:16:41.064520  Reading cr50 boot mode

  289 14:16:41.079526  Cr50 says boot_mode is VERIFIED_RW(0x00).

  290 14:16:41.080034  Phase 1

  291 14:16:41.085996  FMAP: area GBB found @ 1805000 (458752 bytes)

  292 14:16:41.092553  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  293 14:16:41.099191  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  294 14:16:41.106481  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  295 14:16:41.108873  Phase 2

  296 14:16:41.109230  Phase 3

  297 14:16:41.112239  FMAP: area GBB found @ 1805000 (458752 bytes)

  298 14:16:41.119532  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  299 14:16:41.122441  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  300 14:16:41.129016  VB2:vb2_verify_keyblock() Checking keyblock signature...

  301 14:16:41.135942  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  302 14:16:41.145815  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  303 14:16:41.152835  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  304 14:16:41.165529  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  305 14:16:41.168935  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  306 14:16:41.175724  VB2:vb2_verify_fw_preamble() Verifying preamble.

  307 14:16:41.182361  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  308 14:16:41.189044  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  309 14:16:41.195511  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  310 14:16:41.200060  Phase 4

  311 14:16:41.203562  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  312 14:16:41.209772  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  313 14:16:41.437733  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  314 14:16:41.444461  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  315 14:16:41.447994  Saving vboot hash.

  316 14:16:41.454575  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  317 14:16:41.470533  tlcl_extend: response is 0

  318 14:16:41.477163  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  319 14:16:41.483639  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  320 14:16:41.498202  tlcl_extend: response is 0

  321 14:16:41.504683  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  322 14:16:41.523218  tlcl_lock_nv_write: response is 0

  323 14:16:41.540929  tlcl_lock_nv_write: response is 0

  324 14:16:41.541369  Slot B is selected

  325 14:16:41.547405  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  326 14:16:41.554433  CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes

  327 14:16:41.560678  CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600

  328 14:16:41.567722  BS: verstage times (exec / console): total (unknown) / 267 ms

  329 14:16:41.568194  

  330 14:16:41.568481  

  331 14:16:41.577572  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 romstage starting (log level: 8)...

  332 14:16:41.580654  Google Chrome EC: version:

  333 14:16:41.584181  	ro: moli_v2.0.19454-8a70cbdcf0

  334 14:16:41.587869  	rw: moli_v2.0.22464-d4ba27cabb

  335 14:16:41.591067    running image: 2

  336 14:16:41.594293  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  337 14:16:41.604249  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  338 14:16:41.610885  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  339 14:16:41.617529  CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc

  340 14:16:41.627585  VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  341 14:16:41.637698  VB2:check_ec_hash()            Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  342 14:16:41.640683  EC took 940us to calculate image hash

  343 14:16:41.651127  VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  344 14:16:41.657582  VB2:sync_ec() select_rw=RW(active)

  345 14:16:41.663171  EC returned error result code 1

  346 14:16:41.667135  PARAM_LIMIT_POWER not supported by EC.

  347 14:16:41.670269  Waited 7362us to clear limit power flag.

  348 14:16:41.678486  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  349 14:16:41.681933  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  350 14:16:41.685485  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  351 14:16:41.688721  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  352 14:16:41.695532  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  353 14:16:41.696024  TCO_STS:   0000 0000

  354 14:16:41.698870  GEN_PMCON: d0015038 00002200

  355 14:16:41.701988  GBLRST_CAUSE: 00000000 00000000

  356 14:16:41.705352  HPR_CAUSE0: 00000000

  357 14:16:41.705826  prev_sleep_state 5

  358 14:16:41.712292  Abort disabling TXT, as CPU is not TXT capable.

  359 14:16:41.719206  cse_lite: Number of partitions = 3

  360 14:16:41.722214  cse_lite: Current partition = RO

  361 14:16:41.722668  cse_lite: Next partition = RO

  362 14:16:41.725621  cse_lite: Flags = 0x7

  363 14:16:41.732521  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)

  364 14:16:41.742405  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)

  365 14:16:41.745400  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  366 14:16:41.751935  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  367 14:16:41.758716  cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000

  368 14:16:41.765579  CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4

  369 14:16:41.768605  cse_lite: CSE CBFS RW version : 16.1.25.2049

  370 14:16:41.771976  CSE Sub-partition update not required

  371 14:16:41.778425  cse_lite: Set Boot Partition Info Command (RW)

  372 14:16:41.781912  HECI: Global Reset(Type:1) Command

  373 14:16:43.207124  vel: 8)...

  374 14:16:43.210399  CPU: Intel(R) Celeron(R) 7305

  375 14:16:43.213650  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  376 14:16:43.220594  CPU: AES supported, TXT NOT supported, VT supported

  377 14:16:43.227187  Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384

  378 14:16:43.230172  Cache size = 8 MiB

  379 14:16:43.233885  MCH: device id 4619 (rev 04) is Alderlake-P

  380 14:16:43.240596  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  381 14:16:43.243553  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  382 14:16:43.246772  VBOOT: Loading verstage.

  383 14:16:43.250284  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  384 14:16:43.256949  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  385 14:16:43.260222  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  386 14:16:43.270472  CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes

  387 14:16:43.277334  CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908

  388 14:16:43.277828  

  389 14:16:43.278109  

  390 14:16:43.290571  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 verstage starting (log level: 8)...

  391 14:16:43.293902  Probing TPM I2C: I2C bus 1 version 0x3230302a

  392 14:16:43.300573  DW I2C bus 1 at 0xfe022000 (400 KHz)

  393 14:16:43.301045  done! DID_VID 0x00281ae0

  394 14:16:43.304389  TPM ready after 0 ms

  395 14:16:43.307318  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  396 14:16:43.321285  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9

  397 14:16:43.327669  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  398 14:16:43.374686  tlcl_send_startup: Startup return code is 0

  399 14:16:43.375153  TPM: setup succeeded

  400 14:16:43.394549  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  401 14:16:43.416623  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  402 14:16:43.421284  Chrome EC: UHEPI supported

  403 14:16:43.424428  Reading cr50 boot mode

  404 14:16:43.439544  Cr50 says boot_mode is VERIFIED_RW(0x00).

  405 14:16:43.440013  Phase 1

  406 14:16:43.446024  FMAP: area GBB found @ 1805000 (458752 bytes)

  407 14:16:43.452537  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  408 14:16:43.459261  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  409 14:16:43.466033  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  410 14:16:43.466545  Phase 2

  411 14:16:43.469075  Phase 3

  412 14:16:43.472541  FMAP: area GBB found @ 1805000 (458752 bytes)

  413 14:16:43.479321  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  414 14:16:43.482419  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  415 14:16:43.488945  VB2:vb2_verify_keyblock() Checking keyblock signature...

  416 14:16:43.495928  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  417 14:16:43.502470  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  418 14:16:43.512542  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  419 14:16:43.525602  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  420 14:16:43.529032  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  421 14:16:43.535657  VB2:vb2_verify_fw_preamble() Verifying preamble.

  422 14:16:43.542447  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  423 14:16:43.549071  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  424 14:16:43.555596  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  425 14:16:43.559898  Phase 4

  426 14:16:43.563226  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  427 14:16:43.569742  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  428 14:16:43.797469  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  429 14:16:43.804197  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  430 14:16:43.807443  Saving vboot hash.

  431 14:16:43.813816  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  432 14:16:43.830405  tlcl_extend: response is 0

  433 14:16:43.836709  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  434 14:16:43.843566  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  435 14:16:43.858155  tlcl_extend: response is 0

  436 14:16:43.864525  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  437 14:16:43.883260  tlcl_lock_nv_write: response is 0

  438 14:16:43.900954  tlcl_lock_nv_write: response is 0

  439 14:16:43.901455  Slot B is selected

  440 14:16:43.907729  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  441 14:16:43.914000  CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes

  442 14:16:43.920872  CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600

  443 14:16:43.927596  BS: verstage times (exec / console): total (unknown) / 260 ms

  444 14:16:43.928103  

  445 14:16:43.928499  

  446 14:16:43.937404  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 romstage starting (log level: 8)...

  447 14:16:43.940627  Google Chrome EC: version:

  448 14:16:43.944067  	ro: moli_v2.0.19454-8a70cbdcf0

  449 14:16:43.947446  	rw: moli_v2.0.22464-d4ba27cabb

  450 14:16:43.950853    running image: 2

  451 14:16:43.954205  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  452 14:16:43.964091  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  453 14:16:43.971083  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  454 14:16:43.977608  CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc

  455 14:16:43.987620  VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  456 14:16:43.997317  VB2:check_ec_hash()            Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  457 14:16:44.001041  EC took 967us to calculate image hash

  458 14:16:44.010825  VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  459 14:16:44.013795  VB2:sync_ec() select_rw=RW(active)

  460 14:16:44.021838  EC returned error result code 1

  461 14:16:44.025627  PARAM_LIMIT_POWER not supported by EC.

  462 14:16:44.032312  Waited 7374us to clear limit power flag.

  463 14:16:44.035814  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  464 14:16:44.038869  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  465 14:16:44.042131  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  466 14:16:44.049136  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  467 14:16:44.052729  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  468 14:16:44.055659  TCO_STS:   0000 0000

  469 14:16:44.059140  GEN_PMCON: d1001038 00002200

  470 14:16:44.062447  GBLRST_CAUSE: 00000040 00000000

  471 14:16:44.062913  HPR_CAUSE0: 00000000

  472 14:16:44.066009  prev_sleep_state 5

  473 14:16:44.069129  Abort disabling TXT, as CPU is not TXT capable.

  474 14:16:44.076893  cse_lite: Number of partitions = 3

  475 14:16:44.080145  cse_lite: Current partition = RW

  476 14:16:44.080536  cse_lite: Next partition = RW

  477 14:16:44.083710  cse_lite: Flags = 0x7

  478 14:16:44.090203  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)

  479 14:16:44.100180  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)

  480 14:16:44.103544  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  481 14:16:44.110336  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  482 14:16:44.116845  cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000

  483 14:16:44.123373  CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4

  484 14:16:44.126778  cse_lite: CSE CBFS RW version : 16.1.25.2049

  485 14:16:44.130051  CSE Sub-partition update not required

  486 14:16:44.135060  Boot Count incremented to 4576

  487 14:16:44.141838  CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868

  488 14:16:44.148482  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  489 14:16:44.161717  Probing TPM I2C: done! DID_VID 0x00281ae0

  490 14:16:44.165031  Locality already claimed

  491 14:16:44.168498  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  492 14:16:44.188518  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  493 14:16:44.195808  MRC: Hash idx 0x100d comparison successful.

  494 14:16:44.196277  MRC cache found, size f6c8

  495 14:16:44.198696  bootmode is set to: 2

  496 14:16:44.201836  FW_CONFIG value from CBI is 0x64

  497 14:16:44.208694  fw_config match found: STORAGE=STORAGE_EMMC

  498 14:16:44.212208  FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes)

  499 14:16:44.214907  SPD_CACHE: cache found, size 0x1000

  500 14:16:44.222052  SPD_CACHE: DIMM0 is the same

  501 14:16:44.225516  No memory dimm at address 51

  502 14:16:44.228787  SPD_CACHE: DIMM1 is not present

  503 14:16:44.232072  No memory dimm at address 52

  504 14:16:44.235253  SPD_CACHE: DIMM2 is not present

  505 14:16:44.238611  No memory dimm at address 53

  506 14:16:44.242043  SPD_CACHE: DIMM3 is not present

  507 14:16:44.245360  Use the SPD cache data

  508 14:16:44.248319  SPD: module type is DDR4

  509 14:16:44.251871  SPD: module part number is M471A5244CB0-CWE    

  510 14:16:44.258438  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  511 14:16:44.261692  SPD: device width 16 bits, bus width 64 bits

  512 14:16:44.265192  SPD: module size is 4096 MB (per channel)

  513 14:16:44.320418  CBMEM:

  514 14:16:44.323542  IMD: root @ 0x76fff000 254 entries.

  515 14:16:44.326715  IMD: root @ 0x76ffec00 62 entries.

  516 14:16:44.335976  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  517 14:16:44.339409  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  518 14:16:44.342836  RW_VPD is uninitialized or empty.

  519 14:16:44.349160  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  520 14:16:44.352930  External stage cache:

  521 14:16:44.356163  IMD: root @ 0x7bbff000 254 entries.

  522 14:16:44.359327  IMD: root @ 0x7bbfec00 62 entries.

  523 14:16:44.366614  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  524 14:16:44.373293  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  525 14:16:44.376954  MRC: 'RW_MRC_CACHE' does not need update.

  526 14:16:44.377413  1 DIMMs found

  527 14:16:44.380144  SMM Memory Map

  528 14:16:44.383502  SMRAM       : 0x7b800000 0x800000

  529 14:16:44.386687   Subregion 0: 0x7b800000 0x200000

  530 14:16:44.390110   Subregion 1: 0x7ba00000 0x200000

  531 14:16:44.393038   Subregion 2: 0x7bc00000 0x400000

  532 14:16:44.396493  top_of_ram = 0x77000000

  533 14:16:44.399826  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  534 14:16:44.406533  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  535 14:16:44.413287  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  536 14:16:44.416640  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  537 14:16:44.416996  Normal boot

  538 14:16:44.426659  CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc

  539 14:16:44.436053  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60

  540 14:16:44.439418  Processing 237 relocs. Offset value of 0x74ab9000

  541 14:16:44.442855  CLFLUSH [0x76ab9000, 0x76ac3e60]

  542 14:16:44.446497  CLFLUSH [0x76abea80, 0x76abea84]

  543 14:16:44.456819  BS: romstage times (exec / console): total (unknown) / 418 ms

  544 14:16:44.459892  CLFLUSH [0x76ab8000, 0x77000000]

  545 14:16:44.470924  CLFLUSH [0x7ba00000, 0x7bc00000]

  546 14:16:44.482079  

  547 14:16:44.482540  

  548 14:16:44.492484  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 postcar starting (log level: 8)...

  549 14:16:44.492958  Normal boot

  550 14:16:44.498825  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  551 14:16:44.505212  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  552 14:16:44.511957  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  553 14:16:44.521759  CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0

  554 14:16:44.569648  Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50

  555 14:16:44.576700  Processing 5882 relocs. Offset value of 0x72a2e000

  556 14:16:44.579886  BS: postcar times (exec / console): total (unknown) / 54 ms

  557 14:16:44.583417  

  558 14:16:44.583922  

  559 14:16:44.593087  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 ramstage starting (log level: 8)...

  560 14:16:44.596307  Reserving BERT start 76a1d000, size 10000

  561 14:16:44.596802  Normal boot

  562 14:16:44.603350  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  563 14:16:44.609507  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  564 14:16:44.616267  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  565 14:16:44.623365  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  566 14:16:44.626512  Google Chrome EC: version:

  567 14:16:44.630012  	ro: moli_v2.0.19454-8a70cbdcf0

  568 14:16:44.633089  	rw: moli_v2.0.22464-d4ba27cabb

  569 14:16:44.636071    running image: 2

  570 14:16:44.639773  ACPI _SWS is PM1 Index 8 GPE Index -1

  571 14:16:44.643202  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  572 14:16:44.646626  FW_CONFIG value from CBI is 0x64

  573 14:16:44.653151  PCI: 00:06.0 disabled by fw_config

  574 14:16:44.656827  fw_config match found: STORAGE=STORAGE_EMMC

  575 14:16:44.659981  fw_config match found: STORAGE=STORAGE_EMMC

  576 14:16:44.666669  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  577 14:16:44.673420  CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080

  578 14:16:44.680005  microcode: sig=0x906a4 pf=0x80 revision=0x423

  579 14:16:44.683415  microcode: Update skipped, already up-to-date

  580 14:16:44.689869  CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8

  581 14:16:44.722949  Detected 5 core, 5 thread CPU.

  582 14:16:44.726099  Setting up SMI for CPU

  583 14:16:44.729323  IED base = 0x7bc00000

  584 14:16:44.729823  IED size = 0x00400000

  585 14:16:44.732882  Will perform SMM setup.

  586 14:16:44.735929  CPU: Intel(R) Celeron(R) 7305.

  587 14:16:44.739469  LAPIC 0x0 in XAPIC mode.

  588 14:16:44.746348  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  589 14:16:44.752835  Processing 18 relocs. Offset value of 0x00030000

  590 14:16:44.757268  Attempting to start 4 APs

  591 14:16:44.760917  Waiting for 10ms after sending INIT.

  592 14:16:44.772970  Waiting for SIPI to complete...

  593 14:16:44.776595  done.

  594 14:16:44.777057  LAPIC 0x14 in XAPIC mode.

  595 14:16:44.780072  Waiting for SIPI to complete...

  596 14:16:44.783157  done.

  597 14:16:44.783621  LAPIC 0x16 in XAPIC mode.

  598 14:16:44.786298  LAPIC 0x12 in XAPIC mode.

  599 14:16:44.790116  LAPIC 0x10 in XAPIC mode.

  600 14:16:44.793338  AP: slot 2 apic_id 16, MCU rev: 0x00000423

  601 14:16:44.799900  AP: slot 4 apic_id 12, MCU rev: 0x00000423

  602 14:16:44.803008  AP: slot 3 apic_id 10, MCU rev: 0x00000423

  603 14:16:44.806340  AP: slot 1 apic_id 14, MCU rev: 0x00000423

  604 14:16:44.809781  smm_setup_relocation_handler: enter

  605 14:16:44.813012  smm_setup_relocation_handler: exit

  606 14:16:44.822807  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  607 14:16:44.826490  Processing 11 relocs. Offset value of 0x00038000

  608 14:16:44.832975  smm_module_setup_stub: stack_top = 0x7b802800

  609 14:16:44.836389  smm_module_setup_stub: per cpu stack_size = 0x800

  610 14:16:44.842880  smm_module_setup_stub: runtime.start32_offset = 0x4c

  611 14:16:44.846174  smm_module_setup_stub: runtime.smm_size = 0x10000

  612 14:16:44.853201  SMM Module: stub loaded at 38000. Will call 0x76a5220d

  613 14:16:44.856206  Installing permanent SMM handler to 0x7b800000

  614 14:16:44.859830  FX_SAVE      [0x7b9ff600-0x7ba00000]

  615 14:16:44.866231  HANDLER      [0x7b9f6000-0x7b9ff528]

  616 14:16:44.866730  

  617 14:16:44.867015  CPU 0

  618 14:16:44.869234    ss0        [0x7b9f5c00-0x7b9f6000]

  619 14:16:44.872717    stub0      [0x7b9ee000-0x7b9ee208]

  620 14:16:44.873213  

  621 14:16:44.873487  CPU 1

  622 14:16:44.876049    ss1        [0x7b9f5800-0x7b9f5c00]

  623 14:16:44.882284    stub1      [0x7b9edc00-0x7b9ede08]

  624 14:16:44.882724  

  625 14:16:44.882976  CPU 2

  626 14:16:44.886054    ss2        [0x7b9f5400-0x7b9f5800]

  627 14:16:44.889225    stub2      [0x7b9ed800-0x7b9eda08]

  628 14:16:44.889587  

  629 14:16:44.889843  CPU 3

  630 14:16:44.892536    ss3        [0x7b9f5000-0x7b9f5400]

  631 14:16:44.899236    stub3      [0x7b9ed400-0x7b9ed608]

  632 14:16:44.899701  

  633 14:16:44.899972  CPU 4

  634 14:16:44.902767    ss4        [0x7b9f4c00-0x7b9f5000]

  635 14:16:44.905811    stub4      [0x7b9ed000-0x7b9ed208]

  636 14:16:44.906163  

  637 14:16:44.909143  stacks       [0x7b800000-0x7b802800]

  638 14:16:44.919038  Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528

  639 14:16:44.922385  Processing 255 relocs. Offset value of 0x7b9f6000

  640 14:16:44.932186  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  641 14:16:44.935455  Processing 11 relocs. Offset value of 0x7b9ee000

  642 14:16:44.942421  smm_module_setup_stub: stack_top = 0x7b802800

  643 14:16:44.945692  smm_module_setup_stub: per cpu stack_size = 0x800

  644 14:16:44.951994  smm_module_setup_stub: runtime.start32_offset = 0x4c

  645 14:16:44.955346  smm_module_setup_stub: runtime.smm_size = 0x200000

  646 14:16:44.962149  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  647 14:16:44.968958  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  648 14:16:44.975453  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  649 14:16:44.981881  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  650 14:16:44.988432  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  651 14:16:44.995052  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  652 14:16:44.998407  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  653 14:16:45.004860  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  654 14:16:45.011536  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c

  655 14:16:45.016162  Clearing SMI status registers

  656 14:16:45.019918  SMI_STS: PM1 

  657 14:16:45.020386  PM1_STS: WAK PWRBTN 

  658 14:16:45.029880  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  659 14:16:45.033257  In relocation handler: CPU 0

  660 14:16:45.036255  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  661 14:16:45.039599  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  662 14:16:45.043051  Relocation complete.

  663 14:16:45.050148  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  664 14:16:45.053224  In relocation handler: CPU 2

  665 14:16:45.056452  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  666 14:16:45.063287  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  667 14:16:45.063755  Relocation complete.

  668 14:16:45.069845  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  669 14:16:45.073133  In relocation handler: CPU 1

  670 14:16:45.079811  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  671 14:16:45.083401  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  672 14:16:45.086711  Relocation complete.

  673 14:16:45.093191  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  674 14:16:45.096097  In relocation handler: CPU 4

  675 14:16:45.099598  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  676 14:16:45.102981  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  677 14:16:45.106661  Relocation complete.

  678 14:16:45.112887  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  679 14:16:45.116058  In relocation handler: CPU 3

  680 14:16:45.119676  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  681 14:16:45.126404  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  682 14:16:45.126936  Relocation complete.

  683 14:16:45.129726  Initializing CPU #0

  684 14:16:45.132908  CPU: vendor Intel device 906a4

  685 14:16:45.136095  CPU: family 06, model 9a, stepping 04

  686 14:16:45.139376  Clearing out pending MCEs

  687 14:16:45.142877  cpu: energy policy set to 7

  688 14:16:45.143236  Turbo is unavailable

  689 14:16:45.149805  microcode: Update skipped, already up-to-date

  690 14:16:45.150274  CPU #0 initialized

  691 14:16:45.152784  Initializing CPU #3

  692 14:16:45.156223  Initializing CPU #1

  693 14:16:45.156720  Initializing CPU #4

  694 14:16:45.159383  CPU: vendor Intel device 906a4

  695 14:16:45.163031  CPU: family 06, model 9a, stepping 04

  696 14:16:45.166168  CPU: vendor Intel device 906a4

  697 14:16:45.169376  CPU: family 06, model 9a, stepping 04

  698 14:16:45.172692  Clearing out pending MCEs

  699 14:16:45.176076  Initializing CPU #2

  700 14:16:45.179558  Clearing out pending MCEs

  701 14:16:45.180026  cpu: energy policy set to 7

  702 14:16:45.183088  cpu: energy policy set to 7

  703 14:16:45.186277  CPU: vendor Intel device 906a4

  704 14:16:45.189607  CPU: family 06, model 9a, stepping 04

  705 14:16:45.196141  microcode: Update skipped, already up-to-date

  706 14:16:45.196640  CPU #1 initialized

  707 14:16:45.199624  CPU: vendor Intel device 906a4

  708 14:16:45.202618  CPU: family 06, model 9a, stepping 04

  709 14:16:45.206081  Clearing out pending MCEs

  710 14:16:45.212912  microcode: Update skipped, already up-to-date

  711 14:16:45.213395  CPU #3 initialized

  712 14:16:45.215841  Clearing out pending MCEs

  713 14:16:45.219050  cpu: energy policy set to 7

  714 14:16:45.223177  cpu: energy policy set to 7

  715 14:16:45.225938  microcode: Update skipped, already up-to-date

  716 14:16:45.229475  CPU #4 initialized

  717 14:16:45.232812  microcode: Update skipped, already up-to-date

  718 14:16:45.236125  CPU #2 initialized

  719 14:16:45.239061  bsp_do_flight_plan done after 453 msecs.

  720 14:16:45.239427  Enabling SMIs.

  721 14:16:45.245805  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 244 / 352 ms

  722 14:16:45.264533  Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214)

  723 14:16:45.271211  Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123)

  724 14:16:45.277865  Probing TPM I2C: done! DID_VID 0x00281ae0

  725 14:16:45.281146  Locality already claimed

  726 14:16:45.284220  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  727 14:16:45.295168  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9

  728 14:16:45.298551  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  729 14:16:45.305100  fw_config match found: AUDIO=NAU88L25B_I2S

  730 14:16:45.308384  CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4

  731 14:16:45.315009  Found a VBT of 8704 bytes after decompression

  732 14:16:45.315457  PsysPmax = 214W

  733 14:16:45.319118  PCI  1.0, PIN A, using IRQ #16

  734 14:16:45.322091  PCI  2.0, PIN A, using IRQ #17

  735 14:16:45.325289  PCI  4.0, PIN A, using IRQ #18

  736 14:16:45.328690  PCI  5.0, PIN A, using IRQ #16

  737 14:16:45.331915  PCI  6.0, PIN A, using IRQ #16

  738 14:16:45.335244  PCI  6.2, PIN C, using IRQ #18

  739 14:16:45.338201  PCI  7.0, PIN A, using IRQ #19

  740 14:16:45.341833  PCI  7.1, PIN B, using IRQ #20

  741 14:16:45.345216  PCI  7.2, PIN C, using IRQ #21

  742 14:16:45.348697  PCI  7.3, PIN D, using IRQ #22

  743 14:16:45.351873  PCI  8.0, PIN A, using IRQ #23

  744 14:16:45.355293  PCI  D.0, PIN A, using IRQ #17

  745 14:16:45.358615  PCI  D.1, PIN B, using IRQ #19

  746 14:16:45.361655  PCI 10.0, PIN A, using IRQ #24

  747 14:16:45.365196  PCI 10.1, PIN B, using IRQ #25

  748 14:16:45.368712  PCI 10.6, PIN C, using IRQ #20

  749 14:16:45.369181  PCI 10.7, PIN D, using IRQ #21

  750 14:16:45.371820  PCI 11.0, PIN A, using IRQ #26

  751 14:16:45.375288  PCI 11.1, PIN B, using IRQ #27

  752 14:16:45.378468  PCI 11.2, PIN C, using IRQ #28

  753 14:16:45.381879  PCI 11.3, PIN D, using IRQ #29

  754 14:16:45.385320  PCI 12.0, PIN A, using IRQ #30

  755 14:16:45.388512  PCI 12.6, PIN B, using IRQ #31

  756 14:16:45.391990  PCI 12.7, PIN C, using IRQ #22

  757 14:16:45.395314  PCI 13.0, PIN A, using IRQ #32

  758 14:16:45.398513  PCI 13.1, PIN B, using IRQ #33

  759 14:16:45.402051  PCI 13.2, PIN C, using IRQ #34

  760 14:16:45.405200  PCI 13.3, PIN D, using IRQ #35

  761 14:16:45.408486  PCI 14.0, PIN B, using IRQ #23

  762 14:16:45.411897  PCI 14.1, PIN A, using IRQ #36

  763 14:16:45.415057  PCI 14.3, PIN C, using IRQ #17

  764 14:16:45.418554  PCI 15.0, PIN A, using IRQ #37

  765 14:16:45.419057  PCI 15.1, PIN B, using IRQ #38

  766 14:16:45.421874  PCI 15.2, PIN C, using IRQ #39

  767 14:16:45.424931  PCI 15.3, PIN D, using IRQ #40

  768 14:16:45.428370  PCI 16.0, PIN A, using IRQ #18

  769 14:16:45.431795  PCI 16.1, PIN B, using IRQ #19

  770 14:16:45.435016  PCI 16.2, PIN C, using IRQ #20

  771 14:16:45.438193  PCI 16.3, PIN D, using IRQ #21

  772 14:16:45.441547  PCI 16.4, PIN A, using IRQ #18

  773 14:16:45.445167  PCI 16.5, PIN B, using IRQ #19

  774 14:16:45.448114  PCI 17.0, PIN A, using IRQ #22

  775 14:16:45.451573  PCI 19.0, PIN A, using IRQ #41

  776 14:16:45.455179  PCI 19.1, PIN B, using IRQ #42

  777 14:16:45.458465  PCI 19.2, PIN C, using IRQ #43

  778 14:16:45.461728  PCI 1C.0, PIN A, using IRQ #16

  779 14:16:45.464863  PCI 1C.1, PIN B, using IRQ #17

  780 14:16:45.468507  PCI 1C.2, PIN C, using IRQ #18

  781 14:16:45.468985  PCI 1C.3, PIN D, using IRQ #19

  782 14:16:45.471851  PCI 1C.4, PIN A, using IRQ #16

  783 14:16:45.475300  PCI 1C.5, PIN B, using IRQ #17

  784 14:16:45.478413  PCI 1C.6, PIN C, using IRQ #18

  785 14:16:45.481718  PCI 1C.7, PIN D, using IRQ #19

  786 14:16:45.485067  PCI 1D.0, PIN A, using IRQ #16

  787 14:16:45.488301  PCI 1D.1, PIN B, using IRQ #17

  788 14:16:45.491596  PCI 1D.2, PIN C, using IRQ #18

  789 14:16:45.495089  PCI 1D.3, PIN D, using IRQ #19

  790 14:16:45.498371  PCI 1E.0, PIN A, using IRQ #23

  791 14:16:45.502083  PCI 1E.1, PIN B, using IRQ #20

  792 14:16:45.504750  PCI 1E.2, PIN C, using IRQ #44

  793 14:16:45.508293  PCI 1E.3, PIN D, using IRQ #45

  794 14:16:45.511261  PCI 1F.3, PIN B, using IRQ #22

  795 14:16:45.514938  PCI 1F.4, PIN C, using IRQ #23

  796 14:16:45.518193  PCI 1F.6, PIN D, using IRQ #20

  797 14:16:45.521553  PCI 1F.7, PIN A, using IRQ #21

  798 14:16:45.524651  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  799 14:16:45.531480  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  800 14:16:45.591446  FSPS returned 0

  801 14:16:45.594688  Executing Phase 1 of FspMultiPhaseSiInit

  802 14:16:45.604796  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  803 14:16:45.607906  port C0 DISC req: usage 1 usb3 1 usb2 1

  804 14:16:45.611681  Raw Buffer output 0 00000111

  805 14:16:45.614473  Raw Buffer output 1 00000000

  806 14:16:45.618029  pmc_send_ipc_cmd succeeded

  807 14:16:45.624945  port C1 DISC req: usage 1 usb3 3 usb2 3

  808 14:16:45.625416  Raw Buffer output 0 00000331

  809 14:16:45.628128  Raw Buffer output 1 00000000

  810 14:16:45.632141  pmc_send_ipc_cmd succeeded

  811 14:16:45.638465  AP Mode Entry enabled, skip waiting for DisplayPort connection

  812 14:16:45.644094  Detected 5 core, 5 thread CPU.

  813 14:16:45.647582  Detected 5 core, 5 thread CPU.

  814 14:16:45.652460  Detected 5 core, 5 thread CPU.

  815 14:16:45.655735  Detected 5 core, 5 thread CPU.

  816 14:16:45.659258  Detected 5 core, 5 thread CPU.

  817 14:16:45.662563  Detected 5 core, 5 thread CPU.

  818 14:16:45.665747  Detected 5 core, 5 thread CPU.

  819 14:16:45.669292  Detected 5 core, 5 thread CPU.

  820 14:16:45.672489  Detected 5 core, 5 thread CPU.

  821 14:16:45.676082  Detected 5 core, 5 thread CPU.

  822 14:16:45.679558  Detected 5 core, 5 thread CPU.

  823 14:16:45.682558  Detected 5 core, 5 thread CPU.

  824 14:16:45.685852  Detected 5 core, 5 thread CPU.

  825 14:16:45.689377  Detected 5 core, 5 thread CPU.

  826 14:16:45.692725  Detected 5 core, 5 thread CPU.

  827 14:16:45.695732  Detected 5 core, 5 thread CPU.

  828 14:16:45.794930  Detected 5 core, 5 thread CPU.

  829 14:16:45.798302  Detected 5 core, 5 thread CPU.

  830 14:16:45.801550  Detected 5 core, 5 thread CPU.

  831 14:16:45.804810  Detected 5 core, 5 thread CPU.

  832 14:16:45.808217  Detected 5 core, 5 thread CPU.

  833 14:16:45.811460  Detected 5 core, 5 thread CPU.

  834 14:16:45.814963  Detected 5 core, 5 thread CPU.

  835 14:16:45.817895  Detected 5 core, 5 thread CPU.

  836 14:16:45.821758  Detected 5 core, 5 thread CPU.

  837 14:16:45.824618  Detected 5 core, 5 thread CPU.

  838 14:16:45.828181  Detected 5 core, 5 thread CPU.

  839 14:16:45.831826  Detected 5 core, 5 thread CPU.

  840 14:16:45.834610  Detected 5 core, 5 thread CPU.

  841 14:16:45.838119  Detected 5 core, 5 thread CPU.

  842 14:16:45.841431  Display FSP Version Info HOB

  843 14:16:45.844908  Reference Code - CPU = c.0.65.70

  844 14:16:45.848055  uCode Version = 0.0.4.23

  845 14:16:45.851371  TXT ACM version = ff.ff.ff.ffff

  846 14:16:45.851879  Reference Code - ME = c.0.65.70

  847 14:16:45.854646  MEBx version = 0.0.0.0

  848 14:16:45.858376  ME Firmware Version = Lite SKU

  849 14:16:45.861343  Reference Code - PCH = c.0.65.70

  850 14:16:45.864370  PCH-CRID Status = Disabled

  851 14:16:45.867994  PCH-CRID Original Value = ff.ff.ff.ffff

  852 14:16:45.871269  PCH-CRID New Value = ff.ff.ff.ffff

  853 14:16:45.874706  OPROM - RST - RAID = ff.ff.ff.ffff

  854 14:16:45.878034  PCH Hsio Version = 4.0.0.0

  855 14:16:45.884750  Reference Code - SA - System Agent = c.0.65.70

  856 14:16:45.885253  Reference Code - MRC = 0.0.3.80

  857 14:16:45.888021  SA - PCIe Version = c.0.65.70

  858 14:16:45.891429  SA-CRID Status = Disabled

  859 14:16:45.894975  SA-CRID Original Value = 0.0.0.4

  860 14:16:45.898016  SA-CRID New Value = 0.0.0.4

  861 14:16:45.901153  OPROM - VBIOS = ff.ff.ff.ffff

  862 14:16:45.904527  IO Manageability Engine FW Version = 24.0.4.0

  863 14:16:45.908246  PHY Build Version = 0.0.0.2016

  864 14:16:45.911381  Thunderbolt(TM) FW Version = 11.5.0.0

  865 14:16:45.917811  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  866 14:16:45.924579  Found PCIe Root Port #7 at PCI: 00:1c.0.

  867 14:16:45.928095  Found PCIe Root Port #8 at PCI: 00:1c.7.

  868 14:16:45.931164  Found PCIe Root Port #12 at PCI: 00:1d.0.

  869 14:16:45.944572  pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.

  870 14:16:45.951224  Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.

  871 14:16:45.957902  Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0.

  872 14:16:45.961061  Found PCIe Root Port #1 at PCI: 00:07.0.

  873 14:16:45.964751  Found PCIe Root Port #2 at PCI: 00:07.1.

  874 14:16:45.971195  Found PCIe Root Port #3 at PCI: 00:07.2.

  875 14:16:45.971707  Sending EOP early from SoC

  876 14:16:45.974340  HECI: Sending End-of-Post

  877 14:16:45.981323  BS: BS_DEV_INIT_CHIPS run times (exec / console): 182 / 545 ms

  878 14:16:45.984700  Enumerating buses...

  879 14:16:45.987853  Show all devs... Before device enumeration.

  880 14:16:45.991003  Root Device: enabled 1

  881 14:16:45.994521  CPU_CLUSTER: 0: enabled 1

  882 14:16:45.994989  DOMAIN: 0000: enabled 1

  883 14:16:45.997880  GPIO: 0: enabled 1

  884 14:16:46.001001  PCI: 00:00.0: enabled 1

  885 14:16:46.001364  PCI: 00:01.0: enabled 0

  886 14:16:46.004582  PCI: 00:01.1: enabled 0

  887 14:16:46.007580  PCI: 00:02.0: enabled 1

  888 14:16:46.010874  PCI: 00:04.0: enabled 1

  889 14:16:46.011341  PCI: 00:05.0: enabled 0

  890 14:16:46.014087  PCI: 00:06.0: enabled 0

  891 14:16:46.017437  PCI: 00:06.2: enabled 0

  892 14:16:46.020997  PCI: 00:07.0: enabled 1

  893 14:16:46.021461  PCI: 00:07.1: enabled 1

  894 14:16:46.024279  PCI: 00:07.2: enabled 1

  895 14:16:46.027603  PCI: 00:07.3: enabled 0

  896 14:16:46.031223  PCI: 00:08.0: enabled 0

  897 14:16:46.031686  PCI: 00:09.0: enabled 0

  898 14:16:46.034330  PCI: 00:0a.0: enabled 1

  899 14:16:46.037278  PCI: 00:0d.0: enabled 1

  900 14:16:46.037745  PCI: 00:0d.1: enabled 0

  901 14:16:46.040544  PCI: 00:0d.2: enabled 1

  902 14:16:46.043980  PCI: 00:0d.3: enabled 1

  903 14:16:46.047534  PCI: 00:0e.0: enabled 0

  904 14:16:46.048000  PCI: 00:10.0: enabled 0

  905 14:16:46.050663  PCI: 00:10.1: enabled 0

  906 14:16:46.054090  PCI: 00:10.6: enabled 0

  907 14:16:46.057543  PCI: 00:10.7: enabled 0

  908 14:16:46.058033  PCI: 00:12.0: enabled 0

  909 14:16:46.060744  PCI: 00:12.6: enabled 0

  910 14:16:46.064079  PCI: 00:12.7: enabled 0

  911 14:16:46.067169  PCI: 00:13.0: enabled 0

  912 14:16:46.067526  PCI: 00:14.0: enabled 1

  913 14:16:46.070668  PCI: 00:14.1: enabled 0

  914 14:16:46.073946  PCI: 00:14.2: enabled 1

  915 14:16:46.077440  PCI: 00:14.3: enabled 1

  916 14:16:46.077938  PCI: 00:15.0: enabled 1

  917 14:16:46.080659  PCI: 00:15.1: enabled 1

  918 14:16:46.083612  PCI: 00:15.2: enabled 0

  919 14:16:46.083977  PCI: 00:15.3: enabled 0

  920 14:16:46.087219  PCI: 00:16.0: enabled 1

  921 14:16:46.090887  PCI: 00:16.1: enabled 0

  922 14:16:46.094270  PCI: 00:16.2: enabled 0

  923 14:16:46.094737  PCI: 00:16.3: enabled 0

  924 14:16:46.097160  PCI: 00:16.4: enabled 0

  925 14:16:46.100736  PCI: 00:16.5: enabled 0

  926 14:16:46.104153  PCI: 00:17.0: enabled 1

  927 14:16:46.104646  PCI: 00:19.0: enabled 0

  928 14:16:46.107371  PCI: 00:19.1: enabled 0

  929 14:16:46.110550  PCI: 00:19.2: enabled 0

  930 14:16:46.113843  PCI: 00:1a.0: enabled 0

  931 14:16:46.114341  PCI: 00:1c.0: enabled 0

  932 14:16:46.117013  PCI: 00:1c.1: enabled 0

  933 14:16:46.120536  PCI: 00:1c.2: enabled 0

  934 14:16:46.121003  PCI: 00:1c.3: enabled 0

  935 14:16:46.124130  PCI: 00:1c.4: enabled 0

  936 14:16:46.127146  PCI: 00:1c.5: enabled 1

  937 14:16:46.130523  PCI: 00:1c.0: enabled 1

  938 14:16:46.130987  PCI: 00:1c.7: enabled 1

  939 14:16:46.133531  PCI: 00:1d.0: enabled 0

  940 14:16:46.137116  PCI: 00:1d.1: enabled 0

  941 14:16:46.140460  PCI: 00:1d.2: enabled 0

  942 14:16:46.140955  PCI: 00:1d.0: enabled 1

  943 14:16:46.143480  PCI: 00:1e.0: enabled 1

  944 14:16:46.147026  PCI: 00:1e.1: enabled 0

  945 14:16:46.150361  PCI: 00:1e.2: enabled 0

  946 14:16:46.150726  PCI: 00:1e.3: enabled 1

  947 14:16:46.153521  PCI: 00:1f.0: enabled 1

  948 14:16:46.157015  PCI: 00:1f.1: enabled 0

  949 14:16:46.157363  PCI: 00:1f.2: enabled 1

  950 14:16:46.160571  PCI: 00:1f.3: enabled 1

  951 14:16:46.163623  PCI: 00:1f.4: enabled 1

  952 14:16:46.167104  PCI: 00:1f.5: enabled 1

  953 14:16:46.167567  PCI: 00:1f.6: enabled 0

  954 14:16:46.170420  PCI: 00:1f.7: enabled 0

  955 14:16:46.173664  GENERIC: 0.0: enabled 1

  956 14:16:46.223742  GENERIC: 0.0: enabled 1

  957 14:16:46.224255  GENERIC: 1.0: enabled 1

  958 14:16:46.224575  GENERIC: 0.0: enabled 1

  959 14:16:46.224797  GENERIC: 1.0: enabled 1

  960 14:16:46.225006  USB0 port 0: enabled 1

  961 14:16:46.225212  GENERIC: 0.0: enabled 1

  962 14:16:46.225410  GENERIC: 0.0: enabled 1

  963 14:16:46.225610  USB0 port 0: enabled 1

  964 14:16:46.226097  GENERIC: 0.0: enabled 1

  965 14:16:46.226338  I2C: 00:1a: enabled 1

  966 14:16:46.226548  I2C: 00:50: enabled 1

  967 14:16:46.226751  PCI: 00:00.0: enabled 1

  968 14:16:46.226956  PCI: 00:00.0: enabled 1

  969 14:16:46.227156  GENERIC: 0.0: enabled 1

  970 14:16:46.227355  GENERIC: 0.0: enabled 1

  971 14:16:46.227559  PNP: 0c09.0: enabled 1

  972 14:16:46.227761  GENERIC: 0.0: enabled 1

  973 14:16:46.227965  USB3 port 0: enabled 1

  974 14:16:46.228165  USB3 port 1: enabled 0

  975 14:16:46.228365  USB3 port 2: enabled 1

  976 14:16:46.228582  USB3 port 3: enabled 0

  977 14:16:46.265779  USB2 port 0: enabled 1

  978 14:16:46.266354  USB2 port 1: enabled 0

  979 14:16:46.266687  USB2 port 2: enabled 1

  980 14:16:46.267200  USB2 port 3: enabled 1

  981 14:16:46.267442  USB2 port 4: enabled 1

  982 14:16:46.267655  USB2 port 5: enabled 1

  983 14:16:46.267864  USB2 port 6: enabled 1

  984 14:16:46.268071  USB2 port 7: enabled 1

  985 14:16:46.268275  USB2 port 8: enabled 0

  986 14:16:46.268506  USB2 port 9: enabled 1

  987 14:16:46.268709  USB3 port 0: enabled 1

  988 14:16:46.268908  USB3 port 1: enabled 1

  989 14:16:46.269112  USB3 port 2: enabled 1

  990 14:16:46.269316  USB3 port 3: enabled 1

  991 14:16:46.269516  GENERIC: 0.0: enabled 1

  992 14:16:46.269718  GENERIC: 1.0: enabled 1

  993 14:16:46.269960  APIC: 00: enabled 1

  994 14:16:46.270175  APIC: 14: enabled 1

  995 14:16:46.270376  APIC: 16: enabled 1

  996 14:16:46.273513  APIC: 10: enabled 1

  997 14:16:46.273979  APIC: 12: enabled 1

  998 14:16:46.274236  Compare with tree...

  999 14:16:46.276799  Root Device: enabled 1

 1000 14:16:46.280171   CPU_CLUSTER: 0: enabled 1

 1001 14:16:46.280686    APIC: 00: enabled 1

 1002 14:16:46.283599    APIC: 14: enabled 1

 1003 14:16:46.286525    APIC: 16: enabled 1

 1004 14:16:46.286892    APIC: 10: enabled 1

 1005 14:16:46.289918    APIC: 12: enabled 1

 1006 14:16:46.293675   DOMAIN: 0000: enabled 1

 1007 14:16:46.294139    GPIO: 0: enabled 1

 1008 14:16:46.296809    PCI: 00:00.0: enabled 1

 1009 14:16:46.300006    PCI: 00:01.0: enabled 0

 1010 14:16:46.303581    PCI: 00:01.1: enabled 0

 1011 14:16:46.306855    PCI: 00:02.0: enabled 1

 1012 14:16:46.307321    PCI: 00:04.0: enabled 1

 1013 14:16:46.309951     GENERIC: 0.0: enabled 1

 1014 14:16:46.313415    PCI: 00:05.0: enabled 0

 1015 14:16:46.316476    PCI: 00:06.0: enabled 0

 1016 14:16:46.319917    PCI: 00:06.2: enabled 0

 1017 14:16:46.320331    PCI: 00:07.0: enabled 1

 1018 14:16:46.323288     GENERIC: 0.0: enabled 1

 1019 14:16:46.326655    PCI: 00:07.1: enabled 1

 1020 14:16:46.330135     GENERIC: 1.0: enabled 1

 1021 14:16:46.333100    PCI: 00:07.2: enabled 1

 1022 14:16:46.333458     GENERIC: 0.0: enabled 1

 1023 14:16:46.336865    PCI: 00:08.0: enabled 0

 1024 14:16:46.340205    PCI: 00:09.0: enabled 0

 1025 14:16:46.342918    PCI: 00:0a.0: enabled 1

 1026 14:16:46.346838    PCI: 00:0d.0: enabled 1

 1027 14:16:46.347294     USB0 port 0: enabled 1

 1028 14:16:46.349828      USB3 port 0: enabled 1

 1029 14:16:46.353296      USB3 port 1: enabled 0

 1030 14:16:46.356604      USB3 port 2: enabled 1

 1031 14:16:46.359911      USB3 port 3: enabled 0

 1032 14:16:46.360361    PCI: 00:0d.1: enabled 0

 1033 14:16:46.363277    PCI: 00:0d.2: enabled 1

 1034 14:16:46.366510     GENERIC: 0.0: enabled 1

 1035 14:16:46.369621    PCI: 00:0d.3: enabled 1

 1036 14:16:46.373410     GENERIC: 0.0: enabled 1

 1037 14:16:46.373866    PCI: 00:0e.0: enabled 0

 1038 14:16:46.376800    PCI: 00:10.0: enabled 0

 1039 14:16:46.379600    PCI: 00:10.1: enabled 0

 1040 14:16:46.383153    PCI: 00:10.6: enabled 0

 1041 14:16:46.386669    PCI: 00:10.7: enabled 0

 1042 14:16:46.387128    PCI: 00:12.0: enabled 0

 1043 14:16:46.389845    PCI: 00:12.6: enabled 0

 1044 14:16:46.393409    PCI: 00:12.7: enabled 0

 1045 14:16:46.396678    PCI: 00:13.0: enabled 0

 1046 14:16:46.399676    PCI: 00:14.0: enabled 1

 1047 14:16:46.400097     USB0 port 0: enabled 1

 1048 14:16:46.403270      USB2 port 0: enabled 1

 1049 14:16:46.406596      USB2 port 1: enabled 0

 1050 14:16:46.410458      USB2 port 2: enabled 1

 1051 14:16:46.413188      USB2 port 3: enabled 1

 1052 14:16:46.413642      USB2 port 4: enabled 1

 1053 14:16:46.416387      USB2 port 5: enabled 1

 1054 14:16:46.419659      USB2 port 6: enabled 1

 1055 14:16:46.423235      USB2 port 7: enabled 1

 1056 14:16:46.426560      USB2 port 8: enabled 0

 1057 14:16:46.430090      USB2 port 9: enabled 1

 1058 14:16:46.430548      USB3 port 0: enabled 1

 1059 14:16:46.433446      USB3 port 1: enabled 1

 1060 14:16:46.436685      USB3 port 2: enabled 1

 1061 14:16:46.439878      USB3 port 3: enabled 1

 1062 14:16:46.443321    PCI: 00:14.1: enabled 0

 1063 14:16:46.443670    PCI: 00:14.2: enabled 1

 1064 14:16:46.446605    PCI: 00:14.3: enabled 1

 1065 14:16:46.450116     GENERIC: 0.0: enabled 1

 1066 14:16:46.452994    PCI: 00:15.0: enabled 1

 1067 14:16:46.456714     I2C: 00:1a: enabled 1

 1068 14:16:46.457174    PCI: 00:15.1: enabled 1

 1069 14:16:46.459908     I2C: 00:50: enabled 1

 1070 14:16:46.463248    PCI: 00:15.2: enabled 0

 1071 14:16:46.466451    PCI: 00:15.3: enabled 0

 1072 14:16:46.469924    PCI: 00:16.0: enabled 1

 1073 14:16:46.470382    PCI: 00:16.1: enabled 0

 1074 14:16:46.473310    PCI: 00:16.2: enabled 0

 1075 14:16:46.476567    PCI: 00:16.3: enabled 0

 1076 14:16:46.479732    PCI: 00:16.4: enabled 0

 1077 14:16:46.480189    PCI: 00:16.5: enabled 0

 1078 14:16:46.483264    PCI: 00:17.0: enabled 1

 1079 14:16:46.486556    PCI: 00:19.0: enabled 0

 1080 14:16:46.490035    PCI: 00:19.1: enabled 0

 1081 14:16:46.493177    PCI: 00:19.2: enabled 0

 1082 14:16:46.493630    PCI: 00:1a.0: enabled 0

 1083 14:16:46.496275    PCI: 00:1c.0: enabled 1

 1084 14:16:46.499870     PCI: 00:00.0: enabled 1

 1085 14:16:46.503163    PCI: 00:1c.7: enabled 1

 1086 14:16:46.506085     GENERIC: 0.0: enabled 1

 1087 14:16:46.506438    PCI: 00:1d.0: enabled 1

 1088 14:16:46.509889     GENERIC: 0.0: enabled 1

 1089 14:16:46.513171    PCI: 00:1e.0: enabled 1

 1090 14:16:46.516317    PCI: 00:1e.1: enabled 0

 1091 14:16:46.519492    PCI: 00:1e.2: enabled 0

 1092 14:16:46.519858    PCI: 00:1e.3: enabled 1

 1093 14:16:46.522952    PCI: 00:1f.0: enabled 1

 1094 14:16:46.526430     PNP: 0c09.0: enabled 1

 1095 14:16:46.529408    PCI: 00:1f.1: enabled 0

 1096 14:16:46.532866    PCI: 00:1f.2: enabled 1

 1097 14:16:46.533216     GENERIC: 0.0: enabled 1

 1098 14:16:46.536387      GENERIC: 0.0: enabled 1

 1099 14:16:46.539640      GENERIC: 1.0: enabled 1

 1100 14:16:46.543024    PCI: 00:1f.3: enabled 1

 1101 14:16:46.546370    PCI: 00:1f.4: enabled 1

 1102 14:16:46.549258    PCI: 00:1f.5: enabled 1

 1103 14:16:46.549616    PCI: 00:1f.6: enabled 0

 1104 14:16:46.552571    PCI: 00:1f.7: enabled 0

 1105 14:16:46.556360  Root Device scanning...

 1106 14:16:46.559722  scan_static_bus for Root Device

 1107 14:16:46.563032  CPU_CLUSTER: 0 enabled

 1108 14:16:46.563497  DOMAIN: 0000 enabled

 1109 14:16:46.566057  DOMAIN: 0000 scanning...

 1110 14:16:46.569380  PCI: pci_scan_bus for bus 00

 1111 14:16:46.573175  PCI: 00:00.0 [8086/0000] ops

 1112 14:16:46.576215  PCI: 00:00.0 [8086/4619] enabled

 1113 14:16:46.579618  PCI: 00:02.0 [8086/0000] bus ops

 1114 14:16:46.582931  PCI: 00:02.0 [8086/46b3] enabled

 1115 14:16:46.586033  PCI: 00:04.0 [8086/0000] bus ops

 1116 14:16:46.589643  PCI: 00:04.0 [8086/461d] enabled

 1117 14:16:46.592798  PCI: 00:07.0 subordinate bus PCI Express

 1118 14:16:46.596153  PCI: 00:07.0 hot-plug capable

 1119 14:16:46.599547  PCI: 00:07.0 [8086/466e] enabled

 1120 14:16:46.602769  PCI: 00:07.1 subordinate bus PCI Express

 1121 14:16:46.605988  PCI: 00:07.1 hot-plug capable

 1122 14:16:46.609264  PCI: 00:07.1 [8086/463f] enabled

 1123 14:16:46.612532  PCI: 00:07.2 subordinate bus PCI Express

 1124 14:16:46.616088  PCI: 00:07.2 hot-plug capable

 1125 14:16:46.618921  PCI: 00:07.2 [8086/462f] enabled

 1126 14:16:46.622778  PCI: 00:08.0 [8086/464f] disabled

 1127 14:16:46.626082  PCI: 00:0a.0 [8086/467d] enabled

 1128 14:16:46.629547  PCI: 00:0d.0 [8086/0000] bus ops

 1129 14:16:46.632454  PCI: 00:0d.0 [8086/461e] enabled

 1130 14:16:46.635888  PCI: 00:0d.2 [8086/0000] bus ops

 1131 14:16:46.639367  PCI: 00:0d.2 [8086/463e] enabled

 1132 14:16:46.642533  PCI: 00:0d.3 [8086/0000] bus ops

 1133 14:16:46.645900  PCI: 00:0d.3 [8086/466d] enabled

 1134 14:16:46.649511  PCI: 00:14.0 [8086/0000] bus ops

 1135 14:16:46.652756  PCI: 00:14.0 [8086/51ed] enabled

 1136 14:16:46.656047  PCI: 00:14.2 [8086/51ef] enabled

 1137 14:16:46.659166  PCI: 00:14.3 [8086/0000] bus ops

 1138 14:16:46.662593  PCI: 00:14.3 [8086/51f0] enabled

 1139 14:16:46.665716  PCI: 00:15.0 [8086/0000] bus ops

 1140 14:16:46.668902  PCI: 00:15.0 [8086/51e8] enabled

 1141 14:16:46.672797  PCI: 00:15.1 [8086/0000] bus ops

 1142 14:16:46.675877  PCI: 00:15.1 [8086/51e9] enabled

 1143 14:16:46.679295  PCI: 00:16.0 [8086/0000] ops

 1144 14:16:46.682603  PCI: 00:16.0 [8086/51e0] enabled

 1145 14:16:46.689355  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1146 14:16:46.692709  PCI: 00:1c.0 [8086/0000] bus ops

 1147 14:16:46.696228  PCI: 00:1c.0 [8086/51be] enabled

 1148 14:16:46.699379  PCI: 00:1c.7 [8086/0000] bus ops

 1149 14:16:46.702691  PCI: 00:1c.7 [8086/51bf] enabled

 1150 14:16:46.706023  PCI: 00:1d.0 [8086/0000] bus ops

 1151 14:16:46.709753  PCI: 00:1d.0 [8086/51b3] enabled

 1152 14:16:46.712708  PCI: 00:1e.0 [8086/0000] ops

 1153 14:16:46.716094  PCI: 00:1e.0 [8086/51a8] enabled

 1154 14:16:46.719039  PCI: 00:1e.3 [8086/0000] bus ops

 1155 14:16:46.722849  PCI: 00:1e.3 [8086/51ab] enabled

 1156 14:16:46.725965  PCI: 00:1f.0 [8086/0000] bus ops

 1157 14:16:46.729251  PCI: 00:1f.0 [8086/5182] enabled

 1158 14:16:46.729600  RTC Init

 1159 14:16:46.732511  Set power on after power failure.

 1160 14:16:46.735875  Disabling Deep S3

 1161 14:16:46.736247  Disabling Deep S3

 1162 14:16:46.739712  Disabling Deep S4

 1163 14:16:46.742533  Disabling Deep S4

 1164 14:16:46.742894  Disabling Deep S5

 1165 14:16:46.746046  Disabling Deep S5

 1166 14:16:46.749336  PCI: 00:1f.2 [0000/0000] hidden

 1167 14:16:46.752786  PCI: 00:1f.3 [8086/0000] bus ops

 1168 14:16:46.755916  PCI: 00:1f.3 [8086/51c8] enabled

 1169 14:16:46.759621  PCI: 00:1f.4 [8086/0000] bus ops

 1170 14:16:46.762835  PCI: 00:1f.4 [8086/51a3] enabled

 1171 14:16:46.765810  PCI: 00:1f.5 [8086/0000] bus ops

 1172 14:16:46.769384  PCI: 00:1f.5 [8086/51a4] enabled

 1173 14:16:46.769819  GPIO: 0 enabled

 1174 14:16:46.772909  PCI: Leftover static devices:

 1175 14:16:46.773364  PCI: 00:01.0

 1176 14:16:46.775861  PCI: 00:01.1

 1177 14:16:46.776338  PCI: 00:05.0

 1178 14:16:46.779680  PCI: 00:06.0

 1179 14:16:46.780138  PCI: 00:06.2

 1180 14:16:46.780422  PCI: 00:09.0

 1181 14:16:46.782919  PCI: 00:0d.1

 1182 14:16:46.783378  PCI: 00:0e.0

 1183 14:16:46.786199  PCI: 00:10.0

 1184 14:16:46.786658  PCI: 00:10.1

 1185 14:16:46.789495  PCI: 00:10.6

 1186 14:16:46.789955  PCI: 00:10.7

 1187 14:16:46.790220  PCI: 00:12.0

 1188 14:16:46.792664  PCI: 00:12.6

 1189 14:16:46.793015  PCI: 00:12.7

 1190 14:16:46.795980  PCI: 00:13.0

 1191 14:16:46.796469  PCI: 00:14.1

 1192 14:16:46.796750  PCI: 00:15.2

 1193 14:16:46.799652  PCI: 00:15.3

 1194 14:16:46.800110  PCI: 00:16.1

 1195 14:16:46.802839  PCI: 00:16.2

 1196 14:16:46.803296  PCI: 00:16.3

 1197 14:16:46.803564  PCI: 00:16.4

 1198 14:16:46.805933  PCI: 00:16.5

 1199 14:16:46.806278  PCI: 00:17.0

 1200 14:16:46.809436  PCI: 00:19.0

 1201 14:16:46.809898  PCI: 00:19.1

 1202 14:16:46.812723  PCI: 00:19.2

 1203 14:16:46.813178  PCI: 00:1a.0

 1204 14:16:46.813441  PCI: 00:1e.1

 1205 14:16:46.815909  PCI: 00:1e.2

 1206 14:16:46.816266  PCI: 00:1f.1

 1207 14:16:46.819043  PCI: 00:1f.6

 1208 14:16:46.819403  PCI: 00:1f.7

 1209 14:16:46.822771  PCI: Check your devicetree.cb.

 1210 14:16:46.825984  PCI: 00:02.0 scanning...

 1211 14:16:46.829389  scan_generic_bus for PCI: 00:02.0

 1212 14:16:46.832429  scan_generic_bus for PCI: 00:02.0 done

 1213 14:16:46.835754  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1214 14:16:46.839204  PCI: 00:04.0 scanning...

 1215 14:16:46.842776  scan_generic_bus for PCI: 00:04.0

 1216 14:16:46.845539  GENERIC: 0.0 enabled

 1217 14:16:46.852526  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1218 14:16:46.855803  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1219 14:16:46.858980  PCI: 00:07.0 scanning...

 1220 14:16:46.862360  do_pci_scan_bridge for PCI: 00:07.0

 1221 14:16:46.865437  PCI: pci_scan_bus for bus 01

 1222 14:16:46.865808  GENERIC: 0.0 enabled

 1223 14:16:46.872703  scan_bus: bus PCI: 00:07.0 finished in 8 msecs

 1224 14:16:46.875806  PCI: 00:07.1 scanning...

 1225 14:16:46.879019  do_pci_scan_bridge for PCI: 00:07.1

 1226 14:16:46.882274  PCI: pci_scan_bus for bus 2c

 1227 14:16:46.882713  GENERIC: 1.0 enabled

 1228 14:16:46.889227  scan_bus: bus PCI: 00:07.1 finished in 8 msecs

 1229 14:16:46.889726  PCI: 00:07.2 scanning...

 1230 14:16:46.895489  do_pci_scan_bridge for PCI: 00:07.2

 1231 14:16:46.895921  PCI: pci_scan_bus for bus 57

 1232 14:16:46.899086  GENERIC: 0.0 enabled

 1233 14:16:46.902410  scan_bus: bus PCI: 00:07.2 finished in 8 msecs

 1234 14:16:46.905800  PCI: 00:0d.0 scanning...

 1235 14:16:46.909158  scan_static_bus for PCI: 00:0d.0

 1236 14:16:46.912702  USB0 port 0 enabled

 1237 14:16:46.915655  USB0 port 0 scanning...

 1238 14:16:46.918847  scan_static_bus for USB0 port 0

 1239 14:16:46.919255  USB3 port 0 enabled

 1240 14:16:46.922669  USB3 port 1 disabled

 1241 14:16:46.923125  USB3 port 2 enabled

 1242 14:16:46.925554  USB3 port 3 disabled

 1243 14:16:46.928730  USB3 port 0 scanning...

 1244 14:16:46.932443  scan_static_bus for USB3 port 0

 1245 14:16:46.935599  scan_static_bus for USB3 port 0 done

 1246 14:16:46.938789  scan_bus: bus USB3 port 0 finished in 6 msecs

 1247 14:16:46.942216  USB3 port 2 scanning...

 1248 14:16:46.945547  scan_static_bus for USB3 port 2

 1249 14:16:46.949070  scan_static_bus for USB3 port 2 done

 1250 14:16:46.952233  scan_bus: bus USB3 port 2 finished in 6 msecs

 1251 14:16:46.958923  scan_static_bus for USB0 port 0 done

 1252 14:16:46.962285  scan_bus: bus USB0 port 0 finished in 43 msecs

 1253 14:16:46.965304  scan_static_bus for PCI: 00:0d.0 done

 1254 14:16:46.972183  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1255 14:16:46.972684  PCI: 00:0d.2 scanning...

 1256 14:16:46.975386  scan_generic_bus for PCI: 00:0d.2

 1257 14:16:46.978824  GENERIC: 0.0 enabled

 1258 14:16:46.985806  bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done

 1259 14:16:46.988795  scan_bus: bus PCI: 00:0d.2 finished in 11 msecs

 1260 14:16:46.991972  PCI: 00:0d.3 scanning...

 1261 14:16:46.995320  scan_generic_bus for PCI: 00:0d.3

 1262 14:16:46.998633  GENERIC: 0.0 enabled

 1263 14:16:47.005106  bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done

 1264 14:16:47.008879  scan_bus: bus PCI: 00:0d.3 finished in 11 msecs

 1265 14:16:47.012082  PCI: 00:14.0 scanning...

 1266 14:16:47.015363  scan_static_bus for PCI: 00:14.0

 1267 14:16:47.015817  USB0 port 0 enabled

 1268 14:16:47.018330  USB0 port 0 scanning...

 1269 14:16:47.021623  scan_static_bus for USB0 port 0

 1270 14:16:47.025440  USB2 port 0 enabled

 1271 14:16:47.025897  USB2 port 1 disabled

 1272 14:16:47.028388  USB2 port 2 enabled

 1273 14:16:47.031683  USB2 port 3 enabled

 1274 14:16:47.032114  USB2 port 4 enabled

 1275 14:16:47.035205  USB2 port 5 enabled

 1276 14:16:47.035669  USB2 port 6 enabled

 1277 14:16:47.038326  USB2 port 7 enabled

 1278 14:16:47.041983  USB2 port 8 disabled

 1279 14:16:47.042448  USB2 port 9 enabled

 1280 14:16:47.044959  USB3 port 0 enabled

 1281 14:16:47.048254  USB3 port 1 enabled

 1282 14:16:47.048632  USB3 port 2 enabled

 1283 14:16:47.051875  USB3 port 3 enabled

 1284 14:16:47.055108  USB2 port 0 scanning...

 1285 14:16:47.058405  scan_static_bus for USB2 port 0

 1286 14:16:47.061699  scan_static_bus for USB2 port 0 done

 1287 14:16:47.065163  scan_bus: bus USB2 port 0 finished in 6 msecs

 1288 14:16:47.068121  USB2 port 2 scanning...

 1289 14:16:47.071880  scan_static_bus for USB2 port 2

 1290 14:16:47.075041  scan_static_bus for USB2 port 2 done

 1291 14:16:47.078522  scan_bus: bus USB2 port 2 finished in 6 msecs

 1292 14:16:47.081969  USB2 port 3 scanning...

 1293 14:16:47.085074  scan_static_bus for USB2 port 3

 1294 14:16:47.088493  scan_static_bus for USB2 port 3 done

 1295 14:16:47.091946  scan_bus: bus USB2 port 3 finished in 6 msecs

 1296 14:16:47.095103  USB2 port 4 scanning...

 1297 14:16:47.098416  scan_static_bus for USB2 port 4

 1298 14:16:47.101772  scan_static_bus for USB2 port 4 done

 1299 14:16:47.108286  scan_bus: bus USB2 port 4 finished in 6 msecs

 1300 14:16:47.108734  USB2 port 5 scanning...

 1301 14:16:47.111868  scan_static_bus for USB2 port 5

 1302 14:16:47.115201  scan_static_bus for USB2 port 5 done

 1303 14:16:47.121512  scan_bus: bus USB2 port 5 finished in 6 msecs

 1304 14:16:47.124904  USB2 port 6 scanning...

 1305 14:16:47.128371  scan_static_bus for USB2 port 6

 1306 14:16:47.131656  scan_static_bus for USB2 port 6 done

 1307 14:16:47.134749  scan_bus: bus USB2 port 6 finished in 6 msecs

 1308 14:16:47.138160  USB2 port 7 scanning...

 1309 14:16:47.141798  scan_static_bus for USB2 port 7

 1310 14:16:47.144856  scan_static_bus for USB2 port 7 done

 1311 14:16:47.148289  scan_bus: bus USB2 port 7 finished in 6 msecs

 1312 14:16:47.151558  USB2 port 9 scanning...

 1313 14:16:47.154803  scan_static_bus for USB2 port 9

 1314 14:16:47.157952  scan_static_bus for USB2 port 9 done

 1315 14:16:47.161314  scan_bus: bus USB2 port 9 finished in 6 msecs

 1316 14:16:47.164738  USB3 port 0 scanning...

 1317 14:16:47.168074  scan_static_bus for USB3 port 0

 1318 14:16:47.171564  scan_static_bus for USB3 port 0 done

 1319 14:16:47.177946  scan_bus: bus USB3 port 0 finished in 6 msecs

 1320 14:16:47.178403  USB3 port 1 scanning...

 1321 14:16:47.181378  scan_static_bus for USB3 port 1

 1322 14:16:47.184754  scan_static_bus for USB3 port 1 done

 1323 14:16:47.191527  scan_bus: bus USB3 port 1 finished in 6 msecs

 1324 14:16:47.194708  USB3 port 2 scanning...

 1325 14:16:47.197940  scan_static_bus for USB3 port 2

 1326 14:16:47.201545  scan_static_bus for USB3 port 2 done

 1327 14:16:47.204729  scan_bus: bus USB3 port 2 finished in 6 msecs

 1328 14:16:47.207724  USB3 port 3 scanning...

 1329 14:16:47.211237  scan_static_bus for USB3 port 3

 1330 14:16:47.214684  scan_static_bus for USB3 port 3 done

 1331 14:16:47.217839  scan_bus: bus USB3 port 3 finished in 6 msecs

 1332 14:16:47.221174  scan_static_bus for USB0 port 0 done

 1333 14:16:47.227976  scan_bus: bus USB0 port 0 finished in 203 msecs

 1334 14:16:47.231293  scan_static_bus for PCI: 00:14.0 done

 1335 14:16:47.234756  scan_bus: bus PCI: 00:14.0 finished in 219 msecs

 1336 14:16:47.237801  PCI: 00:14.3 scanning...

 1337 14:16:47.240975  scan_static_bus for PCI: 00:14.3

 1338 14:16:47.244488  GENERIC: 0.0 enabled

 1339 14:16:47.247358  scan_static_bus for PCI: 00:14.3 done

 1340 14:16:47.251157  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1341 14:16:47.254598  PCI: 00:15.0 scanning...

 1342 14:16:47.257778  scan_static_bus for PCI: 00:15.0

 1343 14:16:47.260949  I2C: 00:1a enabled

 1344 14:16:47.264494  scan_static_bus for PCI: 00:15.0 done

 1345 14:16:47.267633  scan_bus: bus PCI: 00:15.0 finished in 9 msecs

 1346 14:16:47.271219  PCI: 00:15.1 scanning...

 1347 14:16:47.274355  scan_static_bus for PCI: 00:15.1

 1348 14:16:47.277775  I2C: 00:50 enabled

 1349 14:16:47.281255  scan_static_bus for PCI: 00:15.1 done

 1350 14:16:47.284497  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1351 14:16:47.287704  PCI: 00:1c.0 scanning...

 1352 14:16:47.291269  do_pci_scan_bridge for PCI: 00:1c.0

 1353 14:16:47.294635  PCI: pci_scan_bus for bus 82

 1354 14:16:47.297818  PCI: 82:00.0 [10ec/0000] ops

 1355 14:16:47.300965  PCI: 82:00.0 [10ec/8168] enabled

 1356 14:16:47.304337  Enabling Common Clock Configuration

 1357 14:16:47.307603  L1 Sub-State supported from root port 28

 1358 14:16:47.310968  L1 Sub-State Support = 0xf

 1359 14:16:47.314518  CommonModeRestoreTime = 0x96

 1360 14:16:47.317868  Power On Value = 0xf, Power On Scale = 0x1

 1361 14:16:47.320911  ASPM: Enabled L1

 1362 14:16:47.324508  PCIe: Max_Payload_Size adjusted to 128

 1363 14:16:47.327521  PCI: 82:00.0: Enabled LTR

 1364 14:16:47.331003  PCI: 82:00.0: Programmed LTR max latencies

 1365 14:16:47.334345  scan_bus: bus PCI: 00:1c.0 finished in 43 msecs

 1366 14:16:47.337572  PCI: 00:1c.7 scanning...

 1367 14:16:47.340873  do_pci_scan_bridge for PCI: 00:1c.7

 1368 14:16:47.344425  PCI: pci_scan_bus for bus 83

 1369 14:16:47.347327  PCI: 83:00.0 [17a0/9755] enabled

 1370 14:16:47.351004  GENERIC: 0.0 enabled

 1371 14:16:47.354562  Enabling Common Clock Configuration

 1372 14:16:47.357687  L1 Sub-State supported from root port 28

 1373 14:16:47.360947  L1 Sub-State Support = 0xf

 1374 14:16:47.364034  CommonModeRestoreTime = 0xff

 1375 14:16:47.367397  Power On Value = 0x1f, Power On Scale = 0x2

 1376 14:16:47.371113  ASPM: Enabled L0s and L1

 1377 14:16:47.374246  PCIe: Max_Payload_Size adjusted to 128

 1378 14:16:47.377948  PCI: 83:00.0: Enabled LTR

 1379 14:16:47.381242  PCI: 83:00.0: Programmed LTR max latencies

 1380 14:16:47.388007  scan_bus: bus PCI: 00:1c.7 finished in 43 msecs

 1381 14:16:47.388497  PCI: 00:1d.0 scanning...

 1382 14:16:47.394536  do_pci_scan_bridge for PCI: 00:1d.0

 1383 14:16:47.395023  PCI: pci_scan_bus for bus 84

 1384 14:16:47.397616  PCI: 84:00.0 [1217/8760] enabled

 1385 14:16:47.401036  GENERIC: 0.0 enabled

 1386 14:16:47.404289  L1 Sub-State supported from root port 29

 1387 14:16:47.407893  L1 Sub-State Support = 0xa

 1388 14:16:47.411073  CommonModeRestoreTime = 0x78

 1389 14:16:47.414697  Power On Value = 0x16, Power On Scale = 0x0

 1390 14:16:47.417778  ASPM: Enabled L1

 1391 14:16:47.420605  PCIe: Max_Payload_Size adjusted to 128

 1392 14:16:47.424565  PCI: 84:00.0: Enabled LTR

 1393 14:16:47.427600  PCI: 84:00.0: Programmed LTR max latencies

 1394 14:16:47.433975  scan_bus: bus PCI: 00:1d.0 finished in 38 msecs

 1395 14:16:47.434338  PCI: 00:1e.3 scanning...

 1396 14:16:47.437273  scan_generic_bus for PCI: 00:1e.3

 1397 14:16:47.444365  scan_generic_bus for PCI: 00:1e.3 done

 1398 14:16:47.447461  scan_bus: bus PCI: 00:1e.3 finished in 7 msecs

 1399 14:16:47.450725  PCI: 00:1f.0 scanning...

 1400 14:16:47.453895  scan_static_bus for PCI: 00:1f.0

 1401 14:16:47.454261  PNP: 0c09.0 enabled

 1402 14:16:47.457567  PNP: 0c09.0 scanning...

 1403 14:16:47.460795  scan_static_bus for PNP: 0c09.0

 1404 14:16:47.464240  scan_static_bus for PNP: 0c09.0 done

 1405 14:16:47.467637  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1406 14:16:47.474520  scan_static_bus for PCI: 00:1f.0 done

 1407 14:16:47.477367  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1408 14:16:47.480934  PCI: 00:1f.2 scanning...

 1409 14:16:47.484235  scan_static_bus for PCI: 00:1f.2

 1410 14:16:47.484725  GENERIC: 0.0 enabled

 1411 14:16:47.487301  GENERIC: 0.0 scanning...

 1412 14:16:47.490813  scan_static_bus for GENERIC: 0.0

 1413 14:16:47.494241  GENERIC: 0.0 enabled

 1414 14:16:47.497493  GENERIC: 1.0 enabled

 1415 14:16:47.500921  scan_static_bus for GENERIC: 0.0 done

 1416 14:16:47.504199  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1417 14:16:47.507575  scan_static_bus for PCI: 00:1f.2 done

 1418 14:16:47.514262  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1419 14:16:47.514691  PCI: 00:1f.3 scanning...

 1420 14:16:47.517578  scan_static_bus for PCI: 00:1f.3

 1421 14:16:47.524050  scan_static_bus for PCI: 00:1f.3 done

 1422 14:16:47.527599  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1423 14:16:47.530970  PCI: 00:1f.4 scanning...

 1424 14:16:47.534184  scan_generic_bus for PCI: 00:1f.4

 1425 14:16:47.537346  scan_generic_bus for PCI: 00:1f.4 done

 1426 14:16:47.540848  scan_bus: bus PCI: 00:1f.4 finished in 7 msecs

 1427 14:16:47.544246  PCI: 00:1f.5 scanning...

 1428 14:16:47.547291  scan_generic_bus for PCI: 00:1f.5

 1429 14:16:47.550707  scan_generic_bus for PCI: 00:1f.5 done

 1430 14:16:47.557414  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1431 14:16:47.560897  scan_bus: bus DOMAIN: 0000 finished in 990 msecs

 1432 14:16:47.563959  scan_static_bus for Root Device done

 1433 14:16:47.570378  scan_bus: bus Root Device finished in 1009 msecs

 1434 14:16:47.570818  done

 1435 14:16:47.577230  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms

 1436 14:16:47.583834  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1437 14:16:47.587362  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1438 14:16:47.593912  SPI flash protection: WPSW=1 SRP0=1

 1439 14:16:47.600461  fast_spi_flash_protect: FPR 0 is enabled for range 0x00f00000-0x00f1ffff

 1440 14:16:47.603998  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.

 1441 14:16:47.610404  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 28 ms

 1442 14:16:47.613932  found VGA at PCI: 00:02.0

 1443 14:16:47.617145  Setting up VGA for PCI: 00:02.0

 1444 14:16:47.620621  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1445 14:16:47.627107  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1446 14:16:47.630333  Allocating resources...

 1447 14:16:47.630859  Reading resources...

 1448 14:16:47.637183  Root Device read_resources bus 0 link: 0

 1449 14:16:47.640260  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1450 14:16:47.643826  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1451 14:16:47.650528  DOMAIN: 0000 read_resources bus 0 link: 0

 1452 14:16:47.653737  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1453 14:16:47.660375  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1454 14:16:47.666982  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1455 14:16:47.673471  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1456 14:16:47.680180  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1457 14:16:47.686548  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1458 14:16:47.693262  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1459 14:16:47.699786  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1460 14:16:47.706605  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1461 14:16:47.713292  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1462 14:16:47.719827  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1463 14:16:47.726434  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1464 14:16:47.729878  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1465 14:16:47.736700  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1466 14:16:47.742979  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1467 14:16:47.749574  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1468 14:16:47.755953  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1469 14:16:47.762739  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1470 14:16:47.769499  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1471 14:16:47.776157  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1472 14:16:47.782919  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1473 14:16:47.786131  PCI: 00:04.0 read_resources bus 1 link: 0

 1474 14:16:47.789438  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1475 14:16:47.793036  PCI: 00:07.0 read_resources bus 1 link: 0

 1476 14:16:47.799626  PCI: 00:07.0 read_resources bus 1 link: 0 done

 1477 14:16:47.803017  PCI: 00:07.1 read_resources bus 44 link: 0

 1478 14:16:47.809546  PCI: 00:07.1 read_resources bus 44 link: 0 done

 1479 14:16:47.812981  PCI: 00:07.2 read_resources bus 87 link: 0

 1480 14:16:47.815871  PCI: 00:07.2 read_resources bus 87 link: 0 done

 1481 14:16:47.822917  PCI: 00:0d.0 read_resources bus 0 link: 0

 1482 14:16:47.826126  USB0 port 0 read_resources bus 0 link: 0

 1483 14:16:47.829845  USB0 port 0 read_resources bus 0 link: 0 done

 1484 14:16:47.836320  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1485 14:16:47.839473  PCI: 00:0d.2 read_resources bus 2 link: 0

 1486 14:16:47.842725  PCI: 00:0d.2 read_resources bus 2 link: 0 done

 1487 14:16:47.849620  PCI: 00:0d.3 read_resources bus 3 link: 0

 1488 14:16:47.852672  PCI: 00:0d.3 read_resources bus 3 link: 0 done

 1489 14:16:47.855732  PCI: 00:14.0 read_resources bus 0 link: 0

 1490 14:16:47.862710  USB0 port 0 read_resources bus 0 link: 0

 1491 14:16:47.866128  USB0 port 0 read_resources bus 0 link: 0 done

 1492 14:16:47.868866  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1493 14:16:47.876042  PCI: 00:14.3 read_resources bus 0 link: 0

 1494 14:16:47.879083  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1495 14:16:47.882615  PCI: 00:15.0 read_resources bus 0 link: 0

 1496 14:16:47.889353  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1497 14:16:47.892891  PCI: 00:15.1 read_resources bus 0 link: 0

 1498 14:16:47.899669  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1499 14:16:47.902741  PCI: 00:1c.0 read_resources bus 130 link: 0

 1500 14:16:47.905985  PCI: 00:1c.0 read_resources bus 130 link: 0 done

 1501 14:16:47.912436  PCI: 00:1c.7 read_resources bus 131 link: 0

 1502 14:16:47.916299  PCI: 00:1c.7 read_resources bus 131 link: 0 done

 1503 14:16:47.922528  PCI: 00:1d.0 read_resources bus 132 link: 0

 1504 14:16:47.925878  PCI: 00:1d.0 read_resources bus 132 link: 0 done

 1505 14:16:47.932688  PCI: 00:1f.0 read_resources bus 0 link: 0

 1506 14:16:47.935899  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1507 14:16:47.939311  PCI: 00:1f.2 read_resources bus 0 link: 0

 1508 14:16:47.945814  GENERIC: 0.0 read_resources bus 0 link: 0

 1509 14:16:47.948887  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1510 14:16:47.952303  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1511 14:16:47.959282  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1512 14:16:47.962442  Root Device read_resources bus 0 link: 0 done

 1513 14:16:47.965981  Done reading resources.

 1514 14:16:47.972727  Show resources in subtree (Root Device)...After reading.

 1515 14:16:47.975815   Root Device child on link 0 CPU_CLUSTER: 0

 1516 14:16:47.979145    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1517 14:16:47.982379     APIC: 00

 1518 14:16:47.982833     APIC: 14

 1519 14:16:47.983096     APIC: 16

 1520 14:16:47.985438     APIC: 10

 1521 14:16:47.985862     APIC: 12

 1522 14:16:47.988823    DOMAIN: 0000 child on link 0 GPIO: 0

 1523 14:16:47.999205    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1524 14:16:48.008873    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1525 14:16:48.009237     GPIO: 0

 1526 14:16:48.012141     PCI: 00:00.0

 1527 14:16:48.022092     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1528 14:16:48.032383     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1529 14:16:48.038915     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1530 14:16:48.048707     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1531 14:16:48.058827     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1532 14:16:48.068908     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1533 14:16:48.078869     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1534 14:16:48.088885     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1535 14:16:48.098583     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1536 14:16:48.105247     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1537 14:16:48.115346     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1538 14:16:48.125171     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1539 14:16:48.135032     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1540 14:16:48.145004     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1541 14:16:48.155055     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1542 14:16:48.161795     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1543 14:16:48.171840     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1544 14:16:48.181950     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1545 14:16:48.191633     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1546 14:16:48.201646     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1547 14:16:48.211903     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1548 14:16:48.221409     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1549 14:16:48.228436     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1550 14:16:48.238129     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1551 14:16:48.248051     PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1552 14:16:48.258043     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1553 14:16:48.268182     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1554 14:16:48.278236     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1555 14:16:48.278698     PCI: 00:02.0

 1556 14:16:48.288111     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1557 14:16:48.301371     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1558 14:16:48.307921     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1559 14:16:48.311351     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1560 14:16:48.324412     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1561 14:16:48.324882      GENERIC: 0.0

 1562 14:16:48.327768     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1563 14:16:48.338138     PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1564 14:16:48.347859     PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1565 14:16:48.357698     PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1566 14:16:48.358133      GENERIC: 0.0

 1567 14:16:48.360798      NONE

 1568 14:16:48.367868      NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10

 1569 14:16:48.377615      NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14

 1570 14:16:48.387864      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18

 1571 14:16:48.390910     PCI: 00:07.1 child on link 0 GENERIC: 1.0

 1572 14:16:48.400959     PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1573 14:16:48.410618     PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1574 14:16:48.417294     PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1575 14:16:48.420862      GENERIC: 1.0

 1576 14:16:48.421326      NONE

 1577 14:16:48.430920      NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10

 1578 14:16:48.440607      NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14

 1579 14:16:48.447422      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18

 1580 14:16:48.453774     PCI: 00:07.2 child on link 0 GENERIC: 0.0

 1581 14:16:48.460988     PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1582 14:16:48.470736     PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1583 14:16:48.480728     PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1584 14:16:48.481184      GENERIC: 0.0

 1585 14:16:48.483986      NONE

 1586 14:16:48.490631      NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10

 1587 14:16:48.500513      NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14

 1588 14:16:48.510789      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18

 1589 14:16:48.511256     PCI: 00:08.0

 1590 14:16:48.513601     PCI: 00:0a.0

 1591 14:16:48.523428     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1592 14:16:48.527262     PCI: 00:0d.0 child on link 0 USB0 port 0

 1593 14:16:48.537026     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1594 14:16:48.540541      USB0 port 0 child on link 0 USB3 port 0

 1595 14:16:48.543959       USB3 port 0

 1596 14:16:48.544452       USB3 port 1

 1597 14:16:48.547140       USB3 port 2

 1598 14:16:48.550346       USB3 port 3

 1599 14:16:48.553530     PCI: 00:0d.2 child on link 0 GENERIC: 0.0

 1600 14:16:48.563657     PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10

 1601 14:16:48.573527     PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1602 14:16:48.573968      GENERIC: 0.0

 1603 14:16:48.580444     PCI: 00:0d.3 child on link 0 GENERIC: 0.0

 1604 14:16:48.590362     PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10

 1605 14:16:48.600172     PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1606 14:16:48.600667      GENERIC: 0.0

 1607 14:16:48.607012     PCI: 00:14.0 child on link 0 USB0 port 0

 1608 14:16:48.616728     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1609 14:16:48.619933      USB0 port 0 child on link 0 USB2 port 0

 1610 14:16:48.623052       USB2 port 0

 1611 14:16:48.623438       USB2 port 1

 1612 14:16:48.626915       USB2 port 2

 1613 14:16:48.627312       USB2 port 3

 1614 14:16:48.630006       USB2 port 4

 1615 14:16:48.630362       USB2 port 5

 1616 14:16:48.633795       USB2 port 6

 1617 14:16:48.634254       USB2 port 7

 1618 14:16:48.636907       USB2 port 8

 1619 14:16:48.637369       USB2 port 9

 1620 14:16:48.640176       USB3 port 0

 1621 14:16:48.640668       USB3 port 1

 1622 14:16:48.643530       USB3 port 2

 1623 14:16:48.643980       USB3 port 3

 1624 14:16:48.646762     PCI: 00:14.2

 1625 14:16:48.656524     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1626 14:16:48.667026     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1627 14:16:48.669974     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1628 14:16:48.679771     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1629 14:16:48.683723      GENERIC: 0.0

 1630 14:16:48.686768     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1631 14:16:48.696485     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1632 14:16:48.699927      I2C: 00:1a

 1633 14:16:48.703433     PCI: 00:15.1 child on link 0 I2C: 00:50

 1634 14:16:48.713405     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1635 14:16:48.713867      I2C: 00:50

 1636 14:16:48.716701     PCI: 00:16.0

 1637 14:16:48.726632     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1638 14:16:48.729918     PCI: 00:1c.0 child on link 0 PCI: 82:00.0

 1639 14:16:48.739666     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1640 14:16:48.749932     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1641 14:16:48.756263     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1642 14:16:48.759777      PCI: 82:00.0

 1643 14:16:48.769503      PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

 1644 14:16:48.779711      PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1645 14:16:48.789507      PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20

 1646 14:16:48.792988     PCI: 00:1c.7 child on link 0 GENERIC: 0.0

 1647 14:16:48.802810     PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1648 14:16:48.812898     PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1649 14:16:48.819448     PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1650 14:16:48.822371      GENERIC: 0.0

 1651 14:16:48.822692      PCI: 83:00.0

 1652 14:16:48.832624      PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1653 14:16:48.839510     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1654 14:16:48.846379     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1655 14:16:48.856417     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1656 14:16:48.866455     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1657 14:16:48.866952      GENERIC: 0.0

 1658 14:16:48.869402      PCI: 84:00.0

 1659 14:16:48.879632      PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1660 14:16:48.880098     PCI: 00:1e.0

 1661 14:16:48.892707     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1662 14:16:48.893167     PCI: 00:1e.3

 1663 14:16:48.902503     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1664 14:16:48.909462     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1665 14:16:48.915814     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1666 14:16:48.919158      PNP: 0c09.0

 1667 14:16:48.925823      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1668 14:16:48.932417     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1669 14:16:48.942367     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1670 14:16:48.949136     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1671 14:16:48.955611      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1672 14:16:48.956092       GENERIC: 0.0

 1673 14:16:48.958924       GENERIC: 1.0

 1674 14:16:48.959420     PCI: 00:1f.3

 1675 14:16:48.968947     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1676 14:16:48.979124     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1677 14:16:48.982459     PCI: 00:1f.4

 1678 14:16:48.992187     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1679 14:16:49.002348     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1680 14:16:49.002969     PCI: 00:1f.5

 1681 14:16:49.012213     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1682 14:16:49.018888  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1683 14:16:49.025578   PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1684 14:16:49.028981    NONE 18 *  [0x0 - 0x1fff] io

 1685 14:16:49.035726   PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done

 1686 14:16:49.038949   PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1687 14:16:49.042025    NONE 10 *  [0x0 - 0xc1fffff] mem

 1688 14:16:49.052275   PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done

 1689 14:16:49.058942   PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1690 14:16:49.062425    NONE 14 *  [0x0 - 0x1bffffff] prefmem

 1691 14:16:49.072291   PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done

 1692 14:16:49.075449   PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff

 1693 14:16:49.078742    NONE 18 *  [0x0 - 0x1fff] io

 1694 14:16:49.085357   PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done

 1695 14:16:49.092100   PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1696 14:16:49.095359    NONE 10 *  [0x0 - 0xc1fffff] mem

 1697 14:16:49.101870   PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done

 1698 14:16:49.108819   PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1699 14:16:49.115353    NONE 14 *  [0x0 - 0x1bffffff] prefmem

 1700 14:16:49.121613   PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done

 1701 14:16:49.128493   PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff

 1702 14:16:49.131851    NONE 18 *  [0x0 - 0x1fff] io

 1703 14:16:49.138801   PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done

 1704 14:16:49.144769   PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1705 14:16:49.148168    NONE 10 *  [0x0 - 0xc1fffff] mem

 1706 14:16:49.155185   PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done

 1707 14:16:49.161809   PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1708 14:16:49.164990    NONE 14 *  [0x0 - 0x1bffffff] prefmem

 1709 14:16:49.175030   PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done

 1710 14:16:49.181546   PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1711 14:16:49.184754    PCI: 82:00.0 10 *  [0x0 - 0xff] io

 1712 14:16:49.191554   PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done

 1713 14:16:49.198374   PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1714 14:16:49.201462    PCI: 82:00.0 20 *  [0x0 - 0x3fff] mem

 1715 14:16:49.204729    PCI: 82:00.0 18 *  [0x4000 - 0x4fff] mem

 1716 14:16:49.211270   PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1717 14:16:49.217781   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1718 14:16:49.227648   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1719 14:16:49.231156   PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff

 1720 14:16:49.237769   PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done

 1721 14:16:49.244445   PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1722 14:16:49.247864    PCI: 83:00.0 10 *  [0x0 - 0xfff] mem

 1723 14:16:49.257681   PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1724 14:16:49.264325   PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1725 14:16:49.270983   PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1726 14:16:49.277730   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1727 14:16:49.284476   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1728 14:16:49.287632   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1729 14:16:49.294052    PCI: 84:00.0 10 *  [0x0 - 0x3fff] mem

 1730 14:16:49.300896   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1731 14:16:49.307314   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1732 14:16:49.314128   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1733 14:16:49.323825  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1734 14:16:49.327710  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1735 14:16:49.337461   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1736 14:16:49.344161   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1737 14:16:49.350880   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1738 14:16:49.360590   update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1739 14:16:49.361049   DOMAIN: 0000: Resource ranges:

 1740 14:16:49.367328   * Base: 1000, Size: 800, Tag: 100

 1741 14:16:49.370663   * Base: 1900, Size: d6a0, Tag: 100

 1742 14:16:49.373976   * Base: efc0, Size: 1040, Tag: 100

 1743 14:16:49.377152    PCI: 00:07.0 1c *  [0x2000 - 0x3fff] limit: 3fff io

 1744 14:16:49.383866    PCI: 00:07.1 1c *  [0x4000 - 0x5fff] limit: 5fff io

 1745 14:16:49.390525    PCI: 00:07.2 1c *  [0x6000 - 0x7fff] limit: 7fff io

 1746 14:16:49.394220    PCI: 00:1c.0 1c *  [0x8000 - 0x8fff] limit: 8fff io

 1747 14:16:49.400445    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1748 14:16:49.407109  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1749 14:16:49.414275  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1750 14:16:49.420080   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1751 14:16:49.430009   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1752 14:16:49.437222   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1753 14:16:49.443351   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1754 14:16:49.450262   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1755 14:16:49.459932   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1756 14:16:49.466678   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1757 14:16:49.473228   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1758 14:16:49.483425   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1759 14:16:49.490235   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1760 14:16:49.496619   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1761 14:16:49.506590   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1762 14:16:49.513127   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1763 14:16:49.519906   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1764 14:16:49.529819   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1765 14:16:49.536417   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1766 14:16:49.543117   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1767 14:16:49.553104   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1768 14:16:49.559526   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1769 14:16:49.566218   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1770 14:16:49.576352   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1771 14:16:49.582836   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1772 14:16:49.589555   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1773 14:16:49.599355   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1774 14:16:49.606034   update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed)

 1775 14:16:49.612804   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1776 14:16:49.622755   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1777 14:16:49.629221   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1778 14:16:49.635591   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1779 14:16:49.645681   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1780 14:16:49.649233   DOMAIN: 0000: Resource ranges:

 1781 14:16:49.652383   * Base: 80400000, Size: 3fc00000, Tag: 200

 1782 14:16:49.655735   * Base: d0000000, Size: 28000000, Tag: 200

 1783 14:16:49.662594   * Base: fa000000, Size: 1000000, Tag: 200

 1784 14:16:49.665742   * Base: fb001000, Size: 17ff000, Tag: 200

 1785 14:16:49.669004   * Base: fe800000, Size: 300000, Tag: 200

 1786 14:16:49.672492   * Base: feb80000, Size: 80000, Tag: 200

 1787 14:16:49.679058   * Base: fed00000, Size: 40000, Tag: 200

 1788 14:16:49.682691   * Base: fed70000, Size: 10000, Tag: 200

 1789 14:16:49.685911   * Base: fed88000, Size: 8000, Tag: 200

 1790 14:16:49.689027   * Base: fed93000, Size: d000, Tag: 200

 1791 14:16:49.692539   * Base: feda2000, Size: 1e000, Tag: 200

 1792 14:16:49.699326   * Base: fede0000, Size: 1220000, Tag: 200

 1793 14:16:49.702317   * Base: 17fc00000, Size: 7e80400000, Tag: 100200

 1794 14:16:49.709020    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1795 14:16:49.715747    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1796 14:16:49.722210    PCI: 00:07.0 20 *  [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem

 1797 14:16:49.729006    PCI: 00:07.1 20 *  [0xa0000000 - 0xac1fffff] limit: ac1fffff mem

 1798 14:16:49.735413    PCI: 00:07.2 20 *  [0xac200000 - 0xb83fffff] limit: b83fffff mem

 1799 14:16:49.742122    PCI: 00:1c.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1800 14:16:49.748823    PCI: 00:1c.7 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1801 14:16:49.755330    PCI: 00:1d.0 20 *  [0x80600000 - 0x806fffff] limit: 806fffff mem

 1802 14:16:49.761816    PCI: 00:1f.3 20 *  [0x80700000 - 0x807fffff] limit: 807fffff mem

 1803 14:16:49.768456    PCI: 00:0d.2 10 *  [0x80800000 - 0x8083ffff] limit: 8083ffff mem

 1804 14:16:49.775098    PCI: 00:0d.3 10 *  [0x80840000 - 0x8087ffff] limit: 8087ffff mem

 1805 14:16:49.781848    PCI: 00:04.0 10 *  [0x80880000 - 0x8089ffff] limit: 8089ffff mem

 1806 14:16:49.788228    PCI: 00:0d.0 10 *  [0x808a0000 - 0x808affff] limit: 808affff mem

 1807 14:16:49.794815    PCI: 00:14.0 10 *  [0x808b0000 - 0x808bffff] limit: 808bffff mem

 1808 14:16:49.801501    PCI: 00:0a.0 10 *  [0x808c0000 - 0x808c7fff] limit: 808c7fff mem

 1809 14:16:49.807916    PCI: 00:14.2 10 *  [0x808c8000 - 0x808cbfff] limit: 808cbfff mem

 1810 14:16:49.814413    PCI: 00:14.3 10 *  [0x808cc000 - 0x808cffff] limit: 808cffff mem

 1811 14:16:49.821264    PCI: 00:1f.3 10 *  [0x808d0000 - 0x808d3fff] limit: 808d3fff mem

 1812 14:16:49.827881    PCI: 00:0d.2 18 *  [0x808d4000 - 0x808d4fff] limit: 808d4fff mem

 1813 14:16:49.834436    PCI: 00:0d.3 18 *  [0x808d5000 - 0x808d5fff] limit: 808d5fff mem

 1814 14:16:49.840952    PCI: 00:14.2 18 *  [0x808d6000 - 0x808d6fff] limit: 808d6fff mem

 1815 14:16:49.847542    PCI: 00:15.0 10 *  [0x808d7000 - 0x808d7fff] limit: 808d7fff mem

 1816 14:16:49.854394    PCI: 00:15.1 10 *  [0x808d8000 - 0x808d8fff] limit: 808d8fff mem

 1817 14:16:49.864204    PCI: 00:16.0 10 *  [0x808d9000 - 0x808d9fff] limit: 808d9fff mem

 1818 14:16:49.871158    PCI: 00:1e.3 10 *  [0x808da000 - 0x808dafff] limit: 808dafff mem

 1819 14:16:49.877519    PCI: 00:1f.5 10 *  [0x808db000 - 0x808dbfff] limit: 808dbfff mem

 1820 14:16:49.884133    PCI: 00:1f.4 10 *  [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem

 1821 14:16:49.891001    PCI: 00:07.0 24 *  [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem

 1822 14:16:49.897501    PCI: 00:07.1 24 *  [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem

 1823 14:16:49.904318    PCI: 00:07.2 24 *  [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem

 1824 14:16:49.910723  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1825 14:16:49.917601  PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff

 1826 14:16:49.920371   PCI: 00:07.0: Resource ranges:

 1827 14:16:49.927299   * Base: 2000, Size: 2000, Tag: 100

 1828 14:16:49.930472    NONE 18 *  [0x2000 - 0x3fff] limit: 3fff io

 1829 14:16:49.937208  PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done

 1830 14:16:49.947289  PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff

 1831 14:16:49.950264   PCI: 00:07.0: Resource ranges:

 1832 14:16:49.953655   * Base: 17fc00000, Size: 1c000000, Tag: 1200

 1833 14:16:49.960469    NONE 14 *  [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem

 1834 14:16:49.970568  PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done

 1835 14:16:49.977150  PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff

 1836 14:16:49.980363   PCI: 00:07.0: Resource ranges:

 1837 14:16:49.987109   * Base: 82000000, Size: c200000, Tag: 200

 1838 14:16:49.990208    NONE 10 *  [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem

 1839 14:16:50.000283  PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done

 1840 14:16:50.006837  PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff

 1841 14:16:50.010090   PCI: 00:07.1: Resource ranges:

 1842 14:16:50.013769   * Base: 4000, Size: 2000, Tag: 100

 1843 14:16:50.016970    NONE 18 *  [0x4000 - 0x5fff] limit: 5fff io

 1844 14:16:50.026622  PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done

 1845 14:16:50.033334  PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff

 1846 14:16:50.036738   PCI: 00:07.1: Resource ranges:

 1847 14:16:50.043409   * Base: 19bc00000, Size: 1c000000, Tag: 1200

 1848 14:16:50.049875    NONE 14 *  [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem

 1849 14:16:50.056740  PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done

 1850 14:16:50.066543  PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff

 1851 14:16:50.069708   PCI: 00:07.1: Resource ranges:

 1852 14:16:50.072941   * Base: a0000000, Size: c200000, Tag: 200

 1853 14:16:50.079777    NONE 10 *  [0xa0000000 - 0xac1fffff] limit: ac1fffff mem

 1854 14:16:50.089971  PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done

 1855 14:16:50.096482  PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff

 1856 14:16:50.099812   PCI: 00:07.2: Resource ranges:

 1857 14:16:50.103247   * Base: 6000, Size: 2000, Tag: 100

 1858 14:16:50.106293    NONE 18 *  [0x6000 - 0x7fff] limit: 7fff io

 1859 14:16:50.113051  PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done

 1860 14:16:50.122880  PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff

 1861 14:16:50.126213   PCI: 00:07.2: Resource ranges:

 1862 14:16:50.129567   * Base: 1b7c00000, Size: 1c000000, Tag: 1200

 1863 14:16:50.136215    NONE 14 *  [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem

 1864 14:16:50.146061  PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done

 1865 14:16:50.156007  PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff

 1866 14:16:50.156534   PCI: 00:07.2: Resource ranges:

 1867 14:16:50.162792   * Base: ac200000, Size: c200000, Tag: 200

 1868 14:16:50.169231    NONE 10 *  [0xac200000 - 0xb83fffff] limit: b83fffff mem

 1869 14:16:50.176213  PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done

 1870 14:16:50.182440  PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff

 1871 14:16:50.185911   PCI: 00:1c.0: Resource ranges:

 1872 14:16:50.189246   * Base: 8000, Size: 1000, Tag: 100

 1873 14:16:50.195656    PCI: 82:00.0 10 *  [0x8000 - 0x80ff] limit: 80ff io

 1874 14:16:50.202552  PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done

 1875 14:16:50.212716  PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1876 14:16:50.215696   PCI: 00:1c.0: Resource ranges:

 1877 14:16:50.219090   * Base: 80400000, Size: 100000, Tag: 200

 1878 14:16:50.225343    PCI: 82:00.0 20 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1879 14:16:50.232465    PCI: 82:00.0 18 *  [0x80404000 - 0x80404fff] limit: 80404fff mem

 1880 14:16:50.238805  PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1881 14:16:50.248960  PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff

 1882 14:16:50.252245   PCI: 00:1c.7: Resource ranges:

 1883 14:16:50.255348   * Base: 80500000, Size: 100000, Tag: 200

 1884 14:16:50.262114    PCI: 83:00.0 10 *  [0x80500000 - 0x80500fff] limit: 80500fff mem

 1885 14:16:50.271841  PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done

 1886 14:16:50.279128  PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff

 1887 14:16:50.281941   PCI: 00:1d.0: Resource ranges:

 1888 14:16:50.285126   * Base: 80600000, Size: 100000, Tag: 200

 1889 14:16:50.292060    PCI: 84:00.0 10 *  [0x80600000 - 0x80603fff] limit: 80603fff mem

 1890 14:16:50.301831  PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done

 1891 14:16:50.308507  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1892 14:16:50.312049  Root Device assign_resources, bus 0 link: 0

 1893 14:16:50.318546  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1894 14:16:50.325096  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1895 14:16:50.335253  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1896 14:16:50.341917  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1897 14:16:50.348684  PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64

 1898 14:16:50.355035  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1899 14:16:50.358473  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1900 14:16:50.368531  PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io

 1901 14:16:50.375259  PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem

 1902 14:16:50.384898  PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem

 1903 14:16:50.388242  PCI: 00:07.0 assign_resources, bus 1 link: 0

 1904 14:16:50.394785  PCI: 00:07.0 assign_resources, bus 1 link: 0 done

 1905 14:16:50.401498  PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io

 1906 14:16:50.411379  PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem

 1907 14:16:50.418301  PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem

 1908 14:16:50.424641  PCI: 00:07.1 assign_resources, bus 44 link: 0

 1909 14:16:50.427779  PCI: 00:07.1 assign_resources, bus 44 link: 0 done

 1910 14:16:50.438052  PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io

 1911 14:16:50.448046  PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem

 1912 14:16:50.454486  PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem

 1913 14:16:50.461103  PCI: 00:07.2 assign_resources, bus 87 link: 0

 1914 14:16:50.464322  PCI: 00:07.2 assign_resources, bus 87 link: 0 done

 1915 14:16:50.471103  PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64

 1916 14:16:50.480999  PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64

 1917 14:16:50.484235  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1918 14:16:50.491074  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1919 14:16:50.497701  PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64

 1920 14:16:50.507419  PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64

 1921 14:16:50.510836  PCI: 00:0d.2 assign_resources, bus 2 link: 0

 1922 14:16:50.514232  PCI: 00:0d.2 assign_resources, bus 2 link: 0 done

 1923 14:16:50.524128  PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64

 1924 14:16:50.530738  PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64

 1925 14:16:50.537572  PCI: 00:0d.3 assign_resources, bus 3 link: 0

 1926 14:16:50.540795  PCI: 00:0d.3 assign_resources, bus 3 link: 0 done

 1927 14:16:50.550707  PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64

 1928 14:16:50.554160  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1929 14:16:50.557098  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1930 14:16:50.567436  PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64

 1931 14:16:50.573814  PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64

 1932 14:16:50.583680  PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64

 1933 14:16:50.587005  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1934 14:16:50.590338  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1935 14:16:50.600510  PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64

 1936 14:16:50.603812  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1937 14:16:50.610549  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1938 14:16:50.616620  PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64

 1939 14:16:50.623797  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1940 14:16:50.626725  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1941 14:16:50.633837  PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64

 1942 14:16:50.643812  PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io

 1943 14:16:50.653966  PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem

 1944 14:16:50.663450  PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem

 1945 14:16:50.666898  PCI: 00:1c.0 assign_resources, bus 130 link: 0

 1946 14:16:50.673591  PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io

 1947 14:16:50.683628  PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64

 1948 14:16:50.690121  PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1949 14:16:50.696672  PCI: 00:1c.0 assign_resources, bus 130 link: 0 done

 1950 14:16:50.703504  PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io

 1951 14:16:50.713179  PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem

 1952 14:16:50.723160  PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem

 1953 14:16:50.726323  PCI: 00:1c.7 assign_resources, bus 131 link: 0

 1954 14:16:50.736615  PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem

 1955 14:16:50.739504  PCI: 00:1c.7 assign_resources, bus 131 link: 0 done

 1956 14:16:50.749749  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io

 1957 14:16:50.759682  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem

 1958 14:16:50.766345  PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem

 1959 14:16:50.773111  PCI: 00:1d.0 assign_resources, bus 132 link: 0

 1960 14:16:50.779787  PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64

 1961 14:16:50.786647  PCI: 00:1d.0 assign_resources, bus 132 link: 0 done

 1962 14:16:50.793167  PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64

 1963 14:16:50.796115  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1964 14:16:50.803100  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1965 14:16:50.806476  LPC: Trying to open IO window from 800 size 1ff

 1966 14:16:50.816101  PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64

 1967 14:16:50.823000  PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64

 1968 14:16:50.832522  PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64

 1969 14:16:50.839400  PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem

 1970 14:16:50.843008  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1971 14:16:50.849290  Root Device assign_resources, bus 0 link: 0 done

 1972 14:16:50.852690  Done setting resources.

 1973 14:16:50.859518  Show resources in subtree (Root Device)...After assigning values.

 1974 14:16:50.862385   Root Device child on link 0 CPU_CLUSTER: 0

 1975 14:16:50.865940    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1976 14:16:50.869083     APIC: 00

 1977 14:16:50.869445     APIC: 14

 1978 14:16:50.869693     APIC: 16

 1979 14:16:50.872709     APIC: 10

 1980 14:16:50.873165     APIC: 12

 1981 14:16:50.876003    DOMAIN: 0000 child on link 0 GPIO: 0

 1982 14:16:50.885644    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1983 14:16:50.895473    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1984 14:16:50.895886     GPIO: 0

 1985 14:16:50.898873     PCI: 00:00.0

 1986 14:16:50.909026     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1987 14:16:50.919115     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1988 14:16:50.925211     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1989 14:16:50.935448     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1990 14:16:50.945573     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1991 14:16:50.955507     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1992 14:16:50.965639     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1993 14:16:50.975151     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1994 14:16:50.984887     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1995 14:16:50.991543     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1996 14:16:51.001557     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1997 14:16:51.011681     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1998 14:16:51.021122     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1999 14:16:51.031625     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 2000 14:16:51.040935     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 2001 14:16:51.051063     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 2002 14:16:51.057470     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 2003 14:16:51.067475     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 2004 14:16:51.077212     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 2005 14:16:51.087480     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 2006 14:16:51.097463     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 2007 14:16:51.107305     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 2008 14:16:51.117086     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 2009 14:16:51.126486     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 2010 14:16:51.136901     PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 2011 14:16:51.143820     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 2012 14:16:51.153706     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 2013 14:16:51.163174     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 2014 14:16:51.166884     PCI: 00:02.0

 2015 14:16:51.177199     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 2016 14:16:51.186432     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 2017 14:16:51.196604     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 2018 14:16:51.199887     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 2019 14:16:51.209960     PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10

 2020 14:16:51.213234      GENERIC: 0.0

 2021 14:16:51.216310     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 2022 14:16:51.226284     PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c

 2023 14:16:51.236168     PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24

 2024 14:16:51.249808     PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20

 2025 14:16:51.250271      GENERIC: 0.0

 2026 14:16:51.250532      NONE

 2027 14:16:51.259757      NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10

 2028 14:16:51.272913      NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14

 2029 14:16:51.279498      NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18

 2030 14:16:51.286246     PCI: 00:07.1 child on link 0 GENERIC: 1.0

 2031 14:16:51.292872     PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c

 2032 14:16:51.305935     PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24

 2033 14:16:51.316167     PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20

 2034 14:16:51.319411      GENERIC: 1.0

 2035 14:16:51.319913      NONE

 2036 14:16:51.329121      NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10

 2037 14:16:51.339080      NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14

 2038 14:16:51.349425      NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18

 2039 14:16:51.352488     PCI: 00:07.2 child on link 0 GENERIC: 0.0

 2040 14:16:51.362721     PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c

 2041 14:16:51.372211     PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24

 2042 14:16:51.382323     PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20

 2043 14:16:51.385752      GENERIC: 0.0

 2044 14:16:51.386214      NONE

 2045 14:16:51.395623      NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10

 2046 14:16:51.405634      NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14

 2047 14:16:51.415607      NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18

 2048 14:16:51.416071     PCI: 00:08.0

 2049 14:16:51.418881     PCI: 00:0a.0

 2050 14:16:51.428447     PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10

 2051 14:16:51.431928     PCI: 00:0d.0 child on link 0 USB0 port 0

 2052 14:16:51.445464     PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10

 2053 14:16:51.448152      USB0 port 0 child on link 0 USB3 port 0

 2054 14:16:51.448540       USB3 port 0

 2055 14:16:51.451891       USB3 port 1

 2056 14:16:51.452360       USB3 port 2

 2057 14:16:51.455207       USB3 port 3

 2058 14:16:51.458660     PCI: 00:0d.2 child on link 0 GENERIC: 0.0

 2059 14:16:51.468350     PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10

 2060 14:16:51.481594     PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18

 2061 14:16:51.482036      GENERIC: 0.0

 2062 14:16:51.484753     PCI: 00:0d.3 child on link 0 GENERIC: 0.0

 2063 14:16:51.498541     PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10

 2064 14:16:51.508637     PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18

 2065 14:16:51.509104      GENERIC: 0.0

 2066 14:16:51.514767     PCI: 00:14.0 child on link 0 USB0 port 0

 2067 14:16:51.524936     PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10

 2068 14:16:51.528023      USB0 port 0 child on link 0 USB2 port 0

 2069 14:16:51.531580       USB2 port 0

 2070 14:16:51.532051       USB2 port 1

 2071 14:16:51.534897       USB2 port 2

 2072 14:16:51.535363       USB2 port 3

 2073 14:16:51.538306       USB2 port 4

 2074 14:16:51.538760       USB2 port 5

 2075 14:16:51.541423       USB2 port 6

 2076 14:16:51.541879       USB2 port 7

 2077 14:16:51.545196       USB2 port 8

 2078 14:16:51.545493       USB2 port 9

 2079 14:16:51.548147       USB3 port 0

 2080 14:16:51.548641       USB3 port 1

 2081 14:16:51.551521       USB3 port 2

 2082 14:16:51.555123       USB3 port 3

 2083 14:16:51.555581     PCI: 00:14.2

 2084 14:16:51.564932     PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10

 2085 14:16:51.575047     PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18

 2086 14:16:51.581567     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 2087 14:16:51.591588     PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10

 2088 14:16:51.592262      GENERIC: 0.0

 2089 14:16:51.598408     PCI: 00:15.0 child on link 0 I2C: 00:1a

 2090 14:16:51.605484     PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10

 2091 14:16:51.609455      I2C: 00:1a

 2092 14:16:51.612882     PCI: 00:15.1 child on link 0 I2C: 00:50

 2093 14:16:51.623902     PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10

 2094 14:16:51.624417      I2C: 00:50

 2095 14:16:51.627464     PCI: 00:16.0

 2096 14:16:51.635339     PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10

 2097 14:16:51.642571     PCI: 00:1c.0 child on link 0 PCI: 82:00.0

 2098 14:16:51.650043     PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c

 2099 14:16:51.660958     PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 2100 14:16:51.674379     PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 2101 14:16:51.674918      PCI: 82:00.0

 2102 14:16:51.684285      PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10

 2103 14:16:51.694135      PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18

 2104 14:16:51.703970      PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20

 2105 14:16:51.710966     PCI: 00:1c.7 child on link 0 GENERIC: 0.0

 2106 14:16:51.717336     PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 2107 14:16:51.730840     PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 2108 14:16:51.740285     PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20

 2109 14:16:51.743717      GENERIC: 0.0

 2110 14:16:51.744200      PCI: 83:00.0

 2111 14:16:51.753840      PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10

 2112 14:16:51.760025     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 2113 14:16:51.766990     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 2114 14:16:51.779915     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 2115 14:16:51.790291     PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20

 2116 14:16:51.793505      GENERIC: 0.0

 2117 14:16:51.793961      PCI: 84:00.0

 2118 14:16:51.803303      PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10

 2119 14:16:51.806913     PCI: 00:1e.0

 2120 14:16:51.816440     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 2121 14:16:51.819893     PCI: 00:1e.3

 2122 14:16:51.830058     PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10

 2123 14:16:51.833503     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 2124 14:16:51.843171     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 2125 14:16:51.843636      PNP: 0c09.0

 2126 14:16:51.853176      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 2127 14:16:51.856516     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 2128 14:16:51.866495     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 2129 14:16:51.876115     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 2130 14:16:51.879494      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 2131 14:16:51.882918       GENERIC: 0.0

 2132 14:16:51.883405       GENERIC: 1.0

 2133 14:16:51.886197     PCI: 00:1f.3

 2134 14:16:51.896328     PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10

 2135 14:16:51.905940     PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20

 2136 14:16:51.909889     PCI: 00:1f.4

 2137 14:16:51.919385     PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10

 2138 14:16:51.929153     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 2139 14:16:51.929565     PCI: 00:1f.5

 2140 14:16:51.939234     PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10

 2141 14:16:51.942979  Done allocating resources.

 2142 14:16:51.949119  BS: BS_DEV_RESOURCES run times (exec / console): 5 / 4328 ms

 2143 14:16:51.952202  coreboot skipped calling FSP notify phase: 00000020.

 2144 14:16:51.959135  fw_config match found: AUDIO=NAU88L25B_I2S

 2145 14:16:51.962286  BT offload enabled over I2S with NAU88L25B

 2146 14:16:51.968915  BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms

 2147 14:16:51.972316  Enabling resources...

 2148 14:16:51.975740  PCI: 00:00.0 subsystem <- 8086/4619

 2149 14:16:51.979314  PCI: 00:00.0 cmd <- 06

 2150 14:16:51.982458  PCI: 00:02.0 subsystem <- 8086/46b3

 2151 14:16:51.982920  PCI: 00:02.0 cmd <- 03

 2152 14:16:51.986001  PCI: 00:04.0 subsystem <- 8086/461d

 2153 14:16:51.989008  PCI: 00:04.0 cmd <- 02

 2154 14:16:51.992212  PCI: 00:07.0 bridge ctrl <- 0013

 2155 14:16:51.995397  PCI: 00:07.0 cmd <- 07

 2156 14:16:51.999335  PCI: 00:07.1 bridge ctrl <- 0013

 2157 14:16:52.002343  PCI: 00:07.1 cmd <- 07

 2158 14:16:52.005824  PCI: 00:07.2 bridge ctrl <- 0013

 2159 14:16:52.006286  PCI: 00:07.2 cmd <- 07

 2160 14:16:52.009163  PCI: 00:0a.0 subsystem <- 8086/467d

 2161 14:16:52.012422  PCI: 00:0a.0 cmd <- 02

 2162 14:16:52.015697  PCI: 00:0d.0 subsystem <- 8086/461e

 2163 14:16:52.019091  PCI: 00:0d.0 cmd <- 02

 2164 14:16:52.022380  PCI: 00:0d.2 subsystem <- 8086/463e

 2165 14:16:52.025517  PCI: 00:0d.2 cmd <- 02

 2166 14:16:52.028479  PCI: 00:0d.3 subsystem <- 8086/466d

 2167 14:16:52.028847  PCI: 00:0d.3 cmd <- 02

 2168 14:16:52.035517  PCI: 00:14.0 subsystem <- 8086/51ed

 2169 14:16:52.035981  PCI: 00:14.0 cmd <- 02

 2170 14:16:52.038645  PCI: 00:14.2 subsystem <- 8086/51ef

 2171 14:16:52.042285  PCI: 00:14.2 cmd <- 02

 2172 14:16:52.045230  PCI: 00:14.3 subsystem <- 8086/51f0

 2173 14:16:52.048770  PCI: 00:14.3 cmd <- 02

 2174 14:16:52.051914  PCI: 00:15.0 subsystem <- 8086/51e8

 2175 14:16:52.055283  PCI: 00:15.0 cmd <- 02

 2176 14:16:52.058553  PCI: 00:15.1 subsystem <- 8086/51e9

 2177 14:16:52.062159  PCI: 00:15.1 cmd <- 06

 2178 14:16:52.065049  PCI: 00:16.0 subsystem <- 8086/51e0

 2179 14:16:52.065409  PCI: 00:16.0 cmd <- 02

 2180 14:16:52.068494  PCI: 00:1c.0 bridge ctrl <- 0013

 2181 14:16:52.072023  PCI: 00:1c.0 subsystem <- 8086/51be

 2182 14:16:52.075231  PCI: 00:1c.0 cmd <- 07

 2183 14:16:52.078951  PCI: 00:1c.7 bridge ctrl <- 0013

 2184 14:16:52.081994  PCI: 00:1c.7 subsystem <- 8086/51bf

 2185 14:16:52.085113  PCI: 00:1c.7 cmd <- 06

 2186 14:16:52.088754  PCI: 00:1d.0 bridge ctrl <- 0013

 2187 14:16:52.091897  PCI: 00:1d.0 subsystem <- 8086/51b3

 2188 14:16:52.095420  PCI: 00:1d.0 cmd <- 06

 2189 14:16:52.098891  PCI: 00:1e.0 subsystem <- 8086/51a8

 2190 14:16:52.099349  PCI: 00:1e.0 cmd <- 06

 2191 14:16:52.105235  PCI: 00:1e.3 subsystem <- 8086/51ab

 2192 14:16:52.105689  PCI: 00:1e.3 cmd <- 02

 2193 14:16:52.109035  PCI: 00:1f.0 subsystem <- 8086/5182

 2194 14:16:52.111927  PCI: 00:1f.0 cmd <- 407

 2195 14:16:52.115038  PCI: 00:1f.3 subsystem <- 8086/51c8

 2196 14:16:52.118459  PCI: 00:1f.3 cmd <- 02

 2197 14:16:52.121741  PCI: 00:1f.4 subsystem <- 8086/51a3

 2198 14:16:52.125263  PCI: 00:1f.4 cmd <- 03

 2199 14:16:52.128077  PCI: 00:1f.5 subsystem <- 8086/51a4

 2200 14:16:52.131829  PCI: 00:1f.5 cmd <- 406

 2201 14:16:52.132288  PCI: 82:00.0 cmd <- 03

 2202 14:16:52.135258  PCI: 83:00.0 cmd <- 06

 2203 14:16:52.138251  PCI: 84:00.0 cmd <- 02

 2204 14:16:52.138600  done.

 2205 14:16:52.145521  BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms

 2206 14:16:52.145981  ME: Version: Unavailable

 2207 14:16:52.151973  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 2208 14:16:52.155375  Initializing devices...

 2209 14:16:52.155833  Root Device init

 2210 14:16:52.158299  mainboard: EC init

 2211 14:16:52.161878  Chrome EC: Set SMI mask to 0x0000000000000000

 2212 14:16:52.165301  Chrome EC: UHEPI supported

 2213 14:16:52.172221  Chrome EC: clear events_b mask to 0x0000000000000000

 2214 14:16:52.178976  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004

 2215 14:16:52.185228  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004

 2216 14:16:52.188784  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004

 2217 14:16:52.195497  Chrome EC: Set WAKE mask to 0x0000000000000000

 2218 14:16:52.198696  Root Device init finished in 38 msecs

 2219 14:16:52.202140  PCI: 00:00.0 init

 2220 14:16:52.202593  CPU TDP = 15 Watts

 2221 14:16:52.205281  CPU PL1 = 55 Watts

 2222 14:16:52.205739  CPU PL2 = 55 Watts

 2223 14:16:52.208405  CPU PsysPL2 = 90 Watts

 2224 14:16:52.211648  CPU PL4 = 123 Watts

 2225 14:16:52.215372  PCI: 00:00.0 init finished in 10 msecs

 2226 14:16:52.218730  PCI: 00:02.0 init

 2227 14:16:52.219183  GMA: Found VBT in CBFS

 2228 14:16:52.221884  GMA: Found valid VBT in CBFS

 2229 14:16:52.225284  Graphics hand-off block not found

 2230 14:16:52.228204  PCI: 00:02.0 init finished in 8 msecs

 2231 14:16:52.231812  PCI: 00:0a.0 init

 2232 14:16:52.235421  PCI: 00:0a.0 init finished in 0 msecs

 2233 14:16:52.238671  PCI: 00:14.0 init

 2234 14:16:52.241986  PCI: 00:14.0 init finished in 0 msecs

 2235 14:16:52.242446  PCI: 00:14.2 init

 2236 14:16:52.245274  PCI: 00:14.2 init finished in 0 msecs

 2237 14:16:52.248387  PCI: 00:15.0 init

 2238 14:16:52.251708  I2C bus 0 version 0x3230302a

 2239 14:16:52.255510  DW I2C bus 0 at 0x808d7000 (400 KHz)

 2240 14:16:52.258794  PCI: 00:15.0 init finished in 6 msecs

 2241 14:16:52.261939  PCI: 00:15.1 init

 2242 14:16:52.265185  I2C bus 1 version 0x3230302a

 2243 14:16:52.268265  DW I2C bus 1 at 0x808d8000 (400 KHz)

 2244 14:16:52.272223  PCI: 00:15.1 init finished in 6 msecs

 2245 14:16:52.272734  PCI: 00:16.0 init

 2246 14:16:52.278560  PCI: 00:16.0 init finished in 0 msecs

 2247 14:16:52.279019  PCI: 00:1c.0 init

 2248 14:16:52.282079  Initializing PCH PCIe bridge.

 2249 14:16:52.285160  PCI: 00:1c.0 init finished in 3 msecs

 2250 14:16:52.288046  PCI: 00:1c.7 init

 2251 14:16:52.291794  Initializing PCH PCIe bridge.

 2252 14:16:52.295290  PCI: 00:1c.7 init finished in 3 msecs

 2253 14:16:52.295721  PCI: 00:1d.0 init

 2254 14:16:52.298731  Initializing PCH PCIe bridge.

 2255 14:16:52.301764  PCI: 00:1d.0 init finished in 3 msecs

 2256 14:16:52.305062  PCI: 00:1f.0 init

 2257 14:16:52.308653  IOAPIC: Initializing IOAPIC at 0xfec00000

 2258 14:16:52.311883  IOAPIC: ID = 0x02

 2259 14:16:52.315157  IOAPIC: Dumping registers

 2260 14:16:52.315612    reg 0x0000: 0x02000000

 2261 14:16:52.318495    reg 0x0001: 0x00770020

 2262 14:16:52.321747    reg 0x0002: 0x00000000

 2263 14:16:52.325175  IOAPIC: 120 interrupts

 2264 14:16:52.327995  IOAPIC: Clearing IOAPIC at 0xfec00000

 2265 14:16:52.331462  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 2266 14:16:52.338291  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 2267 14:16:52.341370  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 2268 14:16:52.348498  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 2269 14:16:52.351528  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 2270 14:16:52.354757  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 2271 14:16:52.361555  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 2272 14:16:52.365135  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 2273 14:16:52.371233  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 2274 14:16:52.374868  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 2275 14:16:52.381327  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 2276 14:16:52.384607  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2277 14:16:52.388088  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2278 14:16:52.395015  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2279 14:16:52.398239  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2280 14:16:52.405011  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2281 14:16:52.407831  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2282 14:16:52.414790  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2283 14:16:52.418054  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2284 14:16:52.424787  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2285 14:16:52.427920  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2286 14:16:52.431120  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2287 14:16:52.437970  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2288 14:16:52.441003  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2289 14:16:52.447841  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2290 14:16:52.451317  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2291 14:16:52.458130  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2292 14:16:52.461222  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2293 14:16:52.468041  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2294 14:16:52.471328  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2295 14:16:52.474450  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2296 14:16:52.481030  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2297 14:16:52.484712  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2298 14:16:52.491139  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2299 14:16:52.494276  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2300 14:16:52.500922  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2301 14:16:52.504530  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2302 14:16:52.510935  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2303 14:16:52.514393  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2304 14:16:52.517506  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2305 14:16:52.524450  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2306 14:16:52.527605  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2307 14:16:52.534269  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2308 14:16:52.537473  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2309 14:16:52.544234  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2310 14:16:52.547246  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2311 14:16:52.550855  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2312 14:16:52.557531  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2313 14:16:52.561177  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2314 14:16:52.567719  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2315 14:16:52.570655  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2316 14:16:52.577433  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2317 14:16:52.581038  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2318 14:16:52.587428  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2319 14:16:52.590649  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2320 14:16:52.593975  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2321 14:16:52.600508  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2322 14:16:52.604039  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2323 14:16:52.610574  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2324 14:16:52.613901  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2325 14:16:52.620877  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2326 14:16:52.623674  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2327 14:16:52.630169  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2328 14:16:52.633807  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2329 14:16:52.637198  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2330 14:16:52.643987  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2331 14:16:52.647474  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2332 14:16:52.654101  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2333 14:16:52.657054  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2334 14:16:52.663966  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2335 14:16:52.667305  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2336 14:16:52.670363  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2337 14:16:52.676937  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2338 14:16:52.680520  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2339 14:16:52.687333  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2340 14:16:52.690556  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2341 14:16:52.697043  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2342 14:16:52.700222  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2343 14:16:52.706857  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2344 14:16:52.710432  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2345 14:16:52.716979  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2346 14:16:52.720281  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2347 14:16:52.723666  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2348 14:16:52.729902  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2349 14:16:52.733346  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2350 14:16:52.739834  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2351 14:16:52.743350  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2352 14:16:52.749857  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2353 14:16:52.753098  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2354 14:16:52.759865  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2355 14:16:52.762954  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2356 14:16:52.766322  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2357 14:16:52.772902  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2358 14:16:52.776269  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2359 14:16:52.782957  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2360 14:16:52.786147  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2361 14:16:52.792751  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2362 14:16:52.795938  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2363 14:16:52.802802  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2364 14:16:52.805743  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2365 14:16:52.809467  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2366 14:16:52.816126  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2367 14:16:52.819586  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2368 14:16:52.826267  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2369 14:16:52.828802  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2370 14:16:52.835997  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2371 14:16:52.839377  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2372 14:16:52.845890  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2373 14:16:52.849307  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2374 14:16:52.852671  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2375 14:16:52.859131  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2376 14:16:52.862945  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2377 14:16:52.869166  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2378 14:16:52.872344  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2379 14:16:52.879256  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2380 14:16:52.882158  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2381 14:16:52.888859  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2382 14:16:52.892701  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2383 14:16:52.895700  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2384 14:16:52.902207  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2385 14:16:52.905703  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2386 14:16:52.912221  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2387 14:16:52.915691  PCI: 00:1f.0 init finished in 606 msecs

 2388 14:16:52.919126  PCI: 00:1f.2 init

 2389 14:16:52.919582  apm_control: Disabling ACPI.

 2390 14:16:52.923999  APMC done.

 2391 14:16:52.927637  PCI: 00:1f.2 init finished in 5 msecs

 2392 14:16:52.930265  PCI: 00:1f.3 init

 2393 14:16:52.934000  PCI: 00:1f.3 init finished in 0 msecs

 2394 14:16:52.934461  PCI: 00:1f.4 init

 2395 14:16:52.937295  PCI: 00:1f.4 init finished in 0 msecs

 2396 14:16:52.940413  PCI: 82:00.0 init

 2397 14:16:52.943819  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 2398 14:16:52.947051  Located 'ethernet_mac0' in VPD

 2399 14:16:52.950641  r8168: Resetting NIC...done

 2400 14:16:52.953933  r8168: Programming MAC Address...done

 2401 14:16:52.957386  r8168: Customized LED 0x482

 2402 14:16:52.960761  r8168: read back LED setting as 0x482

 2403 14:16:52.967495  PCI: 82:00.0 init finished in 21 msecs

 2404 14:16:52.967953  PCI: 83:00.0 init

 2405 14:16:52.970728  PCI: 83:00.0 init finished in 0 msecs

 2406 14:16:52.973964  PCI: 84:00.0 init

 2407 14:16:52.977177  PCI: 84:00.0 init finished in 0 msecs

 2408 14:16:52.980704  PNP: 0c09.0 init

 2409 14:16:52.983982  Google Chrome EC uptime: 13.429 seconds

 2410 14:16:52.987455  Google Chrome AP resets since EC boot: 1

 2411 14:16:52.990410  Google Chrome most recent AP reset causes:

 2412 14:16:52.997216  	0.311: 32775 shutdown: entering G3

 2413 14:16:53.003921  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2414 14:16:53.006840  PNP: 0c09.0 init finished in 23 msecs

 2415 14:16:53.007283  GENERIC: 0.0 init

 2416 14:16:53.010274  GENERIC: 0.0 init finished in 0 msecs

 2417 14:16:53.013449  GENERIC: 1.0 init

 2418 14:16:53.016747  GENERIC: 1.0 init finished in 0 msecs

 2419 14:16:53.020266  Devices initialized

 2420 14:16:53.023603  Show all devs... After init.

 2421 14:16:53.023813  Root Device: enabled 1

 2422 14:16:53.026834  CPU_CLUSTER: 0: enabled 1

 2423 14:16:53.030087  DOMAIN: 0000: enabled 1

 2424 14:16:53.030362  GPIO: 0: enabled 1

 2425 14:16:53.033379  PCI: 00:00.0: enabled 1

 2426 14:16:53.036837  PCI: 00:01.0: enabled 0

 2427 14:16:53.040312  PCI: 00:01.1: enabled 0

 2428 14:16:53.040806  PCI: 00:02.0: enabled 1

 2429 14:16:53.043428  PCI: 00:04.0: enabled 1

 2430 14:16:53.046877  PCI: 00:05.0: enabled 0

 2431 14:16:53.050090  PCI: 00:06.0: enabled 0

 2432 14:16:53.050433  PCI: 00:06.2: enabled 0

 2433 14:16:53.053612  PCI: 00:07.0: enabled 1

 2434 14:16:53.056667  PCI: 00:07.1: enabled 1

 2435 14:16:53.059949  PCI: 00:07.2: enabled 1

 2436 14:16:53.060198  PCI: 00:07.3: enabled 0

 2437 14:16:53.063607  PCI: 00:08.0: enabled 0

 2438 14:16:53.066494  PCI: 00:09.0: enabled 0

 2439 14:16:53.066844  PCI: 00:0a.0: enabled 1

 2440 14:16:53.070300  PCI: 00:0d.0: enabled 1

 2441 14:16:53.073271  PCI: 00:0d.1: enabled 0

 2442 14:16:53.076860  PCI: 00:0d.2: enabled 1

 2443 14:16:53.077302  PCI: 00:0d.3: enabled 1

 2444 14:16:53.080132  PCI: 00:0e.0: enabled 0

 2445 14:16:53.083213  PCI: 00:10.0: enabled 0

 2446 14:16:53.086745  PCI: 00:10.1: enabled 0

 2447 14:16:53.087198  PCI: 00:10.6: enabled 0

 2448 14:16:53.090178  PCI: 00:10.7: enabled 0

 2449 14:16:53.093479  PCI: 00:12.0: enabled 0

 2450 14:16:53.096490  PCI: 00:12.6: enabled 0

 2451 14:16:53.096864  PCI: 00:12.7: enabled 0

 2452 14:16:53.099896  PCI: 00:13.0: enabled 0

 2453 14:16:53.103501  PCI: 00:14.0: enabled 1

 2454 14:16:53.106452  PCI: 00:14.1: enabled 0

 2455 14:16:53.106802  PCI: 00:14.2: enabled 1

 2456 14:16:53.109551  PCI: 00:14.3: enabled 1

 2457 14:16:53.113093  PCI: 00:15.0: enabled 1

 2458 14:16:53.113503  PCI: 00:15.1: enabled 1

 2459 14:16:53.116219  PCI: 00:15.2: enabled 0

 2460 14:16:53.119482  PCI: 00:15.3: enabled 0

 2461 14:16:53.122979  PCI: 00:16.0: enabled 1

 2462 14:16:53.123426  PCI: 00:16.1: enabled 0

 2463 14:16:53.126521  PCI: 00:16.2: enabled 0

 2464 14:16:53.129562  PCI: 00:16.3: enabled 0

 2465 14:16:53.133132  PCI: 00:16.4: enabled 0

 2466 14:16:53.133580  PCI: 00:16.5: enabled 0

 2467 14:16:53.136490  PCI: 00:17.0: enabled 0

 2468 14:16:53.139716  PCI: 00:19.0: enabled 0

 2469 14:16:53.142903  PCI: 00:19.1: enabled 0

 2470 14:16:53.143335  PCI: 00:19.2: enabled 0

 2471 14:16:53.146511  PCI: 00:1a.0: enabled 0

 2472 14:16:53.149907  PCI: 00:1c.0: enabled 0

 2473 14:16:53.153151  PCI: 00:1c.1: enabled 0

 2474 14:16:53.153600  PCI: 00:1c.2: enabled 0

 2475 14:16:53.156377  PCI: 00:1c.3: enabled 0

 2476 14:16:53.159913  PCI: 00:1c.4: enabled 0

 2477 14:16:53.160366  PCI: 00:1c.5: enabled 1

 2478 14:16:53.163272  PCI: 00:1c.0: enabled 1

 2479 14:16:53.166444  PCI: 00:1c.7: enabled 1

 2480 14:16:53.169570  PCI: 00:1d.0: enabled 0

 2481 14:16:53.170019  PCI: 00:1d.1: enabled 0

 2482 14:16:53.172720  PCI: 00:1d.2: enabled 0

 2483 14:16:53.176444  PCI: 00:1d.0: enabled 1

 2484 14:16:53.179418  PCI: 00:1e.0: enabled 1

 2485 14:16:53.179902  PCI: 00:1e.1: enabled 0

 2486 14:16:53.182829  PCI: 00:1e.2: enabled 0

 2487 14:16:53.186280  PCI: 00:1e.3: enabled 1

 2488 14:16:53.189694  PCI: 00:1f.0: enabled 1

 2489 14:16:53.190144  PCI: 00:1f.1: enabled 0

 2490 14:16:53.192574  PCI: 00:1f.2: enabled 1

 2491 14:16:53.196119  PCI: 00:1f.3: enabled 1

 2492 14:16:53.196607  PCI: 00:1f.4: enabled 1

 2493 14:16:53.199619  PCI: 00:1f.5: enabled 1

 2494 14:16:53.202832  PCI: 00:1f.6: enabled 0

 2495 14:16:53.206035  PCI: 00:1f.7: enabled 0

 2496 14:16:53.206465  GENERIC: 0.0: enabled 1

 2497 14:16:53.209370  GENERIC: 0.0: enabled 1

 2498 14:16:53.212813  GENERIC: 1.0: enabled 1

 2499 14:16:53.215909  GENERIC: 0.0: enabled 1

 2500 14:16:53.216322  GENERIC: 1.0: enabled 1

 2501 14:16:53.219168  USB0 port 0: enabled 1

 2502 14:16:53.222683  GENERIC: 0.0: enabled 1

 2503 14:16:53.225877  GENERIC: 0.0: enabled 1

 2504 14:16:53.226224  USB0 port 0: enabled 1

 2505 14:16:53.229148  GENERIC: 0.0: enabled 1

 2506 14:16:53.232327  I2C: 00:1a: enabled 1

 2507 14:16:53.232704  I2C: 00:50: enabled 1

 2508 14:16:53.235995  PCI: 00:00.0: enabled 1

 2509 14:16:53.239482  PCI: 82:00.0: enabled 1

 2510 14:16:53.242244  GENERIC: 0.0: enabled 1

 2511 14:16:53.242590  GENERIC: 0.0: enabled 1

 2512 14:16:53.245780  PNP: 0c09.0: enabled 1

 2513 14:16:53.249259  GENERIC: 0.0: enabled 1

 2514 14:16:53.249696  USB3 port 0: enabled 1

 2515 14:16:53.252464  USB3 port 1: enabled 0

 2516 14:16:53.255730  USB3 port 2: enabled 1

 2517 14:16:53.259089  USB3 port 3: enabled 0

 2518 14:16:53.259543  USB2 port 0: enabled 1

 2519 14:16:53.262531  USB2 port 1: enabled 0

 2520 14:16:53.265688  USB2 port 2: enabled 1

 2521 14:16:53.266167  USB2 port 3: enabled 1

 2522 14:16:53.269097  USB2 port 4: enabled 1

 2523 14:16:53.272421  USB2 port 5: enabled 1

 2524 14:16:53.272894  USB2 port 6: enabled 1

 2525 14:16:53.275775  USB2 port 7: enabled 1

 2526 14:16:53.279014  USB2 port 8: enabled 0

 2527 14:16:53.282137  USB2 port 9: enabled 1

 2528 14:16:53.282597  USB3 port 0: enabled 1

 2529 14:16:53.285752  USB3 port 1: enabled 1

 2530 14:16:53.289151  USB3 port 2: enabled 1

 2531 14:16:53.289617  USB3 port 3: enabled 1

 2532 14:16:53.292257  GENERIC: 0.0: enabled 1

 2533 14:16:53.295290  GENERIC: 1.0: enabled 1

 2534 14:16:53.299031  APIC: 00: enabled 1

 2535 14:16:53.299481  APIC: 14: enabled 1

 2536 14:16:53.305977  APIC: 16: enabled 1

 2537 14:16:53.306296  APIC: 10: enabled 1

 2538 14:16:53.306367  APIC: 12: enabled 1

 2539 14:16:53.306426  NONE: enabled 1

 2540 14:16:53.308750  NONE: enabled 1

 2541 14:16:53.308829  NONE: enabled 1

 2542 14:16:53.312179  PCI: 83:00.0: enabled 1

 2543 14:16:53.315683  PCI: 84:00.0: enabled 1

 2544 14:16:53.322403  BS: BS_DEV_INIT run times (exec / console): 7 / 1157 ms

 2545 14:16:53.325754  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2546 14:16:53.328430  ELOG: NV offset 0xf20000 size 0x4000

 2547 14:16:53.337137  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2548 14:16:53.343729  ELOG: Event(17) added with size 13 at 2024-02-05 14:16:53 UTC

 2549 14:16:53.350532  ELOG: Event(9E) added with size 10 at 2024-02-05 14:16:53 UTC

 2550 14:16:53.356792  ELOG: Event(9F) added with size 14 at 2024-02-05 14:16:53 UTC

 2551 14:16:53.363668  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2552 14:16:53.370382  ELOG: Event(A0) added with size 9 at 2024-02-05 14:16:53 UTC

 2553 14:16:53.373701  elog_add_boot_reason: Logged dev mode boot

 2554 14:16:53.380119  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2555 14:16:53.380634  Finalize devices...

 2556 14:16:53.383502  PCI: 00:16.0 final

 2557 14:16:53.386809  CSE RW Firmware Version: 16.1.25.2049

 2558 14:16:53.389847  PCI: 00:1f.2 final

 2559 14:16:53.390289  PCI: 00:1f.4 final

 2560 14:16:53.393504  GENERIC: 0.0 final

 2561 14:16:53.400083  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2562 14:16:53.400589  GENERIC: 1.0 final

 2563 14:16:53.406506  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2564 14:16:53.409612  Devices finalized

 2565 14:16:53.413464  BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms

 2566 14:16:53.420129  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2567 14:16:53.426527  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2568 14:16:53.429468  ME: HFSTS1                      : 0x90000245

 2569 14:16:53.433177  ME: HFSTS2                      : 0x32850116

 2570 14:16:53.439877  ME: HFSTS3                      : 0x00000050

 2571 14:16:53.443410  ME: HFSTS4                      : 0x00004000

 2572 14:16:53.449819  ME: HFSTS5                      : 0x00000000

 2573 14:16:53.453116  ME: HFSTS6                      : 0x40600006

 2574 14:16:53.456326  ME: Manufacturing Mode          : NO

 2575 14:16:53.460053  ME: SPI Protection Mode Enabled : YES

 2576 14:16:53.463184  ME: FPFs Committed              : YES

 2577 14:16:53.466425  ME: Manufacturing Vars Locked   : YES

 2578 14:16:53.472959  ME: FW Partition Table          : OK

 2579 14:16:53.476266  ME: Bringup Loader Failure      : NO

 2580 14:16:53.479797  ME: Firmware Init Complete      : YES

 2581 14:16:53.483235  ME: Boot Options Present        : NO

 2582 14:16:53.486571  ME: Update In Progress          : NO

 2583 14:16:53.489570  ME: D0i3 Support                : YES

 2584 14:16:53.493108  ME: Low Power State Enabled     : NO

 2585 14:16:53.496234  ME: CPU Replaced                : YES

 2586 14:16:53.502584  ME: CPU Replacement Valid       : YES

 2587 14:16:53.506226  ME: Current Working State       : 5

 2588 14:16:53.509791  ME: Current Operation State     : 1

 2589 14:16:53.513044  ME: Current Operation Mode      : 0

 2590 14:16:53.516197  ME: Error Code                  : 0

 2591 14:16:53.519550  ME: Enhanced Debug Mode         : NO

 2592 14:16:53.522874  ME: CPU Debug Disabled          : YES

 2593 14:16:53.526016  ME: TXT Support                 : NO

 2594 14:16:53.529212  ME: WP for RO is enabled        : YES

 2595 14:16:53.536095  ME: RO write protection scope - Start=0x1000, End=0x1A6FFF

 2596 14:16:53.543153  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2597 14:16:53.546019  Ramoops buffer: 0x100000@0x76898000.

 2598 14:16:53.552952  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2599 14:16:53.559412  CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c

 2600 14:16:53.562691  CBFS: 'fallback/slic' not found.

 2601 14:16:53.566138  ACPI: Writing ACPI tables at 7686c000.

 2602 14:16:53.569310  ACPI:    * FACS

 2603 14:16:53.569781  ACPI:    * DSDT

 2604 14:16:53.576166  PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000

 2605 14:16:53.580889  ACPI:    * FADT

 2606 14:16:53.581373  SCI is IRQ9

 2607 14:16:53.587718  ACPI: added table 1/32, length now 40

 2608 14:16:53.588223  ACPI:     * SSDT

 2609 14:16:53.594317  Found 1 CPU(s) with 5/5 physical/logical core(s) each.

 2610 14:16:53.597667  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2611 14:16:53.604084  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2612 14:16:53.607732  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2613 14:16:53.614311  \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0

 2614 14:16:53.617429  \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1

 2615 14:16:53.624277  \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2

 2616 14:16:53.627288  USB Type-C 0 mapped to EC port 0

 2617 14:16:53.634458  usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0

 2618 14:16:53.637177  \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0

 2619 14:16:53.640595  USB Type-C 2 mapped to EC port 1

 2620 14:16:53.647603  usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0

 2621 14:16:53.653996  \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0

 2622 14:16:53.656994  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2623 14:16:53.663780  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2624 14:16:53.666830  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2625 14:16:53.673398  \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0

 2626 14:16:53.680535  \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3)

 2627 14:16:53.687291  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 2628 14:16:53.690315  \_SB.PCI0.RP09: Added StorageD3Enable property

 2629 14:16:53.695751  EC returned error result code 1

 2630 14:16:53.702434  PS2K: Bad resp from EC. Vivaldi disabled!

 2631 14:16:53.708990  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2632 14:16:53.715719  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2

 2633 14:16:53.722193  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2634 14:16:53.728885  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2

 2635 14:16:53.735679  \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3

 2636 14:16:53.738759  \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4

 2637 14:16:53.745833  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5

 2638 14:16:53.752248  \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6

 2639 14:16:53.759105  \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7

 2640 14:16:53.765410  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2641 14:16:53.771987  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0

 2642 14:16:53.778965  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1

 2643 14:16:53.785649  \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2

 2644 14:16:53.792117  \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3

 2645 14:16:53.798696  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2646 14:16:53.805322  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2647 14:16:53.808737  ACPI: added table 2/32, length now 44

 2648 14:16:53.812019  ACPI:    * MCFG

 2649 14:16:53.815147  ACPI: added table 3/32, length now 48

 2650 14:16:53.815606  ACPI:    * TPM2

 2651 14:16:53.818563  TPM2 log created at 0x7685c000

 2652 14:16:53.821606  ACPI: added table 4/32, length now 52

 2653 14:16:53.824966  ACPI:     * LPIT

 2654 14:16:53.828080  ACPI: added table 5/32, length now 56

 2655 14:16:53.828467  ACPI:    * MADT

 2656 14:16:53.831248  SCI is IRQ9

 2657 14:16:53.834941  ACPI: added table 6/32, length now 60

 2658 14:16:53.838147  cmd_reg from pmc_make_ipc_cmd 1052838

 2659 14:16:53.844612  CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc

 2660 14:16:53.851175  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2661 14:16:53.858108  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2662 14:16:53.861279  PMC CrashLog size in discovery mode: 0xC00

 2663 14:16:53.864707  cpu crashlog bar addr: 0x808C0000

 2664 14:16:53.867988  cpu discovery table offset: 0x6030

 2665 14:16:53.874529  cpu_crashlog_discovery_table buffer count: 0x3

 2666 14:16:53.877770  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2667 14:16:53.887640  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2668 14:16:53.894444  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2669 14:16:53.897573  PMC crashLog size in discovery mode : 0xC00

 2670 14:16:53.904201  Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM.

 2671 14:16:53.907634  discover mode PMC crashlog size adjusted to: 0x200

 2672 14:16:53.917162  Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM.

 2673 14:16:53.920387  discover mode PMC crashlog size adjusted to: 0x0

 2674 14:16:53.923891  m_cpu_crashLog_size : 0x3480 bytes

 2675 14:16:53.927244  CPU crashLog present.

 2676 14:16:53.930344  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2677 14:16:53.936948  Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM.

 2678 14:16:53.940501  current = 76875cf0

 2679 14:16:53.943724  ACPI:    * DMAR

 2680 14:16:53.947041  ACPI: added table 7/32, length now 64

 2681 14:16:53.950584  ACPI: added table 8/32, length now 68

 2682 14:16:53.951067  ACPI:    * HPET

 2683 14:16:53.956918  ACPI: added table 9/32, length now 72

 2684 14:16:53.957378  ACPI: done.

 2685 14:16:53.960830  ACPI tables: 40480 bytes.

 2686 14:16:53.963452  smbios_write_tables: 76856000

 2687 14:16:53.967013  EC returned error result code 3

 2688 14:16:53.970332  Couldn't obtain OEM name from CBI

 2689 14:16:53.973381  Create SMBIOS type 16

 2690 14:16:53.973741  Create SMBIOS type 17

 2691 14:16:53.976759  Create SMBIOS type 20

 2692 14:16:53.980383  GENERIC: 0.0 (WIFI Device)

 2693 14:16:53.983217  SMBIOS tables: 982 bytes.

 2694 14:16:53.986849  Writing table forward entry at 0x00000500

 2695 14:16:53.993400  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955

 2696 14:16:53.996891  Writing coreboot table at 0x76890000

 2697 14:16:54.003400   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2698 14:16:54.006701   1. 0000000000001000-000000000009ffff: RAM

 2699 14:16:54.010368   2. 00000000000a0000-00000000000fffff: RESERVED

 2700 14:16:54.016504   3. 0000000000100000-0000000076855fff: RAM

 2701 14:16:54.019752   4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES

 2702 14:16:54.026660   5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE

 2703 14:16:54.032660   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2704 14:16:54.036512   7. 0000000077000000-00000000803fffff: RESERVED

 2705 14:16:54.042954   8. 00000000c0000000-00000000cfffffff: RESERVED

 2706 14:16:54.045991   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2707 14:16:54.049621  10. 00000000fb000000-00000000fb000fff: RESERVED

 2708 14:16:54.056307  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2709 14:16:54.059615  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2710 14:16:54.066287  13. 00000000fec00000-00000000fecfffff: RESERVED

 2711 14:16:54.070062  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2712 14:16:54.076209  15. 00000000fed80000-00000000fed87fff: RESERVED

 2713 14:16:54.079626  16. 00000000fed90000-00000000fed92fff: RESERVED

 2714 14:16:54.086047  17. 00000000feda0000-00000000feda1fff: RESERVED

 2715 14:16:54.089549  18. 00000000fedc0000-00000000feddffff: RESERVED

 2716 14:16:54.092558  19. 0000000100000000-000000017fbfffff: RAM

 2717 14:16:54.095947  Passing 4 GPIOs to payload:

 2718 14:16:54.102830              NAME |       PORT | POLARITY |     VALUE

 2719 14:16:54.106350               lid |  undefined |     high |      high

 2720 14:16:54.112582             power |  undefined |     high |       low

 2721 14:16:54.119397             oprom |  undefined |     high |       low

 2722 14:16:54.122560          EC in RW | 0x00000151 |     high |      high

 2723 14:16:54.126072  Board ID: 3

 2724 14:16:54.126534  FW config: 0x64

 2725 14:16:54.132448  Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum d392

 2726 14:16:54.136108  coreboot table: 1788 bytes.

 2727 14:16:54.139525  IMD ROOT    0. 0x76fff000 0x00001000

 2728 14:16:54.142454  IMD SMALL   1. 0x76ffe000 0x00001000

 2729 14:16:54.145666  FSP MEMORY  2. 0x76afe000 0x00500000

 2730 14:16:54.149359  CONSOLE     3. 0x76ade000 0x00020000

 2731 14:16:54.152642  RW MCACHE   4. 0x76add000 0x00000464

 2732 14:16:54.159319  RO MCACHE   5. 0x76adc000 0x00001000

 2733 14:16:54.162678  FMAP        6. 0x76adb000 0x0000064a

 2734 14:16:54.165713  TIME STAMP  7. 0x76ada000 0x00000910

 2735 14:16:54.169053  VBOOT WORK  8. 0x76ac6000 0x00014000

 2736 14:16:54.172690  MEM INFO    9. 0x76ac5000 0x000003b8

 2737 14:16:54.175737  ROMSTG STCK10. 0x76ac4000 0x00001000

 2738 14:16:54.179147  AFTER CAR  11. 0x76ab8000 0x0000c000

 2739 14:16:54.182085  RAMSTAGE   12. 0x76a2d000 0x0008b000

 2740 14:16:54.188919  ACPI BERT  13. 0x76a1d000 0x00010000

 2741 14:16:54.192514  CHROMEOS NVS14. 0x76a1c000 0x00000f00

 2742 14:16:54.195649  REFCODE    15. 0x769ad000 0x0006f000

 2743 14:16:54.198914  SMM BACKUP 16. 0x7699d000 0x00010000

 2744 14:16:54.202601  IGD OPREGION17. 0x76998000 0x000041fd

 2745 14:16:54.205717  RAMOOPS    18. 0x76898000 0x00100000

 2746 14:16:54.209179  COREBOOT   19. 0x76890000 0x00008000

 2747 14:16:54.212182  ACPI       20. 0x7686c000 0x00024000

 2748 14:16:54.219109  TPM2 TCGLOG21. 0x7685c000 0x00010000

 2749 14:16:54.222384  PMC CRASHLOG22. 0x7685b000 0x00000c00

 2750 14:16:54.225851  CPU CRASHLOG23. 0x76857000 0x00003480

 2751 14:16:54.229002  SMBIOS     24. 0x76856000 0x00001000

 2752 14:16:54.232069  IMD small region:

 2753 14:16:54.235674    IMD ROOT    0. 0x76ffec00 0x00000400

 2754 14:16:54.238801    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2755 14:16:54.242612    VPD         2. 0x76ffeba0 0x00000032

 2756 14:16:54.249168    CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020

 2757 14:16:54.252182    POWER STATE 4. 0x76ffeb20 0x00000044

 2758 14:16:54.255557    ROMSTAGE    5. 0x76ffeb00 0x00000004

 2759 14:16:54.258902    ACPI GNVS   6. 0x76ffeaa0 0x00000048

 2760 14:16:54.262217    TYPE_C INFO 7. 0x76ffea80 0x0000000c

 2761 14:16:54.268951  BS: BS_WRITE_TABLES run times (exec / console): 7 / 704 ms

 2762 14:16:54.272181  MTRR: Physical address space:

 2763 14:16:54.278956  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2764 14:16:54.285629  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2765 14:16:54.291991  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2766 14:16:54.298959  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2767 14:16:54.302170  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2768 14:16:54.309034  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2769 14:16:54.315241  0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6

 2770 14:16:54.322025  0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0

 2771 14:16:54.325164  MTRR: Fixed MSR 0x250 0x0606060606060606

 2772 14:16:54.331688  MTRR: Fixed MSR 0x258 0x0606060606060606

 2773 14:16:54.335561  MTRR: Fixed MSR 0x259 0x0000000000000000

 2774 14:16:54.338099  MTRR: Fixed MSR 0x268 0x0606060606060606

 2775 14:16:54.342222  MTRR: Fixed MSR 0x269 0x0606060606060606

 2776 14:16:54.348368  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2777 14:16:54.351702  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2778 14:16:54.355326  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2779 14:16:54.358497  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2780 14:16:54.365045  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2781 14:16:54.368600  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2782 14:16:54.371687  call enable_fixed_mtrr()

 2783 14:16:54.374969  CPU physical address size: 39 bits

 2784 14:16:54.378383  MTRR: default type WB/UC MTRR counts: 13/6.

 2785 14:16:54.381587  MTRR: UC selected as default type.

 2786 14:16:54.388324  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2787 14:16:54.394899  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2788 14:16:54.401467  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2789 14:16:54.408159  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2790 14:16:54.411269  MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6

 2791 14:16:54.418592  MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0

 2792 14:16:54.424974  MTRR: Fixed MSR 0x250 0x0606060606060606

 2793 14:16:54.427925  MTRR: Fixed MSR 0x258 0x0606060606060606

 2794 14:16:54.431059  MTRR: Fixed MSR 0x259 0x0000000000000000

 2795 14:16:54.434368  MTRR: Fixed MSR 0x268 0x0606060606060606

 2796 14:16:54.438113  MTRR: Fixed MSR 0x269 0x0606060606060606

 2797 14:16:54.444706  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2798 14:16:54.447879  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2799 14:16:54.450928  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2800 14:16:54.454424  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2801 14:16:54.461273  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2802 14:16:54.464385  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2803 14:16:54.467831  MTRR: Fixed MSR 0x250 0x0606060606060606

 2804 14:16:54.471291  MTRR: Fixed MSR 0x258 0x0606060606060606

 2805 14:16:54.477962  MTRR: Fixed MSR 0x259 0x0000000000000000

 2806 14:16:54.481016  MTRR: Fixed MSR 0x268 0x0606060606060606

 2807 14:16:54.484348  MTRR: Fixed MSR 0x269 0x0606060606060606

 2808 14:16:54.488045  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2809 14:16:54.494610  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2810 14:16:54.498302  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2811 14:16:54.500832  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2812 14:16:54.504212  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2813 14:16:54.507832  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2814 14:16:54.510958  call enable_fixed_mtrr()

 2815 14:16:54.514231  MTRR: Fixed MSR 0x250 0x0606060606060606

 2816 14:16:54.520886  MTRR: Fixed MSR 0x258 0x0606060606060606

 2817 14:16:54.524012  MTRR: Fixed MSR 0x259 0x0000000000000000

 2818 14:16:54.527675  MTRR: Fixed MSR 0x268 0x0606060606060606

 2819 14:16:54.530899  MTRR: Fixed MSR 0x269 0x0606060606060606

 2820 14:16:54.537756  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2821 14:16:54.540507  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2822 14:16:54.543976  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2823 14:16:54.546984  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2824 14:16:54.553991  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2825 14:16:54.557177  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2826 14:16:54.560449  CPU physical address size: 39 bits

 2827 14:16:54.563809  call enable_fixed_mtrr()

 2828 14:16:54.564267  call enable_fixed_mtrr()

 2829 14:16:54.570368  CPU physical address size: 39 bits

 2830 14:16:54.573517  MTRR: Fixed MSR 0x250 0x0606060606060606

 2831 14:16:54.576937  MTRR: Fixed MSR 0x258 0x0606060606060606

 2832 14:16:54.580451  MTRR: Fixed MSR 0x259 0x0000000000000000

 2833 14:16:54.587012  MTRR: Fixed MSR 0x268 0x0606060606060606

 2834 14:16:54.590470  MTRR: Fixed MSR 0x269 0x0606060606060606

 2835 14:16:54.593489  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2836 14:16:54.596762  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2837 14:16:54.600028  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2838 14:16:54.606620  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2839 14:16:54.610210  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2840 14:16:54.613132  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2841 14:16:54.616718  CPU physical address size: 39 bits

 2842 14:16:54.619950  call enable_fixed_mtrr()

 2843 14:16:54.623253  CPU physical address size: 39 bits

 2844 14:16:54.623711  

 2845 14:16:54.626797  MTRR check

 2846 14:16:54.627250  Fixed MTRRs   : Enabled

 2847 14:16:54.629942  Variable MTRRs: Enabled

 2848 14:16:54.630394  

 2849 14:16:54.636534  BS: BS_WRITE_TABLES exit times (exec / console): 141 / 156 ms

 2850 14:16:54.639767  Checking cr50 for pending updates

 2851 14:16:54.651088  Reading cr50 TPM mode

 2852 14:16:54.665949  BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms

 2853 14:16:54.675708  CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434

 2854 14:16:54.678968  Checking segment from ROM address 0xff1f03ac

 2855 14:16:54.682431  Checking segment from ROM address 0xff1f03c8

 2856 14:16:54.688742  Loading segment from ROM address 0xff1f03ac

 2857 14:16:54.689225    code (compression=1)

 2858 14:16:54.699017    New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226

 2859 14:16:54.708586  Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226

 2860 14:16:54.709077  using LZMA

 2861 14:16:54.752993  [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4

 2862 14:16:54.759564  Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88

 2863 14:16:54.770747  Loading segment from ROM address 0xff1f03c8

 2864 14:16:54.774015    Entry Point 0x30000000

 2865 14:16:54.774427  Loaded segments

 2866 14:16:54.780728  BS: BS_PAYLOAD_LOAD run times (exec / console): 46 / 62 ms

 2867 14:16:54.783973  coreboot skipped calling FSP notify phase: 00000040.

 2868 14:16:54.790776  coreboot skipped calling FSP notify phase: 000000f0.

 2869 14:16:54.797322  BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms

 2870 14:16:54.797810  Finalizing chipset.

 2871 14:16:54.800708  apm_control: Finalizing SMM.

 2872 14:16:54.803899  APMC done.

 2873 14:16:54.807546  CSE: EOP requested action: continue boot

 2874 14:16:54.810604  HECI: CSE device 16.1 is disabled

 2875 14:16:54.813959  HECI: CSE device 16.2 is disabled

 2876 14:16:54.817126  HECI: CSE device 16.3 is disabled

 2877 14:16:54.820884  HECI: CSE device 16.4 is disabled

 2878 14:16:54.823580  HECI: CSE device 16.5 is disabled

 2879 14:16:54.830347  BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 27 ms

 2880 14:16:54.833540  mp_park_aps done after 0 msecs.

 2881 14:16:54.837482  Jumping to boot code at 0x30000000(0x76890000)

 2882 14:16:54.846903  CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes

 2883 14:16:54.852720  

 2884 14:16:54.853209  

 2885 14:16:54.853482  

 2886 14:16:54.856116  Starting depthcharge on Moli...

 2887 14:16:54.856638  

 2888 14:16:54.857631  end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
 2889 14:16:54.857980  start: 2.2.4 bootloader-commands (timeout 00:04:39) [common]
 2890 14:16:54.858260  Setting prompt string to ['brask:']
 2891 14:16:54.858516  bootloader-commands: Wait for prompt ['brask:'] (timeout 00:04:39)
 2892 14:16:54.862351  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2893 14:16:54.862713  

 2894 14:16:54.869109  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2895 14:16:54.869572  

 2896 14:16:54.875945  Looking for NVMe Controller 0x30062398 @ 00:06:00

 2897 14:16:54.876485  

 2898 14:16:54.878855  Looking for NVMe Controller 0x30062440 @ 00:1d:00

 2899 14:16:54.879203  

 2900 14:16:54.882443  Wipe memory regions:

 2901 14:16:54.882897  

 2902 14:16:54.885763  	[0x00000000001000, 0x000000000a0000)

 2903 14:16:54.886225  

 2904 14:16:54.888912  	[0x00000000100000, 0x00000030000000)

 2905 14:16:55.257272  

 2906 14:16:55.260877  	[0x00000032665e30, 0x00000076856000)

 2907 14:16:55.781782  

 2908 14:16:55.784947  	[0x00000100000000, 0x0000017fc00000)

 2909 14:16:56.763229  

 2910 14:16:56.766358  ec_init: CrosEC protocol v3 supported (256, 256)

 2911 14:16:57.198472  

 2912 14:16:57.199005  R8152: Initializing

 2913 14:16:57.199323  

 2914 14:16:57.201720  Version 6 (ocp_data = 5c30)

 2915 14:16:57.202207  

 2916 14:16:57.205150  R8152: Done initializing

 2917 14:16:57.205641  

 2918 14:16:57.208323  Adding net device

 2919 14:16:57.509147  

 2920 14:16:57.512747  [firmware-brya-14505.B-collabora] Sep  8 2023 15:56:17

 2921 14:16:57.513242  

 2922 14:16:57.513531  

 2923 14:16:57.513775  

 2924 14:16:57.514380  Setting prompt string to ['brask:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2926 14:16:57.615396  brask: tftpboot 192.168.201.1 12704046/tftp-deploy-tlgcgm_u/kernel/bzImage 12704046/tftp-deploy-tlgcgm_u/kernel/cmdline 12704046/tftp-deploy-tlgcgm_u/ramdisk/ramdisk.cpio.gz

 2927 14:16:57.615990  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2928 14:16:57.616414  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
 2929 14:16:57.620995  tftpboot 192.168.201.1 12704046/tftp-deploy-tlgcgm_u/kernel/bzIploy-tlgcgm_u/kernel/cmdline 12704046/tftp-deploy-tlgcgm_u/ramdisk/ramdisk.cpio.gz

 2930 14:16:57.621500  

 2931 14:16:57.621780  Waiting for link

 2932 14:16:57.823258  

 2933 14:16:57.823749  done.

 2934 14:16:57.824033  

 2935 14:16:57.824274  MAC: 00:13:3b:00:0f:7e

 2936 14:16:57.824545  

 2937 14:16:57.826532  Sending DHCP discover... done.

 2938 14:16:57.826911  

 2939 14:16:57.829952  Waiting for reply... done.

 2940 14:16:57.830437  

 2941 14:16:57.833213  Sending DHCP request... done.

 2942 14:16:57.833594  

 2943 14:16:57.836210  Waiting for reply... done.

 2944 14:16:57.836592  

 2945 14:16:57.839559  My ip is 192.168.201.135

 2946 14:16:57.839900  

 2947 14:16:57.843255  The DHCP server ip is 192.168.201.1

 2948 14:16:57.843714  

 2949 14:16:57.846355  TFTP server IP predefined by user: 192.168.201.1

 2950 14:16:57.846709  

 2951 14:16:57.853002  Bootfile predefined by user: 12704046/tftp-deploy-tlgcgm_u/kernel/bzImage

 2952 14:16:57.853460  

 2953 14:16:57.856095  Sending tftp read request... done.

 2954 14:16:57.859585  

 2955 14:16:57.864883  Waiting for the transfer... 

 2956 14:16:57.865330  

 2957 14:16:58.471427  00000000 ################################################################

 2958 14:16:58.471858  

 2959 14:16:59.069303  00080000 ################################################################

 2960 14:16:59.069726  

 2961 14:16:59.672712  00100000 ################################################################

 2962 14:16:59.673174  

 2963 14:17:00.286599  00180000 ################################################################

 2964 14:17:00.287034  

 2965 14:17:00.884929  00200000 ################################################################

 2966 14:17:00.885349  

 2967 14:17:01.480383  00280000 ################################################################

 2968 14:17:01.480821  

 2969 14:17:02.075680  00300000 ################################################################

 2970 14:17:02.076122  

 2971 14:17:02.684063  00380000 ################################################################

 2972 14:17:02.684499  

 2973 14:17:03.275579  00400000 ################################################################

 2974 14:17:03.276007  

 2975 14:17:03.868605  00480000 ################################################################

 2976 14:17:03.869041  

 2977 14:17:04.480319  00500000 ################################################################

 2978 14:17:04.480771  

 2979 14:17:05.097864  00580000 ################################################################

 2980 14:17:05.098287  

 2981 14:17:05.727120  00600000 ################################################################

 2982 14:17:05.727528  

 2983 14:17:06.335067  00680000 ################################################################

 2984 14:17:06.335523  

 2985 14:17:06.959780  00700000 ################################################################

 2986 14:17:06.959927  

 2987 14:17:07.562621  00780000 ################################################################

 2988 14:17:07.562769  

 2989 14:17:08.146627  00800000 ################################################################

 2990 14:17:08.146998  

 2991 14:17:08.753868  00880000 ################################################################

 2992 14:17:08.754004  

 2993 14:17:09.358421  00900000 ################################################################

 2994 14:17:09.358558  

 2995 14:17:09.977104  00980000 ################################################################

 2996 14:17:09.977480  

 2997 14:17:10.589024  00a00000 ################################################################

 2998 14:17:10.589162  

 2999 14:17:11.198980  00a80000 ################################################################

 3000 14:17:11.199359  

 3001 14:17:11.806350  00b00000 ################################################################

 3002 14:17:11.806760  

 3003 14:17:12.414043  00b80000 ################################################################

 3004 14:17:12.414192  

 3005 14:17:13.040438  00c00000 ################################################################

 3006 14:17:13.040587  

 3007 14:17:13.639788  00c80000 ################################################################

 3008 14:17:13.640219  

 3009 14:17:14.217340  00d00000 ############################################################# done.

 3010 14:17:14.217485  

 3011 14:17:14.221071  The bootfile was 14127264 bytes long.

 3012 14:17:14.221423  

 3013 14:17:14.223963  Sending tftp read request... done.

 3014 14:17:14.224228  

 3015 14:17:14.227407  Waiting for the transfer... 

 3016 14:17:14.227728  

 3017 14:17:14.832471  00000000 ################################################################

 3018 14:17:14.832869  

 3019 14:17:15.431144  00080000 ################################################################

 3020 14:17:15.431560  

 3021 14:17:16.034449  00100000 ################################################################

 3022 14:17:16.034847  

 3023 14:17:16.637775  00180000 ################################################################

 3024 14:17:16.637911  

 3025 14:17:17.227041  00200000 ################################################################

 3026 14:17:17.227484  

 3027 14:17:17.833804  00280000 ################################################################

 3028 14:17:17.834213  

 3029 14:17:18.453554  00300000 ################################################################

 3030 14:17:18.453975  

 3031 14:17:19.069926  00380000 ################################################################

 3032 14:17:19.070074  

 3033 14:17:19.685257  00400000 ################################################################

 3034 14:17:19.685394  

 3035 14:17:20.287404  00480000 ################################################################

 3036 14:17:20.287556  

 3037 14:17:20.879509  00500000 ################################################################

 3038 14:17:20.879914  

 3039 14:17:21.484976  00580000 ################################################################

 3040 14:17:21.485375  

 3041 14:17:22.105943  00600000 ################################################################

 3042 14:17:22.106308  

 3043 14:17:22.707313  00680000 ################################################################

 3044 14:17:22.707755  

 3045 14:17:23.289179  00700000 ################################################################

 3046 14:17:23.289334  

 3047 14:17:23.887284  00780000 ################################################################

 3048 14:17:23.887689  

 3049 14:17:24.485622  00800000 ################################################################

 3050 14:17:24.485772  

 3051 14:17:24.922532  00880000 ############################################## done.

 3052 14:17:24.922971  

 3053 14:17:24.925671  Sending tftp read request... done.

 3054 14:17:24.926015  

 3055 14:17:24.928888  Waiting for the transfer... 

 3056 14:17:24.929209  

 3057 14:17:24.929500  00000000 # done.

 3058 14:17:24.929757  

 3059 14:17:24.938991  Command line loaded dynamically from TFTP file: 12704046/tftp-deploy-tlgcgm_u/kernel/cmdline

 3060 14:17:24.939417  

 3061 14:17:24.955201  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 3062 14:17:24.962663  

 3063 14:17:24.965681  Shutting down all USB controllers.

 3064 14:17:24.966119  

 3065 14:17:24.966461  Removing current net device

 3066 14:17:24.966742  

 3067 14:17:24.969045  Finalizing coreboot

 3068 14:17:24.969491  

 3069 14:17:24.975773  Exiting depthcharge with code 4 at timestamp: 41812235

 3070 14:17:24.976225  

 3071 14:17:24.976590  

 3072 14:17:24.976864  Starting kernel ...

 3073 14:17:24.977151  

 3074 14:17:24.977429  

 3075 14:17:24.978379  end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
 3076 14:17:24.978711  start: 2.2.5 auto-login-action (timeout 00:04:09) [common]
 3077 14:17:24.978973  Setting prompt string to ['Linux version [0-9]']
 3078 14:17:24.979213  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 3079 14:17:24.979456  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 3081 14:21:33.979529  end: 2.2.5 auto-login-action (duration 00:04:09) [common]
 3083 14:21:33.980304  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 249 seconds'
 3085 14:21:33.980869  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 3088 14:21:33.981921  end: 2 depthcharge-action (duration 00:05:00) [common]
 3090 14:21:33.982678  Cleaning after the job
 3091 14:21:33.982968  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/ramdisk
 3092 14:21:33.984762  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/kernel
 3093 14:21:33.985966  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704046/tftp-deploy-tlgcgm_u/modules
 3094 14:21:33.986388  start: 5.1 power-off (timeout 00:00:30) [common]
 3095 14:21:33.986523  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-6' '--port=1' '--command=off'
 3096 14:21:34.065851  >> Command sent successfully.

 3097 14:21:34.073392  Returned 0 in 0 seconds
 3098 14:21:34.174394  end: 5.1 power-off (duration 00:00:00) [common]
 3100 14:21:34.175488  start: 5.2 read-feedback (timeout 00:10:00) [common]
 3101 14:21:34.176201  Listened to connection for namespace 'common' for up to 1s
 3102 14:21:35.176624  Finalising connection for namespace 'common'
 3103 14:21:35.177133  Disconnecting from shell: Finalise
 3104 14:21:35.177409  

 3105 14:21:35.278236  end: 5.2 read-feedback (duration 00:00:01) [common]
 3106 14:21:35.278769  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12704046
 3107 14:21:35.291573  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12704046
 3108 14:21:35.291718  JobError: Your job cannot terminate cleanly.