Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:16:19.512222 lava-dispatcher, installed at version: 2024.01
2 14:16:19.512440 start: 0 validate
3 14:16:19.512573 Start time: 2024-02-05 14:16:19.512565+00:00 (UTC)
4 14:16:19.512699 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:16:19.512827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 14:16:19.784115 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:16:19.784841 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.209-cip44-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:16:20.054003 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:16:20.054689 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:16:25.209962 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:16:25.210696 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.209-cip44-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 14:16:25.489101 validate duration: 5.98
14 14:16:25.490446 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:16:25.491004 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:16:25.491476 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:16:25.492092 Not decompressing ramdisk as can be used compressed.
18 14:16:25.492560 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 14:16:25.492917 saving as /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/ramdisk/initrd.cpio.gz
20 14:16:25.493308 total size: 5432690 (5 MB)
21 14:16:26.143886 progress 0 % (0 MB)
22 14:16:26.148591 progress 5 % (0 MB)
23 14:16:26.150048 progress 10 % (0 MB)
24 14:16:26.151443 progress 15 % (0 MB)
25 14:16:26.153117 progress 20 % (1 MB)
26 14:16:26.154528 progress 25 % (1 MB)
27 14:16:26.155911 progress 30 % (1 MB)
28 14:16:26.157498 progress 35 % (1 MB)
29 14:16:26.158933 progress 40 % (2 MB)
30 14:16:26.160340 progress 45 % (2 MB)
31 14:16:26.161779 progress 50 % (2 MB)
32 14:16:26.163340 progress 55 % (2 MB)
33 14:16:26.164785 progress 60 % (3 MB)
34 14:16:26.166163 progress 65 % (3 MB)
35 14:16:26.167700 progress 70 % (3 MB)
36 14:16:26.169105 progress 75 % (3 MB)
37 14:16:26.170609 progress 80 % (4 MB)
38 14:16:26.171968 progress 85 % (4 MB)
39 14:16:26.173526 progress 90 % (4 MB)
40 14:16:26.174897 progress 95 % (4 MB)
41 14:16:26.176277 progress 100 % (5 MB)
42 14:16:26.176484 5 MB downloaded in 0.68 s (7.58 MB/s)
43 14:16:26.176637 end: 1.1.1 http-download (duration 00:00:01) [common]
45 14:16:26.176873 end: 1.1 download-retry (duration 00:00:01) [common]
46 14:16:26.176960 start: 1.2 download-retry (timeout 00:09:59) [common]
47 14:16:26.177084 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 14:16:26.177219 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.209-cip44-rebase/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 14:16:26.177289 saving as /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/kernel/bzImage
50 14:16:26.177349 total size: 14127264 (13 MB)
51 14:16:26.177408 No compression specified
52 14:16:26.178484 progress 0 % (0 MB)
53 14:16:26.182287 progress 5 % (0 MB)
54 14:16:26.186044 progress 10 % (1 MB)
55 14:16:26.189580 progress 15 % (2 MB)
56 14:16:26.193311 progress 20 % (2 MB)
57 14:16:26.196837 progress 25 % (3 MB)
58 14:16:26.200529 progress 30 % (4 MB)
59 14:16:26.204102 progress 35 % (4 MB)
60 14:16:26.207833 progress 40 % (5 MB)
61 14:16:26.211562 progress 45 % (6 MB)
62 14:16:26.215142 progress 50 % (6 MB)
63 14:16:26.218873 progress 55 % (7 MB)
64 14:16:26.222700 progress 60 % (8 MB)
65 14:16:26.226657 progress 65 % (8 MB)
66 14:16:26.230414 progress 70 % (9 MB)
67 14:16:26.234210 progress 75 % (10 MB)
68 14:16:26.238118 progress 80 % (10 MB)
69 14:16:26.241925 progress 85 % (11 MB)
70 14:16:26.245605 progress 90 % (12 MB)
71 14:16:26.249122 progress 95 % (12 MB)
72 14:16:26.252757 progress 100 % (13 MB)
73 14:16:26.252891 13 MB downloaded in 0.08 s (178.36 MB/s)
74 14:16:26.253090 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:16:26.253351 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:16:26.253474 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:16:26.253596 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:16:26.253746 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 14:16:26.253815 saving as /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/nfsrootfs/full.rootfs.tar
81 14:16:26.253877 total size: 133380384 (127 MB)
82 14:16:26.253940 Using unxz to decompress xz
83 14:16:26.258159 progress 0 % (0 MB)
84 14:16:26.600480 progress 5 % (6 MB)
85 14:16:26.953613 progress 10 % (12 MB)
86 14:16:27.244252 progress 15 % (19 MB)
87 14:16:27.428534 progress 20 % (25 MB)
88 14:16:27.674668 progress 25 % (31 MB)
89 14:16:28.021717 progress 30 % (38 MB)
90 14:16:28.368137 progress 35 % (44 MB)
91 14:16:28.772966 progress 40 % (50 MB)
92 14:16:29.161873 progress 45 % (57 MB)
93 14:16:29.526634 progress 50 % (63 MB)
94 14:16:29.920894 progress 55 % (69 MB)
95 14:16:30.302755 progress 60 % (76 MB)
96 14:16:30.669114 progress 65 % (82 MB)
97 14:16:31.036329 progress 70 % (89 MB)
98 14:16:31.405992 progress 75 % (95 MB)
99 14:16:31.844387 progress 80 % (101 MB)
100 14:16:32.278089 progress 85 % (108 MB)
101 14:16:32.545774 progress 90 % (114 MB)
102 14:16:32.900176 progress 95 % (120 MB)
103 14:16:33.302293 progress 100 % (127 MB)
104 14:16:33.307740 127 MB downloaded in 7.05 s (18.03 MB/s)
105 14:16:33.308008 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:16:33.308283 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:16:33.308375 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:16:33.308467 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:16:33.308623 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.209-cip44-rebase/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 14:16:33.308697 saving as /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/modules/modules.tar
112 14:16:33.308759 total size: 527196 (0 MB)
113 14:16:33.308823 Using unxz to decompress xz
114 14:16:33.313227 progress 6 % (0 MB)
115 14:16:33.313632 progress 12 % (0 MB)
116 14:16:33.313876 progress 18 % (0 MB)
117 14:16:33.315413 progress 24 % (0 MB)
118 14:16:33.317289 progress 31 % (0 MB)
119 14:16:33.319326 progress 37 % (0 MB)
120 14:16:33.321445 progress 43 % (0 MB)
121 14:16:33.323405 progress 49 % (0 MB)
122 14:16:33.325419 progress 55 % (0 MB)
123 14:16:33.327313 progress 62 % (0 MB)
124 14:16:33.329367 progress 68 % (0 MB)
125 14:16:33.331311 progress 74 % (0 MB)
126 14:16:33.333437 progress 80 % (0 MB)
127 14:16:33.335610 progress 87 % (0 MB)
128 14:16:33.337490 progress 93 % (0 MB)
129 14:16:33.339402 progress 99 % (0 MB)
130 14:16:33.346805 0 MB downloaded in 0.04 s (13.22 MB/s)
131 14:16:33.347124 end: 1.4.1 http-download (duration 00:00:00) [common]
133 14:16:33.347531 end: 1.4 download-retry (duration 00:00:00) [common]
134 14:16:33.347670 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
135 14:16:33.347818 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
136 14:16:35.522091 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12704088/extract-nfsrootfs-uvehhz6u
137 14:16:35.522306 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
138 14:16:35.522417 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
139 14:16:35.522593 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc
140 14:16:35.522727 makedir: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin
141 14:16:35.522836 makedir: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/tests
142 14:16:35.522936 makedir: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/results
143 14:16:35.523040 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-add-keys
144 14:16:35.523190 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-add-sources
145 14:16:35.523327 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-background-process-start
146 14:16:35.523459 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-background-process-stop
147 14:16:35.523587 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-common-functions
148 14:16:35.523713 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-echo-ipv4
149 14:16:35.523841 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-install-packages
150 14:16:35.523966 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-installed-packages
151 14:16:35.524090 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-os-build
152 14:16:35.524216 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-probe-channel
153 14:16:35.524341 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-probe-ip
154 14:16:35.524467 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-target-ip
155 14:16:35.524592 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-target-mac
156 14:16:35.524718 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-target-storage
157 14:16:35.524848 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-case
158 14:16:35.524977 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-event
159 14:16:35.525104 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-feedback
160 14:16:35.525227 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-raise
161 14:16:35.525352 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-reference
162 14:16:35.525477 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-runner
163 14:16:35.525600 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-set
164 14:16:35.525724 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-test-shell
165 14:16:35.525850 Updating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-install-packages (oe)
166 14:16:35.526002 Updating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/bin/lava-installed-packages (oe)
167 14:16:35.526125 Creating /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/environment
168 14:16:35.526221 LAVA metadata
169 14:16:35.526292 - LAVA_JOB_ID=12704088
170 14:16:35.526355 - LAVA_DISPATCHER_IP=192.168.201.1
171 14:16:35.526459 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
172 14:16:35.526526 skipped lava-vland-overlay
173 14:16:35.526599 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
174 14:16:35.526678 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
175 14:16:35.526737 skipped lava-multinode-overlay
176 14:16:35.526809 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
177 14:16:35.526886 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
178 14:16:35.526959 Loading test definitions
179 14:16:35.527046 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
180 14:16:35.527114 Using /lava-12704088 at stage 0
181 14:16:35.527427 uuid=12704088_1.5.2.3.1 testdef=None
182 14:16:35.527516 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
183 14:16:35.527605 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
184 14:16:35.528111 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
186 14:16:35.528334 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
187 14:16:35.529136 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
189 14:16:35.529366 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
190 14:16:35.529996 runner path: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/0/tests/0_dmesg test_uuid 12704088_1.5.2.3.1
191 14:16:35.530153 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 14:16:35.530380 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
194 14:16:35.530452 Using /lava-12704088 at stage 1
195 14:16:35.530753 uuid=12704088_1.5.2.3.5 testdef=None
196 14:16:35.530841 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
197 14:16:35.530925 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
198 14:16:35.531394 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 14:16:35.531609 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
201 14:16:35.532255 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 14:16:35.532483 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
204 14:16:35.533118 runner path: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/1/tests/1_bootrr test_uuid 12704088_1.5.2.3.5
205 14:16:35.533274 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 14:16:35.533478 Creating lava-test-runner.conf files
208 14:16:35.533540 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/0 for stage 0
209 14:16:35.533630 - 0_dmesg
210 14:16:35.533709 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12704088/lava-overlay-v2qy5hrc/lava-12704088/1 for stage 1
211 14:16:35.533799 - 1_bootrr
212 14:16:35.533894 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
213 14:16:35.533981 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
214 14:16:35.541159 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
215 14:16:35.541262 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
216 14:16:35.541347 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 14:16:35.541434 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
218 14:16:35.541519 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
219 14:16:35.678726 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 14:16:35.679266 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
221 14:16:35.679429 extracting modules file /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12704088/extract-nfsrootfs-uvehhz6u
222 14:16:35.706993 extracting modules file /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12704088/extract-overlay-ramdisk-sxl_b7jq/ramdisk
223 14:16:35.731629 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 14:16:35.731811 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
225 14:16:35.731942 [common] Applying overlay to NFS
226 14:16:35.732043 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12704088/compress-overlay-j2cdaijx/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12704088/extract-nfsrootfs-uvehhz6u
227 14:16:35.740106 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 14:16:35.740221 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
229 14:16:35.740312 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 14:16:35.740405 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
231 14:16:35.740488 Building ramdisk /var/lib/lava/dispatcher/tmp/12704088/extract-overlay-ramdisk-sxl_b7jq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12704088/extract-overlay-ramdisk-sxl_b7jq/ramdisk
232 14:16:35.831650 >> 30524 blocks
233 14:16:36.433243 rename /var/lib/lava/dispatcher/tmp/12704088/extract-overlay-ramdisk-sxl_b7jq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/ramdisk/ramdisk.cpio.gz
234 14:16:36.433679 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 14:16:36.433814 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
236 14:16:36.433925 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
237 14:16:36.434023 No mkimage arch provided, not using FIT.
238 14:16:36.434115 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 14:16:36.434201 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 14:16:36.434306 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
241 14:16:36.434397 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
242 14:16:36.434478 No LXC device requested
243 14:16:36.434557 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 14:16:36.434647 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
245 14:16:36.434732 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 14:16:36.434806 Checking files for TFTP limit of 4294967296 bytes.
247 14:16:36.435212 end: 1 tftp-deploy (duration 00:00:11) [common]
248 14:16:36.435321 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 14:16:36.435419 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 14:16:36.435547 substitutions:
251 14:16:36.435616 - {DTB}: None
252 14:16:36.435678 - {INITRD}: 12704088/tftp-deploy-l8j5eka7/ramdisk/ramdisk.cpio.gz
253 14:16:36.435737 - {KERNEL}: 12704088/tftp-deploy-l8j5eka7/kernel/bzImage
254 14:16:36.435795 - {LAVA_MAC}: None
255 14:16:36.435851 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12704088/extract-nfsrootfs-uvehhz6u
256 14:16:36.435909 - {NFS_SERVER_IP}: 192.168.201.1
257 14:16:36.435964 - {PRESEED_CONFIG}: None
258 14:16:36.436018 - {PRESEED_LOCAL}: None
259 14:16:36.436072 - {RAMDISK}: 12704088/tftp-deploy-l8j5eka7/ramdisk/ramdisk.cpio.gz
260 14:16:36.436125 - {ROOT_PART}: None
261 14:16:36.436194 - {ROOT}: None
262 14:16:36.436252 - {SERVER_IP}: 192.168.201.1
263 14:16:36.436305 - {TEE}: None
264 14:16:36.436359 Parsed boot commands:
265 14:16:36.436412 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 14:16:36.436590 Parsed boot commands: tftpboot 192.168.201.1 12704088/tftp-deploy-l8j5eka7/kernel/bzImage 12704088/tftp-deploy-l8j5eka7/kernel/cmdline 12704088/tftp-deploy-l8j5eka7/ramdisk/ramdisk.cpio.gz
267 14:16:36.436680 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 14:16:36.436770 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 14:16:36.436862 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 14:16:36.436950 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 14:16:36.437047 Not connected, no need to disconnect.
272 14:16:36.437154 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 14:16:36.437265 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 14:16:36.437340 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
275 14:16:36.441453 Setting prompt string to ['lava-test: # ']
276 14:16:36.441800 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 14:16:36.441911 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 14:16:36.442008 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 14:16:36.442099 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 14:16:36.442323 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
281 14:16:41.590331 >> Command sent successfully.
282 14:16:41.600943 Returned 0 in 5 seconds
283 14:16:41.702300 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
285 14:16:41.703896 end: 2.2.2 reset-device (duration 00:00:05) [common]
286 14:16:41.704476 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
287 14:16:41.704994 Setting prompt string to 'Starting depthcharge on Volmar...'
288 14:16:41.705402 Changing prompt to 'Starting depthcharge on Volmar...'
289 14:16:41.705858 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
290 14:16:41.707191 [Enter `^Ec?' for help]
291 14:16:43.477878
292 14:16:43.478432
293 14:16:43.484640 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
294 14:16:43.488261 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
295 14:16:43.495431 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
296 14:16:43.501710 CPU: AES supported, TXT NOT supported, VT supported
297 14:16:43.508258 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
298 14:16:43.508712 Cache size = 10 MiB
299 14:16:43.516446 MCH: device id 4609 (rev 04) is Alderlake-P
300 14:16:43.519759 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
301 14:16:43.523340 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
302 14:16:43.526371 VBOOT: Loading verstage.
303 14:16:43.529973 FMAP: Found "FLASH" version 1.1 at 0x1804000.
304 14:16:43.536768 FMAP: base = 0x0 size = 0x2000000 #areas = 37
305 14:16:43.539970 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
306 14:16:43.550336 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
307 14:16:43.556899 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
308 14:16:43.557522
309 14:16:43.557916
310 14:16:43.566660 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
311 14:16:43.573713 Probing TPM I2C: I2C bus 1 version 0x3230302a
312 14:16:43.576946 DW I2C bus 1 at 0xfe022000 (400 KHz)
313 14:16:43.579919 I2C TX abort detected (00000001)
314 14:16:43.583309 cr50_i2c_read: Address write failed
315 14:16:43.594708 .done! DID_VID 0x00281ae0
316 14:16:43.598414 TPM ready after 0 ms
317 14:16:43.601551 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
318 14:16:43.615351 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
319 14:16:43.621620 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 14:16:43.668602 tlcl_send_startup: Startup return code is 0
321 14:16:43.669259 TPM: setup succeeded
322 14:16:43.688193 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
323 14:16:43.710201 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
324 14:16:43.714229 Chrome EC: UHEPI supported
325 14:16:43.717361 Reading cr50 boot mode
326 14:16:43.732004 Cr50 says boot_mode is VERIFIED_RW(0x00).
327 14:16:43.732431 Phase 1
328 14:16:43.738582 FMAP: area GBB found @ 1805000 (458752 bytes)
329 14:16:43.745144 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 14:16:43.751510 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 14:16:43.759003 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
332 14:16:43.759102 Phase 2
333 14:16:43.762922 Phase 3
334 14:16:43.766598 FMAP: area GBB found @ 1805000 (458752 bytes)
335 14:16:43.770136 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
336 14:16:43.776922 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
337 14:16:43.783489 VB2:vb2_verify_keyblock() Checking keyblock signature...
338 14:16:43.790186 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
339 14:16:43.797241 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
340 14:16:43.803517 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
341 14:16:43.816843 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
342 14:16:43.820151 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
343 14:16:43.827058 VB2:vb2_verify_fw_preamble() Verifying preamble.
344 14:16:43.833374 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
345 14:16:43.840846 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
346 14:16:43.846739 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
347 14:16:43.851201 Phase 4
348 14:16:43.854353 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
349 14:16:43.861266 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
350 14:16:44.073083 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
351 14:16:44.080229 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
352 14:16:44.083217 Saving vboot hash.
353 14:16:44.089934 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
354 14:16:44.106022 tlcl_extend: response is 0
355 14:16:44.112403 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
356 14:16:44.119012 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
357 14:16:44.135184 tlcl_extend: response is 0
358 14:16:44.141872 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
359 14:16:44.157510 tlcl_lock_nv_write: response is 0
360 14:16:44.179080 tlcl_lock_nv_write: response is 0
361 14:16:44.179576 Slot A is selected
362 14:16:44.185697 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
363 14:16:44.192500 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
364 14:16:44.199006 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
365 14:16:44.205820 BS: verstage times (exec / console): total (unknown) / 264 ms
366 14:16:44.206254
367 14:16:44.206593
368 14:16:44.212688 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
369 14:16:44.218263 Google Chrome EC: version:
370 14:16:44.221629 ro: volmar_v2.0.14126-e605144e9c
371 14:16:44.224780 rw: volmar_v0.0.55-22d1557
372 14:16:44.228317 running image: 2
373 14:16:44.231537 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
374 14:16:44.241308 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
375 14:16:44.248219 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
376 14:16:44.254666 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
377 14:16:44.265191 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
378 14:16:44.274831 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
379 14:16:44.278085 EC took 942us to calculate image hash
380 14:16:44.287768 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
381 14:16:44.291274 VB2:sync_ec() select_rw=RW(active)
382 14:16:44.303570 Waited 270us to clear limit power flag.
383 14:16:44.307061 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
384 14:16:44.310117 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
385 14:16:44.313351 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
386 14:16:44.320264 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
387 14:16:44.323665 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
388 14:16:44.327294 TCO_STS: 0000 0000
389 14:16:44.327831 GEN_PMCON: d0015038 00002200
390 14:16:44.330188 GBLRST_CAUSE: 00000000 00000000
391 14:16:44.333334 HPR_CAUSE0: 00000000
392 14:16:44.337000 prev_sleep_state 5
393 14:16:44.340598 Abort disabling TXT, as CPU is not TXT capable.
394 14:16:44.345968 cse_lite: Number of partitions = 3
395 14:16:44.348864 cse_lite: Current partition = RO
396 14:16:44.352312 cse_lite: Next partition = RO
397 14:16:44.356169 cse_lite: Flags = 0x7
398 14:16:44.363018 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
399 14:16:44.369895 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
400 14:16:44.376267 FMAP: area SI_ME found @ 1000 (5238784 bytes)
401 14:16:44.382400 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
402 14:16:44.389330 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
403 14:16:44.396042 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
404 14:16:44.399546 cse_lite: CSE CBFS RW version : 16.1.25.2049
405 14:16:44.402427 cse_lite: Set Boot Partition Info Command (RW)
406 14:16:44.410115 HECI: Global Reset(Type:1) Command
407 14:16:45.842261 �S supported, TXT NOT supported, VT supported
408 14:16:45.849647 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
409 14:16:45.852154 Cache size = 10 MiB
410 14:16:45.855713 MCH: device id 4609 (rev 04) is Alderlake-P
411 14:16:45.862230 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
412 14:16:45.865849 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
413 14:16:45.869085 VBOOT: Loading verstage.
414 14:16:45.873391 FMAP: Found "FLASH" version 1.1 at 0x1804000.
415 14:16:45.876882 FMAP: base = 0x0 size = 0x2000000 #areas = 37
416 14:16:45.883631 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 14:16:45.890473 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
418 14:16:45.897118 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
419 14:16:45.901593
420 14:16:45.902168
421 14:16:45.907530 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
422 14:16:45.914260 Probing TPM I2C: I2C bus 1 version 0x3230302a
423 14:16:45.917911 DW I2C bus 1 at 0xfe022000 (400 KHz)
424 14:16:45.920779 done! DID_VID 0x00281ae0
425 14:16:45.924389 TPM ready after 0 ms
426 14:16:45.927922 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
427 14:16:45.937151 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
428 14:16:45.944720 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
429 14:16:45.996088 tlcl_send_startup: Startup return code is 0
430 14:16:45.996627 TPM: setup succeeded
431 14:16:46.016131 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
432 14:16:46.038372 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
433 14:16:46.042319 Chrome EC: UHEPI supported
434 14:16:46.045911 Reading cr50 boot mode
435 14:16:46.060151 Cr50 says boot_mode is VERIFIED_RW(0x00).
436 14:16:46.060680 Phase 1
437 14:16:46.066698 FMAP: area GBB found @ 1805000 (458752 bytes)
438 14:16:46.073219 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
439 14:16:46.080145 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
440 14:16:46.087175 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
441 14:16:46.090391 Phase 2
442 14:16:46.090913 Phase 3
443 14:16:46.093500 FMAP: area GBB found @ 1805000 (458752 bytes)
444 14:16:46.100376 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
445 14:16:46.103925 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
446 14:16:46.110430 VB2:vb2_verify_keyblock() Checking keyblock signature...
447 14:16:46.117072 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
448 14:16:46.123646 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
449 14:16:46.133608 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
450 14:16:46.145222 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
451 14:16:46.148211 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
452 14:16:46.154920 VB2:vb2_verify_fw_preamble() Verifying preamble.
453 14:16:46.162362 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
454 14:16:46.168544 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
455 14:16:46.175235 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
456 14:16:46.179486 Phase 4
457 14:16:46.182914 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
458 14:16:46.189094 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
459 14:16:46.402223 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
460 14:16:46.408653 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
461 14:16:46.412506 Saving vboot hash.
462 14:16:46.418514 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
463 14:16:46.434370 tlcl_extend: response is 0
464 14:16:46.441662 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
465 14:16:46.444570 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
466 14:16:46.462282 tlcl_extend: response is 0
467 14:16:46.468288 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
468 14:16:46.487820 tlcl_lock_nv_write: response is 0
469 14:16:46.506537 tlcl_lock_nv_write: response is 0
470 14:16:46.507096 Slot A is selected
471 14:16:46.513198 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
472 14:16:46.519765 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
473 14:16:46.526166 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
474 14:16:46.533267 BS: verstage times (exec / console): total (unknown) / 256 ms
475 14:16:46.533924
476 14:16:46.534271
477 14:16:46.539290 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
478 14:16:46.544549 Google Chrome EC: version:
479 14:16:46.548226 ro: volmar_v2.0.14126-e605144e9c
480 14:16:46.551217 rw: volmar_v0.0.55-22d1557
481 14:16:46.554406 running image: 2
482 14:16:46.558305 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
483 14:16:46.568131 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
484 14:16:46.574484 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
485 14:16:46.581421 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
486 14:16:46.591534 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
487 14:16:46.601932 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
488 14:16:46.604825 EC took 941us to calculate image hash
489 14:16:46.614572 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
490 14:16:46.617779 VB2:sync_ec() select_rw=RW(active)
491 14:16:46.629861 Waited 275us to clear limit power flag.
492 14:16:46.633040 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
493 14:16:46.636539 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
494 14:16:46.639782 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
495 14:16:46.646541 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
496 14:16:46.649570 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
497 14:16:46.653567 TCO_STS: 0000 0000
498 14:16:46.653991 GEN_PMCON: d1001038 00002200
499 14:16:46.656395 GBLRST_CAUSE: 00000040 00000000
500 14:16:46.659698 HPR_CAUSE0: 00000000
501 14:16:46.663048 prev_sleep_state 5
502 14:16:46.666570 Abort disabling TXT, as CPU is not TXT capable.
503 14:16:46.674327 cse_lite: Number of partitions = 3
504 14:16:46.677401 cse_lite: Current partition = RW
505 14:16:46.677849 cse_lite: Next partition = RW
506 14:16:46.680621 cse_lite: Flags = 0x7
507 14:16:46.687847 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
508 14:16:46.697586 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
509 14:16:46.701007 FMAP: area SI_ME found @ 1000 (5238784 bytes)
510 14:16:46.707309 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
511 14:16:46.714375 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
512 14:16:46.721151 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
513 14:16:46.724930 cse_lite: CSE CBFS RW version : 16.1.25.2049
514 14:16:46.727960 Boot Count incremented to 6840
515 14:16:46.734837 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
516 14:16:46.741256 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
517 14:16:46.753779 Probing TPM I2C: done! DID_VID 0x00281ae0
518 14:16:46.757370 Locality already claimed
519 14:16:46.761139 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
520 14:16:46.779776 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
521 14:16:46.786490 MRC: Hash idx 0x100d comparison successful.
522 14:16:46.790113 MRC cache found, size f6c8
523 14:16:46.790543 bootmode is set to: 2
524 14:16:46.793291 EC returned error result code 3
525 14:16:46.796546 FW_CONFIG value from CBI is 0x131
526 14:16:46.803729 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
527 14:16:46.806676 SPD index = 0
528 14:16:46.813661 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
529 14:16:46.814221 SPD: module type is LPDDR4X
530 14:16:46.820394 SPD: module part number is K4U6E3S4AB-MGCL
531 14:16:46.827794 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
532 14:16:46.830497 SPD: device width 16 bits, bus width 16 bits
533 14:16:46.833374 SPD: module size is 1024 MB (per channel)
534 14:16:46.903058 CBMEM:
535 14:16:46.906808 IMD: root @ 0x76fff000 254 entries.
536 14:16:46.909619 IMD: root @ 0x76ffec00 62 entries.
537 14:16:46.917355 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
538 14:16:46.920945 RO_VPD is uninitialized or empty.
539 14:16:46.924492 FMAP: area RW_VPD found @ f29000 (8192 bytes)
540 14:16:46.931414 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
541 14:16:46.934600 External stage cache:
542 14:16:46.937860 IMD: root @ 0x7bbff000 254 entries.
543 14:16:46.940767 IMD: root @ 0x7bbfec00 62 entries.
544 14:16:46.947977 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
545 14:16:46.954222 MRC: Checking cached data update for 'RW_MRC_CACHE'.
546 14:16:46.958246 MRC: 'RW_MRC_CACHE' does not need update.
547 14:16:46.958673 8 DIMMs found
548 14:16:46.961163 SMM Memory Map
549 14:16:46.964594 SMRAM : 0x7b800000 0x800000
550 14:16:46.967984 Subregion 0: 0x7b800000 0x200000
551 14:16:46.971311 Subregion 1: 0x7ba00000 0x200000
552 14:16:46.975066 Subregion 2: 0x7bc00000 0x400000
553 14:16:46.977685 top_of_ram = 0x77000000
554 14:16:46.981669 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
555 14:16:46.987882 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
556 14:16:46.995023 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
557 14:16:46.997889 MTRR Range: Start=ff000000 End=0 (Size 1000000)
558 14:16:46.998419 Normal boot
559 14:16:47.007852 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
560 14:16:47.014920 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
561 14:16:47.020880 Processing 237 relocs. Offset value of 0x74ab9000
562 14:16:47.028771 BS: romstage times (exec / console): total (unknown) / 377 ms
563 14:16:47.036597
564 14:16:47.037182
565 14:16:47.043012 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
566 14:16:47.043581 Normal boot
567 14:16:47.050489 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
568 14:16:47.056178 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
569 14:16:47.063070 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
570 14:16:47.073039 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
571 14:16:47.121732 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
572 14:16:47.128288 Processing 5931 relocs. Offset value of 0x72a2f000
573 14:16:47.131429 BS: postcar times (exec / console): total (unknown) / 51 ms
574 14:16:47.134919
575 14:16:47.135452
576 14:16:47.141447 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
577 14:16:47.144287 Reserving BERT start 76a1e000, size 10000
578 14:16:47.147957 Normal boot
579 14:16:47.151558 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
580 14:16:47.157715 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
581 14:16:47.168325 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
582 14:16:47.171125 FMAP: area RW_VPD found @ f29000 (8192 bytes)
583 14:16:47.174426 Google Chrome EC: version:
584 14:16:47.178014 ro: volmar_v2.0.14126-e605144e9c
585 14:16:47.181242 rw: volmar_v0.0.55-22d1557
586 14:16:47.184111 running image: 2
587 14:16:47.187864 ACPI _SWS is PM1 Index 8 GPE Index -1
588 14:16:47.190791 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
589 14:16:47.196081 EC returned error result code 3
590 14:16:47.199823 FW_CONFIG value from CBI is 0x131
591 14:16:47.205920 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
592 14:16:47.209560 PCI: 00:1c.2 disabled by fw_config
593 14:16:47.216118 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
594 14:16:47.219830 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
595 14:16:47.225919 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
596 14:16:47.229226 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
597 14:16:47.235938 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
598 14:16:47.242679 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
599 14:16:47.249874 microcode: sig=0x906a4 pf=0x80 revision=0x423
600 14:16:47.252549 microcode: Update skipped, already up-to-date
601 14:16:47.258812 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
602 14:16:47.291975 Detected 6 core, 8 thread CPU.
603 14:16:47.294945 Setting up SMI for CPU
604 14:16:47.299033 IED base = 0x7bc00000
605 14:16:47.299579 IED size = 0x00400000
606 14:16:47.302308 Will perform SMM setup.
607 14:16:47.305435 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
608 14:16:47.308394 LAPIC 0x0 in XAPIC mode.
609 14:16:47.318410 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
610 14:16:47.321805 Processing 18 relocs. Offset value of 0x00030000
611 14:16:47.326218 Attempting to start 7 APs
612 14:16:47.329570 Waiting for 10ms after sending INIT.
613 14:16:47.342788 Waiting for SIPI to complete...
614 14:16:47.346392 done.
615 14:16:47.346820 LAPIC 0x1 in XAPIC mode.
616 14:16:47.349389 Waiting for SIPI to complete...
617 14:16:47.356363 AP: slot 5 apic_id 1, MCU rev: 0x00000423
618 14:16:47.356900 done.
619 14:16:47.359740 LAPIC 0x1a in XAPIC mode.
620 14:16:47.360273 LAPIC 0x18 in XAPIC mode.
621 14:16:47.362970 LAPIC 0x1c in XAPIC mode.
622 14:16:47.366299 LAPIC 0x1e in XAPIC mode.
623 14:16:47.369489 AP: slot 4 apic_id 1a, MCU rev: 0x00000423
624 14:16:47.375911 AP: slot 3 apic_id 18, MCU rev: 0x00000423
625 14:16:47.379414 AP: slot 2 apic_id 1e, MCU rev: 0x00000423
626 14:16:47.382836 AP: slot 1 apic_id 1c, MCU rev: 0x00000423
627 14:16:47.386559 LAPIC 0x9 in XAPIC mode.
628 14:16:47.389341 LAPIC 0x8 in XAPIC mode.
629 14:16:47.393024 AP: slot 6 apic_id 9, MCU rev: 0x00000423
630 14:16:47.396252 AP: slot 7 apic_id 8, MCU rev: 0x00000423
631 14:16:47.399615 smm_setup_relocation_handler: enter
632 14:16:47.402940 smm_setup_relocation_handler: exit
633 14:16:47.412820 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
634 14:16:47.416317 Processing 11 relocs. Offset value of 0x00038000
635 14:16:47.422845 smm_module_setup_stub: stack_top = 0x7b804000
636 14:16:47.425830 smm_module_setup_stub: per cpu stack_size = 0x800
637 14:16:47.432882 smm_module_setup_stub: runtime.start32_offset = 0x4c
638 14:16:47.435928 smm_module_setup_stub: runtime.smm_size = 0x10000
639 14:16:47.442754 SMM Module: stub loaded at 38000. Will call 0x76a52094
640 14:16:47.445620 Installing permanent SMM handler to 0x7b800000
641 14:16:47.452832 smm_load_module: total_smm_space_needed e468, available -> 200000
642 14:16:47.462779 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
643 14:16:47.466482 Processing 255 relocs. Offset value of 0x7b9f6000
644 14:16:47.472826 smm_load_module: smram_start: 0x7b800000
645 14:16:47.475595 smm_load_module: smram_end: 7ba00000
646 14:16:47.479584 smm_load_module: handler start 0x7b9f6d5f
647 14:16:47.482514 smm_load_module: handler_size 98d0
648 14:16:47.485880 smm_load_module: fxsave_area 0x7b9ff000
649 14:16:47.488857 smm_load_module: fxsave_size 1000
650 14:16:47.492028 smm_load_module: CONFIG_MSEG_SIZE 0x0
651 14:16:47.498985 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
652 14:16:47.506188 smm_load_module: handler_mod_params.smbase = 0x7b800000
653 14:16:47.509577 smm_load_module: per_cpu_save_state_size = 0x400
654 14:16:47.512806 smm_load_module: num_cpus = 0x8
655 14:16:47.518669 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
656 14:16:47.522729 smm_load_module: total_save_state_size = 0x2000
657 14:16:47.525828 smm_load_module: cpu0 entry: 7b9e6000
658 14:16:47.532496 smm_create_map: cpus allowed in one segment 30
659 14:16:47.535816 smm_create_map: min # of segments needed 1
660 14:16:47.536349 CPU 0x0
661 14:16:47.539356 smbase 7b9e6000 entry 7b9ee000
662 14:16:47.545854 ss_start 7b9f5c00 code_end 7b9ee208
663 14:16:47.546426 CPU 0x1
664 14:16:47.549212 smbase 7b9e5c00 entry 7b9edc00
665 14:16:47.556232 ss_start 7b9f5800 code_end 7b9ede08
666 14:16:47.556778 CPU 0x2
667 14:16:47.558898 smbase 7b9e5800 entry 7b9ed800
668 14:16:47.562300 ss_start 7b9f5400 code_end 7b9eda08
669 14:16:47.565570 CPU 0x3
670 14:16:47.569135 smbase 7b9e5400 entry 7b9ed400
671 14:16:47.572327 ss_start 7b9f5000 code_end 7b9ed608
672 14:16:47.575068 CPU 0x4
673 14:16:47.578988 smbase 7b9e5000 entry 7b9ed000
674 14:16:47.581939 ss_start 7b9f4c00 code_end 7b9ed208
675 14:16:47.582371 CPU 0x5
676 14:16:47.585486 smbase 7b9e4c00 entry 7b9ecc00
677 14:16:47.592378 ss_start 7b9f4800 code_end 7b9ece08
678 14:16:47.592953 CPU 0x6
679 14:16:47.595208 smbase 7b9e4800 entry 7b9ec800
680 14:16:47.602316 ss_start 7b9f4400 code_end 7b9eca08
681 14:16:47.602860 CPU 0x7
682 14:16:47.605234 smbase 7b9e4400 entry 7b9ec400
683 14:16:47.608719 ss_start 7b9f4000 code_end 7b9ec608
684 14:16:47.618698 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
685 14:16:47.622040 Processing 11 relocs. Offset value of 0x7b9ee000
686 14:16:47.628781 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
687 14:16:47.635663 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
688 14:16:47.642291 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
689 14:16:47.648703 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
690 14:16:47.655057 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
691 14:16:47.658478 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
692 14:16:47.665312 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
693 14:16:47.672366 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
694 14:16:47.678165 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
695 14:16:47.684744 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
696 14:16:47.692032 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
697 14:16:47.698199 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
698 14:16:47.704741 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
699 14:16:47.711894 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
700 14:16:47.718257 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
701 14:16:47.721978 smm_module_setup_stub: stack_top = 0x7b804000
702 14:16:47.728277 smm_module_setup_stub: per cpu stack_size = 0x800
703 14:16:47.731452 smm_module_setup_stub: runtime.start32_offset = 0x4c
704 14:16:47.737852 smm_module_setup_stub: runtime.smm_size = 0x200000
705 14:16:47.741445 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
706 14:16:47.746267 Clearing SMI status registers
707 14:16:47.749667 SMI_STS: PM1
708 14:16:47.750095 PM1_STS: WAK PWRBTN
709 14:16:47.759752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
710 14:16:47.763601 In relocation handler: CPU 0
711 14:16:47.766792 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
712 14:16:47.769819 Writing SMRR. base = 0x7b800006, mask=0xff800c00
713 14:16:47.773580 Relocation complete.
714 14:16:47.779998 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
715 14:16:47.783239 In relocation handler: CPU 5
716 14:16:47.786696 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
717 14:16:47.789903 Relocation complete.
718 14:16:47.797388 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
719 14:16:47.799966 In relocation handler: CPU 1
720 14:16:47.803172 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
721 14:16:47.809312 Writing SMRR. base = 0x7b800006, mask=0xff800c00
722 14:16:47.809827 Relocation complete.
723 14:16:47.816101 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
724 14:16:47.819325 In relocation handler: CPU 3
725 14:16:47.822650 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
726 14:16:47.829577 Writing SMRR. base = 0x7b800006, mask=0xff800c00
727 14:16:47.832886 Relocation complete.
728 14:16:47.839519 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
729 14:16:47.842606 In relocation handler: CPU 2
730 14:16:47.846593 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
731 14:16:47.849989 Writing SMRR. base = 0x7b800006, mask=0xff800c00
732 14:16:47.853095 Relocation complete.
733 14:16:47.859736 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
734 14:16:47.863202 In relocation handler: CPU 4
735 14:16:47.866610 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
736 14:16:47.872852 Writing SMRR. base = 0x7b800006, mask=0xff800c00
737 14:16:47.873398 Relocation complete.
738 14:16:47.883191 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
739 14:16:47.883736 In relocation handler: CPU 7
740 14:16:47.889324 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
741 14:16:47.892598 Writing SMRR. base = 0x7b800006, mask=0xff800c00
742 14:16:47.895906 Relocation complete.
743 14:16:47.903023 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
744 14:16:47.906286 In relocation handler: CPU 6
745 14:16:47.909456 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
746 14:16:47.912664 Relocation complete.
747 14:16:47.913145 Initializing CPU #0
748 14:16:47.916022 CPU: vendor Intel device 906a4
749 14:16:47.919181 CPU: family 06, model 9a, stepping 04
750 14:16:47.922974 Clearing out pending MCEs
751 14:16:47.926027 cpu: energy policy set to 7
752 14:16:47.930232 Turbo is available but hidden
753 14:16:47.932837 Turbo is available and visible
754 14:16:47.935837 microcode: Update skipped, already up-to-date
755 14:16:47.939511 CPU #0 initialized
756 14:16:47.940076 Initializing CPU #5
757 14:16:47.942994 Initializing CPU #4
758 14:16:47.946231 Initializing CPU #3
759 14:16:47.949234 CPU: vendor Intel device 906a4
760 14:16:47.952695 CPU: family 06, model 9a, stepping 04
761 14:16:47.956248 CPU: vendor Intel device 906a4
762 14:16:47.959164 CPU: family 06, model 9a, stepping 04
763 14:16:47.959274 Initializing CPU #2
764 14:16:47.962522 Clearing out pending MCEs
765 14:16:47.965458 Initializing CPU #1
766 14:16:47.968992 Initializing CPU #6
767 14:16:47.969117 CPU: vendor Intel device 906a4
768 14:16:47.975913 CPU: family 06, model 9a, stepping 04
769 14:16:47.976042 Clearing out pending MCEs
770 14:16:47.979139 cpu: energy policy set to 7
771 14:16:47.982333 CPU: vendor Intel device 906a4
772 14:16:47.985657 CPU: family 06, model 9a, stepping 04
773 14:16:47.988910 Clearing out pending MCEs
774 14:16:47.992318 CPU: vendor Intel device 906a4
775 14:16:47.995847 CPU: family 06, model 9a, stepping 04
776 14:16:47.999004 Initializing CPU #7
777 14:16:48.002250 Clearing out pending MCEs
778 14:16:48.002352 CPU: vendor Intel device 906a4
779 14:16:48.008860 CPU: family 06, model 9a, stepping 04
780 14:16:48.008978 cpu: energy policy set to 7
781 14:16:48.012471 cpu: energy policy set to 7
782 14:16:48.015579 Clearing out pending MCEs
783 14:16:48.022694 microcode: Update skipped, already up-to-date
784 14:16:48.022827 CPU #4 initialized
785 14:16:48.025820 CPU: vendor Intel device 906a4
786 14:16:48.029581 CPU: family 06, model 9a, stepping 04
787 14:16:48.036152 microcode: Update skipped, already up-to-date
788 14:16:48.036276 CPU #3 initialized
789 14:16:48.039223 cpu: energy policy set to 7
790 14:16:48.042560 cpu: energy policy set to 7
791 14:16:48.045451 microcode: Update skipped, already up-to-date
792 14:16:48.048848 CPU #2 initialized
793 14:16:48.052490 microcode: Update skipped, already up-to-date
794 14:16:48.055767 CPU #1 initialized
795 14:16:48.058952 Clearing out pending MCEs
796 14:16:48.062632 microcode: Update skipped, already up-to-date
797 14:16:48.065457 CPU #6 initialized
798 14:16:48.065541 cpu: energy policy set to 7
799 14:16:48.069199 Clearing out pending MCEs
800 14:16:48.075448 microcode: Update skipped, already up-to-date
801 14:16:48.075560 CPU #5 initialized
802 14:16:48.079334 cpu: energy policy set to 7
803 14:16:48.082251 microcode: Update skipped, already up-to-date
804 14:16:48.085953 CPU #7 initialized
805 14:16:48.089134 bsp_do_flight_plan done after 730 msecs.
806 14:16:48.092211 CPU: frequency set to 4400 MHz
807 14:16:48.095974 Enabling SMIs.
808 14:16:48.099698 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
809 14:16:48.117135 Probing TPM I2C: done! DID_VID 0x00281ae0
810 14:16:48.119890 Locality already claimed
811 14:16:48.123397 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
812 14:16:48.134766 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
813 14:16:48.138179 Enabling GPIO PM b/c CR50 has long IRQ pulse support
814 14:16:48.144752 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
815 14:16:48.151339 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
816 14:16:48.155227 Found a VBT of 9216 bytes after decompression
817 14:16:48.157999 PCI 1.0, PIN A, using IRQ #16
818 14:16:48.161522 PCI 2.0, PIN A, using IRQ #17
819 14:16:48.164589 PCI 4.0, PIN A, using IRQ #18
820 14:16:48.168184 PCI 5.0, PIN A, using IRQ #16
821 14:16:48.171249 PCI 6.0, PIN A, using IRQ #16
822 14:16:48.175035 PCI 6.2, PIN C, using IRQ #18
823 14:16:48.177925 PCI 7.0, PIN A, using IRQ #19
824 14:16:48.181296 PCI 7.1, PIN B, using IRQ #20
825 14:16:48.184707 PCI 7.2, PIN C, using IRQ #21
826 14:16:48.187897 PCI 7.3, PIN D, using IRQ #22
827 14:16:48.191316 PCI 8.0, PIN A, using IRQ #23
828 14:16:48.194858 PCI D.0, PIN A, using IRQ #17
829 14:16:48.194955 PCI D.1, PIN B, using IRQ #19
830 14:16:48.198012 PCI 10.0, PIN A, using IRQ #24
831 14:16:48.201567 PCI 10.1, PIN B, using IRQ #25
832 14:16:48.204939 PCI 10.6, PIN C, using IRQ #20
833 14:16:48.208160 PCI 10.7, PIN D, using IRQ #21
834 14:16:48.211567 PCI 11.0, PIN A, using IRQ #26
835 14:16:48.214952 PCI 11.1, PIN B, using IRQ #27
836 14:16:48.218226 PCI 11.2, PIN C, using IRQ #28
837 14:16:48.221616 PCI 11.3, PIN D, using IRQ #29
838 14:16:48.224734 PCI 12.0, PIN A, using IRQ #30
839 14:16:48.228407 PCI 12.6, PIN B, using IRQ #31
840 14:16:48.231305 PCI 12.7, PIN C, using IRQ #22
841 14:16:48.234762 PCI 13.0, PIN A, using IRQ #32
842 14:16:48.238118 PCI 13.1, PIN B, using IRQ #33
843 14:16:48.241590 PCI 13.2, PIN C, using IRQ #34
844 14:16:48.244886 PCI 13.3, PIN D, using IRQ #35
845 14:16:48.244969 PCI 14.0, PIN B, using IRQ #23
846 14:16:48.247941 PCI 14.1, PIN A, using IRQ #36
847 14:16:48.251329 PCI 14.3, PIN C, using IRQ #17
848 14:16:48.254991 PCI 15.0, PIN A, using IRQ #37
849 14:16:48.258083 PCI 15.1, PIN B, using IRQ #38
850 14:16:48.261540 PCI 15.2, PIN C, using IRQ #39
851 14:16:48.264665 PCI 15.3, PIN D, using IRQ #40
852 14:16:48.268010 PCI 16.0, PIN A, using IRQ #18
853 14:16:48.272235 PCI 16.1, PIN B, using IRQ #19
854 14:16:48.274751 PCI 16.2, PIN C, using IRQ #20
855 14:16:48.278117 PCI 16.3, PIN D, using IRQ #21
856 14:16:48.281374 PCI 16.4, PIN A, using IRQ #18
857 14:16:48.284969 PCI 16.5, PIN B, using IRQ #19
858 14:16:48.288047 PCI 17.0, PIN A, using IRQ #22
859 14:16:48.291738 PCI 19.0, PIN A, using IRQ #41
860 14:16:48.294661 PCI 19.1, PIN B, using IRQ #42
861 14:16:48.294745 PCI 19.2, PIN C, using IRQ #43
862 14:16:48.298411 PCI 1C.0, PIN A, using IRQ #16
863 14:16:48.301579 PCI 1C.1, PIN B, using IRQ #17
864 14:16:48.305656 PCI 1C.2, PIN C, using IRQ #18
865 14:16:48.308188 PCI 1C.3, PIN D, using IRQ #19
866 14:16:48.311512 PCI 1C.4, PIN A, using IRQ #16
867 14:16:48.314880 PCI 1C.5, PIN B, using IRQ #17
868 14:16:48.318238 PCI 1C.6, PIN C, using IRQ #18
869 14:16:48.321667 PCI 1C.7, PIN D, using IRQ #19
870 14:16:48.325245 PCI 1D.0, PIN A, using IRQ #16
871 14:16:48.328129 PCI 1D.1, PIN B, using IRQ #17
872 14:16:48.331326 PCI 1D.2, PIN C, using IRQ #18
873 14:16:48.334568 PCI 1D.3, PIN D, using IRQ #19
874 14:16:48.338223 PCI 1E.0, PIN A, using IRQ #23
875 14:16:48.341222 PCI 1E.1, PIN B, using IRQ #20
876 14:16:48.345060 PCI 1E.2, PIN C, using IRQ #44
877 14:16:48.345144 PCI 1E.3, PIN D, using IRQ #45
878 14:16:48.348400 PCI 1F.3, PIN B, using IRQ #22
879 14:16:48.351190 PCI 1F.4, PIN C, using IRQ #23
880 14:16:48.354609 PCI 1F.6, PIN D, using IRQ #20
881 14:16:48.357915 PCI 1F.7, PIN A, using IRQ #21
882 14:16:48.364714 IRQ: Using dynamically assigned PCI IO-APIC IRQs
883 14:16:48.371227 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
884 14:16:48.550713 FSPS returned 0
885 14:16:48.553655 Executing Phase 1 of FspMultiPhaseSiInit
886 14:16:48.563869 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
887 14:16:48.567386 port C0 DISC req: usage 1 usb3 1 usb2 1
888 14:16:48.570726 Raw Buffer output 0 00000111
889 14:16:48.573959 Raw Buffer output 1 00000000
890 14:16:48.577378 pmc_send_ipc_cmd succeeded
891 14:16:48.584117 port C1 DISC req: usage 1 usb3 3 usb2 3
892 14:16:48.584423 Raw Buffer output 0 00000331
893 14:16:48.587205 Raw Buffer output 1 00000000
894 14:16:48.591425 pmc_send_ipc_cmd succeeded
895 14:16:48.595601 Detected 6 core, 8 thread CPU.
896 14:16:48.598278 Detected 6 core, 8 thread CPU.
897 14:16:48.603767 Detected 6 core, 8 thread CPU.
898 14:16:48.607111 Detected 6 core, 8 thread CPU.
899 14:16:48.610618 Detected 6 core, 8 thread CPU.
900 14:16:48.613684 Detected 6 core, 8 thread CPU.
901 14:16:48.616899 Detected 6 core, 8 thread CPU.
902 14:16:48.620452 Detected 6 core, 8 thread CPU.
903 14:16:48.623869 Detected 6 core, 8 thread CPU.
904 14:16:48.627272 Detected 6 core, 8 thread CPU.
905 14:16:48.630652 Detected 6 core, 8 thread CPU.
906 14:16:48.634114 Detected 6 core, 8 thread CPU.
907 14:16:48.637312 Detected 6 core, 8 thread CPU.
908 14:16:48.640558 Detected 6 core, 8 thread CPU.
909 14:16:48.644451 Detected 6 core, 8 thread CPU.
910 14:16:48.647934 Detected 6 core, 8 thread CPU.
911 14:16:48.650643 Detected 6 core, 8 thread CPU.
912 14:16:48.653923 Detected 6 core, 8 thread CPU.
913 14:16:48.657315 Detected 6 core, 8 thread CPU.
914 14:16:48.657399 Detected 6 core, 8 thread CPU.
915 14:16:48.660821 Detected 6 core, 8 thread CPU.
916 14:16:48.664117 Detected 6 core, 8 thread CPU.
917 14:16:48.957335 Detected 6 core, 8 thread CPU.
918 14:16:48.960488 Detected 6 core, 8 thread CPU.
919 14:16:48.963964 Detected 6 core, 8 thread CPU.
920 14:16:48.967229 Detected 6 core, 8 thread CPU.
921 14:16:48.971329 Detected 6 core, 8 thread CPU.
922 14:16:48.974166 Detected 6 core, 8 thread CPU.
923 14:16:48.977563 Detected 6 core, 8 thread CPU.
924 14:16:48.980843 Detected 6 core, 8 thread CPU.
925 14:16:48.984711 Detected 6 core, 8 thread CPU.
926 14:16:48.987441 Detected 6 core, 8 thread CPU.
927 14:16:48.991436 Detected 6 core, 8 thread CPU.
928 14:16:48.994274 Detected 6 core, 8 thread CPU.
929 14:16:48.997445 Detected 6 core, 8 thread CPU.
930 14:16:49.001400 Detected 6 core, 8 thread CPU.
931 14:16:49.004419 Detected 6 core, 8 thread CPU.
932 14:16:49.007700 Detected 6 core, 8 thread CPU.
933 14:16:49.011043 Detected 6 core, 8 thread CPU.
934 14:16:49.014393 Detected 6 core, 8 thread CPU.
935 14:16:49.014477 Detected 6 core, 8 thread CPU.
936 14:16:49.017263 Detected 6 core, 8 thread CPU.
937 14:16:49.020905 Display FSP Version Info HOB
938 14:16:49.024402 Reference Code - CPU = c.0.65.70
939 14:16:49.027956 uCode Version = 0.0.4.23
940 14:16:49.031074 TXT ACM version = ff.ff.ff.ffff
941 14:16:49.034474 Reference Code - ME = c.0.65.70
942 14:16:49.037602 MEBx version = 0.0.0.0
943 14:16:49.041070 ME Firmware Version = Lite SKU
944 14:16:49.044194 Reference Code - PCH = c.0.65.70
945 14:16:49.047635 PCH-CRID Status = Disabled
946 14:16:49.050895 PCH-CRID Original Value = ff.ff.ff.ffff
947 14:16:49.054575 PCH-CRID New Value = ff.ff.ff.ffff
948 14:16:49.057705 OPROM - RST - RAID = ff.ff.ff.ffff
949 14:16:49.061011 PCH Hsio Version = 4.0.0.0
950 14:16:49.064551 Reference Code - SA - System Agent = c.0.65.70
951 14:16:49.067604 Reference Code - MRC = 0.0.3.80
952 14:16:49.070853 SA - PCIe Version = c.0.65.70
953 14:16:49.074390 SA-CRID Status = Disabled
954 14:16:49.077344 SA-CRID Original Value = 0.0.0.4
955 14:16:49.081017 SA-CRID New Value = 0.0.0.4
956 14:16:49.084385 OPROM - VBIOS = ff.ff.ff.ffff
957 14:16:49.088162 IO Manageability Engine FW Version = 24.0.4.0
958 14:16:49.091302 PHY Build Version = 0.0.0.2016
959 14:16:49.094454 Thunderbolt(TM) FW Version = 0.0.0.0
960 14:16:49.100671 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
961 14:16:49.107346 BS: BS_DEV_INIT_CHIPS run times (exec / console): 491 / 507 ms
962 14:16:49.107431 Enumerating buses...
963 14:16:49.113929 Show all devs... Before device enumeration.
964 14:16:49.114014 Root Device: enabled 1
965 14:16:49.117283 CPU_CLUSTER: 0: enabled 1
966 14:16:49.120738 DOMAIN: 0000: enabled 1
967 14:16:49.124004 GPIO: 0: enabled 1
968 14:16:49.124087 PCI: 00:00.0: enabled 1
969 14:16:49.127477 PCI: 00:01.0: enabled 0
970 14:16:49.130613 PCI: 00:01.1: enabled 0
971 14:16:49.134035 PCI: 00:02.0: enabled 1
972 14:16:49.134125 PCI: 00:04.0: enabled 1
973 14:16:49.137796 PCI: 00:05.0: enabled 0
974 14:16:49.140721 PCI: 00:06.0: enabled 1
975 14:16:49.144132 PCI: 00:06.2: enabled 0
976 14:16:49.144561 PCI: 00:07.0: enabled 0
977 14:16:49.147337 PCI: 00:07.1: enabled 0
978 14:16:49.151137 PCI: 00:07.2: enabled 0
979 14:16:49.151698 PCI: 00:07.3: enabled 0
980 14:16:49.154427 PCI: 00:08.0: enabled 0
981 14:16:49.157818 PCI: 00:09.0: enabled 0
982 14:16:49.160841 PCI: 00:0a.0: enabled 1
983 14:16:49.161328 PCI: 00:0d.0: enabled 1
984 14:16:49.164042 PCI: 00:0d.1: enabled 0
985 14:16:49.167624 PCI: 00:0d.2: enabled 0
986 14:16:49.170728 PCI: 00:0d.3: enabled 0
987 14:16:49.171173 PCI: 00:0e.0: enabled 0
988 14:16:49.174979 PCI: 00:10.0: enabled 0
989 14:16:49.177220 PCI: 00:10.1: enabled 0
990 14:16:49.180552 PCI: 00:10.6: enabled 0
991 14:16:49.181010 PCI: 00:10.7: enabled 0
992 14:16:49.184007 PCI: 00:12.0: enabled 0
993 14:16:49.187747 PCI: 00:12.6: enabled 0
994 14:16:49.188172 PCI: 00:12.7: enabled 0
995 14:16:49.191522 PCI: 00:13.0: enabled 0
996 14:16:49.194414 PCI: 00:14.0: enabled 1
997 14:16:49.197378 PCI: 00:14.1: enabled 0
998 14:16:49.197828 PCI: 00:14.2: enabled 1
999 14:16:49.200756 PCI: 00:14.3: enabled 1
1000 14:16:49.203964 PCI: 00:15.0: enabled 1
1001 14:16:49.207422 PCI: 00:15.1: enabled 1
1002 14:16:49.207869 PCI: 00:15.2: enabled 0
1003 14:16:49.210654 PCI: 00:15.3: enabled 1
1004 14:16:49.213872 PCI: 00:16.0: enabled 1
1005 14:16:49.217463 PCI: 00:16.1: enabled 0
1006 14:16:49.217966 PCI: 00:16.2: enabled 0
1007 14:16:49.221065 PCI: 00:16.3: enabled 0
1008 14:16:49.224352 PCI: 00:16.4: enabled 0
1009 14:16:49.224778 PCI: 00:16.5: enabled 0
1010 14:16:49.227145 PCI: 00:17.0: enabled 1
1011 14:16:49.230625 PCI: 00:19.0: enabled 0
1012 14:16:49.233811 PCI: 00:19.1: enabled 1
1013 14:16:49.234268 PCI: 00:19.2: enabled 0
1014 14:16:49.237572 PCI: 00:1a.0: enabled 0
1015 14:16:49.240469 PCI: 00:1c.0: enabled 0
1016 14:16:49.243806 PCI: 00:1c.1: enabled 0
1017 14:16:49.244263 PCI: 00:1c.2: enabled 0
1018 14:16:49.247036 PCI: 00:1c.3: enabled 0
1019 14:16:49.250278 PCI: 00:1c.4: enabled 0
1020 14:16:49.253712 PCI: 00:1c.5: enabled 0
1021 14:16:49.254316 PCI: 00:1c.6: enabled 0
1022 14:16:49.256816 PCI: 00:1c.7: enabled 0
1023 14:16:49.260372 PCI: 00:1d.0: enabled 0
1024 14:16:49.263619 PCI: 00:1d.1: enabled 0
1025 14:16:49.264224 PCI: 00:1d.2: enabled 0
1026 14:16:49.267036 PCI: 00:1d.3: enabled 0
1027 14:16:49.270143 PCI: 00:1e.0: enabled 1
1028 14:16:49.270595 PCI: 00:1e.1: enabled 0
1029 14:16:49.274266 PCI: 00:1e.2: enabled 0
1030 14:16:49.276840 PCI: 00:1e.3: enabled 1
1031 14:16:49.280688 PCI: 00:1f.0: enabled 1
1032 14:16:49.281200 PCI: 00:1f.1: enabled 0
1033 14:16:49.283801 PCI: 00:1f.2: enabled 1
1034 14:16:49.287238 PCI: 00:1f.3: enabled 1
1035 14:16:49.290207 PCI: 00:1f.4: enabled 0
1036 14:16:49.290644 PCI: 00:1f.5: enabled 1
1037 14:16:49.293980 PCI: 00:1f.6: enabled 0
1038 14:16:49.296958 PCI: 00:1f.7: enabled 0
1039 14:16:49.299942 GENERIC: 0.0: enabled 1
1040 14:16:49.300042 GENERIC: 0.0: enabled 1
1041 14:16:49.303550 GENERIC: 1.0: enabled 1
1042 14:16:49.306418 GENERIC: 0.0: enabled 1
1043 14:16:49.306500 GENERIC: 1.0: enabled 1
1044 14:16:49.309866 USB0 port 0: enabled 1
1045 14:16:49.313469 USB0 port 0: enabled 1
1046 14:16:49.316687 GENERIC: 0.0: enabled 1
1047 14:16:49.316768 I2C: 00:1a: enabled 1
1048 14:16:49.319902 I2C: 00:31: enabled 1
1049 14:16:49.323279 I2C: 00:32: enabled 1
1050 14:16:49.323361 I2C: 00:50: enabled 1
1051 14:16:49.326901 I2C: 00:10: enabled 1
1052 14:16:49.329984 I2C: 00:15: enabled 1
1053 14:16:49.330068 I2C: 00:2c: enabled 1
1054 14:16:49.333277 GENERIC: 0.0: enabled 1
1055 14:16:49.337015 SPI: 00: enabled 1
1056 14:16:49.337097 PNP: 0c09.0: enabled 1
1057 14:16:49.339908 GENERIC: 0.0: enabled 1
1058 14:16:49.343441 USB3 port 0: enabled 1
1059 14:16:49.343523 USB3 port 1: enabled 0
1060 14:16:49.346431 USB3 port 2: enabled 1
1061 14:16:49.349849 USB3 port 3: enabled 0
1062 14:16:49.353451 USB2 port 0: enabled 1
1063 14:16:49.353533 USB2 port 1: enabled 0
1064 14:16:49.356712 USB2 port 2: enabled 1
1065 14:16:49.360042 USB2 port 3: enabled 0
1066 14:16:49.360125 USB2 port 4: enabled 0
1067 14:16:49.363554 USB2 port 5: enabled 1
1068 14:16:49.366496 USB2 port 6: enabled 0
1069 14:16:49.369840 USB2 port 7: enabled 0
1070 14:16:49.369922 USB2 port 8: enabled 1
1071 14:16:49.373521 USB2 port 9: enabled 1
1072 14:16:49.376735 USB3 port 0: enabled 1
1073 14:16:49.376817 USB3 port 1: enabled 0
1074 14:16:49.380217 USB3 port 2: enabled 0
1075 14:16:49.383410 USB3 port 3: enabled 0
1076 14:16:49.383492 GENERIC: 0.0: enabled 1
1077 14:16:49.386629 GENERIC: 1.0: enabled 1
1078 14:16:49.390010 APIC: 00: enabled 1
1079 14:16:49.390093 APIC: 1c: enabled 1
1080 14:16:49.393285 APIC: 1e: enabled 1
1081 14:16:49.396426 APIC: 18: enabled 1
1082 14:16:49.396508 APIC: 1a: enabled 1
1083 14:16:49.400052 APIC: 01: enabled 1
1084 14:16:49.403283 APIC: 09: enabled 1
1085 14:16:49.403452 APIC: 08: enabled 1
1086 14:16:49.407465 Compare with tree...
1087 14:16:49.407546 Root Device: enabled 1
1088 14:16:49.410415 CPU_CLUSTER: 0: enabled 1
1089 14:16:49.413292 APIC: 00: enabled 1
1090 14:16:49.416625 APIC: 1c: enabled 1
1091 14:16:49.416708 APIC: 1e: enabled 1
1092 14:16:49.420620 APIC: 18: enabled 1
1093 14:16:49.423460 APIC: 1a: enabled 1
1094 14:16:49.423542 APIC: 01: enabled 1
1095 14:16:49.426555 APIC: 09: enabled 1
1096 14:16:49.430424 APIC: 08: enabled 1
1097 14:16:49.430507 DOMAIN: 0000: enabled 1
1098 14:16:49.433470 GPIO: 0: enabled 1
1099 14:16:49.436726 PCI: 00:00.0: enabled 1
1100 14:16:49.439866 PCI: 00:01.0: enabled 0
1101 14:16:49.439960 PCI: 00:01.1: enabled 0
1102 14:16:49.443465 PCI: 00:02.0: enabled 1
1103 14:16:49.446882 PCI: 00:04.0: enabled 1
1104 14:16:49.450389 GENERIC: 0.0: enabled 1
1105 14:16:49.453583 PCI: 00:05.0: enabled 0
1106 14:16:49.453706 PCI: 00:06.0: enabled 1
1107 14:16:49.457405 PCI: 00:06.2: enabled 0
1108 14:16:49.460035 PCI: 00:08.0: enabled 0
1109 14:16:49.463576 PCI: 00:09.0: enabled 0
1110 14:16:49.466527 PCI: 00:0a.0: enabled 1
1111 14:16:49.466701 PCI: 00:0d.0: enabled 1
1112 14:16:49.469969 USB0 port 0: enabled 1
1113 14:16:49.473211 USB3 port 0: enabled 1
1114 14:16:49.476367 USB3 port 1: enabled 0
1115 14:16:49.479984 USB3 port 2: enabled 1
1116 14:16:49.483398 USB3 port 3: enabled 0
1117 14:16:49.483480 PCI: 00:0d.1: enabled 0
1118 14:16:49.486832 PCI: 00:0d.2: enabled 0
1119 14:16:49.490036 PCI: 00:0d.3: enabled 0
1120 14:16:49.493382 PCI: 00:0e.0: enabled 0
1121 14:16:49.493464 PCI: 00:10.0: enabled 0
1122 14:16:49.496604 PCI: 00:10.1: enabled 0
1123 14:16:49.500385 PCI: 00:10.6: enabled 0
1124 14:16:49.503162 PCI: 00:10.7: enabled 0
1125 14:16:49.507108 PCI: 00:12.0: enabled 0
1126 14:16:49.507202 PCI: 00:12.6: enabled 0
1127 14:16:49.509881 PCI: 00:12.7: enabled 0
1128 14:16:49.514159 PCI: 00:13.0: enabled 0
1129 14:16:49.516545 PCI: 00:14.0: enabled 1
1130 14:16:49.520172 USB0 port 0: enabled 1
1131 14:16:49.520306 USB2 port 0: enabled 1
1132 14:16:49.523105 USB2 port 1: enabled 0
1133 14:16:49.526492 USB2 port 2: enabled 1
1134 14:16:49.530121 USB2 port 3: enabled 0
1135 14:16:49.533420 USB2 port 4: enabled 0
1136 14:16:49.536819 USB2 port 5: enabled 1
1137 14:16:49.537047 USB2 port 6: enabled 0
1138 14:16:49.539859 USB2 port 7: enabled 0
1139 14:16:49.543053 USB2 port 8: enabled 1
1140 14:16:49.547007 USB2 port 9: enabled 1
1141 14:16:49.549922 USB3 port 0: enabled 1
1142 14:16:49.550133 USB3 port 1: enabled 0
1143 14:16:49.553815 USB3 port 2: enabled 0
1144 14:16:49.556634 USB3 port 3: enabled 0
1145 14:16:49.560132 PCI: 00:14.1: enabled 0
1146 14:16:49.563603 PCI: 00:14.2: enabled 1
1147 14:16:49.564054 PCI: 00:14.3: enabled 1
1148 14:16:49.567559 GENERIC: 0.0: enabled 1
1149 14:16:49.570123 PCI: 00:15.0: enabled 1
1150 14:16:49.573374 I2C: 00:1a: enabled 1
1151 14:16:49.576609 I2C: 00:31: enabled 1
1152 14:16:49.577072 I2C: 00:32: enabled 1
1153 14:16:49.580156 PCI: 00:15.1: enabled 1
1154 14:16:49.583475 I2C: 00:50: enabled 1
1155 14:16:49.586410 PCI: 00:15.2: enabled 0
1156 14:16:49.589940 PCI: 00:15.3: enabled 1
1157 14:16:49.590022 I2C: 00:10: enabled 1
1158 14:16:49.593262 PCI: 00:16.0: enabled 1
1159 14:16:49.596378 PCI: 00:16.1: enabled 0
1160 14:16:49.600117 PCI: 00:16.2: enabled 0
1161 14:16:49.600199 PCI: 00:16.3: enabled 0
1162 14:16:49.603348 PCI: 00:16.4: enabled 0
1163 14:16:49.606318 PCI: 00:16.5: enabled 0
1164 14:16:49.609680 PCI: 00:17.0: enabled 1
1165 14:16:49.613275 PCI: 00:19.0: enabled 0
1166 14:16:49.613358 PCI: 00:19.1: enabled 1
1167 14:16:49.616521 I2C: 00:15: enabled 1
1168 14:16:49.620169 I2C: 00:2c: enabled 1
1169 14:16:49.623169 PCI: 00:19.2: enabled 0
1170 14:16:49.626449 PCI: 00:1a.0: enabled 0
1171 14:16:49.626547 PCI: 00:1e.0: enabled 1
1172 14:16:49.629595 PCI: 00:1e.1: enabled 0
1173 14:16:49.633080 PCI: 00:1e.2: enabled 0
1174 14:16:49.636146 PCI: 00:1e.3: enabled 1
1175 14:16:49.636240 SPI: 00: enabled 1
1176 14:16:49.639712 PCI: 00:1f.0: enabled 1
1177 14:16:49.643267 PNP: 0c09.0: enabled 1
1178 14:16:49.646832 PCI: 00:1f.1: enabled 0
1179 14:16:49.649742 PCI: 00:1f.2: enabled 1
1180 14:16:49.649854 GENERIC: 0.0: enabled 1
1181 14:16:49.653091 GENERIC: 0.0: enabled 1
1182 14:16:49.656596 GENERIC: 1.0: enabled 1
1183 14:16:49.659892 PCI: 00:1f.3: enabled 1
1184 14:16:49.663439 PCI: 00:1f.4: enabled 0
1185 14:16:49.663590 PCI: 00:1f.5: enabled 1
1186 14:16:49.666262 PCI: 00:1f.6: enabled 0
1187 14:16:49.669804 PCI: 00:1f.7: enabled 0
1188 14:16:49.673525 Root Device scanning...
1189 14:16:49.676143 scan_static_bus for Root Device
1190 14:16:49.676404 CPU_CLUSTER: 0 enabled
1191 14:16:49.679500 DOMAIN: 0000 enabled
1192 14:16:49.683171 DOMAIN: 0000 scanning...
1193 14:16:49.686767 PCI: pci_scan_bus for bus 00
1194 14:16:49.689731 PCI: 00:00.0 [8086/0000] ops
1195 14:16:49.693010 PCI: 00:00.0 [8086/4609] enabled
1196 14:16:49.696494 PCI: 00:02.0 [8086/0000] bus ops
1197 14:16:49.699301 PCI: 00:02.0 [8086/46b3] enabled
1198 14:16:49.702802 PCI: 00:04.0 [8086/0000] bus ops
1199 14:16:49.706199 PCI: 00:04.0 [8086/461d] enabled
1200 14:16:49.709566 PCI: 00:06.0 [8086/0000] bus ops
1201 14:16:49.712463 PCI: 00:06.0 [8086/464d] enabled
1202 14:16:49.715885 PCI: 00:08.0 [8086/464f] disabled
1203 14:16:49.719290 PCI: 00:0a.0 [8086/467d] enabled
1204 14:16:49.722893 PCI: 00:0d.0 [8086/0000] bus ops
1205 14:16:49.726020 PCI: 00:0d.0 [8086/461e] enabled
1206 14:16:49.729202 PCI: 00:14.0 [8086/0000] bus ops
1207 14:16:49.732659 PCI: 00:14.0 [8086/51ed] enabled
1208 14:16:49.736142 PCI: 00:14.2 [8086/51ef] enabled
1209 14:16:49.739380 PCI: 00:14.3 [8086/0000] bus ops
1210 14:16:49.742929 PCI: 00:14.3 [8086/51f0] enabled
1211 14:16:49.746443 PCI: 00:15.0 [8086/0000] bus ops
1212 14:16:49.749775 PCI: 00:15.0 [8086/51e8] enabled
1213 14:16:49.752698 PCI: 00:15.1 [8086/0000] bus ops
1214 14:16:49.756321 PCI: 00:15.1 [8086/51e9] enabled
1215 14:16:49.759766 PCI: 00:15.2 [8086/0000] bus ops
1216 14:16:49.762896 PCI: 00:15.2 [8086/51ea] disabled
1217 14:16:49.766105 PCI: 00:15.3 [8086/0000] bus ops
1218 14:16:49.769585 PCI: 00:15.3 [8086/51eb] enabled
1219 14:16:49.773477 PCI: 00:16.0 [8086/0000] ops
1220 14:16:49.776275 PCI: 00:16.0 [8086/51e0] enabled
1221 14:16:49.782660 PCI: Static device PCI: 00:17.0 not found, disabling it.
1222 14:16:49.786606 PCI: 00:19.0 [8086/0000] bus ops
1223 14:16:49.789741 PCI: 00:19.0 [8086/51c5] disabled
1224 14:16:49.793027 PCI: 00:19.1 [8086/0000] bus ops
1225 14:16:49.796081 PCI: 00:19.1 [8086/51c6] enabled
1226 14:16:49.799777 PCI: 00:1e.0 [8086/0000] ops
1227 14:16:49.803177 PCI: 00:1e.0 [8086/51a8] enabled
1228 14:16:49.806092 PCI: 00:1e.3 [8086/0000] bus ops
1229 14:16:49.809198 PCI: 00:1e.3 [8086/51ab] enabled
1230 14:16:49.812678 PCI: 00:1f.0 [8086/0000] bus ops
1231 14:16:49.815941 PCI: 00:1f.0 [8086/5182] enabled
1232 14:16:49.816033 RTC Init
1233 14:16:49.819578 Set power on after power failure.
1234 14:16:49.822883 Disabling Deep S3
1235 14:16:49.826739 Disabling Deep S3
1236 14:16:49.826888 Disabling Deep S4
1237 14:16:49.829432 Disabling Deep S4
1238 14:16:49.829536 Disabling Deep S5
1239 14:16:49.833291 Disabling Deep S5
1240 14:16:49.836256 PCI: 00:1f.2 [0000/0000] hidden
1241 14:16:49.839793 PCI: 00:1f.3 [8086/0000] bus ops
1242 14:16:49.842947 PCI: 00:1f.3 [8086/51c8] enabled
1243 14:16:49.845956 PCI: 00:1f.5 [8086/0000] bus ops
1244 14:16:49.849195 PCI: 00:1f.5 [8086/51a4] enabled
1245 14:16:49.849278 GPIO: 0 enabled
1246 14:16:49.852627 PCI: Leftover static devices:
1247 14:16:49.856283 PCI: 00:01.0
1248 14:16:49.856365 PCI: 00:01.1
1249 14:16:49.856462 PCI: 00:05.0
1250 14:16:49.859447 PCI: 00:06.2
1251 14:16:49.859529 PCI: 00:09.0
1252 14:16:49.863131 PCI: 00:0d.1
1253 14:16:49.863213 PCI: 00:0d.2
1254 14:16:49.863280 PCI: 00:0d.3
1255 14:16:49.866162 PCI: 00:0e.0
1256 14:16:49.866245 PCI: 00:10.0
1257 14:16:49.869165 PCI: 00:10.1
1258 14:16:49.869247 PCI: 00:10.6
1259 14:16:49.869313 PCI: 00:10.7
1260 14:16:49.872497 PCI: 00:12.0
1261 14:16:49.872579 PCI: 00:12.6
1262 14:16:49.876119 PCI: 00:12.7
1263 14:16:49.876202 PCI: 00:13.0
1264 14:16:49.879500 PCI: 00:14.1
1265 14:16:49.879583 PCI: 00:16.1
1266 14:16:49.879656 PCI: 00:16.2
1267 14:16:49.882827 PCI: 00:16.3
1268 14:16:49.882909 PCI: 00:16.4
1269 14:16:49.886004 PCI: 00:16.5
1270 14:16:49.886087 PCI: 00:17.0
1271 14:16:49.886197 PCI: 00:19.2
1272 14:16:49.889703 PCI: 00:1a.0
1273 14:16:49.889785 PCI: 00:1e.1
1274 14:16:49.892758 PCI: 00:1e.2
1275 14:16:49.892840 PCI: 00:1f.1
1276 14:16:49.892905 PCI: 00:1f.4
1277 14:16:49.895858 PCI: 00:1f.6
1278 14:16:49.895940 PCI: 00:1f.7
1279 14:16:49.899454 PCI: Check your devicetree.cb.
1280 14:16:49.902986 PCI: 00:02.0 scanning...
1281 14:16:49.905681 scan_generic_bus for PCI: 00:02.0
1282 14:16:49.909285 scan_generic_bus for PCI: 00:02.0 done
1283 14:16:49.915748 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1284 14:16:49.915831 PCI: 00:04.0 scanning...
1285 14:16:49.919208 scan_generic_bus for PCI: 00:04.0
1286 14:16:49.922627 GENERIC: 0.0 enabled
1287 14:16:49.929355 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1288 14:16:49.932595 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1289 14:16:49.936001 PCI: 00:06.0 scanning...
1290 14:16:49.939028 do_pci_scan_bridge for PCI: 00:06.0
1291 14:16:49.942356 PCI: pci_scan_bus for bus 01
1292 14:16:49.945941 PCI: 01:00.0 [15b7/5009] enabled
1293 14:16:49.949317 Enabling Common Clock Configuration
1294 14:16:49.952645 L1 Sub-State supported from root port 6
1295 14:16:49.955872 L1 Sub-State Support = 0x5
1296 14:16:49.959420 CommonModeRestoreTime = 0x6e
1297 14:16:49.962700 Power On Value = 0x5, Power On Scale = 0x2
1298 14:16:49.965843 ASPM: Enabled L1
1299 14:16:49.969296 PCIe: Max_Payload_Size adjusted to 256
1300 14:16:49.972318 PCI: 01:00.0: Enabled LTR
1301 14:16:49.975858 PCI: 01:00.0: Programmed LTR max latencies
1302 14:16:49.982625 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1303 14:16:49.982709 PCI: 00:0d.0 scanning...
1304 14:16:49.985964 scan_static_bus for PCI: 00:0d.0
1305 14:16:49.989123 USB0 port 0 enabled
1306 14:16:49.992317 USB0 port 0 scanning...
1307 14:16:49.995963 scan_static_bus for USB0 port 0
1308 14:16:49.996046 USB3 port 0 enabled
1309 14:16:49.999285 USB3 port 1 disabled
1310 14:16:50.002488 USB3 port 2 enabled
1311 14:16:50.002571 USB3 port 3 disabled
1312 14:16:50.006358 USB3 port 0 scanning...
1313 14:16:50.009406 scan_static_bus for USB3 port 0
1314 14:16:50.012759 scan_static_bus for USB3 port 0 done
1315 14:16:50.015842 scan_bus: bus USB3 port 0 finished in 6 msecs
1316 14:16:50.019365 USB3 port 2 scanning...
1317 14:16:50.022851 scan_static_bus for USB3 port 2
1318 14:16:50.026076 scan_static_bus for USB3 port 2 done
1319 14:16:50.032601 scan_bus: bus USB3 port 2 finished in 6 msecs
1320 14:16:50.035982 scan_static_bus for USB0 port 0 done
1321 14:16:50.038928 scan_bus: bus USB0 port 0 finished in 43 msecs
1322 14:16:50.043004 scan_static_bus for PCI: 00:0d.0 done
1323 14:16:50.048948 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1324 14:16:50.049058 PCI: 00:14.0 scanning...
1325 14:16:50.052556 scan_static_bus for PCI: 00:14.0
1326 14:16:50.055936 USB0 port 0 enabled
1327 14:16:50.059423 USB0 port 0 scanning...
1328 14:16:50.062600 scan_static_bus for USB0 port 0
1329 14:16:50.062748 USB2 port 0 enabled
1330 14:16:50.065646 USB2 port 1 disabled
1331 14:16:50.068925 USB2 port 2 enabled
1332 14:16:50.069100 USB2 port 3 disabled
1333 14:16:50.072436 USB2 port 4 disabled
1334 14:16:50.075824 USB2 port 5 enabled
1335 14:16:50.075920 USB2 port 6 disabled
1336 14:16:50.079197 USB2 port 7 disabled
1337 14:16:50.082699 USB2 port 8 enabled
1338 14:16:50.082796 USB2 port 9 enabled
1339 14:16:50.086092 USB3 port 0 enabled
1340 14:16:50.086207 USB3 port 1 disabled
1341 14:16:50.089337 USB3 port 2 disabled
1342 14:16:50.092275 USB3 port 3 disabled
1343 14:16:50.092357 USB2 port 0 scanning...
1344 14:16:50.096260 scan_static_bus for USB2 port 0
1345 14:16:50.099063 scan_static_bus for USB2 port 0 done
1346 14:16:50.105547 scan_bus: bus USB2 port 0 finished in 6 msecs
1347 14:16:50.109700 USB2 port 2 scanning...
1348 14:16:50.112258 scan_static_bus for USB2 port 2
1349 14:16:50.115651 scan_static_bus for USB2 port 2 done
1350 14:16:50.119015 scan_bus: bus USB2 port 2 finished in 6 msecs
1351 14:16:50.122250 USB2 port 5 scanning...
1352 14:16:50.125764 scan_static_bus for USB2 port 5
1353 14:16:50.128790 scan_static_bus for USB2 port 5 done
1354 14:16:50.132105 scan_bus: bus USB2 port 5 finished in 6 msecs
1355 14:16:50.136195 USB2 port 8 scanning...
1356 14:16:50.138756 scan_static_bus for USB2 port 8
1357 14:16:50.142515 scan_static_bus for USB2 port 8 done
1358 14:16:50.145632 scan_bus: bus USB2 port 8 finished in 6 msecs
1359 14:16:50.148919 USB2 port 9 scanning...
1360 14:16:50.152649 scan_static_bus for USB2 port 9
1361 14:16:50.155970 scan_static_bus for USB2 port 9 done
1362 14:16:50.162171 scan_bus: bus USB2 port 9 finished in 6 msecs
1363 14:16:50.162287 USB3 port 0 scanning...
1364 14:16:50.165515 scan_static_bus for USB3 port 0
1365 14:16:50.168619 scan_static_bus for USB3 port 0 done
1366 14:16:50.175402 scan_bus: bus USB3 port 0 finished in 6 msecs
1367 14:16:50.178893 scan_static_bus for USB0 port 0 done
1368 14:16:50.182400 scan_bus: bus USB0 port 0 finished in 120 msecs
1369 14:16:50.188776 scan_static_bus for PCI: 00:14.0 done
1370 14:16:50.192206 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1371 14:16:50.195666 PCI: 00:14.3 scanning...
1372 14:16:50.198824 scan_static_bus for PCI: 00:14.3
1373 14:16:50.198966 GENERIC: 0.0 enabled
1374 14:16:50.205279 scan_static_bus for PCI: 00:14.3 done
1375 14:16:50.208697 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1376 14:16:50.212436 PCI: 00:15.0 scanning...
1377 14:16:50.215202 scan_static_bus for PCI: 00:15.0
1378 14:16:50.215277 I2C: 00:1a enabled
1379 14:16:50.219203 I2C: 00:31 enabled
1380 14:16:50.219282 I2C: 00:32 enabled
1381 14:16:50.225272 scan_static_bus for PCI: 00:15.0 done
1382 14:16:50.228859 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1383 14:16:50.232338 PCI: 00:15.1 scanning...
1384 14:16:50.235511 scan_static_bus for PCI: 00:15.1
1385 14:16:50.235625 I2C: 00:50 enabled
1386 14:16:50.239141 scan_static_bus for PCI: 00:15.1 done
1387 14:16:50.245557 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1388 14:16:50.248901 PCI: 00:15.3 scanning...
1389 14:16:50.252425 scan_static_bus for PCI: 00:15.3
1390 14:16:50.252546 I2C: 00:10 enabled
1391 14:16:50.256798 scan_static_bus for PCI: 00:15.3 done
1392 14:16:50.262783 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1393 14:16:50.265752 PCI: 00:19.1 scanning...
1394 14:16:50.268888 scan_static_bus for PCI: 00:19.1
1395 14:16:50.269136 I2C: 00:15 enabled
1396 14:16:50.272130 I2C: 00:2c enabled
1397 14:16:50.275619 scan_static_bus for PCI: 00:19.1 done
1398 14:16:50.278759 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1399 14:16:50.282153 PCI: 00:1e.3 scanning...
1400 14:16:50.285501 scan_generic_bus for PCI: 00:1e.3
1401 14:16:50.289365 SPI: 00 enabled
1402 14:16:50.292285 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1403 14:16:50.298951 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1404 14:16:50.302631 PCI: 00:1f.0 scanning...
1405 14:16:50.305586 scan_static_bus for PCI: 00:1f.0
1406 14:16:50.305922 PNP: 0c09.0 enabled
1407 14:16:50.309495 PNP: 0c09.0 scanning...
1408 14:16:50.312563 scan_static_bus for PNP: 0c09.0
1409 14:16:50.315478 scan_static_bus for PNP: 0c09.0 done
1410 14:16:50.318704 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1411 14:16:50.325438 scan_static_bus for PCI: 00:1f.0 done
1412 14:16:50.328728 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1413 14:16:50.332279 PCI: 00:1f.2 scanning...
1414 14:16:50.335693 scan_static_bus for PCI: 00:1f.2
1415 14:16:50.335775 GENERIC: 0.0 enabled
1416 14:16:50.338631 GENERIC: 0.0 scanning...
1417 14:16:50.342538 scan_static_bus for GENERIC: 0.0
1418 14:16:50.345171 GENERIC: 0.0 enabled
1419 14:16:50.348771 GENERIC: 1.0 enabled
1420 14:16:50.351796 scan_static_bus for GENERIC: 0.0 done
1421 14:16:50.355625 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1422 14:16:50.358674 scan_static_bus for PCI: 00:1f.2 done
1423 14:16:50.365656 scan_bus: bus PCI: 00:1f.2 finished in 27 msecs
1424 14:16:50.365770 PCI: 00:1f.3 scanning...
1425 14:16:50.369077 scan_static_bus for PCI: 00:1f.3
1426 14:16:50.375277 scan_static_bus for PCI: 00:1f.3 done
1427 14:16:50.378354 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1428 14:16:50.382164 PCI: 00:1f.5 scanning...
1429 14:16:50.385267 scan_generic_bus for PCI: 00:1f.5
1430 14:16:50.388905 scan_generic_bus for PCI: 00:1f.5 done
1431 14:16:50.391855 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1432 14:16:50.398716 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1433 14:16:50.401584 scan_static_bus for Root Device done
1434 14:16:50.404883 scan_bus: bus Root Device finished in 729 msecs
1435 14:16:50.408275 done
1436 14:16:50.411551 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1437 14:16:50.418630 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1438 14:16:50.424915 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1439 14:16:50.428565 SPI flash protection: WPSW=1 SRP0=0
1440 14:16:50.435255 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1441 14:16:50.438481 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1442 14:16:50.441750 found VGA at PCI: 00:02.0
1443 14:16:50.445162 Setting up VGA for PCI: 00:02.0
1444 14:16:50.451925 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1445 14:16:50.455141 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1446 14:16:50.458230 Allocating resources...
1447 14:16:50.458311 Reading resources...
1448 14:16:50.465135 Root Device read_resources bus 0 link: 0
1449 14:16:50.468179 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1450 14:16:50.475353 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1451 14:16:50.478484 DOMAIN: 0000 read_resources bus 0 link: 0
1452 14:16:50.484759 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1453 14:16:50.492089 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1454 14:16:50.495245 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1455 14:16:50.501688 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1456 14:16:50.508329 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1457 14:16:50.514896 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1458 14:16:50.521415 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1459 14:16:50.528129 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1460 14:16:50.534429 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1461 14:16:50.541244 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1462 14:16:50.548193 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1463 14:16:50.554648 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1464 14:16:50.561189 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1465 14:16:50.564425 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1466 14:16:50.570981 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1467 14:16:50.578459 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1468 14:16:50.584781 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1469 14:16:50.591001 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1470 14:16:50.598309 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1471 14:16:50.604336 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1472 14:16:50.611023 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1473 14:16:50.614314 PCI: 00:04.0 read_resources bus 1 link: 0
1474 14:16:50.617874 PCI: 00:04.0 read_resources bus 1 link: 0 done
1475 14:16:50.624629 PCI: 00:06.0 read_resources bus 1 link: 0
1476 14:16:50.628469 PCI: 00:06.0 read_resources bus 1 link: 0 done
1477 14:16:50.631668 PCI: 00:0d.0 read_resources bus 0 link: 0
1478 14:16:50.637723 USB0 port 0 read_resources bus 0 link: 0
1479 14:16:50.640881 USB0 port 0 read_resources bus 0 link: 0 done
1480 14:16:50.644178 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1481 14:16:50.650696 PCI: 00:14.0 read_resources bus 0 link: 0
1482 14:16:50.654119 USB0 port 0 read_resources bus 0 link: 0
1483 14:16:50.657915 USB0 port 0 read_resources bus 0 link: 0 done
1484 14:16:50.664340 PCI: 00:14.0 read_resources bus 0 link: 0 done
1485 14:16:50.667280 PCI: 00:14.3 read_resources bus 0 link: 0
1486 14:16:50.670998 PCI: 00:14.3 read_resources bus 0 link: 0 done
1487 14:16:50.677174 PCI: 00:15.0 read_resources bus 0 link: 0
1488 14:16:50.680700 PCI: 00:15.0 read_resources bus 0 link: 0 done
1489 14:16:50.684013 PCI: 00:15.1 read_resources bus 0 link: 0
1490 14:16:50.690788 PCI: 00:15.1 read_resources bus 0 link: 0 done
1491 14:16:50.694329 PCI: 00:15.3 read_resources bus 0 link: 0
1492 14:16:50.700712 PCI: 00:15.3 read_resources bus 0 link: 0 done
1493 14:16:50.703876 PCI: 00:19.1 read_resources bus 0 link: 0
1494 14:16:50.707644 PCI: 00:19.1 read_resources bus 0 link: 0 done
1495 14:16:50.714682 PCI: 00:1e.3 read_resources bus 2 link: 0
1496 14:16:50.717884 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1497 14:16:50.720900 PCI: 00:1f.0 read_resources bus 0 link: 0
1498 14:16:50.727343 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1499 14:16:50.730771 PCI: 00:1f.2 read_resources bus 0 link: 0
1500 14:16:50.734251 GENERIC: 0.0 read_resources bus 0 link: 0
1501 14:16:50.740772 GENERIC: 0.0 read_resources bus 0 link: 0 done
1502 14:16:50.744013 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1503 14:16:50.750421 DOMAIN: 0000 read_resources bus 0 link: 0 done
1504 14:16:50.753725 Root Device read_resources bus 0 link: 0 done
1505 14:16:50.757576 Done reading resources.
1506 14:16:50.760628 Show resources in subtree (Root Device)...After reading.
1507 14:16:50.766968 Root Device child on link 0 CPU_CLUSTER: 0
1508 14:16:50.770831 CPU_CLUSTER: 0 child on link 0 APIC: 00
1509 14:16:50.770912 APIC: 00
1510 14:16:50.774433 APIC: 1c
1511 14:16:50.774515 APIC: 1e
1512 14:16:50.777131 APIC: 18
1513 14:16:50.777211 APIC: 1a
1514 14:16:50.777275 APIC: 01
1515 14:16:50.780891 APIC: 09
1516 14:16:50.780995 APIC: 08
1517 14:16:50.784193 DOMAIN: 0000 child on link 0 GPIO: 0
1518 14:16:50.793648 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1519 14:16:50.803933 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1520 14:16:50.804015 GPIO: 0
1521 14:16:50.807314 PCI: 00:00.0
1522 14:16:50.816822 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1523 14:16:50.826765 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1524 14:16:50.833413 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1525 14:16:50.843975 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1526 14:16:50.853815 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1527 14:16:50.864008 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1528 14:16:50.873677 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1529 14:16:50.884021 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1530 14:16:50.891399 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1531 14:16:50.900387 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1532 14:16:50.910682 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1533 14:16:50.920289 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1534 14:16:50.930641 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1535 14:16:50.940291 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1536 14:16:50.947790 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1537 14:16:50.957286 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1538 14:16:50.966748 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1539 14:16:50.977105 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1540 14:16:50.986728 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1541 14:16:50.996788 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1542 14:16:51.006638 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1543 14:16:51.013397 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1544 14:16:51.023331 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1545 14:16:51.033398 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1546 14:16:51.043527 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1547 14:16:51.053326 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1548 14:16:51.063683 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1549 14:16:51.072959 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1550 14:16:51.073496 PCI: 00:02.0
1551 14:16:51.083219 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1552 14:16:51.096484 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1553 14:16:51.103496 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1554 14:16:51.106144 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1555 14:16:51.116325 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1556 14:16:51.119565 GENERIC: 0.0
1557 14:16:51.122995 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1558 14:16:51.133321 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1559 14:16:51.142833 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1560 14:16:51.153245 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1561 14:16:51.153677 PCI: 01:00.0
1562 14:16:51.163245 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1563 14:16:51.172725 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1564 14:16:51.176287 PCI: 00:08.0
1565 14:16:51.176710 PCI: 00:0a.0
1566 14:16:51.186814 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1567 14:16:51.189551 PCI: 00:0d.0 child on link 0 USB0 port 0
1568 14:16:51.199354 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1569 14:16:51.206335 USB0 port 0 child on link 0 USB3 port 0
1570 14:16:51.206877 USB3 port 0
1571 14:16:51.209717 USB3 port 1
1572 14:16:51.210312 USB3 port 2
1573 14:16:51.212618 USB3 port 3
1574 14:16:51.216129 PCI: 00:14.0 child on link 0 USB0 port 0
1575 14:16:51.226142 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1576 14:16:51.232788 USB0 port 0 child on link 0 USB2 port 0
1577 14:16:51.233353 USB2 port 0
1578 14:16:51.235771 USB2 port 1
1579 14:16:51.236298 USB2 port 2
1580 14:16:51.239523 USB2 port 3
1581 14:16:51.240093 USB2 port 4
1582 14:16:51.242929 USB2 port 5
1583 14:16:51.243498 USB2 port 6
1584 14:16:51.246027 USB2 port 7
1585 14:16:51.246464 USB2 port 8
1586 14:16:51.249489 USB2 port 9
1587 14:16:51.249927 USB3 port 0
1588 14:16:51.252832 USB3 port 1
1589 14:16:51.253460 USB3 port 2
1590 14:16:51.256153 USB3 port 3
1591 14:16:51.256591 PCI: 00:14.2
1592 14:16:51.266130 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1593 14:16:51.275829 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1594 14:16:51.282876 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1595 14:16:51.292347 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1596 14:16:51.292432 GENERIC: 0.0
1597 14:16:51.299120 PCI: 00:15.0 child on link 0 I2C: 00:1a
1598 14:16:51.309199 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1599 14:16:51.309281 I2C: 00:1a
1600 14:16:51.312034 I2C: 00:31
1601 14:16:51.312116 I2C: 00:32
1602 14:16:51.315368 PCI: 00:15.1 child on link 0 I2C: 00:50
1603 14:16:51.325335 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1604 14:16:51.328929 I2C: 00:50
1605 14:16:51.329058 PCI: 00:15.2
1606 14:16:51.335611 PCI: 00:15.3 child on link 0 I2C: 00:10
1607 14:16:51.345467 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1608 14:16:51.345567 I2C: 00:10
1609 14:16:51.349090 PCI: 00:16.0
1610 14:16:51.358937 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1611 14:16:51.359060 PCI: 00:19.0
1612 14:16:51.362478 PCI: 00:19.1 child on link 0 I2C: 00:15
1613 14:16:51.372431 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1614 14:16:51.375472 I2C: 00:15
1615 14:16:51.375569 I2C: 00:2c
1616 14:16:51.378689 PCI: 00:1e.0
1617 14:16:51.389021 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1618 14:16:51.392139 PCI: 00:1e.3 child on link 0 SPI: 00
1619 14:16:51.401989 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1620 14:16:51.405640 SPI: 00
1621 14:16:51.409144 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1622 14:16:51.418628 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1623 14:16:51.418710 PNP: 0c09.0
1624 14:16:51.428766 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1625 14:16:51.432163 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1626 14:16:51.442222 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1627 14:16:51.452064 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1628 14:16:51.456053 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1629 14:16:51.459443 GENERIC: 0.0
1630 14:16:51.459535 GENERIC: 1.0
1631 14:16:51.462068 PCI: 00:1f.3
1632 14:16:51.472520 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1633 14:16:51.482378 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1634 14:16:51.482598 PCI: 00:1f.5
1635 14:16:51.492579 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1636 14:16:51.498945 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1637 14:16:51.505927 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1638 14:16:51.512401 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1639 14:16:51.519219 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1640 14:16:51.522660 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1641 14:16:51.525580 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1642 14:16:51.532201 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1643 14:16:51.539143 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1644 14:16:51.548867 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1645 14:16:51.555945 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1646 14:16:51.562586 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1647 14:16:51.569043 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1648 14:16:51.575917 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1649 14:16:51.585737 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1650 14:16:51.589281 DOMAIN: 0000: Resource ranges:
1651 14:16:51.592275 * Base: 1000, Size: 800, Tag: 100
1652 14:16:51.595656 * Base: 1900, Size: e700, Tag: 100
1653 14:16:51.599256 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1654 14:16:51.605471 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1655 14:16:51.612249 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1656 14:16:51.622459 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1657 14:16:51.628535 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1658 14:16:51.635625 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1659 14:16:51.645609 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1660 14:16:51.651912 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1661 14:16:51.658762 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1662 14:16:51.668597 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1663 14:16:51.675057 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1664 14:16:51.682143 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1665 14:16:51.691893 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1666 14:16:51.698642 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1667 14:16:51.705367 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1668 14:16:51.715082 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1669 14:16:51.721942 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1670 14:16:51.728833 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1671 14:16:51.738558 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1672 14:16:51.745299 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1673 14:16:51.751890 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1674 14:16:51.761333 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1675 14:16:51.768338 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1676 14:16:51.775268 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1677 14:16:51.781372 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1678 14:16:51.791101 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1679 14:16:51.797851 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1680 14:16:51.807928 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1681 14:16:51.814936 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1682 14:16:51.821401 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1683 14:16:51.827635 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1684 14:16:51.837502 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1685 14:16:51.844475 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1686 14:16:51.848067 DOMAIN: 0000: Resource ranges:
1687 14:16:51.850924 * Base: 80400000, Size: 3fc00000, Tag: 200
1688 14:16:51.857795 * Base: d0000000, Size: 28000000, Tag: 200
1689 14:16:51.860694 * Base: fa000000, Size: 1000000, Tag: 200
1690 14:16:51.864379 * Base: fb001000, Size: 17ff000, Tag: 200
1691 14:16:51.870767 * Base: fe800000, Size: 300000, Tag: 200
1692 14:16:51.874012 * Base: feb80000, Size: 80000, Tag: 200
1693 14:16:51.877968 * Base: fed00000, Size: 40000, Tag: 200
1694 14:16:51.880768 * Base: fed70000, Size: 10000, Tag: 200
1695 14:16:51.887380 * Base: fed88000, Size: 8000, Tag: 200
1696 14:16:51.890754 * Base: fed93000, Size: d000, Tag: 200
1697 14:16:51.894339 * Base: feda2000, Size: 1e000, Tag: 200
1698 14:16:51.897959 * Base: fede0000, Size: 1220000, Tag: 200
1699 14:16:51.904241 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1700 14:16:51.910840 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1701 14:16:51.917137 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1702 14:16:51.924122 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1703 14:16:51.930599 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1704 14:16:51.937380 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1705 14:16:51.943702 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1706 14:16:51.950439 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1707 14:16:51.957070 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1708 14:16:51.963730 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1709 14:16:51.970310 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1710 14:16:51.976672 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1711 14:16:51.983459 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1712 14:16:51.990585 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1713 14:16:51.996677 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1714 14:16:52.003158 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1715 14:16:52.009714 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1716 14:16:52.016596 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1717 14:16:52.023076 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1718 14:16:52.029604 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1719 14:16:52.036467 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1720 14:16:52.042968 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1721 14:16:52.046693 PCI: 00:06.0: Resource ranges:
1722 14:16:52.052874 * Base: 80400000, Size: 100000, Tag: 200
1723 14:16:52.059525 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1724 14:16:52.066347 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1725 14:16:52.072725 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1726 14:16:52.079439 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1727 14:16:52.086075 Root Device assign_resources, bus 0 link: 0
1728 14:16:52.089726 DOMAIN: 0000 assign_resources, bus 0 link: 0
1729 14:16:52.099559 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1730 14:16:52.106156 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1731 14:16:52.112922 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1732 14:16:52.122636 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1733 14:16:52.126213 PCI: 00:04.0 assign_resources, bus 1 link: 0
1734 14:16:52.132828 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1735 14:16:52.139317 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1736 14:16:52.149340 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1737 14:16:52.159793 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1738 14:16:52.162595 PCI: 00:06.0 assign_resources, bus 1 link: 0
1739 14:16:52.172379 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1740 14:16:52.179926 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1741 14:16:52.182988 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1742 14:16:52.192418 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1743 14:16:52.199035 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1744 14:16:52.205804 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1745 14:16:52.209263 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1746 14:16:52.219159 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1747 14:16:52.222314 PCI: 00:14.0 assign_resources, bus 0 link: 0
1748 14:16:52.225983 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1749 14:16:52.235663 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1750 14:16:52.242576 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1751 14:16:52.252474 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1752 14:16:52.255467 PCI: 00:14.3 assign_resources, bus 0 link: 0
1753 14:16:52.258695 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1754 14:16:52.268707 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1755 14:16:52.272051 PCI: 00:15.0 assign_resources, bus 0 link: 0
1756 14:16:52.278674 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1757 14:16:52.285297 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1758 14:16:52.291793 PCI: 00:15.1 assign_resources, bus 0 link: 0
1759 14:16:52.295541 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1760 14:16:52.302091 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1761 14:16:52.308654 PCI: 00:15.3 assign_resources, bus 0 link: 0
1762 14:16:52.312340 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1763 14:16:52.321922 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1764 14:16:52.328950 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1765 14:16:52.332198 PCI: 00:19.1 assign_resources, bus 0 link: 0
1766 14:16:52.338506 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1767 14:16:52.344886 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1768 14:16:52.351692 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1769 14:16:52.355243 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1770 14:16:52.361653 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1771 14:16:52.365063 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1772 14:16:52.368357 LPC: Trying to open IO window from 800 size 1ff
1773 14:16:52.378380 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1774 14:16:52.385156 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1775 14:16:52.395641 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1776 14:16:52.398779 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1777 14:16:52.405092 Root Device assign_resources, bus 0 link: 0 done
1778 14:16:52.405410 Done setting resources.
1779 14:16:52.411535 Show resources in subtree (Root Device)...After assigning values.
1780 14:16:52.418035 Root Device child on link 0 CPU_CLUSTER: 0
1781 14:16:52.421613 CPU_CLUSTER: 0 child on link 0 APIC: 00
1782 14:16:52.421940 APIC: 00
1783 14:16:52.424951 APIC: 1c
1784 14:16:52.425340 APIC: 1e
1785 14:16:52.425607 APIC: 18
1786 14:16:52.428718 APIC: 1a
1787 14:16:52.429146 APIC: 01
1788 14:16:52.431679 APIC: 09
1789 14:16:52.432051 APIC: 08
1790 14:16:52.434946 DOMAIN: 0000 child on link 0 GPIO: 0
1791 14:16:52.445187 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1792 14:16:52.454949 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1793 14:16:52.455250 GPIO: 0
1794 14:16:52.458218 PCI: 00:00.0
1795 14:16:52.467883 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1796 14:16:52.474660 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1797 14:16:52.484918 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1798 14:16:52.494915 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1799 14:16:52.504512 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1800 14:16:52.514548 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1801 14:16:52.524550 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1802 14:16:52.530993 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1803 14:16:52.541257 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1804 14:16:52.550904 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1805 14:16:52.560943 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1806 14:16:52.570733 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1807 14:16:52.580923 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1808 14:16:52.590545 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1809 14:16:52.597309 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1810 14:16:52.607367 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1811 14:16:52.617614 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1812 14:16:52.627472 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1813 14:16:52.637336 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1814 14:16:52.647314 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1815 14:16:52.657386 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1816 14:16:52.663631 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1817 14:16:52.674001 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1818 14:16:52.683528 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1819 14:16:52.693865 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1820 14:16:52.703507 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1821 14:16:52.713302 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1822 14:16:52.723426 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1823 14:16:52.723508 PCI: 00:02.0
1824 14:16:52.736582 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1825 14:16:52.746561 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1826 14:16:52.756769 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1827 14:16:52.759696 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1828 14:16:52.769841 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1829 14:16:52.773168 GENERIC: 0.0
1830 14:16:52.776316 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1831 14:16:52.786244 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1832 14:16:52.796153 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1833 14:16:52.806735 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1834 14:16:52.809467 PCI: 01:00.0
1835 14:16:52.820150 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1836 14:16:52.829247 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1837 14:16:52.833291 PCI: 00:08.0
1838 14:16:52.833392 PCI: 00:0a.0
1839 14:16:52.842796 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1840 14:16:52.849320 PCI: 00:0d.0 child on link 0 USB0 port 0
1841 14:16:52.859638 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1842 14:16:52.862652 USB0 port 0 child on link 0 USB3 port 0
1843 14:16:52.866176 USB3 port 0
1844 14:16:52.866295 USB3 port 1
1845 14:16:52.869169 USB3 port 2
1846 14:16:52.869278 USB3 port 3
1847 14:16:52.873117 PCI: 00:14.0 child on link 0 USB0 port 0
1848 14:16:52.887223 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1849 14:16:52.889696 USB0 port 0 child on link 0 USB2 port 0
1850 14:16:52.889771 USB2 port 0
1851 14:16:52.892632 USB2 port 1
1852 14:16:52.896045 USB2 port 2
1853 14:16:52.896141 USB2 port 3
1854 14:16:52.899222 USB2 port 4
1855 14:16:52.899321 USB2 port 5
1856 14:16:52.902484 USB2 port 6
1857 14:16:52.902594 USB2 port 7
1858 14:16:52.906183 USB2 port 8
1859 14:16:52.906267 USB2 port 9
1860 14:16:52.909309 USB3 port 0
1861 14:16:52.909407 USB3 port 1
1862 14:16:52.912699 USB3 port 2
1863 14:16:52.912806 USB3 port 3
1864 14:16:52.915963 PCI: 00:14.2
1865 14:16:52.925929 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1866 14:16:52.935919 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1867 14:16:52.939327 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1868 14:16:52.953019 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1869 14:16:52.953129 GENERIC: 0.0
1870 14:16:52.956141 PCI: 00:15.0 child on link 0 I2C: 00:1a
1871 14:16:52.969389 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1872 14:16:52.969549 I2C: 00:1a
1873 14:16:52.969761 I2C: 00:31
1874 14:16:52.972627 I2C: 00:32
1875 14:16:52.975941 PCI: 00:15.1 child on link 0 I2C: 00:50
1876 14:16:52.985817 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1877 14:16:52.989387 I2C: 00:50
1878 14:16:52.989821 PCI: 00:15.2
1879 14:16:52.996010 PCI: 00:15.3 child on link 0 I2C: 00:10
1880 14:16:53.006226 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1881 14:16:53.006556 I2C: 00:10
1882 14:16:53.009460 PCI: 00:16.0
1883 14:16:53.019182 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1884 14:16:53.019508 PCI: 00:19.0
1885 14:16:53.025914 PCI: 00:19.1 child on link 0 I2C: 00:15
1886 14:16:53.035742 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1887 14:16:53.036072 I2C: 00:15
1888 14:16:53.040288 I2C: 00:2c
1889 14:16:53.040704 PCI: 00:1e.0
1890 14:16:53.052935 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1891 14:16:53.056875 PCI: 00:1e.3 child on link 0 SPI: 00
1892 14:16:53.065928 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1893 14:16:53.066477 SPI: 00
1894 14:16:53.072828 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1895 14:16:53.079390 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1896 14:16:53.082420 PNP: 0c09.0
1897 14:16:53.089388 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1898 14:16:53.095893 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1899 14:16:53.105950 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1900 14:16:53.112393 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1901 14:16:53.119346 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1902 14:16:53.119807 GENERIC: 0.0
1903 14:16:53.122506 GENERIC: 1.0
1904 14:16:53.123085 PCI: 00:1f.3
1905 14:16:53.132012 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1906 14:16:53.145837 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1907 14:16:53.146438 PCI: 00:1f.5
1908 14:16:53.155421 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1909 14:16:53.158928 Done allocating resources.
1910 14:16:53.165660 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1911 14:16:53.172178 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1912 14:16:53.175391 Configure audio over I2S with MAX98373 NAU88L25B.
1913 14:16:53.179724 Enabling BT offload
1914 14:16:53.187110 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1915 14:16:53.190210 Enabling resources...
1916 14:16:53.193835 PCI: 00:00.0 subsystem <- 8086/4609
1917 14:16:53.197340 PCI: 00:00.0 cmd <- 06
1918 14:16:53.200621 PCI: 00:02.0 subsystem <- 8086/46b3
1919 14:16:53.203570 PCI: 00:02.0 cmd <- 03
1920 14:16:53.207208 PCI: 00:04.0 subsystem <- 8086/461d
1921 14:16:53.207626 PCI: 00:04.0 cmd <- 02
1922 14:16:53.210512 PCI: 00:06.0 bridge ctrl <- 0013
1923 14:16:53.213772 PCI: 00:06.0 subsystem <- 8086/464d
1924 14:16:53.216926 PCI: 00:06.0 cmd <- 106
1925 14:16:53.220541 PCI: 00:0a.0 subsystem <- 8086/467d
1926 14:16:53.223741 PCI: 00:0a.0 cmd <- 02
1927 14:16:53.227431 PCI: 00:0d.0 subsystem <- 8086/461e
1928 14:16:53.230822 PCI: 00:0d.0 cmd <- 02
1929 14:16:53.233623 PCI: 00:14.0 subsystem <- 8086/51ed
1930 14:16:53.237418 PCI: 00:14.0 cmd <- 02
1931 14:16:53.240913 PCI: 00:14.2 subsystem <- 8086/51ef
1932 14:16:53.241381 PCI: 00:14.2 cmd <- 02
1933 14:16:53.244327 PCI: 00:14.3 subsystem <- 8086/51f0
1934 14:16:53.247559 PCI: 00:14.3 cmd <- 02
1935 14:16:53.250175 PCI: 00:15.0 subsystem <- 8086/51e8
1936 14:16:53.253888 PCI: 00:15.0 cmd <- 02
1937 14:16:53.257544 PCI: 00:15.1 subsystem <- 8086/51e9
1938 14:16:53.260441 PCI: 00:15.1 cmd <- 06
1939 14:16:53.263804 PCI: 00:15.3 subsystem <- 8086/51eb
1940 14:16:53.267248 PCI: 00:15.3 cmd <- 02
1941 14:16:53.270886 PCI: 00:16.0 subsystem <- 8086/51e0
1942 14:16:53.271414 PCI: 00:16.0 cmd <- 02
1943 14:16:53.273918 PCI: 00:19.1 subsystem <- 8086/51c6
1944 14:16:53.277941 PCI: 00:19.1 cmd <- 02
1945 14:16:53.280615 PCI: 00:1e.0 subsystem <- 8086/51a8
1946 14:16:53.283210 PCI: 00:1e.0 cmd <- 06
1947 14:16:53.287073 PCI: 00:1e.3 subsystem <- 8086/51ab
1948 14:16:53.290280 PCI: 00:1e.3 cmd <- 02
1949 14:16:53.293834 PCI: 00:1f.0 subsystem <- 8086/5182
1950 14:16:53.296840 PCI: 00:1f.0 cmd <- 407
1951 14:16:53.300113 PCI: 00:1f.3 subsystem <- 8086/51c8
1952 14:16:53.300559 PCI: 00:1f.3 cmd <- 02
1953 14:16:53.303649 PCI: 00:1f.5 subsystem <- 8086/51a4
1954 14:16:53.306720 PCI: 00:1f.5 cmd <- 406
1955 14:16:53.310509 PCI: 01:00.0 cmd <- 02
1956 14:16:53.311035 done.
1957 14:16:53.317616 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1958 14:16:53.320292 ME: Version: Unavailable
1959 14:16:53.323565 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1960 14:16:53.327638 Initializing devices...
1961 14:16:53.330015 Root Device init
1962 14:16:53.330480 mainboard: EC init
1963 14:16:53.336992 Chrome EC: Set SMI mask to 0x0000000000000000
1964 14:16:53.340266 Chrome EC: UHEPI supported
1965 14:16:53.343484 Chrome EC: clear events_b mask to 0x0000000000000000
1966 14:16:53.350944 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1967 14:16:53.357523 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1968 14:16:53.364342 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1969 14:16:53.367490 Chrome EC: Set WAKE mask to 0x0000000000000000
1970 14:16:53.373795 Root Device init finished in 39 msecs
1971 14:16:53.374418 PCI: 00:00.0 init
1972 14:16:53.377114 CPU TDP = 15 Watts
1973 14:16:53.380459 CPU PL1 = 15 Watts
1974 14:16:53.380963 CPU PL2 = 55 Watts
1975 14:16:53.383818 CPU PL4 = 123 Watts
1976 14:16:53.387219 PCI: 00:00.0 init finished in 8 msecs
1977 14:16:53.387682 PCI: 00:02.0 init
1978 14:16:53.390367 GMA: Found VBT in CBFS
1979 14:16:53.393890 GMA: Found valid VBT in CBFS
1980 14:16:53.400216 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1981 14:16:53.407072 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1982 14:16:53.410388 PCI: 00:02.0 init finished in 18 msecs
1983 14:16:53.413844 PCI: 00:06.0 init
1984 14:16:53.417632 Initializing PCH PCIe bridge.
1985 14:16:53.421022 PCI: 00:06.0 init finished in 3 msecs
1986 14:16:53.421595 PCI: 00:0a.0 init
1987 14:16:53.427060 PCI: 00:0a.0 init finished in 0 msecs
1988 14:16:53.427613 PCI: 00:14.0 init
1989 14:16:53.430091 PCI: 00:14.0 init finished in 0 msecs
1990 14:16:53.433642 PCI: 00:14.2 init
1991 14:16:53.437168 PCI: 00:14.2 init finished in 0 msecs
1992 14:16:53.440673 PCI: 00:15.0 init
1993 14:16:53.441288 I2C bus 0 version 0x3230302a
1994 14:16:53.447178 DW I2C bus 0 at 0x80655000 (400 KHz)
1995 14:16:53.450305 PCI: 00:15.0 init finished in 6 msecs
1996 14:16:53.450875 PCI: 00:15.1 init
1997 14:16:53.453934 I2C bus 1 version 0x3230302a
1998 14:16:53.456576 DW I2C bus 1 at 0x80656000 (400 KHz)
1999 14:16:53.460343 PCI: 00:15.1 init finished in 6 msecs
2000 14:16:53.463433 PCI: 00:15.3 init
2001 14:16:53.466980 I2C bus 3 version 0x3230302a
2002 14:16:53.470018 DW I2C bus 3 at 0x80657000 (400 KHz)
2003 14:16:53.473897 PCI: 00:15.3 init finished in 6 msecs
2004 14:16:53.477143 PCI: 00:16.0 init
2005 14:16:53.480107 PCI: 00:16.0 init finished in 0 msecs
2006 14:16:53.480569 PCI: 00:19.1 init
2007 14:16:53.483388 I2C bus 5 version 0x3230302a
2008 14:16:53.486892 DW I2C bus 5 at 0x80659000 (400 KHz)
2009 14:16:53.490166 PCI: 00:19.1 init finished in 6 msecs
2010 14:16:53.493980 PCI: 00:1f.0 init
2011 14:16:53.497205 IOAPIC: Initializing IOAPIC at 0xfec00000
2012 14:16:53.499978 IOAPIC: ID = 0x02
2013 14:16:53.503648 IOAPIC: Dumping registers
2014 14:16:53.504213 reg 0x0000: 0x02000000
2015 14:16:53.506865 reg 0x0001: 0x00770020
2016 14:16:53.510197 reg 0x0002: 0x00000000
2017 14:16:53.513773 IOAPIC: 120 interrupts
2018 14:16:53.517154 IOAPIC: Clearing IOAPIC at 0xfec00000
2019 14:16:53.520255 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2020 14:16:53.526855 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2021 14:16:53.530103 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2022 14:16:53.536752 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2023 14:16:53.540090 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2024 14:16:53.543917 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2025 14:16:53.550821 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2026 14:16:53.553553 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2027 14:16:53.560288 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2028 14:16:53.563715 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2029 14:16:53.570478 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2030 14:16:53.573647 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2031 14:16:53.580293 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2032 14:16:53.583069 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2033 14:16:53.586634 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2034 14:16:53.593216 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2035 14:16:53.597160 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2036 14:16:53.603639 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2037 14:16:53.606875 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2038 14:16:53.613341 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2039 14:16:53.616774 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2040 14:16:53.624144 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2041 14:16:53.626396 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2042 14:16:53.629754 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2043 14:16:53.636731 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2044 14:16:53.640131 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2045 14:16:53.646892 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2046 14:16:53.649735 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2047 14:16:53.657118 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2048 14:16:53.659879 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2049 14:16:53.666802 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2050 14:16:53.670194 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2051 14:16:53.673868 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2052 14:16:53.680073 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2053 14:16:53.683051 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2054 14:16:53.690013 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2055 14:16:53.693138 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2056 14:16:53.699923 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2057 14:16:53.703320 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2058 14:16:53.706736 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2059 14:16:53.713610 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2060 14:16:53.716804 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2061 14:16:53.723244 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2062 14:16:53.726817 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2063 14:16:53.733852 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2064 14:16:53.736777 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2065 14:16:53.743015 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2066 14:16:53.746947 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2067 14:16:53.749671 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2068 14:16:53.756772 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2069 14:16:53.760113 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2070 14:16:53.766990 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2071 14:16:53.769876 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2072 14:16:53.776304 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2073 14:16:53.779594 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2074 14:16:53.786018 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2075 14:16:53.789595 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2076 14:16:53.792814 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2077 14:16:53.799696 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2078 14:16:53.802636 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2079 14:16:53.809214 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2080 14:16:53.813231 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2081 14:16:53.819928 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2082 14:16:53.823015 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2083 14:16:53.826419 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2084 14:16:53.833098 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2085 14:16:53.837203 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2086 14:16:53.843088 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2087 14:16:53.846508 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2088 14:16:53.852598 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2089 14:16:53.856303 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2090 14:16:53.863191 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2091 14:16:53.866386 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2092 14:16:53.869667 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2093 14:16:53.876207 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2094 14:16:53.879377 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2095 14:16:53.886036 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2096 14:16:53.889524 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2097 14:16:53.896540 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2098 14:16:53.898987 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2099 14:16:53.905909 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2100 14:16:53.909460 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2101 14:16:53.912752 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2102 14:16:53.919742 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2103 14:16:53.922889 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2104 14:16:53.929267 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2105 14:16:53.932470 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2106 14:16:53.939353 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2107 14:16:53.942566 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2108 14:16:53.949040 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2109 14:16:53.953442 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2110 14:16:53.955740 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2111 14:16:53.962538 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2112 14:16:53.966016 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2113 14:16:53.972624 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2114 14:16:53.976087 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2115 14:16:53.982585 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2116 14:16:53.986035 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2117 14:16:53.989545 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2118 14:16:53.995872 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2119 14:16:53.999319 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2120 14:16:54.005746 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2121 14:16:54.009327 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2122 14:16:54.015566 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2123 14:16:54.019049 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2124 14:16:54.025842 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2125 14:16:54.028712 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2126 14:16:54.032813 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2127 14:16:54.039270 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2128 14:16:54.042105 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2129 14:16:54.049275 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2130 14:16:54.052514 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2131 14:16:54.059099 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2132 14:16:54.061801 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2133 14:16:54.068998 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2134 14:16:54.072032 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2135 14:16:54.075455 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2136 14:16:54.081914 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2137 14:16:54.085357 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2138 14:16:54.091597 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2139 14:16:54.094789 IOAPIC: Bootstrap Processor Local APIC = 0x00
2140 14:16:54.101843 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2141 14:16:54.105056 PCI: 00:1f.0 init finished in 607 msecs
2142 14:16:54.108506 PCI: 00:1f.2 init
2143 14:16:54.109158 apm_control: Disabling ACPI.
2144 14:16:54.114901 APMC done.
2145 14:16:54.118336 PCI: 00:1f.2 init finished in 7 msecs
2146 14:16:54.121956 PCI: 00:1f.3 init
2147 14:16:54.124956 PCI: 00:1f.3 init finished in 0 msecs
2148 14:16:54.125588 PCI: 01:00.0 init
2149 14:16:54.128126 PCI: 01:00.0 init finished in 0 msecs
2150 14:16:54.131398 PNP: 0c09.0 init
2151 14:16:54.134900 Google Chrome EC uptime: 12.437 seconds
2152 14:16:54.141104 Google Chrome AP resets since EC boot: 1
2153 14:16:54.144500 Google Chrome most recent AP reset causes:
2154 14:16:54.148026 0.338: 32775 shutdown: entering G3
2155 14:16:54.155262 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2156 14:16:54.158462 PNP: 0c09.0 init finished in 23 msecs
2157 14:16:54.161360 GENERIC: 0.0 init
2158 14:16:54.164811 GENERIC: 0.0 init finished in 0 msecs
2159 14:16:54.165390 GENERIC: 1.0 init
2160 14:16:54.171260 GENERIC: 1.0 init finished in 0 msecs
2161 14:16:54.171823 Devices initialized
2162 14:16:54.174404 Show all devs... After init.
2163 14:16:54.178124 Root Device: enabled 1
2164 14:16:54.181180 CPU_CLUSTER: 0: enabled 1
2165 14:16:54.181646 DOMAIN: 0000: enabled 1
2166 14:16:54.184430 GPIO: 0: enabled 1
2167 14:16:54.187675 PCI: 00:00.0: enabled 1
2168 14:16:54.188139 PCI: 00:01.0: enabled 0
2169 14:16:54.191028 PCI: 00:01.1: enabled 0
2170 14:16:54.195472 PCI: 00:02.0: enabled 1
2171 14:16:54.197619 PCI: 00:04.0: enabled 1
2172 14:16:54.198042 PCI: 00:05.0: enabled 0
2173 14:16:54.201593 PCI: 00:06.0: enabled 1
2174 14:16:54.205330 PCI: 00:06.2: enabled 0
2175 14:16:54.207703 PCI: 00:07.0: enabled 0
2176 14:16:54.208226 PCI: 00:07.1: enabled 0
2177 14:16:54.211494 PCI: 00:07.2: enabled 0
2178 14:16:54.214285 PCI: 00:07.3: enabled 0
2179 14:16:54.214707 PCI: 00:08.0: enabled 0
2180 14:16:54.217474 PCI: 00:09.0: enabled 0
2181 14:16:54.221217 PCI: 00:0a.0: enabled 1
2182 14:16:54.224509 PCI: 00:0d.0: enabled 1
2183 14:16:54.225059 PCI: 00:0d.1: enabled 0
2184 14:16:54.227685 PCI: 00:0d.2: enabled 0
2185 14:16:54.231169 PCI: 00:0d.3: enabled 0
2186 14:16:54.234740 PCI: 00:0e.0: enabled 0
2187 14:16:54.235266 PCI: 00:10.0: enabled 0
2188 14:16:54.237973 PCI: 00:10.1: enabled 0
2189 14:16:54.240727 PCI: 00:10.6: enabled 0
2190 14:16:54.244098 PCI: 00:10.7: enabled 0
2191 14:16:54.244515 PCI: 00:12.0: enabled 0
2192 14:16:54.247662 PCI: 00:12.6: enabled 0
2193 14:16:54.250760 PCI: 00:12.7: enabled 0
2194 14:16:54.254338 PCI: 00:13.0: enabled 0
2195 14:16:54.254762 PCI: 00:14.0: enabled 1
2196 14:16:54.257550 PCI: 00:14.1: enabled 0
2197 14:16:54.260753 PCI: 00:14.2: enabled 1
2198 14:16:54.264053 PCI: 00:14.3: enabled 1
2199 14:16:54.264473 PCI: 00:15.0: enabled 1
2200 14:16:54.267867 PCI: 00:15.1: enabled 1
2201 14:16:54.270993 PCI: 00:15.2: enabled 0
2202 14:16:54.271515 PCI: 00:15.3: enabled 1
2203 14:16:54.274121 PCI: 00:16.0: enabled 1
2204 14:16:54.277611 PCI: 00:16.1: enabled 0
2205 14:16:54.281652 PCI: 00:16.2: enabled 0
2206 14:16:54.282178 PCI: 00:16.3: enabled 0
2207 14:16:54.284401 PCI: 00:16.4: enabled 0
2208 14:16:54.287577 PCI: 00:16.5: enabled 0
2209 14:16:54.290316 PCI: 00:17.0: enabled 0
2210 14:16:54.290740 PCI: 00:19.0: enabled 0
2211 14:16:54.294049 PCI: 00:19.1: enabled 1
2212 14:16:54.297541 PCI: 00:19.2: enabled 0
2213 14:16:54.300949 PCI: 00:1a.0: enabled 0
2214 14:16:54.301509 PCI: 00:1c.0: enabled 0
2215 14:16:54.304066 PCI: 00:1c.1: enabled 0
2216 14:16:54.307559 PCI: 00:1c.2: enabled 0
2217 14:16:54.310787 PCI: 00:1c.3: enabled 0
2218 14:16:54.311307 PCI: 00:1c.4: enabled 0
2219 14:16:54.314007 PCI: 00:1c.5: enabled 0
2220 14:16:54.316891 PCI: 00:1c.6: enabled 0
2221 14:16:54.317355 PCI: 00:1c.7: enabled 0
2222 14:16:54.320141 PCI: 00:1d.0: enabled 0
2223 14:16:54.324037 PCI: 00:1d.1: enabled 0
2224 14:16:54.327047 PCI: 00:1d.2: enabled 0
2225 14:16:54.327662 PCI: 00:1d.3: enabled 0
2226 14:16:54.330100 PCI: 00:1e.0: enabled 1
2227 14:16:54.333665 PCI: 00:1e.1: enabled 0
2228 14:16:54.337346 PCI: 00:1e.2: enabled 0
2229 14:16:54.337764 PCI: 00:1e.3: enabled 1
2230 14:16:54.341073 PCI: 00:1f.0: enabled 1
2231 14:16:54.343423 PCI: 00:1f.1: enabled 0
2232 14:16:54.347621 PCI: 00:1f.2: enabled 1
2233 14:16:54.348147 PCI: 00:1f.3: enabled 1
2234 14:16:54.350317 PCI: 00:1f.4: enabled 0
2235 14:16:54.353457 PCI: 00:1f.5: enabled 1
2236 14:16:54.357270 PCI: 00:1f.6: enabled 0
2237 14:16:54.357792 PCI: 00:1f.7: enabled 0
2238 14:16:54.360226 GENERIC: 0.0: enabled 1
2239 14:16:54.363875 GENERIC: 0.0: enabled 1
2240 14:16:54.364400 GENERIC: 1.0: enabled 1
2241 14:16:54.367050 GENERIC: 0.0: enabled 1
2242 14:16:54.370261 GENERIC: 1.0: enabled 1
2243 14:16:54.373570 USB0 port 0: enabled 1
2244 14:16:54.374106 USB0 port 0: enabled 1
2245 14:16:54.377143 GENERIC: 0.0: enabled 1
2246 14:16:54.380499 I2C: 00:1a: enabled 1
2247 14:16:54.381072 I2C: 00:31: enabled 1
2248 14:16:54.383788 I2C: 00:32: enabled 1
2249 14:16:54.387055 I2C: 00:50: enabled 1
2250 14:16:54.387478 I2C: 00:10: enabled 1
2251 14:16:54.389829 I2C: 00:15: enabled 1
2252 14:16:54.393389 I2C: 00:2c: enabled 1
2253 14:16:54.396735 GENERIC: 0.0: enabled 1
2254 14:16:54.397294 SPI: 00: enabled 1
2255 14:16:54.400326 PNP: 0c09.0: enabled 1
2256 14:16:54.404189 GENERIC: 0.0: enabled 1
2257 14:16:54.404714 USB3 port 0: enabled 1
2258 14:16:54.406588 USB3 port 1: enabled 0
2259 14:16:54.409797 USB3 port 2: enabled 1
2260 14:16:54.410208 USB3 port 3: enabled 0
2261 14:16:54.413510 USB2 port 0: enabled 1
2262 14:16:54.416710 USB2 port 1: enabled 0
2263 14:16:54.419852 USB2 port 2: enabled 1
2264 14:16:54.420338 USB2 port 3: enabled 0
2265 14:16:54.423270 USB2 port 4: enabled 0
2266 14:16:54.426313 USB2 port 5: enabled 1
2267 14:16:54.426728 USB2 port 6: enabled 0
2268 14:16:54.430137 USB2 port 7: enabled 0
2269 14:16:54.433270 USB2 port 8: enabled 1
2270 14:16:54.433681 USB2 port 9: enabled 1
2271 14:16:54.436685 USB3 port 0: enabled 1
2272 14:16:54.439737 USB3 port 1: enabled 0
2273 14:16:54.443268 USB3 port 2: enabled 0
2274 14:16:54.443691 USB3 port 3: enabled 0
2275 14:16:54.446321 GENERIC: 0.0: enabled 1
2276 14:16:54.450046 GENERIC: 1.0: enabled 1
2277 14:16:54.450538 APIC: 00: enabled 1
2278 14:16:54.453378 APIC: 1c: enabled 1
2279 14:16:54.456298 APIC: 1e: enabled 1
2280 14:16:54.456824 APIC: 18: enabled 1
2281 14:16:54.459844 APIC: 1a: enabled 1
2282 14:16:54.462876 APIC: 01: enabled 1
2283 14:16:54.463355 APIC: 09: enabled 1
2284 14:16:54.466163 APIC: 08: enabled 1
2285 14:16:54.466727 PCI: 01:00.0: enabled 1
2286 14:16:54.472894 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2287 14:16:54.479243 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2288 14:16:54.482575 ELOG: NV offset 0xf20000 size 0x4000
2289 14:16:54.489521 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2290 14:16:54.496235 ELOG: Event(17) added with size 13 at 2024-02-05 14:16:55 UTC
2291 14:16:54.503367 ELOG: Event(9E) added with size 10 at 2024-02-05 14:16:55 UTC
2292 14:16:54.509495 ELOG: Event(9F) added with size 14 at 2024-02-05 14:16:55 UTC
2293 14:16:54.516234 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2294 14:16:54.522822 ELOG: Event(A0) added with size 9 at 2024-02-05 14:16:55 UTC
2295 14:16:54.526333 elog_add_boot_reason: Logged dev mode boot
2296 14:16:54.532691 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2297 14:16:54.532778 Finalize devices...
2298 14:16:54.535923 PCI: 00:16.0 final
2299 14:16:54.539366 PCI: 00:1f.2 final
2300 14:16:54.539451 GENERIC: 0.0 final
2301 14:16:54.545791 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2302 14:16:54.548805 GENERIC: 1.0 final
2303 14:16:54.552275 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2304 14:16:54.555543 Devices finalized
2305 14:16:54.562055 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2306 14:16:54.565501 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2307 14:16:54.572046 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2308 14:16:54.575727 ME: HFSTS1 : 0x90000245
2309 14:16:54.582058 ME: HFSTS2 : 0x82100116
2310 14:16:54.585280 ME: HFSTS3 : 0x00000050
2311 14:16:54.588646 ME: HFSTS4 : 0x00004000
2312 14:16:54.595373 ME: HFSTS5 : 0x00000000
2313 14:16:54.598961 ME: HFSTS6 : 0x40600006
2314 14:16:54.602010 ME: Manufacturing Mode : NO
2315 14:16:54.605558 ME: SPI Protection Mode Enabled : YES
2316 14:16:54.611698 ME: FPFs Committed : YES
2317 14:16:54.615027 ME: Manufacturing Vars Locked : YES
2318 14:16:54.618472 ME: FW Partition Table : OK
2319 14:16:54.621576 ME: Bringup Loader Failure : NO
2320 14:16:54.625193 ME: Firmware Init Complete : YES
2321 14:16:54.628298 ME: Boot Options Present : NO
2322 14:16:54.631703 ME: Update In Progress : NO
2323 14:16:54.635100 ME: D0i3 Support : YES
2324 14:16:54.641607 ME: Low Power State Enabled : NO
2325 14:16:54.644904 ME: CPU Replaced : YES
2326 14:16:54.648464 ME: CPU Replacement Valid : YES
2327 14:16:54.651540 ME: Current Working State : 5
2328 14:16:54.654924 ME: Current Operation State : 1
2329 14:16:54.658323 ME: Current Operation Mode : 0
2330 14:16:54.661566 ME: Error Code : 0
2331 14:16:54.665052 ME: Enhanced Debug Mode : NO
2332 14:16:54.671689 ME: CPU Debug Disabled : YES
2333 14:16:54.675432 ME: TXT Support : NO
2334 14:16:54.678419 ME: WP for RO is enabled : YES
2335 14:16:54.685641 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2336 14:16:54.687898 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2337 14:16:54.694680 Ramoops buffer: 0x100000@0x76899000.
2338 14:16:54.698050 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2339 14:16:54.707750 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2340 14:16:54.711678 CBFS: 'fallback/slic' not found.
2341 14:16:54.714775 ACPI: Writing ACPI tables at 7686d000.
2342 14:16:54.714857 ACPI: * FACS
2343 14:16:54.718528 ACPI: * DSDT
2344 14:16:54.724519 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2345 14:16:54.727914 ACPI: * FADT
2346 14:16:54.727995 SCI is IRQ9
2347 14:16:54.731381 ACPI: added table 1/32, length now 40
2348 14:16:54.734504 ACPI: * SSDT
2349 14:16:54.741193 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2350 14:16:54.744496 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2351 14:16:54.751098 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2352 14:16:54.754373 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2353 14:16:54.761333 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2354 14:16:54.764671 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2355 14:16:54.771710 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2356 14:16:54.777568 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2357 14:16:54.781190 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2358 14:16:54.784409 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2359 14:16:54.791325 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2360 14:16:54.797511 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2361 14:16:54.801067 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2362 14:16:54.804563 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2363 14:16:54.812923 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2364 14:16:54.816057 PS2K: Passing 80 keymaps to kernel
2365 14:16:54.822890 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2366 14:16:54.829673 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2367 14:16:54.836302 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2368 14:16:54.842446 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2369 14:16:54.849174 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2370 14:16:54.855954 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2371 14:16:54.859231 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2372 14:16:54.866004 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2373 14:16:54.872559 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2374 14:16:54.879894 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2375 14:16:54.882960 ACPI: added table 2/32, length now 44
2376 14:16:54.885966 ACPI: * MCFG
2377 14:16:54.889368 ACPI: added table 3/32, length now 48
2378 14:16:54.889445 ACPI: * TPM2
2379 14:16:54.892866 TPM2 log created at 0x7685d000
2380 14:16:54.895953 ACPI: added table 4/32, length now 52
2381 14:16:54.899379 ACPI: * LPIT
2382 14:16:54.902616 ACPI: added table 5/32, length now 56
2383 14:16:54.905584 ACPI: * MADT
2384 14:16:54.905665 SCI is IRQ9
2385 14:16:54.909151 ACPI: added table 6/32, length now 60
2386 14:16:54.912784 cmd_reg from pmc_make_ipc_cmd 1052838
2387 14:16:54.919214 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2388 14:16:54.925837 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2389 14:16:54.932590 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2390 14:16:54.935824 PMC CrashLog size in discovery mode: 0xC00
2391 14:16:54.939029 cpu crashlog bar addr: 0x80640000
2392 14:16:54.943133 cpu discovery table offset: 0x6030
2393 14:16:54.949248 cpu_crashlog_discovery_table buffer count: 0x3
2394 14:16:54.955749 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2395 14:16:54.962943 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2396 14:16:54.968860 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2397 14:16:54.972418 PMC crashLog size in discovery mode : 0xC00
2398 14:16:54.978877 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2399 14:16:54.985659 discover mode PMC crashlog size adjusted to: 0x200
2400 14:16:54.992296 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2401 14:16:54.995555 discover mode PMC crashlog size adjusted to: 0x0
2402 14:16:54.998820 m_cpu_crashLog_size : 0x3480 bytes
2403 14:16:55.002261 CPU crashLog present.
2404 14:16:55.005585 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2405 14:16:55.012429 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2406 14:16:55.015564 current = 76876550
2407 14:16:55.019123 ACPI: * DMAR
2408 14:16:55.022199 ACPI: added table 7/32, length now 64
2409 14:16:55.025392 ACPI: added table 8/32, length now 68
2410 14:16:55.025473 ACPI: * HPET
2411 14:16:55.028758 ACPI: added table 9/32, length now 72
2412 14:16:55.032039 ACPI: done.
2413 14:16:55.035264 ACPI tables: 38528 bytes.
2414 14:16:55.038844 smbios_write_tables: 76857000
2415 14:16:55.042427 EC returned error result code 3
2416 14:16:55.045921 Couldn't obtain OEM name from CBI
2417 14:16:55.049078 Create SMBIOS type 16
2418 14:16:55.049159 Create SMBIOS type 17
2419 14:16:55.052512 Create SMBIOS type 20
2420 14:16:55.055454 GENERIC: 0.0 (WIFI Device)
2421 14:16:55.058823 SMBIOS tables: 2156 bytes.
2422 14:16:55.062524 Writing table forward entry at 0x00000500
2423 14:16:55.069081 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2424 14:16:55.072380 Writing coreboot table at 0x76891000
2425 14:16:55.078993 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2426 14:16:55.081975 1. 0000000000001000-000000000009ffff: RAM
2427 14:16:55.085152 2. 00000000000a0000-00000000000fffff: RESERVED
2428 14:16:55.091838 3. 0000000000100000-0000000076856fff: RAM
2429 14:16:55.098570 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2430 14:16:55.102017 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2431 14:16:55.108685 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2432 14:16:55.112460 7. 0000000077000000-00000000803fffff: RESERVED
2433 14:16:55.118751 8. 00000000c0000000-00000000cfffffff: RESERVED
2434 14:16:55.121960 9. 00000000f8000000-00000000f9ffffff: RESERVED
2435 14:16:55.128329 10. 00000000fb000000-00000000fb000fff: RESERVED
2436 14:16:55.131792 11. 00000000fc800000-00000000fe7fffff: RESERVED
2437 14:16:55.135350 12. 00000000feb00000-00000000feb7ffff: RESERVED
2438 14:16:55.142458 13. 00000000fec00000-00000000fecfffff: RESERVED
2439 14:16:55.145204 14. 00000000fed40000-00000000fed6ffff: RESERVED
2440 14:16:55.151754 15. 00000000fed80000-00000000fed87fff: RESERVED
2441 14:16:55.155220 16. 00000000fed90000-00000000fed92fff: RESERVED
2442 14:16:55.161956 17. 00000000feda0000-00000000feda1fff: RESERVED
2443 14:16:55.165319 18. 00000000fedc0000-00000000feddffff: RESERVED
2444 14:16:55.168492 19. 0000000100000000-000000027fbfffff: RAM
2445 14:16:55.171893 Passing 4 GPIOs to payload:
2446 14:16:55.178209 NAME | PORT | POLARITY | VALUE
2447 14:16:55.181761 lid | undefined | high | high
2448 14:16:55.188079 power | undefined | high | low
2449 14:16:55.195099 oprom | undefined | high | low
2450 14:16:55.198607 EC in RW | 0x00000151 | high | high
2451 14:16:55.201789 Board ID: 3
2452 14:16:55.201914 FW config: 0x131
2453 14:16:55.208311 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 864f
2454 14:16:55.211769 coreboot table: 1788 bytes.
2455 14:16:55.215087 IMD ROOT 0. 0x76fff000 0x00001000
2456 14:16:55.218341 IMD SMALL 1. 0x76ffe000 0x00001000
2457 14:16:55.221538 FSP MEMORY 2. 0x76afe000 0x00500000
2458 14:16:55.225167 CONSOLE 3. 0x76ade000 0x00020000
2459 14:16:55.228813 RW MCACHE 4. 0x76add000 0x0000043c
2460 14:16:55.234863 RO MCACHE 5. 0x76adc000 0x00000fd8
2461 14:16:55.238799 FMAP 6. 0x76adb000 0x0000064a
2462 14:16:55.241889 TIME STAMP 7. 0x76ada000 0x00000910
2463 14:16:55.245384 VBOOT WORK 8. 0x76ac6000 0x00014000
2464 14:16:55.248625 MEM INFO 9. 0x76ac5000 0x000003b8
2465 14:16:55.252186 ROMSTG STCK10. 0x76ac4000 0x00001000
2466 14:16:55.255394 AFTER CAR 11. 0x76ab8000 0x0000c000
2467 14:16:55.258499 RAMSTAGE 12. 0x76a2e000 0x0008a000
2468 14:16:55.261782 ACPI BERT 13. 0x76a1e000 0x00010000
2469 14:16:55.268803 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2470 14:16:55.271585 REFCODE 15. 0x769ae000 0x0006f000
2471 14:16:55.274965 SMM BACKUP 16. 0x7699e000 0x00010000
2472 14:16:55.278705 IGD OPREGION17. 0x76999000 0x00004203
2473 14:16:55.281753 RAMOOPS 18. 0x76899000 0x00100000
2474 14:16:55.285317 COREBOOT 19. 0x76891000 0x00008000
2475 14:16:55.288433 ACPI 20. 0x7686d000 0x00024000
2476 14:16:55.292376 TPM2 TCGLOG21. 0x7685d000 0x00010000
2477 14:16:55.298331 PMC CRASHLOG22. 0x7685c000 0x00000c00
2478 14:16:55.301890 CPU CRASHLOG23. 0x76858000 0x00003480
2479 14:16:55.305033 SMBIOS 24. 0x76857000 0x00001000
2480 14:16:55.305115 IMD small region:
2481 14:16:55.312081 IMD ROOT 0. 0x76ffec00 0x00000400
2482 14:16:55.315249 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2483 14:16:55.318474 VPD 2. 0x76ffeb60 0x0000006c
2484 14:16:55.321792 POWER STATE 3. 0x76ffeb00 0x00000044
2485 14:16:55.325318 ROMSTAGE 4. 0x76ffeae0 0x00000004
2486 14:16:55.329425 ACPI GNVS 5. 0x76ffea80 0x00000048
2487 14:16:55.335266 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2488 14:16:55.338689 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2489 14:16:55.342102 MTRR: Physical address space:
2490 14:16:55.348728 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2491 14:16:55.355160 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2492 14:16:55.361564 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2493 14:16:55.368572 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2494 14:16:55.375318 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2495 14:16:55.381406 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2496 14:16:55.388935 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2497 14:16:55.391629 MTRR: Fixed MSR 0x250 0x0606060606060606
2498 14:16:55.395203 MTRR: Fixed MSR 0x258 0x0606060606060606
2499 14:16:55.398850 MTRR: Fixed MSR 0x259 0x0000000000000000
2500 14:16:55.401760 MTRR: Fixed MSR 0x268 0x0606060606060606
2501 14:16:55.408407 MTRR: Fixed MSR 0x269 0x0606060606060606
2502 14:16:55.411378 MTRR: Fixed MSR 0x26a 0x0606060606060606
2503 14:16:55.415109 MTRR: Fixed MSR 0x26b 0x0606060606060606
2504 14:16:55.418280 MTRR: Fixed MSR 0x26c 0x0606060606060606
2505 14:16:55.425033 MTRR: Fixed MSR 0x26d 0x0606060606060606
2506 14:16:55.428079 MTRR: Fixed MSR 0x26e 0x0606060606060606
2507 14:16:55.431445 MTRR: Fixed MSR 0x26f 0x0606060606060606
2508 14:16:55.435562 call enable_fixed_mtrr()
2509 14:16:55.438439 CPU physical address size: 39 bits
2510 14:16:55.444961 MTRR: default type WB/UC MTRR counts: 6/6.
2511 14:16:55.448341 MTRR: UC selected as default type.
2512 14:16:55.454885 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2513 14:16:55.458159 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2514 14:16:55.464794 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2515 14:16:55.471800 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2516 14:16:55.477998 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2517 14:16:55.484733 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2518 14:16:55.491792 MTRR: Fixed MSR 0x250 0x0606060606060606
2519 14:16:55.494724 MTRR: Fixed MSR 0x258 0x0606060606060606
2520 14:16:55.497834 MTRR: Fixed MSR 0x259 0x0000000000000000
2521 14:16:55.501499 MTRR: Fixed MSR 0x268 0x0606060606060606
2522 14:16:55.508017 MTRR: Fixed MSR 0x269 0x0606060606060606
2523 14:16:55.511176 MTRR: Fixed MSR 0x26a 0x0606060606060606
2524 14:16:55.514812 MTRR: Fixed MSR 0x26b 0x0606060606060606
2525 14:16:55.517976 MTRR: Fixed MSR 0x26c 0x0606060606060606
2526 14:16:55.524440 MTRR: Fixed MSR 0x26d 0x0606060606060606
2527 14:16:55.527759 MTRR: Fixed MSR 0x26e 0x0606060606060606
2528 14:16:55.531075 MTRR: Fixed MSR 0x26f 0x0606060606060606
2529 14:16:55.534427 MTRR: Fixed MSR 0x250 0x0606060606060606
2530 14:16:55.537561 call enable_fixed_mtrr()
2531 14:16:55.541137 MTRR: Fixed MSR 0x250 0x0606060606060606
2532 14:16:55.544378 CPU physical address size: 39 bits
2533 14:16:55.550784 MTRR: Fixed MSR 0x258 0x0606060606060606
2534 14:16:55.554233 MTRR: Fixed MSR 0x250 0x0606060606060606
2535 14:16:55.557567 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 14:16:55.561190 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 14:16:55.567603 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 14:16:55.570653 MTRR: Fixed MSR 0x269 0x0606060606060606
2539 14:16:55.573858 MTRR: Fixed MSR 0x250 0x0606060606060606
2540 14:16:55.577854 MTRR: Fixed MSR 0x259 0x0000000000000000
2541 14:16:55.583832 MTRR: Fixed MSR 0x268 0x0606060606060606
2542 14:16:55.587461 MTRR: Fixed MSR 0x269 0x0606060606060606
2543 14:16:55.590846 MTRR: Fixed MSR 0x258 0x0606060606060606
2544 14:16:55.594070 MTRR: Fixed MSR 0x26a 0x0606060606060606
2545 14:16:55.597363 MTRR: Fixed MSR 0x26b 0x0606060606060606
2546 14:16:55.603824 MTRR: Fixed MSR 0x26c 0x0606060606060606
2547 14:16:55.607144 MTRR: Fixed MSR 0x26d 0x0606060606060606
2548 14:16:55.610485 MTRR: Fixed MSR 0x26e 0x0606060606060606
2549 14:16:55.614228 MTRR: Fixed MSR 0x26f 0x0606060606060606
2550 14:16:55.620658 MTRR: Fixed MSR 0x250 0x0606060606060606
2551 14:16:55.624456 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 14:16:55.627207 call enable_fixed_mtrr()
2553 14:16:55.630518 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 14:16:55.633809 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 14:16:55.637199 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 14:16:55.643724 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 14:16:55.646728 MTRR: Fixed MSR 0x259 0x0000000000000000
2558 14:16:55.650375 CPU physical address size: 39 bits
2559 14:16:55.653494 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 14:16:55.657225 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 14:16:55.663555 MTRR: Fixed MSR 0x268 0x0606060606060606
2562 14:16:55.667093 MTRR: Fixed MSR 0x26c 0x0606060606060606
2563 14:16:55.670323 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 14:16:55.673695 MTRR: Fixed MSR 0x26e 0x0606060606060606
2565 14:16:55.680232 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 14:16:55.683616 MTRR: Fixed MSR 0x269 0x0606060606060606
2567 14:16:55.686892 MTRR: Fixed MSR 0x26a 0x0606060606060606
2568 14:16:55.690033 MTRR: Fixed MSR 0x26b 0x0606060606060606
2569 14:16:55.693546 MTRR: Fixed MSR 0x26c 0x0606060606060606
2570 14:16:55.700033 MTRR: Fixed MSR 0x26d 0x0606060606060606
2571 14:16:55.703296 MTRR: Fixed MSR 0x26e 0x0606060606060606
2572 14:16:55.706605 MTRR: Fixed MSR 0x26f 0x0606060606060606
2573 14:16:55.709917 call enable_fixed_mtrr()
2574 14:16:55.713611 call enable_fixed_mtrr()
2575 14:16:55.716735 MTRR: Fixed MSR 0x26b 0x0606060606060606
2576 14:16:55.719957 CPU physical address size: 39 bits
2577 14:16:55.723157 CPU physical address size: 39 bits
2578 14:16:55.726705 MTRR: Fixed MSR 0x26c 0x0606060606060606
2579 14:16:55.733372 MTRR: Fixed MSR 0x258 0x0606060606060606
2580 14:16:55.736579 MTRR: Fixed MSR 0x250 0x0606060606060606
2581 14:16:55.739782 MTRR: Fixed MSR 0x26d 0x0606060606060606
2582 14:16:55.743179 MTRR: Fixed MSR 0x26e 0x0606060606060606
2583 14:16:55.746607 MTRR: Fixed MSR 0x26f 0x0606060606060606
2584 14:16:55.753389 MTRR: Fixed MSR 0x258 0x0606060606060606
2585 14:16:55.753467 call enable_fixed_mtrr()
2586 14:16:55.760194 MTRR: Fixed MSR 0x259 0x0000000000000000
2587 14:16:55.762903 MTRR: Fixed MSR 0x268 0x0606060606060606
2588 14:16:55.766369 MTRR: Fixed MSR 0x269 0x0606060606060606
2589 14:16:55.769918 CPU physical address size: 39 bits
2590 14:16:55.773268 MTRR: Fixed MSR 0x26a 0x0606060606060606
2591 14:16:55.779816 MTRR: Fixed MSR 0x259 0x0000000000000000
2592 14:16:55.783039 MTRR: Fixed MSR 0x26b 0x0606060606060606
2593 14:16:55.786068 MTRR: Fixed MSR 0x26c 0x0606060606060606
2594 14:16:55.789666 MTRR: Fixed MSR 0x26d 0x0606060606060606
2595 14:16:55.796540 MTRR: Fixed MSR 0x26e 0x0606060606060606
2596 14:16:55.799312 MTRR: Fixed MSR 0x26f 0x0606060606060606
2597 14:16:55.803089 MTRR: Fixed MSR 0x268 0x0606060606060606
2598 14:16:55.806346 call enable_fixed_mtrr()
2599 14:16:55.809556 MTRR: Fixed MSR 0x269 0x0606060606060606
2600 14:16:55.812810 CPU physical address size: 39 bits
2601 14:16:55.819756 MTRR: Fixed MSR 0x26a 0x0606060606060606
2602 14:16:55.822909 MTRR: Fixed MSR 0x26b 0x0606060606060606
2603 14:16:55.826031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2604 14:16:55.832687 MTRR: Fixed MSR 0x26d 0x0606060606060606
2605 14:16:55.836054 MTRR: Fixed MSR 0x26e 0x0606060606060606
2606 14:16:55.839657 MTRR: Fixed MSR 0x26f 0x0606060606060606
2607 14:16:55.843749 call enable_fixed_mtrr()
2608 14:16:55.846479 CPU physical address size: 39 bits
2609 14:16:55.850384
2610 14:16:55.850472 MTRR check
2611 14:16:55.853758 Fixed MTRRs : Enabled
2612 14:16:55.853835 Variable MTRRs: Enabled
2613 14:16:55.853898
2614 14:16:55.860166 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2615 14:16:55.864044 Checking cr50 for pending updates
2616 14:16:55.875845 Reading cr50 TPM mode
2617 14:16:55.891118 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2618 14:16:55.901294 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2619 14:16:55.904314 Checking segment from ROM address 0xf96cbe6c
2620 14:16:55.907920 Checking segment from ROM address 0xf96cbe88
2621 14:16:55.914575 Loading segment from ROM address 0xf96cbe6c
2622 14:16:55.914675 code (compression=1)
2623 14:16:55.924371 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2624 14:16:55.931277 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2625 14:16:55.934456 using LZMA
2626 14:16:55.956525 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2627 14:16:55.963092 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2628 14:16:55.971455 Loading segment from ROM address 0xf96cbe88
2629 14:16:55.974889 Entry Point 0x30000000
2630 14:16:55.974988 Loaded segments
2631 14:16:55.981897 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2632 14:16:55.988101 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2633 14:16:55.991539 Finalizing chipset.
2634 14:16:55.991641 apm_control: Finalizing SMM.
2635 14:16:55.994907 APMC done.
2636 14:16:55.998576 HECI: CSE device 16.1 is disabled
2637 14:16:56.001410 HECI: CSE device 16.2 is disabled
2638 14:16:56.005085 HECI: CSE device 16.3 is disabled
2639 14:16:56.008114 HECI: CSE device 16.4 is disabled
2640 14:16:56.011642 HECI: CSE device 16.5 is disabled
2641 14:16:56.014994 HECI: Sending End-of-Post
2642 14:16:56.023021 CSE: EOP requested action: continue boot
2643 14:16:56.026137 CSE EOP successful, continuing boot
2644 14:16:56.032981 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2645 14:16:56.036646 mp_park_aps done after 0 msecs.
2646 14:16:56.039567 Jumping to boot code at 0x30000000(0x76891000)
2647 14:16:56.049660 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2648 14:16:56.054411
2649 14:16:56.054512
2650 14:16:56.054604
2651 14:16:56.057272 Starting depthcharge on Volmar...
2652 14:16:56.057343
2653 14:16:56.057823 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2654 14:16:56.057943 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2655 14:16:56.058024 Setting prompt string to ['brya:']
2656 14:16:56.058141 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:40)
2657 14:16:56.064000 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2658 14:16:56.064101
2659 14:16:56.070214 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2660 14:16:56.070287
2661 14:16:56.076832 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2662 14:16:56.076950
2663 14:16:56.080358 configure_storage: Failed to remap 1C:2
2664 14:16:56.080430
2665 14:16:56.084131 Wipe memory regions:
2666 14:16:56.084235
2667 14:16:56.087204 [0x00000000001000, 0x000000000a0000)
2668 14:16:56.087285
2669 14:16:56.090174 [0x00000000100000, 0x00000030000000)
2670 14:16:56.199695
2671 14:16:56.203019 [0x00000032668e60, 0x00000076857000)
2672 14:16:56.354872
2673 14:16:56.358001 [0x00000100000000, 0x0000027fc00000)
2674 14:16:57.214030
2675 14:16:57.217284 ec_init: CrosEC protocol v3 supported (256, 256)
2676 14:16:57.824811
2677 14:16:57.825004 R8152: Initializing
2678 14:16:57.825091
2679 14:16:57.828239 Version 9 (ocp_data = 6010)
2680 14:16:57.828311
2681 14:16:57.831356 R8152: Done initializing
2682 14:16:57.831457
2683 14:16:57.835279 Adding net device
2684 14:16:58.135732
2685 14:16:58.138724 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2686 14:16:58.138810
2687 14:16:58.138880
2688 14:16:58.138941
2689 14:16:58.139224 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2691 14:16:58.239539 brya: tftpboot 192.168.201.1 12704088/tftp-deploy-l8j5eka7/kernel/bzImage 12704088/tftp-deploy-l8j5eka7/kernel/cmdline 12704088/tftp-deploy-l8j5eka7/ramdisk/ramdisk.cpio.gz
2692 14:16:58.239836 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2693 14:16:58.239944 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2694 14:16:58.244163 tftpboot 192.168.201.1 12704088/tftp-deploy-l8j5eka7/kernel/bzImploy-l8j5eka7/kernel/cmdline 12704088/tftp-deploy-l8j5eka7/ramdisk/ramdisk.cpio.gz
2695 14:16:58.244273
2696 14:16:58.244366 Waiting for link
2697 14:16:58.447061
2698 14:16:58.447208 done.
2699 14:16:58.447312
2700 14:16:58.447403 MAC: 00:e0:4c:68:05:c6
2701 14:16:58.447502
2702 14:16:58.450217 Sending DHCP discover... done.
2703 14:16:58.450329
2704 14:16:58.453496 Waiting for reply... done.
2705 14:16:58.453569
2706 14:16:58.456845 Sending DHCP request... done.
2707 14:16:58.456945
2708 14:16:58.459807 Waiting for reply... done.
2709 14:16:58.459915
2710 14:16:58.463294 My ip is 192.168.201.17
2711 14:16:58.463394
2712 14:16:58.466595 The DHCP server ip is 192.168.201.1
2713 14:16:58.466692
2714 14:16:58.473228 TFTP server IP predefined by user: 192.168.201.1
2715 14:16:58.473303
2716 14:16:58.479942 Bootfile predefined by user: 12704088/tftp-deploy-l8j5eka7/kernel/bzImage
2717 14:16:58.480035
2718 14:16:58.484137 Sending tftp read request... done.
2719 14:16:58.484215
2720 14:16:58.486707 Waiting for the transfer...
2721 14:16:58.486808
2722 14:16:58.736426 00000000 ################################################################
2723 14:16:58.736555
2724 14:16:58.984100 00080000 ################################################################
2725 14:16:58.984268
2726 14:16:59.234132 00100000 ################################################################
2727 14:16:59.234265
2728 14:16:59.484210 00180000 ################################################################
2729 14:16:59.484344
2730 14:16:59.737330 00200000 ################################################################
2731 14:16:59.737460
2732 14:16:59.981765 00280000 ################################################################
2733 14:16:59.981897
2734 14:17:00.234247 00300000 ################################################################
2735 14:17:00.234410
2736 14:17:00.478046 00380000 ################################################################
2737 14:17:00.478217
2738 14:17:00.726008 00400000 ################################################################
2739 14:17:00.726156
2740 14:17:00.980543 00480000 ################################################################
2741 14:17:00.980685
2742 14:17:01.230375 00500000 ################################################################
2743 14:17:01.230527
2744 14:17:01.473774 00580000 ################################################################
2745 14:17:01.473920
2746 14:17:01.719802 00600000 ################################################################
2747 14:17:01.719974
2748 14:17:01.964888 00680000 ################################################################
2749 14:17:01.965095
2750 14:17:02.227197 00700000 ################################################################
2751 14:17:02.227362
2752 14:17:02.476067 00780000 ################################################################
2753 14:17:02.476198
2754 14:17:02.726588 00800000 ################################################################
2755 14:17:02.726724
2756 14:17:02.978475 00880000 ################################################################
2757 14:17:02.978612
2758 14:17:03.231329 00900000 ################################################################
2759 14:17:03.231460
2760 14:17:03.485468 00980000 ################################################################
2761 14:17:03.485603
2762 14:17:03.732943 00a00000 ################################################################
2763 14:17:03.733112
2764 14:17:03.982905 00a80000 ################################################################
2765 14:17:03.983043
2766 14:17:04.230808 00b00000 ################################################################
2767 14:17:04.230937
2768 14:17:04.484357 00b80000 ################################################################
2769 14:17:04.484485
2770 14:17:04.733807 00c00000 ################################################################
2771 14:17:04.733933
2772 14:17:05.001320 00c80000 ################################################################
2773 14:17:05.001462
2774 14:17:05.234793 00d00000 ############################################################# done.
2775 14:17:05.234919
2776 14:17:05.241621 The bootfile was 14127264 bytes long.
2777 14:17:05.242191
2778 14:17:05.245008 Sending tftp read request... done.
2779 14:17:05.245485
2780 14:17:05.248940 Waiting for the transfer...
2781 14:17:05.249441
2782 14:17:05.672258 00000000 ################################################################
2783 14:17:05.672392
2784 14:17:05.932961 00080000 ################################################################
2785 14:17:05.933116
2786 14:17:06.180220 00100000 ################################################################
2787 14:17:06.180377
2788 14:17:06.428489 00180000 ################################################################
2789 14:17:06.428641
2790 14:17:06.677067 00200000 ################################################################
2791 14:17:06.677222
2792 14:17:06.924598 00280000 ################################################################
2793 14:17:06.924747
2794 14:17:07.160432 00300000 ################################################################
2795 14:17:07.160568
2796 14:17:07.394222 00380000 ################################################################
2797 14:17:07.394359
2798 14:17:07.627901 00400000 ################################################################
2799 14:17:07.628040
2800 14:17:07.873463 00480000 ################################################################
2801 14:17:07.873602
2802 14:17:08.122071 00500000 ################################################################
2803 14:17:08.122207
2804 14:17:08.331543 00580000 ####################################################### done.
2805 14:17:08.334568
2806 14:17:08.337947 Sending tftp read request... done.
2807 14:17:08.338031
2808 14:17:08.338097 Waiting for the transfer...
2809 14:17:08.338160
2810 14:17:08.341627 00000000 # done.
2811 14:17:08.341712
2812 14:17:08.350939 Command line loaded dynamically from TFTP file: 12704088/tftp-deploy-l8j5eka7/kernel/cmdline
2813 14:17:08.351023
2814 14:17:08.374379 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12704088/extract-nfsrootfs-uvehhz6u,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2815 14:17:08.380554
2816 14:17:08.383862 Shutting down all USB controllers.
2817 14:17:08.383977
2818 14:17:08.384073 Removing current net device
2819 14:17:08.384163
2820 14:17:08.387203 Finalizing coreboot
2821 14:17:08.387317
2822 14:17:08.394121 Exiting depthcharge with code 4 at timestamp: 22584865
2823 14:17:08.394228
2824 14:17:08.394321
2825 14:17:08.394411 Starting kernel ...
2826 14:17:08.394497
2827 14:17:08.394583
2828 14:17:08.394989 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2829 14:17:08.395086 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2830 14:17:08.395161 Setting prompt string to ['Linux version [0-9]']
2831 14:17:08.395230 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2832 14:17:08.395296 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2834 14:21:36.396001 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2836 14:21:36.397140 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2838 14:21:36.397975 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2841 14:21:36.399380 end: 2 depthcharge-action (duration 00:05:00) [common]
2843 14:21:36.400486 Cleaning after the job
2844 14:21:36.400580 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/ramdisk
2845 14:21:36.401655 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/kernel
2846 14:21:36.403733 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/nfsrootfs
2847 14:21:36.481208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704088/tftp-deploy-l8j5eka7/modules
2848 14:21:36.481922 start: 5.1 power-off (timeout 00:00:30) [common]
2849 14:21:36.482096 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2850 14:21:36.559672 >> Command sent successfully.
2851 14:21:36.564697 Returned 0 in 0 seconds
2852 14:21:36.665717 end: 5.1 power-off (duration 00:00:00) [common]
2854 14:21:36.667231 start: 5.2 read-feedback (timeout 00:10:00) [common]
2855 14:21:36.668721 Listened to connection for namespace 'common' for up to 1s
2857 14:21:36.670329 Listened to connection for namespace 'common' for up to 1s
2858 14:21:37.669309 Finalising connection for namespace 'common'
2859 14:21:37.669991 Disconnecting from shell: Finalise
2860 14:21:37.670453
2861 14:21:37.771579 end: 5.2 read-feedback (duration 00:00:01) [common]
2862 14:21:37.772227 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12704088
2863 14:21:38.129760 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12704088
2864 14:21:38.129957 JobError: Your job cannot terminate cleanly.