Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 17:48:48.937119 lava-dispatcher, installed at version: 2024.01
2 17:48:48.937329 start: 0 validate
3 17:48:48.937457 Start time: 2024-03-19 17:48:48.937449+00:00 (UTC)
4 17:48:48.937586 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:48:48.937710 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 17:48:49.198730 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:48:49.199452 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.212-cip45-3-g37b1c10dc5722%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:48:49.461583 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:48:49.462403 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.212-cip45-3-g37b1c10dc5722%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 17:49:05.949379 validate duration: 17.01
12 17:49:05.949671 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:49:05.949768 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:49:05.949857 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:49:05.949970 Not decompressing ramdisk as can be used compressed.
16 17:49:05.950051 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 17:49:05.950112 saving as /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/ramdisk/rootfs.cpio.gz
18 17:49:05.950172 total size: 8417901 (8 MB)
19 17:49:07.136500 progress 0 % (0 MB)
20 17:49:07.142125 progress 5 % (0 MB)
21 17:49:07.144444 progress 10 % (0 MB)
22 17:49:07.146721 progress 15 % (1 MB)
23 17:49:07.148998 progress 20 % (1 MB)
24 17:49:07.151200 progress 25 % (2 MB)
25 17:49:07.153495 progress 30 % (2 MB)
26 17:49:07.155534 progress 35 % (2 MB)
27 17:49:07.157769 progress 40 % (3 MB)
28 17:49:07.159967 progress 45 % (3 MB)
29 17:49:07.162214 progress 50 % (4 MB)
30 17:49:07.164437 progress 55 % (4 MB)
31 17:49:07.166600 progress 60 % (4 MB)
32 17:49:07.168620 progress 65 % (5 MB)
33 17:49:07.170721 progress 70 % (5 MB)
34 17:49:07.172891 progress 75 % (6 MB)
35 17:49:07.175038 progress 80 % (6 MB)
36 17:49:07.177209 progress 85 % (6 MB)
37 17:49:07.179370 progress 90 % (7 MB)
38 17:49:07.181528 progress 95 % (7 MB)
39 17:49:07.183574 progress 100 % (8 MB)
40 17:49:07.183801 8 MB downloaded in 1.23 s (6.51 MB/s)
41 17:49:07.183955 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:49:07.184194 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:49:07.184301 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:49:07.184400 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:49:07.184523 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.212-cip45-3-g37b1c10dc5722/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 17:49:07.184595 saving as /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/kernel/bzImage
48 17:49:07.184658 total size: 19621344 (18 MB)
49 17:49:07.184720 No compression specified
50 17:49:07.185788 progress 0 % (0 MB)
51 17:49:07.190858 progress 5 % (0 MB)
52 17:49:07.195808 progress 10 % (1 MB)
53 17:49:07.200746 progress 15 % (2 MB)
54 17:49:07.205677 progress 20 % (3 MB)
55 17:49:07.210618 progress 25 % (4 MB)
56 17:49:07.215567 progress 30 % (5 MB)
57 17:49:07.220705 progress 35 % (6 MB)
58 17:49:07.225743 progress 40 % (7 MB)
59 17:49:07.230741 progress 45 % (8 MB)
60 17:49:07.235725 progress 50 % (9 MB)
61 17:49:07.240733 progress 55 % (10 MB)
62 17:49:07.245709 progress 60 % (11 MB)
63 17:49:07.250681 progress 65 % (12 MB)
64 17:49:07.255660 progress 70 % (13 MB)
65 17:49:07.260691 progress 75 % (14 MB)
66 17:49:07.265639 progress 80 % (15 MB)
67 17:49:07.270368 progress 85 % (15 MB)
68 17:49:07.275234 progress 90 % (16 MB)
69 17:49:07.280110 progress 95 % (17 MB)
70 17:49:07.285061 progress 100 % (18 MB)
71 17:49:07.285289 18 MB downloaded in 0.10 s (185.96 MB/s)
72 17:49:07.285436 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:49:07.285668 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:49:07.285756 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:49:07.285841 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:49:07.285970 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.212-cip45-3-g37b1c10dc5722/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 17:49:07.286040 saving as /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/modules/modules.tar
79 17:49:07.286102 total size: 1157932 (1 MB)
80 17:49:07.286165 Using unxz to decompress xz
81 17:49:07.289938 progress 2 % (0 MB)
82 17:49:07.290494 progress 8 % (0 MB)
83 17:49:07.293988 progress 14 % (0 MB)
84 17:49:07.298026 progress 19 % (0 MB)
85 17:49:07.301903 progress 25 % (0 MB)
86 17:49:07.305808 progress 31 % (0 MB)
87 17:49:07.310067 progress 36 % (0 MB)
88 17:49:07.313343 progress 42 % (0 MB)
89 17:49:07.317769 progress 48 % (0 MB)
90 17:49:07.321798 progress 53 % (0 MB)
91 17:49:07.325969 progress 59 % (0 MB)
92 17:49:07.329785 progress 65 % (0 MB)
93 17:49:07.333583 progress 70 % (0 MB)
94 17:49:07.338156 progress 76 % (0 MB)
95 17:49:07.342212 progress 82 % (0 MB)
96 17:49:07.346169 progress 87 % (0 MB)
97 17:49:07.350290 progress 93 % (1 MB)
98 17:49:07.354138 progress 99 % (1 MB)
99 17:49:07.362246 1 MB downloaded in 0.08 s (14.50 MB/s)
100 17:49:07.362514 end: 1.3.1 http-download (duration 00:00:00) [common]
102 17:49:07.362788 end: 1.3 download-retry (duration 00:00:00) [common]
103 17:49:07.362883 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
104 17:49:07.362980 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
105 17:49:07.363064 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
106 17:49:07.363152 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
107 17:49:07.363363 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei
108 17:49:07.363491 makedir: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin
109 17:49:07.363592 makedir: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/tests
110 17:49:07.363687 makedir: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/results
111 17:49:07.363801 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-add-keys
112 17:49:07.363946 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-add-sources
113 17:49:07.364070 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-background-process-start
114 17:49:07.364195 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-background-process-stop
115 17:49:07.364331 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-common-functions
116 17:49:07.364453 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-echo-ipv4
117 17:49:07.364574 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-install-packages
118 17:49:07.364695 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-installed-packages
119 17:49:07.364814 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-os-build
120 17:49:07.364934 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-probe-channel
121 17:49:07.365053 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-probe-ip
122 17:49:07.365172 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-target-ip
123 17:49:07.365291 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-target-mac
124 17:49:07.365408 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-target-storage
125 17:49:07.365532 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-case
126 17:49:07.365652 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-event
127 17:49:07.365771 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-feedback
128 17:49:07.365891 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-raise
129 17:49:07.366011 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-reference
130 17:49:07.366134 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-runner
131 17:49:07.366254 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-set
132 17:49:07.366375 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-test-shell
133 17:49:07.366500 Updating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-install-packages (oe)
134 17:49:07.366645 Updating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/bin/lava-installed-packages (oe)
135 17:49:07.366763 Creating /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/environment
136 17:49:07.366861 LAVA metadata
137 17:49:07.366937 - LAVA_JOB_ID=13097488
138 17:49:07.367002 - LAVA_DISPATCHER_IP=192.168.201.1
139 17:49:07.367104 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
140 17:49:07.367171 skipped lava-vland-overlay
141 17:49:07.367251 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
142 17:49:07.367335 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
143 17:49:07.367399 skipped lava-multinode-overlay
144 17:49:07.367473 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
145 17:49:07.367553 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
146 17:49:07.367627 Loading test definitions
147 17:49:07.367728 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
148 17:49:07.367804 Using /lava-13097488 at stage 0
149 17:49:07.368107 uuid=13097488_1.4.2.3.1 testdef=None
150 17:49:07.368196 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
151 17:49:07.368295 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
152 17:49:07.368814 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
154 17:49:07.369043 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
155 17:49:07.369673 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
157 17:49:07.369906 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
158 17:49:07.370509 runner path: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/0/tests/0_dmesg test_uuid 13097488_1.4.2.3.1
159 17:49:07.370664 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
161 17:49:07.370892 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
162 17:49:07.370964 Using /lava-13097488 at stage 1
163 17:49:07.371248 uuid=13097488_1.4.2.3.5 testdef=None
164 17:49:07.371337 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
165 17:49:07.371423 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
166 17:49:07.371882 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
168 17:49:07.372099 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
169 17:49:07.372770 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
171 17:49:07.372998 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
172 17:49:07.373655 runner path: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/1/tests/1_bootrr test_uuid 13097488_1.4.2.3.5
173 17:49:07.373806 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
175 17:49:07.374010 Creating lava-test-runner.conf files
176 17:49:07.374075 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/0 for stage 0
177 17:49:07.374164 - 0_dmesg
178 17:49:07.374242 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13097488/lava-overlay-ir9pz2ei/lava-13097488/1 for stage 1
179 17:49:07.374328 - 1_bootrr
180 17:49:07.374420 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
181 17:49:07.374505 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
182 17:49:07.382474 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
183 17:49:07.382583 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
184 17:49:07.382668 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
185 17:49:07.382754 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
186 17:49:07.382841 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
187 17:49:07.621191 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
188 17:49:07.621542 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
189 17:49:07.621658 extracting modules file /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13097488/extract-overlay-ramdisk-kq8qeo3u/ramdisk
190 17:49:07.649353 end: 1.4.4 extract-modules (duration 00:00:00) [common]
191 17:49:07.649520 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
192 17:49:07.649611 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13097488/compress-overlay-zwm7_d1f/overlay-1.4.2.4.tar.gz to ramdisk
193 17:49:07.649682 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13097488/compress-overlay-zwm7_d1f/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13097488/extract-overlay-ramdisk-kq8qeo3u/ramdisk
194 17:49:07.657458 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
195 17:49:07.657576 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
196 17:49:07.657669 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
197 17:49:07.657760 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
198 17:49:07.657836 Building ramdisk /var/lib/lava/dispatcher/tmp/13097488/extract-overlay-ramdisk-kq8qeo3u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13097488/extract-overlay-ramdisk-kq8qeo3u/ramdisk
199 17:49:07.810619 >> 61171 blocks
200 17:49:08.816646 rename /var/lib/lava/dispatcher/tmp/13097488/extract-overlay-ramdisk-kq8qeo3u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/ramdisk/ramdisk.cpio.gz
201 17:49:08.817060 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
202 17:49:08.817177 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
203 17:49:08.817277 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
204 17:49:08.817374 No mkimage arch provided, not using FIT.
205 17:49:08.817463 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
206 17:49:08.817545 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
207 17:49:08.817640 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
208 17:49:08.817734 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
209 17:49:08.817818 No LXC device requested
210 17:49:08.817903 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
211 17:49:08.817995 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
212 17:49:08.818079 end: 1.6 deploy-device-env (duration 00:00:00) [common]
213 17:49:08.818159 Checking files for TFTP limit of 4294967296 bytes.
214 17:49:08.818570 end: 1 tftp-deploy (duration 00:00:03) [common]
215 17:49:08.818675 start: 2 depthcharge-action (timeout 00:05:00) [common]
216 17:49:08.818772 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
217 17:49:08.818898 substitutions:
218 17:49:08.818967 - {DTB}: None
219 17:49:08.819030 - {INITRD}: 13097488/tftp-deploy-ikp9ops4/ramdisk/ramdisk.cpio.gz
220 17:49:08.819090 - {KERNEL}: 13097488/tftp-deploy-ikp9ops4/kernel/bzImage
221 17:49:08.819148 - {LAVA_MAC}: None
222 17:49:08.819219 - {PRESEED_CONFIG}: None
223 17:49:08.819319 - {PRESEED_LOCAL}: None
224 17:49:08.819382 - {RAMDISK}: 13097488/tftp-deploy-ikp9ops4/ramdisk/ramdisk.cpio.gz
225 17:49:08.819439 - {ROOT_PART}: None
226 17:49:08.819495 - {ROOT}: None
227 17:49:08.819549 - {SERVER_IP}: 192.168.201.1
228 17:49:08.819603 - {TEE}: None
229 17:49:08.819658 Parsed boot commands:
230 17:49:08.819712 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
231 17:49:08.819880 Parsed boot commands: tftpboot 192.168.201.1 13097488/tftp-deploy-ikp9ops4/kernel/bzImage 13097488/tftp-deploy-ikp9ops4/kernel/cmdline 13097488/tftp-deploy-ikp9ops4/ramdisk/ramdisk.cpio.gz
232 17:49:08.819968 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
233 17:49:08.820050 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
234 17:49:08.820139 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
235 17:49:08.820224 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
236 17:49:08.820376 Not connected, no need to disconnect.
237 17:49:08.820491 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
238 17:49:08.820576 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
239 17:49:08.820649 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-11'
240 17:49:08.824043 Setting prompt string to ['lava-test: # ']
241 17:49:08.824403 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
242 17:49:08.824507 end: 2.2.1 reset-connection (duration 00:00:00) [common]
243 17:49:08.824607 start: 2.2.2 reset-device (timeout 00:05:00) [common]
244 17:49:08.824720 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
245 17:49:08.824932 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-11' '--port=1' '--command=reboot'
246 17:49:13.963035 >> Command sent successfully.
247 17:49:13.965449 Returned 0 in 5 seconds
248 17:49:14.065821 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
250 17:49:14.066145 end: 2.2.2 reset-device (duration 00:00:05) [common]
251 17:49:14.066240 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
252 17:49:14.066324 Setting prompt string to 'Starting depthcharge on Volmar...'
253 17:49:14.066393 Changing prompt to 'Starting depthcharge on Volmar...'
254 17:49:14.066464 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
255 17:49:14.066712 [Enter `^Ec?' for help]
256 17:49:15.473948
257 17:49:15.474107
258 17:49:15.481364 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
259 17:49:15.484883 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
260 17:49:15.488187 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
261 17:49:15.495211 CPU: AES supported, TXT NOT supported, VT supported
262 17:49:15.502166 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
263 17:49:15.505998 Cache size = 10 MiB
264 17:49:15.509380 MCH: device id 4609 (rev 04) is Alderlake-P
265 17:49:15.512871 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
266 17:49:15.519610 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
267 17:49:15.523553 VBOOT: Loading verstage.
268 17:49:15.527188 FMAP: Found "FLASH" version 1.1 at 0x1804000.
269 17:49:15.530347 FMAP: base = 0x0 size = 0x2000000 #areas = 37
270 17:49:15.539453 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
271 17:49:15.543381 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
272 17:49:15.551294 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
273 17:49:15.554983
274 17:49:15.555083
275 17:49:15.562058 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
276 17:49:15.569123 Probing TPM I2C: I2C bus 1 version 0x3230302a
277 17:49:15.572976 DW I2C bus 1 at 0xfe022000 (400 KHz)
278 17:49:15.575723 I2C TX abort detected (00000001)
279 17:49:15.578636 cr50_i2c_read: Address write failed
280 17:49:15.589581 .done! DID_VID 0x00281ae0
281 17:49:15.594305 TPM ready after 0 ms
282 17:49:15.597460 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
283 17:49:15.607642 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
284 17:49:15.614400 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
285 17:49:15.663766 tlcl_send_startup: Startup return code is 0
286 17:49:15.663914 TPM: setup succeeded
287 17:49:15.685779 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
288 17:49:15.708440 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
289 17:49:15.712480 Chrome EC: UHEPI supported
290 17:49:15.715772 Reading cr50 boot mode
291 17:49:15.730719 Cr50 says boot_mode is VERIFIED_RW(0x00).
292 17:49:15.730814 Phase 1
293 17:49:15.737184 FMAP: area GBB found @ 1805000 (458752 bytes)
294 17:49:15.743710 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
295 17:49:15.750736 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
296 17:49:15.758154 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
297 17:49:15.760348 Phase 2
298 17:49:15.760433 Phase 3
299 17:49:15.764803 FMAP: area GBB found @ 1805000 (458752 bytes)
300 17:49:15.770869 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
301 17:49:15.773565 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
302 17:49:15.780198 VB2:vb2_verify_keyblock() Checking keyblock signature...
303 17:49:15.787036 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
304 17:49:15.794113 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
305 17:49:15.804523 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
306 17:49:15.815578 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
307 17:49:15.818577 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
308 17:49:15.826313 VB2:vb2_verify_fw_preamble() Verifying preamble.
309 17:49:15.832080 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
310 17:49:15.839438 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
311 17:49:15.845752 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
312 17:49:15.849756 Phase 4
313 17:49:15.853083 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
314 17:49:15.859235 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
315 17:49:16.071692 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
316 17:49:16.078451 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
317 17:49:16.082695 Saving vboot hash.
318 17:49:16.088743 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
319 17:49:16.104692 tlcl_extend: response is 0
320 17:49:16.110947 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
321 17:49:16.117531 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
322 17:49:16.132461 tlcl_extend: response is 0
323 17:49:16.138994 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
324 17:49:16.159145 tlcl_lock_nv_write: response is 0
325 17:49:16.178013 tlcl_lock_nv_write: response is 0
326 17:49:16.178105 Slot A is selected
327 17:49:16.185500 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
328 17:49:16.191248 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
329 17:49:16.197981 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
330 17:49:16.204667 BS: verstage times (exec / console): total (unknown) / 264 ms
331 17:49:16.204753
332 17:49:16.204820
333 17:49:16.211450 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
334 17:49:16.215909 Google Chrome EC: version:
335 17:49:16.218670 ro: volmar_v2.0.14126-e605144e9c
336 17:49:16.222207 rw: volmar_v0.0.55-22d1557
337 17:49:16.225664 running image: 2
338 17:49:16.228737 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
339 17:49:16.238297 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
340 17:49:16.244940 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
341 17:49:16.252378 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
342 17:49:16.261846 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
343 17:49:16.271499 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 17:49:16.275008 EC took 1111us to calculate image hash
345 17:49:16.288156 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
346 17:49:16.291348 VB2:sync_ec() select_rw=RW(active)
347 17:49:16.300134 Waited 270us to clear limit power flag.
348 17:49:16.303123 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
349 17:49:16.306601 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
350 17:49:16.313377 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
351 17:49:16.316230 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
352 17:49:16.319923 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
353 17:49:16.323462 TCO_STS: 0000 0000
354 17:49:16.326227 GEN_PMCON: d0015038 00002200
355 17:49:16.330225 GBLRST_CAUSE: 00000000 00000000
356 17:49:16.330314 HPR_CAUSE0: 00000000
357 17:49:16.333186 prev_sleep_state 5
358 17:49:16.336620 Abort disabling TXT, as CPU is not TXT capable.
359 17:49:16.344162 cse_lite: Number of partitions = 3
360 17:49:16.347822 cse_lite: Current partition = RO
361 17:49:16.347907 cse_lite: Next partition = RO
362 17:49:16.351499 cse_lite: Flags = 0x7
363 17:49:16.357516 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
364 17:49:16.368544 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
365 17:49:16.371622 FMAP: area SI_ME found @ 1000 (5238784 bytes)
366 17:49:16.378375 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 17:49:16.384496 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
368 17:49:16.391318 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
369 17:49:16.394398 cse_lite: CSE CBFS RW version : 16.1.25.2049
370 17:49:16.401203 cse_lite: Set Boot Partition Info Command (RW)
371 17:49:16.404491 HECI: Global Reset(Type:1) Command
372 17:49:17.825337 � UTC 2023 bootblock starting (log level: 8)...
373 17:49:17.828765 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
374 17:49:17.834967 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
375 17:49:17.838579 CPU: AES supported, TXT NOT supported, VT supported
376 17:49:17.845159 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
377 17:49:17.848134 Cache size = 10 MiB
378 17:49:17.852090 MCH: device id 4609 (rev 04) is Alderlake-P
379 17:49:17.858345 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
380 17:49:17.861984 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
381 17:49:17.864935 VBOOT: Loading verstage.
382 17:49:17.868576 FMAP: Found "FLASH" version 1.1 at 0x1804000.
383 17:49:17.875337 FMAP: base = 0x0 size = 0x2000000 #areas = 37
384 17:49:17.879246 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 17:49:17.886716 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
386 17:49:17.896668 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
387 17:49:17.897217
388 17:49:17.897569
389 17:49:17.906274 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
390 17:49:17.913705 Probing TPM I2C: I2C bus 1 version 0x3230302a
391 17:49:17.916977 DW I2C bus 1 at 0xfe022000 (400 KHz)
392 17:49:17.919741 done! DID_VID 0x00281ae0
393 17:49:17.920172 TPM ready after 0 ms
394 17:49:17.924600 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
395 17:49:17.934392 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
396 17:49:17.940838 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
397 17:49:17.994987 tlcl_send_startup: Startup return code is 0
398 17:49:17.995506 TPM: setup succeeded
399 17:49:18.016469 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
400 17:49:18.037966 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
401 17:49:18.042105 Chrome EC: UHEPI supported
402 17:49:18.045617 Reading cr50 boot mode
403 17:49:18.060415 Cr50 says boot_mode is VERIFIED_RW(0x00).
404 17:49:18.061174 Phase 1
405 17:49:18.067173 FMAP: area GBB found @ 1805000 (458752 bytes)
406 17:49:18.074255 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
407 17:49:18.080274 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
408 17:49:18.087546 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
409 17:49:18.090229 Phase 2
410 17:49:18.090781 Phase 3
411 17:49:18.093703 FMAP: area GBB found @ 1805000 (458752 bytes)
412 17:49:18.101521 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 17:49:18.103814 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 17:49:18.110262 VB2:vb2_verify_keyblock() Checking keyblock signature...
415 17:49:18.117046 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
416 17:49:18.123595 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
417 17:49:18.133832 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
418 17:49:18.145473 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
419 17:49:18.149122 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
420 17:49:18.155420 VB2:vb2_verify_fw_preamble() Verifying preamble.
421 17:49:18.162311 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
422 17:49:18.168833 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
423 17:49:18.175372 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
424 17:49:18.179524 Phase 4
425 17:49:18.182453 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
426 17:49:18.189470 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
427 17:49:18.401283 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
428 17:49:18.408183 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
429 17:49:18.411580 Saving vboot hash.
430 17:49:18.417926 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
431 17:49:18.434210 tlcl_extend: response is 0
432 17:49:18.441281 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
433 17:49:18.447113 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
434 17:49:18.461711 tlcl_extend: response is 0
435 17:49:18.467922 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
436 17:49:18.488696 tlcl_lock_nv_write: response is 0
437 17:49:18.507111 tlcl_lock_nv_write: response is 0
438 17:49:18.507626 Slot A is selected
439 17:49:18.513721 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
440 17:49:18.520546 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
441 17:49:18.527713 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
442 17:49:18.534263 BS: verstage times (exec / console): total (unknown) / 256 ms
443 17:49:18.534840
444 17:49:18.535218
445 17:49:18.540395 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
446 17:49:18.544666 Google Chrome EC: version:
447 17:49:18.548073 ro: volmar_v2.0.14126-e605144e9c
448 17:49:18.551582 rw: volmar_v0.0.55-22d1557
449 17:49:18.554987 running image: 2
450 17:49:18.557927 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
451 17:49:18.567848 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
452 17:49:18.574299 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
453 17:49:18.581087 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
454 17:49:18.591256 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
455 17:49:18.601640 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
456 17:49:18.604207 EC took 943us to calculate image hash
457 17:49:18.614556 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
458 17:49:18.620633 VB2:sync_ec() select_rw=RW(active)
459 17:49:18.630036 Waited 300us to clear limit power flag.
460 17:49:18.632906 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
461 17:49:18.636923 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
462 17:49:18.640594 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
463 17:49:18.644094 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
464 17:49:18.651237 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
465 17:49:18.651664 TCO_STS: 0000 0000
466 17:49:18.655121 GEN_PMCON: d1001038 00002200
467 17:49:18.657967 GBLRST_CAUSE: 00000040 00000000
468 17:49:18.661301 HPR_CAUSE0: 00000000
469 17:49:18.661725 prev_sleep_state 5
470 17:49:18.668171 Abort disabling TXT, as CPU is not TXT capable.
471 17:49:18.674738 cse_lite: Number of partitions = 3
472 17:49:18.677946 cse_lite: Current partition = RW
473 17:49:18.678481 cse_lite: Next partition = RW
474 17:49:18.681432 cse_lite: Flags = 0x7
475 17:49:18.688286 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
476 17:49:18.698448 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
477 17:49:18.701600 FMAP: area SI_ME found @ 1000 (5238784 bytes)
478 17:49:18.708799 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
479 17:49:18.714604 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
480 17:49:18.720865 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
481 17:49:18.724918 cse_lite: CSE CBFS RW version : 16.1.25.2049
482 17:49:18.727743 Boot Count incremented to 3374
483 17:49:18.734340 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
484 17:49:18.741307 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
485 17:49:18.754230 Probing TPM I2C: done! DID_VID 0x00281ae0
486 17:49:18.757363 Locality already claimed
487 17:49:18.760412 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
488 17:49:18.780283 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
489 17:49:18.787260 MRC: Hash idx 0x100d comparison successful.
490 17:49:18.790989 MRC cache found, size f6c8
491 17:49:18.791570 bootmode is set to: 2
492 17:49:18.794021 EC returned error result code 3
493 17:49:18.797504 FW_CONFIG value from CBI is 0x131
494 17:49:18.803937 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
495 17:49:18.807291 SPD index = 0
496 17:49:18.813997 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
497 17:49:18.814579 SPD: module type is LPDDR4X
498 17:49:18.822730 SPD: module part number is K4U6E3S4AB-MGCL
499 17:49:18.829184 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
500 17:49:18.832076 SPD: device width 16 bits, bus width 16 bits
501 17:49:18.835220 SPD: module size is 1024 MB (per channel)
502 17:49:18.904127 CBMEM:
503 17:49:18.907627 IMD: root @ 0x76fff000 254 entries.
504 17:49:18.912960 IMD: root @ 0x76ffec00 62 entries.
505 17:49:18.918427 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
506 17:49:18.921829 RO_VPD is uninitialized or empty.
507 17:49:18.925618 FMAP: area RW_VPD found @ f29000 (8192 bytes)
508 17:49:18.931863 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
509 17:49:18.935269 External stage cache:
510 17:49:18.938319 IMD: root @ 0x7bbff000 254 entries.
511 17:49:18.941603 IMD: root @ 0x7bbfec00 62 entries.
512 17:49:18.948571 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
513 17:49:18.955773 MRC: Checking cached data update for 'RW_MRC_CACHE'.
514 17:49:18.959012 MRC: 'RW_MRC_CACHE' does not need update.
515 17:49:18.959555 8 DIMMs found
516 17:49:18.962043 SMM Memory Map
517 17:49:18.965204 SMRAM : 0x7b800000 0x800000
518 17:49:18.968320 Subregion 0: 0x7b800000 0x200000
519 17:49:18.971504 Subregion 1: 0x7ba00000 0x200000
520 17:49:18.975294 Subregion 2: 0x7bc00000 0x400000
521 17:49:18.978699 top_of_ram = 0x77000000
522 17:49:18.982030 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
523 17:49:18.988377 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
524 17:49:18.995433 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
525 17:49:18.998296 MTRR Range: Start=ff000000 End=0 (Size 1000000)
526 17:49:18.998885 Normal boot
527 17:49:19.008494 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
528 17:49:19.015200 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
529 17:49:19.021272 Processing 237 relocs. Offset value of 0x74ab9000
530 17:49:19.029689 BS: romstage times (exec / console): total (unknown) / 377 ms
531 17:49:19.037176
532 17:49:19.037804
533 17:49:19.043959 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
534 17:49:19.044569 Normal boot
535 17:49:19.050495 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
536 17:49:19.057246 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
537 17:49:19.063947 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
538 17:49:19.073897 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
539 17:49:19.122039 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
540 17:49:19.128680 Processing 5931 relocs. Offset value of 0x72a2f000
541 17:49:19.131580 BS: postcar times (exec / console): total (unknown) / 51 ms
542 17:49:19.135053
543 17:49:19.135643
544 17:49:19.141713 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
545 17:49:19.145198 Reserving BERT start 76a1e000, size 10000
546 17:49:19.147976 Normal boot
547 17:49:19.151944 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
548 17:49:19.158297 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
549 17:49:19.167990 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
550 17:49:19.171978 FMAP: area RW_VPD found @ f29000 (8192 bytes)
551 17:49:19.174503 Google Chrome EC: version:
552 17:49:19.178723 ro: volmar_v2.0.14126-e605144e9c
553 17:49:19.181379 rw: volmar_v0.0.55-22d1557
554 17:49:19.185181 running image: 2
555 17:49:19.188526 ACPI _SWS is PM1 Index 8 GPE Index -1
556 17:49:19.194835 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
557 17:49:19.198233 EC returned error result code 3
558 17:49:19.201786 FW_CONFIG value from CBI is 0x131
559 17:49:19.208617 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
560 17:49:19.211623 PCI: 00:1c.2 disabled by fw_config
561 17:49:19.214979 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
562 17:49:19.221896 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
563 17:49:19.225616 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
564 17:49:19.232448 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
565 17:49:19.235276 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
566 17:49:19.245504 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
567 17:49:19.248438 microcode: sig=0x906a4 pf=0x80 revision=0x423
568 17:49:19.252186 microcode: Update skipped, already up-to-date
569 17:49:19.258752 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
570 17:49:19.292784 Detected 6 core, 8 thread CPU.
571 17:49:19.295920 Setting up SMI for CPU
572 17:49:19.299496 IED base = 0x7bc00000
573 17:49:19.300088 IED size = 0x00400000
574 17:49:19.302642 Will perform SMM setup.
575 17:49:19.306633 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
576 17:49:19.309409 LAPIC 0x0 in XAPIC mode.
577 17:49:19.319674 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
578 17:49:19.322636 Processing 18 relocs. Offset value of 0x00030000
579 17:49:19.327780 Attempting to start 7 APs
580 17:49:19.330376 Waiting for 10ms after sending INIT.
581 17:49:19.344633 Waiting for SIPI to complete...
582 17:49:19.346974 LAPIC 0x1 in XAPIC mode.
583 17:49:19.349929 LAPIC 0x16 in XAPIC mode.
584 17:49:19.353452 LAPIC 0x9 in XAPIC mode.
585 17:49:19.356572 LAPIC 0x8 in XAPIC mode.
586 17:49:19.357042 LAPIC 0x10 in XAPIC mode.
587 17:49:19.363378 AP: slot 1 apic_id 16, MCU rev: 0x00000423
588 17:49:19.363953 LAPIC 0x14 in XAPIC mode.
589 17:49:19.366987 done.
590 17:49:19.370339 AP: slot 2 apic_id 10, MCU rev: 0x00000423
591 17:49:19.373579 LAPIC 0x12 in XAPIC mode.
592 17:49:19.376457 AP: slot 4 apic_id 14, MCU rev: 0x00000423
593 17:49:19.380133 AP: slot 3 apic_id 12, MCU rev: 0x00000423
594 17:49:19.386545 AP: slot 6 apic_id 1, MCU rev: 0x00000423
595 17:49:19.390314 Waiting for SIPI to complete...
596 17:49:19.390842 done.
597 17:49:19.393459 AP: slot 7 apic_id 8, MCU rev: 0x00000423
598 17:49:19.397375 AP: slot 5 apic_id 9, MCU rev: 0x00000423
599 17:49:19.400106 smm_setup_relocation_handler: enter
600 17:49:19.403547 smm_setup_relocation_handler: exit
601 17:49:19.413169 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
602 17:49:19.416983 Processing 11 relocs. Offset value of 0x00038000
603 17:49:19.424131 smm_module_setup_stub: stack_top = 0x7b804000
604 17:49:19.426433 smm_module_setup_stub: per cpu stack_size = 0x800
605 17:49:19.433978 smm_module_setup_stub: runtime.start32_offset = 0x4c
606 17:49:19.436785 smm_module_setup_stub: runtime.smm_size = 0x10000
607 17:49:19.443651 SMM Module: stub loaded at 38000. Will call 0x76a52094
608 17:49:19.447088 Installing permanent SMM handler to 0x7b800000
609 17:49:19.453475 smm_load_module: total_smm_space_needed e468, available -> 200000
610 17:49:19.463610 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
611 17:49:19.466346 Processing 255 relocs. Offset value of 0x7b9f6000
612 17:49:19.473297 smm_load_module: smram_start: 0x7b800000
613 17:49:19.476647 smm_load_module: smram_end: 7ba00000
614 17:49:19.480224 smm_load_module: handler start 0x7b9f6d5f
615 17:49:19.483265 smm_load_module: handler_size 98d0
616 17:49:19.486454 smm_load_module: fxsave_area 0x7b9ff000
617 17:49:19.489799 smm_load_module: fxsave_size 1000
618 17:49:19.492882 smm_load_module: CONFIG_MSEG_SIZE 0x0
619 17:49:19.499882 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
620 17:49:19.507040 smm_load_module: handler_mod_params.smbase = 0x7b800000
621 17:49:19.509761 smm_load_module: per_cpu_save_state_size = 0x400
622 17:49:19.512599 smm_load_module: num_cpus = 0x8
623 17:49:19.519239 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
624 17:49:19.522465 smm_load_module: total_save_state_size = 0x2000
625 17:49:19.526554 smm_load_module: cpu0 entry: 7b9e6000
626 17:49:19.533012 smm_create_map: cpus allowed in one segment 30
627 17:49:19.536894 smm_create_map: min # of segments needed 1
628 17:49:19.537427 CPU 0x0
629 17:49:19.542685 smbase 7b9e6000 entry 7b9ee000
630 17:49:19.546370 ss_start 7b9f5c00 code_end 7b9ee208
631 17:49:19.546967 CPU 0x1
632 17:49:19.549325 smbase 7b9e5c00 entry 7b9edc00
633 17:49:19.556702 ss_start 7b9f5800 code_end 7b9ede08
634 17:49:19.557292 CPU 0x2
635 17:49:19.559728 smbase 7b9e5800 entry 7b9ed800
636 17:49:19.565876 ss_start 7b9f5400 code_end 7b9eda08
637 17:49:19.566444 CPU 0x3
638 17:49:19.569329 smbase 7b9e5400 entry 7b9ed400
639 17:49:19.572449 ss_start 7b9f5000 code_end 7b9ed608
640 17:49:19.575769 CPU 0x4
641 17:49:19.579324 smbase 7b9e5000 entry 7b9ed000
642 17:49:19.582574 ss_start 7b9f4c00 code_end 7b9ed208
643 17:49:19.583090 CPU 0x5
644 17:49:19.589163 smbase 7b9e4c00 entry 7b9ecc00
645 17:49:19.592786 ss_start 7b9f4800 code_end 7b9ece08
646 17:49:19.593361 CPU 0x6
647 17:49:19.595837 smbase 7b9e4800 entry 7b9ec800
648 17:49:19.602373 ss_start 7b9f4400 code_end 7b9eca08
649 17:49:19.602933 CPU 0x7
650 17:49:19.605423 smbase 7b9e4400 entry 7b9ec400
651 17:49:19.612560 ss_start 7b9f4000 code_end 7b9ec608
652 17:49:19.618981 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
653 17:49:19.625476 Processing 11 relocs. Offset value of 0x7b9ee000
654 17:49:19.628742 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
655 17:49:19.635629 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
656 17:49:19.643008 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
657 17:49:19.648895 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
658 17:49:19.655403 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
659 17:49:19.662280 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
660 17:49:19.669126 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
661 17:49:19.671793 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
662 17:49:19.678640 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
663 17:49:19.685098 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
664 17:49:19.692226 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
665 17:49:19.698682 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
666 17:49:19.705135 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
667 17:49:19.711493 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
668 17:49:19.718377 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
669 17:49:19.722538 smm_module_setup_stub: stack_top = 0x7b804000
670 17:49:19.728927 smm_module_setup_stub: per cpu stack_size = 0x800
671 17:49:19.731966 smm_module_setup_stub: runtime.start32_offset = 0x4c
672 17:49:19.738622 smm_module_setup_stub: runtime.smm_size = 0x200000
673 17:49:19.744849 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
674 17:49:19.749224 Clearing SMI status registers
675 17:49:19.751507 SMI_STS: PM1
676 17:49:19.751987 PM1_STS: WAK PWRBTN
677 17:49:19.758246 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
678 17:49:19.762103 In relocation handler: CPU 0
679 17:49:19.765163 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
680 17:49:19.771937 Writing SMRR. base = 0x7b800006, mask=0xff800c00
681 17:49:19.774921 Relocation complete.
682 17:49:19.782372 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
683 17:49:19.784739 In relocation handler: CPU 6
684 17:49:19.788229 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
685 17:49:19.791728 Relocation complete.
686 17:49:19.798659 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
687 17:49:19.801829 In relocation handler: CPU 3
688 17:49:19.805004 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
689 17:49:19.807831 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 17:49:19.811375 Relocation complete.
691 17:49:19.818442 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
692 17:49:19.821588 In relocation handler: CPU 4
693 17:49:19.825004 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
694 17:49:19.832032 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 17:49:19.832664 Relocation complete.
696 17:49:19.838701 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
697 17:49:19.841182 In relocation handler: CPU 2
698 17:49:19.848187 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
699 17:49:19.851286 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 17:49:19.855881 Relocation complete.
701 17:49:19.861471 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
702 17:49:19.864387 In relocation handler: CPU 1
703 17:49:19.867864 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
704 17:49:19.871306 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 17:49:19.875039 Relocation complete.
706 17:49:19.881486 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
707 17:49:19.884647 In relocation handler: CPU 5
708 17:49:19.887943 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
709 17:49:19.891053 Relocation complete.
710 17:49:19.897642 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
711 17:49:19.901615 In relocation handler: CPU 7
712 17:49:19.904870 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
713 17:49:19.911037 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 17:49:19.911615 Relocation complete.
715 17:49:19.914731 Initializing CPU #0
716 17:49:19.918097 CPU: vendor Intel device 906a4
717 17:49:19.921050 CPU: family 06, model 9a, stepping 04
718 17:49:19.924729 Clearing out pending MCEs
719 17:49:19.928793 cpu: energy policy set to 7
720 17:49:19.931989 Turbo is available but hidden
721 17:49:19.935085 Turbo is available and visible
722 17:49:19.937659 microcode: Update skipped, already up-to-date
723 17:49:19.941777 CPU #0 initialized
724 17:49:19.942351 Initializing CPU #6
725 17:49:19.944657 Initializing CPU #3
726 17:49:19.945127 Initializing CPU #4
727 17:49:19.948375 CPU: vendor Intel device 906a4
728 17:49:19.955297 CPU: family 06, model 9a, stepping 04
729 17:49:19.955771 Initializing CPU #1
730 17:49:19.957458 Clearing out pending MCEs
731 17:49:19.960906 Initializing CPU #2
732 17:49:19.964166 cpu: energy policy set to 7
733 17:49:19.964659 CPU: vendor Intel device 906a4
734 17:49:19.970659 CPU: family 06, model 9a, stepping 04
735 17:49:19.974588 CPU: vendor Intel device 906a4
736 17:49:19.977565 CPU: family 06, model 9a, stepping 04
737 17:49:19.980733 CPU: vendor Intel device 906a4
738 17:49:19.984505 CPU: family 06, model 9a, stepping 04
739 17:49:19.987628 Clearing out pending MCEs
740 17:49:19.991110 CPU: vendor Intel device 906a4
741 17:49:19.993922 CPU: family 06, model 9a, stepping 04
742 17:49:19.997457 Clearing out pending MCEs
743 17:49:19.998034 Initializing CPU #7
744 17:49:20.000967 Initializing CPU #5
745 17:49:20.003642 microcode: Update skipped, already up-to-date
746 17:49:20.007341 CPU #3 initialized
747 17:49:20.007929 Clearing out pending MCEs
748 17:49:20.010602 cpu: energy policy set to 7
749 17:49:20.014083 Clearing out pending MCEs
750 17:49:20.017748 cpu: energy policy set to 7
751 17:49:20.020798 microcode: Update skipped, already up-to-date
752 17:49:20.023921 CPU #1 initialized
753 17:49:20.026876 cpu: energy policy set to 7
754 17:49:20.030718 cpu: energy policy set to 7
755 17:49:20.033648 microcode: Update skipped, already up-to-date
756 17:49:20.037262 CPU #2 initialized
757 17:49:20.040591 microcode: Update skipped, already up-to-date
758 17:49:20.043477 CPU #4 initialized
759 17:49:20.046791 CPU: vendor Intel device 906a4
760 17:49:20.050874 CPU: family 06, model 9a, stepping 04
761 17:49:20.053734 CPU: vendor Intel device 906a4
762 17:49:20.057019 CPU: family 06, model 9a, stepping 04
763 17:49:20.059951 Clearing out pending MCEs
764 17:49:20.060468 Clearing out pending MCEs
765 17:49:20.063279 cpu: energy policy set to 7
766 17:49:20.066790 cpu: energy policy set to 7
767 17:49:20.073170 microcode: Update skipped, already up-to-date
768 17:49:20.073743 CPU #7 initialized
769 17:49:20.079803 microcode: Update skipped, already up-to-date
770 17:49:20.080417 CPU #5 initialized
771 17:49:20.083617 microcode: Update skipped, already up-to-date
772 17:49:20.086938 CPU #6 initialized
773 17:49:20.089588 bsp_do_flight_plan done after 697 msecs.
774 17:49:20.093401 CPU: frequency set to 4400 MHz
775 17:49:20.096911 Enabling SMIs.
776 17:49:20.103079 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
777 17:49:20.118218 Probing TPM I2C: done! DID_VID 0x00281ae0
778 17:49:20.121605 Locality already claimed
779 17:49:20.124593 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
780 17:49:20.136630 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
781 17:49:20.139782 Enabling GPIO PM b/c CR50 has long IRQ pulse support
782 17:49:20.146244 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
783 17:49:20.152688 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
784 17:49:20.156444 Found a VBT of 9216 bytes after decompression
785 17:49:20.159687 PCI 1.0, PIN A, using IRQ #16
786 17:49:20.162792 PCI 2.0, PIN A, using IRQ #17
787 17:49:20.166248 PCI 4.0, PIN A, using IRQ #18
788 17:49:20.169616 PCI 5.0, PIN A, using IRQ #16
789 17:49:20.172742 PCI 6.0, PIN A, using IRQ #16
790 17:49:20.176009 PCI 6.2, PIN C, using IRQ #18
791 17:49:20.179472 PCI 7.0, PIN A, using IRQ #19
792 17:49:20.182839 PCI 7.1, PIN B, using IRQ #20
793 17:49:20.186162 PCI 7.2, PIN C, using IRQ #21
794 17:49:20.188905 PCI 7.3, PIN D, using IRQ #22
795 17:49:20.192848 PCI 8.0, PIN A, using IRQ #23
796 17:49:20.196132 PCI D.0, PIN A, using IRQ #17
797 17:49:20.199505 PCI D.1, PIN B, using IRQ #19
798 17:49:20.200099 PCI 10.0, PIN A, using IRQ #24
799 17:49:20.202716 PCI 10.1, PIN B, using IRQ #25
800 17:49:20.205864 PCI 10.6, PIN C, using IRQ #20
801 17:49:20.209432 PCI 10.7, PIN D, using IRQ #21
802 17:49:20.212801 PCI 11.0, PIN A, using IRQ #26
803 17:49:20.216126 PCI 11.1, PIN B, using IRQ #27
804 17:49:20.219038 PCI 11.2, PIN C, using IRQ #28
805 17:49:20.222645 PCI 11.3, PIN D, using IRQ #29
806 17:49:20.225710 PCI 12.0, PIN A, using IRQ #30
807 17:49:20.229342 PCI 12.6, PIN B, using IRQ #31
808 17:49:20.232860 PCI 12.7, PIN C, using IRQ #22
809 17:49:20.235886 PCI 13.0, PIN A, using IRQ #32
810 17:49:20.239542 PCI 13.1, PIN B, using IRQ #33
811 17:49:20.242432 PCI 13.2, PIN C, using IRQ #34
812 17:49:20.245908 PCI 13.3, PIN D, using IRQ #35
813 17:49:20.249323 PCI 14.0, PIN B, using IRQ #23
814 17:49:20.252061 PCI 14.1, PIN A, using IRQ #36
815 17:49:20.252585 PCI 14.3, PIN C, using IRQ #17
816 17:49:20.255432 PCI 15.0, PIN A, using IRQ #37
817 17:49:20.259173 PCI 15.1, PIN B, using IRQ #38
818 17:49:20.262759 PCI 15.2, PIN C, using IRQ #39
819 17:49:20.265620 PCI 15.3, PIN D, using IRQ #40
820 17:49:20.268885 PCI 16.0, PIN A, using IRQ #18
821 17:49:20.272127 PCI 16.1, PIN B, using IRQ #19
822 17:49:20.275135 PCI 16.2, PIN C, using IRQ #20
823 17:49:20.279662 PCI 16.3, PIN D, using IRQ #21
824 17:49:20.281958 PCI 16.4, PIN A, using IRQ #18
825 17:49:20.285781 PCI 16.5, PIN B, using IRQ #19
826 17:49:20.288722 PCI 17.0, PIN A, using IRQ #22
827 17:49:20.292134 PCI 19.0, PIN A, using IRQ #41
828 17:49:20.295384 PCI 19.1, PIN B, using IRQ #42
829 17:49:20.298547 PCI 19.2, PIN C, using IRQ #43
830 17:49:20.302242 PCI 1C.0, PIN A, using IRQ #16
831 17:49:20.305694 PCI 1C.1, PIN B, using IRQ #17
832 17:49:20.306170 PCI 1C.2, PIN C, using IRQ #18
833 17:49:20.309140 PCI 1C.3, PIN D, using IRQ #19
834 17:49:20.311704 PCI 1C.4, PIN A, using IRQ #16
835 17:49:20.315422 PCI 1C.5, PIN B, using IRQ #17
836 17:49:20.319108 PCI 1C.6, PIN C, using IRQ #18
837 17:49:20.322097 PCI 1C.7, PIN D, using IRQ #19
838 17:49:20.325113 PCI 1D.0, PIN A, using IRQ #16
839 17:49:20.328821 PCI 1D.1, PIN B, using IRQ #17
840 17:49:20.332378 PCI 1D.2, PIN C, using IRQ #18
841 17:49:20.335536 PCI 1D.3, PIN D, using IRQ #19
842 17:49:20.339176 PCI 1E.0, PIN A, using IRQ #23
843 17:49:20.342343 PCI 1E.1, PIN B, using IRQ #20
844 17:49:20.345394 PCI 1E.2, PIN C, using IRQ #44
845 17:49:20.348850 PCI 1E.3, PIN D, using IRQ #45
846 17:49:20.352235 PCI 1F.3, PIN B, using IRQ #22
847 17:49:20.355131 PCI 1F.4, PIN C, using IRQ #23
848 17:49:20.358580 PCI 1F.6, PIN D, using IRQ #20
849 17:49:20.359030 PCI 1F.7, PIN A, using IRQ #21
850 17:49:20.365308 IRQ: Using dynamically assigned PCI IO-APIC IRQs
851 17:49:20.372045 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
852 17:49:20.554389 FSPS returned 0
853 17:49:20.558209 Executing Phase 1 of FspMultiPhaseSiInit
854 17:49:20.568225 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
855 17:49:20.571563 port C0 DISC req: usage 1 usb3 1 usb2 1
856 17:49:20.575112 Raw Buffer output 0 00000111
857 17:49:20.577896 Raw Buffer output 1 00000000
858 17:49:20.581535 pmc_send_ipc_cmd succeeded
859 17:49:20.588213 port C1 DISC req: usage 1 usb3 3 usb2 3
860 17:49:20.588868 Raw Buffer output 0 00000331
861 17:49:20.592027 Raw Buffer output 1 00000000
862 17:49:20.595607 pmc_send_ipc_cmd succeeded
863 17:49:20.599390 Detected 6 core, 8 thread CPU.
864 17:49:20.602979 Detected 6 core, 8 thread CPU.
865 17:49:20.607973 Detected 6 core, 8 thread CPU.
866 17:49:20.611322 Detected 6 core, 8 thread CPU.
867 17:49:20.614399 Detected 6 core, 8 thread CPU.
868 17:49:20.618358 Detected 6 core, 8 thread CPU.
869 17:49:20.621728 Detected 6 core, 8 thread CPU.
870 17:49:20.624757 Detected 6 core, 8 thread CPU.
871 17:49:20.627537 Detected 6 core, 8 thread CPU.
872 17:49:20.631597 Detected 6 core, 8 thread CPU.
873 17:49:20.634739 Detected 6 core, 8 thread CPU.
874 17:49:20.637495 Detected 6 core, 8 thread CPU.
875 17:49:20.641077 Detected 6 core, 8 thread CPU.
876 17:49:20.644390 Detected 6 core, 8 thread CPU.
877 17:49:20.647628 Detected 6 core, 8 thread CPU.
878 17:49:20.651201 Detected 6 core, 8 thread CPU.
879 17:49:20.654406 Detected 6 core, 8 thread CPU.
880 17:49:20.658073 Detected 6 core, 8 thread CPU.
881 17:49:20.660957 Detected 6 core, 8 thread CPU.
882 17:49:20.664317 Detected 6 core, 8 thread CPU.
883 17:49:20.667386 Detected 6 core, 8 thread CPU.
884 17:49:20.670807 Detected 6 core, 8 thread CPU.
885 17:49:20.962711 Detected 6 core, 8 thread CPU.
886 17:49:20.965924 Detected 6 core, 8 thread CPU.
887 17:49:20.968795 Detected 6 core, 8 thread CPU.
888 17:49:20.972566 Detected 6 core, 8 thread CPU.
889 17:49:20.975565 Detected 6 core, 8 thread CPU.
890 17:49:20.978858 Detected 6 core, 8 thread CPU.
891 17:49:20.982391 Detected 6 core, 8 thread CPU.
892 17:49:20.985433 Detected 6 core, 8 thread CPU.
893 17:49:20.988510 Detected 6 core, 8 thread CPU.
894 17:49:20.992203 Detected 6 core, 8 thread CPU.
895 17:49:20.995889 Detected 6 core, 8 thread CPU.
896 17:49:20.998919 Detected 6 core, 8 thread CPU.
897 17:49:21.002189 Detected 6 core, 8 thread CPU.
898 17:49:21.004947 Detected 6 core, 8 thread CPU.
899 17:49:21.008864 Detected 6 core, 8 thread CPU.
900 17:49:21.011956 Detected 6 core, 8 thread CPU.
901 17:49:21.015289 Detected 6 core, 8 thread CPU.
902 17:49:21.018656 Detected 6 core, 8 thread CPU.
903 17:49:21.021827 Detected 6 core, 8 thread CPU.
904 17:49:21.024779 Detected 6 core, 8 thread CPU.
905 17:49:21.028947 Display FSP Version Info HOB
906 17:49:21.031907 Reference Code - CPU = c.0.65.70
907 17:49:21.032633 uCode Version = 0.0.4.23
908 17:49:21.035814 TXT ACM version = ff.ff.ff.ffff
909 17:49:21.038480 Reference Code - ME = c.0.65.70
910 17:49:21.041553 MEBx version = 0.0.0.0
911 17:49:21.044722 ME Firmware Version = Lite SKU
912 17:49:21.048412 Reference Code - PCH = c.0.65.70
913 17:49:21.051743 PCH-CRID Status = Disabled
914 17:49:21.055030 PCH-CRID Original Value = ff.ff.ff.ffff
915 17:49:21.058558 PCH-CRID New Value = ff.ff.ff.ffff
916 17:49:21.061469 OPROM - RST - RAID = ff.ff.ff.ffff
917 17:49:21.065192 PCH Hsio Version = 4.0.0.0
918 17:49:21.068399 Reference Code - SA - System Agent = c.0.65.70
919 17:49:21.072169 Reference Code - MRC = 0.0.3.80
920 17:49:21.075103 SA - PCIe Version = c.0.65.70
921 17:49:21.078311 SA-CRID Status = Disabled
922 17:49:21.081894 SA-CRID Original Value = 0.0.0.4
923 17:49:21.084856 SA-CRID New Value = 0.0.0.4
924 17:49:21.088980 OPROM - VBIOS = ff.ff.ff.ffff
925 17:49:21.091810 IO Manageability Engine FW Version = 24.0.4.0
926 17:49:21.095413 PHY Build Version = 0.0.0.2016
927 17:49:21.099066 Thunderbolt(TM) FW Version = 0.0.0.0
928 17:49:21.105156 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
929 17:49:21.111351 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
930 17:49:21.114627 Enumerating buses...
931 17:49:21.117930 Show all devs... Before device enumeration.
932 17:49:21.121608 Root Device: enabled 1
933 17:49:21.122179 CPU_CLUSTER: 0: enabled 1
934 17:49:21.124907 DOMAIN: 0000: enabled 1
935 17:49:21.128726 GPIO: 0: enabled 1
936 17:49:21.132145 PCI: 00:00.0: enabled 1
937 17:49:21.132767 PCI: 00:01.0: enabled 0
938 17:49:21.134730 PCI: 00:01.1: enabled 0
939 17:49:21.138818 PCI: 00:02.0: enabled 1
940 17:49:21.139389 PCI: 00:04.0: enabled 1
941 17:49:21.142126 PCI: 00:05.0: enabled 0
942 17:49:21.144722 PCI: 00:06.0: enabled 1
943 17:49:21.148401 PCI: 00:06.2: enabled 0
944 17:49:21.148970 PCI: 00:07.0: enabled 0
945 17:49:21.151264 PCI: 00:07.1: enabled 0
946 17:49:21.154645 PCI: 00:07.2: enabled 0
947 17:49:21.158268 PCI: 00:07.3: enabled 0
948 17:49:21.158750 PCI: 00:08.0: enabled 0
949 17:49:21.161618 PCI: 00:09.0: enabled 0
950 17:49:21.165566 PCI: 00:0a.0: enabled 1
951 17:49:21.168416 PCI: 00:0d.0: enabled 1
952 17:49:21.168999 PCI: 00:0d.1: enabled 0
953 17:49:21.171152 PCI: 00:0d.2: enabled 0
954 17:49:21.174875 PCI: 00:0d.3: enabled 0
955 17:49:21.177927 PCI: 00:0e.0: enabled 0
956 17:49:21.178499 PCI: 00:10.0: enabled 0
957 17:49:21.181503 PCI: 00:10.1: enabled 0
958 17:49:21.184477 PCI: 00:10.6: enabled 0
959 17:49:21.188114 PCI: 00:10.7: enabled 0
960 17:49:21.188717 PCI: 00:12.0: enabled 0
961 17:49:21.191588 PCI: 00:12.6: enabled 0
962 17:49:21.194266 PCI: 00:12.7: enabled 0
963 17:49:21.194745 PCI: 00:13.0: enabled 0
964 17:49:21.198233 PCI: 00:14.0: enabled 1
965 17:49:21.201454 PCI: 00:14.1: enabled 0
966 17:49:21.204599 PCI: 00:14.2: enabled 1
967 17:49:21.205184 PCI: 00:14.3: enabled 1
968 17:49:21.207597 PCI: 00:15.0: enabled 1
969 17:49:21.211007 PCI: 00:15.1: enabled 1
970 17:49:21.214743 PCI: 00:15.2: enabled 0
971 17:49:21.215317 PCI: 00:15.3: enabled 1
972 17:49:21.217657 PCI: 00:16.0: enabled 1
973 17:49:21.221269 PCI: 00:16.1: enabled 0
974 17:49:21.224372 PCI: 00:16.2: enabled 0
975 17:49:21.224943 PCI: 00:16.3: enabled 0
976 17:49:21.227709 PCI: 00:16.4: enabled 0
977 17:49:21.230978 PCI: 00:16.5: enabled 0
978 17:49:21.234558 PCI: 00:17.0: enabled 1
979 17:49:21.235133 PCI: 00:19.0: enabled 0
980 17:49:21.237283 PCI: 00:19.1: enabled 1
981 17:49:21.240761 PCI: 00:19.2: enabled 0
982 17:49:21.241336 PCI: 00:1a.0: enabled 0
983 17:49:21.244195 PCI: 00:1c.0: enabled 0
984 17:49:21.247580 PCI: 00:1c.1: enabled 0
985 17:49:21.250982 PCI: 00:1c.2: enabled 0
986 17:49:21.251559 PCI: 00:1c.3: enabled 0
987 17:49:21.254226 PCI: 00:1c.4: enabled 0
988 17:49:21.257569 PCI: 00:1c.5: enabled 0
989 17:49:21.260509 PCI: 00:1c.6: enabled 0
990 17:49:21.260999 PCI: 00:1c.7: enabled 0
991 17:49:21.264177 PCI: 00:1d.0: enabled 0
992 17:49:21.267677 PCI: 00:1d.1: enabled 0
993 17:49:21.271003 PCI: 00:1d.2: enabled 0
994 17:49:21.271584 PCI: 00:1d.3: enabled 0
995 17:49:21.274410 PCI: 00:1e.0: enabled 1
996 17:49:21.277365 PCI: 00:1e.1: enabled 0
997 17:49:21.277838 PCI: 00:1e.2: enabled 0
998 17:49:21.280803 PCI: 00:1e.3: enabled 1
999 17:49:21.284552 PCI: 00:1f.0: enabled 1
1000 17:49:21.288022 PCI: 00:1f.1: enabled 0
1001 17:49:21.288645 PCI: 00:1f.2: enabled 1
1002 17:49:21.291068 PCI: 00:1f.3: enabled 1
1003 17:49:21.294410 PCI: 00:1f.4: enabled 0
1004 17:49:21.297752 PCI: 00:1f.5: enabled 1
1005 17:49:21.298325 PCI: 00:1f.6: enabled 0
1006 17:49:21.300320 PCI: 00:1f.7: enabled 0
1007 17:49:21.304325 GENERIC: 0.0: enabled 1
1008 17:49:21.307530 GENERIC: 0.0: enabled 1
1009 17:49:21.308004 GENERIC: 1.0: enabled 1
1010 17:49:21.310219 GENERIC: 0.0: enabled 1
1011 17:49:21.314142 GENERIC: 1.0: enabled 1
1012 17:49:21.314641 USB0 port 0: enabled 1
1013 17:49:21.316966 USB0 port 0: enabled 1
1014 17:49:21.320910 GENERIC: 0.0: enabled 1
1015 17:49:21.324049 I2C: 00:1a: enabled 1
1016 17:49:21.324662 I2C: 00:31: enabled 1
1017 17:49:21.326947 I2C: 00:32: enabled 1
1018 17:49:21.330695 I2C: 00:50: enabled 1
1019 17:49:21.331170 I2C: 00:10: enabled 1
1020 17:49:21.334168 I2C: 00:15: enabled 1
1021 17:49:21.337257 I2C: 00:2c: enabled 1
1022 17:49:21.337848 GENERIC: 0.0: enabled 1
1023 17:49:21.340619 SPI: 00: enabled 1
1024 17:49:21.344792 PNP: 0c09.0: enabled 1
1025 17:49:21.345387 GENERIC: 0.0: enabled 1
1026 17:49:21.347073 USB3 port 0: enabled 1
1027 17:49:21.350428 USB3 port 1: enabled 0
1028 17:49:21.353738 USB3 port 2: enabled 1
1029 17:49:21.354302 USB3 port 3: enabled 0
1030 17:49:21.356959 USB2 port 0: enabled 1
1031 17:49:21.360351 USB2 port 1: enabled 0
1032 17:49:21.360818 USB2 port 2: enabled 1
1033 17:49:21.364036 USB2 port 3: enabled 0
1034 17:49:21.367209 USB2 port 4: enabled 0
1035 17:49:21.367675 USB2 port 5: enabled 1
1036 17:49:21.370908 USB2 port 6: enabled 0
1037 17:49:21.373756 USB2 port 7: enabled 0
1038 17:49:21.377254 USB2 port 8: enabled 1
1039 17:49:21.377819 USB2 port 9: enabled 1
1040 17:49:21.380540 USB3 port 0: enabled 1
1041 17:49:21.384122 USB3 port 1: enabled 0
1042 17:49:21.384727 USB3 port 2: enabled 0
1043 17:49:21.387350 USB3 port 3: enabled 0
1044 17:49:21.390152 GENERIC: 0.0: enabled 1
1045 17:49:21.393456 GENERIC: 1.0: enabled 1
1046 17:49:21.393920 APIC: 00: enabled 1
1047 17:49:21.397248 APIC: 16: enabled 1
1048 17:49:21.397717 APIC: 10: enabled 1
1049 17:49:21.401490 APIC: 12: enabled 1
1050 17:49:21.403723 APIC: 14: enabled 1
1051 17:49:21.404323 APIC: 09: enabled 1
1052 17:49:21.407009 APIC: 01: enabled 1
1053 17:49:21.410497 APIC: 08: enabled 1
1054 17:49:21.410965 Compare with tree...
1055 17:49:21.414180 Root Device: enabled 1
1056 17:49:21.417148 CPU_CLUSTER: 0: enabled 1
1057 17:49:21.417622 APIC: 00: enabled 1
1058 17:49:21.420820 APIC: 16: enabled 1
1059 17:49:21.423706 APIC: 10: enabled 1
1060 17:49:21.424302 APIC: 12: enabled 1
1061 17:49:21.426888 APIC: 14: enabled 1
1062 17:49:21.430651 APIC: 09: enabled 1
1063 17:49:21.431212 APIC: 01: enabled 1
1064 17:49:21.434226 APIC: 08: enabled 1
1065 17:49:21.436945 DOMAIN: 0000: enabled 1
1066 17:49:21.437511 GPIO: 0: enabled 1
1067 17:49:21.440673 PCI: 00:00.0: enabled 1
1068 17:49:21.444040 PCI: 00:01.0: enabled 0
1069 17:49:21.446729 PCI: 00:01.1: enabled 0
1070 17:49:21.450180 PCI: 00:02.0: enabled 1
1071 17:49:21.450651 PCI: 00:04.0: enabled 1
1072 17:49:21.453793 GENERIC: 0.0: enabled 1
1073 17:49:21.457769 PCI: 00:05.0: enabled 0
1074 17:49:21.460388 PCI: 00:06.0: enabled 1
1075 17:49:21.464406 PCI: 00:06.2: enabled 0
1076 17:49:21.464966 PCI: 00:08.0: enabled 0
1077 17:49:21.467126 PCI: 00:09.0: enabled 0
1078 17:49:21.470298 PCI: 00:0a.0: enabled 1
1079 17:49:21.474246 PCI: 00:0d.0: enabled 1
1080 17:49:21.477616 USB0 port 0: enabled 1
1081 17:49:21.478187 USB3 port 0: enabled 1
1082 17:49:21.480671 USB3 port 1: enabled 0
1083 17:49:21.483872 USB3 port 2: enabled 1
1084 17:49:21.486953 USB3 port 3: enabled 0
1085 17:49:21.490163 PCI: 00:0d.1: enabled 0
1086 17:49:21.494528 PCI: 00:0d.2: enabled 0
1087 17:49:21.495184 PCI: 00:0d.3: enabled 0
1088 17:49:21.497403 PCI: 00:0e.0: enabled 0
1089 17:49:21.500596 PCI: 00:10.0: enabled 0
1090 17:49:21.503660 PCI: 00:10.1: enabled 0
1091 17:49:21.504124 PCI: 00:10.6: enabled 0
1092 17:49:21.506671 PCI: 00:10.7: enabled 0
1093 17:49:21.510000 PCI: 00:12.0: enabled 0
1094 17:49:21.513281 PCI: 00:12.6: enabled 0
1095 17:49:21.516718 PCI: 00:12.7: enabled 0
1096 17:49:21.517186 PCI: 00:13.0: enabled 0
1097 17:49:21.519880 PCI: 00:14.0: enabled 1
1098 17:49:21.523606 USB0 port 0: enabled 1
1099 17:49:21.527174 USB2 port 0: enabled 1
1100 17:49:21.530627 USB2 port 1: enabled 0
1101 17:49:21.533369 USB2 port 2: enabled 1
1102 17:49:21.533933 USB2 port 3: enabled 0
1103 17:49:21.536894 USB2 port 4: enabled 0
1104 17:49:21.540320 USB2 port 5: enabled 1
1105 17:49:21.543603 USB2 port 6: enabled 0
1106 17:49:21.546299 USB2 port 7: enabled 0
1107 17:49:21.546774 USB2 port 8: enabled 1
1108 17:49:21.550058 USB2 port 9: enabled 1
1109 17:49:21.553303 USB3 port 0: enabled 1
1110 17:49:21.556865 USB3 port 1: enabled 0
1111 17:49:21.559962 USB3 port 2: enabled 0
1112 17:49:21.562896 USB3 port 3: enabled 0
1113 17:49:21.563363 PCI: 00:14.1: enabled 0
1114 17:49:21.566963 PCI: 00:14.2: enabled 1
1115 17:49:21.570213 PCI: 00:14.3: enabled 1
1116 17:49:21.573320 GENERIC: 0.0: enabled 1
1117 17:49:21.576753 PCI: 00:15.0: enabled 1
1118 17:49:21.577219 I2C: 00:1a: enabled 1
1119 17:49:21.580133 I2C: 00:31: enabled 1
1120 17:49:21.583608 I2C: 00:32: enabled 1
1121 17:49:21.586565 PCI: 00:15.1: enabled 1
1122 17:49:21.587129 I2C: 00:50: enabled 1
1123 17:49:21.590426 PCI: 00:15.2: enabled 0
1124 17:49:21.593449 PCI: 00:15.3: enabled 1
1125 17:49:21.596333 I2C: 00:10: enabled 1
1126 17:49:21.599884 PCI: 00:16.0: enabled 1
1127 17:49:21.600489 PCI: 00:16.1: enabled 0
1128 17:49:21.603508 PCI: 00:16.2: enabled 0
1129 17:49:21.606611 PCI: 00:16.3: enabled 0
1130 17:49:21.610757 PCI: 00:16.4: enabled 0
1131 17:49:21.613724 PCI: 00:16.5: enabled 0
1132 17:49:21.614232 PCI: 00:17.0: enabled 1
1133 17:49:21.616414 PCI: 00:19.0: enabled 0
1134 17:49:21.619939 PCI: 00:19.1: enabled 1
1135 17:49:21.622869 I2C: 00:15: enabled 1
1136 17:49:21.623333 I2C: 00:2c: enabled 1
1137 17:49:21.626168 PCI: 00:19.2: enabled 0
1138 17:49:21.630205 PCI: 00:1a.0: enabled 0
1139 17:49:21.633269 PCI: 00:1e.0: enabled 1
1140 17:49:21.636211 PCI: 00:1e.1: enabled 0
1141 17:49:21.636719 PCI: 00:1e.2: enabled 0
1142 17:49:21.639942 PCI: 00:1e.3: enabled 1
1143 17:49:21.643089 SPI: 00: enabled 1
1144 17:49:21.646369 PCI: 00:1f.0: enabled 1
1145 17:49:21.646873 PNP: 0c09.0: enabled 1
1146 17:49:21.649615 PCI: 00:1f.1: enabled 0
1147 17:49:21.653202 PCI: 00:1f.2: enabled 1
1148 17:49:21.656513 GENERIC: 0.0: enabled 1
1149 17:49:21.659981 GENERIC: 0.0: enabled 1
1150 17:49:21.662823 GENERIC: 1.0: enabled 1
1151 17:49:21.663292 PCI: 00:1f.3: enabled 1
1152 17:49:21.666364 PCI: 00:1f.4: enabled 0
1153 17:49:21.669575 PCI: 00:1f.5: enabled 1
1154 17:49:21.673130 PCI: 00:1f.6: enabled 0
1155 17:49:21.676294 PCI: 00:1f.7: enabled 0
1156 17:49:21.676761 Root Device scanning...
1157 17:49:21.679644 scan_static_bus for Root Device
1158 17:49:21.682997 CPU_CLUSTER: 0 enabled
1159 17:49:21.686358 DOMAIN: 0000 enabled
1160 17:49:21.686835 DOMAIN: 0000 scanning...
1161 17:49:21.690510 PCI: pci_scan_bus for bus 00
1162 17:49:21.692932 PCI: 00:00.0 [8086/0000] ops
1163 17:49:21.696112 PCI: 00:00.0 [8086/4609] enabled
1164 17:49:21.699264 PCI: 00:02.0 [8086/0000] bus ops
1165 17:49:21.702744 PCI: 00:02.0 [8086/46b3] enabled
1166 17:49:21.706242 PCI: 00:04.0 [8086/0000] bus ops
1167 17:49:21.709871 PCI: 00:04.0 [8086/461d] enabled
1168 17:49:21.713737 PCI: 00:06.0 [8086/0000] bus ops
1169 17:49:21.716202 PCI: 00:06.0 [8086/464d] enabled
1170 17:49:21.719361 PCI: 00:08.0 [8086/464f] disabled
1171 17:49:21.723732 PCI: 00:0a.0 [8086/467d] enabled
1172 17:49:21.726093 PCI: 00:0d.0 [8086/0000] bus ops
1173 17:49:21.729673 PCI: 00:0d.0 [8086/461e] enabled
1174 17:49:21.732574 PCI: 00:14.0 [8086/0000] bus ops
1175 17:49:21.736347 PCI: 00:14.0 [8086/51ed] enabled
1176 17:49:21.739074 PCI: 00:14.2 [8086/51ef] enabled
1177 17:49:21.742973 PCI: 00:14.3 [8086/0000] bus ops
1178 17:49:21.745859 PCI: 00:14.3 [8086/51f0] enabled
1179 17:49:21.749628 PCI: 00:15.0 [8086/0000] bus ops
1180 17:49:21.752547 PCI: 00:15.0 [8086/51e8] enabled
1181 17:49:21.755953 PCI: 00:15.1 [8086/0000] bus ops
1182 17:49:21.759360 PCI: 00:15.1 [8086/51e9] enabled
1183 17:49:21.762830 PCI: 00:15.2 [8086/0000] bus ops
1184 17:49:21.769484 PCI: 00:15.2 [8086/51ea] disabled
1185 17:49:21.772925 PCI: 00:15.3 [8086/0000] bus ops
1186 17:49:21.776353 PCI: 00:15.3 [8086/51eb] enabled
1187 17:49:21.776822 PCI: 00:16.0 [8086/0000] ops
1188 17:49:21.779644 PCI: 00:16.0 [8086/51e0] enabled
1189 17:49:21.785922 PCI: Static device PCI: 00:17.0 not found, disabling it.
1190 17:49:21.789366 PCI: 00:19.0 [8086/0000] bus ops
1191 17:49:21.793168 PCI: 00:19.0 [8086/51c5] disabled
1192 17:49:21.796119 PCI: 00:19.1 [8086/0000] bus ops
1193 17:49:21.799306 PCI: 00:19.1 [8086/51c6] enabled
1194 17:49:21.803570 PCI: 00:1e.0 [8086/0000] ops
1195 17:49:21.805892 PCI: 00:1e.0 [8086/51a8] enabled
1196 17:49:21.809512 PCI: 00:1e.3 [8086/0000] bus ops
1197 17:49:21.812349 PCI: 00:1e.3 [8086/51ab] enabled
1198 17:49:21.816079 PCI: 00:1f.0 [8086/0000] bus ops
1199 17:49:21.819119 PCI: 00:1f.0 [8086/5182] enabled
1200 17:49:21.823136 RTC Init
1201 17:49:21.825689 Set power on after power failure.
1202 17:49:21.829391 Disabling Deep S3
1203 17:49:21.829955 Disabling Deep S3
1204 17:49:21.832738 Disabling Deep S4
1205 17:49:21.833199 Disabling Deep S4
1206 17:49:21.835802 Disabling Deep S5
1207 17:49:21.836448 Disabling Deep S5
1208 17:49:21.839428 PCI: 00:1f.2 [0000/0000] hidden
1209 17:49:21.842385 PCI: 00:1f.3 [8086/0000] bus ops
1210 17:49:21.845866 PCI: 00:1f.3 [8086/51c8] enabled
1211 17:49:21.849262 PCI: 00:1f.5 [8086/0000] bus ops
1212 17:49:21.852797 PCI: 00:1f.5 [8086/51a4] enabled
1213 17:49:21.855836 GPIO: 0 enabled
1214 17:49:21.860164 PCI: Leftover static devices:
1215 17:49:21.860969 PCI: 00:01.0
1216 17:49:21.862176 PCI: 00:01.1
1217 17:49:21.862638 PCI: 00:05.0
1218 17:49:21.863003 PCI: 00:06.2
1219 17:49:21.865539 PCI: 00:09.0
1220 17:49:21.866000 PCI: 00:0d.1
1221 17:49:21.868784 PCI: 00:0d.2
1222 17:49:21.869293 PCI: 00:0d.3
1223 17:49:21.869667 PCI: 00:0e.0
1224 17:49:21.872307 PCI: 00:10.0
1225 17:49:21.872766 PCI: 00:10.1
1226 17:49:21.875545 PCI: 00:10.6
1227 17:49:21.876009 PCI: 00:10.7
1228 17:49:21.876418 PCI: 00:12.0
1229 17:49:21.878822 PCI: 00:12.6
1230 17:49:21.879353 PCI: 00:12.7
1231 17:49:21.882263 PCI: 00:13.0
1232 17:49:21.882827 PCI: 00:14.1
1233 17:49:21.885554 PCI: 00:16.1
1234 17:49:21.886020 PCI: 00:16.2
1235 17:49:21.886384 PCI: 00:16.3
1236 17:49:21.888942 PCI: 00:16.4
1237 17:49:21.889405 PCI: 00:16.5
1238 17:49:21.892472 PCI: 00:17.0
1239 17:49:21.893039 PCI: 00:19.2
1240 17:49:21.893413 PCI: 00:1a.0
1241 17:49:21.895635 PCI: 00:1e.1
1242 17:49:21.896098 PCI: 00:1e.2
1243 17:49:21.898937 PCI: 00:1f.1
1244 17:49:21.899446 PCI: 00:1f.4
1245 17:49:21.899814 PCI: 00:1f.6
1246 17:49:21.902373 PCI: 00:1f.7
1247 17:49:21.905997 PCI: Check your devicetree.cb.
1248 17:49:21.908910 PCI: 00:02.0 scanning...
1249 17:49:21.912721 scan_generic_bus for PCI: 00:02.0
1250 17:49:21.915931 scan_generic_bus for PCI: 00:02.0 done
1251 17:49:21.918985 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1252 17:49:21.922596 PCI: 00:04.0 scanning...
1253 17:49:21.925732 scan_generic_bus for PCI: 00:04.0
1254 17:49:21.929059 GENERIC: 0.0 enabled
1255 17:49:21.932685 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1256 17:49:21.939512 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1257 17:49:21.942638 PCI: 00:06.0 scanning...
1258 17:49:21.945475 do_pci_scan_bridge for PCI: 00:06.0
1259 17:49:21.948726 PCI: pci_scan_bus for bus 01
1260 17:49:21.952584 PCI: 01:00.0 [15b7/5009] enabled
1261 17:49:21.955819 Enabling Common Clock Configuration
1262 17:49:21.959369 L1 Sub-State supported from root port 6
1263 17:49:21.962051 L1 Sub-State Support = 0x5
1264 17:49:21.965307 CommonModeRestoreTime = 0x6e
1265 17:49:21.969431 Power On Value = 0x5, Power On Scale = 0x2
1266 17:49:21.971970 ASPM: Enabled L1
1267 17:49:21.975505 PCIe: Max_Payload_Size adjusted to 256
1268 17:49:21.978931 PCI: 01:00.0: Enabled LTR
1269 17:49:21.982297 PCI: 01:00.0: Programmed LTR max latencies
1270 17:49:21.985471 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1271 17:49:21.988511 PCI: 00:0d.0 scanning...
1272 17:49:21.991709 scan_static_bus for PCI: 00:0d.0
1273 17:49:21.995863 USB0 port 0 enabled
1274 17:49:21.996690 USB0 port 0 scanning...
1275 17:49:21.998600 scan_static_bus for USB0 port 0
1276 17:49:22.001896 USB3 port 0 enabled
1277 17:49:22.005172 USB3 port 1 disabled
1278 17:49:22.005641 USB3 port 2 enabled
1279 17:49:22.008933 USB3 port 3 disabled
1280 17:49:22.011558 USB3 port 0 scanning...
1281 17:49:22.015149 scan_static_bus for USB3 port 0
1282 17:49:22.018271 scan_static_bus for USB3 port 0 done
1283 17:49:22.022048 scan_bus: bus USB3 port 0 finished in 6 msecs
1284 17:49:22.025013 USB3 port 2 scanning...
1285 17:49:22.028743 scan_static_bus for USB3 port 2
1286 17:49:22.032307 scan_static_bus for USB3 port 2 done
1287 17:49:22.035221 scan_bus: bus USB3 port 2 finished in 6 msecs
1288 17:49:22.038463 scan_static_bus for USB0 port 0 done
1289 17:49:22.045339 scan_bus: bus USB0 port 0 finished in 43 msecs
1290 17:49:22.048773 scan_static_bus for PCI: 00:0d.0 done
1291 17:49:22.051628 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1292 17:49:22.055490 PCI: 00:14.0 scanning...
1293 17:49:22.058510 scan_static_bus for PCI: 00:14.0
1294 17:49:22.061836 USB0 port 0 enabled
1295 17:49:22.065373 USB0 port 0 scanning...
1296 17:49:22.068392 scan_static_bus for USB0 port 0
1297 17:49:22.068966 USB2 port 0 enabled
1298 17:49:22.071551 USB2 port 1 disabled
1299 17:49:22.072129 USB2 port 2 enabled
1300 17:49:22.074884 USB2 port 3 disabled
1301 17:49:22.078723 USB2 port 4 disabled
1302 17:49:22.079308 USB2 port 5 enabled
1303 17:49:22.081836 USB2 port 6 disabled
1304 17:49:22.085060 USB2 port 7 disabled
1305 17:49:22.085533 USB2 port 8 enabled
1306 17:49:22.088523 USB2 port 9 enabled
1307 17:49:22.089006 USB3 port 0 enabled
1308 17:49:22.091826 USB3 port 1 disabled
1309 17:49:22.095069 USB3 port 2 disabled
1310 17:49:22.095703 USB3 port 3 disabled
1311 17:49:22.098558 USB2 port 0 scanning...
1312 17:49:22.101313 scan_static_bus for USB2 port 0
1313 17:49:22.104683 scan_static_bus for USB2 port 0 done
1314 17:49:22.111352 scan_bus: bus USB2 port 0 finished in 6 msecs
1315 17:49:22.112004 USB2 port 2 scanning...
1316 17:49:22.114609 scan_static_bus for USB2 port 2
1317 17:49:22.117946 scan_static_bus for USB2 port 2 done
1318 17:49:22.125041 scan_bus: bus USB2 port 2 finished in 6 msecs
1319 17:49:22.127967 USB2 port 5 scanning...
1320 17:49:22.131514 scan_static_bus for USB2 port 5
1321 17:49:22.135233 scan_static_bus for USB2 port 5 done
1322 17:49:22.138033 scan_bus: bus USB2 port 5 finished in 6 msecs
1323 17:49:22.141096 USB2 port 8 scanning...
1324 17:49:22.144682 scan_static_bus for USB2 port 8
1325 17:49:22.147883 scan_static_bus for USB2 port 8 done
1326 17:49:22.151280 scan_bus: bus USB2 port 8 finished in 6 msecs
1327 17:49:22.155272 USB2 port 9 scanning...
1328 17:49:22.158221 scan_static_bus for USB2 port 9
1329 17:49:22.162168 scan_static_bus for USB2 port 9 done
1330 17:49:22.164451 scan_bus: bus USB2 port 9 finished in 6 msecs
1331 17:49:22.167979 USB3 port 0 scanning...
1332 17:49:22.171726 scan_static_bus for USB3 port 0
1333 17:49:22.174754 scan_static_bus for USB3 port 0 done
1334 17:49:22.181995 scan_bus: bus USB3 port 0 finished in 6 msecs
1335 17:49:22.184533 scan_static_bus for USB0 port 0 done
1336 17:49:22.188128 scan_bus: bus USB0 port 0 finished in 120 msecs
1337 17:49:22.191006 scan_static_bus for PCI: 00:14.0 done
1338 17:49:22.198039 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1339 17:49:22.201108 PCI: 00:14.3 scanning...
1340 17:49:22.204390 scan_static_bus for PCI: 00:14.3
1341 17:49:22.204855 GENERIC: 0.0 enabled
1342 17:49:22.207667 scan_static_bus for PCI: 00:14.3 done
1343 17:49:22.214623 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1344 17:49:22.217866 PCI: 00:15.0 scanning...
1345 17:49:22.221083 scan_static_bus for PCI: 00:15.0
1346 17:49:22.221547 I2C: 00:1a enabled
1347 17:49:22.224824 I2C: 00:31 enabled
1348 17:49:22.225455 I2C: 00:32 enabled
1349 17:49:22.227761 scan_static_bus for PCI: 00:15.0 done
1350 17:49:22.234288 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1351 17:49:22.237880 PCI: 00:15.1 scanning...
1352 17:49:22.241436 scan_static_bus for PCI: 00:15.1
1353 17:49:22.241903 I2C: 00:50 enabled
1354 17:49:22.244406 scan_static_bus for PCI: 00:15.1 done
1355 17:49:22.251112 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1356 17:49:22.254334 PCI: 00:15.3 scanning...
1357 17:49:22.257343 scan_static_bus for PCI: 00:15.3
1358 17:49:22.257813 I2C: 00:10 enabled
1359 17:49:22.260604 scan_static_bus for PCI: 00:15.3 done
1360 17:49:22.267486 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1361 17:49:22.270945 PCI: 00:19.1 scanning...
1362 17:49:22.274349 scan_static_bus for PCI: 00:19.1
1363 17:49:22.274922 I2C: 00:15 enabled
1364 17:49:22.277694 I2C: 00:2c enabled
1365 17:49:22.280821 scan_static_bus for PCI: 00:19.1 done
1366 17:49:22.284220 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1367 17:49:22.287491 PCI: 00:1e.3 scanning...
1368 17:49:22.290652 scan_generic_bus for PCI: 00:1e.3
1369 17:49:22.294513 SPI: 00 enabled
1370 17:49:22.297525 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1371 17:49:22.304662 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1372 17:49:22.308111 PCI: 00:1f.0 scanning...
1373 17:49:22.310623 scan_static_bus for PCI: 00:1f.0
1374 17:49:22.311094 PNP: 0c09.0 enabled
1375 17:49:22.313842 PNP: 0c09.0 scanning...
1376 17:49:22.317531 scan_static_bus for PNP: 0c09.0
1377 17:49:22.320496 scan_static_bus for PNP: 0c09.0 done
1378 17:49:22.324150 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1379 17:49:22.330972 scan_static_bus for PCI: 00:1f.0 done
1380 17:49:22.334152 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1381 17:49:22.337327 PCI: 00:1f.2 scanning...
1382 17:49:22.340915 scan_static_bus for PCI: 00:1f.2
1383 17:49:22.341485 GENERIC: 0.0 enabled
1384 17:49:22.343830 GENERIC: 0.0 scanning...
1385 17:49:22.347106 scan_static_bus for GENERIC: 0.0
1386 17:49:22.350673 GENERIC: 0.0 enabled
1387 17:49:22.353633 GENERIC: 1.0 enabled
1388 17:49:22.357133 scan_static_bus for GENERIC: 0.0 done
1389 17:49:22.360524 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1390 17:49:22.363534 scan_static_bus for PCI: 00:1f.2 done
1391 17:49:22.370982 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1392 17:49:22.371557 PCI: 00:1f.3 scanning...
1393 17:49:22.374320 scan_static_bus for PCI: 00:1f.3
1394 17:49:22.380473 scan_static_bus for PCI: 00:1f.3 done
1395 17:49:22.384416 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1396 17:49:22.386977 PCI: 00:1f.5 scanning...
1397 17:49:22.390350 scan_generic_bus for PCI: 00:1f.5
1398 17:49:22.393801 scan_generic_bus for PCI: 00:1f.5 done
1399 17:49:22.397224 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1400 17:49:22.403258 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1401 17:49:22.406984 scan_static_bus for Root Device done
1402 17:49:22.409831 scan_bus: bus Root Device finished in 729 msecs
1403 17:49:22.413383 done
1404 17:49:22.416606 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1405 17:49:22.423428 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1406 17:49:22.430537 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1407 17:49:22.433626 SPI flash protection: WPSW=0 SRP0=0
1408 17:49:22.440555 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1409 17:49:22.444486 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1410 17:49:22.446750 found VGA at PCI: 00:02.0
1411 17:49:22.450546 Setting up VGA for PCI: 00:02.0
1412 17:49:22.456584 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1413 17:49:22.460575 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1414 17:49:22.463399 Allocating resources...
1415 17:49:22.466866 Reading resources...
1416 17:49:22.470194 Root Device read_resources bus 0 link: 0
1417 17:49:22.473133 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1418 17:49:22.480959 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1419 17:49:22.483261 DOMAIN: 0000 read_resources bus 0 link: 0
1420 17:49:22.489862 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1421 17:49:22.496764 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1422 17:49:22.499997 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1423 17:49:22.506657 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1424 17:49:22.513863 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1425 17:49:22.519816 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1426 17:49:22.526133 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1427 17:49:22.533117 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1428 17:49:22.540125 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1429 17:49:22.546489 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1430 17:49:22.552835 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1431 17:49:22.559729 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1432 17:49:22.566199 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1433 17:49:22.572923 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1434 17:49:22.576175 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1435 17:49:22.583236 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1436 17:49:22.589897 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1437 17:49:22.596476 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1438 17:49:22.603222 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1439 17:49:22.609177 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1440 17:49:22.616284 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1441 17:49:22.619471 PCI: 00:04.0 read_resources bus 1 link: 0
1442 17:49:22.623039 PCI: 00:04.0 read_resources bus 1 link: 0 done
1443 17:49:22.629669 PCI: 00:06.0 read_resources bus 1 link: 0
1444 17:49:22.632470 PCI: 00:06.0 read_resources bus 1 link: 0 done
1445 17:49:22.636261 PCI: 00:0d.0 read_resources bus 0 link: 0
1446 17:49:22.642487 USB0 port 0 read_resources bus 0 link: 0
1447 17:49:22.646139 USB0 port 0 read_resources bus 0 link: 0 done
1448 17:49:22.649824 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1449 17:49:22.656360 PCI: 00:14.0 read_resources bus 0 link: 0
1450 17:49:22.659833 USB0 port 0 read_resources bus 0 link: 0
1451 17:49:22.662726 USB0 port 0 read_resources bus 0 link: 0 done
1452 17:49:22.669744 PCI: 00:14.0 read_resources bus 0 link: 0 done
1453 17:49:22.672319 PCI: 00:14.3 read_resources bus 0 link: 0
1454 17:49:22.676186 PCI: 00:14.3 read_resources bus 0 link: 0 done
1455 17:49:22.682548 PCI: 00:15.0 read_resources bus 0 link: 0
1456 17:49:22.685968 PCI: 00:15.0 read_resources bus 0 link: 0 done
1457 17:49:22.688902 PCI: 00:15.1 read_resources bus 0 link: 0
1458 17:49:22.695991 PCI: 00:15.1 read_resources bus 0 link: 0 done
1459 17:49:22.699757 PCI: 00:15.3 read_resources bus 0 link: 0
1460 17:49:22.706360 PCI: 00:15.3 read_resources bus 0 link: 0 done
1461 17:49:22.709286 PCI: 00:19.1 read_resources bus 0 link: 0
1462 17:49:22.712298 PCI: 00:19.1 read_resources bus 0 link: 0 done
1463 17:49:22.719610 PCI: 00:1e.3 read_resources bus 2 link: 0
1464 17:49:22.722259 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1465 17:49:22.725861 PCI: 00:1f.0 read_resources bus 0 link: 0
1466 17:49:22.732723 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1467 17:49:22.735642 PCI: 00:1f.2 read_resources bus 0 link: 0
1468 17:49:22.739039 GENERIC: 0.0 read_resources bus 0 link: 0
1469 17:49:22.745881 GENERIC: 0.0 read_resources bus 0 link: 0 done
1470 17:49:22.749076 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1471 17:49:22.755609 DOMAIN: 0000 read_resources bus 0 link: 0 done
1472 17:49:22.759015 Root Device read_resources bus 0 link: 0 done
1473 17:49:22.762114 Done reading resources.
1474 17:49:22.768902 Show resources in subtree (Root Device)...After reading.
1475 17:49:22.772535 Root Device child on link 0 CPU_CLUSTER: 0
1476 17:49:22.775651 CPU_CLUSTER: 0 child on link 0 APIC: 00
1477 17:49:22.776229 APIC: 00
1478 17:49:22.778590 APIC: 16
1479 17:49:22.779058 APIC: 10
1480 17:49:22.781733 APIC: 12
1481 17:49:22.782209 APIC: 14
1482 17:49:22.782638 APIC: 09
1483 17:49:22.785390 APIC: 01
1484 17:49:22.785880 APIC: 08
1485 17:49:22.788873 DOMAIN: 0000 child on link 0 GPIO: 0
1486 17:49:22.798734 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1487 17:49:22.808701 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1488 17:49:22.812181 GPIO: 0
1489 17:49:22.812691 PCI: 00:00.0
1490 17:49:22.822086 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1491 17:49:22.831724 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1492 17:49:22.838471 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1493 17:49:22.848459 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1494 17:49:22.858384 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1495 17:49:22.868415 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1496 17:49:22.879105 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1497 17:49:22.888225 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1498 17:49:22.898169 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1499 17:49:22.905171 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1500 17:49:22.914593 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1501 17:49:22.924780 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1502 17:49:22.934715 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1503 17:49:22.944680 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1504 17:49:22.955308 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1505 17:49:22.961463 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1506 17:49:22.971347 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1507 17:49:22.981415 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1508 17:49:22.991452 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1509 17:49:23.000907 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1510 17:49:23.010918 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1511 17:49:23.021006 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1512 17:49:23.030538 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1513 17:49:23.037220 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1514 17:49:23.050979 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1515 17:49:23.058063 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1516 17:49:23.067135 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1517 17:49:23.077561 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1518 17:49:23.080756 PCI: 00:02.0
1519 17:49:23.090497 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1520 17:49:23.100304 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1521 17:49:23.107105 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1522 17:49:23.113532 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1523 17:49:23.124407 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1524 17:49:23.124970 GENERIC: 0.0
1525 17:49:23.130593 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1526 17:49:23.137191 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1527 17:49:23.146959 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1528 17:49:23.157132 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1529 17:49:23.157676 PCI: 01:00.0
1530 17:49:23.166601 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1531 17:49:23.177251 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1532 17:49:23.180551 PCI: 00:08.0
1533 17:49:23.181003 PCI: 00:0a.0
1534 17:49:23.190459 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1535 17:49:23.196648 PCI: 00:0d.0 child on link 0 USB0 port 0
1536 17:49:23.206464 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1537 17:49:23.209653 USB0 port 0 child on link 0 USB3 port 0
1538 17:49:23.213196 USB3 port 0
1539 17:49:23.213650 USB3 port 1
1540 17:49:23.216696 USB3 port 2
1541 17:49:23.217152 USB3 port 3
1542 17:49:23.223365 PCI: 00:14.0 child on link 0 USB0 port 0
1543 17:49:23.232797 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1544 17:49:23.236537 USB0 port 0 child on link 0 USB2 port 0
1545 17:49:23.236994 USB2 port 0
1546 17:49:23.239619 USB2 port 1
1547 17:49:23.243852 USB2 port 2
1548 17:49:23.244450 USB2 port 3
1549 17:49:23.246644 USB2 port 4
1550 17:49:23.247181 USB2 port 5
1551 17:49:23.249575 USB2 port 6
1552 17:49:23.250045 USB2 port 7
1553 17:49:23.252774 USB2 port 8
1554 17:49:23.253240 USB2 port 9
1555 17:49:23.256539 USB3 port 0
1556 17:49:23.257003 USB3 port 1
1557 17:49:23.259739 USB3 port 2
1558 17:49:23.260340 USB3 port 3
1559 17:49:23.263894 PCI: 00:14.2
1560 17:49:23.272786 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 17:49:23.283018 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1562 17:49:23.285950 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1563 17:49:23.296014 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1564 17:49:23.299391 GENERIC: 0.0
1565 17:49:23.302984 PCI: 00:15.0 child on link 0 I2C: 00:1a
1566 17:49:23.312748 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 17:49:23.316181 I2C: 00:1a
1568 17:49:23.316777 I2C: 00:31
1569 17:49:23.317165 I2C: 00:32
1570 17:49:23.323062 PCI: 00:15.1 child on link 0 I2C: 00:50
1571 17:49:23.332597 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 17:49:23.333133 I2C: 00:50
1573 17:49:23.336432 PCI: 00:15.2
1574 17:49:23.339916 PCI: 00:15.3 child on link 0 I2C: 00:10
1575 17:49:23.349393 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 17:49:23.352762 I2C: 00:10
1577 17:49:23.353236 PCI: 00:16.0
1578 17:49:23.362437 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1579 17:49:23.365730 PCI: 00:19.0
1580 17:49:23.369127 PCI: 00:19.1 child on link 0 I2C: 00:15
1581 17:49:23.379251 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1582 17:49:23.379799 I2C: 00:15
1583 17:49:23.382833 I2C: 00:2c
1584 17:49:23.383426 PCI: 00:1e.0
1585 17:49:23.396357 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1586 17:49:23.399281 PCI: 00:1e.3 child on link 0 SPI: 00
1587 17:49:23.409242 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1588 17:49:23.409862 SPI: 00
1589 17:49:23.416513 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1590 17:49:23.422268 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1591 17:49:23.425684 PNP: 0c09.0
1592 17:49:23.432405 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1593 17:49:23.439150 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1594 17:49:23.445553 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1595 17:49:23.455662 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1596 17:49:23.462490 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1597 17:49:23.463063 GENERIC: 0.0
1598 17:49:23.465912 GENERIC: 1.0
1599 17:49:23.466482 PCI: 00:1f.3
1600 17:49:23.475688 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1601 17:49:23.485498 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1602 17:49:23.488975 PCI: 00:1f.5
1603 17:49:23.498876 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1604 17:49:23.505745 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1605 17:49:23.508937 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1606 17:49:23.515568 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1607 17:49:23.522267 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1608 17:49:23.525256 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1609 17:49:23.532664 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1610 17:49:23.538977 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1611 17:49:23.545408 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1612 17:49:23.551629 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1613 17:49:23.562172 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1614 17:49:23.565411 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1615 17:49:23.575063 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1616 17:49:23.581789 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1617 17:49:23.588662 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1618 17:49:23.591964 DOMAIN: 0000: Resource ranges:
1619 17:49:23.595231 * Base: 1000, Size: 800, Tag: 100
1620 17:49:23.598550 * Base: 1900, Size: e700, Tag: 100
1621 17:49:23.605479 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1622 17:49:23.611669 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1623 17:49:23.618528 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1624 17:49:23.624886 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1625 17:49:23.635428 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1626 17:49:23.642512 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1627 17:49:23.647801 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1628 17:49:23.658281 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1629 17:49:23.664583 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1630 17:49:23.670802 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1631 17:49:23.681641 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1632 17:49:23.687813 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1633 17:49:23.694894 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1634 17:49:23.705147 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1635 17:49:23.711039 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1636 17:49:23.717306 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1637 17:49:23.727693 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1638 17:49:23.734918 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1639 17:49:23.741105 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1640 17:49:23.750982 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1641 17:49:23.757798 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1642 17:49:23.763996 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1643 17:49:23.774153 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1644 17:49:23.780442 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1645 17:49:23.787683 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1646 17:49:23.797015 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1647 17:49:23.804618 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1648 17:49:23.810650 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1649 17:49:23.820479 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1650 17:49:23.827242 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1651 17:49:23.833783 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1652 17:49:23.844425 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1653 17:49:23.850335 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1654 17:49:23.853991 DOMAIN: 0000: Resource ranges:
1655 17:49:23.856939 * Base: 80400000, Size: 3fc00000, Tag: 200
1656 17:49:23.860285 * Base: d0000000, Size: 28000000, Tag: 200
1657 17:49:23.866998 * Base: fa000000, Size: 1000000, Tag: 200
1658 17:49:23.870064 * Base: fb001000, Size: 17ff000, Tag: 200
1659 17:49:23.873520 * Base: fe800000, Size: 300000, Tag: 200
1660 17:49:23.880432 * Base: feb80000, Size: 80000, Tag: 200
1661 17:49:23.883762 * Base: fed00000, Size: 40000, Tag: 200
1662 17:49:23.886591 * Base: fed70000, Size: 10000, Tag: 200
1663 17:49:23.890345 * Base: fed88000, Size: 8000, Tag: 200
1664 17:49:23.893216 * Base: fed93000, Size: d000, Tag: 200
1665 17:49:23.899861 * Base: feda2000, Size: 1e000, Tag: 200
1666 17:49:23.903180 * Base: fede0000, Size: 1220000, Tag: 200
1667 17:49:23.906456 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1668 17:49:23.916537 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1669 17:49:23.923230 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1670 17:49:23.930014 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1671 17:49:23.936781 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1672 17:49:23.943192 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1673 17:49:23.949610 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1674 17:49:23.956314 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1675 17:49:23.962985 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1676 17:49:23.970177 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1677 17:49:23.976316 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1678 17:49:23.983228 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1679 17:49:23.990191 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1680 17:49:23.996478 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1681 17:49:24.003126 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1682 17:49:24.009437 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1683 17:49:24.015990 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1684 17:49:24.023041 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1685 17:49:24.029319 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1686 17:49:24.035812 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1687 17:49:24.042586 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1688 17:49:24.049718 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1689 17:49:24.053343 PCI: 00:06.0: Resource ranges:
1690 17:49:24.055944 * Base: 80400000, Size: 100000, Tag: 200
1691 17:49:24.062600 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1692 17:49:24.069454 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1693 17:49:24.079829 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1694 17:49:24.085973 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1695 17:49:24.089015 Root Device assign_resources, bus 0 link: 0
1696 17:49:24.095828 DOMAIN: 0000 assign_resources, bus 0 link: 0
1697 17:49:24.102297 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1698 17:49:24.112171 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1699 17:49:24.119062 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1700 17:49:24.129137 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1701 17:49:24.132588 PCI: 00:04.0 assign_resources, bus 1 link: 0
1702 17:49:24.136196 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1703 17:49:24.145802 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1704 17:49:24.155449 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1705 17:49:24.165405 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1706 17:49:24.168937 PCI: 00:06.0 assign_resources, bus 1 link: 0
1707 17:49:24.175104 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1708 17:49:24.185418 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1709 17:49:24.188858 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1710 17:49:24.198805 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1711 17:49:24.204916 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1712 17:49:24.208052 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1713 17:49:24.214998 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1714 17:49:24.221656 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1715 17:49:24.228685 PCI: 00:14.0 assign_resources, bus 0 link: 0
1716 17:49:24.231321 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1717 17:49:24.242223 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1718 17:49:24.248532 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1719 17:49:24.254574 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1720 17:49:24.261413 PCI: 00:14.3 assign_resources, bus 0 link: 0
1721 17:49:24.264402 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1722 17:49:24.274146 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1723 17:49:24.277944 PCI: 00:15.0 assign_resources, bus 0 link: 0
1724 17:49:24.284618 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1725 17:49:24.291404 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1726 17:49:24.295158 PCI: 00:15.1 assign_resources, bus 0 link: 0
1727 17:49:24.301309 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1728 17:49:24.307586 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1729 17:49:24.314212 PCI: 00:15.3 assign_resources, bus 0 link: 0
1730 17:49:24.317436 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1731 17:49:24.328173 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1732 17:49:24.334521 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1733 17:49:24.337391 PCI: 00:19.1 assign_resources, bus 0 link: 0
1734 17:49:24.344127 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1735 17:49:24.350804 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1736 17:49:24.357575 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1737 17:49:24.360634 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1738 17:49:24.364169 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1739 17:49:24.371020 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1740 17:49:24.373667 LPC: Trying to open IO window from 800 size 1ff
1741 17:49:24.384233 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1742 17:49:24.390709 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1743 17:49:24.400454 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1744 17:49:24.404427 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1745 17:49:24.410727 Root Device assign_resources, bus 0 link: 0 done
1746 17:49:24.411318 Done setting resources.
1747 17:49:24.417756 Show resources in subtree (Root Device)...After assigning values.
1748 17:49:24.423462 Root Device child on link 0 CPU_CLUSTER: 0
1749 17:49:24.426901 CPU_CLUSTER: 0 child on link 0 APIC: 00
1750 17:49:24.427363 APIC: 00
1751 17:49:24.430390 APIC: 16
1752 17:49:24.430933 APIC: 10
1753 17:49:24.431303 APIC: 12
1754 17:49:24.433820 APIC: 14
1755 17:49:24.434279 APIC: 09
1756 17:49:24.437107 APIC: 01
1757 17:49:24.437604 APIC: 08
1758 17:49:24.440998 DOMAIN: 0000 child on link 0 GPIO: 0
1759 17:49:24.450670 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1760 17:49:24.460463 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1761 17:49:24.461023 GPIO: 0
1762 17:49:24.463890 PCI: 00:00.0
1763 17:49:24.473687 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1764 17:49:24.479935 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1765 17:49:24.489675 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1766 17:49:24.499871 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1767 17:49:24.510366 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1768 17:49:24.519750 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1769 17:49:24.529770 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1770 17:49:24.536532 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1771 17:49:24.546228 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1772 17:49:24.556137 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1773 17:49:24.566643 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1774 17:49:24.576454 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1775 17:49:24.586690 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1776 17:49:24.596299 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1777 17:49:24.603219 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1778 17:49:24.612369 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1779 17:49:24.622244 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1780 17:49:24.632350 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1781 17:49:24.642782 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1782 17:49:24.652004 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1783 17:49:24.662819 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1784 17:49:24.672206 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1785 17:49:24.678762 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1786 17:49:24.688671 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1787 17:49:24.699044 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1788 17:49:24.708886 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1789 17:49:24.718626 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1790 17:49:24.729044 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1791 17:49:24.729630 PCI: 00:02.0
1792 17:49:24.741670 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1793 17:49:24.751798 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1794 17:49:24.761990 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1795 17:49:24.765092 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1796 17:49:24.775474 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1797 17:49:24.778003 GENERIC: 0.0
1798 17:49:24.781635 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1799 17:49:24.791688 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1800 17:49:24.802050 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1801 17:49:24.811314 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1802 17:49:24.815126 PCI: 01:00.0
1803 17:49:24.825184 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1804 17:49:24.835797 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1805 17:49:24.838277 PCI: 00:08.0
1806 17:49:24.838750 PCI: 00:0a.0
1807 17:49:24.848488 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1808 17:49:24.854646 PCI: 00:0d.0 child on link 0 USB0 port 0
1809 17:49:24.865542 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1810 17:49:24.867948 USB0 port 0 child on link 0 USB3 port 0
1811 17:49:24.871337 USB3 port 0
1812 17:49:24.871922 USB3 port 1
1813 17:49:24.874564 USB3 port 2
1814 17:49:24.875126 USB3 port 3
1815 17:49:24.881664 PCI: 00:14.0 child on link 0 USB0 port 0
1816 17:49:24.891285 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1817 17:49:24.894403 USB0 port 0 child on link 0 USB2 port 0
1818 17:49:24.897428 USB2 port 0
1819 17:49:24.897892 USB2 port 1
1820 17:49:24.901418 USB2 port 2
1821 17:49:24.901880 USB2 port 3
1822 17:49:24.904462 USB2 port 4
1823 17:49:24.904923 USB2 port 5
1824 17:49:24.908154 USB2 port 6
1825 17:49:24.908774 USB2 port 7
1826 17:49:24.911133 USB2 port 8
1827 17:49:24.911693 USB2 port 9
1828 17:49:24.914604 USB3 port 0
1829 17:49:24.915067 USB3 port 1
1830 17:49:24.917997 USB3 port 2
1831 17:49:24.920901 USB3 port 3
1832 17:49:24.921363 PCI: 00:14.2
1833 17:49:24.930735 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1834 17:49:24.940714 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1835 17:49:24.947611 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1836 17:49:24.957548 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1837 17:49:24.958100 GENERIC: 0.0
1838 17:49:24.964448 PCI: 00:15.0 child on link 0 I2C: 00:1a
1839 17:49:24.973961 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1840 17:49:24.974546 I2C: 00:1a
1841 17:49:24.976984 I2C: 00:31
1842 17:49:24.977541 I2C: 00:32
1843 17:49:24.980561 PCI: 00:15.1 child on link 0 I2C: 00:50
1844 17:49:24.993627 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1845 17:49:24.994097 I2C: 00:50
1846 17:49:24.997089 PCI: 00:15.2
1847 17:49:25.000617 PCI: 00:15.3 child on link 0 I2C: 00:10
1848 17:49:25.010203 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1849 17:49:25.010779 I2C: 00:10
1850 17:49:25.013570 PCI: 00:16.0
1851 17:49:25.023948 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1852 17:49:25.026786 PCI: 00:19.0
1853 17:49:25.030614 PCI: 00:19.1 child on link 0 I2C: 00:15
1854 17:49:25.040163 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1855 17:49:25.040792 I2C: 00:15
1856 17:49:25.043588 I2C: 00:2c
1857 17:49:25.044157 PCI: 00:1e.0
1858 17:49:25.057151 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1859 17:49:25.059965 PCI: 00:1e.3 child on link 0 SPI: 00
1860 17:49:25.069908 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1861 17:49:25.070481 SPI: 00
1862 17:49:25.077234 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1863 17:49:25.083226 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1864 17:49:25.086829 PNP: 0c09.0
1865 17:49:25.096878 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1866 17:49:25.100358 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1867 17:49:25.109429 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1868 17:49:25.119665 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1869 17:49:25.124106 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1870 17:49:25.126462 GENERIC: 0.0
1871 17:49:25.126933 GENERIC: 1.0
1872 17:49:25.130245 PCI: 00:1f.3
1873 17:49:25.140083 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1874 17:49:25.149954 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1875 17:49:25.150435 PCI: 00:1f.5
1876 17:49:25.162914 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1877 17:49:25.163532 Done allocating resources.
1878 17:49:25.171430 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1879 17:49:25.175585 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1880 17:49:25.179251 Configure audio over I2S with MAX98373 NAU88L25B.
1881 17:49:25.184643 Enabling BT offload
1882 17:49:25.191993 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1883 17:49:25.195570 Enabling resources...
1884 17:49:25.198619 PCI: 00:00.0 subsystem <- 8086/4609
1885 17:49:25.202628 PCI: 00:00.0 cmd <- 06
1886 17:49:25.205210 PCI: 00:02.0 subsystem <- 8086/46b3
1887 17:49:25.208273 PCI: 00:02.0 cmd <- 03
1888 17:49:25.212461 PCI: 00:04.0 subsystem <- 8086/461d
1889 17:49:25.212932 PCI: 00:04.0 cmd <- 02
1890 17:49:25.215516 PCI: 00:06.0 bridge ctrl <- 0013
1891 17:49:25.218896 PCI: 00:06.0 subsystem <- 8086/464d
1892 17:49:25.221796 PCI: 00:06.0 cmd <- 106
1893 17:49:25.225671 PCI: 00:0a.0 subsystem <- 8086/467d
1894 17:49:25.229539 PCI: 00:0a.0 cmd <- 02
1895 17:49:25.231892 PCI: 00:0d.0 subsystem <- 8086/461e
1896 17:49:25.235082 PCI: 00:0d.0 cmd <- 02
1897 17:49:25.238403 PCI: 00:14.0 subsystem <- 8086/51ed
1898 17:49:25.241714 PCI: 00:14.0 cmd <- 02
1899 17:49:25.244895 PCI: 00:14.2 subsystem <- 8086/51ef
1900 17:49:25.245366 PCI: 00:14.2 cmd <- 02
1901 17:49:25.251290 PCI: 00:14.3 subsystem <- 8086/51f0
1902 17:49:25.251849 PCI: 00:14.3 cmd <- 02
1903 17:49:25.254904 PCI: 00:15.0 subsystem <- 8086/51e8
1904 17:49:25.258146 PCI: 00:15.0 cmd <- 02
1905 17:49:25.261822 PCI: 00:15.1 subsystem <- 8086/51e9
1906 17:49:25.264706 PCI: 00:15.1 cmd <- 06
1907 17:49:25.268743 PCI: 00:15.3 subsystem <- 8086/51eb
1908 17:49:25.271236 PCI: 00:15.3 cmd <- 02
1909 17:49:25.274722 PCI: 00:16.0 subsystem <- 8086/51e0
1910 17:49:25.275217 PCI: 00:16.0 cmd <- 02
1911 17:49:25.282348 PCI: 00:19.1 subsystem <- 8086/51c6
1912 17:49:25.282848 PCI: 00:19.1 cmd <- 02
1913 17:49:25.284463 PCI: 00:1e.0 subsystem <- 8086/51a8
1914 17:49:25.288396 PCI: 00:1e.0 cmd <- 06
1915 17:49:25.291224 PCI: 00:1e.3 subsystem <- 8086/51ab
1916 17:49:25.294777 PCI: 00:1e.3 cmd <- 02
1917 17:49:25.298056 PCI: 00:1f.0 subsystem <- 8086/5182
1918 17:49:25.301706 PCI: 00:1f.0 cmd <- 407
1919 17:49:25.304689 PCI: 00:1f.3 subsystem <- 8086/51c8
1920 17:49:25.305165 PCI: 00:1f.3 cmd <- 02
1921 17:49:25.311649 PCI: 00:1f.5 subsystem <- 8086/51a4
1922 17:49:25.312226 PCI: 00:1f.5 cmd <- 406
1923 17:49:25.314713 PCI: 01:00.0 cmd <- 02
1924 17:49:25.315180 done.
1925 17:49:25.321467 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1926 17:49:25.324898 ME: Version: Unavailable
1927 17:49:25.327892 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1928 17:49:25.331308 Initializing devices...
1929 17:49:25.335080 Root Device init
1930 17:49:25.335691 mainboard: EC init
1931 17:49:25.341522 Chrome EC: Set SMI mask to 0x0000000000000000
1932 17:49:25.344673 Chrome EC: UHEPI supported
1933 17:49:25.348278 Chrome EC: clear events_b mask to 0x0000000000000000
1934 17:49:25.354483 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1935 17:49:25.361647 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1936 17:49:25.367757 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1937 17:49:25.374363 Chrome EC: Set WAKE mask to 0x0000000000000000
1938 17:49:25.377532 Root Device init finished in 41 msecs
1939 17:49:25.381214 PCI: 00:00.0 init
1940 17:49:25.384551 CPU TDP = 15 Watts
1941 17:49:25.385020 CPU PL1 = 15 Watts
1942 17:49:25.387500 CPU PL2 = 55 Watts
1943 17:49:25.390891 CPU PL4 = 123 Watts
1944 17:49:25.394425 PCI: 00:00.0 init finished in 8 msecs
1945 17:49:25.394996 PCI: 00:02.0 init
1946 17:49:25.397705 GMA: Found VBT in CBFS
1947 17:49:25.400989 GMA: Found valid VBT in CBFS
1948 17:49:25.407805 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1949 17:49:25.413996 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1950 17:49:25.417287 PCI: 00:02.0 init finished in 18 msecs
1951 17:49:25.420758 PCI: 00:06.0 init
1952 17:49:25.424700 Initializing PCH PCIe bridge.
1953 17:49:25.427461 PCI: 00:06.0 init finished in 3 msecs
1954 17:49:25.428111 PCI: 00:0a.0 init
1955 17:49:25.431834 PCI: 00:0a.0 init finished in 0 msecs
1956 17:49:25.435173 PCI: 00:14.0 init
1957 17:49:25.437513 PCI: 00:14.0 init finished in 0 msecs
1958 17:49:25.440812 PCI: 00:14.2 init
1959 17:49:25.444438 PCI: 00:14.2 init finished in 0 msecs
1960 17:49:25.445126 PCI: 00:15.0 init
1961 17:49:25.447876 I2C bus 0 version 0x3230302a
1962 17:49:25.450986 DW I2C bus 0 at 0x80655000 (400 KHz)
1963 17:49:25.457909 PCI: 00:15.0 init finished in 6 msecs
1964 17:49:25.458582 PCI: 00:15.1 init
1965 17:49:25.460760 I2C bus 1 version 0x3230302a
1966 17:49:25.464461 DW I2C bus 1 at 0x80656000 (400 KHz)
1967 17:49:25.467012 PCI: 00:15.1 init finished in 6 msecs
1968 17:49:25.470986 PCI: 00:15.3 init
1969 17:49:25.473848 I2C bus 3 version 0x3230302a
1970 17:49:25.477511 DW I2C bus 3 at 0x80657000 (400 KHz)
1971 17:49:25.480566 PCI: 00:15.3 init finished in 6 msecs
1972 17:49:25.484207 PCI: 00:16.0 init
1973 17:49:25.487587 PCI: 00:16.0 init finished in 0 msecs
1974 17:49:25.488298 PCI: 00:19.1 init
1975 17:49:25.490401 I2C bus 5 version 0x3230302a
1976 17:49:25.494276 DW I2C bus 5 at 0x80659000 (400 KHz)
1977 17:49:25.497507 PCI: 00:19.1 init finished in 6 msecs
1978 17:49:25.500778 PCI: 00:1f.0 init
1979 17:49:25.503789 IOAPIC: Initializing IOAPIC at 0xfec00000
1980 17:49:25.507297 IOAPIC: ID = 0x02
1981 17:49:25.510369 IOAPIC: Dumping registers
1982 17:49:25.510932 reg 0x0000: 0x02000000
1983 17:49:25.513400 reg 0x0001: 0x00770020
1984 17:49:25.516861 reg 0x0002: 0x00000000
1985 17:49:25.520008 IOAPIC: 120 interrupts
1986 17:49:25.523503 IOAPIC: Clearing IOAPIC at 0xfec00000
1987 17:49:25.526857 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1988 17:49:25.533539 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1989 17:49:25.536825 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1990 17:49:25.543446 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1991 17:49:25.547140 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1992 17:49:25.553465 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1993 17:49:25.557115 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1994 17:49:25.560458 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1995 17:49:25.567194 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1996 17:49:25.569968 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1997 17:49:25.576688 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1998 17:49:25.579946 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1999 17:49:25.586504 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2000 17:49:25.590154 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2001 17:49:25.597113 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2002 17:49:25.599707 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2003 17:49:25.603212 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2004 17:49:25.609855 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2005 17:49:25.613050 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2006 17:49:25.620170 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2007 17:49:25.623348 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2008 17:49:25.629768 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2009 17:49:25.633202 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2010 17:49:25.639911 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2011 17:49:25.643082 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2012 17:49:25.646215 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2013 17:49:25.653307 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2014 17:49:25.656270 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2015 17:49:25.662878 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2016 17:49:25.666414 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2017 17:49:25.672739 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2018 17:49:25.676273 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2019 17:49:25.682507 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2020 17:49:25.685837 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2021 17:49:25.692750 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2022 17:49:25.695724 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2023 17:49:25.699583 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2024 17:49:25.705938 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2025 17:49:25.709515 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2026 17:49:25.715381 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2027 17:49:25.719039 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2028 17:49:25.725905 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2029 17:49:25.729126 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2030 17:49:25.732721 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2031 17:49:25.738730 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2032 17:49:25.742431 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2033 17:49:25.748661 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2034 17:49:25.752427 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2035 17:49:25.759149 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2036 17:49:25.762943 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2037 17:49:25.769137 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2038 17:49:25.772577 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2039 17:49:25.775602 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2040 17:49:25.782263 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2041 17:49:25.785543 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2042 17:49:25.792723 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2043 17:49:25.795219 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2044 17:49:25.802500 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2045 17:49:25.805181 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2046 17:49:25.811887 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2047 17:49:25.815149 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2048 17:49:25.818934 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2049 17:49:25.825613 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2050 17:49:25.828356 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2051 17:49:25.835308 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2052 17:49:25.838244 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2053 17:49:25.845102 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2054 17:49:25.848835 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2055 17:49:25.855169 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2056 17:49:25.858471 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2057 17:49:25.862189 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2058 17:49:25.868725 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2059 17:49:25.872287 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2060 17:49:25.878444 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2061 17:49:25.881832 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2062 17:49:25.888835 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2063 17:49:25.891913 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2064 17:49:25.898332 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2065 17:49:25.901269 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2066 17:49:25.905410 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2067 17:49:25.911906 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2068 17:49:25.915051 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2069 17:49:25.921277 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2070 17:49:25.924973 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2071 17:49:25.931986 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2072 17:49:25.935529 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2073 17:49:25.941847 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2074 17:49:25.945113 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2075 17:49:25.948205 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2076 17:49:25.955815 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2077 17:49:25.958305 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2078 17:49:25.965498 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2079 17:49:25.968046 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2080 17:49:25.975457 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2081 17:49:25.978685 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2082 17:49:25.984867 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2083 17:49:25.988669 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2084 17:49:25.991181 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2085 17:49:25.998565 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2086 17:49:26.001515 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2087 17:49:26.008509 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2088 17:49:26.011498 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2089 17:49:26.017597 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2090 17:49:26.021280 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2091 17:49:26.025258 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2092 17:49:26.031694 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2093 17:49:26.034211 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2094 17:49:26.041423 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2095 17:49:26.044902 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2096 17:49:26.051027 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2097 17:49:26.054361 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2098 17:49:26.060716 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2099 17:49:26.064505 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2100 17:49:26.071055 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2101 17:49:26.073983 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2102 17:49:26.077575 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2103 17:49:26.084572 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2104 17:49:26.087723 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2105 17:49:26.094440 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2106 17:49:26.097660 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2107 17:49:26.104427 IOAPIC: Bootstrap Processor Local APIC = 0x00
2108 17:49:26.107569 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2109 17:49:26.110980 PCI: 00:1f.0 init finished in 607 msecs
2110 17:49:26.114460 PCI: 00:1f.2 init
2111 17:49:26.117367 apm_control: Disabling ACPI.
2112 17:49:26.121510 APMC done.
2113 17:49:26.124456 PCI: 00:1f.2 init finished in 7 msecs
2114 17:49:26.128305 PCI: 00:1f.3 init
2115 17:49:26.131420 PCI: 00:1f.3 init finished in 0 msecs
2116 17:49:26.131886 PCI: 01:00.0 init
2117 17:49:26.135047 PCI: 01:00.0 init finished in 0 msecs
2118 17:49:26.138016 PNP: 0c09.0 init
2119 17:49:26.141355 Google Chrome EC uptime: 12.077 seconds
2120 17:49:26.147971 Google Chrome AP resets since EC boot: 1
2121 17:49:26.151325 Google Chrome most recent AP reset causes:
2122 17:49:26.154834 0.370: 32775 shutdown: entering G3
2123 17:49:26.160852 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2124 17:49:26.164496 PNP: 0c09.0 init finished in 23 msecs
2125 17:49:26.167789 GENERIC: 0.0 init
2126 17:49:26.170973 GENERIC: 0.0 init finished in 0 msecs
2127 17:49:26.171608 GENERIC: 1.0 init
2128 17:49:26.177785 GENERIC: 1.0 init finished in 0 msecs
2129 17:49:26.178356 Devices initialized
2130 17:49:26.181103 Show all devs... After init.
2131 17:49:26.184522 Root Device: enabled 1
2132 17:49:26.188220 CPU_CLUSTER: 0: enabled 1
2133 17:49:26.188753 DOMAIN: 0000: enabled 1
2134 17:49:26.191241 GPIO: 0: enabled 1
2135 17:49:26.194924 PCI: 00:00.0: enabled 1
2136 17:49:26.195391 PCI: 00:01.0: enabled 0
2137 17:49:26.199081 PCI: 00:01.1: enabled 0
2138 17:49:26.201544 PCI: 00:02.0: enabled 1
2139 17:49:26.204413 PCI: 00:04.0: enabled 1
2140 17:49:26.204886 PCI: 00:05.0: enabled 0
2141 17:49:26.207824 PCI: 00:06.0: enabled 1
2142 17:49:26.211315 PCI: 00:06.2: enabled 0
2143 17:49:26.211868 PCI: 00:07.0: enabled 0
2144 17:49:26.214312 PCI: 00:07.1: enabled 0
2145 17:49:26.217715 PCI: 00:07.2: enabled 0
2146 17:49:26.220957 PCI: 00:07.3: enabled 0
2147 17:49:26.221426 PCI: 00:08.0: enabled 0
2148 17:49:26.225552 PCI: 00:09.0: enabled 0
2149 17:49:26.227483 PCI: 00:0a.0: enabled 1
2150 17:49:26.230954 PCI: 00:0d.0: enabled 1
2151 17:49:26.231419 PCI: 00:0d.1: enabled 0
2152 17:49:26.233962 PCI: 00:0d.2: enabled 0
2153 17:49:26.237609 PCI: 00:0d.3: enabled 0
2154 17:49:26.240814 PCI: 00:0e.0: enabled 0
2155 17:49:26.241282 PCI: 00:10.0: enabled 0
2156 17:49:26.244180 PCI: 00:10.1: enabled 0
2157 17:49:26.248137 PCI: 00:10.6: enabled 0
2158 17:49:26.250577 PCI: 00:10.7: enabled 0
2159 17:49:26.251041 PCI: 00:12.0: enabled 0
2160 17:49:26.254251 PCI: 00:12.6: enabled 0
2161 17:49:26.257395 PCI: 00:12.7: enabled 0
2162 17:49:26.257858 PCI: 00:13.0: enabled 0
2163 17:49:26.260464 PCI: 00:14.0: enabled 1
2164 17:49:26.263843 PCI: 00:14.1: enabled 0
2165 17:49:26.267609 PCI: 00:14.2: enabled 1
2166 17:49:26.268142 PCI: 00:14.3: enabled 1
2167 17:49:26.270466 PCI: 00:15.0: enabled 1
2168 17:49:26.273838 PCI: 00:15.1: enabled 1
2169 17:49:26.277334 PCI: 00:15.2: enabled 0
2170 17:49:26.277837 PCI: 00:15.3: enabled 1
2171 17:49:26.280620 PCI: 00:16.0: enabled 1
2172 17:49:26.283948 PCI: 00:16.1: enabled 0
2173 17:49:26.287226 PCI: 00:16.2: enabled 0
2174 17:49:26.287687 PCI: 00:16.3: enabled 0
2175 17:49:26.290897 PCI: 00:16.4: enabled 0
2176 17:49:26.294503 PCI: 00:16.5: enabled 0
2177 17:49:26.295096 PCI: 00:17.0: enabled 0
2178 17:49:26.297842 PCI: 00:19.0: enabled 0
2179 17:49:26.301452 PCI: 00:19.1: enabled 1
2180 17:49:26.304110 PCI: 00:19.2: enabled 0
2181 17:49:26.304654 PCI: 00:1a.0: enabled 0
2182 17:49:26.308316 PCI: 00:1c.0: enabled 0
2183 17:49:26.310647 PCI: 00:1c.1: enabled 0
2184 17:49:26.314196 PCI: 00:1c.2: enabled 0
2185 17:49:26.314655 PCI: 00:1c.3: enabled 0
2186 17:49:26.317017 PCI: 00:1c.4: enabled 0
2187 17:49:26.320343 PCI: 00:1c.5: enabled 0
2188 17:49:26.323667 PCI: 00:1c.6: enabled 0
2189 17:49:26.324157 PCI: 00:1c.7: enabled 0
2190 17:49:26.327558 PCI: 00:1d.0: enabled 0
2191 17:49:26.330341 PCI: 00:1d.1: enabled 0
2192 17:49:26.333670 PCI: 00:1d.2: enabled 0
2193 17:49:26.334155 PCI: 00:1d.3: enabled 0
2194 17:49:26.336987 PCI: 00:1e.0: enabled 1
2195 17:49:26.340187 PCI: 00:1e.1: enabled 0
2196 17:49:26.340696 PCI: 00:1e.2: enabled 0
2197 17:49:26.343558 PCI: 00:1e.3: enabled 1
2198 17:49:26.347850 PCI: 00:1f.0: enabled 1
2199 17:49:26.350651 PCI: 00:1f.1: enabled 0
2200 17:49:26.351230 PCI: 00:1f.2: enabled 1
2201 17:49:26.353736 PCI: 00:1f.3: enabled 1
2202 17:49:26.357790 PCI: 00:1f.4: enabled 0
2203 17:49:26.360099 PCI: 00:1f.5: enabled 1
2204 17:49:26.360605 PCI: 00:1f.6: enabled 0
2205 17:49:26.363986 PCI: 00:1f.7: enabled 0
2206 17:49:26.367360 GENERIC: 0.0: enabled 1
2207 17:49:26.370301 GENERIC: 0.0: enabled 1
2208 17:49:26.370870 GENERIC: 1.0: enabled 1
2209 17:49:26.373506 GENERIC: 0.0: enabled 1
2210 17:49:26.377010 GENERIC: 1.0: enabled 1
2211 17:49:26.380630 USB0 port 0: enabled 1
2212 17:49:26.381199 USB0 port 0: enabled 1
2213 17:49:26.383513 GENERIC: 0.0: enabled 1
2214 17:49:26.386908 I2C: 00:1a: enabled 1
2215 17:49:26.387373 I2C: 00:31: enabled 1
2216 17:49:26.389920 I2C: 00:32: enabled 1
2217 17:49:26.393322 I2C: 00:50: enabled 1
2218 17:49:26.393788 I2C: 00:10: enabled 1
2219 17:49:26.396613 I2C: 00:15: enabled 1
2220 17:49:26.400076 I2C: 00:2c: enabled 1
2221 17:49:26.400588 GENERIC: 0.0: enabled 1
2222 17:49:26.403903 SPI: 00: enabled 1
2223 17:49:26.406750 PNP: 0c09.0: enabled 1
2224 17:49:26.407293 GENERIC: 0.0: enabled 1
2225 17:49:26.410563 USB3 port 0: enabled 1
2226 17:49:26.413124 USB3 port 1: enabled 0
2227 17:49:26.416438 USB3 port 2: enabled 1
2228 17:49:26.416904 USB3 port 3: enabled 0
2229 17:49:26.420031 USB2 port 0: enabled 1
2230 17:49:26.423221 USB2 port 1: enabled 0
2231 17:49:26.423820 USB2 port 2: enabled 1
2232 17:49:26.426620 USB2 port 3: enabled 0
2233 17:49:26.430165 USB2 port 4: enabled 0
2234 17:49:26.433398 USB2 port 5: enabled 1
2235 17:49:26.433860 USB2 port 6: enabled 0
2236 17:49:26.436760 USB2 port 7: enabled 0
2237 17:49:26.440392 USB2 port 8: enabled 1
2238 17:49:26.440923 USB2 port 9: enabled 1
2239 17:49:26.443439 USB3 port 0: enabled 1
2240 17:49:26.446729 USB3 port 1: enabled 0
2241 17:49:26.447269 USB3 port 2: enabled 0
2242 17:49:26.450136 USB3 port 3: enabled 0
2243 17:49:26.453105 GENERIC: 0.0: enabled 1
2244 17:49:26.456205 GENERIC: 1.0: enabled 1
2245 17:49:26.456715 APIC: 00: enabled 1
2246 17:49:26.459854 APIC: 16: enabled 1
2247 17:49:26.460372 APIC: 10: enabled 1
2248 17:49:26.463505 APIC: 12: enabled 1
2249 17:49:26.467489 APIC: 14: enabled 1
2250 17:49:26.468060 APIC: 09: enabled 1
2251 17:49:26.470158 APIC: 01: enabled 1
2252 17:49:26.473783 APIC: 08: enabled 1
2253 17:49:26.474365 PCI: 01:00.0: enabled 1
2254 17:49:26.480325 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2255 17:49:26.483074 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2256 17:49:26.490393 ELOG: NV offset 0xf20000 size 0x4000
2257 17:49:26.496542 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2258 17:49:26.503164 ELOG: Event(17) added with size 13 at 2024-03-19 17:49:26 UTC
2259 17:49:26.509468 ELOG: Event(9E) added with size 10 at 2024-03-19 17:49:26 UTC
2260 17:49:26.516354 ELOG: Event(9F) added with size 14 at 2024-03-19 17:49:26 UTC
2261 17:49:26.522888 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2262 17:49:26.529393 ELOG: Event(A0) added with size 9 at 2024-03-19 17:49:26 UTC
2263 17:49:26.532500 elog_add_boot_reason: Logged dev mode boot
2264 17:49:26.539437 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2265 17:49:26.539996 Finalize devices...
2266 17:49:26.542721 PCI: 00:16.0 final
2267 17:49:26.543281 PCI: 00:1f.2 final
2268 17:49:26.545932 GENERIC: 0.0 final
2269 17:49:26.552728 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2270 17:49:26.553290 GENERIC: 1.0 final
2271 17:49:26.559558 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2272 17:49:26.562849 Devices finalized
2273 17:49:26.568960 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2274 17:49:26.572888 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2275 17:49:26.579411 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2276 17:49:26.582510 ME: HFSTS1 : 0x90000245
2277 17:49:26.589175 ME: HFSTS2 : 0x82100116
2278 17:49:26.592425 ME: HFSTS3 : 0x00000050
2279 17:49:26.595955 ME: HFSTS4 : 0x00004000
2280 17:49:26.602877 ME: HFSTS5 : 0x00000000
2281 17:49:26.605948 ME: HFSTS6 : 0x40600006
2282 17:49:26.608942 ME: Manufacturing Mode : NO
2283 17:49:26.612015 ME: SPI Protection Mode Enabled : YES
2284 17:49:26.616297 ME: FPFs Committed : YES
2285 17:49:26.622126 ME: Manufacturing Vars Locked : YES
2286 17:49:26.625307 ME: FW Partition Table : OK
2287 17:49:26.629005 ME: Bringup Loader Failure : NO
2288 17:49:26.632198 ME: Firmware Init Complete : YES
2289 17:49:26.635559 ME: Boot Options Present : NO
2290 17:49:26.639315 ME: Update In Progress : NO
2291 17:49:26.642267 ME: D0i3 Support : YES
2292 17:49:26.648622 ME: Low Power State Enabled : NO
2293 17:49:26.651825 ME: CPU Replaced : YES
2294 17:49:26.655395 ME: CPU Replacement Valid : YES
2295 17:49:26.658685 ME: Current Working State : 5
2296 17:49:26.661987 ME: Current Operation State : 1
2297 17:49:26.665233 ME: Current Operation Mode : 0
2298 17:49:26.668698 ME: Error Code : 0
2299 17:49:26.671923 ME: Enhanced Debug Mode : NO
2300 17:49:26.675457 ME: CPU Debug Disabled : YES
2301 17:49:26.681714 ME: TXT Support : NO
2302 17:49:26.685019 ME: WP for RO is enabled : YES
2303 17:49:26.688537 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2304 17:49:26.695044 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2305 17:49:26.698418 Ramoops buffer: 0x100000@0x76899000.
2306 17:49:26.705057 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2307 17:49:26.712040 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2308 17:49:26.715409 CBFS: 'fallback/slic' not found.
2309 17:49:26.721906 ACPI: Writing ACPI tables at 7686d000.
2310 17:49:26.722541 ACPI: * FACS
2311 17:49:26.724837 ACPI: * DSDT
2312 17:49:26.731607 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2313 17:49:26.735410 ACPI: * FADT
2314 17:49:26.735876 SCI is IRQ9
2315 17:49:26.738011 ACPI: added table 1/32, length now 40
2316 17:49:26.741608 ACPI: * SSDT
2317 17:49:26.744693 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2318 17:49:26.752397 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2319 17:49:26.755487 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2320 17:49:26.759013 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2321 17:49:26.765906 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2322 17:49:26.772348 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2323 17:49:26.779227 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2324 17:49:26.782310 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2325 17:49:26.789215 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2326 17:49:26.791943 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2327 17:49:26.798863 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2328 17:49:26.802323 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2329 17:49:26.808432 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2330 17:49:26.811824 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2331 17:49:26.820224 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2332 17:49:26.823384 PS2K: Passing 80 keymaps to kernel
2333 17:49:26.830268 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2334 17:49:26.837116 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2335 17:49:26.844074 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2336 17:49:26.849983 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2337 17:49:26.857039 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2338 17:49:26.863501 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2339 17:49:26.866806 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2340 17:49:26.873071 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2341 17:49:26.880494 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2342 17:49:26.886680 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2343 17:49:26.890243 ACPI: added table 2/32, length now 44
2344 17:49:26.893866 ACPI: * MCFG
2345 17:49:26.896348 ACPI: added table 3/32, length now 48
2346 17:49:26.896818 ACPI: * TPM2
2347 17:49:26.900551 TPM2 log created at 0x7685d000
2348 17:49:26.906852 ACPI: added table 4/32, length now 52
2349 17:49:26.907417 ACPI: * LPIT
2350 17:49:26.909701 ACPI: added table 5/32, length now 56
2351 17:49:26.913051 ACPI: * MADT
2352 17:49:26.913523 SCI is IRQ9
2353 17:49:26.916418 ACPI: added table 6/32, length now 60
2354 17:49:26.919368 cmd_reg from pmc_make_ipc_cmd 1052838
2355 17:49:26.926587 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2356 17:49:26.933039 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2357 17:49:26.939487 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2358 17:49:26.943027 PMC CrashLog size in discovery mode: 0xC00
2359 17:49:26.946170 cpu crashlog bar addr: 0x80640000
2360 17:49:26.949216 cpu discovery table offset: 0x6030
2361 17:49:26.955993 cpu_crashlog_discovery_table buffer count: 0x3
2362 17:49:26.962703 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2363 17:49:26.969550 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2364 17:49:26.975853 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2365 17:49:26.978816 PMC crashLog size in discovery mode : 0xC00
2366 17:49:26.985714 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2367 17:49:26.992420 discover mode PMC crashlog size adjusted to: 0x200
2368 17:49:26.998760 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2369 17:49:27.002474 discover mode PMC crashlog size adjusted to: 0x0
2370 17:49:27.005401 m_cpu_crashLog_size : 0x3480 bytes
2371 17:49:27.008760 CPU crashLog present.
2372 17:49:27.015827 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2373 17:49:27.022175 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2374 17:49:27.022750 current = 76876550
2375 17:49:27.025537 ACPI: * DMAR
2376 17:49:27.028845 ACPI: added table 7/32, length now 64
2377 17:49:27.032365 ACPI: added table 8/32, length now 68
2378 17:49:27.035197 ACPI: * HPET
2379 17:49:27.038922 ACPI: added table 9/32, length now 72
2380 17:49:27.039389 ACPI: done.
2381 17:49:27.042218 ACPI tables: 38528 bytes.
2382 17:49:27.045023 smbios_write_tables: 76857000
2383 17:49:27.048700 EC returned error result code 3
2384 17:49:27.051881 Couldn't obtain OEM name from CBI
2385 17:49:27.055663 Create SMBIOS type 16
2386 17:49:27.058484 Create SMBIOS type 17
2387 17:49:27.058957 Create SMBIOS type 20
2388 17:49:27.061743 GENERIC: 0.0 (WIFI Device)
2389 17:49:27.065223 SMBIOS tables: 2156 bytes.
2390 17:49:27.068663 Writing table forward entry at 0x00000500
2391 17:49:27.074893 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2392 17:49:27.078457 Writing coreboot table at 0x76891000
2393 17:49:27.085230 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2394 17:49:27.088160 1. 0000000000001000-000000000009ffff: RAM
2395 17:49:27.095162 2. 00000000000a0000-00000000000fffff: RESERVED
2396 17:49:27.098316 3. 0000000000100000-0000000076856fff: RAM
2397 17:49:27.104825 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2398 17:49:27.108376 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2399 17:49:27.115617 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2400 17:49:27.121708 7. 0000000077000000-00000000803fffff: RESERVED
2401 17:49:27.124513 8. 00000000c0000000-00000000cfffffff: RESERVED
2402 17:49:27.127883 9. 00000000f8000000-00000000f9ffffff: RESERVED
2403 17:49:27.134786 10. 00000000fb000000-00000000fb000fff: RESERVED
2404 17:49:27.137797 11. 00000000fc800000-00000000fe7fffff: RESERVED
2405 17:49:27.144976 12. 00000000feb00000-00000000feb7ffff: RESERVED
2406 17:49:27.148390 13. 00000000fec00000-00000000fecfffff: RESERVED
2407 17:49:27.154936 14. 00000000fed40000-00000000fed6ffff: RESERVED
2408 17:49:27.157742 15. 00000000fed80000-00000000fed87fff: RESERVED
2409 17:49:27.164446 16. 00000000fed90000-00000000fed92fff: RESERVED
2410 17:49:27.167930 17. 00000000feda0000-00000000feda1fff: RESERVED
2411 17:49:27.171740 18. 00000000fedc0000-00000000feddffff: RESERVED
2412 17:49:27.177949 19. 0000000100000000-000000027fbfffff: RAM
2413 17:49:27.181224 Passing 4 GPIOs to payload:
2414 17:49:27.184350 NAME | PORT | POLARITY | VALUE
2415 17:49:27.191378 lid | undefined | high | high
2416 17:49:27.194671 power | undefined | high | low
2417 17:49:27.201234 oprom | undefined | high | low
2418 17:49:27.208351 EC in RW | 0x00000151 | high | high
2419 17:49:27.208920 Board ID: 3
2420 17:49:27.209406 FW config: 0x131
2421 17:49:27.214165 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 73b7
2422 17:49:27.217542 coreboot table: 1788 bytes.
2423 17:49:27.222039 IMD ROOT 0. 0x76fff000 0x00001000
2424 17:49:27.227857 IMD SMALL 1. 0x76ffe000 0x00001000
2425 17:49:27.231068 FSP MEMORY 2. 0x76afe000 0x00500000
2426 17:49:27.234616 CONSOLE 3. 0x76ade000 0x00020000
2427 17:49:27.237742 RW MCACHE 4. 0x76add000 0x0000043c
2428 17:49:27.240714 RO MCACHE 5. 0x76adc000 0x00000fd8
2429 17:49:27.244071 FMAP 6. 0x76adb000 0x0000064a
2430 17:49:27.247591 TIME STAMP 7. 0x76ada000 0x00000910
2431 17:49:27.250963 VBOOT WORK 8. 0x76ac6000 0x00014000
2432 17:49:27.255108 MEM INFO 9. 0x76ac5000 0x000003b8
2433 17:49:27.260694 ROMSTG STCK10. 0x76ac4000 0x00001000
2434 17:49:27.264551 AFTER CAR 11. 0x76ab8000 0x0000c000
2435 17:49:27.267181 RAMSTAGE 12. 0x76a2e000 0x0008a000
2436 17:49:27.271033 ACPI BERT 13. 0x76a1e000 0x00010000
2437 17:49:27.274281 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2438 17:49:27.277176 REFCODE 15. 0x769ae000 0x0006f000
2439 17:49:27.280543 SMM BACKUP 16. 0x7699e000 0x00010000
2440 17:49:27.287413 IGD OPREGION17. 0x76999000 0x00004203
2441 17:49:27.290309 RAMOOPS 18. 0x76899000 0x00100000
2442 17:49:27.293655 COREBOOT 19. 0x76891000 0x00008000
2443 17:49:27.297484 ACPI 20. 0x7686d000 0x00024000
2444 17:49:27.300726 TPM2 TCGLOG21. 0x7685d000 0x00010000
2445 17:49:27.304035 PMC CRASHLOG22. 0x7685c000 0x00000c00
2446 17:49:27.306826 CPU CRASHLOG23. 0x76858000 0x00003480
2447 17:49:27.313826 SMBIOS 24. 0x76857000 0x00001000
2448 17:49:27.314297 IMD small region:
2449 17:49:27.317140 IMD ROOT 0. 0x76ffec00 0x00000400
2450 17:49:27.320441 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2451 17:49:27.327158 VPD 2. 0x76ffeb80 0x0000004c
2452 17:49:27.331191 POWER STATE 3. 0x76ffeb20 0x00000044
2453 17:49:27.333386 ROMSTAGE 4. 0x76ffeb00 0x00000004
2454 17:49:27.337727 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2455 17:49:27.340018 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2456 17:49:27.346919 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2457 17:49:27.350203 MTRR: Physical address space:
2458 17:49:27.356720 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2459 17:49:27.363515 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2460 17:49:27.370089 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2461 17:49:27.376593 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2462 17:49:27.379593 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2463 17:49:27.386580 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2464 17:49:27.393238 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2465 17:49:27.399797 MTRR: Fixed MSR 0x250 0x0606060606060606
2466 17:49:27.403238 MTRR: Fixed MSR 0x258 0x0606060606060606
2467 17:49:27.406663 MTRR: Fixed MSR 0x259 0x0000000000000000
2468 17:49:27.410721 MTRR: Fixed MSR 0x268 0x0606060606060606
2469 17:49:27.413163 MTRR: Fixed MSR 0x269 0x0606060606060606
2470 17:49:27.419647 MTRR: Fixed MSR 0x26a 0x0606060606060606
2471 17:49:27.422963 MTRR: Fixed MSR 0x26b 0x0606060606060606
2472 17:49:27.426588 MTRR: Fixed MSR 0x26c 0x0606060606060606
2473 17:49:27.430045 MTRR: Fixed MSR 0x26d 0x0606060606060606
2474 17:49:27.436377 MTRR: Fixed MSR 0x26e 0x0606060606060606
2475 17:49:27.439716 MTRR: Fixed MSR 0x26f 0x0606060606060606
2476 17:49:27.443316 call enable_fixed_mtrr()
2477 17:49:27.446324 CPU physical address size: 39 bits
2478 17:49:27.450072 MTRR: default type WB/UC MTRR counts: 6/6.
2479 17:49:27.456163 MTRR: UC selected as default type.
2480 17:49:27.460109 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2481 17:49:27.466239 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2482 17:49:27.473176 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2483 17:49:27.479972 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2484 17:49:27.486047 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2485 17:49:27.493006 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2486 17:49:27.496341 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 17:49:27.503093 MTRR: Fixed MSR 0x258 0x0606060606060606
2488 17:49:27.506009 MTRR: Fixed MSR 0x259 0x0000000000000000
2489 17:49:27.510078 MTRR: Fixed MSR 0x268 0x0606060606060606
2490 17:49:27.512953 MTRR: Fixed MSR 0x269 0x0606060606060606
2491 17:49:27.519583 MTRR: Fixed MSR 0x26a 0x0606060606060606
2492 17:49:27.522978 MTRR: Fixed MSR 0x26b 0x0606060606060606
2493 17:49:27.526198 MTRR: Fixed MSR 0x26c 0x0606060606060606
2494 17:49:27.528971 MTRR: Fixed MSR 0x26d 0x0606060606060606
2495 17:49:27.535853 MTRR: Fixed MSR 0x26e 0x0606060606060606
2496 17:49:27.539077 MTRR: Fixed MSR 0x26f 0x0606060606060606
2497 17:49:27.543097 MTRR: Fixed MSR 0x250 0x0606060606060606
2498 17:49:27.545694 MTRR: Fixed MSR 0x258 0x0606060606060606
2499 17:49:27.552071 MTRR: Fixed MSR 0x259 0x0000000000000000
2500 17:49:27.555622 MTRR: Fixed MSR 0x268 0x0606060606060606
2501 17:49:27.559299 MTRR: Fixed MSR 0x269 0x0606060606060606
2502 17:49:27.562265 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 17:49:27.568956 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 17:49:27.572468 MTRR: Fixed MSR 0x259 0x0000000000000000
2505 17:49:27.575351 MTRR: Fixed MSR 0x268 0x0606060606060606
2506 17:49:27.578575 MTRR: Fixed MSR 0x269 0x0606060606060606
2507 17:49:27.585251 MTRR: Fixed MSR 0x26a 0x0606060606060606
2508 17:49:27.588635 MTRR: Fixed MSR 0x26b 0x0606060606060606
2509 17:49:27.591413 MTRR: Fixed MSR 0x26c 0x0606060606060606
2510 17:49:27.595250 MTRR: Fixed MSR 0x26d 0x0606060606060606
2511 17:49:27.598827 MTRR: Fixed MSR 0x26e 0x0606060606060606
2512 17:49:27.604930 MTRR: Fixed MSR 0x26f 0x0606060606060606
2513 17:49:27.608913 MTRR: Fixed MSR 0x250 0x0606060606060606
2514 17:49:27.611551 call enable_fixed_mtrr()
2515 17:49:27.614857 MTRR: Fixed MSR 0x258 0x0606060606060606
2516 17:49:27.618843 MTRR: Fixed MSR 0x259 0x0000000000000000
2517 17:49:27.622000 MTRR: Fixed MSR 0x268 0x0606060606060606
2518 17:49:27.628384 MTRR: Fixed MSR 0x269 0x0606060606060606
2519 17:49:27.631338 MTRR: Fixed MSR 0x26a 0x0606060606060606
2520 17:49:27.635046 MTRR: Fixed MSR 0x26b 0x0606060606060606
2521 17:49:27.638677 MTRR: Fixed MSR 0x26c 0x0606060606060606
2522 17:49:27.645981 MTRR: Fixed MSR 0x26d 0x0606060606060606
2523 17:49:27.648340 MTRR: Fixed MSR 0x26e 0x0606060606060606
2524 17:49:27.651516 MTRR: Fixed MSR 0x26f 0x0606060606060606
2525 17:49:27.655387 MTRR: Fixed MSR 0x250 0x0606060606060606
2526 17:49:27.658080 call enable_fixed_mtrr()
2527 17:49:27.661583 CPU physical address size: 39 bits
2528 17:49:27.665078 MTRR: Fixed MSR 0x250 0x0606060606060606
2529 17:49:27.669381 CPU physical address size: 39 bits
2530 17:49:27.674877 MTRR: Fixed MSR 0x250 0x0606060606060606
2531 17:49:27.678408 MTRR: Fixed MSR 0x258 0x0606060606060606
2532 17:49:27.681655 MTRR: Fixed MSR 0x258 0x0606060606060606
2533 17:49:27.684531 MTRR: Fixed MSR 0x259 0x0000000000000000
2534 17:49:27.691193 MTRR: Fixed MSR 0x268 0x0606060606060606
2535 17:49:27.694539 MTRR: Fixed MSR 0x269 0x0606060606060606
2536 17:49:27.697771 MTRR: Fixed MSR 0x258 0x0606060606060606
2537 17:49:27.701594 MTRR: Fixed MSR 0x26a 0x0606060606060606
2538 17:49:27.707729 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 17:49:27.711038 MTRR: Fixed MSR 0x26b 0x0606060606060606
2540 17:49:27.714536 MTRR: Fixed MSR 0x26c 0x0606060606060606
2541 17:49:27.717598 MTRR: Fixed MSR 0x26d 0x0606060606060606
2542 17:49:27.724521 MTRR: Fixed MSR 0x26e 0x0606060606060606
2543 17:49:27.727772 MTRR: Fixed MSR 0x26f 0x0606060606060606
2544 17:49:27.731977 MTRR: Fixed MSR 0x259 0x0000000000000000
2545 17:49:27.734557 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 17:49:27.737929 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 17:49:27.744591 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 17:49:27.747833 MTRR: Fixed MSR 0x26a 0x0606060606060606
2549 17:49:27.751104 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 17:49:27.754634 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 17:49:27.760822 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 17:49:27.764187 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 17:49:27.767676 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 17:49:27.771847 call enable_fixed_mtrr()
2555 17:49:27.774702 call enable_fixed_mtrr()
2556 17:49:27.777538 MTRR: Fixed MSR 0x26c 0x0606060606060606
2557 17:49:27.780767 call enable_fixed_mtrr()
2558 17:49:27.784087 MTRR: Fixed MSR 0x26d 0x0606060606060606
2559 17:49:27.787535 MTRR: Fixed MSR 0x26e 0x0606060606060606
2560 17:49:27.790403 MTRR: Fixed MSR 0x26f 0x0606060606060606
2561 17:49:27.794098 CPU physical address size: 39 bits
2562 17:49:27.797167 call enable_fixed_mtrr()
2563 17:49:27.800712 CPU physical address size: 39 bits
2564 17:49:27.803796 CPU physical address size: 39 bits
2565 17:49:27.810472 MTRR: Fixed MSR 0x259 0x0000000000000000
2566 17:49:27.814103 CPU physical address size: 39 bits
2567 17:49:27.817871 MTRR: Fixed MSR 0x268 0x0606060606060606
2568 17:49:27.820972 MTRR: Fixed MSR 0x269 0x0606060606060606
2569 17:49:27.824074 MTRR: Fixed MSR 0x26a 0x0606060606060606
2570 17:49:27.830483 MTRR: Fixed MSR 0x26b 0x0606060606060606
2571 17:49:27.834288 MTRR: Fixed MSR 0x26c 0x0606060606060606
2572 17:49:27.837234 MTRR: Fixed MSR 0x26d 0x0606060606060606
2573 17:49:27.841049 MTRR: Fixed MSR 0x26e 0x0606060606060606
2574 17:49:27.843856 MTRR: Fixed MSR 0x26f 0x0606060606060606
2575 17:49:27.848477 call enable_fixed_mtrr()
2576 17:49:27.852844 CPU physical address size: 39 bits
2577 17:49:27.856885
2578 17:49:27.857349 MTRR check
2579 17:49:27.859243 Fixed MTRRs : Enabled
2580 17:49:27.859747 Variable MTRRs: Enabled
2581 17:49:27.860120
2582 17:49:27.866417 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2583 17:49:27.869700 Checking cr50 for pending updates
2584 17:49:27.882495 Reading cr50 TPM mode
2585 17:49:27.897123 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2586 17:49:27.907470 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2587 17:49:27.910619 Checking segment from ROM address 0xf96cbe6c
2588 17:49:27.913790 Checking segment from ROM address 0xf96cbe88
2589 17:49:27.920544 Loading segment from ROM address 0xf96cbe6c
2590 17:49:27.921016 code (compression=1)
2591 17:49:27.930231 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2592 17:49:27.937000 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2593 17:49:27.940002 using LZMA
2594 17:49:27.962612 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2595 17:49:27.969273 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2596 17:49:27.977506 Loading segment from ROM address 0xf96cbe88
2597 17:49:27.980743 Entry Point 0x30000000
2598 17:49:27.981212 Loaded segments
2599 17:49:27.987678 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2600 17:49:27.994031 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2601 17:49:27.997264 Finalizing chipset.
2602 17:49:28.000815 apm_control: Finalizing SMM.
2603 17:49:28.001286 APMC done.
2604 17:49:28.004109 HECI: CSE device 16.1 is disabled
2605 17:49:28.007005 HECI: CSE device 16.2 is disabled
2606 17:49:28.010615 HECI: CSE device 16.3 is disabled
2607 17:49:28.013940 HECI: CSE device 16.4 is disabled
2608 17:49:28.017074 HECI: CSE device 16.5 is disabled
2609 17:49:28.019983 HECI: Sending End-of-Post
2610 17:49:28.028887 CSE: EOP requested action: continue boot
2611 17:49:28.031815 CSE EOP successful, continuing boot
2612 17:49:28.038801 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2613 17:49:28.042138 mp_park_aps done after 0 msecs.
2614 17:49:28.045519 Jumping to boot code at 0x30000000(0x76891000)
2615 17:49:28.055444 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2616 17:49:28.060287
2617 17:49:28.060775
2618 17:49:28.061146
2619 17:49:28.062886 Starting depthcharge on Volmar...
2620 17:49:28.063357
2621 17:49:28.065200 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2622 17:49:28.065827 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2623 17:49:28.066280 Setting prompt string to ['brya:']
2624 17:49:28.066707 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2625 17:49:28.070035 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2626 17:49:28.070542
2627 17:49:28.076167 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2628 17:49:28.076833
2629 17:49:28.083132 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2630 17:49:28.083801
2631 17:49:28.086422 configure_storage: Failed to remap 1C:2
2632 17:49:28.087163
2633 17:49:28.089560 Wipe memory regions:
2634 17:49:28.090301
2635 17:49:28.092842 [0x00000000001000, 0x000000000a0000)
2636 17:49:28.093497
2637 17:49:28.096300 [0x00000000100000, 0x00000030000000)
2638 17:49:28.203447
2639 17:49:28.206358 [0x00000032668e60, 0x00000076857000)
2640 17:49:28.354282
2641 17:49:28.358038 [0x00000100000000, 0x0000027fc00000)
2642 17:49:29.185800
2643 17:49:29.189467 ec_init: CrosEC protocol v3 supported (256, 256)
2644 17:49:29.799317
2645 17:49:29.799847 R8152: Initializing
2646 17:49:29.800225
2647 17:49:29.802557 Version 6 (ocp_data = 5c30)
2648 17:49:29.803023
2649 17:49:29.806686 R8152: Done initializing
2650 17:49:29.807247
2651 17:49:29.808759 Adding net device
2652 17:49:30.110094
2653 17:49:30.113405 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2654 17:49:30.114046
2655 17:49:30.114652
2656 17:49:30.115027
2657 17:49:30.115824 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2659 17:49:30.217413 brya: tftpboot 192.168.201.1 13097488/tftp-deploy-ikp9ops4/kernel/bzImage 13097488/tftp-deploy-ikp9ops4/kernel/cmdline 13097488/tftp-deploy-ikp9ops4/ramdisk/ramdisk.cpio.gz
2660 17:49:30.218070 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2661 17:49:30.218611 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2662 17:49:30.223955 tftpboot 192.168.201.1 13097488/tftp-deploy-ikp9ops4/kernel/bzImploy-ikp9ops4/kernel/cmdline 13097488/tftp-deploy-ikp9ops4/ramdisk/ramdisk.cpio.gz
2663 17:49:30.224557
2664 17:49:30.224927 Waiting for link
2665 17:49:30.425993
2666 17:49:30.426518 done.
2667 17:49:30.426888
2668 17:49:30.427229 MAC: 00:13:3b:00:0f:d5
2669 17:49:30.427572
2670 17:49:30.429554 Sending DHCP discover... done.
2671 17:49:30.429884
2672 17:49:30.432281 Waiting for reply... done.
2673 17:49:30.432608
2674 17:49:30.436467 Sending DHCP request... done.
2675 17:49:30.436884
2676 17:49:30.443007 Waiting for reply... done.
2677 17:49:30.443334
2678 17:49:30.443589 My ip is 192.168.201.23
2679 17:49:30.443903
2680 17:49:30.445792 The DHCP server ip is 192.168.201.1
2681 17:49:30.450072
2682 17:49:30.453220 TFTP server IP predefined by user: 192.168.201.1
2683 17:49:30.453692
2684 17:49:30.459060 Bootfile predefined by user: 13097488/tftp-deploy-ikp9ops4/kernel/bzImage
2685 17:49:30.459533
2686 17:49:30.462600 Sending tftp read request... done.
2687 17:49:30.463119
2688 17:49:30.471321 Waiting for the transfer...
2689 17:49:30.471825
2690 17:49:31.169536 00000000 ################################################################
2691 17:49:31.170029
2692 17:49:31.878475 00080000 ################################################################
2693 17:49:31.879015
2694 17:49:32.575562 00100000 ################################################################
2695 17:49:32.576054
2696 17:49:33.272337 00180000 ################################################################
2697 17:49:33.272848
2698 17:49:33.970389 00200000 ################################################################
2699 17:49:33.970996
2700 17:49:34.656606 00280000 ################################################################
2701 17:49:34.656978
2702 17:49:35.365736 00300000 ################################################################
2703 17:49:35.366282
2704 17:49:36.046504 00380000 ################################################################
2705 17:49:36.047094
2706 17:49:36.754374 00400000 ################################################################
2707 17:49:36.754925
2708 17:49:37.451989 00480000 ################################################################
2709 17:49:37.452590
2710 17:49:38.154396 00500000 ################################################################
2711 17:49:38.154914
2712 17:49:38.857292 00580000 ################################################################
2713 17:49:38.857998
2714 17:49:39.569786 00600000 ################################################################
2715 17:49:39.570403
2716 17:49:40.147034 00680000 ################################################################
2717 17:49:40.147181
2718 17:49:40.724102 00700000 ################################################################
2719 17:49:40.724247
2720 17:49:41.318100 00780000 ################################################################
2721 17:49:41.318238
2722 17:49:41.939060 00800000 ################################################################
2723 17:49:41.939205
2724 17:49:42.527944 00880000 ################################################################
2725 17:49:42.528089
2726 17:49:43.138482 00900000 ################################################################
2727 17:49:43.138626
2728 17:49:43.759945 00980000 ################################################################
2729 17:49:43.760133
2730 17:49:44.365512 00a00000 ################################################################
2731 17:49:44.365686
2732 17:49:44.940235 00a80000 ################################################################
2733 17:49:44.940409
2734 17:49:45.530278 00b00000 ################################################################
2735 17:49:45.530446
2736 17:49:46.113685 00b80000 ################################################################
2737 17:49:46.113851
2738 17:49:46.700140 00c00000 ################################################################
2739 17:49:46.700312
2740 17:49:47.266345 00c80000 ################################################################
2741 17:49:47.266486
2742 17:49:47.867294 00d00000 ################################################################
2743 17:49:47.867439
2744 17:49:48.460342 00d80000 ################################################################
2745 17:49:48.460512
2746 17:49:49.075935 00e00000 ################################################################
2747 17:49:49.076105
2748 17:49:49.658897 00e80000 ################################################################
2749 17:49:49.659047
2750 17:49:50.231808 00f00000 ################################################################
2751 17:49:50.231962
2752 17:49:50.824117 00f80000 ################################################################
2753 17:49:50.824267
2754 17:49:51.422024 01000000 ################################################################
2755 17:49:51.422645
2756 17:49:52.068363 01080000 ################################################################
2757 17:49:52.068511
2758 17:49:52.658236 01100000 ################################################################
2759 17:49:52.658390
2760 17:49:53.237895 01180000 ################################################################
2761 17:49:53.238041
2762 17:49:53.813399 01200000 ################################################################
2763 17:49:53.813544
2764 17:49:54.055713 01280000 ############################ done.
2765 17:49:54.055854
2766 17:49:54.059192 The bootfile was 19621344 bytes long.
2767 17:49:54.059274
2768 17:49:54.062138 Sending tftp read request... done.
2769 17:49:54.062215
2770 17:49:54.065512 Waiting for the transfer...
2771 17:49:54.065594
2772 17:49:54.650997 00000000 ################################################################
2773 17:49:54.651141
2774 17:49:55.252354 00080000 ################################################################
2775 17:49:55.252499
2776 17:49:55.843318 00100000 ################################################################
2777 17:49:55.843453
2778 17:49:56.407997 00180000 ################################################################
2779 17:49:56.408134
2780 17:49:56.988149 00200000 ################################################################
2781 17:49:56.988340
2782 17:49:57.576995 00280000 ################################################################
2783 17:49:57.577132
2784 17:49:58.158674 00300000 ################################################################
2785 17:49:58.158818
2786 17:49:58.740168 00380000 ################################################################
2787 17:49:58.740344
2788 17:49:59.307448 00400000 ################################################################
2789 17:49:59.307585
2790 17:49:59.895474 00480000 ################################################################
2791 17:49:59.895619
2792 17:50:00.481522 00500000 ################################################################
2793 17:50:00.481668
2794 17:50:01.053661 00580000 ################################################################
2795 17:50:01.053804
2796 17:50:01.607123 00600000 ################################################################
2797 17:50:01.607266
2798 17:50:02.252100 00680000 ################################################################
2799 17:50:02.252716
2800 17:50:02.935283 00700000 ################################################################
2801 17:50:02.935909
2802 17:50:03.606388 00780000 ################################################################
2803 17:50:03.606945
2804 17:50:04.288838 00800000 ################################################################
2805 17:50:04.289480
2806 17:50:04.983712 00880000 ################################################################
2807 17:50:04.984417
2808 17:50:05.659003 00900000 ################################################################
2809 17:50:05.659566
2810 17:50:05.923547 00980000 ############################# done.
2811 17:50:05.923685
2812 17:50:05.926857 Sending tftp read request... done.
2813 17:50:05.926942
2814 17:50:05.929556 Waiting for the transfer...
2815 17:50:05.929641
2816 17:50:05.929708 00000000 # done.
2817 17:50:05.929772
2818 17:50:05.939552 Command line loaded dynamically from TFTP file: 13097488/tftp-deploy-ikp9ops4/kernel/cmdline
2819 17:50:05.939638
2820 17:50:05.956303 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2821 17:50:05.961793
2822 17:50:05.965518 Shutting down all USB controllers.
2823 17:50:05.966017
2824 17:50:05.966410 Removing current net device
2825 17:50:05.966770
2826 17:50:05.968516 Finalizing coreboot
2827 17:50:05.968949
2828 17:50:05.974800 Exiting depthcharge with code 4 at timestamp: 48167963
2829 17:50:05.975427
2830 17:50:05.975848
2831 17:50:05.976293 Starting kernel ...
2832 17:50:05.976666
2833 17:50:05.977115
2834 17:50:05.978719 end: 2.2.4 bootloader-commands (duration 00:00:38) [common]
2835 17:50:05.979407 start: 2.2.5 auto-login-action (timeout 00:04:03) [common]
2836 17:50:05.979855 Setting prompt string to ['Linux version [0-9]']
2837 17:50:05.980357 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2838 17:50:05.980786 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2840 17:54:08.980378 end: 2.2.5 auto-login-action (duration 00:04:03) [common]
2842 17:54:08.981474 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 243 seconds'
2844 17:54:08.982386 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2847 17:54:08.983801 end: 2 depthcharge-action (duration 00:05:00) [common]
2849 17:54:08.985027 Cleaning after the job
2850 17:54:08.985533 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/ramdisk
2851 17:54:08.991579 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/kernel
2852 17:54:09.002124 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097488/tftp-deploy-ikp9ops4/modules
2853 17:54:09.006745 start: 5.1 power-off (timeout 00:00:30) [common]
2854 17:54:09.007670 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-11' '--port=1' '--command=off'
2855 17:54:09.115834 >> Command sent successfully.
2856 17:54:09.121517 Returned 0 in 0 seconds
2857 17:54:09.222595 end: 5.1 power-off (duration 00:00:00) [common]
2859 17:54:09.224124 start: 5.2 read-feedback (timeout 00:10:00) [common]
2860 17:54:09.225388 Listened to connection for namespace 'common' for up to 1s
2862 17:54:09.226892 Listened to connection for namespace 'common' for up to 1s
2863 17:54:10.226070 Finalising connection for namespace 'common'
2864 17:54:10.226737 Disconnecting from shell: Finalise
2865 17:54:10.227143
2866 17:54:10.328188 end: 5.2 read-feedback (duration 00:00:01) [common]
2867 17:54:10.328860 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13097488
2868 17:54:10.347546 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13097488
2869 17:54:10.347680 JobError: Your job cannot terminate cleanly.