Boot log: acer-chromebox-cxi5-brask
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 17:55:23.346219 lava-dispatcher, installed at version: 2024.01
2 17:55:23.346407 start: 0 validate
3 17:55:23.346523 Start time: 2024-03-19 17:55:23.346516+00:00 (UTC)
4 17:55:23.346644 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:55:23.346760 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 17:55:23.626013 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:55:23.626188 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.212-cip45-3-g37b1c10dc5722%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:55:27.359632 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:55:27.359814 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.212-cip45-3-g37b1c10dc5722%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 17:55:35.509115 validate duration: 12.16
12 17:55:35.509505 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:55:35.509595 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:55:35.509677 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:55:35.509805 Not decompressing ramdisk as can be used compressed.
16 17:55:35.509889 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 17:55:35.509946 saving as /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/ramdisk/rootfs.cpio.gz
18 17:55:35.509999 total size: 8417901 (8 MB)
19 17:55:36.526408 progress 0 % (0 MB)
20 17:55:36.529225 progress 5 % (0 MB)
21 17:55:36.531053 progress 10 % (0 MB)
22 17:55:36.532612 progress 15 % (1 MB)
23 17:55:36.534161 progress 20 % (1 MB)
24 17:55:36.535773 progress 25 % (2 MB)
25 17:55:36.537548 progress 30 % (2 MB)
26 17:55:36.539069 progress 35 % (2 MB)
27 17:55:36.540644 progress 40 % (3 MB)
28 17:55:36.542546 progress 45 % (3 MB)
29 17:55:36.544483 progress 50 % (4 MB)
30 17:55:36.546128 progress 55 % (4 MB)
31 17:55:36.547693 progress 60 % (4 MB)
32 17:55:36.549145 progress 65 % (5 MB)
33 17:55:36.550676 progress 70 % (5 MB)
34 17:55:36.552297 progress 75 % (6 MB)
35 17:55:36.553790 progress 80 % (6 MB)
36 17:55:36.555414 progress 85 % (6 MB)
37 17:55:36.556938 progress 90 % (7 MB)
38 17:55:36.558427 progress 95 % (7 MB)
39 17:55:36.559868 progress 100 % (8 MB)
40 17:55:36.560033 8 MB downloaded in 1.05 s (7.65 MB/s)
41 17:55:36.560231 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:55:36.560425 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:55:36.560494 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:55:36.560558 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:55:36.560677 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.212-cip45-3-g37b1c10dc5722/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 17:55:36.560733 saving as /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/kernel/bzImage
48 17:55:36.560795 total size: 19621344 (18 MB)
49 17:55:36.560856 No compression specified
50 17:55:36.561945 progress 0 % (0 MB)
51 17:55:36.565602 progress 5 % (0 MB)
52 17:55:36.569162 progress 10 % (1 MB)
53 17:55:36.572753 progress 15 % (2 MB)
54 17:55:36.576478 progress 20 % (3 MB)
55 17:55:36.580157 progress 25 % (4 MB)
56 17:55:36.583963 progress 30 % (5 MB)
57 17:55:36.587574 progress 35 % (6 MB)
58 17:55:36.591066 progress 40 % (7 MB)
59 17:55:36.594566 progress 45 % (8 MB)
60 17:55:36.598169 progress 50 % (9 MB)
61 17:55:36.601810 progress 55 % (10 MB)
62 17:55:36.605459 progress 60 % (11 MB)
63 17:55:36.609019 progress 65 % (12 MB)
64 17:55:36.612807 progress 70 % (13 MB)
65 17:55:36.616513 progress 75 % (14 MB)
66 17:55:36.620009 progress 80 % (15 MB)
67 17:55:36.623352 progress 85 % (15 MB)
68 17:55:36.626960 progress 90 % (16 MB)
69 17:55:36.630612 progress 95 % (17 MB)
70 17:55:36.634216 progress 100 % (18 MB)
71 17:55:36.634403 18 MB downloaded in 0.07 s (254.23 MB/s)
72 17:55:36.634593 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:55:36.634797 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:55:36.634865 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:55:36.634932 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:55:36.635062 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.212-cip45-3-g37b1c10dc5722/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 17:55:36.635125 saving as /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/modules/modules.tar
79 17:55:36.635174 total size: 1157932 (1 MB)
80 17:55:36.635238 Using unxz to decompress xz
81 17:55:36.638734 progress 2 % (0 MB)
82 17:55:36.639172 progress 8 % (0 MB)
83 17:55:36.642577 progress 14 % (0 MB)
84 17:55:36.646081 progress 19 % (0 MB)
85 17:55:36.649349 progress 25 % (0 MB)
86 17:55:36.652676 progress 31 % (0 MB)
87 17:55:36.656494 progress 36 % (0 MB)
88 17:55:36.659312 progress 42 % (0 MB)
89 17:55:36.663466 progress 48 % (0 MB)
90 17:55:36.666800 progress 53 % (0 MB)
91 17:55:36.670564 progress 59 % (0 MB)
92 17:55:36.673982 progress 65 % (0 MB)
93 17:55:36.677101 progress 70 % (0 MB)
94 17:55:36.681495 progress 76 % (0 MB)
95 17:55:36.685162 progress 82 % (0 MB)
96 17:55:36.688648 progress 87 % (0 MB)
97 17:55:36.692288 progress 93 % (1 MB)
98 17:55:36.695699 progress 99 % (1 MB)
99 17:55:36.702601 1 MB downloaded in 0.07 s (16.38 MB/s)
100 17:55:36.702870 end: 1.3.1 http-download (duration 00:00:00) [common]
102 17:55:36.703132 end: 1.3 download-retry (duration 00:00:00) [common]
103 17:55:36.703215 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
104 17:55:36.703291 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
105 17:55:36.703355 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
106 17:55:36.703424 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
107 17:55:36.703613 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd
108 17:55:36.703728 makedir: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin
109 17:55:36.703816 makedir: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/tests
110 17:55:36.703897 makedir: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/results
111 17:55:36.703997 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-add-keys
112 17:55:36.704115 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-add-sources
113 17:55:36.704221 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-background-process-start
114 17:55:36.704317 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-background-process-stop
115 17:55:36.704412 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-common-functions
116 17:55:36.704514 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-echo-ipv4
117 17:55:36.704610 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-install-packages
118 17:55:36.704705 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-installed-packages
119 17:55:36.704796 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-os-build
120 17:55:36.704895 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-probe-channel
121 17:55:36.704989 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-probe-ip
122 17:55:36.705083 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-target-ip
123 17:55:36.705175 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-target-mac
124 17:55:36.705268 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-target-storage
125 17:55:36.705368 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-case
126 17:55:36.705462 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-event
127 17:55:36.705552 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-feedback
128 17:55:36.705645 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-raise
129 17:55:36.705737 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-reference
130 17:55:36.705831 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-runner
131 17:55:36.705924 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-set
132 17:55:36.706018 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-test-shell
133 17:55:36.706114 Updating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-install-packages (oe)
134 17:55:36.706238 Updating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/bin/lava-installed-packages (oe)
135 17:55:36.706332 Creating /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/environment
136 17:55:36.706412 LAVA metadata
137 17:55:36.706476 - LAVA_JOB_ID=13097534
138 17:55:36.706529 - LAVA_DISPATCHER_IP=192.168.201.1
139 17:55:36.706610 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
140 17:55:36.706665 skipped lava-vland-overlay
141 17:55:36.706727 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
142 17:55:36.706791 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
143 17:55:36.706841 skipped lava-multinode-overlay
144 17:55:36.706897 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
145 17:55:36.706960 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
146 17:55:36.707018 Loading test definitions
147 17:55:36.707092 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
148 17:55:36.707162 Using /lava-13097534 at stage 0
149 17:55:36.707415 uuid=13097534_1.4.2.3.1 testdef=None
150 17:55:36.707490 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
151 17:55:36.707566 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
152 17:55:36.707982 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
154 17:55:36.708166 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
155 17:55:36.708661 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
157 17:55:36.708842 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
158 17:55:36.709318 runner path: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/0/tests/0_dmesg test_uuid 13097534_1.4.2.3.1
159 17:55:36.709445 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
161 17:55:36.709631 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
162 17:55:36.709687 Using /lava-13097534 at stage 1
163 17:55:36.709924 uuid=13097534_1.4.2.3.5 testdef=None
164 17:55:36.709993 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
165 17:55:36.710057 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
166 17:55:36.710411 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
168 17:55:36.710584 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
169 17:55:36.711074 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
171 17:55:36.711265 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
172 17:55:36.711752 runner path: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/1/tests/1_bootrr test_uuid 13097534_1.4.2.3.5
173 17:55:36.711912 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
175 17:55:36.712078 Creating lava-test-runner.conf files
176 17:55:36.712127 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/0 for stage 0
177 17:55:36.712195 - 0_dmesg
178 17:55:36.712261 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13097534/lava-overlay-shyqmdqd/lava-13097534/1 for stage 1
179 17:55:36.712332 - 1_bootrr
180 17:55:36.712407 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
181 17:55:36.712475 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
182 17:55:36.718670 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
183 17:55:36.718766 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
184 17:55:36.718841 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
185 17:55:36.718914 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
186 17:55:36.718983 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
187 17:55:36.890321 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
188 17:55:36.890604 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
189 17:55:36.890701 extracting modules file /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13097534/extract-overlay-ramdisk-b3m52k3p/ramdisk
190 17:55:36.910003 end: 1.4.4 extract-modules (duration 00:00:00) [common]
191 17:55:36.910131 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
192 17:55:36.910213 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13097534/compress-overlay-9guh6ssk/overlay-1.4.2.4.tar.gz to ramdisk
193 17:55:36.910272 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13097534/compress-overlay-9guh6ssk/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13097534/extract-overlay-ramdisk-b3m52k3p/ramdisk
194 17:55:36.916004 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
195 17:55:36.916100 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
196 17:55:36.916178 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
197 17:55:36.916245 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
198 17:55:36.916304 Building ramdisk /var/lib/lava/dispatcher/tmp/13097534/extract-overlay-ramdisk-b3m52k3p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13097534/extract-overlay-ramdisk-b3m52k3p/ramdisk
199 17:55:36.984357 >> 61171 blocks
200 17:55:37.877764 rename /var/lib/lava/dispatcher/tmp/13097534/extract-overlay-ramdisk-b3m52k3p/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/ramdisk/ramdisk.cpio.gz
201 17:55:37.878074 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
202 17:55:37.878190 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
203 17:55:37.878274 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
204 17:55:37.878351 No mkimage arch provided, not using FIT.
205 17:55:37.878423 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
206 17:55:37.878493 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
207 17:55:37.878576 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
208 17:55:37.878653 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
209 17:55:37.878717 No LXC device requested
210 17:55:37.878784 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
211 17:55:37.878854 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
212 17:55:37.878917 end: 1.6 deploy-device-env (duration 00:00:00) [common]
213 17:55:37.878982 Checking files for TFTP limit of 4294967296 bytes.
214 17:55:37.879326 end: 1 tftp-deploy (duration 00:00:02) [common]
215 17:55:37.879402 start: 2 depthcharge-action (timeout 00:05:00) [common]
216 17:55:37.879468 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
217 17:55:37.879561 substitutions:
218 17:55:37.879613 - {DTB}: None
219 17:55:37.879661 - {INITRD}: 13097534/tftp-deploy-zum_h90h/ramdisk/ramdisk.cpio.gz
220 17:55:37.879706 - {KERNEL}: 13097534/tftp-deploy-zum_h90h/kernel/bzImage
221 17:55:37.879750 - {LAVA_MAC}: None
222 17:55:37.879795 - {PRESEED_CONFIG}: None
223 17:55:37.879837 - {PRESEED_LOCAL}: None
224 17:55:37.879881 - {RAMDISK}: 13097534/tftp-deploy-zum_h90h/ramdisk/ramdisk.cpio.gz
225 17:55:37.879924 - {ROOT_PART}: None
226 17:55:37.879968 - {ROOT}: None
227 17:55:37.880011 - {SERVER_IP}: 192.168.201.1
228 17:55:37.880053 - {TEE}: None
229 17:55:37.880097 Parsed boot commands:
230 17:55:37.880140 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
231 17:55:37.880289 Parsed boot commands: tftpboot 192.168.201.1 13097534/tftp-deploy-zum_h90h/kernel/bzImage 13097534/tftp-deploy-zum_h90h/kernel/cmdline 13097534/tftp-deploy-zum_h90h/ramdisk/ramdisk.cpio.gz
232 17:55:37.880366 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
233 17:55:37.880432 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
234 17:55:37.880502 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
235 17:55:37.880567 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
236 17:55:37.880622 Not connected, no need to disconnect.
237 17:55:37.880695 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
238 17:55:37.880772 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
239 17:55:37.880825 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi5-brask-cbg-10'
240 17:55:37.883850 Setting prompt string to ['lava-test: # ']
241 17:55:37.884095 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
242 17:55:37.884187 end: 2.2.1 reset-connection (duration 00:00:00) [common]
243 17:55:37.884267 start: 2.2.2 reset-device (timeout 00:05:00) [common]
244 17:55:37.884337 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
245 17:55:37.884488 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-10' '--port=1' '--command=reboot'
246 17:55:43.016833 >> Command sent successfully.
247 17:55:43.019067 Returned 0 in 5 seconds
248 17:55:43.119462 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
250 17:55:43.119741 end: 2.2.2 reset-device (duration 00:00:05) [common]
251 17:55:43.119815 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
252 17:55:43.119881 Setting prompt string to 'Starting depthcharge on Moli...'
253 17:55:43.119932 Changing prompt to 'Starting depthcharge on Moli...'
254 17:55:43.119985 depthcharge-start: Wait for prompt Starting depthcharge on Moli... (timeout 00:05:00)
255 17:55:43.120191 [Enter `^Ec?' for help]
256 17:55:44.330669
257 17:55:44.330828
258 17:55:44.341097 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
259 17:55:44.344256 CPU: Intel(R) Celeron(R) 7305
260 17:55:44.347499 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
261 17:55:44.354060 CPU: AES supported, TXT NOT supported, VT supported
262 17:55:44.360910 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
263 17:55:44.364165 Cache size = 8 MiB
264 17:55:44.367378 MCH: device id 4619 (rev 04) is Alderlake-P
265 17:55:44.374093 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
266 17:55:44.378127 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
267 17:55:44.380938 VBOOT: Loading verstage.
268 17:55:44.383989 FMAP: Found "FLASH" version 1.1 at 0x1804000.
269 17:55:44.390770 FMAP: base = 0x0 size = 0x2000000 #areas = 37
270 17:55:44.394033 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
271 17:55:44.404192 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
272 17:55:44.410969 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
273 17:55:44.411048
274 17:55:44.411102
275 17:55:44.424331 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
276 17:55:44.427857 Probing TPM I2C: I2C bus 1 version 0x3230302a
277 17:55:44.431476 DW I2C bus 1 at 0xfe022000 (400 KHz)
278 17:55:44.434663 I2C TX abort detected (00000001)
279 17:55:44.441226 cr50_i2c_read: Address write failed
280 17:55:44.451654 .done! DID_VID 0x00281ae0
281 17:55:44.455061 TPM ready after 0 ms
282 17:55:44.458611 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
283 17:55:44.471917 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
284 17:55:44.478627 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
285 17:55:44.532071 tlcl_send_startup: Startup return code is 0
286 17:55:44.532191 TPM: setup succeeded
287 17:55:44.551077 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
288 17:55:44.573018 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
289 17:55:44.577202 Chrome EC: UHEPI supported
290 17:55:44.580235 Reading cr50 boot mode
291 17:55:44.595014 Cr50 says boot_mode is VERIFIED_RW(0x00).
292 17:55:44.595231 Phase 1
293 17:55:44.601830 FMAP: area GBB found @ 1805000 (458752 bytes)
294 17:55:44.608509 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
295 17:55:44.615172 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
296 17:55:44.621736 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
297 17:55:44.625116 Phase 2
298 17:55:44.625223 Phase 3
299 17:55:44.628756 FMAP: area GBB found @ 1805000 (458752 bytes)
300 17:55:44.635123 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
301 17:55:44.638526 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
302 17:55:44.645004 VB2:vb2_verify_keyblock() Checking keyblock signature...
303 17:55:44.651826 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
304 17:55:44.658505 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
305 17:55:44.668165 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
306 17:55:44.681155 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
307 17:55:44.684454 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
308 17:55:44.691387 VB2:vb2_verify_fw_preamble() Verifying preamble.
309 17:55:44.698039 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
310 17:55:44.705141 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
311 17:55:44.711295 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
312 17:55:44.716117 Phase 4
313 17:55:44.718869 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
314 17:55:44.725592 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
315 17:55:44.953414 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
316 17:55:44.960030 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
317 17:55:44.964125 Saving vboot hash.
318 17:55:44.970387 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
319 17:55:44.986082 tlcl_extend: response is 0
320 17:55:44.992618 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
321 17:55:44.996228 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
322 17:55:45.013791 tlcl_extend: response is 0
323 17:55:45.020356 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
324 17:55:45.039284 tlcl_lock_nv_write: response is 0
325 17:55:45.056699 tlcl_lock_nv_write: response is 0
326 17:55:45.056761 Slot B is selected
327 17:55:45.063435 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
328 17:55:45.070284 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
329 17:55:45.076723 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
330 17:55:45.083433 BS: verstage times (exec / console): total (unknown) / 267 ms
331 17:55:45.083495
332 17:55:45.083544
333 17:55:45.093208 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
334 17:55:45.096777 Google Chrome EC: version:
335 17:55:45.100050 ro: moli_v2.0.19454-8a70cbdcf0
336 17:55:45.103281 rw: moli_v2.0.22464-d4ba27cabb
337 17:55:45.106734 running image: 2
338 17:55:45.110199 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
339 17:55:45.120114 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
340 17:55:45.127175 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
341 17:55:45.133517 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
342 17:55:45.143811 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
343 17:55:45.153618 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
344 17:55:45.156841 EC took 939us to calculate image hash
345 17:55:45.166872 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
346 17:55:45.170234 VB2:sync_ec() select_rw=RW(active)
347 17:55:45.178521 EC returned error result code 1
348 17:55:45.182469 PARAM_LIMIT_POWER not supported by EC.
349 17:55:45.186759 Waited 7360us to clear limit power flag.
350 17:55:45.190597 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
351 17:55:45.198713 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
352 17:55:45.201767 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
353 17:55:45.205717 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
354 17:55:45.208538 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
355 17:55:45.211945 TCO_STS: 0000 0000
356 17:55:45.215355 GEN_PMCON: d0015038 00002200
357 17:55:45.219039 GBLRST_CAUSE: 00000000 00000000
358 17:55:45.219097 HPR_CAUSE0: 00000000
359 17:55:45.221788 prev_sleep_state 5
360 17:55:45.225591 Abort disabling TXT, as CPU is not TXT capable.
361 17:55:45.233510 cse_lite: Number of partitions = 3
362 17:55:45.236966 cse_lite: Current partition = RO
363 17:55:45.237078 cse_lite: Next partition = RO
364 17:55:45.240294 cse_lite: Flags = 0x7
365 17:55:45.247198 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
366 17:55:45.257128 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
367 17:55:45.260578 FMAP: area SI_ME found @ 1000 (5238784 bytes)
368 17:55:45.267022 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 17:55:45.273738 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
370 17:55:45.280439 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
371 17:55:45.283689 cse_lite: CSE CBFS RW version : 16.1.25.2049
372 17:55:45.287139 CSE Sub-partition update not required
373 17:55:45.293878 cse_lite: Set Boot Partition Info Command (RW)
374 17:55:45.297110 HECI: Global Reset(Type:1) Command
375 17:55:46.765323 FMAP: Found "FLASH" version 1.1 at 0x1804000.
376 17:55:46.768901 FMAP: base = 0x0 size = 0x2000000 #areas = 37
377 17:55:46.775322 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
378 17:55:46.782154 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
379 17:55:46.788848 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
380 17:55:46.793099
381 17:55:46.793180
382 17:55:46.803254 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
383 17:55:46.809782 Probing TPM I2C: I2C bus 1 version 0x3230302a
384 17:55:46.813369 DW I2C bus 1 at 0xfe022000 (400 KHz)
385 17:55:46.816695 done! DID_VID 0x00281ae0
386 17:55:46.816772 TPM ready after 0 ms
387 17:55:46.823901 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
388 17:55:46.834803 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
389 17:55:46.841254 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
390 17:55:46.888152 tlcl_send_startup: Startup return code is 0
391 17:55:46.888251 TPM: setup succeeded
392 17:55:46.907931 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
393 17:55:46.930239 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
394 17:55:46.934119 Chrome EC: UHEPI supported
395 17:55:46.937945 Reading cr50 boot mode
396 17:55:46.952959 Cr50 says boot_mode is VERIFIED_RW(0x00).
397 17:55:46.953039 Phase 1
398 17:55:46.959713 FMAP: area GBB found @ 1805000 (458752 bytes)
399 17:55:46.966321 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
400 17:55:46.973059 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
401 17:55:46.979647 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
402 17:55:46.979739 Phase 2
403 17:55:46.983001 Phase 3
404 17:55:46.986318 FMAP: area GBB found @ 1805000 (458752 bytes)
405 17:55:46.993041 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
406 17:55:46.996289 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
407 17:55:47.003175 VB2:vb2_verify_keyblock() Checking keyblock signature...
408 17:55:47.010214 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
409 17:55:47.016290 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
410 17:55:47.023705 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
411 17:55:47.039999 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
412 17:55:47.043388 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
413 17:55:47.049996 VB2:vb2_verify_fw_preamble() Verifying preamble.
414 17:55:47.057004 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
415 17:55:47.063518 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
416 17:55:47.069845 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
417 17:55:47.073385 Phase 4
418 17:55:47.076842 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
419 17:55:47.083421 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
420 17:55:47.308080 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
421 17:55:47.318095 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
422 17:55:47.321311 Saving vboot hash.
423 17:55:47.327861 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
424 17:55:47.343967 tlcl_extend: response is 0
425 17:55:47.350354 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
426 17:55:47.357084 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
427 17:55:47.371382 tlcl_extend: response is 0
428 17:55:47.377965 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
429 17:55:47.396870 tlcl_lock_nv_write: response is 0
430 17:55:47.414815 tlcl_lock_nv_write: response is 0
431 17:55:47.414966 Slot B is selected
432 17:55:47.421139 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
433 17:55:47.428005 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
434 17:55:47.434433 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
435 17:55:47.441187 BS: verstage times (exec / console): total (unknown) / 260 ms
436 17:55:47.441285
437 17:55:47.441348
438 17:55:47.451022 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
439 17:55:47.454491 Google Chrome EC: version:
440 17:55:47.457860 ro: moli_v2.0.19454-8a70cbdcf0
441 17:55:47.461152 rw: moli_v2.0.22464-d4ba27cabb
442 17:55:47.464383 running image: 2
443 17:55:47.467808 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
444 17:55:47.477914 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 17:55:47.484604 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 17:55:47.490982 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
447 17:55:47.501283 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
448 17:55:47.511597 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
449 17:55:47.514589 EC took 941us to calculate image hash
450 17:55:47.524784 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
451 17:55:47.528113 VB2:sync_ec() select_rw=RW(active)
452 17:55:47.535996 EC returned error result code 1
453 17:55:47.539747 PARAM_LIMIT_POWER not supported by EC.
454 17:55:47.544536 Waited 7634us to clear limit power flag.
455 17:55:47.551211 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
456 17:55:47.554185 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
457 17:55:47.557448 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
458 17:55:47.560888 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
459 17:55:47.567909 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
460 17:55:47.567988 TCO_STS: 0000 0000
461 17:55:47.571004 GEN_PMCON: d1001038 00002200
462 17:55:47.574334 GBLRST_CAUSE: 00000040 00000000
463 17:55:47.577944 HPR_CAUSE0: 00000000
464 17:55:47.578023 prev_sleep_state 5
465 17:55:47.584777 Abort disabling TXT, as CPU is not TXT capable.
466 17:55:47.591681 cse_lite: Number of partitions = 3
467 17:55:47.594700 cse_lite: Current partition = RW
468 17:55:47.594783 cse_lite: Next partition = RW
469 17:55:47.598049 cse_lite: Flags = 0x7
470 17:55:47.604683 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
471 17:55:47.614806 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
472 17:55:47.618487 FMAP: area SI_ME found @ 1000 (5238784 bytes)
473 17:55:47.625358 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
474 17:55:47.631468 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
475 17:55:47.638216 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
476 17:55:47.641638 cse_lite: CSE CBFS RW version : 16.1.25.2049
477 17:55:47.644874 CSE Sub-partition update not required
478 17:55:47.650184 Boot Count incremented to 7977
479 17:55:47.656440 CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868
480 17:55:47.663016 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 17:55:47.676342 Probing TPM I2C: done! DID_VID 0x00281ae0
482 17:55:47.679809 Locality already claimed
483 17:55:47.682840 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 17:55:47.703263 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 17:55:47.709913 MRC: Hash idx 0x100d comparison successful.
486 17:55:47.709994 MRC cache found, size f6c8
487 17:55:47.713399 bootmode is set to: 2
488 17:55:47.716815 FW_CONFIG value from CBI is 0x64
489 17:55:47.723334 fw_config match found: STORAGE=STORAGE_EMMC
490 17:55:47.726557 FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes)
491 17:55:47.729926 SPD_CACHE: cache found, size 0x1000
492 17:55:47.736560 SPD_CACHE: DIMM0 is the same
493 17:55:47.739801 No memory dimm at address 51
494 17:55:47.743109 SPD_CACHE: DIMM1 is not present
495 17:55:47.746407 No memory dimm at address 52
496 17:55:47.749955 SPD_CACHE: DIMM2 is not present
497 17:55:47.753300 No memory dimm at address 53
498 17:55:47.756590 SPD_CACHE: DIMM3 is not present
499 17:55:47.759771 Use the SPD cache data
500 17:55:47.763022 SPD: module type is DDR4
501 17:55:47.766495 SPD: module part number is M471A5244CB0-CWE
502 17:55:47.773144 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
503 17:55:47.776392 SPD: device width 16 bits, bus width 64 bits
504 17:55:47.779741 SPD: module size is 4096 MB (per channel)
505 17:55:47.832524 CBMEM:
506 17:55:47.835438 IMD: root @ 0x76fff000 254 entries.
507 17:55:47.839286 IMD: root @ 0x76ffec00 62 entries.
508 17:55:47.848704 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
509 17:55:47.851864 FMAP: area RW_VPD found @ f29000 (8192 bytes)
510 17:55:47.855200 RW_VPD is uninitialized or empty.
511 17:55:47.861638 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
512 17:55:47.865051 External stage cache:
513 17:55:47.868433 IMD: root @ 0x7bbff000 254 entries.
514 17:55:47.871586 IMD: root @ 0x7bbfec00 62 entries.
515 17:55:47.879025 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
516 17:55:47.885871 MRC: Checking cached data update for 'RW_MRC_CACHE'.
517 17:55:47.889115 MRC: 'RW_MRC_CACHE' does not need update.
518 17:55:47.889172 1 DIMMs found
519 17:55:47.892696 SMM Memory Map
520 17:55:47.895651 SMRAM : 0x7b800000 0x800000
521 17:55:47.899373 Subregion 0: 0x7b800000 0x200000
522 17:55:47.902399 Subregion 1: 0x7ba00000 0x200000
523 17:55:47.905750 Subregion 2: 0x7bc00000 0x400000
524 17:55:47.909284 top_of_ram = 0x77000000
525 17:55:47.912436 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
526 17:55:47.919406 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
527 17:55:47.925771 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
528 17:55:47.929097 MTRR Range: Start=ff000000 End=0 (Size 1000000)
529 17:55:47.929152 Normal boot
530 17:55:47.939355 CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc
531 17:55:47.945729 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60
532 17:55:47.952329 Processing 237 relocs. Offset value of 0x74ab9000
533 17:55:47.955763 CLFLUSH [0x76ab9000, 0x76ac3e60]
534 17:55:47.959153 CLFLUSH [0x76abea80, 0x76abea84]
535 17:55:47.968716 BS: romstage times (exec / console): total (unknown) / 418 ms
536 17:55:47.972377 CLFLUSH [0x76ab8000, 0x77000000]
537 17:55:47.983051 CLFLUSH [0x7ba00000, 0x7bc00000]
538 17:55:47.994700
539 17:55:47.994875
540 17:55:48.004507 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 postcar starting (log level: 8)...
541 17:55:48.004586 Normal boot
542 17:55:48.011041 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
543 17:55:48.017643 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 17:55:48.024205 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 17:55:48.031134 CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0
546 17:55:48.081865 Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50
547 17:55:48.088639 Processing 5882 relocs. Offset value of 0x72a2e000
548 17:55:48.091991 BS: postcar times (exec / console): total (unknown) / 54 ms
549 17:55:48.092056
550 17:55:48.095332
551 17:55:48.105419 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 ramstage starting (log level: 8)...
552 17:55:48.108582 Reserving BERT start 76a1d000, size 10000
553 17:55:48.108653 Normal boot
554 17:55:48.115298 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
555 17:55:48.121861 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
556 17:55:48.128726 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
557 17:55:48.135172 FMAP: area RW_VPD found @ f29000 (8192 bytes)
558 17:55:48.138595 Google Chrome EC: version:
559 17:55:48.142060 ro: moli_v2.0.19454-8a70cbdcf0
560 17:55:48.145550 rw: moli_v2.0.22464-d4ba27cabb
561 17:55:48.145612 running image: 2
562 17:55:48.152214 ACPI _SWS is PM1 Index 8 GPE Index -1
563 17:55:48.155202 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
564 17:55:48.158897 FW_CONFIG value from CBI is 0x64
565 17:55:48.165185 PCI: 00:06.0 disabled by fw_config
566 17:55:48.168620 fw_config match found: STORAGE=STORAGE_EMMC
567 17:55:48.171708 fw_config match found: STORAGE=STORAGE_EMMC
568 17:55:48.178243 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
569 17:55:48.184953 CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080
570 17:55:48.191502 microcode: sig=0x906a4 pf=0x80 revision=0x423
571 17:55:48.194880 microcode: Update skipped, already up-to-date
572 17:55:48.201740 CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8
573 17:55:48.234839 Detected 5 core, 5 thread CPU.
574 17:55:48.238007 Setting up SMI for CPU
575 17:55:48.241465 IED base = 0x7bc00000
576 17:55:48.241524 IED size = 0x00400000
577 17:55:48.244687 Will perform SMM setup.
578 17:55:48.247774 CPU: Intel(R) Celeron(R) 7305.
579 17:55:48.251419 LAPIC 0x0 in XAPIC mode.
580 17:55:48.257878 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
581 17:55:48.264508 Processing 18 relocs. Offset value of 0x00030000
582 17:55:48.268542 Attempting to start 4 APs
583 17:55:48.271895 Waiting for 10ms after sending INIT.
584 17:55:48.284818 Waiting for SIPI to complete...
585 17:55:48.288309 done.
586 17:55:48.288379 LAPIC 0x10 in XAPIC mode.
587 17:55:48.291489 Waiting for SIPI to complete...
588 17:55:48.294773 done.
589 17:55:48.294835 LAPIC 0x16 in XAPIC mode.
590 17:55:48.298268 LAPIC 0x14 in XAPIC mode.
591 17:55:48.301425 LAPIC 0x12 in XAPIC mode.
592 17:55:48.304933 AP: slot 2 apic_id 10, MCU rev: 0x00000423
593 17:55:48.311493 AP: slot 4 apic_id 14, MCU rev: 0x00000423
594 17:55:48.314838 AP: slot 3 apic_id 12, MCU rev: 0x00000423
595 17:55:48.318428 AP: slot 1 apic_id 16, MCU rev: 0x00000423
596 17:55:48.321434 smm_setup_relocation_handler: enter
597 17:55:48.324793 smm_setup_relocation_handler: exit
598 17:55:48.334964 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
599 17:55:48.338444 Processing 11 relocs. Offset value of 0x00038000
600 17:55:48.345066 smm_module_setup_stub: stack_top = 0x7b802800
601 17:55:48.348130 smm_module_setup_stub: per cpu stack_size = 0x800
602 17:55:48.354845 smm_module_setup_stub: runtime.start32_offset = 0x4c
603 17:55:48.358210 smm_module_setup_stub: runtime.smm_size = 0x10000
604 17:55:48.364810 SMM Module: stub loaded at 38000. Will call 0x76a5220d
605 17:55:48.368543 Installing permanent SMM handler to 0x7b800000
606 17:55:48.371568 FX_SAVE [0x7b9ff600-0x7ba00000]
607 17:55:48.374859 HANDLER [0x7b9f6000-0x7b9ff528]
608 17:55:48.378264
609 17:55:48.378324 CPU 0
610 17:55:48.381558 ss0 [0x7b9f5c00-0x7b9f6000]
611 17:55:48.384980 stub0 [0x7b9ee000-0x7b9ee208]
612 17:55:48.385044
613 17:55:48.385099 CPU 1
614 17:55:48.388215 ss1 [0x7b9f5800-0x7b9f5c00]
615 17:55:48.391482 stub1 [0x7b9edc00-0x7b9ede08]
616 17:55:48.391542
617 17:55:48.394995 CPU 2
618 17:55:48.398130 ss2 [0x7b9f5400-0x7b9f5800]
619 17:55:48.401575 stub2 [0x7b9ed800-0x7b9eda08]
620 17:55:48.401632
621 17:55:48.401679 CPU 3
622 17:55:48.404700 ss3 [0x7b9f5000-0x7b9f5400]
623 17:55:48.408159 stub3 [0x7b9ed400-0x7b9ed608]
624 17:55:48.408222
625 17:55:48.411382 CPU 4
626 17:55:48.414791 ss4 [0x7b9f4c00-0x7b9f5000]
627 17:55:48.418288 stub4 [0x7b9ed000-0x7b9ed208]
628 17:55:48.418352
629 17:55:48.421650 stacks [0x7b800000-0x7b802800]
630 17:55:48.431540 Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528
631 17:55:48.434940 Processing 255 relocs. Offset value of 0x7b9f6000
632 17:55:48.444937 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
633 17:55:48.448200 Processing 11 relocs. Offset value of 0x7b9ee000
634 17:55:48.451561 smm_module_setup_stub: stack_top = 0x7b802800
635 17:55:48.458183 smm_module_setup_stub: per cpu stack_size = 0x800
636 17:55:48.461499 smm_module_setup_stub: runtime.start32_offset = 0x4c
637 17:55:48.468103 smm_module_setup_stub: runtime.smm_size = 0x200000
638 17:55:48.474922 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
639 17:55:48.481495 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
640 17:55:48.484956 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
641 17:55:48.492492 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
642 17:55:48.498284 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
643 17:55:48.504924 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
644 17:55:48.511747 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
645 17:55:48.518346 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
646 17:55:48.524956 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c
647 17:55:48.528407 Clearing SMI status registers
648 17:55:48.531615 SMI_STS: PM1
649 17:55:48.531673 PM1_STS: WAK PWRBTN
650 17:55:48.541797 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
651 17:55:48.544930 In relocation handler: CPU 0
652 17:55:48.548303 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
653 17:55:48.551495 Writing SMRR. base = 0x7b800006, mask=0xff800c00
654 17:55:48.555005 Relocation complete.
655 17:55:48.561752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
656 17:55:48.565190 In relocation handler: CPU 4
657 17:55:48.568507 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
658 17:55:48.575281 Writing SMRR. base = 0x7b800006, mask=0xff800c00
659 17:55:48.575340 Relocation complete.
660 17:55:48.581667 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
661 17:55:48.585042 In relocation handler: CPU 3
662 17:55:48.588340 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
663 17:55:48.595372 Writing SMRR. base = 0x7b800006, mask=0xff800c00
664 17:55:48.598492 Relocation complete.
665 17:55:48.604976 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
666 17:55:48.608334 In relocation handler: CPU 1
667 17:55:48.611629 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
668 17:55:48.614993 Writing SMRR. base = 0x7b800006, mask=0xff800c00
669 17:55:48.618531 Relocation complete.
670 17:55:48.625001 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
671 17:55:48.628509 In relocation handler: CPU 2
672 17:55:48.632630 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
673 17:55:48.638374 Writing SMRR. base = 0x7b800006, mask=0xff800c00
674 17:55:48.638435 Relocation complete.
675 17:55:48.641944 Initializing CPU #0
676 17:55:48.645357 CPU: vendor Intel device 906a4
677 17:55:48.648455 CPU: family 06, model 9a, stepping 04
678 17:55:48.651817 Clearing out pending MCEs
679 17:55:48.655288 cpu: energy policy set to 7
680 17:55:48.655363 Turbo is unavailable
681 17:55:48.661692 microcode: Update skipped, already up-to-date
682 17:55:48.661771 CPU #0 initialized
683 17:55:48.665275 Initializing CPU #1
684 17:55:48.665337 Initializing CPU #4
685 17:55:48.668547 Initializing CPU #2
686 17:55:48.671891 Initializing CPU #3
687 17:55:48.675280 CPU: vendor Intel device 906a4
688 17:55:48.678583 CPU: family 06, model 9a, stepping 04
689 17:55:48.681795 CPU: vendor Intel device 906a4
690 17:55:48.685283 CPU: family 06, model 9a, stepping 04
691 17:55:48.688558 CPU: vendor Intel device 906a4
692 17:55:48.691951 CPU: family 06, model 9a, stepping 04
693 17:55:48.695073 Clearing out pending MCEs
694 17:55:48.698827 CPU: vendor Intel device 906a4
695 17:55:48.702185 CPU: family 06, model 9a, stepping 04
696 17:55:48.705079 Clearing out pending MCEs
697 17:55:48.705140 Clearing out pending MCEs
698 17:55:48.708459 cpu: energy policy set to 7
699 17:55:48.712018 cpu: energy policy set to 7
700 17:55:48.715264 Clearing out pending MCEs
701 17:55:48.718498 microcode: Update skipped, already up-to-date
702 17:55:48.721827 CPU #4 initialized
703 17:55:48.725310 microcode: Update skipped, already up-to-date
704 17:55:48.728721 CPU #2 initialized
705 17:55:48.732008 cpu: energy policy set to 7
706 17:55:48.732063 cpu: energy policy set to 7
707 17:55:48.738530 microcode: Update skipped, already up-to-date
708 17:55:48.738588 CPU #1 initialized
709 17:55:48.745608 microcode: Update skipped, already up-to-date
710 17:55:48.745666 CPU #3 initialized
711 17:55:48.752235 bsp_do_flight_plan done after 453 msecs.
712 17:55:48.752293 Enabling SMIs.
713 17:55:48.758426 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 244 / 352 ms
714 17:55:48.775676 Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214)
715 17:55:48.782750 Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123)
716 17:55:48.788984 Probing TPM I2C: done! DID_VID 0x00281ae0
717 17:55:48.792334 Locality already claimed
718 17:55:48.795389 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
719 17:55:48.806606 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
720 17:55:48.809970 Enabling GPIO PM b/c CR50 has long IRQ pulse support
721 17:55:48.813399 fw_config match found: AUDIO=NAU88L25B_I2S
722 17:55:48.819919 CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4
723 17:55:48.826685 Found a VBT of 8704 bytes after decompression
724 17:55:48.826757 PsysPmax = 214W
725 17:55:48.830172 PCI 1.0, PIN A, using IRQ #16
726 17:55:48.833373 PCI 2.0, PIN A, using IRQ #17
727 17:55:48.836606 PCI 4.0, PIN A, using IRQ #18
728 17:55:48.840051 PCI 5.0, PIN A, using IRQ #16
729 17:55:48.843411 PCI 6.0, PIN A, using IRQ #16
730 17:55:48.846607 PCI 6.2, PIN C, using IRQ #18
731 17:55:48.850048 PCI 7.0, PIN A, using IRQ #19
732 17:55:48.853476 PCI 7.1, PIN B, using IRQ #20
733 17:55:48.856768 PCI 7.2, PIN C, using IRQ #21
734 17:55:48.860062 PCI 7.3, PIN D, using IRQ #22
735 17:55:48.863368 PCI 8.0, PIN A, using IRQ #23
736 17:55:48.866691 PCI D.0, PIN A, using IRQ #17
737 17:55:48.870211 PCI D.1, PIN B, using IRQ #19
738 17:55:48.873373 PCI 10.0, PIN A, using IRQ #24
739 17:55:48.876755 PCI 10.1, PIN B, using IRQ #25
740 17:55:48.876812 PCI 10.6, PIN C, using IRQ #20
741 17:55:48.880175 PCI 10.7, PIN D, using IRQ #21
742 17:55:48.883456 PCI 11.0, PIN A, using IRQ #26
743 17:55:48.886979 PCI 11.1, PIN B, using IRQ #27
744 17:55:48.890051 PCI 11.2, PIN C, using IRQ #28
745 17:55:48.893456 PCI 11.3, PIN D, using IRQ #29
746 17:55:48.896623 PCI 12.0, PIN A, using IRQ #30
747 17:55:48.900101 PCI 12.6, PIN B, using IRQ #31
748 17:55:48.903878 PCI 12.7, PIN C, using IRQ #22
749 17:55:48.906951 PCI 13.0, PIN A, using IRQ #32
750 17:55:48.910401 PCI 13.1, PIN B, using IRQ #33
751 17:55:48.913679 PCI 13.2, PIN C, using IRQ #34
752 17:55:48.916913 PCI 13.3, PIN D, using IRQ #35
753 17:55:48.920097 PCI 14.0, PIN B, using IRQ #23
754 17:55:48.923631 PCI 14.1, PIN A, using IRQ #36
755 17:55:48.923689 PCI 14.3, PIN C, using IRQ #17
756 17:55:48.926818 PCI 15.0, PIN A, using IRQ #37
757 17:55:48.930146 PCI 15.1, PIN B, using IRQ #38
758 17:55:48.933677 PCI 15.2, PIN C, using IRQ #39
759 17:55:48.936941 PCI 15.3, PIN D, using IRQ #40
760 17:55:48.940443 PCI 16.0, PIN A, using IRQ #18
761 17:55:48.943761 PCI 16.1, PIN B, using IRQ #19
762 17:55:48.947374 PCI 16.2, PIN C, using IRQ #20
763 17:55:48.950237 PCI 16.3, PIN D, using IRQ #21
764 17:55:48.953572 PCI 16.4, PIN A, using IRQ #18
765 17:55:48.956932 PCI 16.5, PIN B, using IRQ #19
766 17:55:48.960564 PCI 17.0, PIN A, using IRQ #22
767 17:55:48.963632 PCI 19.0, PIN A, using IRQ #41
768 17:55:48.966969 PCI 19.1, PIN B, using IRQ #42
769 17:55:48.970222 PCI 19.2, PIN C, using IRQ #43
770 17:55:48.973637 PCI 1C.0, PIN A, using IRQ #16
771 17:55:48.973704 PCI 1C.1, PIN B, using IRQ #17
772 17:55:48.977102 PCI 1C.2, PIN C, using IRQ #18
773 17:55:48.980244 PCI 1C.3, PIN D, using IRQ #19
774 17:55:48.983604 PCI 1C.4, PIN A, using IRQ #16
775 17:55:48.987015 PCI 1C.5, PIN B, using IRQ #17
776 17:55:48.990222 PCI 1C.6, PIN C, using IRQ #18
777 17:55:48.994384 PCI 1C.7, PIN D, using IRQ #19
778 17:55:48.997028 PCI 1D.0, PIN A, using IRQ #16
779 17:55:49.000466 PCI 1D.1, PIN B, using IRQ #17
780 17:55:49.003783 PCI 1D.2, PIN C, using IRQ #18
781 17:55:49.007104 PCI 1D.3, PIN D, using IRQ #19
782 17:55:49.010301 PCI 1E.0, PIN A, using IRQ #23
783 17:55:49.013651 PCI 1E.1, PIN B, using IRQ #20
784 17:55:49.017281 PCI 1E.2, PIN C, using IRQ #44
785 17:55:49.020240 PCI 1E.3, PIN D, using IRQ #45
786 17:55:49.020300 PCI 1F.3, PIN B, using IRQ #22
787 17:55:49.023661 PCI 1F.4, PIN C, using IRQ #23
788 17:55:49.027134 PCI 1F.6, PIN D, using IRQ #20
789 17:55:49.030345 PCI 1F.7, PIN A, using IRQ #21
790 17:55:49.037084 IRQ: Using dynamically assigned PCI IO-APIC IRQs
791 17:55:49.043879 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
792 17:55:49.105461 FSPS returned 0
793 17:55:49.108951 Executing Phase 1 of FspMultiPhaseSiInit
794 17:55:49.118960 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
795 17:55:49.122353 port C0 DISC req: usage 1 usb3 1 usb2 1
796 17:55:49.125584 Raw Buffer output 0 00000111
797 17:55:49.128785 Raw Buffer output 1 00000000
798 17:55:49.132403 pmc_send_ipc_cmd succeeded
799 17:55:49.135838 port C1 DISC req: usage 1 usb3 3 usb2 3
800 17:55:49.139166 Raw Buffer output 0 00000331
801 17:55:49.142272 Raw Buffer output 1 00000000
802 17:55:49.146631 pmc_send_ipc_cmd succeeded
803 17:55:49.153201 AP Mode Entry enabled, skip waiting for DisplayPort connection
804 17:55:49.159403 Detected 5 core, 5 thread CPU.
805 17:55:49.162860 Detected 5 core, 5 thread CPU.
806 17:55:49.167994 Detected 5 core, 5 thread CPU.
807 17:55:49.171119 Detected 5 core, 5 thread CPU.
808 17:55:49.174633 Detected 5 core, 5 thread CPU.
809 17:55:49.177893 Detected 5 core, 5 thread CPU.
810 17:55:49.181158 Detected 5 core, 5 thread CPU.
811 17:55:49.184670 Detected 5 core, 5 thread CPU.
812 17:55:49.187888 Detected 5 core, 5 thread CPU.
813 17:55:49.191460 Detected 5 core, 5 thread CPU.
814 17:55:49.194468 Detected 5 core, 5 thread CPU.
815 17:55:49.198092 Detected 5 core, 5 thread CPU.
816 17:55:49.201522 Detected 5 core, 5 thread CPU.
817 17:55:49.204681 Detected 5 core, 5 thread CPU.
818 17:55:49.208023 Detected 5 core, 5 thread CPU.
819 17:55:49.211572 Detected 5 core, 5 thread CPU.
820 17:55:49.309102 Detected 5 core, 5 thread CPU.
821 17:55:49.312628 Detected 5 core, 5 thread CPU.
822 17:55:49.315855 Detected 5 core, 5 thread CPU.
823 17:55:49.319113 Detected 5 core, 5 thread CPU.
824 17:55:49.322563 Detected 5 core, 5 thread CPU.
825 17:55:49.325819 Detected 5 core, 5 thread CPU.
826 17:55:49.329137 Detected 5 core, 5 thread CPU.
827 17:55:49.332423 Detected 5 core, 5 thread CPU.
828 17:55:49.335850 Detected 5 core, 5 thread CPU.
829 17:55:49.339594 Detected 5 core, 5 thread CPU.
830 17:55:49.342490 Detected 5 core, 5 thread CPU.
831 17:55:49.345913 Detected 5 core, 5 thread CPU.
832 17:55:49.349387 Detected 5 core, 5 thread CPU.
833 17:55:49.352542 Detected 5 core, 5 thread CPU.
834 17:55:49.356634 Display FSP Version Info HOB
835 17:55:49.359351 Reference Code - CPU = c.0.65.70
836 17:55:49.359409 uCode Version = 0.0.4.23
837 17:55:49.362556 TXT ACM version = ff.ff.ff.ffff
838 17:55:49.365801 Reference Code - ME = c.0.65.70
839 17:55:49.369104 MEBx version = 0.0.0.0
840 17:55:49.372620 ME Firmware Version = Lite SKU
841 17:55:49.375989 Reference Code - PCH = c.0.65.70
842 17:55:49.379181 PCH-CRID Status = Disabled
843 17:55:49.382655 PCH-CRID Original Value = ff.ff.ff.ffff
844 17:55:49.385898 PCH-CRID New Value = ff.ff.ff.ffff
845 17:55:49.389218 OPROM - RST - RAID = ff.ff.ff.ffff
846 17:55:49.392341 PCH Hsio Version = 4.0.0.0
847 17:55:49.396148 Reference Code - SA - System Agent = c.0.65.70
848 17:55:49.399511 Reference Code - MRC = 0.0.3.80
849 17:55:49.402629 SA - PCIe Version = c.0.65.70
850 17:55:49.405963 SA-CRID Status = Disabled
851 17:55:49.409255 SA-CRID Original Value = 0.0.0.4
852 17:55:49.412564 SA-CRID New Value = 0.0.0.4
853 17:55:49.415765 OPROM - VBIOS = ff.ff.ff.ffff
854 17:55:49.419160 IO Manageability Engine FW Version = 24.0.4.0
855 17:55:49.422786 PHY Build Version = 0.0.0.2016
856 17:55:49.425709 Thunderbolt(TM) FW Version = 11.5.0.0
857 17:55:49.432442 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
858 17:55:49.436216 Found PCIe Root Port #7 at PCI: 00:1c.0.
859 17:55:49.443070 Found PCIe Root Port #8 at PCI: 00:1c.7.
860 17:55:49.445956 Found PCIe Root Port #12 at PCI: 00:1d.0.
861 17:55:49.455919 pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.
862 17:55:49.466195 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
863 17:55:49.472721 Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0.
864 17:55:49.476053 Found PCIe Root Port #1 at PCI: 00:07.0.
865 17:55:49.479329 Found PCIe Root Port #2 at PCI: 00:07.1.
866 17:55:49.482577 Found PCIe Root Port #3 at PCI: 00:07.2.
867 17:55:49.486152 Sending EOP early from SoC
868 17:55:49.489293 HECI: Sending End-of-Post
869 17:55:49.496168 BS: BS_DEV_INIT_CHIPS run times (exec / console): 183 / 546 ms
870 17:55:49.499545 Enumerating buses...
871 17:55:49.502836 Show all devs... Before device enumeration.
872 17:55:49.505783 Root Device: enabled 1
873 17:55:49.505863 CPU_CLUSTER: 0: enabled 1
874 17:55:49.509439 DOMAIN: 0000: enabled 1
875 17:55:49.512379 GPIO: 0: enabled 1
876 17:55:49.515738 PCI: 00:00.0: enabled 1
877 17:55:49.515818 PCI: 00:01.0: enabled 0
878 17:55:49.519417 PCI: 00:01.1: enabled 0
879 17:55:49.522639 PCI: 00:02.0: enabled 1
880 17:55:49.522717 PCI: 00:04.0: enabled 1
881 17:55:49.525724 PCI: 00:05.0: enabled 0
882 17:55:49.529177 PCI: 00:06.0: enabled 0
883 17:55:49.532506 PCI: 00:06.2: enabled 0
884 17:55:49.532585 PCI: 00:07.0: enabled 1
885 17:55:49.535534 PCI: 00:07.1: enabled 1
886 17:55:49.539134 PCI: 00:07.2: enabled 1
887 17:55:49.542354 PCI: 00:07.3: enabled 0
888 17:55:49.542433 PCI: 00:08.0: enabled 0
889 17:55:49.545782 PCI: 00:09.0: enabled 0
890 17:55:49.548934 PCI: 00:0a.0: enabled 1
891 17:55:49.552263 PCI: 00:0d.0: enabled 1
892 17:55:49.552342 PCI: 00:0d.1: enabled 0
893 17:55:49.555592 PCI: 00:0d.2: enabled 1
894 17:55:49.558939 PCI: 00:0d.3: enabled 1
895 17:55:49.559017 PCI: 00:0e.0: enabled 0
896 17:55:49.562463 PCI: 00:10.0: enabled 0
897 17:55:49.565812 PCI: 00:10.1: enabled 0
898 17:55:49.569024 PCI: 00:10.6: enabled 0
899 17:55:49.569104 PCI: 00:10.7: enabled 0
900 17:55:49.572368 PCI: 00:12.0: enabled 0
901 17:55:49.575525 PCI: 00:12.6: enabled 0
902 17:55:49.578856 PCI: 00:12.7: enabled 0
903 17:55:49.578935 PCI: 00:13.0: enabled 0
904 17:55:49.582207 PCI: 00:14.0: enabled 1
905 17:55:49.585574 PCI: 00:14.1: enabled 0
906 17:55:49.589117 PCI: 00:14.2: enabled 1
907 17:55:49.589196 PCI: 00:14.3: enabled 1
908 17:55:49.592382 PCI: 00:15.0: enabled 1
909 17:55:49.595761 PCI: 00:15.1: enabled 1
910 17:55:49.598999 PCI: 00:15.2: enabled 0
911 17:55:49.599082 PCI: 00:15.3: enabled 0
912 17:55:49.602222 PCI: 00:16.0: enabled 1
913 17:55:49.605455 PCI: 00:16.1: enabled 0
914 17:55:49.605533 PCI: 00:16.2: enabled 0
915 17:55:49.609025 PCI: 00:16.3: enabled 0
916 17:55:49.612318 PCI: 00:16.4: enabled 0
917 17:55:49.615679 PCI: 00:16.5: enabled 0
918 17:55:49.615745 PCI: 00:17.0: enabled 1
919 17:55:49.618918 PCI: 00:19.0: enabled 0
920 17:55:49.622322 PCI: 00:19.1: enabled 0
921 17:55:49.625511 PCI: 00:19.2: enabled 0
922 17:55:49.625571 PCI: 00:1a.0: enabled 0
923 17:55:49.628856 PCI: 00:1c.0: enabled 0
924 17:55:49.632303 PCI: 00:1c.1: enabled 0
925 17:55:49.632382 PCI: 00:1c.2: enabled 0
926 17:55:49.635452 PCI: 00:1c.3: enabled 0
927 17:55:49.638762 PCI: 00:1c.4: enabled 0
928 17:55:49.642104 PCI: 00:1c.5: enabled 1
929 17:55:49.642183 PCI: 00:1c.0: enabled 1
930 17:55:49.645676 PCI: 00:1c.7: enabled 1
931 17:55:49.648690 PCI: 00:1d.0: enabled 0
932 17:55:49.652303 PCI: 00:1d.1: enabled 0
933 17:55:49.652382 PCI: 00:1d.2: enabled 0
934 17:55:49.655586 PCI: 00:1d.0: enabled 1
935 17:55:49.658919 PCI: 00:1e.0: enabled 1
936 17:55:49.662256 PCI: 00:1e.1: enabled 0
937 17:55:49.662334 PCI: 00:1e.2: enabled 0
938 17:55:49.665488 PCI: 00:1e.3: enabled 1
939 17:55:49.668689 PCI: 00:1f.0: enabled 1
940 17:55:49.672073 PCI: 00:1f.1: enabled 0
941 17:55:49.672155 PCI: 00:1f.2: enabled 1
942 17:55:49.675316 PCI: 00:1f.3: enabled 1
943 17:55:49.678737 PCI: 00:1f.4: enabled 1
944 17:55:49.678816 PCI: 00:1f.5: enabled 1
945 17:55:49.682102 PCI: 00:1f.6: enabled 0
946 17:55:49.685278 PCI: 00:1f.7: enabled 0
947 17:55:49.688776 GENERIC: 0.0: enabled 1
948 17:55:49.688854 GENERIC: 0.0: enabled 1
949 17:55:49.692023 GENERIC: 1.0: enabled 1
950 17:55:49.695407 GENERIC: 0.0: enabled 1
951 17:55:49.698814 GENERIC: 1.0: enabled 1
952 17:55:49.698892 USB0 port 0: enabled 1
953 17:55:49.701995 GENERIC: 0.0: enabled 1
954 17:55:49.705256 GENERIC: 0.0: enabled 1
955 17:55:49.708658 USB0 port 0: enabled 1
956 17:55:49.708738 GENERIC: 0.0: enabled 1
957 17:55:49.711919 I2C: 00:1a: enabled 1
958 17:55:49.715231 I2C: 00:50: enabled 1
959 17:55:49.715310 PCI: 00:00.0: enabled 1
960 17:55:49.718394 PCI: 00:00.0: enabled 1
961 17:55:49.721890 GENERIC: 0.0: enabled 1
962 17:55:49.725364 GENERIC: 0.0: enabled 1
963 17:55:49.725443 PNP: 0c09.0: enabled 1
964 17:55:49.728785 GENERIC: 0.0: enabled 1
965 17:55:49.731893 USB3 port 0: enabled 1
966 17:55:49.731972 USB3 port 1: enabled 0
967 17:55:49.735401 USB3 port 2: enabled 1
968 17:55:49.738386 USB3 port 3: enabled 0
969 17:55:49.741727 USB2 port 0: enabled 1
970 17:55:49.741810 USB2 port 1: enabled 0
971 17:55:49.745299 USB2 port 2: enabled 1
972 17:55:49.748562 USB2 port 3: enabled 1
973 17:55:49.748645 USB2 port 4: enabled 1
974 17:55:49.798505 USB2 port 5: enabled 1
975 17:55:49.798602 USB2 port 6: enabled 1
976 17:55:49.799071 USB2 port 7: enabled 1
977 17:55:49.799150 USB2 port 8: enabled 0
978 17:55:49.799236 USB2 port 9: enabled 1
979 17:55:49.799480 USB3 port 0: enabled 1
980 17:55:49.799538 USB3 port 1: enabled 1
981 17:55:49.799600 USB3 port 2: enabled 1
982 17:55:49.799659 USB3 port 3: enabled 1
983 17:55:49.799718 GENERIC: 0.0: enabled 1
984 17:55:49.799788 GENERIC: 1.0: enabled 1
985 17:55:49.799844 APIC: 00: enabled 1
986 17:55:49.799909 APIC: 16: enabled 1
987 17:55:49.799978 APIC: 10: enabled 1
988 17:55:49.800033 APIC: 12: enabled 1
989 17:55:49.800090 APIC: 14: enabled 1
990 17:55:49.800324 Compare with tree...
991 17:55:49.800378 Root Device: enabled 1
992 17:55:49.800435 CPU_CLUSTER: 0: enabled 1
993 17:55:49.800501 APIC: 00: enabled 1
994 17:55:49.800554 APIC: 16: enabled 1
995 17:55:49.800610 APIC: 10: enabled 1
996 17:55:49.848463 APIC: 12: enabled 1
997 17:55:49.848560 APIC: 14: enabled 1
998 17:55:49.848825 DOMAIN: 0000: enabled 1
999 17:55:49.848888 GPIO: 0: enabled 1
1000 17:55:49.848953 PCI: 00:00.0: enabled 1
1001 17:55:49.849018 PCI: 00:01.0: enabled 0
1002 17:55:49.849080 PCI: 00:01.1: enabled 0
1003 17:55:49.849140 PCI: 00:02.0: enabled 1
1004 17:55:49.849203 PCI: 00:04.0: enabled 1
1005 17:55:49.849259 GENERIC: 0.0: enabled 1
1006 17:55:49.849326 PCI: 00:05.0: enabled 0
1007 17:55:49.849381 PCI: 00:06.0: enabled 0
1008 17:55:49.849448 PCI: 00:06.2: enabled 0
1009 17:55:49.849501 PCI: 00:07.0: enabled 1
1010 17:55:49.850102 GENERIC: 0.0: enabled 1
1011 17:55:49.850161 PCI: 00:07.1: enabled 1
1012 17:55:49.850220 GENERIC: 1.0: enabled 1
1013 17:55:49.850450 PCI: 00:07.2: enabled 1
1014 17:55:49.850504 GENERIC: 0.0: enabled 1
1015 17:55:49.898589 PCI: 00:08.0: enabled 0
1016 17:55:49.898679 PCI: 00:09.0: enabled 0
1017 17:55:49.899005 PCI: 00:0a.0: enabled 1
1018 17:55:49.899067 PCI: 00:0d.0: enabled 1
1019 17:55:49.899128 USB0 port 0: enabled 1
1020 17:55:49.899360 USB3 port 0: enabled 1
1021 17:55:49.899415 USB3 port 1: enabled 0
1022 17:55:49.899485 USB3 port 2: enabled 1
1023 17:55:49.899542 USB3 port 3: enabled 0
1024 17:55:49.899612 PCI: 00:0d.1: enabled 0
1025 17:55:49.899674 PCI: 00:0d.2: enabled 1
1026 17:55:49.899733 GENERIC: 0.0: enabled 1
1027 17:55:49.900019 PCI: 00:0d.3: enabled 1
1028 17:55:49.900075 GENERIC: 0.0: enabled 1
1029 17:55:49.900309 PCI: 00:0e.0: enabled 0
1030 17:55:49.900362 PCI: 00:10.0: enabled 0
1031 17:55:49.900592 PCI: 00:10.1: enabled 0
1032 17:55:49.900645 PCI: 00:10.6: enabled 0
1033 17:55:49.900701 PCI: 00:10.7: enabled 0
1034 17:55:49.907716 PCI: 00:12.0: enabled 0
1035 17:55:49.907800 PCI: 00:12.6: enabled 0
1036 17:55:49.911042 PCI: 00:12.7: enabled 0
1037 17:55:49.911124 PCI: 00:13.0: enabled 0
1038 17:55:49.914254 PCI: 00:14.0: enabled 1
1039 17:55:49.914338 USB0 port 0: enabled 1
1040 17:55:49.917755 USB2 port 0: enabled 1
1041 17:55:49.921119 USB2 port 1: enabled 0
1042 17:55:49.924288 USB2 port 2: enabled 1
1043 17:55:49.927984 USB2 port 3: enabled 1
1044 17:55:49.928061 USB2 port 4: enabled 1
1045 17:55:49.930902 USB2 port 5: enabled 1
1046 17:55:49.934449 USB2 port 6: enabled 1
1047 17:55:49.937883 USB2 port 7: enabled 1
1048 17:55:49.940907 USB2 port 8: enabled 0
1049 17:55:49.944453 USB2 port 9: enabled 1
1050 17:55:49.944532 USB3 port 0: enabled 1
1051 17:55:49.947930 USB3 port 1: enabled 1
1052 17:55:49.951009 USB3 port 2: enabled 1
1053 17:55:49.954456 USB3 port 3: enabled 1
1054 17:55:49.957664 PCI: 00:14.1: enabled 0
1055 17:55:49.957742 PCI: 00:14.2: enabled 1
1056 17:55:49.960855 PCI: 00:14.3: enabled 1
1057 17:55:49.964602 GENERIC: 0.0: enabled 1
1058 17:55:49.967550 PCI: 00:15.0: enabled 1
1059 17:55:49.971084 I2C: 00:1a: enabled 1
1060 17:55:49.971162 PCI: 00:15.1: enabled 1
1061 17:55:49.974356 I2C: 00:50: enabled 1
1062 17:55:49.977540 PCI: 00:15.2: enabled 0
1063 17:55:49.980918 PCI: 00:15.3: enabled 0
1064 17:55:49.980996 PCI: 00:16.0: enabled 1
1065 17:55:49.984709 PCI: 00:16.1: enabled 0
1066 17:55:49.987515 PCI: 00:16.2: enabled 0
1067 17:55:49.991042 PCI: 00:16.3: enabled 0
1068 17:55:49.994289 PCI: 00:16.4: enabled 0
1069 17:55:49.994366 PCI: 00:16.5: enabled 0
1070 17:55:49.997628 PCI: 00:17.0: enabled 1
1071 17:55:50.001017 PCI: 00:19.0: enabled 0
1072 17:55:50.004318 PCI: 00:19.1: enabled 0
1073 17:55:50.007936 PCI: 00:19.2: enabled 0
1074 17:55:50.008015 PCI: 00:1a.0: enabled 0
1075 17:55:50.010922 PCI: 00:1c.0: enabled 1
1076 17:55:50.014702 PCI: 00:00.0: enabled 1
1077 17:55:50.017742 PCI: 00:1c.7: enabled 1
1078 17:55:50.020923 GENERIC: 0.0: enabled 1
1079 17:55:50.021001 PCI: 00:1d.0: enabled 1
1080 17:55:50.024311 GENERIC: 0.0: enabled 1
1081 17:55:50.027867 PCI: 00:1e.0: enabled 1
1082 17:55:50.030966 PCI: 00:1e.1: enabled 0
1083 17:55:50.034515 PCI: 00:1e.2: enabled 0
1084 17:55:50.034595 PCI: 00:1e.3: enabled 1
1085 17:55:50.037750 PCI: 00:1f.0: enabled 1
1086 17:55:50.041116 PNP: 0c09.0: enabled 1
1087 17:55:50.044790 PCI: 00:1f.1: enabled 0
1088 17:55:50.047748 PCI: 00:1f.2: enabled 1
1089 17:55:50.047853 GENERIC: 0.0: enabled 1
1090 17:55:50.051280 GENERIC: 0.0: enabled 1
1091 17:55:50.054315 GENERIC: 1.0: enabled 1
1092 17:55:50.057656 PCI: 00:1f.3: enabled 1
1093 17:55:50.061029 PCI: 00:1f.4: enabled 1
1094 17:55:50.061123 PCI: 00:1f.5: enabled 1
1095 17:55:50.064568 PCI: 00:1f.6: enabled 0
1096 17:55:50.067955 PCI: 00:1f.7: enabled 0
1097 17:55:50.070982 Root Device scanning...
1098 17:55:50.074416 scan_static_bus for Root Device
1099 17:55:50.074509 CPU_CLUSTER: 0 enabled
1100 17:55:50.077902 DOMAIN: 0000 enabled
1101 17:55:50.081020 DOMAIN: 0000 scanning...
1102 17:55:50.084560 PCI: pci_scan_bus for bus 00
1103 17:55:50.087752 PCI: 00:00.0 [8086/0000] ops
1104 17:55:50.090948 PCI: 00:00.0 [8086/4619] enabled
1105 17:55:50.094735 PCI: 00:02.0 [8086/0000] bus ops
1106 17:55:50.097950 PCI: 00:02.0 [8086/46b3] enabled
1107 17:55:50.101362 PCI: 00:04.0 [8086/0000] bus ops
1108 17:55:50.104309 PCI: 00:04.0 [8086/461d] enabled
1109 17:55:50.107945 PCI: 00:07.0 subordinate bus PCI Express
1110 17:55:50.110986 PCI: 00:07.0 hot-plug capable
1111 17:55:50.114372 PCI: 00:07.0 [8086/466e] enabled
1112 17:55:50.117833 PCI: 00:07.1 subordinate bus PCI Express
1113 17:55:50.121052 PCI: 00:07.1 hot-plug capable
1114 17:55:50.124393 PCI: 00:07.1 [8086/463f] enabled
1115 17:55:50.127799 PCI: 00:07.2 subordinate bus PCI Express
1116 17:55:50.131029 PCI: 00:07.2 hot-plug capable
1117 17:55:50.134391 PCI: 00:07.2 [8086/462f] enabled
1118 17:55:50.137930 PCI: 00:08.0 [8086/464f] disabled
1119 17:55:50.141240 PCI: 00:0a.0 [8086/467d] enabled
1120 17:55:50.144596 PCI: 00:0d.0 [8086/0000] bus ops
1121 17:55:50.148066 PCI: 00:0d.0 [8086/461e] enabled
1122 17:55:50.151276 PCI: 00:0d.2 [8086/0000] bus ops
1123 17:55:50.154583 PCI: 00:0d.2 [8086/463e] enabled
1124 17:55:50.158040 PCI: 00:0d.3 [8086/0000] bus ops
1125 17:55:50.161340 PCI: 00:0d.3 [8086/466d] enabled
1126 17:55:50.164585 PCI: 00:14.0 [8086/0000] bus ops
1127 17:55:50.167990 PCI: 00:14.0 [8086/51ed] enabled
1128 17:55:50.171144 PCI: 00:14.2 [8086/51ef] enabled
1129 17:55:50.174766 PCI: 00:14.3 [8086/0000] bus ops
1130 17:55:50.177971 PCI: 00:14.3 [8086/51f0] enabled
1131 17:55:50.181371 PCI: 00:15.0 [8086/0000] bus ops
1132 17:55:50.184866 PCI: 00:15.0 [8086/51e8] enabled
1133 17:55:50.188031 PCI: 00:15.1 [8086/0000] bus ops
1134 17:55:50.191860 PCI: 00:15.1 [8086/51e9] enabled
1135 17:55:50.194569 PCI: 00:16.0 [8086/0000] ops
1136 17:55:50.197932 PCI: 00:16.0 [8086/51e0] enabled
1137 17:55:50.204689 PCI: Static device PCI: 00:17.0 not found, disabling it.
1138 17:55:50.207899 PCI: 00:1c.0 [8086/0000] bus ops
1139 17:55:50.211281 PCI: 00:1c.0 [8086/51be] enabled
1140 17:55:50.214755 PCI: 00:1c.7 [8086/0000] bus ops
1141 17:55:50.217878 PCI: 00:1c.7 [8086/51bf] enabled
1142 17:55:50.221253 PCI: 00:1d.0 [8086/0000] bus ops
1143 17:55:50.224658 PCI: 00:1d.0 [8086/51b3] enabled
1144 17:55:50.227679 PCI: 00:1e.0 [8086/0000] ops
1145 17:55:50.231151 PCI: 00:1e.0 [8086/51a8] enabled
1146 17:55:50.234748 PCI: 00:1e.3 [8086/0000] bus ops
1147 17:55:50.238180 PCI: 00:1e.3 [8086/51ab] enabled
1148 17:55:50.238238 PCI: 00:1f.0 [8086/0000] bus ops
1149 17:55:50.241153 PCI: 00:1f.0 [8086/5182] enabled
1150 17:55:50.244990 RTC Init
1151 17:55:50.248416 Set power on after power failure.
1152 17:55:50.248473 Disabling Deep S3
1153 17:55:50.251446 Disabling Deep S3
1154 17:55:50.254971 Disabling Deep S4
1155 17:55:50.255039 Disabling Deep S4
1156 17:55:50.258423 Disabling Deep S5
1157 17:55:50.258490 Disabling Deep S5
1158 17:55:50.261815 PCI: 00:1f.2 [0000/0000] hidden
1159 17:55:50.265368 PCI: 00:1f.3 [8086/0000] bus ops
1160 17:55:50.268435 PCI: 00:1f.3 [8086/51c8] enabled
1161 17:55:50.271454 PCI: 00:1f.4 [8086/0000] bus ops
1162 17:55:50.274934 PCI: 00:1f.4 [8086/51a3] enabled
1163 17:55:50.278321 PCI: 00:1f.5 [8086/0000] bus ops
1164 17:55:50.281416 PCI: 00:1f.5 [8086/51a4] enabled
1165 17:55:50.284894 GPIO: 0 enabled
1166 17:55:50.288421 PCI: Leftover static devices:
1167 17:55:50.288489 PCI: 00:01.0
1168 17:55:50.288552 PCI: 00:01.1
1169 17:55:50.291606 PCI: 00:05.0
1170 17:55:50.291678 PCI: 00:06.0
1171 17:55:50.295037 PCI: 00:06.2
1172 17:55:50.295094 PCI: 00:09.0
1173 17:55:50.298282 PCI: 00:0d.1
1174 17:55:50.298339 PCI: 00:0e.0
1175 17:55:50.298386 PCI: 00:10.0
1176 17:55:50.301649 PCI: 00:10.1
1177 17:55:50.301706 PCI: 00:10.6
1178 17:55:50.304938 PCI: 00:10.7
1179 17:55:50.304999 PCI: 00:12.0
1180 17:55:50.305053 PCI: 00:12.6
1181 17:55:50.308417 PCI: 00:12.7
1182 17:55:50.308478 PCI: 00:13.0
1183 17:55:50.311702 PCI: 00:14.1
1184 17:55:50.311761 PCI: 00:15.2
1185 17:55:50.311807 PCI: 00:15.3
1186 17:55:50.315084 PCI: 00:16.1
1187 17:55:50.315141 PCI: 00:16.2
1188 17:55:50.318269 PCI: 00:16.3
1189 17:55:50.318337 PCI: 00:16.4
1190 17:55:50.318398 PCI: 00:16.5
1191 17:55:50.321585 PCI: 00:17.0
1192 17:55:50.321644 PCI: 00:19.0
1193 17:55:50.325080 PCI: 00:19.1
1194 17:55:50.325137 PCI: 00:19.2
1195 17:55:50.328497 PCI: 00:1a.0
1196 17:55:50.328554 PCI: 00:1e.1
1197 17:55:50.328600 PCI: 00:1e.2
1198 17:55:50.331863 PCI: 00:1f.1
1199 17:55:50.331935 PCI: 00:1f.6
1200 17:55:50.335092 PCI: 00:1f.7
1201 17:55:50.338436 PCI: Check your devicetree.cb.
1202 17:55:50.338505 PCI: 00:02.0 scanning...
1203 17:55:50.341946 scan_generic_bus for PCI: 00:02.0
1204 17:55:50.345456 scan_generic_bus for PCI: 00:02.0 done
1205 17:55:50.352273 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1206 17:55:50.355321 PCI: 00:04.0 scanning...
1207 17:55:50.358484 scan_generic_bus for PCI: 00:04.0
1208 17:55:50.358540 GENERIC: 0.0 enabled
1209 17:55:50.366243 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1210 17:55:50.371942 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1211 17:55:50.372022 PCI: 00:07.0 scanning...
1212 17:55:50.375286 do_pci_scan_bridge for PCI: 00:07.0
1213 17:55:50.378743 PCI: pci_scan_bus for bus 01
1214 17:55:50.382001 GENERIC: 0.0 enabled
1215 17:55:50.385308 scan_bus: bus PCI: 00:07.0 finished in 8 msecs
1216 17:55:50.388695 PCI: 00:07.1 scanning...
1217 17:55:50.391921 do_pci_scan_bridge for PCI: 00:07.1
1218 17:55:50.395450 PCI: pci_scan_bus for bus 2c
1219 17:55:50.398663 GENERIC: 1.0 enabled
1220 17:55:50.402034 scan_bus: bus PCI: 00:07.1 finished in 8 msecs
1221 17:55:50.405363 PCI: 00:07.2 scanning...
1222 17:55:50.408604 do_pci_scan_bridge for PCI: 00:07.2
1223 17:55:50.411906 PCI: pci_scan_bus for bus 57
1224 17:55:50.411964 GENERIC: 0.0 enabled
1225 17:55:50.418632 scan_bus: bus PCI: 00:07.2 finished in 8 msecs
1226 17:55:50.421933 PCI: 00:0d.0 scanning...
1227 17:55:50.425198 scan_static_bus for PCI: 00:0d.0
1228 17:55:50.425291 USB0 port 0 enabled
1229 17:55:50.428745 USB0 port 0 scanning...
1230 17:55:50.432053 scan_static_bus for USB0 port 0
1231 17:55:50.435346 USB3 port 0 enabled
1232 17:55:50.435431 USB3 port 1 disabled
1233 17:55:50.438507 USB3 port 2 enabled
1234 17:55:50.438573 USB3 port 3 disabled
1235 17:55:50.441974 USB3 port 0 scanning...
1236 17:55:50.445421 scan_static_bus for USB3 port 0
1237 17:55:50.448542 scan_static_bus for USB3 port 0 done
1238 17:55:50.455766 scan_bus: bus USB3 port 0 finished in 6 msecs
1239 17:55:50.455846 USB3 port 2 scanning...
1240 17:55:50.458584 scan_static_bus for USB3 port 2
1241 17:55:50.461842 scan_static_bus for USB3 port 2 done
1242 17:55:50.468525 scan_bus: bus USB3 port 2 finished in 6 msecs
1243 17:55:50.471813 scan_static_bus for USB0 port 0 done
1244 17:55:50.475138 scan_bus: bus USB0 port 0 finished in 43 msecs
1245 17:55:50.481744 scan_static_bus for PCI: 00:0d.0 done
1246 17:55:50.485091 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1247 17:55:50.488392 PCI: 00:0d.2 scanning...
1248 17:55:50.491730 scan_generic_bus for PCI: 00:0d.2
1249 17:55:50.491791 GENERIC: 0.0 enabled
1250 17:55:50.498496 bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done
1251 17:55:50.505449 scan_bus: bus PCI: 00:0d.2 finished in 11 msecs
1252 17:55:50.505507 PCI: 00:0d.3 scanning...
1253 17:55:50.508552 scan_generic_bus for PCI: 00:0d.3
1254 17:55:50.512356 GENERIC: 0.0 enabled
1255 17:55:50.518730 bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done
1256 17:55:50.521832 scan_bus: bus PCI: 00:0d.3 finished in 11 msecs
1257 17:55:50.525060 PCI: 00:14.0 scanning...
1258 17:55:50.528376 scan_static_bus for PCI: 00:14.0
1259 17:55:50.531867 USB0 port 0 enabled
1260 17:55:50.531927 USB0 port 0 scanning...
1261 17:55:50.535327 scan_static_bus for USB0 port 0
1262 17:55:50.538384 USB2 port 0 enabled
1263 17:55:50.541749 USB2 port 1 disabled
1264 17:55:50.541818 USB2 port 2 enabled
1265 17:55:50.545501 USB2 port 3 enabled
1266 17:55:50.548489 USB2 port 4 enabled
1267 17:55:50.548550 USB2 port 5 enabled
1268 17:55:50.551821 USB2 port 6 enabled
1269 17:55:50.551889 USB2 port 7 enabled
1270 17:55:50.555183 USB2 port 8 disabled
1271 17:55:50.558709 USB2 port 9 enabled
1272 17:55:50.558769 USB3 port 0 enabled
1273 17:55:50.561880 USB3 port 1 enabled
1274 17:55:50.561952 USB3 port 2 enabled
1275 17:55:50.565136 USB3 port 3 enabled
1276 17:55:50.568412 USB2 port 0 scanning...
1277 17:55:50.571703 scan_static_bus for USB2 port 0
1278 17:55:50.575022 scan_static_bus for USB2 port 0 done
1279 17:55:50.578478 scan_bus: bus USB2 port 0 finished in 6 msecs
1280 17:55:50.581801 USB2 port 2 scanning...
1281 17:55:50.585110 scan_static_bus for USB2 port 2
1282 17:55:50.588437 scan_static_bus for USB2 port 2 done
1283 17:55:50.595046 scan_bus: bus USB2 port 2 finished in 6 msecs
1284 17:55:50.595105 USB2 port 3 scanning...
1285 17:55:50.598403 scan_static_bus for USB2 port 3
1286 17:55:50.601707 scan_static_bus for USB2 port 3 done
1287 17:55:50.608433 scan_bus: bus USB2 port 3 finished in 6 msecs
1288 17:55:50.608502 USB2 port 4 scanning...
1289 17:55:50.611739 scan_static_bus for USB2 port 4
1290 17:55:50.615005 scan_static_bus for USB2 port 4 done
1291 17:55:50.621758 scan_bus: bus USB2 port 4 finished in 6 msecs
1292 17:55:50.624988 USB2 port 5 scanning...
1293 17:55:50.628350 scan_static_bus for USB2 port 5
1294 17:55:50.631793 scan_static_bus for USB2 port 5 done
1295 17:55:50.634983 scan_bus: bus USB2 port 5 finished in 6 msecs
1296 17:55:50.638287 USB2 port 6 scanning...
1297 17:55:50.641698 scan_static_bus for USB2 port 6
1298 17:55:50.645022 scan_static_bus for USB2 port 6 done
1299 17:55:50.648211 scan_bus: bus USB2 port 6 finished in 6 msecs
1300 17:55:50.651861 USB2 port 7 scanning...
1301 17:55:50.654962 scan_static_bus for USB2 port 7
1302 17:55:50.658258 scan_static_bus for USB2 port 7 done
1303 17:55:50.661749 scan_bus: bus USB2 port 7 finished in 6 msecs
1304 17:55:50.665048 USB2 port 9 scanning...
1305 17:55:50.668566 scan_static_bus for USB2 port 9
1306 17:55:50.671755 scan_static_bus for USB2 port 9 done
1307 17:55:50.678683 scan_bus: bus USB2 port 9 finished in 6 msecs
1308 17:55:50.678739 USB3 port 0 scanning...
1309 17:55:50.682137 scan_static_bus for USB3 port 0
1310 17:55:50.684975 scan_static_bus for USB3 port 0 done
1311 17:55:50.691737 scan_bus: bus USB3 port 0 finished in 6 msecs
1312 17:55:50.695066 USB3 port 1 scanning...
1313 17:55:50.698267 scan_static_bus for USB3 port 1
1314 17:55:50.701502 scan_static_bus for USB3 port 1 done
1315 17:55:50.705122 scan_bus: bus USB3 port 1 finished in 6 msecs
1316 17:55:50.708491 USB3 port 2 scanning...
1317 17:55:50.711676 scan_static_bus for USB3 port 2
1318 17:55:50.715013 scan_static_bus for USB3 port 2 done
1319 17:55:50.718309 scan_bus: bus USB3 port 2 finished in 6 msecs
1320 17:55:50.721677 USB3 port 3 scanning...
1321 17:55:50.725204 scan_static_bus for USB3 port 3
1322 17:55:50.728401 scan_static_bus for USB3 port 3 done
1323 17:55:50.732092 scan_bus: bus USB3 port 3 finished in 6 msecs
1324 17:55:50.735073 scan_static_bus for USB0 port 0 done
1325 17:55:50.741947 scan_bus: bus USB0 port 0 finished in 203 msecs
1326 17:55:50.745215 scan_static_bus for PCI: 00:14.0 done
1327 17:55:50.748708 scan_bus: bus PCI: 00:14.0 finished in 219 msecs
1328 17:55:50.752022 PCI: 00:14.3 scanning...
1329 17:55:50.755267 scan_static_bus for PCI: 00:14.3
1330 17:55:50.758622 GENERIC: 0.0 enabled
1331 17:55:50.762378 scan_static_bus for PCI: 00:14.3 done
1332 17:55:50.765335 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1333 17:55:50.768764 PCI: 00:15.0 scanning...
1334 17:55:50.772051 scan_static_bus for PCI: 00:15.0
1335 17:55:50.775376 I2C: 00:1a enabled
1336 17:55:50.778525 scan_static_bus for PCI: 00:15.0 done
1337 17:55:50.781909 scan_bus: bus PCI: 00:15.0 finished in 9 msecs
1338 17:55:50.785315 PCI: 00:15.1 scanning...
1339 17:55:50.788698 scan_static_bus for PCI: 00:15.1
1340 17:55:50.792170 I2C: 00:50 enabled
1341 17:55:50.795199 scan_static_bus for PCI: 00:15.1 done
1342 17:55:50.798685 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1343 17:55:50.801906 PCI: 00:1c.0 scanning...
1344 17:55:50.805254 do_pci_scan_bridge for PCI: 00:1c.0
1345 17:55:50.808635 PCI: pci_scan_bus for bus 82
1346 17:55:50.812084 PCI: 82:00.0 [10ec/0000] ops
1347 17:55:50.815215 PCI: 82:00.0 [10ec/8168] enabled
1348 17:55:50.818782 Enabling Common Clock Configuration
1349 17:55:50.822252 L1 Sub-State supported from root port 28
1350 17:55:50.825251 L1 Sub-State Support = 0xf
1351 17:55:50.829500 CommonModeRestoreTime = 0x96
1352 17:55:50.831981 Power On Value = 0xf, Power On Scale = 0x1
1353 17:55:50.835445 ASPM: Enabled L1
1354 17:55:50.838729 PCIe: Max_Payload_Size adjusted to 128
1355 17:55:50.842058 PCI: 82:00.0: Enabled LTR
1356 17:55:50.845436 PCI: 82:00.0: Programmed LTR max latencies
1357 17:55:50.848663 scan_bus: bus PCI: 00:1c.0 finished in 43 msecs
1358 17:55:50.852238 PCI: 00:1c.7 scanning...
1359 17:55:50.855397 do_pci_scan_bridge for PCI: 00:1c.7
1360 17:55:50.858711 PCI: pci_scan_bus for bus 83
1361 17:55:50.862042 PCI: 83:00.0 [17a0/9755] enabled
1362 17:55:50.865467 GENERIC: 0.0 enabled
1363 17:55:50.868703 Enabling Common Clock Configuration
1364 17:55:50.872058 L1 Sub-State supported from root port 28
1365 17:55:50.875482 L1 Sub-State Support = 0xf
1366 17:55:50.878810 CommonModeRestoreTime = 0xff
1367 17:55:50.882008 Power On Value = 0x1f, Power On Scale = 0x2
1368 17:55:50.885572 ASPM: Enabled L0s and L1
1369 17:55:50.888856 PCIe: Max_Payload_Size adjusted to 128
1370 17:55:50.892354 PCI: 83:00.0: Enabled LTR
1371 17:55:50.895351 PCI: 83:00.0: Programmed LTR max latencies
1372 17:55:50.902318 scan_bus: bus PCI: 00:1c.7 finished in 43 msecs
1373 17:55:50.902397 PCI: 00:1d.0 scanning...
1374 17:55:50.905497 do_pci_scan_bridge for PCI: 00:1d.0
1375 17:55:50.908775 PCI: pci_scan_bus for bus 84
1376 17:55:50.912182 PCI: 84:00.0 [1217/8760] enabled
1377 17:55:50.915342 GENERIC: 0.0 enabled
1378 17:55:50.918650 L1 Sub-State supported from root port 29
1379 17:55:50.922114 L1 Sub-State Support = 0xa
1380 17:55:50.925478 CommonModeRestoreTime = 0x78
1381 17:55:50.928742 Power On Value = 0x16, Power On Scale = 0x0
1382 17:55:50.932260 ASPM: Enabled L1
1383 17:55:50.935292 PCIe: Max_Payload_Size adjusted to 128
1384 17:55:50.938648 PCI: 84:00.0: Enabled LTR
1385 17:55:50.941785 PCI: 84:00.0: Programmed LTR max latencies
1386 17:55:50.948813 scan_bus: bus PCI: 00:1d.0 finished in 38 msecs
1387 17:55:50.948883 PCI: 00:1e.3 scanning...
1388 17:55:50.952113 scan_generic_bus for PCI: 00:1e.3
1389 17:55:50.955216 scan_generic_bus for PCI: 00:1e.3 done
1390 17:55:50.962006 scan_bus: bus PCI: 00:1e.3 finished in 7 msecs
1391 17:55:50.965340 PCI: 00:1f.0 scanning...
1392 17:55:50.968565 scan_static_bus for PCI: 00:1f.0
1393 17:55:50.968640 PNP: 0c09.0 enabled
1394 17:55:50.972011 PNP: 0c09.0 scanning...
1395 17:55:50.975437 scan_static_bus for PNP: 0c09.0
1396 17:55:50.978559 scan_static_bus for PNP: 0c09.0 done
1397 17:55:50.981976 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1398 17:55:50.988702 scan_static_bus for PCI: 00:1f.0 done
1399 17:55:50.992041 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1400 17:55:50.995290 PCI: 00:1f.2 scanning...
1401 17:55:50.998709 scan_static_bus for PCI: 00:1f.2
1402 17:55:50.998772 GENERIC: 0.0 enabled
1403 17:55:51.002104 GENERIC: 0.0 scanning...
1404 17:55:51.005242 scan_static_bus for GENERIC: 0.0
1405 17:55:51.008671 GENERIC: 0.0 enabled
1406 17:55:51.008736 GENERIC: 1.0 enabled
1407 17:55:51.015106 scan_static_bus for GENERIC: 0.0 done
1408 17:55:51.018715 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1409 17:55:51.021827 scan_static_bus for PCI: 00:1f.2 done
1410 17:55:51.028425 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1411 17:55:51.028480 PCI: 00:1f.3 scanning...
1412 17:55:51.031936 scan_static_bus for PCI: 00:1f.3
1413 17:55:51.038279 scan_static_bus for PCI: 00:1f.3 done
1414 17:55:51.041657 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1415 17:55:51.045060 PCI: 00:1f.4 scanning...
1416 17:55:51.048390 scan_generic_bus for PCI: 00:1f.4
1417 17:55:51.051655 scan_generic_bus for PCI: 00:1f.4 done
1418 17:55:51.055156 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
1419 17:55:51.058367 PCI: 00:1f.5 scanning...
1420 17:55:51.061787 scan_generic_bus for PCI: 00:1f.5
1421 17:55:51.065120 scan_generic_bus for PCI: 00:1f.5 done
1422 17:55:51.071555 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1423 17:55:51.075080 scan_bus: bus DOMAIN: 0000 finished in 990 msecs
1424 17:55:51.078222 scan_static_bus for Root Device done
1425 17:55:51.084892 scan_bus: bus Root Device finished in 1009 msecs
1426 17:55:51.084960 done
1427 17:55:51.091554 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms
1428 17:55:51.098467 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1429 17:55:51.101298 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1430 17:55:51.107960 SPI flash protection: WPSW=1 SRP0=1
1431 17:55:51.114853 fast_spi_flash_protect: FPR 0 is enabled for range 0x00f00000-0x00f1ffff
1432 17:55:51.118068 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1433 17:55:51.124806 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 28 ms
1434 17:55:51.128246 found VGA at PCI: 00:02.0
1435 17:55:51.131719 Setting up VGA for PCI: 00:02.0
1436 17:55:51.135812 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1437 17:55:51.141938 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1438 17:55:51.144609 Allocating resources...
1439 17:55:51.144665 Reading resources...
1440 17:55:51.148644 Root Device read_resources bus 0 link: 0
1441 17:55:51.155320 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1442 17:55:51.158063 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1443 17:55:51.161571 DOMAIN: 0000 read_resources bus 0 link: 0
1444 17:55:51.168247 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1445 17:55:51.174950 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1446 17:55:51.181559 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1447 17:55:51.188218 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1448 17:55:51.194910 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1449 17:55:51.201347 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1450 17:55:51.208050 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1451 17:55:51.214761 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1452 17:55:51.217993 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1453 17:55:51.228036 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1454 17:55:51.231453 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1455 17:55:51.238008 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1456 17:55:51.244621 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1457 17:55:51.251421 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1458 17:55:51.258166 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1459 17:55:51.264546 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1460 17:55:51.271200 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1461 17:55:51.278147 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1462 17:55:51.284739 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1463 17:55:51.288009 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1464 17:55:51.294935 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1465 17:55:51.301240 PCI: 00:04.0 read_resources bus 1 link: 0
1466 17:55:51.304723 PCI: 00:04.0 read_resources bus 1 link: 0 done
1467 17:55:51.308239 PCI: 00:07.0 read_resources bus 1 link: 0
1468 17:55:51.314820 PCI: 00:07.0 read_resources bus 1 link: 0 done
1469 17:55:51.317964 PCI: 00:07.1 read_resources bus 44 link: 0
1470 17:55:51.321382 PCI: 00:07.1 read_resources bus 44 link: 0 done
1471 17:55:51.328025 PCI: 00:07.2 read_resources bus 87 link: 0
1472 17:55:51.331733 PCI: 00:07.2 read_resources bus 87 link: 0 done
1473 17:55:51.334660 PCI: 00:0d.0 read_resources bus 0 link: 0
1474 17:55:51.341433 USB0 port 0 read_resources bus 0 link: 0
1475 17:55:51.344733 USB0 port 0 read_resources bus 0 link: 0 done
1476 17:55:51.348652 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1477 17:55:51.354679 PCI: 00:0d.2 read_resources bus 2 link: 0
1478 17:55:51.358079 PCI: 00:0d.2 read_resources bus 2 link: 0 done
1479 17:55:51.361510 PCI: 00:0d.3 read_resources bus 3 link: 0
1480 17:55:51.368084 PCI: 00:0d.3 read_resources bus 3 link: 0 done
1481 17:55:51.371329 PCI: 00:14.0 read_resources bus 0 link: 0
1482 17:55:51.374720 USB0 port 0 read_resources bus 0 link: 0
1483 17:55:51.381621 USB0 port 0 read_resources bus 0 link: 0 done
1484 17:55:51.384914 PCI: 00:14.0 read_resources bus 0 link: 0 done
1485 17:55:51.388260 PCI: 00:14.3 read_resources bus 0 link: 0
1486 17:55:51.394780 PCI: 00:14.3 read_resources bus 0 link: 0 done
1487 17:55:51.398193 PCI: 00:15.0 read_resources bus 0 link: 0
1488 17:55:51.401420 PCI: 00:15.0 read_resources bus 0 link: 0 done
1489 17:55:51.408203 PCI: 00:15.1 read_resources bus 0 link: 0
1490 17:55:51.411598 PCI: 00:15.1 read_resources bus 0 link: 0 done
1491 17:55:51.418610 PCI: 00:1c.0 read_resources bus 130 link: 0
1492 17:55:51.421693 PCI: 00:1c.0 read_resources bus 130 link: 0 done
1493 17:55:51.425205 PCI: 00:1c.7 read_resources bus 131 link: 0
1494 17:55:51.431719 PCI: 00:1c.7 read_resources bus 131 link: 0 done
1495 17:55:51.435144 PCI: 00:1d.0 read_resources bus 132 link: 0
1496 17:55:51.441721 PCI: 00:1d.0 read_resources bus 132 link: 0 done
1497 17:55:51.444926 PCI: 00:1f.0 read_resources bus 0 link: 0
1498 17:55:51.451715 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1499 17:55:51.455190 PCI: 00:1f.2 read_resources bus 0 link: 0
1500 17:55:51.458426 GENERIC: 0.0 read_resources bus 0 link: 0
1501 17:55:51.461804 GENERIC: 0.0 read_resources bus 0 link: 0 done
1502 17:55:51.468456 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1503 17:55:51.471949 DOMAIN: 0000 read_resources bus 0 link: 0 done
1504 17:55:51.478443 Root Device read_resources bus 0 link: 0 done
1505 17:55:51.478521 Done reading resources.
1506 17:55:51.485665 Show resources in subtree (Root Device)...After reading.
1507 17:55:51.488461 Root Device child on link 0 CPU_CLUSTER: 0
1508 17:55:51.495341 CPU_CLUSTER: 0 child on link 0 APIC: 00
1509 17:55:51.495428 APIC: 00
1510 17:55:51.495506 APIC: 16
1511 17:55:51.498454 APIC: 10
1512 17:55:51.498531 APIC: 12
1513 17:55:51.501856 APIC: 14
1514 17:55:51.505440 DOMAIN: 0000 child on link 0 GPIO: 0
1515 17:55:51.515617 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1516 17:55:51.525407 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1517 17:55:51.525483 GPIO: 0
1518 17:55:51.525558 PCI: 00:00.0
1519 17:55:51.535273 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1520 17:55:51.545420 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1521 17:55:51.555966 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1522 17:55:51.565168 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1523 17:55:51.572118 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1524 17:55:51.581976 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1525 17:55:51.592252 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1526 17:55:51.602240 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1527 17:55:51.612241 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1528 17:55:51.622168 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1529 17:55:51.629105 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1530 17:55:51.638893 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1531 17:55:51.649296 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1532 17:55:51.659098 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1533 17:55:51.669025 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1534 17:55:51.675804 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1535 17:55:51.685849 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1536 17:55:51.695867 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1537 17:55:51.705945 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1538 17:55:51.716055 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1539 17:55:51.725989 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1540 17:55:51.735803 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1541 17:55:51.742346 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1542 17:55:51.752461 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1543 17:55:51.762524 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1544 17:55:51.772600 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1545 17:55:51.782519 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1546 17:55:51.792701 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1547 17:55:51.792768 PCI: 00:02.0
1548 17:55:51.803025 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1549 17:55:51.812878 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1550 17:55:51.822822 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1551 17:55:51.826201 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1552 17:55:51.836248 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1553 17:55:51.839511 GENERIC: 0.0
1554 17:55:51.842870 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1555 17:55:51.852972 PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1556 17:55:51.862889 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1557 17:55:51.869599 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1558 17:55:51.873178 GENERIC: 0.0
1559 17:55:51.873233 NONE
1560 17:55:51.882998 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1561 17:55:51.893158 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1562 17:55:51.899477 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1563 17:55:51.906190 PCI: 00:07.1 child on link 0 GENERIC: 1.0
1564 17:55:51.912854 PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1565 17:55:51.923260 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1566 17:55:51.933111 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1567 17:55:51.933171 GENERIC: 1.0
1568 17:55:51.936371 NONE
1569 17:55:51.942998 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1570 17:55:51.953099 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1571 17:55:51.963181 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1572 17:55:51.966448 PCI: 00:07.2 child on link 0 GENERIC: 0.0
1573 17:55:51.976328 PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1574 17:55:51.986429 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1575 17:55:51.993114 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1576 17:55:51.996574 GENERIC: 0.0
1577 17:55:51.996653 NONE
1578 17:55:52.006558 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1579 17:55:52.016450 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1580 17:55:52.023124 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1581 17:55:52.026448 PCI: 00:08.0
1582 17:55:52.026530 PCI: 00:0a.0
1583 17:55:52.036510 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1584 17:55:52.043017 PCI: 00:0d.0 child on link 0 USB0 port 0
1585 17:55:52.053082 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1586 17:55:52.056433 USB0 port 0 child on link 0 USB3 port 0
1587 17:55:52.056510 USB3 port 0
1588 17:55:52.059944 USB3 port 1
1589 17:55:52.060022 USB3 port 2
1590 17:55:52.063281 USB3 port 3
1591 17:55:52.066682 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
1592 17:55:52.076335 PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1593 17:55:52.086312 PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1594 17:55:52.089685 GENERIC: 0.0
1595 17:55:52.093478 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
1596 17:55:52.103020 PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1597 17:55:52.113058 PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1598 17:55:52.116566 GENERIC: 0.0
1599 17:55:52.119723 PCI: 00:14.0 child on link 0 USB0 port 0
1600 17:55:52.130034 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1601 17:55:52.133090 USB0 port 0 child on link 0 USB2 port 0
1602 17:55:52.136562 USB2 port 0
1603 17:55:52.136630 USB2 port 1
1604 17:55:52.139937 USB2 port 2
1605 17:55:52.143946 USB2 port 3
1606 17:55:52.144031 USB2 port 4
1607 17:55:52.146522 USB2 port 5
1608 17:55:52.146599 USB2 port 6
1609 17:55:52.150129 USB2 port 7
1610 17:55:52.150205 USB2 port 8
1611 17:55:52.153044 USB2 port 9
1612 17:55:52.153104 USB3 port 0
1613 17:55:52.156529 USB3 port 1
1614 17:55:52.156606 USB3 port 2
1615 17:55:52.159703 USB3 port 3
1616 17:55:52.159783 PCI: 00:14.2
1617 17:55:52.169875 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1618 17:55:52.179816 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1619 17:55:52.186530 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1620 17:55:52.196787 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1621 17:55:52.196846 GENERIC: 0.0
1622 17:55:52.200072 PCI: 00:15.0 child on link 0 I2C: 00:1a
1623 17:55:52.209965 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1624 17:55:52.213577 I2C: 00:1a
1625 17:55:52.216788 PCI: 00:15.1 child on link 0 I2C: 00:50
1626 17:55:52.226546 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1627 17:55:52.229988 I2C: 00:50
1628 17:55:52.230043 PCI: 00:16.0
1629 17:55:52.240178 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1630 17:55:52.243604 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
1631 17:55:52.253691 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1632 17:55:52.263566 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1633 17:55:52.273678 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1634 17:55:52.273750 PCI: 82:00.0
1635 17:55:52.283565 PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
1636 17:55:52.293715 PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1637 17:55:52.303506 PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
1638 17:55:52.306969 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
1639 17:55:52.316863 PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1640 17:55:52.327006 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1641 17:55:52.333477 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1642 17:55:52.336854 GENERIC: 0.0
1643 17:55:52.336914 PCI: 83:00.0
1644 17:55:52.347095 PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1645 17:55:52.353651 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1646 17:55:52.360511 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1647 17:55:52.370077 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1648 17:55:52.379954 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1649 17:55:52.380026 GENERIC: 0.0
1650 17:55:52.383750 PCI: 84:00.0
1651 17:55:52.393573 PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1652 17:55:52.393636 PCI: 00:1e.0
1653 17:55:52.406725 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1654 17:55:52.406805 PCI: 00:1e.3
1655 17:55:52.416858 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1656 17:55:52.423371 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1657 17:55:52.430097 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1658 17:55:52.433344 PNP: 0c09.0
1659 17:55:52.439930 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1660 17:55:52.446671 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1661 17:55:52.456591 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1662 17:55:52.464134 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1663 17:55:52.470171 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1664 17:55:52.470249 GENERIC: 0.0
1665 17:55:52.473398 GENERIC: 1.0
1666 17:55:52.473466 PCI: 00:1f.3
1667 17:55:52.483128 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1668 17:55:52.493251 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1669 17:55:52.496426 PCI: 00:1f.4
1670 17:55:52.506565 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1671 17:55:52.516551 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1672 17:55:52.516691 PCI: 00:1f.5
1673 17:55:52.526607 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1674 17:55:52.533253 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1675 17:55:52.540030 PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff
1676 17:55:52.543104 NONE 18 * [0x0 - 0x1fff] io
1677 17:55:52.549834 PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
1678 17:55:52.553141 PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1679 17:55:52.556511 NONE 10 * [0x0 - 0xc1fffff] mem
1680 17:55:52.566633 PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1681 17:55:52.573117 PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1682 17:55:52.576717 NONE 14 * [0x0 - 0x1bffffff] prefmem
1683 17:55:52.586552 PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1684 17:55:52.589779 PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff
1685 17:55:52.593493 NONE 18 * [0x0 - 0x1fff] io
1686 17:55:52.599916 PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done
1687 17:55:52.606632 PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1688 17:55:52.609961 NONE 10 * [0x0 - 0xc1fffff] mem
1689 17:55:52.616460 PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1690 17:55:52.623090 PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1691 17:55:52.629934 NONE 14 * [0x0 - 0x1bffffff] prefmem
1692 17:55:52.636617 PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1693 17:55:52.643110 PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff
1694 17:55:52.646654 NONE 18 * [0x0 - 0x1fff] io
1695 17:55:52.653174 PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
1696 17:55:52.659850 PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1697 17:55:52.663154 NONE 10 * [0x0 - 0xc1fffff] mem
1698 17:55:52.669751 PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1699 17:55:52.676554 PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1700 17:55:52.679754 NONE 14 * [0x0 - 0x1bffffff] prefmem
1701 17:55:52.689751 PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1702 17:55:52.693185 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
1703 17:55:52.699638 PCI: 82:00.0 10 * [0x0 - 0xff] io
1704 17:55:52.703333 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
1705 17:55:52.709794 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1706 17:55:52.713247 PCI: 82:00.0 20 * [0x0 - 0x3fff] mem
1707 17:55:52.719858 PCI: 82:00.0 18 * [0x4000 - 0x4fff] mem
1708 17:55:52.727040 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1709 17:55:52.733445 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1710 17:55:52.739911 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1711 17:55:52.746624 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff
1712 17:55:52.753183 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done
1713 17:55:52.760033 PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1714 17:55:52.763274 PCI: 83:00.0 10 * [0x0 - 0xfff] mem
1715 17:55:52.770011 PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1716 17:55:52.776935 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1717 17:55:52.787219 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1718 17:55:52.790273 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1719 17:55:52.797024 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1720 17:55:52.803472 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1721 17:55:52.806847 PCI: 84:00.0 10 * [0x0 - 0x3fff] mem
1722 17:55:52.813608 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1723 17:55:52.820293 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1724 17:55:52.830138 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1725 17:55:52.836998 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1726 17:55:52.843808 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1727 17:55:52.850536 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1728 17:55:52.856972 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1729 17:55:52.866938 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1730 17:55:52.873663 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1731 17:55:52.877057 DOMAIN: 0000: Resource ranges:
1732 17:55:52.880312 * Base: 1000, Size: 800, Tag: 100
1733 17:55:52.883795 * Base: 1900, Size: d6a0, Tag: 100
1734 17:55:52.886906 * Base: efc0, Size: 1040, Tag: 100
1735 17:55:52.893815 PCI: 00:07.0 1c * [0x2000 - 0x3fff] limit: 3fff io
1736 17:55:52.897031 PCI: 00:07.1 1c * [0x4000 - 0x5fff] limit: 5fff io
1737 17:55:52.904072 PCI: 00:07.2 1c * [0x6000 - 0x7fff] limit: 7fff io
1738 17:55:52.910302 PCI: 00:1c.0 1c * [0x8000 - 0x8fff] limit: 8fff io
1739 17:55:52.913950 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1740 17:55:52.920273 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1741 17:55:52.927200 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1742 17:55:52.933769 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1743 17:55:52.943632 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1744 17:55:52.950278 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1745 17:55:52.957082 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1746 17:55:52.966983 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1747 17:55:52.974668 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1748 17:55:52.980585 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1749 17:55:52.990215 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1750 17:55:52.996859 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1751 17:55:53.003661 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1752 17:55:53.013509 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1753 17:55:53.020098 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1754 17:55:53.026844 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1755 17:55:53.036865 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1756 17:55:53.043583 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1757 17:55:53.050091 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1758 17:55:53.060047 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1759 17:55:53.066626 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1760 17:55:53.073362 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1761 17:55:53.079963 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1762 17:55:53.089986 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1763 17:55:53.096672 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1764 17:55:53.103338 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1765 17:55:53.113352 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1766 17:55:53.119878 update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed)
1767 17:55:53.126626 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1768 17:55:53.136400 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1769 17:55:53.143165 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1770 17:55:53.149684 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1771 17:55:53.159759 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1772 17:55:53.163425 DOMAIN: 0000: Resource ranges:
1773 17:55:53.166447 * Base: 80400000, Size: 3fc00000, Tag: 200
1774 17:55:53.169750 * Base: d0000000, Size: 28000000, Tag: 200
1775 17:55:53.176346 * Base: fa000000, Size: 1000000, Tag: 200
1776 17:55:53.179678 * Base: fb001000, Size: 17ff000, Tag: 200
1777 17:55:53.182965 * Base: fe800000, Size: 300000, Tag: 200
1778 17:55:53.186496 * Base: feb80000, Size: 80000, Tag: 200
1779 17:55:53.192999 * Base: fed00000, Size: 40000, Tag: 200
1780 17:55:53.196387 * Base: fed70000, Size: 10000, Tag: 200
1781 17:55:53.200057 * Base: fed88000, Size: 8000, Tag: 200
1782 17:55:53.202888 * Base: fed93000, Size: d000, Tag: 200
1783 17:55:53.209436 * Base: feda2000, Size: 1e000, Tag: 200
1784 17:55:53.212903 * Base: fede0000, Size: 1220000, Tag: 200
1785 17:55:53.216283 * Base: 17fc00000, Size: 7e80400000, Tag: 100200
1786 17:55:53.222647 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1787 17:55:53.229377 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1788 17:55:53.236049 PCI: 00:07.0 20 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1789 17:55:53.242675 PCI: 00:07.1 20 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1790 17:55:53.249369 PCI: 00:07.2 20 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1791 17:55:53.255932 PCI: 00:1c.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1792 17:55:53.262711 PCI: 00:1c.7 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1793 17:55:53.269893 PCI: 00:1d.0 20 * [0x80600000 - 0x806fffff] limit: 806fffff mem
1794 17:55:53.276028 PCI: 00:1f.3 20 * [0x80700000 - 0x807fffff] limit: 807fffff mem
1795 17:55:53.283148 PCI: 00:0d.2 10 * [0x80800000 - 0x8083ffff] limit: 8083ffff mem
1796 17:55:53.289557 PCI: 00:0d.3 10 * [0x80840000 - 0x8087ffff] limit: 8087ffff mem
1797 17:55:53.296018 PCI: 00:04.0 10 * [0x80880000 - 0x8089ffff] limit: 8089ffff mem
1798 17:55:53.302821 PCI: 00:0d.0 10 * [0x808a0000 - 0x808affff] limit: 808affff mem
1799 17:55:53.309842 PCI: 00:14.0 10 * [0x808b0000 - 0x808bffff] limit: 808bffff mem
1800 17:55:53.315955 PCI: 00:0a.0 10 * [0x808c0000 - 0x808c7fff] limit: 808c7fff mem
1801 17:55:53.322708 PCI: 00:14.2 10 * [0x808c8000 - 0x808cbfff] limit: 808cbfff mem
1802 17:55:53.329510 PCI: 00:14.3 10 * [0x808cc000 - 0x808cffff] limit: 808cffff mem
1803 17:55:53.335850 PCI: 00:1f.3 10 * [0x808d0000 - 0x808d3fff] limit: 808d3fff mem
1804 17:55:53.342581 PCI: 00:0d.2 18 * [0x808d4000 - 0x808d4fff] limit: 808d4fff mem
1805 17:55:53.349360 PCI: 00:0d.3 18 * [0x808d5000 - 0x808d5fff] limit: 808d5fff mem
1806 17:55:53.355980 PCI: 00:14.2 18 * [0x808d6000 - 0x808d6fff] limit: 808d6fff mem
1807 17:55:53.363079 PCI: 00:15.0 10 * [0x808d7000 - 0x808d7fff] limit: 808d7fff mem
1808 17:55:53.369074 PCI: 00:15.1 10 * [0x808d8000 - 0x808d8fff] limit: 808d8fff mem
1809 17:55:53.375808 PCI: 00:16.0 10 * [0x808d9000 - 0x808d9fff] limit: 808d9fff mem
1810 17:55:53.382728 PCI: 00:1e.3 10 * [0x808da000 - 0x808dafff] limit: 808dafff mem
1811 17:55:53.388946 PCI: 00:1f.5 10 * [0x808db000 - 0x808dbfff] limit: 808dbfff mem
1812 17:55:53.396183 PCI: 00:1f.4 10 * [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem
1813 17:55:53.405681 PCI: 00:07.0 24 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1814 17:55:53.412382 PCI: 00:07.1 24 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1815 17:55:53.419028 PCI: 00:07.2 24 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1816 17:55:53.425604 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1817 17:55:53.432204 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
1818 17:55:53.435477 PCI: 00:07.0: Resource ranges:
1819 17:55:53.438792 * Base: 2000, Size: 2000, Tag: 100
1820 17:55:53.445372 NONE 18 * [0x2000 - 0x3fff] limit: 3fff io
1821 17:55:53.452082 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
1822 17:55:53.461973 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff
1823 17:55:53.465639 PCI: 00:07.0: Resource ranges:
1824 17:55:53.468794 * Base: 17fc00000, Size: 1c000000, Tag: 1200
1825 17:55:53.475636 NONE 14 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1826 17:55:53.485479 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done
1827 17:55:53.493114 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff
1828 17:55:53.495254 PCI: 00:07.0: Resource ranges:
1829 17:55:53.498683 * Base: 82000000, Size: c200000, Tag: 200
1830 17:55:53.505353 NONE 10 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1831 17:55:53.515293 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done
1832 17:55:53.521911 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
1833 17:55:53.525115 PCI: 00:07.1: Resource ranges:
1834 17:55:53.528482 * Base: 4000, Size: 2000, Tag: 100
1835 17:55:53.532059 NONE 18 * [0x4000 - 0x5fff] limit: 5fff io
1836 17:55:53.538618 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
1837 17:55:53.548361 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff
1838 17:55:53.551832 PCI: 00:07.1: Resource ranges:
1839 17:55:53.554967 * Base: 19bc00000, Size: 1c000000, Tag: 1200
1840 17:55:53.561728 NONE 14 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1841 17:55:53.571751 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done
1842 17:55:53.581739 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff
1843 17:55:53.585000 PCI: 00:07.1: Resource ranges:
1844 17:55:53.588441 * Base: a0000000, Size: c200000, Tag: 200
1845 17:55:53.595040 NONE 10 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1846 17:55:53.601573 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done
1847 17:55:53.608298 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
1848 17:55:53.611538 PCI: 00:07.2: Resource ranges:
1849 17:55:53.614906 * Base: 6000, Size: 2000, Tag: 100
1850 17:55:53.621586 NONE 18 * [0x6000 - 0x7fff] limit: 7fff io
1851 17:55:53.628368 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
1852 17:55:53.638261 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff
1853 17:55:53.641591 PCI: 00:07.2: Resource ranges:
1854 17:55:53.644896 * Base: 1b7c00000, Size: 1c000000, Tag: 1200
1855 17:55:53.651461 NONE 14 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1856 17:55:53.661573 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done
1857 17:55:53.668119 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff
1858 17:55:53.671392 PCI: 00:07.2: Resource ranges:
1859 17:55:53.674739 * Base: ac200000, Size: c200000, Tag: 200
1860 17:55:53.681429 NONE 10 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1861 17:55:53.691542 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done
1862 17:55:53.698083 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff
1863 17:55:53.701486 PCI: 00:1c.0: Resource ranges:
1864 17:55:53.705111 * Base: 8000, Size: 1000, Tag: 100
1865 17:55:53.707973 PCI: 82:00.0 10 * [0x8000 - 0x80ff] limit: 80ff io
1866 17:55:53.718087 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done
1867 17:55:53.724693 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1868 17:55:53.727984 PCI: 00:1c.0: Resource ranges:
1869 17:55:53.731483 * Base: 80400000, Size: 100000, Tag: 200
1870 17:55:53.738051 PCI: 82:00.0 20 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1871 17:55:53.744766 PCI: 82:00.0 18 * [0x80404000 - 0x80404fff] limit: 80404fff mem
1872 17:55:53.754974 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1873 17:55:53.761356 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff
1874 17:55:53.764752 PCI: 00:1c.7: Resource ranges:
1875 17:55:53.771299 * Base: 80500000, Size: 100000, Tag: 200
1876 17:55:53.777939 PCI: 83:00.0 10 * [0x80500000 - 0x80500fff] limit: 80500fff mem
1877 17:55:53.784605 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done
1878 17:55:53.791315 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff
1879 17:55:53.794469 PCI: 00:1d.0: Resource ranges:
1880 17:55:53.801404 * Base: 80600000, Size: 100000, Tag: 200
1881 17:55:53.807923 PCI: 84:00.0 10 * [0x80600000 - 0x80603fff] limit: 80603fff mem
1882 17:55:53.814526 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done
1883 17:55:53.821151 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1884 17:55:53.827647 Root Device assign_resources, bus 0 link: 0
1885 17:55:53.831078 DOMAIN: 0000 assign_resources, bus 0 link: 0
1886 17:55:53.837685 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1887 17:55:53.847642 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1888 17:55:53.854896 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1889 17:55:53.864241 PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64
1890 17:55:53.867498 PCI: 00:04.0 assign_resources, bus 1 link: 0
1891 17:55:53.874234 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1892 17:55:53.880819 PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io
1893 17:55:53.891057 PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem
1894 17:55:53.897347 PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem
1895 17:55:53.904314 PCI: 00:07.0 assign_resources, bus 1 link: 0
1896 17:55:53.907475 PCI: 00:07.0 assign_resources, bus 1 link: 0 done
1897 17:55:53.917321 PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io
1898 17:55:53.923932 PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem
1899 17:55:53.933968 PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem
1900 17:55:53.937252 PCI: 00:07.1 assign_resources, bus 44 link: 0
1901 17:55:53.944066 PCI: 00:07.1 assign_resources, bus 44 link: 0 done
1902 17:55:53.951099 PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io
1903 17:55:53.960479 PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem
1904 17:55:53.970688 PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem
1905 17:55:53.974107 PCI: 00:07.2 assign_resources, bus 87 link: 0
1906 17:55:53.980513 PCI: 00:07.2 assign_resources, bus 87 link: 0 done
1907 17:55:53.987060 PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64
1908 17:55:53.993854 PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64
1909 17:55:54.000452 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1910 17:55:54.003724 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1911 17:55:54.013842 PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64
1912 17:55:54.020487 PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64
1913 17:55:54.023952 PCI: 00:0d.2 assign_resources, bus 2 link: 0
1914 17:55:54.030947 PCI: 00:0d.2 assign_resources, bus 2 link: 0 done
1915 17:55:54.037117 PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64
1916 17:55:54.047043 PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64
1917 17:55:54.050438 PCI: 00:0d.3 assign_resources, bus 3 link: 0
1918 17:55:54.057047 PCI: 00:0d.3 assign_resources, bus 3 link: 0 done
1919 17:55:54.063684 PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64
1920 17:55:54.066979 PCI: 00:14.0 assign_resources, bus 0 link: 0
1921 17:55:54.073661 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1922 17:55:54.080313 PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64
1923 17:55:54.090157 PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64
1924 17:55:54.096836 PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64
1925 17:55:54.100060 PCI: 00:14.3 assign_resources, bus 0 link: 0
1926 17:55:54.106732 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1927 17:55:54.113464 PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64
1928 17:55:54.120128 PCI: 00:15.0 assign_resources, bus 0 link: 0
1929 17:55:54.123338 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1930 17:55:54.133269 PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64
1931 17:55:54.137306 PCI: 00:15.1 assign_resources, bus 0 link: 0
1932 17:55:54.140005 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1933 17:55:54.149787 PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64
1934 17:55:54.156689 PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io
1935 17:55:54.166974 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem
1936 17:55:54.176924 PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem
1937 17:55:54.180066 PCI: 00:1c.0 assign_resources, bus 130 link: 0
1938 17:55:54.190082 PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io
1939 17:55:54.196723 PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64
1940 17:55:54.203309 PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1941 17:55:54.209964 PCI: 00:1c.0 assign_resources, bus 130 link: 0 done
1942 17:55:54.220129 PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io
1943 17:55:54.230133 PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem
1944 17:55:54.236526 PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem
1945 17:55:54.243402 PCI: 00:1c.7 assign_resources, bus 131 link: 0
1946 17:55:54.249690 PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem
1947 17:55:54.253059 PCI: 00:1c.7 assign_resources, bus 131 link: 0 done
1948 17:55:54.262949 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io
1949 17:55:54.272834 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem
1950 17:55:54.282875 PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem
1951 17:55:54.286173 PCI: 00:1d.0 assign_resources, bus 132 link: 0
1952 17:55:54.293029 PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64
1953 17:55:54.299348 PCI: 00:1d.0 assign_resources, bus 132 link: 0 done
1954 17:55:54.306350 PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64
1955 17:55:54.313224 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1956 17:55:54.316229 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1957 17:55:54.322782 LPC: Trying to open IO window from 800 size 1ff
1958 17:55:54.329494 PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64
1959 17:55:54.335949 PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64
1960 17:55:54.346006 PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64
1961 17:55:54.352570 PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem
1962 17:55:54.359433 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1963 17:55:54.362983 Root Device assign_resources, bus 0 link: 0 done
1964 17:55:54.366043 Done setting resources.
1965 17:55:54.372697 Show resources in subtree (Root Device)...After assigning values.
1966 17:55:54.376008 Root Device child on link 0 CPU_CLUSTER: 0
1967 17:55:54.379743 CPU_CLUSTER: 0 child on link 0 APIC: 00
1968 17:55:54.382721 APIC: 00
1969 17:55:54.382777 APIC: 16
1970 17:55:54.386062 APIC: 10
1971 17:55:54.386119 APIC: 12
1972 17:55:54.386165 APIC: 14
1973 17:55:54.392578 DOMAIN: 0000 child on link 0 GPIO: 0
1974 17:55:54.399350 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1975 17:55:54.409452 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1976 17:55:54.412685 GPIO: 0
1977 17:55:54.412743 PCI: 00:00.0
1978 17:55:54.422628 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1979 17:55:54.432413 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1980 17:55:54.442475 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1981 17:55:54.448997 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1982 17:55:54.458937 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1983 17:55:54.468932 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1984 17:55:54.479005 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1985 17:55:54.489084 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1986 17:55:54.498980 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1987 17:55:54.508955 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1988 17:55:54.515693 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1989 17:55:54.525557 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1990 17:55:54.535196 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1991 17:55:54.545302 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1992 17:55:54.555473 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1993 17:55:54.565140 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1994 17:55:54.571889 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1995 17:55:54.581855 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1996 17:55:54.592172 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1997 17:55:54.601916 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1998 17:55:54.611839 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1999 17:55:54.622095 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
2000 17:55:54.632121 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
2001 17:55:54.641996 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
2002 17:55:54.651627 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
2003 17:55:54.658489 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
2004 17:55:54.668221 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
2005 17:55:54.678182 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
2006 17:55:54.681513 PCI: 00:02.0
2007 17:55:54.691536 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
2008 17:55:54.701368 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
2009 17:55:54.711321 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
2010 17:55:54.714652 PCI: 00:04.0 child on link 0 GENERIC: 0.0
2011 17:55:54.724618 PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10
2012 17:55:54.727843 GENERIC: 0.0
2013 17:55:54.731365 PCI: 00:07.0 child on link 0 GENERIC: 0.0
2014 17:55:54.741397 PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c
2015 17:55:54.751235 PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24
2016 17:55:54.764553 PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20
2017 17:55:54.764633 GENERIC: 0.0
2018 17:55:54.764688 NONE
2019 17:55:54.774484 NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10
2020 17:55:54.784639 NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14
2021 17:55:54.794422 NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18
2022 17:55:54.797699 PCI: 00:07.1 child on link 0 GENERIC: 1.0
2023 17:55:54.807740 PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c
2024 17:55:54.821394 PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24
2025 17:55:54.831010 PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20
2026 17:55:54.831090 GENERIC: 1.0
2027 17:55:54.834220 NONE
2028 17:55:54.844379 NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10
2029 17:55:54.855281 NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14
2030 17:55:54.860869 NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18
2031 17:55:54.867601 PCI: 00:07.2 child on link 0 GENERIC: 0.0
2032 17:55:54.877396 PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c
2033 17:55:54.887344 PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24
2034 17:55:54.897198 PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20
2035 17:55:54.900576 GENERIC: 0.0
2036 17:55:54.900654 NONE
2037 17:55:54.910677 NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10
2038 17:55:54.920612 NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14
2039 17:55:54.930711 NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18
2040 17:55:54.930790 PCI: 00:08.0
2041 17:55:54.933751 PCI: 00:0a.0
2042 17:55:54.943783 PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10
2043 17:55:54.946905 PCI: 00:0d.0 child on link 0 USB0 port 0
2044 17:55:54.957062 PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10
2045 17:55:54.963482 USB0 port 0 child on link 0 USB3 port 0
2046 17:55:54.963560 USB3 port 0
2047 17:55:54.966935 USB3 port 1
2048 17:55:54.967013 USB3 port 2
2049 17:55:54.970351 USB3 port 3
2050 17:55:54.973566 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
2051 17:55:54.983601 PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10
2052 17:55:54.993377 PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18
2053 17:55:54.996924 GENERIC: 0.0
2054 17:55:55.000104 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
2055 17:55:55.010137 PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10
2056 17:55:55.023674 PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18
2057 17:55:55.023752 GENERIC: 0.0
2058 17:55:55.026755 PCI: 00:14.0 child on link 0 USB0 port 0
2059 17:55:55.040214 PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10
2060 17:55:55.043485 USB0 port 0 child on link 0 USB2 port 0
2061 17:55:55.043562 USB2 port 0
2062 17:55:55.046690 USB2 port 1
2063 17:55:55.046748 USB2 port 2
2064 17:55:55.050128 USB2 port 3
2065 17:55:55.053938 USB2 port 4
2066 17:55:55.054002 USB2 port 5
2067 17:55:55.056566 USB2 port 6
2068 17:55:55.056623 USB2 port 7
2069 17:55:55.059953 USB2 port 8
2070 17:55:55.060009 USB2 port 9
2071 17:55:55.063445 USB3 port 0
2072 17:55:55.063501 USB3 port 1
2073 17:55:55.067014 USB3 port 2
2074 17:55:55.067070 USB3 port 3
2075 17:55:55.070043 PCI: 00:14.2
2076 17:55:55.080174 PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10
2077 17:55:55.089748 PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18
2078 17:55:55.093024 PCI: 00:14.3 child on link 0 GENERIC: 0.0
2079 17:55:55.106467 PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10
2080 17:55:55.106548 GENERIC: 0.0
2081 17:55:55.109905 PCI: 00:15.0 child on link 0 I2C: 00:1a
2082 17:55:55.120545 PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10
2083 17:55:55.124540 I2C: 00:1a
2084 17:55:55.128275 PCI: 00:15.1 child on link 0 I2C: 00:50
2085 17:55:55.139357 PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10
2086 17:55:55.139492 I2C: 00:50
2087 17:55:55.139575 PCI: 00:16.0
2088 17:55:55.150637 PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10
2089 17:55:55.154132 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
2090 17:55:55.166007 PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c
2091 17:55:55.176758 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2092 17:55:55.186662 PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
2093 17:55:55.189773 PCI: 82:00.0
2094 17:55:55.199975 PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10
2095 17:55:55.209580 PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18
2096 17:55:55.219604 PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20
2097 17:55:55.223027 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
2098 17:55:55.232814 PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2099 17:55:55.246302 PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2100 17:55:55.256206 PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20
2101 17:55:55.256285 GENERIC: 0.0
2102 17:55:55.259448 PCI: 83:00.0
2103 17:55:55.269705 PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10
2104 17:55:55.272924 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
2105 17:55:55.282869 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2106 17:55:55.296033 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2107 17:55:55.306149 PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20
2108 17:55:55.306229 GENERIC: 0.0
2109 17:55:55.309208 PCI: 84:00.0
2110 17:55:55.319080 PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10
2111 17:55:55.319159 PCI: 00:1e.0
2112 17:55:55.332646 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
2113 17:55:55.332726 PCI: 00:1e.3
2114 17:55:55.342382 PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10
2115 17:55:55.349213 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
2116 17:55:55.356005 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
2117 17:55:55.359201 PNP: 0c09.0
2118 17:55:55.365814 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
2119 17:55:55.372480 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
2120 17:55:55.382434 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
2121 17:55:55.389337 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
2122 17:55:55.396135 GENERIC: 0.0 child on link 0 GENERIC: 0.0
2123 17:55:55.396213 GENERIC: 0.0
2124 17:55:55.399298 GENERIC: 1.0
2125 17:55:55.399374 PCI: 00:1f.3
2126 17:55:55.412588 PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10
2127 17:55:55.422441 PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20
2128 17:55:55.422519 PCI: 00:1f.4
2129 17:55:55.432277 PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10
2130 17:55:55.442595 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
2131 17:55:55.445583 PCI: 00:1f.5
2132 17:55:55.455872 PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10
2133 17:55:55.455951 Done allocating resources.
2134 17:55:55.462204 BS: BS_DEV_RESOURCES run times (exec / console): 4 / 4329 ms
2135 17:55:55.468914 coreboot skipped calling FSP notify phase: 00000020.
2136 17:55:55.472155 fw_config match found: AUDIO=NAU88L25B_I2S
2137 17:55:55.478849 BT offload enabled over I2S with NAU88L25B
2138 17:55:55.485220 BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms
2139 17:55:55.485298 Enabling resources...
2140 17:55:55.488676 PCI: 00:00.0 subsystem <- 8086/4619
2141 17:55:55.492058 PCI: 00:00.0 cmd <- 06
2142 17:55:55.495402 PCI: 00:02.0 subsystem <- 8086/46b3
2143 17:55:55.498767 PCI: 00:02.0 cmd <- 03
2144 17:55:55.502191 PCI: 00:04.0 subsystem <- 8086/461d
2145 17:55:55.505443 PCI: 00:04.0 cmd <- 02
2146 17:55:55.508719 PCI: 00:07.0 bridge ctrl <- 0013
2147 17:55:55.508795 PCI: 00:07.0 cmd <- 07
2148 17:55:55.512305 PCI: 00:07.1 bridge ctrl <- 0013
2149 17:55:55.515285 PCI: 00:07.1 cmd <- 07
2150 17:55:55.518505 PCI: 00:07.2 bridge ctrl <- 0013
2151 17:55:55.521933 PCI: 00:07.2 cmd <- 07
2152 17:55:55.525261 PCI: 00:0a.0 subsystem <- 8086/467d
2153 17:55:55.528571 PCI: 00:0a.0 cmd <- 02
2154 17:55:55.531833 PCI: 00:0d.0 subsystem <- 8086/461e
2155 17:55:55.531912 PCI: 00:0d.0 cmd <- 02
2156 17:55:55.535651 PCI: 00:0d.2 subsystem <- 8086/463e
2157 17:55:55.538539 PCI: 00:0d.2 cmd <- 02
2158 17:55:55.541805 PCI: 00:0d.3 subsystem <- 8086/466d
2159 17:55:55.545037 PCI: 00:0d.3 cmd <- 02
2160 17:55:55.548415 PCI: 00:14.0 subsystem <- 8086/51ed
2161 17:55:55.551887 PCI: 00:14.0 cmd <- 02
2162 17:55:55.555107 PCI: 00:14.2 subsystem <- 8086/51ef
2163 17:55:55.558954 PCI: 00:14.2 cmd <- 02
2164 17:55:55.561908 PCI: 00:14.3 subsystem <- 8086/51f0
2165 17:55:55.561986 PCI: 00:14.3 cmd <- 02
2166 17:55:55.565096 PCI: 00:15.0 subsystem <- 8086/51e8
2167 17:55:55.568253 PCI: 00:15.0 cmd <- 02
2168 17:55:55.571977 PCI: 00:15.1 subsystem <- 8086/51e9
2169 17:55:55.575000 PCI: 00:15.1 cmd <- 06
2170 17:55:55.578488 PCI: 00:16.0 subsystem <- 8086/51e0
2171 17:55:55.581835 PCI: 00:16.0 cmd <- 02
2172 17:55:55.585061 PCI: 00:1c.0 bridge ctrl <- 0013
2173 17:55:55.588408 PCI: 00:1c.0 subsystem <- 8086/51be
2174 17:55:55.591663 PCI: 00:1c.0 cmd <- 07
2175 17:55:55.595174 PCI: 00:1c.7 bridge ctrl <- 0013
2176 17:55:55.598360 PCI: 00:1c.7 subsystem <- 8086/51bf
2177 17:55:55.598437 PCI: 00:1c.7 cmd <- 06
2178 17:55:55.601768 PCI: 00:1d.0 bridge ctrl <- 0013
2179 17:55:55.605079 PCI: 00:1d.0 subsystem <- 8086/51b3
2180 17:55:55.608325 PCI: 00:1d.0 cmd <- 06
2181 17:55:55.611682 PCI: 00:1e.0 subsystem <- 8086/51a8
2182 17:55:55.615113 PCI: 00:1e.0 cmd <- 06
2183 17:55:55.618348 PCI: 00:1e.3 subsystem <- 8086/51ab
2184 17:55:55.621940 PCI: 00:1e.3 cmd <- 02
2185 17:55:55.625472 PCI: 00:1f.0 subsystem <- 8086/5182
2186 17:55:55.628447 PCI: 00:1f.0 cmd <- 407
2187 17:55:55.631647 PCI: 00:1f.3 subsystem <- 8086/51c8
2188 17:55:55.631725 PCI: 00:1f.3 cmd <- 02
2189 17:55:55.635164 PCI: 00:1f.4 subsystem <- 8086/51a3
2190 17:55:55.638361 PCI: 00:1f.4 cmd <- 03
2191 17:55:55.641880 PCI: 00:1f.5 subsystem <- 8086/51a4
2192 17:55:55.644966 PCI: 00:1f.5 cmd <- 406
2193 17:55:55.648579 PCI: 82:00.0 cmd <- 03
2194 17:55:55.648656 PCI: 83:00.0 cmd <- 06
2195 17:55:55.651618 PCI: 84:00.0 cmd <- 02
2196 17:55:55.651699 done.
2197 17:55:55.658632 BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms
2198 17:55:55.661483 ME: Version: Unavailable
2199 17:55:55.665163 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
2200 17:55:55.668268 Initializing devices...
2201 17:55:55.671520 Root Device init
2202 17:55:55.671598 mainboard: EC init
2203 17:55:55.678321 Chrome EC: Set SMI mask to 0x0000000000000000
2204 17:55:55.681555 Chrome EC: UHEPI supported
2205 17:55:55.688007 Chrome EC: clear events_b mask to 0x0000000000000000
2206 17:55:55.691500 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
2207 17:55:55.698004 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
2208 17:55:55.704764 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004
2209 17:55:55.708063 Chrome EC: Set WAKE mask to 0x0000000000000000
2210 17:55:55.714678 Root Device init finished in 38 msecs
2211 17:55:55.714756 PCI: 00:00.0 init
2212 17:55:55.718342 CPU TDP = 15 Watts
2213 17:55:55.718420 CPU PL1 = 55 Watts
2214 17:55:55.721683 CPU PL2 = 55 Watts
2215 17:55:55.724856 CPU PsysPL2 = 90 Watts
2216 17:55:55.724933 CPU PL4 = 123 Watts
2217 17:55:55.728091 PCI: 00:00.0 init finished in 10 msecs
2218 17:55:55.731734 PCI: 00:02.0 init
2219 17:55:55.734697 GMA: Found VBT in CBFS
2220 17:55:55.738087 GMA: Found valid VBT in CBFS
2221 17:55:55.741495 Graphics hand-off block not found
2222 17:55:55.744662 PCI: 00:02.0 init finished in 8 msecs
2223 17:55:55.744739 PCI: 00:0a.0 init
2224 17:55:55.748085 PCI: 00:0a.0 init finished in 0 msecs
2225 17:55:55.751690 PCI: 00:14.0 init
2226 17:55:55.754678 PCI: 00:14.0 init finished in 0 msecs
2227 17:55:55.758004 PCI: 00:14.2 init
2228 17:55:55.761238 PCI: 00:14.2 init finished in 0 msecs
2229 17:55:55.761316 PCI: 00:15.0 init
2230 17:55:55.764472 I2C bus 0 version 0x3230302a
2231 17:55:55.767888 DW I2C bus 0 at 0x808d7000 (400 KHz)
2232 17:55:55.774674 PCI: 00:15.0 init finished in 6 msecs
2233 17:55:55.774751 PCI: 00:15.1 init
2234 17:55:55.777828 I2C bus 1 version 0x3230302a
2235 17:55:55.781369 DW I2C bus 1 at 0x808d8000 (400 KHz)
2236 17:55:55.784551 PCI: 00:15.1 init finished in 6 msecs
2237 17:55:55.787885 PCI: 00:16.0 init
2238 17:55:55.791202 PCI: 00:16.0 init finished in 0 msecs
2239 17:55:55.794361 PCI: 00:1c.0 init
2240 17:55:55.798062 Initializing PCH PCIe bridge.
2241 17:55:55.801053 PCI: 00:1c.0 init finished in 3 msecs
2242 17:55:55.801130 PCI: 00:1c.7 init
2243 17:55:55.804496 Initializing PCH PCIe bridge.
2244 17:55:55.807817 PCI: 00:1c.7 init finished in 3 msecs
2245 17:55:55.811285 PCI: 00:1d.0 init
2246 17:55:55.814407 Initializing PCH PCIe bridge.
2247 17:55:55.817842 PCI: 00:1d.0 init finished in 3 msecs
2248 17:55:55.821031 PCI: 00:1f.0 init
2249 17:55:55.824521 IOAPIC: Initializing IOAPIC at 0xfec00000
2250 17:55:55.824598 IOAPIC: ID = 0x02
2251 17:55:55.827606 IOAPIC: Dumping registers
2252 17:55:55.830842 reg 0x0000: 0x02000000
2253 17:55:55.834399 reg 0x0001: 0x00770020
2254 17:55:55.834477 reg 0x0002: 0x00000000
2255 17:55:55.837895 IOAPIC: 120 interrupts
2256 17:55:55.840929 IOAPIC: Clearing IOAPIC at 0xfec00000
2257 17:55:55.847683 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2258 17:55:55.851218 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2259 17:55:55.857700 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2260 17:55:55.860828 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2261 17:55:55.867397 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2262 17:55:55.870843 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2263 17:55:55.874103 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2264 17:55:55.880949 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2265 17:55:55.884243 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2266 17:55:55.890846 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2267 17:55:55.894724 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2268 17:55:55.900773 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2269 17:55:55.904122 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2270 17:55:55.907180 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2271 17:55:55.914155 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2272 17:55:55.917464 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2273 17:55:55.923994 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2274 17:55:55.927404 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2275 17:55:55.933968 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2276 17:55:55.937383 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2277 17:55:55.943910 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2278 17:55:55.947158 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2279 17:55:55.950556 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2280 17:55:55.957231 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2281 17:55:55.960815 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2282 17:55:55.967125 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2283 17:55:55.970593 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2284 17:55:55.977063 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2285 17:55:55.980382 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2286 17:55:55.986965 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2287 17:55:55.990479 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2288 17:55:55.993793 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2289 17:55:56.000363 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2290 17:55:56.003722 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2291 17:55:56.010532 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2292 17:55:56.014001 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2293 17:55:56.020232 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2294 17:55:56.023886 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2295 17:55:56.030322 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2296 17:55:56.033721 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2297 17:55:56.036753 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2298 17:55:56.043555 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2299 17:55:56.046830 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2300 17:55:56.053582 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2301 17:55:56.056843 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2302 17:55:56.063739 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2303 17:55:56.066823 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2304 17:55:56.070361 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2305 17:55:56.076784 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2306 17:55:56.080154 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2307 17:55:56.086641 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2308 17:55:56.090008 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2309 17:55:56.096872 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2310 17:55:56.100109 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2311 17:55:56.106702 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2312 17:55:56.109916 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2313 17:55:56.113298 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2314 17:55:56.119971 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2315 17:55:56.123283 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2316 17:55:56.130050 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2317 17:55:56.133501 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2318 17:55:56.140069 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2319 17:55:56.143283 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2320 17:55:56.149997 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2321 17:55:56.153077 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2322 17:55:56.156528 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2323 17:55:56.163071 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2324 17:55:56.166217 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2325 17:55:56.173000 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2326 17:55:56.176628 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2327 17:55:56.182785 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2328 17:55:56.186145 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2329 17:55:56.192774 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2330 17:55:56.196154 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2331 17:55:56.199529 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2332 17:55:56.206120 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2333 17:55:56.209566 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2334 17:55:56.216058 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2335 17:55:56.219394 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2336 17:55:56.225949 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2337 17:55:56.229500 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2338 17:55:56.236086 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2339 17:55:56.239173 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2340 17:55:56.242683 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2341 17:55:56.249430 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2342 17:55:56.252597 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2343 17:55:56.259189 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2344 17:55:56.262462 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2345 17:55:56.269051 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2346 17:55:56.272637 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2347 17:55:56.279045 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2348 17:55:56.282467 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2349 17:55:56.285771 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2350 17:55:56.292444 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2351 17:55:56.295750 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2352 17:55:56.302369 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2353 17:55:56.305995 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2354 17:55:56.312393 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2355 17:55:56.315646 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2356 17:55:56.322170 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2357 17:55:56.325480 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2358 17:55:56.328873 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2359 17:55:56.335550 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2360 17:55:56.339047 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2361 17:55:56.345407 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2362 17:55:56.348737 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2363 17:55:56.355423 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2364 17:55:56.358706 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2365 17:55:56.362034 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2366 17:55:56.368575 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2367 17:55:56.372104 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2368 17:55:56.378642 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2369 17:55:56.382027 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2370 17:55:56.388649 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2371 17:55:56.392271 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2372 17:55:56.398595 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2373 17:55:56.401793 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2374 17:55:56.405380 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2375 17:55:56.411936 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2376 17:55:56.415246 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2377 17:55:56.421787 IOAPIC: Bootstrap Processor Local APIC = 0x00
2378 17:55:56.425179 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2379 17:55:56.428520 PCI: 00:1f.0 init finished in 606 msecs
2380 17:55:56.431749 PCI: 00:1f.2 init
2381 17:55:56.435383 apm_control: Disabling ACPI.
2382 17:55:56.438615 APMC done.
2383 17:55:56.441776 PCI: 00:1f.2 init finished in 6 msecs
2384 17:55:56.445131 PCI: 00:1f.3 init
2385 17:55:56.448361 PCI: 00:1f.3 init finished in 0 msecs
2386 17:55:56.448438 PCI: 00:1f.4 init
2387 17:55:56.451583 PCI: 00:1f.4 init finished in 0 msecs
2388 17:55:56.454971 PCI: 82:00.0 init
2389 17:55:56.458218 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
2390 17:55:56.461997 Located 'ethernet_mac0' in VPD
2391 17:55:56.465263 r8168: Resetting NIC...done
2392 17:55:56.468555 r8168: Programming MAC Address...done
2393 17:55:56.471902 r8168: Customized LED 0x482
2394 17:55:56.475206 r8168: read back LED setting as 0x482
2395 17:55:56.482001 PCI: 82:00.0 init finished in 21 msecs
2396 17:55:56.482077 PCI: 83:00.0 init
2397 17:55:56.485284 PCI: 83:00.0 init finished in 0 msecs
2398 17:55:56.488608 PCI: 84:00.0 init
2399 17:55:56.491806 PCI: 84:00.0 init finished in 0 msecs
2400 17:55:56.495834 PNP: 0c09.0 init
2401 17:55:56.498423 Google Chrome EC uptime: 13.425 seconds
2402 17:55:56.501801 Google Chrome AP resets since EC boot: 1
2403 17:55:56.505380 Google Chrome most recent AP reset causes:
2404 17:55:56.511704 0.312: 32775 shutdown: entering G3
2405 17:55:56.514984 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2406 17:55:56.521814 PNP: 0c09.0 init finished in 23 msecs
2407 17:55:56.521901 GENERIC: 0.0 init
2408 17:55:56.525108 GENERIC: 0.0 init finished in 0 msecs
2409 17:55:56.528394 GENERIC: 1.0 init
2410 17:55:56.531673 GENERIC: 1.0 init finished in 0 msecs
2411 17:55:56.535044 Devices initialized
2412 17:55:56.538744 Show all devs... After init.
2413 17:55:56.538821 Root Device: enabled 1
2414 17:55:56.541631 CPU_CLUSTER: 0: enabled 1
2415 17:55:56.545070 DOMAIN: 0000: enabled 1
2416 17:55:56.545146 GPIO: 0: enabled 1
2417 17:55:56.548306 PCI: 00:00.0: enabled 1
2418 17:55:56.551651 PCI: 00:01.0: enabled 0
2419 17:55:56.555212 PCI: 00:01.1: enabled 0
2420 17:55:56.555291 PCI: 00:02.0: enabled 1
2421 17:55:56.558185 PCI: 00:04.0: enabled 1
2422 17:55:56.561786 PCI: 00:05.0: enabled 0
2423 17:55:56.565001 PCI: 00:06.0: enabled 0
2424 17:55:56.565078 PCI: 00:06.2: enabled 0
2425 17:55:56.568293 PCI: 00:07.0: enabled 1
2426 17:55:56.571610 PCI: 00:07.1: enabled 1
2427 17:55:56.571686 PCI: 00:07.2: enabled 1
2428 17:55:56.575215 PCI: 00:07.3: enabled 0
2429 17:55:56.578149 PCI: 00:08.0: enabled 0
2430 17:55:56.581401 PCI: 00:09.0: enabled 0
2431 17:55:56.581478 PCI: 00:0a.0: enabled 1
2432 17:55:56.584765 PCI: 00:0d.0: enabled 1
2433 17:55:56.588181 PCI: 00:0d.1: enabled 0
2434 17:55:56.591405 PCI: 00:0d.2: enabled 1
2435 17:55:56.591481 PCI: 00:0d.3: enabled 1
2436 17:55:56.594881 PCI: 00:0e.0: enabled 0
2437 17:55:56.598233 PCI: 00:10.0: enabled 0
2438 17:55:56.601412 PCI: 00:10.1: enabled 0
2439 17:55:56.601492 PCI: 00:10.6: enabled 0
2440 17:55:56.604808 PCI: 00:10.7: enabled 0
2441 17:55:56.608121 PCI: 00:12.0: enabled 0
2442 17:55:56.608197 PCI: 00:12.6: enabled 0
2443 17:55:56.611767 PCI: 00:12.7: enabled 0
2444 17:55:56.614655 PCI: 00:13.0: enabled 0
2445 17:55:56.618040 PCI: 00:14.0: enabled 1
2446 17:55:56.618116 PCI: 00:14.1: enabled 0
2447 17:55:56.621340 PCI: 00:14.2: enabled 1
2448 17:55:56.624943 PCI: 00:14.3: enabled 1
2449 17:55:56.627885 PCI: 00:15.0: enabled 1
2450 17:55:56.627961 PCI: 00:15.1: enabled 1
2451 17:55:56.631334 PCI: 00:15.2: enabled 0
2452 17:55:56.634665 PCI: 00:15.3: enabled 0
2453 17:55:56.637856 PCI: 00:16.0: enabled 1
2454 17:55:56.637935 PCI: 00:16.1: enabled 0
2455 17:55:56.641488 PCI: 00:16.2: enabled 0
2456 17:55:56.644555 PCI: 00:16.3: enabled 0
2457 17:55:56.647748 PCI: 00:16.4: enabled 0
2458 17:55:56.647824 PCI: 00:16.5: enabled 0
2459 17:55:56.651372 PCI: 00:17.0: enabled 0
2460 17:55:56.654424 PCI: 00:19.0: enabled 0
2461 17:55:56.657634 PCI: 00:19.1: enabled 0
2462 17:55:56.657712 PCI: 00:19.2: enabled 0
2463 17:55:56.661015 PCI: 00:1a.0: enabled 0
2464 17:55:56.664148 PCI: 00:1c.0: enabled 0
2465 17:55:56.664231 PCI: 00:1c.1: enabled 0
2466 17:55:56.667528 PCI: 00:1c.2: enabled 0
2467 17:55:56.670901 PCI: 00:1c.3: enabled 0
2468 17:55:56.674265 PCI: 00:1c.4: enabled 0
2469 17:55:56.674341 PCI: 00:1c.5: enabled 1
2470 17:55:56.677478 PCI: 00:1c.0: enabled 1
2471 17:55:56.680862 PCI: 00:1c.7: enabled 1
2472 17:55:56.684091 PCI: 00:1d.0: enabled 0
2473 17:55:56.684173 PCI: 00:1d.1: enabled 0
2474 17:55:56.687367 PCI: 00:1d.2: enabled 0
2475 17:55:56.690748 PCI: 00:1d.0: enabled 1
2476 17:55:56.694210 PCI: 00:1e.0: enabled 1
2477 17:55:56.694286 PCI: 00:1e.1: enabled 0
2478 17:55:56.697283 PCI: 00:1e.2: enabled 0
2479 17:55:56.700673 PCI: 00:1e.3: enabled 1
2480 17:55:56.704055 PCI: 00:1f.0: enabled 1
2481 17:55:56.704131 PCI: 00:1f.1: enabled 0
2482 17:55:56.707358 PCI: 00:1f.2: enabled 1
2483 17:55:56.710987 PCI: 00:1f.3: enabled 1
2484 17:55:56.711073 PCI: 00:1f.4: enabled 1
2485 17:55:56.714207 PCI: 00:1f.5: enabled 1
2486 17:55:56.717259 PCI: 00:1f.6: enabled 0
2487 17:55:56.720722 PCI: 00:1f.7: enabled 0
2488 17:55:56.720801 GENERIC: 0.0: enabled 1
2489 17:55:56.724088 GENERIC: 0.0: enabled 1
2490 17:55:56.727491 GENERIC: 1.0: enabled 1
2491 17:55:56.730644 GENERIC: 0.0: enabled 1
2492 17:55:56.730721 GENERIC: 1.0: enabled 1
2493 17:55:56.734176 USB0 port 0: enabled 1
2494 17:55:56.737346 GENERIC: 0.0: enabled 1
2495 17:55:56.740696 GENERIC: 0.0: enabled 1
2496 17:55:56.740773 USB0 port 0: enabled 1
2497 17:55:56.744229 GENERIC: 0.0: enabled 1
2498 17:55:56.747434 I2C: 00:1a: enabled 1
2499 17:55:56.747510 I2C: 00:50: enabled 1
2500 17:55:56.751115 PCI: 00:00.0: enabled 1
2501 17:55:56.753953 PCI: 82:00.0: enabled 1
2502 17:55:56.757204 GENERIC: 0.0: enabled 1
2503 17:55:56.757280 GENERIC: 0.0: enabled 1
2504 17:55:56.760467 PNP: 0c09.0: enabled 1
2505 17:55:56.763739 GENERIC: 0.0: enabled 1
2506 17:55:56.763815 USB3 port 0: enabled 1
2507 17:55:56.767190 USB3 port 1: enabled 0
2508 17:55:56.770526 USB3 port 2: enabled 1
2509 17:55:56.773751 USB3 port 3: enabled 0
2510 17:55:56.773826 USB2 port 0: enabled 1
2511 17:55:56.777095 USB2 port 1: enabled 0
2512 17:55:56.780535 USB2 port 2: enabled 1
2513 17:55:56.780611 USB2 port 3: enabled 1
2514 17:55:56.783715 USB2 port 4: enabled 1
2515 17:55:56.787247 USB2 port 5: enabled 1
2516 17:55:56.787323 USB2 port 6: enabled 1
2517 17:55:56.790415 USB2 port 7: enabled 1
2518 17:55:56.793679 USB2 port 8: enabled 0
2519 17:55:56.797195 USB2 port 9: enabled 1
2520 17:55:56.797271 USB3 port 0: enabled 1
2521 17:55:56.800406 USB3 port 1: enabled 1
2522 17:55:56.803555 USB3 port 2: enabled 1
2523 17:55:56.803630 USB3 port 3: enabled 1
2524 17:55:56.807008 GENERIC: 0.0: enabled 1
2525 17:55:56.810236 GENERIC: 1.0: enabled 1
2526 17:55:56.810320 APIC: 00: enabled 1
2527 17:55:56.814003 APIC: 16: enabled 1
2528 17:55:56.816953 APIC: 10: enabled 1
2529 17:55:56.817028 APIC: 12: enabled 1
2530 17:55:56.820321 APIC: 14: enabled 1
2531 17:55:56.820397 NONE: enabled 1
2532 17:55:56.823691 NONE: enabled 1
2533 17:55:56.823775 NONE: enabled 1
2534 17:55:56.827031 PCI: 83:00.0: enabled 1
2535 17:55:56.830404 PCI: 84:00.0: enabled 1
2536 17:55:56.836941 BS: BS_DEV_INIT run times (exec / console): 8 / 1156 ms
2537 17:55:56.840316 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2538 17:55:56.843538 ELOG: NV offset 0xf20000 size 0x4000
2539 17:55:56.851415 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2540 17:55:56.858122 ELOG: Event(17) added with size 13 at 2024-03-19 17:49:16 UTC
2541 17:55:56.864741 ELOG: Event(9E) added with size 10 at 2024-03-19 17:49:16 UTC
2542 17:55:56.871458 ELOG: Event(9F) added with size 14 at 2024-03-19 17:49:16 UTC
2543 17:55:56.878224 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2544 17:55:56.884803 ELOG: Event(A0) added with size 9 at 2024-03-19 17:49:16 UTC
2545 17:55:56.888066 elog_add_boot_reason: Logged dev mode boot
2546 17:55:56.894739 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2547 17:55:56.894816 Finalize devices...
2548 17:55:56.898042 PCI: 00:16.0 final
2549 17:55:56.901520 CSE RW Firmware Version: 16.1.25.2049
2550 17:55:56.904725 PCI: 00:1f.2 final
2551 17:55:56.904801 PCI: 00:1f.4 final
2552 17:55:56.908087 GENERIC: 0.0 final
2553 17:55:56.914637 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2554 17:55:56.914713 GENERIC: 1.0 final
2555 17:55:56.921239 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2556 17:55:56.924582 Devices finalized
2557 17:55:56.927864 BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms
2558 17:55:56.934392 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2559 17:55:56.941179 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2560 17:55:56.944661 ME: HFSTS1 : 0x90000245
2561 17:55:56.947762 ME: HFSTS2 : 0x32850116
2562 17:55:56.954574 ME: HFSTS3 : 0x00000050
2563 17:55:56.957655 ME: HFSTS4 : 0x00004000
2564 17:55:56.961213 ME: HFSTS5 : 0x00000000
2565 17:55:56.967764 ME: HFSTS6 : 0x40600006
2566 17:55:56.971310 ME: Manufacturing Mode : NO
2567 17:55:56.974311 ME: SPI Protection Mode Enabled : YES
2568 17:55:56.977993 ME: FPFs Committed : YES
2569 17:55:56.981195 ME: Manufacturing Vars Locked : YES
2570 17:55:56.987591 ME: FW Partition Table : OK
2571 17:55:56.991012 ME: Bringup Loader Failure : NO
2572 17:55:56.994596 ME: Firmware Init Complete : YES
2573 17:55:56.997538 ME: Boot Options Present : NO
2574 17:55:57.000869 ME: Update In Progress : NO
2575 17:55:57.004536 ME: D0i3 Support : YES
2576 17:55:57.007695 ME: Low Power State Enabled : NO
2577 17:55:57.010683 ME: CPU Replaced : YES
2578 17:55:57.017579 ME: CPU Replacement Valid : YES
2579 17:55:57.020761 ME: Current Working State : 5
2580 17:55:57.024110 ME: Current Operation State : 1
2581 17:55:57.027367 ME: Current Operation Mode : 0
2582 17:55:57.030712 ME: Error Code : 0
2583 17:55:57.034083 ME: Enhanced Debug Mode : NO
2584 17:55:57.037477 ME: CPU Debug Disabled : YES
2585 17:55:57.040763 ME: TXT Support : NO
2586 17:55:57.044197 ME: WP for RO is enabled : YES
2587 17:55:57.050847 ME: RO write protection scope - Start=0x1000, End=0x1A6FFF
2588 17:55:57.057526 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2589 17:55:57.060705 Ramoops buffer: 0x100000@0x76898000.
2590 17:55:57.067384 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2591 17:55:57.074062 CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c
2592 17:55:57.077184 CBFS: 'fallback/slic' not found.
2593 17:55:57.080501 ACPI: Writing ACPI tables at 7686c000.
2594 17:55:57.083999 ACPI: * FACS
2595 17:55:57.084075 ACPI: * DSDT
2596 17:55:57.090371 PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000
2597 17:55:57.095962 ACPI: * FADT
2598 17:55:57.096038 SCI is IRQ9
2599 17:55:57.101907 ACPI: added table 1/32, length now 40
2600 17:55:57.101983 ACPI: * SSDT
2601 17:55:57.109076 Found 1 CPU(s) with 5/5 physical/logical core(s) each.
2602 17:55:57.111906 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2603 17:55:57.118415 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2604 17:55:57.121782 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2605 17:55:57.128555 \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0
2606 17:55:57.131813 \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1
2607 17:55:57.138507 \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2
2608 17:55:57.142379 USB Type-C 0 mapped to EC port 0
2609 17:55:57.148631 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2610 17:55:57.151881 \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0
2611 17:55:57.154997 USB Type-C 2 mapped to EC port 1
2612 17:55:57.162164 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2613 17:55:57.168281 \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0
2614 17:55:57.171508 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2615 17:55:57.178255 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2616 17:55:57.181602 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2617 17:55:57.188275 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0
2618 17:55:57.195037 \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3)
2619 17:55:57.201540 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
2620 17:55:57.204941 \_SB.PCI0.RP09: Added StorageD3Enable property
2621 17:55:57.209443 EC returned error result code 1
2622 17:55:57.215966 PS2K: Bad resp from EC. Vivaldi disabled!
2623 17:55:57.222550 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2624 17:55:57.229355 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2
2625 17:55:57.235993 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2626 17:55:57.242613 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2
2627 17:55:57.249195 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3
2628 17:55:57.252670 \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4
2629 17:55:57.259212 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5
2630 17:55:57.265953 \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6
2631 17:55:57.272397 \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7
2632 17:55:57.279276 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2633 17:55:57.285936 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0
2634 17:55:57.292558 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1
2635 17:55:57.299231 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2
2636 17:55:57.305890 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3
2637 17:55:57.312428 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2638 17:55:57.319081 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2639 17:55:57.322598 ACPI: added table 2/32, length now 44
2640 17:55:57.322677 ACPI: * MCFG
2641 17:55:57.329027 ACPI: added table 3/32, length now 48
2642 17:55:57.329108 ACPI: * TPM2
2643 17:55:57.332302 TPM2 log created at 0x7685c000
2644 17:55:57.335635 ACPI: added table 4/32, length now 52
2645 17:55:57.338938 ACPI: * LPIT
2646 17:55:57.342427 ACPI: added table 5/32, length now 56
2647 17:55:57.342486 ACPI: * MADT
2648 17:55:57.346215 SCI is IRQ9
2649 17:55:57.349389 ACPI: added table 6/32, length now 60
2650 17:55:57.352538 cmd_reg from pmc_make_ipc_cmd 1052838
2651 17:55:57.358879 CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc
2652 17:55:57.365525 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2653 17:55:57.372175 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2654 17:55:57.375635 PMC CrashLog size in discovery mode: 0xC00
2655 17:55:57.378850 cpu crashlog bar addr: 0x808C0000
2656 17:55:57.382219 cpu discovery table offset: 0x6030
2657 17:55:57.385588 cpu_crashlog_discovery_table buffer count: 0x3
2658 17:55:57.392193 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2659 17:55:57.398854 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2660 17:55:57.405457 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2661 17:55:57.412889 PMC crashLog size in discovery mode : 0xC00
2662 17:55:57.418856 Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM.
2663 17:55:57.421895 discover mode PMC crashlog size adjusted to: 0x200
2664 17:55:57.428714 Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM.
2665 17:55:57.435311 discover mode PMC crashlog size adjusted to: 0x0
2666 17:55:57.439044 m_cpu_crashLog_size : 0x3480 bytes
2667 17:55:57.439102 CPU crashLog present.
2668 17:55:57.445270 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2669 17:55:57.451935 Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM.
2670 17:55:57.455404 current = 76875cf0
2671 17:55:57.455502 ACPI: * DMAR
2672 17:55:57.458848 ACPI: added table 7/32, length now 64
2673 17:55:57.465445 ACPI: added table 8/32, length now 68
2674 17:55:57.465506 ACPI: * HPET
2675 17:55:57.468683 ACPI: added table 9/32, length now 72
2676 17:55:57.471981 ACPI: done.
2677 17:55:57.472038 ACPI tables: 40480 bytes.
2678 17:55:57.475689 smbios_write_tables: 76856000
2679 17:55:57.478765 EC returned error result code 3
2680 17:55:57.482007 Couldn't obtain OEM name from CBI
2681 17:55:57.485536 Create SMBIOS type 16
2682 17:55:57.488898 Create SMBIOS type 17
2683 17:55:57.492087 Create SMBIOS type 20
2684 17:55:57.492150 GENERIC: 0.0 (WIFI Device)
2685 17:55:57.495398 SMBIOS tables: 982 bytes.
2686 17:55:57.498763 Writing table forward entry at 0x00000500
2687 17:55:57.505599 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955
2688 17:55:57.508876 Writing coreboot table at 0x76890000
2689 17:55:57.515393 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2690 17:55:57.518576 1. 0000000000001000-000000000009ffff: RAM
2691 17:55:57.525518 2. 00000000000a0000-00000000000fffff: RESERVED
2692 17:55:57.528811 3. 0000000000100000-0000000076855fff: RAM
2693 17:55:57.535316 4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES
2694 17:55:57.538618 5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE
2695 17:55:57.545697 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2696 17:55:57.552035 7. 0000000077000000-00000000803fffff: RESERVED
2697 17:55:57.555162 8. 00000000c0000000-00000000cfffffff: RESERVED
2698 17:55:57.562094 9. 00000000f8000000-00000000f9ffffff: RESERVED
2699 17:55:57.565139 10. 00000000fb000000-00000000fb000fff: RESERVED
2700 17:55:57.568559 11. 00000000fc800000-00000000fe7fffff: RESERVED
2701 17:55:57.575108 12. 00000000feb00000-00000000feb7ffff: RESERVED
2702 17:55:57.578571 13. 00000000fec00000-00000000fecfffff: RESERVED
2703 17:55:57.585461 14. 00000000fed40000-00000000fed6ffff: RESERVED
2704 17:55:57.588457 15. 00000000fed80000-00000000fed87fff: RESERVED
2705 17:55:57.595126 16. 00000000fed90000-00000000fed92fff: RESERVED
2706 17:55:57.598800 17. 00000000feda0000-00000000feda1fff: RESERVED
2707 17:55:57.604978 18. 00000000fedc0000-00000000feddffff: RESERVED
2708 17:55:57.608304 19. 0000000100000000-000000017fbfffff: RAM
2709 17:55:57.612022 Passing 4 GPIOs to payload:
2710 17:55:57.614970 NAME | PORT | POLARITY | VALUE
2711 17:55:57.621726 lid | undefined | high | high
2712 17:55:57.625045 power | undefined | high | low
2713 17:55:57.631699 oprom | undefined | high | low
2714 17:55:57.638474 EC in RW | 0x00000151 | high | high
2715 17:55:57.638623 Board ID: 3
2716 17:55:57.638683 FW config: 0x64
2717 17:55:57.645079 Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum bc16
2718 17:55:57.648356 coreboot table: 1788 bytes.
2719 17:55:57.651736 IMD ROOT 0. 0x76fff000 0x00001000
2720 17:55:57.654944 IMD SMALL 1. 0x76ffe000 0x00001000
2721 17:55:57.661704 FSP MEMORY 2. 0x76afe000 0x00500000
2722 17:55:57.665192 CONSOLE 3. 0x76ade000 0x00020000
2723 17:55:57.668369 RW MCACHE 4. 0x76add000 0x00000464
2724 17:55:57.671761 RO MCACHE 5. 0x76adc000 0x00001000
2725 17:55:57.675100 FMAP 6. 0x76adb000 0x0000064a
2726 17:55:57.678461 TIME STAMP 7. 0x76ada000 0x00000910
2727 17:55:57.681885 VBOOT WORK 8. 0x76ac6000 0x00014000
2728 17:55:57.685098 MEM INFO 9. 0x76ac5000 0x000003b8
2729 17:55:57.691697 ROMSTG STCK10. 0x76ac4000 0x00001000
2730 17:55:57.695204 AFTER CAR 11. 0x76ab8000 0x0000c000
2731 17:55:57.698471 RAMSTAGE 12. 0x76a2d000 0x0008b000
2732 17:55:57.701877 ACPI BERT 13. 0x76a1d000 0x00010000
2733 17:55:57.705166 CHROMEOS NVS14. 0x76a1c000 0x00000f00
2734 17:55:57.708541 REFCODE 15. 0x769ad000 0x0006f000
2735 17:55:57.712035 SMM BACKUP 16. 0x7699d000 0x00010000
2736 17:55:57.715356 IGD OPREGION17. 0x76998000 0x000041fd
2737 17:55:57.721873 RAMOOPS 18. 0x76898000 0x00100000
2738 17:55:57.725234 COREBOOT 19. 0x76890000 0x00008000
2739 17:55:57.728541 ACPI 20. 0x7686c000 0x00024000
2740 17:55:57.731949 TPM2 TCGLOG21. 0x7685c000 0x00010000
2741 17:55:57.735240 PMC CRASHLOG22. 0x7685b000 0x00000c00
2742 17:55:57.738506 CPU CRASHLOG23. 0x76857000 0x00003480
2743 17:55:57.741906 SMBIOS 24. 0x76856000 0x00001000
2744 17:55:57.745196 IMD small region:
2745 17:55:57.748752 IMD ROOT 0. 0x76ffec00 0x00000400
2746 17:55:57.752513 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2747 17:55:57.755678 VPD 2. 0x76ffeba0 0x00000032
2748 17:55:57.762061 CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020
2749 17:55:57.765265 POWER STATE 4. 0x76ffeb20 0x00000044
2750 17:55:57.768776 ROMSTAGE 5. 0x76ffeb00 0x00000004
2751 17:55:57.772067 ACPI GNVS 6. 0x76ffeaa0 0x00000048
2752 17:55:57.778743 TYPE_C INFO 7. 0x76ffea80 0x0000000c
2753 17:55:57.782319 BS: BS_WRITE_TABLES run times (exec / console): 6 / 704 ms
2754 17:55:57.785313 MTRR: Physical address space:
2755 17:55:57.792012 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2756 17:55:57.798899 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2757 17:55:57.805231 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2758 17:55:57.812204 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2759 17:55:57.818828 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2760 17:55:57.825131 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2761 17:55:57.831874 0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6
2762 17:55:57.835156 0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0
2763 17:55:57.841864 MTRR: Fixed MSR 0x250 0x0606060606060606
2764 17:55:57.845321 MTRR: Fixed MSR 0x258 0x0606060606060606
2765 17:55:57.848581 MTRR: Fixed MSR 0x259 0x0000000000000000
2766 17:55:57.851715 MTRR: Fixed MSR 0x268 0x0606060606060606
2767 17:55:57.858346 MTRR: Fixed MSR 0x269 0x0606060606060606
2768 17:55:57.861766 MTRR: Fixed MSR 0x26a 0x0606060606060606
2769 17:55:57.865027 MTRR: Fixed MSR 0x26b 0x0606060606060606
2770 17:55:57.868646 MTRR: Fixed MSR 0x26c 0x0606060606060606
2771 17:55:57.875118 MTRR: Fixed MSR 0x26d 0x0606060606060606
2772 17:55:57.878381 MTRR: Fixed MSR 0x26e 0x0606060606060606
2773 17:55:57.881580 MTRR: Fixed MSR 0x26f 0x0606060606060606
2774 17:55:57.885193 call enable_fixed_mtrr()
2775 17:55:57.888354 CPU physical address size: 39 bits
2776 17:55:57.891798 MTRR: default type WB/UC MTRR counts: 13/6.
2777 17:55:57.894921 MTRR: UC selected as default type.
2778 17:55:57.901598 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2779 17:55:57.908327 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2780 17:55:57.914855 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2781 17:55:57.921750 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2782 17:55:57.928257 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6
2783 17:55:57.931471 MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0
2784 17:55:57.938176 MTRR: Fixed MSR 0x250 0x0606060606060606
2785 17:55:57.941599 MTRR: Fixed MSR 0x258 0x0606060606060606
2786 17:55:57.945177 MTRR: Fixed MSR 0x259 0x0000000000000000
2787 17:55:57.948091 MTRR: Fixed MSR 0x268 0x0606060606060606
2788 17:55:57.954885 MTRR: Fixed MSR 0x269 0x0606060606060606
2789 17:55:57.958037 MTRR: Fixed MSR 0x26a 0x0606060606060606
2790 17:55:57.961543 MTRR: Fixed MSR 0x26b 0x0606060606060606
2791 17:55:57.964830 MTRR: Fixed MSR 0x26c 0x0606060606060606
2792 17:55:57.971967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2793 17:55:57.974739 MTRR: Fixed MSR 0x26e 0x0606060606060606
2794 17:55:57.978228 MTRR: Fixed MSR 0x26f 0x0606060606060606
2795 17:55:57.981551 MTRR: Fixed MSR 0x250 0x0606060606060606
2796 17:55:57.988102 MTRR: Fixed MSR 0x258 0x0606060606060606
2797 17:55:57.991368 MTRR: Fixed MSR 0x259 0x0000000000000000
2798 17:55:57.994717 MTRR: Fixed MSR 0x268 0x0606060606060606
2799 17:55:57.998081 MTRR: Fixed MSR 0x269 0x0606060606060606
2800 17:55:58.001328 MTRR: Fixed MSR 0x26a 0x0606060606060606
2801 17:55:58.008027 MTRR: Fixed MSR 0x26b 0x0606060606060606
2802 17:55:58.011380 MTRR: Fixed MSR 0x26c 0x0606060606060606
2803 17:55:58.014548 MTRR: Fixed MSR 0x26d 0x0606060606060606
2804 17:55:58.018114 MTRR: Fixed MSR 0x26e 0x0606060606060606
2805 17:55:58.024682 MTRR: Fixed MSR 0x26f 0x0606060606060606
2806 17:55:58.027946 MTRR: Fixed MSR 0x250 0x0606060606060606
2807 17:55:58.031432 MTRR: Fixed MSR 0x258 0x0606060606060606
2808 17:55:58.034549 MTRR: Fixed MSR 0x259 0x0000000000000000
2809 17:55:58.041136 MTRR: Fixed MSR 0x268 0x0606060606060606
2810 17:55:58.044725 MTRR: Fixed MSR 0x269 0x0606060606060606
2811 17:55:58.047725 MTRR: Fixed MSR 0x26a 0x0606060606060606
2812 17:55:58.051199 MTRR: Fixed MSR 0x26b 0x0606060606060606
2813 17:55:58.054704 MTRR: Fixed MSR 0x26c 0x0606060606060606
2814 17:55:58.061114 MTRR: Fixed MSR 0x26d 0x0606060606060606
2815 17:55:58.064415 MTRR: Fixed MSR 0x26e 0x0606060606060606
2816 17:55:58.068073 MTRR: Fixed MSR 0x26f 0x0606060606060606
2817 17:55:58.071250 call enable_fixed_mtrr()
2818 17:55:58.074411 call enable_fixed_mtrr()
2819 17:55:58.077823 CPU physical address size: 39 bits
2820 17:55:58.081282 CPU physical address size: 39 bits
2821 17:55:58.084569 MTRR: Fixed MSR 0x250 0x0606060606060606
2822 17:55:58.087795 MTRR: Fixed MSR 0x258 0x0606060606060606
2823 17:55:58.094399 MTRR: Fixed MSR 0x259 0x0000000000000000
2824 17:55:58.097726 MTRR: Fixed MSR 0x268 0x0606060606060606
2825 17:55:58.100939 MTRR: Fixed MSR 0x269 0x0606060606060606
2826 17:55:58.104387 MTRR: Fixed MSR 0x26a 0x0606060606060606
2827 17:55:58.107541 MTRR: Fixed MSR 0x26b 0x0606060606060606
2828 17:55:58.114368 MTRR: Fixed MSR 0x26c 0x0606060606060606
2829 17:55:58.117523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2830 17:55:58.121175 MTRR: Fixed MSR 0x26e 0x0606060606060606
2831 17:55:58.124345 MTRR: Fixed MSR 0x26f 0x0606060606060606
2832 17:55:58.127544 call enable_fixed_mtrr()
2833 17:55:58.131003 call enable_fixed_mtrr()
2834 17:55:58.134514 CPU physical address size: 39 bits
2835 17:55:58.137548 CPU physical address size: 39 bits
2836 17:55:58.137624
2837 17:55:58.137678 MTRR check
2838 17:55:58.140886 Fixed MTRRs : Enabled
2839 17:55:58.144526 Variable MTRRs: Enabled
2840 17:55:58.144604
2841 17:55:58.150828 BS: BS_WRITE_TABLES exit times (exec / console): 141 / 156 ms
2842 17:55:58.154223 Checking cr50 for pending updates
2843 17:55:58.165086 Reading cr50 TPM mode
2844 17:55:58.180064 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2845 17:55:58.190086 CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434
2846 17:55:58.193372 Checking segment from ROM address 0xff1f03ac
2847 17:55:58.196740 Checking segment from ROM address 0xff1f03c8
2848 17:55:58.203274 Loading segment from ROM address 0xff1f03ac
2849 17:55:58.203351 code (compression=1)
2850 17:55:58.213441 New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226
2851 17:55:58.220028 Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226
2852 17:55:58.223525 using LZMA
2853 17:55:58.267616 [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4
2854 17:55:58.274198 Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88
2855 17:55:58.285617 Loading segment from ROM address 0xff1f03c8
2856 17:55:58.288726 Entry Point 0x30000000
2857 17:55:58.288804 Loaded segments
2858 17:55:58.295330 BS: BS_PAYLOAD_LOAD run times (exec / console): 46 / 62 ms
2859 17:55:58.298707 coreboot skipped calling FSP notify phase: 00000040.
2860 17:55:58.305332 coreboot skipped calling FSP notify phase: 000000f0.
2861 17:55:58.311981 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2862 17:55:58.312060 Finalizing chipset.
2863 17:55:58.315342 apm_control: Finalizing SMM.
2864 17:55:58.318627 APMC done.
2865 17:55:58.322058 CSE: EOP requested action: continue boot
2866 17:55:58.325400 HECI: CSE device 16.1 is disabled
2867 17:55:58.328762 HECI: CSE device 16.2 is disabled
2868 17:55:58.331991 HECI: CSE device 16.3 is disabled
2869 17:55:58.335180 HECI: CSE device 16.4 is disabled
2870 17:55:58.338608 HECI: CSE device 16.5 is disabled
2871 17:55:58.345384 BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 27 ms
2872 17:55:58.348889 mp_park_aps done after 0 msecs.
2873 17:55:58.352038 Jumping to boot code at 0x30000000(0x76890000)
2874 17:55:58.362303 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2875 17:55:58.367049
2876 17:55:58.367127
2877 17:55:58.367181
2878 17:55:58.370504 Starting depthcharge on Moli...
2879 17:55:58.370581
2880 17:55:58.370928 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
2881 17:55:58.371015 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2882 17:55:58.371081 Setting prompt string to ['brask:']
2883 17:55:58.371143 bootloader-commands: Wait for prompt ['brask:'] (timeout 00:04:40)
2884 17:55:58.377267 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2885 17:55:58.377349
2886 17:55:58.383971 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2887 17:55:58.384051
2888 17:55:58.390524 Looking for NVMe Controller 0x30062398 @ 00:06:00
2889 17:55:58.390602
2890 17:55:58.393850 Looking for NVMe Controller 0x30062440 @ 00:1d:00
2891 17:55:58.393928
2892 17:55:58.397229 Wipe memory regions:
2893 17:55:58.397306
2894 17:55:58.400639 [0x00000000001000, 0x000000000a0000)
2895 17:55:58.400718
2896 17:55:58.403699 [0x00000000100000, 0x00000030000000)
2897 17:55:58.771985
2898 17:55:58.775183 [0x00000032665e30, 0x00000076856000)
2899 17:55:59.296265
2900 17:55:59.299421 [0x00000100000000, 0x0000017fc00000)
2901 17:56:00.277712
2902 17:56:00.281022 ec_init: CrosEC protocol v3 supported (256, 256)
2903 17:56:00.714021
2904 17:56:00.714170 R8152: Initializing
2905 17:56:00.714250
2906 17:56:00.717306 Version 6 (ocp_data = 5c30)
2907 17:56:00.717384
2908 17:56:00.720586 R8152: Done initializing
2909 17:56:00.720664
2910 17:56:00.723819 Adding net device
2911 17:56:01.025024
2912 17:56:01.027882 [firmware-brya-14505.B-collabora] Sep 8 2023 15:56:17
2913 17:56:01.027971
2914 17:56:01.028032
2915 17:56:01.028098
2916 17:56:01.028350 Setting prompt string to ['brask:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2918 17:56:01.128685 brask: tftpboot 192.168.201.1 13097534/tftp-deploy-zum_h90h/kernel/bzImage 13097534/tftp-deploy-zum_h90h/kernel/cmdline 13097534/tftp-deploy-zum_h90h/ramdisk/ramdisk.cpio.gz
2919 17:56:01.128813 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2920 17:56:01.128904 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2921 17:56:01.133358 tftpboot 192.168.201.1 13097534/tftp-deploy-zum_h90h/kernel/bzIploy-zum_h90h/kernel/cmdline 13097534/tftp-deploy-zum_h90h/ramdisk/ramdisk.cpio.gz
2922 17:56:01.133441
2923 17:56:01.133496 Waiting for link
2924 17:56:01.335385
2925 17:56:01.335532 done.
2926 17:56:01.335589
2927 17:56:01.335636 MAC: 00:13:3b:00:10:33
2928 17:56:01.335682
2929 17:56:01.338682 Sending DHCP discover... done.
2930 17:56:01.338764
2931 17:56:01.342173 Waiting for reply... done.
2932 17:56:01.342249
2933 17:56:01.345509 Sending DHCP request... done.
2934 17:56:01.345585
2935 17:56:01.352052 Waiting for reply... done.
2936 17:56:01.352130
2937 17:56:01.352185 My ip is 192.168.201.125
2938 17:56:01.352233
2939 17:56:01.355276 The DHCP server ip is 192.168.201.1
2940 17:56:01.355355
2941 17:56:01.362006 TFTP server IP predefined by user: 192.168.201.1
2942 17:56:01.362085
2943 17:56:01.368557 Bootfile predefined by user: 13097534/tftp-deploy-zum_h90h/kernel/bzImage
2944 17:56:01.368635
2945 17:56:01.371820 Sending tftp read request... done.
2946 17:56:01.371898
2947 17:56:01.375100 Waiting for the transfer...
2948 17:56:01.375180
2949 17:56:01.846693 00000000 ################################################################
2950 17:56:01.846836
2951 17:56:02.309846 00080000 ################################################################
2952 17:56:02.309992
2953 17:56:02.769071 00100000 ################################################################
2954 17:56:02.769219
2955 17:56:03.230897 00180000 ################################################################
2956 17:56:03.231039
2957 17:56:03.698803 00200000 ################################################################
2958 17:56:03.698948
2959 17:56:04.160631 00280000 ################################################################
2960 17:56:04.160779
2961 17:56:04.625336 00300000 ################################################################
2962 17:56:04.625467
2963 17:56:05.088419 00380000 ################################################################
2964 17:56:05.088561
2965 17:56:05.552282 00400000 ################################################################
2966 17:56:05.552436
2967 17:56:06.015028 00480000 ################################################################
2968 17:56:06.015174
2969 17:56:06.478613 00500000 ################################################################
2970 17:56:06.478759
2971 17:56:06.947103 00580000 ################################################################
2972 17:56:06.947264
2973 17:56:07.420330 00600000 ################################################################
2974 17:56:07.420486
2975 17:56:07.879850 00680000 ################################################################
2976 17:56:07.880022
2977 17:56:08.348761 00700000 ################################################################
2978 17:56:08.348906
2979 17:56:08.829045 00780000 ################################################################
2980 17:56:08.829192
2981 17:56:09.292552 00800000 ################################################################
2982 17:56:09.292720
2983 17:56:09.753338 00880000 ################################################################
2984 17:56:09.753495
2985 17:56:10.216837 00900000 ################################################################
2986 17:56:10.216995
2987 17:56:10.680760 00980000 ################################################################
2988 17:56:10.680910
2989 17:56:11.168112 00a00000 ################################################################
2990 17:56:11.168254
2991 17:56:11.654450 00a80000 ################################################################
2992 17:56:11.654615
2993 17:56:12.148306 00b00000 ################################################################
2994 17:56:12.148447
2995 17:56:12.627781 00b80000 ################################################################
2996 17:56:12.627936
2997 17:56:13.112081 00c00000 ################################################################
2998 17:56:13.112221
2999 17:56:13.598816 00c80000 ################################################################
3000 17:56:13.598959
3001 17:56:14.084284 00d00000 ################################################################
3002 17:56:14.084422
3003 17:56:14.560610 00d80000 ################################################################
3004 17:56:14.560748
3005 17:56:15.025904 00e00000 ################################################################
3006 17:56:15.026036
3007 17:56:15.492263 00e80000 ################################################################
3008 17:56:15.492408
3009 17:56:15.953976 00f00000 ################################################################
3010 17:56:15.954122
3011 17:56:16.423415 00f80000 ################################################################
3012 17:56:16.423563
3013 17:56:16.900831 01000000 ################################################################
3014 17:56:16.900963
3015 17:56:17.370795 01080000 ################################################################
3016 17:56:17.370944
3017 17:56:17.818893 01100000 ################################################################
3018 17:56:17.819089
3019 17:56:18.267404 01180000 ################################################################
3020 17:56:18.267601
3021 17:56:18.715568 01200000 ################################################################
3022 17:56:18.715723
3023 17:56:18.904913 01280000 ############################ done.
3024 17:56:18.905071
3025 17:56:18.908271 The bootfile was 19621344 bytes long.
3026 17:56:18.908344
3027 17:56:18.911676 Sending tftp read request... done.
3028 17:56:18.911744
3029 17:56:18.914820 Waiting for the transfer...
3030 17:56:18.914881
3031 17:56:19.368290 00000000 ################################################################
3032 17:56:19.368448
3033 17:56:19.817376 00080000 ################################################################
3034 17:56:19.817533
3035 17:56:20.267550 00100000 ################################################################
3036 17:56:20.267745
3037 17:56:20.717277 00180000 ################################################################
3038 17:56:20.717469
3039 17:56:21.168109 00200000 ################################################################
3040 17:56:21.168245
3041 17:56:21.645713 00280000 ################################################################
3042 17:56:21.645865
3043 17:56:22.113425 00300000 ################################################################
3044 17:56:22.113568
3045 17:56:22.581552 00380000 ################################################################
3046 17:56:22.581708
3047 17:56:23.038589 00400000 ################################################################
3048 17:56:23.038752
3049 17:56:23.501303 00480000 ################################################################
3050 17:56:23.501449
3051 17:56:23.968067 00500000 ################################################################
3052 17:56:23.968233
3053 17:56:24.436173 00580000 ################################################################
3054 17:56:24.436329
3055 17:56:24.893962 00600000 ################################################################
3056 17:56:24.894110
3057 17:56:25.355666 00680000 ################################################################
3058 17:56:25.355823
3059 17:56:25.830726 00700000 ################################################################
3060 17:56:25.830872
3061 17:56:26.306997 00780000 ################################################################
3062 17:56:26.307137
3063 17:56:26.824634 00800000 ################################################################
3064 17:56:26.824764
3065 17:56:27.312519 00880000 ################################################################
3066 17:56:27.312661
3067 17:56:27.776272 00900000 ################################################################
3068 17:56:27.776424
3069 17:56:27.970124 00980000 ############################ done.
3070 17:56:27.970276
3071 17:56:27.973590 Sending tftp read request... done.
3072 17:56:27.973695
3073 17:56:27.977080 Waiting for the transfer...
3074 17:56:27.977163
3075 17:56:27.977217 00000000 # done.
3076 17:56:27.977269
3077 17:56:27.986904 Command line loaded dynamically from TFTP file: 13097534/tftp-deploy-zum_h90h/kernel/cmdline
3078 17:56:27.987010
3079 17:56:28.003642 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
3080 17:56:28.011756
3081 17:56:28.015272 Shutting down all USB controllers.
3082 17:56:28.015355
3083 17:56:28.015409 Removing current net device
3084 17:56:28.015458
3085 17:56:28.018440 Finalizing coreboot
3086 17:56:28.018518
3087 17:56:28.025212 Exiting depthcharge with code 4 at timestamp: 41347239
3088 17:56:28.025290
3089 17:56:28.025343
3090 17:56:28.025391 Starting kernel ...
3091 17:56:28.025437
3092 17:56:28.025482
3093 17:56:28.025839 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
3094 17:56:28.025918 start: 2.2.5 auto-login-action (timeout 00:04:10) [common]
3095 17:56:28.025977 Setting prompt string to ['Linux version [0-9]']
3096 17:56:28.026030 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
3097 17:56:28.026085 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
3099 18:00:38.026234 end: 2.2.5 auto-login-action (duration 00:04:10) [common]
3101 18:00:38.026407 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 250 seconds'
3103 18:00:38.026544 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
3106 18:00:38.026757 end: 2 depthcharge-action (duration 00:05:00) [common]
3108 18:00:38.026947 Cleaning after the job
3109 18:00:38.027023 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/ramdisk
3110 18:00:38.028067 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/kernel
3111 18:00:38.029923 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097534/tftp-deploy-zum_h90h/modules
3112 18:00:38.030721 start: 5.1 power-off (timeout 00:00:30) [common]
3113 18:00:38.030852 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-10' '--port=1' '--command=off'
3114 18:00:38.107190 >> Command sent successfully.
3115 18:00:38.115255 Returned 0 in 0 seconds
3116 18:00:38.216356 end: 5.1 power-off (duration 00:00:00) [common]
3118 18:00:38.217499 start: 5.2 read-feedback (timeout 00:10:00) [common]
3119 18:00:38.218307 Listened to connection for namespace 'common' for up to 1s
3120 18:00:39.219077 Finalising connection for namespace 'common'
3121 18:00:39.219238 Disconnecting from shell: Finalise
3122 18:00:39.219359
3123 18:00:39.319936 end: 5.2 read-feedback (duration 00:00:01) [common]
3124 18:00:39.320424 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13097534
3125 18:00:39.335653 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13097534
3126 18:00:39.335802 JobError: Your job cannot terminate cleanly.