Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 17:48:51.172265 lava-dispatcher, installed at version: 2024.01
2 17:48:51.172494 start: 0 validate
3 17:48:51.172631 Start time: 2024-03-19 17:48:51.172623+00:00 (UTC)
4 17:48:51.172761 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:48:51.172897 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 17:48:51.426732 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:48:51.426906 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.212-cip45-3-g37b1c10dc5722%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:48:51.686851 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:48:51.687528 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:49:17.719636 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:49:17.720370 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.212-cip45-3-g37b1c10dc5722%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 17:49:17.997287 validate duration: 26.82
14 17:49:17.998598 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:49:17.999148 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:49:17.999632 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:49:18.000255 Not decompressing ramdisk as can be used compressed.
18 17:49:18.000730 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 17:49:18.001215 saving as /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/ramdisk/initrd.cpio.gz
20 17:49:18.001672 total size: 6137763 (5 MB)
21 17:49:19.258228 progress 0 % (0 MB)
22 17:49:19.263398 progress 5 % (0 MB)
23 17:49:19.265049 progress 10 % (0 MB)
24 17:49:19.266918 progress 15 % (0 MB)
25 17:49:19.268552 progress 20 % (1 MB)
26 17:49:19.270206 progress 25 % (1 MB)
27 17:49:19.271968 progress 30 % (1 MB)
28 17:49:19.273654 progress 35 % (2 MB)
29 17:49:19.275257 progress 40 % (2 MB)
30 17:49:19.277012 progress 45 % (2 MB)
31 17:49:19.278588 progress 50 % (2 MB)
32 17:49:19.280312 progress 55 % (3 MB)
33 17:49:19.281880 progress 60 % (3 MB)
34 17:49:19.283451 progress 65 % (3 MB)
35 17:49:19.285183 progress 70 % (4 MB)
36 17:49:19.286746 progress 75 % (4 MB)
37 17:49:19.288301 progress 80 % (4 MB)
38 17:49:19.290035 progress 85 % (5 MB)
39 17:49:19.291598 progress 90 % (5 MB)
40 17:49:19.293163 progress 95 % (5 MB)
41 17:49:19.294908 progress 100 % (5 MB)
42 17:49:19.295061 5 MB downloaded in 1.29 s (4.53 MB/s)
43 17:49:19.295217 end: 1.1.1 http-download (duration 00:00:01) [common]
45 17:49:19.295463 end: 1.1 download-retry (duration 00:00:01) [common]
46 17:49:19.295550 start: 1.2 download-retry (timeout 00:09:59) [common]
47 17:49:19.295636 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 17:49:19.295772 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.212-cip45-3-g37b1c10dc5722/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 17:49:19.295843 saving as /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/kernel/bzImage
50 17:49:19.295905 total size: 19621344 (18 MB)
51 17:49:19.295967 No compression specified
52 17:49:19.297082 progress 0 % (0 MB)
53 17:49:19.302092 progress 5 % (0 MB)
54 17:49:19.307356 progress 10 % (1 MB)
55 17:49:19.312527 progress 15 % (2 MB)
56 17:49:19.317697 progress 20 % (3 MB)
57 17:49:19.322846 progress 25 % (4 MB)
58 17:49:19.328080 progress 30 % (5 MB)
59 17:49:19.333251 progress 35 % (6 MB)
60 17:49:19.338527 progress 40 % (7 MB)
61 17:49:19.343722 progress 45 % (8 MB)
62 17:49:19.348977 progress 50 % (9 MB)
63 17:49:19.354193 progress 55 % (10 MB)
64 17:49:19.359373 progress 60 % (11 MB)
65 17:49:19.364552 progress 65 % (12 MB)
66 17:49:19.369719 progress 70 % (13 MB)
67 17:49:19.374866 progress 75 % (14 MB)
68 17:49:19.380051 progress 80 % (15 MB)
69 17:49:19.384935 progress 85 % (15 MB)
70 17:49:19.390081 progress 90 % (16 MB)
71 17:49:19.395125 progress 95 % (17 MB)
72 17:49:19.400167 progress 100 % (18 MB)
73 17:49:19.400394 18 MB downloaded in 0.10 s (179.09 MB/s)
74 17:49:19.400543 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:49:19.400790 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:49:19.400878 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:49:19.400962 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:49:19.401145 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 17:49:19.401215 saving as /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/nfsrootfs/full.rootfs.tar
81 17:49:19.401289 total size: 58462052 (55 MB)
82 17:49:19.401372 Using unxz to decompress xz
83 17:49:19.405797 progress 0 % (0 MB)
84 17:49:19.563017 progress 5 % (2 MB)
85 17:49:19.730947 progress 10 % (5 MB)
86 17:49:19.895249 progress 15 % (8 MB)
87 17:49:20.034763 progress 20 % (11 MB)
88 17:49:20.196042 progress 25 % (13 MB)
89 17:49:20.371472 progress 30 % (16 MB)
90 17:49:20.497055 progress 35 % (19 MB)
91 17:49:20.565867 progress 40 % (22 MB)
92 17:49:20.723454 progress 45 % (25 MB)
93 17:49:20.892554 progress 50 % (27 MB)
94 17:49:21.045310 progress 55 % (30 MB)
95 17:49:21.204902 progress 60 % (33 MB)
96 17:49:21.368081 progress 65 % (36 MB)
97 17:49:21.524382 progress 70 % (39 MB)
98 17:49:21.703897 progress 75 % (41 MB)
99 17:49:21.856732 progress 80 % (44 MB)
100 17:49:22.005737 progress 85 % (47 MB)
101 17:49:22.180132 progress 90 % (50 MB)
102 17:49:22.353717 progress 95 % (52 MB)
103 17:49:22.528860 progress 100 % (55 MB)
104 17:49:22.533780 55 MB downloaded in 3.13 s (17.80 MB/s)
105 17:49:22.534034 end: 1.3.1 http-download (duration 00:00:03) [common]
107 17:49:22.534305 end: 1.3 download-retry (duration 00:00:03) [common]
108 17:49:22.534395 start: 1.4 download-retry (timeout 00:09:55) [common]
109 17:49:22.534483 start: 1.4.1 http-download (timeout 00:09:55) [common]
110 17:49:22.534638 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.212-cip45-3-g37b1c10dc5722/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 17:49:22.534712 saving as /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/modules/modules.tar
112 17:49:22.534775 total size: 1157932 (1 MB)
113 17:49:22.534840 Using unxz to decompress xz
114 17:49:22.539324 progress 2 % (0 MB)
115 17:49:22.539900 progress 8 % (0 MB)
116 17:49:22.543430 progress 14 % (0 MB)
117 17:49:22.547417 progress 19 % (0 MB)
118 17:49:22.551200 progress 25 % (0 MB)
119 17:49:22.555086 progress 31 % (0 MB)
120 17:49:22.559179 progress 36 % (0 MB)
121 17:49:22.562475 progress 42 % (0 MB)
122 17:49:22.567085 progress 48 % (0 MB)
123 17:49:22.570968 progress 53 % (0 MB)
124 17:49:22.575145 progress 59 % (0 MB)
125 17:49:22.578950 progress 65 % (0 MB)
126 17:49:22.582530 progress 70 % (0 MB)
127 17:49:22.587274 progress 76 % (0 MB)
128 17:49:22.591333 progress 82 % (0 MB)
129 17:49:22.595360 progress 87 % (0 MB)
130 17:49:22.599497 progress 93 % (1 MB)
131 17:49:22.603288 progress 99 % (1 MB)
132 17:49:22.611255 1 MB downloaded in 0.08 s (14.44 MB/s)
133 17:49:22.611501 end: 1.4.1 http-download (duration 00:00:00) [common]
135 17:49:22.611770 end: 1.4 download-retry (duration 00:00:00) [common]
136 17:49:22.611864 start: 1.5 prepare-tftp-overlay (timeout 00:09:55) [common]
137 17:49:22.611962 start: 1.5.1 extract-nfsrootfs (timeout 00:09:55) [common]
138 17:49:23.893828 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13097486/extract-nfsrootfs-bxwkhw2h
139 17:49:23.894030 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
140 17:49:23.894132 start: 1.5.2 lava-overlay (timeout 00:09:54) [common]
141 17:49:23.894304 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e
142 17:49:23.894437 makedir: /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin
143 17:49:23.894540 makedir: /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/tests
144 17:49:23.894640 makedir: /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/results
145 17:49:23.894741 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-add-keys
146 17:49:23.894885 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-add-sources
147 17:49:23.895015 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-background-process-start
148 17:49:23.895144 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-background-process-stop
149 17:49:23.895272 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-common-functions
150 17:49:23.895400 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-echo-ipv4
151 17:49:23.895526 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-install-packages
152 17:49:23.895652 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-installed-packages
153 17:49:23.895777 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-os-build
154 17:49:23.895902 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-probe-channel
155 17:49:23.896026 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-probe-ip
156 17:49:23.896150 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-target-ip
157 17:49:23.896277 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-target-mac
158 17:49:23.896401 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-target-storage
159 17:49:23.896544 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-case
160 17:49:23.896759 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-event
161 17:49:23.896882 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-feedback
162 17:49:23.897136 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-raise
163 17:49:23.897265 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-reference
164 17:49:23.897393 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-runner
165 17:49:23.897520 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-set
166 17:49:23.897645 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-test-shell
167 17:49:23.897771 Updating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-install-packages (oe)
168 17:49:23.897926 Updating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/bin/lava-installed-packages (oe)
169 17:49:23.898050 Creating /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/environment
170 17:49:23.898147 LAVA metadata
171 17:49:23.898219 - LAVA_JOB_ID=13097486
172 17:49:23.898284 - LAVA_DISPATCHER_IP=192.168.201.1
173 17:49:23.898387 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:54) [common]
174 17:49:23.898455 skipped lava-vland-overlay
175 17:49:23.898531 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 17:49:23.898612 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:54) [common]
177 17:49:23.898675 skipped lava-multinode-overlay
178 17:49:23.898747 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 17:49:23.898825 start: 1.5.2.3 test-definition (timeout 00:09:54) [common]
180 17:49:23.898897 Loading test definitions
181 17:49:23.898983 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:54) [common]
182 17:49:23.899055 Using /lava-13097486 at stage 0
183 17:49:23.899366 uuid=13097486_1.5.2.3.1 testdef=None
184 17:49:23.899455 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 17:49:23.899540 start: 1.5.2.3.2 test-overlay (timeout 00:09:54) [common]
186 17:49:23.900029 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 17:49:23.900248 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:54) [common]
189 17:49:23.900857 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 17:49:23.901125 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:54) [common]
192 17:49:23.901715 runner path: /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/0/tests/0_wifi-basic test_uuid 13097486_1.5.2.3.1
193 17:49:23.901871 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 17:49:23.902073 Creating lava-test-runner.conf files
196 17:49:23.902136 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13097486/lava-overlay-efe8165e/lava-13097486/0 for stage 0
197 17:49:23.902227 - 0_wifi-basic
198 17:49:23.902326 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 17:49:23.902413 start: 1.5.2.4 compress-overlay (timeout 00:09:54) [common]
200 17:49:23.908236 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 17:49:23.908341 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:54) [common]
202 17:49:23.908427 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 17:49:23.908511 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 17:49:23.908595 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:54) [common]
205 17:49:24.068337 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 17:49:24.068730 start: 1.5.4 extract-modules (timeout 00:09:54) [common]
207 17:49:24.068849 extracting modules file /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13097486/extract-nfsrootfs-bxwkhw2h
208 17:49:24.099244 extracting modules file /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13097486/extract-overlay-ramdisk-c7gi_uf7/ramdisk
209 17:49:24.129969 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 17:49:24.130132 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
211 17:49:24.130224 [common] Applying overlay to NFS
212 17:49:24.130294 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13097486/compress-overlay-1ugkyhqh/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13097486/extract-nfsrootfs-bxwkhw2h
213 17:49:24.136726 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 17:49:24.136839 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
215 17:49:24.136929 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 17:49:24.137062 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
217 17:49:24.137139 Building ramdisk /var/lib/lava/dispatcher/tmp/13097486/extract-overlay-ramdisk-c7gi_uf7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13097486/extract-overlay-ramdisk-c7gi_uf7/ramdisk
218 17:49:24.255375 >> 42071 blocks
219 17:49:25.048068 rename /var/lib/lava/dispatcher/tmp/13097486/extract-overlay-ramdisk-c7gi_uf7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/ramdisk/ramdisk.cpio.gz
220 17:49:25.048518 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 17:49:25.048639 start: 1.5.8 prepare-kernel (timeout 00:09:53) [common]
222 17:49:25.048747 start: 1.5.8.1 prepare-fit (timeout 00:09:53) [common]
223 17:49:25.048845 No mkimage arch provided, not using FIT.
224 17:49:25.048933 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 17:49:25.049066 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 17:49:25.049169 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 17:49:25.049257 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:53) [common]
228 17:49:25.049339 No LXC device requested
229 17:49:25.049418 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 17:49:25.049502 start: 1.7 deploy-device-env (timeout 00:09:53) [common]
231 17:49:25.049584 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 17:49:25.049658 Checking files for TFTP limit of 4294967296 bytes.
233 17:49:25.050061 end: 1 tftp-deploy (duration 00:00:07) [common]
234 17:49:25.050164 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 17:49:25.050258 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 17:49:25.050385 substitutions:
237 17:49:25.050455 - {DTB}: None
238 17:49:25.050519 - {INITRD}: 13097486/tftp-deploy-94qffosr/ramdisk/ramdisk.cpio.gz
239 17:49:25.050578 - {KERNEL}: 13097486/tftp-deploy-94qffosr/kernel/bzImage
240 17:49:25.050636 - {LAVA_MAC}: None
241 17:49:25.050693 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13097486/extract-nfsrootfs-bxwkhw2h
242 17:49:25.050749 - {NFS_SERVER_IP}: 192.168.201.1
243 17:49:25.050805 - {PRESEED_CONFIG}: None
244 17:49:25.050860 - {PRESEED_LOCAL}: None
245 17:49:25.050915 - {RAMDISK}: 13097486/tftp-deploy-94qffosr/ramdisk/ramdisk.cpio.gz
246 17:49:25.050970 - {ROOT_PART}: None
247 17:49:25.051025 - {ROOT}: None
248 17:49:25.051079 - {SERVER_IP}: 192.168.201.1
249 17:49:25.051133 - {TEE}: None
250 17:49:25.051187 Parsed boot commands:
251 17:49:25.051242 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 17:49:25.051422 Parsed boot commands: tftpboot 192.168.201.1 13097486/tftp-deploy-94qffosr/kernel/bzImage 13097486/tftp-deploy-94qffosr/kernel/cmdline 13097486/tftp-deploy-94qffosr/ramdisk/ramdisk.cpio.gz
253 17:49:25.051512 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 17:49:25.051596 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 17:49:25.051690 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 17:49:25.051779 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 17:49:25.051852 Not connected, no need to disconnect.
258 17:49:25.051925 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 17:49:25.052022 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 17:49:25.052105 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
261 17:49:25.056390 Setting prompt string to ['lava-test: # ']
262 17:49:25.056739 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 17:49:25.056845 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 17:49:25.056938 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 17:49:25.057069 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 17:49:25.057266 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
267 17:49:30.200920 >> Command sent successfully.
268 17:49:30.211442 Returned 0 in 5 seconds
269 17:49:30.312725 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
271 17:49:30.314242 end: 2.2.2 reset-device (duration 00:00:05) [common]
272 17:49:30.314759 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
273 17:49:30.315218 Setting prompt string to 'Starting depthcharge on Volmar...'
274 17:49:30.315576 Changing prompt to 'Starting depthcharge on Volmar...'
275 17:49:30.315926 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
276 17:49:30.317145 [Enter `^Ec?' for help]
277 17:49:32.084761
278 17:49:32.085388
279 17:49:32.091355 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
280 17:49:32.095145 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
281 17:49:32.101880 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
282 17:49:32.105082 CPU: AES supported, TXT NOT supported, VT supported
283 17:49:32.113224 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
284 17:49:32.116368 Cache size = 10 MiB
285 17:49:32.120050 MCH: device id 4609 (rev 04) is Alderlake-P
286 17:49:32.127265 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
287 17:49:32.131077 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
288 17:49:32.134539 VBOOT: Loading verstage.
289 17:49:32.137230 FMAP: Found "FLASH" version 1.1 at 0x1804000.
290 17:49:32.141032 FMAP: base = 0x0 size = 0x2000000 #areas = 37
291 17:49:32.147548 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
292 17:49:32.154202 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
293 17:49:32.164003 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
294 17:49:32.164442
295 17:49:32.164784
296 17:49:32.173966 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
297 17:49:32.177260 Probing TPM I2C: I2C bus 1 version 0x3230302a
298 17:49:32.184140 DW I2C bus 1 at 0xfe022000 (400 KHz)
299 17:49:32.187160 I2C TX abort detected (00000001)
300 17:49:32.190423 cr50_i2c_read: Address write failed
301 17:49:32.201345 .done! DID_VID 0x00281ae0
302 17:49:32.205061 TPM ready after 0 ms
303 17:49:32.208203 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
304 17:49:32.221611 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
305 17:49:32.228318 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 17:49:32.276398 tlcl_send_startup: Startup return code is 0
307 17:49:32.277136 TPM: setup succeeded
308 17:49:32.296280 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 17:49:32.318173 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 17:49:32.322168 Chrome EC: UHEPI supported
311 17:49:32.325598 Reading cr50 boot mode
312 17:49:32.340174 Cr50 says boot_mode is VERIFIED_RW(0x00).
313 17:49:32.340728 Phase 1
314 17:49:32.346555 FMAP: area GBB found @ 1805000 (458752 bytes)
315 17:49:32.353175 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 17:49:32.361691 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 17:49:32.368171 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
318 17:49:32.368696 Phase 2
319 17:49:32.369079 Phase 3
320 17:49:32.374735 FMAP: area GBB found @ 1805000 (458752 bytes)
321 17:49:32.378060 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
322 17:49:32.384519 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
323 17:49:32.391247 VB2:vb2_verify_keyblock() Checking keyblock signature...
324 17:49:32.397931 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
325 17:49:32.404210 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
326 17:49:32.411067 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
327 17:49:32.424908 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 17:49:32.428232 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 17:49:32.435068 VB2:vb2_verify_fw_preamble() Verifying preamble.
330 17:49:32.441568 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
331 17:49:32.448471 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
332 17:49:32.455554 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
333 17:49:32.459007 Phase 4
334 17:49:32.462968 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 17:49:32.469083 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
336 17:49:32.681321 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
337 17:49:32.688170 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
338 17:49:32.691011 Saving vboot hash.
339 17:49:32.697934 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
340 17:49:32.713528 tlcl_extend: response is 0
341 17:49:32.720240 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
342 17:49:32.727118 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
343 17:49:32.743012 tlcl_extend: response is 0
344 17:49:32.749671 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
345 17:49:32.769784 tlcl_lock_nv_write: response is 0
346 17:49:32.788822 tlcl_lock_nv_write: response is 0
347 17:49:32.788981 Slot A is selected
348 17:49:32.795088 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
349 17:49:32.801780 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
350 17:49:32.808542 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
351 17:49:32.815172 BS: verstage times (exec / console): total (unknown) / 264 ms
352 17:49:32.815409
353 17:49:32.815642
354 17:49:32.821944 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
355 17:49:32.826003 Google Chrome EC: version:
356 17:49:32.828855 ro: volmar_v2.0.14126-e605144e9c
357 17:49:32.832429 rw: volmar_v0.0.55-22d1557
358 17:49:32.835612 running image: 2
359 17:49:32.839183 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
360 17:49:32.848622 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 17:49:32.855902 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 17:49:32.862205 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
363 17:49:32.872145 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
364 17:49:32.882446 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
365 17:49:32.885492 EC took 941us to calculate image hash
366 17:49:32.895309 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
367 17:49:32.901815 VB2:sync_ec() select_rw=RW(active)
368 17:49:32.910591 Waited 274us to clear limit power flag.
369 17:49:32.913646 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 17:49:32.917172 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 17:49:32.921016 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
372 17:49:32.927019 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
373 17:49:32.930736 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
374 17:49:32.933650 TCO_STS: 0000 0000
375 17:49:32.933875 GEN_PMCON: d0015038 00002200
376 17:49:32.937296 GBLRST_CAUSE: 00000000 00000000
377 17:49:32.941739 HPR_CAUSE0: 00000000
378 17:49:32.941921 prev_sleep_state 5
379 17:49:32.947816 Abort disabling TXT, as CPU is not TXT capable.
380 17:49:32.954539 cse_lite: Number of partitions = 3
381 17:49:32.957931 cse_lite: Current partition = RO
382 17:49:32.958171 cse_lite: Next partition = RO
383 17:49:32.960930 cse_lite: Flags = 0x7
384 17:49:32.968025 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
385 17:49:32.978237 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
386 17:49:32.981047 FMAP: area SI_ME found @ 1000 (5238784 bytes)
387 17:49:32.988061 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
388 17:49:32.994502 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
389 17:49:33.000828 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
390 17:49:33.004250 cse_lite: CSE CBFS RW version : 16.1.25.2049
391 17:49:33.011171 cse_lite: Set Boot Partition Info Command (RW)
392 17:49:33.014477 HECI: Global Reset(Type:1) Command
393 17:49:34.447648 6ːVT supported
394 17:49:34.454402 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
395 17:49:34.457780 Cache size = 10 MiB
396 17:49:34.460933 MCH: device id 4609 (rev 04) is Alderlake-P
397 17:49:34.467708 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
398 17:49:34.471326 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
399 17:49:34.474767 VBOOT: Loading verstage.
400 17:49:34.478721 FMAP: Found "FLASH" version 1.1 at 0x1804000.
401 17:49:34.485820 FMAP: base = 0x0 size = 0x2000000 #areas = 37
402 17:49:34.489581 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
403 17:49:34.497029 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
404 17:49:34.503481 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
405 17:49:34.507458
406 17:49:34.508068
407 17:49:34.513946 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
408 17:49:34.520622 Probing TPM I2C: I2C bus 1 version 0x3230302a
409 17:49:34.524083 DW I2C bus 1 at 0xfe022000 (400 KHz)
410 17:49:34.527826 done! DID_VID 0x00281ae0
411 17:49:34.531577 TPM ready after 0 ms
412 17:49:34.535164 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
413 17:49:34.543926 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
414 17:49:34.551300 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
415 17:49:34.602267 tlcl_send_startup: Startup return code is 0
416 17:49:34.602620 TPM: setup succeeded
417 17:49:34.622013 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
418 17:49:34.643861 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
419 17:49:34.648123 Chrome EC: UHEPI supported
420 17:49:34.651101 Reading cr50 boot mode
421 17:49:34.666205 Cr50 says boot_mode is VERIFIED_RW(0x00).
422 17:49:34.666523 Phase 1
423 17:49:34.672899 FMAP: area GBB found @ 1805000 (458752 bytes)
424 17:49:34.679317 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
425 17:49:34.685960 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
426 17:49:34.692619 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
427 17:49:34.696439 Phase 2
428 17:49:34.696892 Phase 3
429 17:49:34.699683 FMAP: area GBB found @ 1805000 (458752 bytes)
430 17:49:34.706481 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
431 17:49:34.709415 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
432 17:49:34.716044 VB2:vb2_verify_keyblock() Checking keyblock signature...
433 17:49:34.722414 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
434 17:49:34.729186 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
435 17:49:34.739254 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
436 17:49:34.751485 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
437 17:49:34.755118 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
438 17:49:34.761659 VB2:vb2_verify_fw_preamble() Verifying preamble.
439 17:49:34.768334 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
440 17:49:34.775212 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
441 17:49:34.781336 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
442 17:49:34.785607 Phase 4
443 17:49:34.788777 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
444 17:49:34.795348 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
445 17:49:35.008075 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
446 17:49:35.014687 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
447 17:49:35.018224 Saving vboot hash.
448 17:49:35.024760 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
449 17:49:35.041067 tlcl_extend: response is 0
450 17:49:35.047427 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
451 17:49:35.054204 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
452 17:49:35.068826 tlcl_extend: response is 0
453 17:49:35.075137 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
454 17:49:35.094811 tlcl_lock_nv_write: response is 0
455 17:49:35.114030 tlcl_lock_nv_write: response is 0
456 17:49:35.114125 Slot A is selected
457 17:49:35.120480 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
458 17:49:35.127369 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
459 17:49:35.134541 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
460 17:49:35.140852 BS: verstage times (exec / console): total (unknown) / 256 ms
461 17:49:35.141465
462 17:49:35.141904
463 17:49:35.147658 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
464 17:49:35.152307 Google Chrome EC: version:
465 17:49:35.155967 ro: volmar_v2.0.14126-e605144e9c
466 17:49:35.158680 rw: volmar_v0.0.55-22d1557
467 17:49:35.162369 running image: 2
468 17:49:35.165221 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
469 17:49:35.175704 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
470 17:49:35.182445 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
471 17:49:35.189053 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
472 17:49:35.198637 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
473 17:49:35.208477 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
474 17:49:35.212367 EC took 943us to calculate image hash
475 17:49:35.222085 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
476 17:49:35.225089 VB2:sync_ec() select_rw=RW(active)
477 17:49:35.237715 Waited 269us to clear limit power flag.
478 17:49:35.240832 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
479 17:49:35.244474 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
480 17:49:35.247897 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
481 17:49:35.251496 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
482 17:49:35.258605 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
483 17:49:35.258919 TCO_STS: 0000 0000
484 17:49:35.262477 GEN_PMCON: d1001038 00002200
485 17:49:35.265427 GBLRST_CAUSE: 00000040 00000000
486 17:49:35.269054 HPR_CAUSE0: 00000000
487 17:49:35.269410 prev_sleep_state 5
488 17:49:35.275533 Abort disabling TXT, as CPU is not TXT capable.
489 17:49:35.278371 cse_lite: Number of partitions = 3
490 17:49:35.282122 cse_lite: Current partition = RW
491 17:49:35.285300 cse_lite: Next partition = RW
492 17:49:35.288806 cse_lite: Flags = 0x7
493 17:49:35.295461 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
494 17:49:35.305354 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
495 17:49:35.308750 FMAP: area SI_ME found @ 1000 (5238784 bytes)
496 17:49:35.315449 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
497 17:49:35.321925 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
498 17:49:35.328590 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
499 17:49:35.331819 cse_lite: CSE CBFS RW version : 16.1.25.2049
500 17:49:35.335055 Boot Count incremented to 6749
501 17:49:35.341930 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
502 17:49:35.348210 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
503 17:49:35.360812 Probing TPM I2C: done! DID_VID 0x00281ae0
504 17:49:35.364350 Locality already claimed
505 17:49:35.367620 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
506 17:49:35.386880 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
507 17:49:35.393550 MRC: Hash idx 0x100d comparison successful.
508 17:49:35.396644 MRC cache found, size f6c8
509 17:49:35.396964 bootmode is set to: 2
510 17:49:35.400299 EC returned error result code 3
511 17:49:35.404149 FW_CONFIG value from CBI is 0x131
512 17:49:35.410326 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
513 17:49:35.413636 SPD index = 0
514 17:49:35.420181 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
515 17:49:35.420299 SPD: module type is LPDDR4X
516 17:49:35.427182 SPD: module part number is K4U6E3S4AB-MGCL
517 17:49:35.431346 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
518 17:49:35.437917 SPD: device width 16 bits, bus width 16 bits
519 17:49:35.441489 SPD: module size is 1024 MB (per channel)
520 17:49:35.509897 CBMEM:
521 17:49:35.513454 IMD: root @ 0x76fff000 254 entries.
522 17:49:35.516887 IMD: root @ 0x76ffec00 62 entries.
523 17:49:35.524884 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
524 17:49:35.528091 RO_VPD is uninitialized or empty.
525 17:49:35.531278 FMAP: area RW_VPD found @ f29000 (8192 bytes)
526 17:49:35.537772 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
527 17:49:35.541202 External stage cache:
528 17:49:35.544372 IMD: root @ 0x7bbff000 254 entries.
529 17:49:35.547544 IMD: root @ 0x7bbfec00 62 entries.
530 17:49:35.554927 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
531 17:49:35.561349 MRC: Checking cached data update for 'RW_MRC_CACHE'.
532 17:49:35.565023 MRC: 'RW_MRC_CACHE' does not need update.
533 17:49:35.565473 8 DIMMs found
534 17:49:35.568003 SMM Memory Map
535 17:49:35.571476 SMRAM : 0x7b800000 0x800000
536 17:49:35.574527 Subregion 0: 0x7b800000 0x200000
537 17:49:35.577946 Subregion 1: 0x7ba00000 0x200000
538 17:49:35.581108 Subregion 2: 0x7bc00000 0x400000
539 17:49:35.584648 top_of_ram = 0x77000000
540 17:49:35.587627 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
541 17:49:35.594430 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
542 17:49:35.601224 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
543 17:49:35.604628 MTRR Range: Start=ff000000 End=0 (Size 1000000)
544 17:49:35.605105 Normal boot
545 17:49:35.614665 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
546 17:49:35.621064 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
547 17:49:35.627570 Processing 237 relocs. Offset value of 0x74ab9000
548 17:49:35.635977 BS: romstage times (exec / console): total (unknown) / 377 ms
549 17:49:35.643095
550 17:49:35.643672
551 17:49:35.650232 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
552 17:49:35.650703 Normal boot
553 17:49:35.656343 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
554 17:49:35.663173 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
555 17:49:35.669705 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
556 17:49:35.679852 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
557 17:49:35.727851 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
558 17:49:35.734507 Processing 5931 relocs. Offset value of 0x72a2f000
559 17:49:35.737837 BS: postcar times (exec / console): total (unknown) / 51 ms
560 17:49:35.741601
561 17:49:35.742038
562 17:49:35.748002 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
563 17:49:35.751460 Reserving BERT start 76a1e000, size 10000
564 17:49:35.754395 Normal boot
565 17:49:35.757692 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
566 17:49:35.764367 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
567 17:49:35.774229 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
568 17:49:35.777772 FMAP: area RW_VPD found @ f29000 (8192 bytes)
569 17:49:35.781035 Google Chrome EC: version:
570 17:49:35.784606 ro: volmar_v2.0.14126-e605144e9c
571 17:49:35.787508 rw: volmar_v0.0.55-22d1557
572 17:49:35.791034 running image: 2
573 17:49:35.793950 ACPI _SWS is PM1 Index 8 GPE Index -1
574 17:49:35.797270 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
575 17:49:35.802421 EC returned error result code 3
576 17:49:35.805886 FW_CONFIG value from CBI is 0x131
577 17:49:35.812460 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
578 17:49:35.815908 PCI: 00:1c.2 disabled by fw_config
579 17:49:35.822726 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
580 17:49:35.825491 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
581 17:49:35.832106 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
582 17:49:35.835505 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
583 17:49:35.842406 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
584 17:49:35.849227 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
585 17:49:35.855361 microcode: sig=0x906a4 pf=0x80 revision=0x423
586 17:49:35.858937 microcode: Update skipped, already up-to-date
587 17:49:35.865595 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
588 17:49:35.898508 Detected 6 core, 8 thread CPU.
589 17:49:35.901421 Setting up SMI for CPU
590 17:49:35.904721 IED base = 0x7bc00000
591 17:49:35.905234 IED size = 0x00400000
592 17:49:35.908120 Will perform SMM setup.
593 17:49:35.911445 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
594 17:49:35.914652 LAPIC 0x0 in XAPIC mode.
595 17:49:35.924613 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
596 17:49:35.928054 Processing 18 relocs. Offset value of 0x00030000
597 17:49:35.932622 Attempting to start 7 APs
598 17:49:35.936080 Waiting for 10ms after sending INIT.
599 17:49:35.948965 Waiting for SIPI to complete...
600 17:49:35.952516 LAPIC 0x1 in XAPIC mode.
601 17:49:35.955596 LAPIC 0x10 in XAPIC mode.
602 17:49:35.959198 LAPIC 0x16 in XAPIC mode.
603 17:49:35.962613 LAPIC 0x12 in XAPIC mode.
604 17:49:35.965702 AP: slot 2 apic_id 16, MCU rev: 0x00000423
605 17:49:35.969134 AP: slot 3 apic_id 10, MCU rev: 0x00000423
606 17:49:35.972554 LAPIC 0x14 in XAPIC mode.
607 17:49:35.976055 AP: slot 4 apic_id 12, MCU rev: 0x00000423
608 17:49:35.982752 AP: slot 1 apic_id 14, MCU rev: 0x00000423
609 17:49:35.983181 done.
610 17:49:35.985779 AP: slot 6 apic_id 1, MCU rev: 0x00000423
611 17:49:35.989258 Waiting for SIPI to complete...
612 17:49:35.989696 done.
613 17:49:35.992198 LAPIC 0x8 in XAPIC mode.
614 17:49:35.995824 LAPIC 0x9 in XAPIC mode.
615 17:49:35.998948 AP: slot 7 apic_id 8, MCU rev: 0x00000423
616 17:49:36.002660 AP: slot 5 apic_id 9, MCU rev: 0x00000423
617 17:49:36.005578 smm_setup_relocation_handler: enter
618 17:49:36.009225 smm_setup_relocation_handler: exit
619 17:49:36.019351 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
620 17:49:36.022199 Processing 11 relocs. Offset value of 0x00038000
621 17:49:36.028834 smm_module_setup_stub: stack_top = 0x7b804000
622 17:49:36.032314 smm_module_setup_stub: per cpu stack_size = 0x800
623 17:49:36.038911 smm_module_setup_stub: runtime.start32_offset = 0x4c
624 17:49:36.042136 smm_module_setup_stub: runtime.smm_size = 0x10000
625 17:49:36.048562 SMM Module: stub loaded at 38000. Will call 0x76a52094
626 17:49:36.051795 Installing permanent SMM handler to 0x7b800000
627 17:49:36.058566 smm_load_module: total_smm_space_needed e468, available -> 200000
628 17:49:36.068822 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
629 17:49:36.072290 Processing 255 relocs. Offset value of 0x7b9f6000
630 17:49:36.078765 smm_load_module: smram_start: 0x7b800000
631 17:49:36.081801 smm_load_module: smram_end: 7ba00000
632 17:49:36.085289 smm_load_module: handler start 0x7b9f6d5f
633 17:49:36.088671 smm_load_module: handler_size 98d0
634 17:49:36.091885 smm_load_module: fxsave_area 0x7b9ff000
635 17:49:36.095509 smm_load_module: fxsave_size 1000
636 17:49:36.098257 smm_load_module: CONFIG_MSEG_SIZE 0x0
637 17:49:36.104949 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
638 17:49:36.111663 smm_load_module: handler_mod_params.smbase = 0x7b800000
639 17:49:36.115045 smm_load_module: per_cpu_save_state_size = 0x400
640 17:49:36.118506 smm_load_module: num_cpus = 0x8
641 17:49:36.125208 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
642 17:49:36.127800 smm_load_module: total_save_state_size = 0x2000
643 17:49:36.131128 smm_load_module: cpu0 entry: 7b9e6000
644 17:49:36.137944 smm_create_map: cpus allowed in one segment 30
645 17:49:36.141373 smm_create_map: min # of segments needed 1
646 17:49:36.141457 CPU 0x0
647 17:49:36.147772 smbase 7b9e6000 entry 7b9ee000
648 17:49:36.151344 ss_start 7b9f5c00 code_end 7b9ee208
649 17:49:36.151429 CPU 0x1
650 17:49:36.154617 smbase 7b9e5c00 entry 7b9edc00
651 17:49:36.160966 ss_start 7b9f5800 code_end 7b9ede08
652 17:49:36.161140 CPU 0x2
653 17:49:36.164543 smbase 7b9e5800 entry 7b9ed800
654 17:49:36.171483 ss_start 7b9f5400 code_end 7b9eda08
655 17:49:36.171610 CPU 0x3
656 17:49:36.174311 smbase 7b9e5400 entry 7b9ed400
657 17:49:36.177938 ss_start 7b9f5000 code_end 7b9ed608
658 17:49:36.180912 CPU 0x4
659 17:49:36.184567 smbase 7b9e5000 entry 7b9ed000
660 17:49:36.187650 ss_start 7b9f4c00 code_end 7b9ed208
661 17:49:36.187736 CPU 0x5
662 17:49:36.194415 smbase 7b9e4c00 entry 7b9ecc00
663 17:49:36.197833 ss_start 7b9f4800 code_end 7b9ece08
664 17:49:36.197952 CPU 0x6
665 17:49:36.201144 smbase 7b9e4800 entry 7b9ec800
666 17:49:36.207589 ss_start 7b9f4400 code_end 7b9eca08
667 17:49:36.207698 CPU 0x7
668 17:49:36.210889 smbase 7b9e4400 entry 7b9ec400
669 17:49:36.217863 ss_start 7b9f4000 code_end 7b9ec608
670 17:49:36.224255 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
671 17:49:36.227812 Processing 11 relocs. Offset value of 0x7b9ee000
672 17:49:36.234420 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
673 17:49:36.241225 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
674 17:49:36.247945 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
675 17:49:36.254129 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
676 17:49:36.260815 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
677 17:49:36.267733 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
678 17:49:36.274399 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
679 17:49:36.277814 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
680 17:49:36.284034 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
681 17:49:36.290830 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
682 17:49:36.297478 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
683 17:49:36.304135 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
684 17:49:36.310972 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
685 17:49:36.316872 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
686 17:49:36.324601 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
687 17:49:36.327292 smm_module_setup_stub: stack_top = 0x7b804000
688 17:49:36.334352 smm_module_setup_stub: per cpu stack_size = 0x800
689 17:49:36.337886 smm_module_setup_stub: runtime.start32_offset = 0x4c
690 17:49:36.344089 smm_module_setup_stub: runtime.smm_size = 0x200000
691 17:49:36.347503 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
692 17:49:36.352822 Clearing SMI status registers
693 17:49:36.356586 SMI_STS: PM1
694 17:49:36.357095 PM1_STS: WAK PWRBTN
695 17:49:36.366104 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
696 17:49:36.369839 In relocation handler: CPU 0
697 17:49:36.372743 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
698 17:49:36.376105 Writing SMRR. base = 0x7b800006, mask=0xff800c00
699 17:49:36.379557 Relocation complete.
700 17:49:36.386464 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
701 17:49:36.389300 In relocation handler: CPU 6
702 17:49:36.392950 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
703 17:49:36.395875 Relocation complete.
704 17:49:36.403013 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
705 17:49:36.405723 In relocation handler: CPU 1
706 17:49:36.409512 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
707 17:49:36.416163 Writing SMRR. base = 0x7b800006, mask=0xff800c00
708 17:49:36.416528 Relocation complete.
709 17:49:36.422947 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
710 17:49:36.425849 In relocation handler: CPU 4
711 17:49:36.429765 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
712 17:49:36.435851 Writing SMRR. base = 0x7b800006, mask=0xff800c00
713 17:49:36.439490 Relocation complete.
714 17:49:36.446488 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
715 17:49:36.449366 In relocation handler: CPU 2
716 17:49:36.453126 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
717 17:49:36.456082 Writing SMRR. base = 0x7b800006, mask=0xff800c00
718 17:49:36.459213 Relocation complete.
719 17:49:36.465713 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
720 17:49:36.469391 In relocation handler: CPU 3
721 17:49:36.473038 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
722 17:49:36.479436 Writing SMRR. base = 0x7b800006, mask=0xff800c00
723 17:49:36.479689 Relocation complete.
724 17:49:36.485646 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
725 17:49:36.489103 In relocation handler: CPU 7
726 17:49:36.495620 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
727 17:49:36.499175 Writing SMRR. base = 0x7b800006, mask=0xff800c00
728 17:49:36.502642 Relocation complete.
729 17:49:36.509164 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
730 17:49:36.512287 In relocation handler: CPU 5
731 17:49:36.515861 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
732 17:49:36.519152 Relocation complete.
733 17:49:36.519421 Initializing CPU #0
734 17:49:36.522417 CPU: vendor Intel device 906a4
735 17:49:36.525622 CPU: family 06, model 9a, stepping 04
736 17:49:36.528989 Clearing out pending MCEs
737 17:49:36.532407 cpu: energy policy set to 7
738 17:49:36.535824 Turbo is available but hidden
739 17:49:36.538867 Turbo is available and visible
740 17:49:36.542409 microcode: Update skipped, already up-to-date
741 17:49:36.546041 CPU #0 initialized
742 17:49:36.546325 Initializing CPU #6
743 17:49:36.549075 Initializing CPU #4
744 17:49:36.552561 Initializing CPU #2
745 17:49:36.552795 Initializing CPU #3
746 17:49:36.555483 Initializing CPU #1
747 17:49:36.558842 CPU: vendor Intel device 906a4
748 17:49:36.562661 CPU: family 06, model 9a, stepping 04
749 17:49:36.566120 CPU: vendor Intel device 906a4
750 17:49:36.568940 CPU: family 06, model 9a, stepping 04
751 17:49:36.571971 CPU: vendor Intel device 906a4
752 17:49:36.575699 CPU: family 06, model 9a, stepping 04
753 17:49:36.578678 Clearing out pending MCEs
754 17:49:36.582194 Clearing out pending MCEs
755 17:49:36.585240 CPU: vendor Intel device 906a4
756 17:49:36.589268 CPU: family 06, model 9a, stepping 04
757 17:49:36.592052 cpu: energy policy set to 7
758 17:49:36.595251 Clearing out pending MCEs
759 17:49:36.598984 microcode: Update skipped, already up-to-date
760 17:49:36.601963 CPU #4 initialized
761 17:49:36.602348 cpu: energy policy set to 7
762 17:49:36.605771 cpu: energy policy set to 7
763 17:49:36.609115 Clearing out pending MCEs
764 17:49:36.612085 CPU: vendor Intel device 906a4
765 17:49:36.615533 CPU: family 06, model 9a, stepping 04
766 17:49:36.618554 microcode: Update skipped, already up-to-date
767 17:49:36.622237 CPU #2 initialized
768 17:49:36.625641 microcode: Update skipped, already up-to-date
769 17:49:36.628854 CPU #3 initialized
770 17:49:36.631963 cpu: energy policy set to 7
771 17:49:36.635622 Clearing out pending MCEs
772 17:49:36.638452 microcode: Update skipped, already up-to-date
773 17:49:36.642000 CPU #1 initialized
774 17:49:36.642489 Initializing CPU #7
775 17:49:36.645059 Initializing CPU #5
776 17:49:36.648714 CPU: vendor Intel device 906a4
777 17:49:36.651739 CPU: family 06, model 9a, stepping 04
778 17:49:36.655410 cpu: energy policy set to 7
779 17:49:36.658465 Clearing out pending MCEs
780 17:49:36.662112 microcode: Update skipped, already up-to-date
781 17:49:36.665705 CPU #6 initialized
782 17:49:36.666117 cpu: energy policy set to 7
783 17:49:36.668760 CPU: vendor Intel device 906a4
784 17:49:36.671713 CPU: family 06, model 9a, stepping 04
785 17:49:36.678757 microcode: Update skipped, already up-to-date
786 17:49:36.679044 CPU #7 initialized
787 17:49:36.681776 Clearing out pending MCEs
788 17:49:36.685087 cpu: energy policy set to 7
789 17:49:36.691803 microcode: Update skipped, already up-to-date
790 17:49:36.692248 CPU #5 initialized
791 17:49:36.694861 bsp_do_flight_plan done after 702 msecs.
792 17:49:36.698472 CPU: frequency set to 4400 MHz
793 17:49:36.701800 Enabling SMIs.
794 17:49:36.708074 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
795 17:49:36.723088 Probing TPM I2C: done! DID_VID 0x00281ae0
796 17:49:36.726558 Locality already claimed
797 17:49:36.730442 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
798 17:49:36.741277 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
799 17:49:36.744757 Enabling GPIO PM b/c CR50 has long IRQ pulse support
800 17:49:36.751678 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
801 17:49:36.758099 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
802 17:49:36.761196 Found a VBT of 9216 bytes after decompression
803 17:49:36.764868 PCI 1.0, PIN A, using IRQ #16
804 17:49:36.768075 PCI 2.0, PIN A, using IRQ #17
805 17:49:36.771431 PCI 4.0, PIN A, using IRQ #18
806 17:49:36.774675 PCI 5.0, PIN A, using IRQ #16
807 17:49:36.777990 PCI 6.0, PIN A, using IRQ #16
808 17:49:36.781069 PCI 6.2, PIN C, using IRQ #18
809 17:49:36.784825 PCI 7.0, PIN A, using IRQ #19
810 17:49:36.787693 PCI 7.1, PIN B, using IRQ #20
811 17:49:36.790957 PCI 7.2, PIN C, using IRQ #21
812 17:49:36.794379 PCI 7.3, PIN D, using IRQ #22
813 17:49:36.797997 PCI 8.0, PIN A, using IRQ #23
814 17:49:36.801114 PCI D.0, PIN A, using IRQ #17
815 17:49:36.804345 PCI D.1, PIN B, using IRQ #19
816 17:49:36.804434 PCI 10.0, PIN A, using IRQ #24
817 17:49:36.807595 PCI 10.1, PIN B, using IRQ #25
818 17:49:36.810929 PCI 10.6, PIN C, using IRQ #20
819 17:49:36.814329 PCI 10.7, PIN D, using IRQ #21
820 17:49:36.818127 PCI 11.0, PIN A, using IRQ #26
821 17:49:36.821004 PCI 11.1, PIN B, using IRQ #27
822 17:49:36.824487 PCI 11.2, PIN C, using IRQ #28
823 17:49:36.827952 PCI 11.3, PIN D, using IRQ #29
824 17:49:36.831463 PCI 12.0, PIN A, using IRQ #30
825 17:49:36.834246 PCI 12.6, PIN B, using IRQ #31
826 17:49:36.838104 PCI 12.7, PIN C, using IRQ #22
827 17:49:36.841348 PCI 13.0, PIN A, using IRQ #32
828 17:49:36.844244 PCI 13.1, PIN B, using IRQ #33
829 17:49:36.847782 PCI 13.2, PIN C, using IRQ #34
830 17:49:36.851406 PCI 13.3, PIN D, using IRQ #35
831 17:49:36.854343 PCI 14.0, PIN B, using IRQ #23
832 17:49:36.857899 PCI 14.1, PIN A, using IRQ #36
833 17:49:36.858016 PCI 14.3, PIN C, using IRQ #17
834 17:49:36.860982 PCI 15.0, PIN A, using IRQ #37
835 17:49:36.864361 PCI 15.1, PIN B, using IRQ #38
836 17:49:36.867510 PCI 15.2, PIN C, using IRQ #39
837 17:49:36.871350 PCI 15.3, PIN D, using IRQ #40
838 17:49:36.874267 PCI 16.0, PIN A, using IRQ #18
839 17:49:36.877477 PCI 16.1, PIN B, using IRQ #19
840 17:49:36.881215 PCI 16.2, PIN C, using IRQ #20
841 17:49:36.884090 PCI 16.3, PIN D, using IRQ #21
842 17:49:36.887559 PCI 16.4, PIN A, using IRQ #18
843 17:49:36.890752 PCI 16.5, PIN B, using IRQ #19
844 17:49:36.893827 PCI 17.0, PIN A, using IRQ #22
845 17:49:36.897419 PCI 19.0, PIN A, using IRQ #41
846 17:49:36.901111 PCI 19.1, PIN B, using IRQ #42
847 17:49:36.904070 PCI 19.2, PIN C, using IRQ #43
848 17:49:36.907738 PCI 1C.0, PIN A, using IRQ #16
849 17:49:36.910744 PCI 1C.1, PIN B, using IRQ #17
850 17:49:36.910838 PCI 1C.2, PIN C, using IRQ #18
851 17:49:36.914041 PCI 1C.3, PIN D, using IRQ #19
852 17:49:36.917471 PCI 1C.4, PIN A, using IRQ #16
853 17:49:36.920632 PCI 1C.5, PIN B, using IRQ #17
854 17:49:36.924242 PCI 1C.6, PIN C, using IRQ #18
855 17:49:36.927285 PCI 1C.7, PIN D, using IRQ #19
856 17:49:36.930735 PCI 1D.0, PIN A, using IRQ #16
857 17:49:36.934432 PCI 1D.1, PIN B, using IRQ #17
858 17:49:36.937864 PCI 1D.2, PIN C, using IRQ #18
859 17:49:36.941224 PCI 1D.3, PIN D, using IRQ #19
860 17:49:36.944112 PCI 1E.0, PIN A, using IRQ #23
861 17:49:36.947560 PCI 1E.1, PIN B, using IRQ #20
862 17:49:36.950611 PCI 1E.2, PIN C, using IRQ #44
863 17:49:36.954427 PCI 1E.3, PIN D, using IRQ #45
864 17:49:36.957655 PCI 1F.3, PIN B, using IRQ #22
865 17:49:36.960731 PCI 1F.4, PIN C, using IRQ #23
866 17:49:36.961215 PCI 1F.6, PIN D, using IRQ #20
867 17:49:36.964397 PCI 1F.7, PIN A, using IRQ #21
868 17:49:36.970731 IRQ: Using dynamically assigned PCI IO-APIC IRQs
869 17:49:36.977361 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
870 17:49:37.161503 FSPS returned 0
871 17:49:37.165005 Executing Phase 1 of FspMultiPhaseSiInit
872 17:49:37.175126 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
873 17:49:37.178271 port C0 DISC req: usage 1 usb3 1 usb2 1
874 17:49:37.181460 Raw Buffer output 0 00000111
875 17:49:37.184826 Raw Buffer output 1 00000000
876 17:49:37.188671 pmc_send_ipc_cmd succeeded
877 17:49:37.195240 port C1 DISC req: usage 1 usb3 3 usb2 3
878 17:49:37.195697 Raw Buffer output 0 00000331
879 17:49:37.198275 Raw Buffer output 1 00000000
880 17:49:37.202526 pmc_send_ipc_cmd succeeded
881 17:49:37.206729 Detected 6 core, 8 thread CPU.
882 17:49:37.209966 Detected 6 core, 8 thread CPU.
883 17:49:37.214876 Detected 6 core, 8 thread CPU.
884 17:49:37.218396 Detected 6 core, 8 thread CPU.
885 17:49:37.221513 Detected 6 core, 8 thread CPU.
886 17:49:37.225061 Detected 6 core, 8 thread CPU.
887 17:49:37.227987 Detected 6 core, 8 thread CPU.
888 17:49:37.231827 Detected 6 core, 8 thread CPU.
889 17:49:37.234907 Detected 6 core, 8 thread CPU.
890 17:49:37.238610 Detected 6 core, 8 thread CPU.
891 17:49:37.241294 Detected 6 core, 8 thread CPU.
892 17:49:37.245163 Detected 6 core, 8 thread CPU.
893 17:49:37.248061 Detected 6 core, 8 thread CPU.
894 17:49:37.251837 Detected 6 core, 8 thread CPU.
895 17:49:37.254625 Detected 6 core, 8 thread CPU.
896 17:49:37.258431 Detected 6 core, 8 thread CPU.
897 17:49:37.261349 Detected 6 core, 8 thread CPU.
898 17:49:37.264774 Detected 6 core, 8 thread CPU.
899 17:49:37.267952 Detected 6 core, 8 thread CPU.
900 17:49:37.271681 Detected 6 core, 8 thread CPU.
901 17:49:37.274821 Detected 6 core, 8 thread CPU.
902 17:49:37.277997 Detected 6 core, 8 thread CPU.
903 17:49:37.567967 Detected 6 core, 8 thread CPU.
904 17:49:37.570843 Detected 6 core, 8 thread CPU.
905 17:49:37.574497 Detected 6 core, 8 thread CPU.
906 17:49:37.577650 Detected 6 core, 8 thread CPU.
907 17:49:37.581325 Detected 6 core, 8 thread CPU.
908 17:49:37.584604 Detected 6 core, 8 thread CPU.
909 17:49:37.588009 Detected 6 core, 8 thread CPU.
910 17:49:37.591279 Detected 6 core, 8 thread CPU.
911 17:49:37.594259 Detected 6 core, 8 thread CPU.
912 17:49:37.597891 Detected 6 core, 8 thread CPU.
913 17:49:37.601027 Detected 6 core, 8 thread CPU.
914 17:49:37.604210 Detected 6 core, 8 thread CPU.
915 17:49:37.607620 Detected 6 core, 8 thread CPU.
916 17:49:37.611289 Detected 6 core, 8 thread CPU.
917 17:49:37.614097 Detected 6 core, 8 thread CPU.
918 17:49:37.617841 Detected 6 core, 8 thread CPU.
919 17:49:37.621001 Detected 6 core, 8 thread CPU.
920 17:49:37.624503 Detected 6 core, 8 thread CPU.
921 17:49:37.628017 Detected 6 core, 8 thread CPU.
922 17:49:37.631235 Detected 6 core, 8 thread CPU.
923 17:49:37.634714 Display FSP Version Info HOB
924 17:49:37.637870 Reference Code - CPU = c.0.65.70
925 17:49:37.638468 uCode Version = 0.0.4.23
926 17:49:37.641081 TXT ACM version = ff.ff.ff.ffff
927 17:49:37.644742 Reference Code - ME = c.0.65.70
928 17:49:37.647701 MEBx version = 0.0.0.0
929 17:49:37.651252 ME Firmware Version = Lite SKU
930 17:49:37.654656 Reference Code - PCH = c.0.65.70
931 17:49:37.657787 PCH-CRID Status = Disabled
932 17:49:37.660844 PCH-CRID Original Value = ff.ff.ff.ffff
933 17:49:37.664374 PCH-CRID New Value = ff.ff.ff.ffff
934 17:49:37.668188 OPROM - RST - RAID = ff.ff.ff.ffff
935 17:49:37.671299 PCH Hsio Version = 4.0.0.0
936 17:49:37.674467 Reference Code - SA - System Agent = c.0.65.70
937 17:49:37.677581 Reference Code - MRC = 0.0.3.80
938 17:49:37.681055 SA - PCIe Version = c.0.65.70
939 17:49:37.684593 SA-CRID Status = Disabled
940 17:49:37.688050 SA-CRID Original Value = 0.0.0.4
941 17:49:37.691691 SA-CRID New Value = 0.0.0.4
942 17:49:37.694290 OPROM - VBIOS = ff.ff.ff.ffff
943 17:49:37.697788 IO Manageability Engine FW Version = 24.0.4.0
944 17:49:37.701358 PHY Build Version = 0.0.0.2016
945 17:49:37.704384 Thunderbolt(TM) FW Version = 0.0.0.0
946 17:49:37.711738 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
947 17:49:37.717641 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
948 17:49:37.721322 Enumerating buses...
949 17:49:37.724055 Show all devs... Before device enumeration.
950 17:49:37.727797 Root Device: enabled 1
951 17:49:37.728531 CPU_CLUSTER: 0: enabled 1
952 17:49:37.730741 DOMAIN: 0000: enabled 1
953 17:49:37.734385 GPIO: 0: enabled 1
954 17:49:37.737524 PCI: 00:00.0: enabled 1
955 17:49:37.738004 PCI: 00:01.0: enabled 0
956 17:49:37.741054 PCI: 00:01.1: enabled 0
957 17:49:37.744285 PCI: 00:02.0: enabled 1
958 17:49:37.744765 PCI: 00:04.0: enabled 1
959 17:49:37.747470 PCI: 00:05.0: enabled 0
960 17:49:37.751035 PCI: 00:06.0: enabled 1
961 17:49:37.753867 PCI: 00:06.2: enabled 0
962 17:49:37.754514 PCI: 00:07.0: enabled 0
963 17:49:37.757660 PCI: 00:07.1: enabled 0
964 17:49:37.760886 PCI: 00:07.2: enabled 0
965 17:49:37.763895 PCI: 00:07.3: enabled 0
966 17:49:37.764530 PCI: 00:08.0: enabled 0
967 17:49:37.767414 PCI: 00:09.0: enabled 0
968 17:49:37.770585 PCI: 00:0a.0: enabled 1
969 17:49:37.774007 PCI: 00:0d.0: enabled 1
970 17:49:37.774487 PCI: 00:0d.1: enabled 0
971 17:49:37.777643 PCI: 00:0d.2: enabled 0
972 17:49:37.780468 PCI: 00:0d.3: enabled 0
973 17:49:37.780943 PCI: 00:0e.0: enabled 0
974 17:49:37.784094 PCI: 00:10.0: enabled 0
975 17:49:37.787174 PCI: 00:10.1: enabled 0
976 17:49:37.790769 PCI: 00:10.6: enabled 0
977 17:49:37.791102 PCI: 00:10.7: enabled 0
978 17:49:37.793652 PCI: 00:12.0: enabled 0
979 17:49:37.797429 PCI: 00:12.6: enabled 0
980 17:49:37.800462 PCI: 00:12.7: enabled 0
981 17:49:37.800794 PCI: 00:13.0: enabled 0
982 17:49:37.803875 PCI: 00:14.0: enabled 1
983 17:49:37.807038 PCI: 00:14.1: enabled 0
984 17:49:37.810197 PCI: 00:14.2: enabled 1
985 17:49:37.810534 PCI: 00:14.3: enabled 1
986 17:49:37.814061 PCI: 00:15.0: enabled 1
987 17:49:37.817026 PCI: 00:15.1: enabled 1
988 17:49:37.820555 PCI: 00:15.2: enabled 0
989 17:49:37.820895 PCI: 00:15.3: enabled 1
990 17:49:37.823818 PCI: 00:16.0: enabled 1
991 17:49:37.827094 PCI: 00:16.1: enabled 0
992 17:49:37.827431 PCI: 00:16.2: enabled 0
993 17:49:37.830435 PCI: 00:16.3: enabled 0
994 17:49:37.833722 PCI: 00:16.4: enabled 0
995 17:49:37.837328 PCI: 00:16.5: enabled 0
996 17:49:37.837779 PCI: 00:17.0: enabled 1
997 17:49:37.840428 PCI: 00:19.0: enabled 0
998 17:49:37.844166 PCI: 00:19.1: enabled 1
999 17:49:37.847815 PCI: 00:19.2: enabled 0
1000 17:49:37.848150 PCI: 00:1a.0: enabled 0
1001 17:49:37.850893 PCI: 00:1c.0: enabled 0
1002 17:49:37.853719 PCI: 00:1c.1: enabled 0
1003 17:49:37.857349 PCI: 00:1c.2: enabled 0
1004 17:49:37.857794 PCI: 00:1c.3: enabled 0
1005 17:49:37.860356 PCI: 00:1c.4: enabled 0
1006 17:49:37.863975 PCI: 00:1c.5: enabled 0
1007 17:49:37.867456 PCI: 00:1c.6: enabled 0
1008 17:49:37.868160 PCI: 00:1c.7: enabled 0
1009 17:49:37.870646 PCI: 00:1d.0: enabled 0
1010 17:49:37.873697 PCI: 00:1d.1: enabled 0
1011 17:49:37.874177 PCI: 00:1d.2: enabled 0
1012 17:49:37.877423 PCI: 00:1d.3: enabled 0
1013 17:49:37.880503 PCI: 00:1e.0: enabled 1
1014 17:49:37.883563 PCI: 00:1e.1: enabled 0
1015 17:49:37.884232 PCI: 00:1e.2: enabled 0
1016 17:49:37.887358 PCI: 00:1e.3: enabled 1
1017 17:49:37.890675 PCI: 00:1f.0: enabled 1
1018 17:49:37.893647 PCI: 00:1f.1: enabled 0
1019 17:49:37.894123 PCI: 00:1f.2: enabled 1
1020 17:49:37.896814 PCI: 00:1f.3: enabled 1
1021 17:49:37.900396 PCI: 00:1f.4: enabled 0
1022 17:49:37.904225 PCI: 00:1f.5: enabled 1
1023 17:49:37.904798 PCI: 00:1f.6: enabled 0
1024 17:49:37.906900 PCI: 00:1f.7: enabled 0
1025 17:49:37.909939 GENERIC: 0.0: enabled 1
1026 17:49:37.913353 GENERIC: 0.0: enabled 1
1027 17:49:37.913851 GENERIC: 1.0: enabled 1
1028 17:49:37.916593 GENERIC: 0.0: enabled 1
1029 17:49:37.920039 GENERIC: 1.0: enabled 1
1030 17:49:37.920588 USB0 port 0: enabled 1
1031 17:49:37.923149 USB0 port 0: enabled 1
1032 17:49:37.926582 GENERIC: 0.0: enabled 1
1033 17:49:37.929784 I2C: 00:1a: enabled 1
1034 17:49:37.930256 I2C: 00:31: enabled 1
1035 17:49:37.933113 I2C: 00:32: enabled 1
1036 17:49:37.937239 I2C: 00:50: enabled 1
1037 17:49:37.937797 I2C: 00:10: enabled 1
1038 17:49:37.939818 I2C: 00:15: enabled 1
1039 17:49:37.943730 I2C: 00:2c: enabled 1
1040 17:49:37.944294 GENERIC: 0.0: enabled 1
1041 17:49:37.946367 SPI: 00: enabled 1
1042 17:49:37.949795 PNP: 0c09.0: enabled 1
1043 17:49:37.950294 GENERIC: 0.0: enabled 1
1044 17:49:37.953511 USB3 port 0: enabled 1
1045 17:49:37.956937 USB3 port 1: enabled 0
1046 17:49:37.959743 USB3 port 2: enabled 1
1047 17:49:37.960217 USB3 port 3: enabled 0
1048 17:49:37.963236 USB2 port 0: enabled 1
1049 17:49:37.966861 USB2 port 1: enabled 0
1050 17:49:37.967335 USB2 port 2: enabled 1
1051 17:49:37.969514 USB2 port 3: enabled 0
1052 17:49:37.973248 USB2 port 4: enabled 0
1053 17:49:37.973718 USB2 port 5: enabled 1
1054 17:49:37.976522 USB2 port 6: enabled 0
1055 17:49:37.979749 USB2 port 7: enabled 0
1056 17:49:37.983138 USB2 port 8: enabled 1
1057 17:49:37.983604 USB2 port 9: enabled 1
1058 17:49:37.986489 USB3 port 0: enabled 1
1059 17:49:37.989594 USB3 port 1: enabled 0
1060 17:49:37.990068 USB3 port 2: enabled 0
1061 17:49:37.993196 USB3 port 3: enabled 0
1062 17:49:37.996459 GENERIC: 0.0: enabled 1
1063 17:49:37.999948 GENERIC: 1.0: enabled 1
1064 17:49:38.000435 APIC: 00: enabled 1
1065 17:49:38.002947 APIC: 14: enabled 1
1066 17:49:38.003419 APIC: 16: enabled 1
1067 17:49:38.006465 APIC: 10: enabled 1
1068 17:49:38.009562 APIC: 12: enabled 1
1069 17:49:38.010032 APIC: 09: enabled 1
1070 17:49:38.013103 APIC: 01: enabled 1
1071 17:49:38.016099 APIC: 08: enabled 1
1072 17:49:38.016565 Compare with tree...
1073 17:49:38.019803 Root Device: enabled 1
1074 17:49:38.022851 CPU_CLUSTER: 0: enabled 1
1075 17:49:38.023324 APIC: 00: enabled 1
1076 17:49:38.026001 APIC: 14: enabled 1
1077 17:49:38.029615 APIC: 16: enabled 1
1078 17:49:38.030083 APIC: 10: enabled 1
1079 17:49:38.032749 APIC: 12: enabled 1
1080 17:49:38.036752 APIC: 09: enabled 1
1081 17:49:38.037373 APIC: 01: enabled 1
1082 17:49:38.039761 APIC: 08: enabled 1
1083 17:49:38.042638 DOMAIN: 0000: enabled 1
1084 17:49:38.046413 GPIO: 0: enabled 1
1085 17:49:38.047090 PCI: 00:00.0: enabled 1
1086 17:49:38.050218 PCI: 00:01.0: enabled 0
1087 17:49:38.052878 PCI: 00:01.1: enabled 0
1088 17:49:38.056759 PCI: 00:02.0: enabled 1
1089 17:49:38.059464 PCI: 00:04.0: enabled 1
1090 17:49:38.059941 GENERIC: 0.0: enabled 1
1091 17:49:38.062852 PCI: 00:05.0: enabled 0
1092 17:49:38.066806 PCI: 00:06.0: enabled 1
1093 17:49:38.069525 PCI: 00:06.2: enabled 0
1094 17:49:38.072956 PCI: 00:08.0: enabled 0
1095 17:49:38.073497 PCI: 00:09.0: enabled 0
1096 17:49:38.076436 PCI: 00:0a.0: enabled 1
1097 17:49:38.079557 PCI: 00:0d.0: enabled 1
1098 17:49:38.082874 USB0 port 0: enabled 1
1099 17:49:38.086192 USB3 port 0: enabled 1
1100 17:49:38.086772 USB3 port 1: enabled 0
1101 17:49:38.089554 USB3 port 2: enabled 1
1102 17:49:38.093519 USB3 port 3: enabled 0
1103 17:49:38.095950 PCI: 00:0d.1: enabled 0
1104 17:49:38.099341 PCI: 00:0d.2: enabled 0
1105 17:49:38.099812 PCI: 00:0d.3: enabled 0
1106 17:49:38.102588 PCI: 00:0e.0: enabled 0
1107 17:49:38.105848 PCI: 00:10.0: enabled 0
1108 17:49:38.109459 PCI: 00:10.1: enabled 0
1109 17:49:38.112888 PCI: 00:10.6: enabled 0
1110 17:49:38.113408 PCI: 00:10.7: enabled 0
1111 17:49:38.116080 PCI: 00:12.0: enabled 0
1112 17:49:38.119554 PCI: 00:12.6: enabled 0
1113 17:49:38.123119 PCI: 00:12.7: enabled 0
1114 17:49:38.125757 PCI: 00:13.0: enabled 0
1115 17:49:38.126290 PCI: 00:14.0: enabled 1
1116 17:49:38.129017 USB0 port 0: enabled 1
1117 17:49:38.132869 USB2 port 0: enabled 1
1118 17:49:38.135972 USB2 port 1: enabled 0
1119 17:49:38.139122 USB2 port 2: enabled 1
1120 17:49:38.139603 USB2 port 3: enabled 0
1121 17:49:38.143129 USB2 port 4: enabled 0
1122 17:49:38.145935 USB2 port 5: enabled 1
1123 17:49:38.149030 USB2 port 6: enabled 0
1124 17:49:38.152958 USB2 port 7: enabled 0
1125 17:49:38.153705 USB2 port 8: enabled 1
1126 17:49:38.156147 USB2 port 9: enabled 1
1127 17:49:38.159284 USB3 port 0: enabled 1
1128 17:49:38.162936 USB3 port 1: enabled 0
1129 17:49:38.165757 USB3 port 2: enabled 0
1130 17:49:38.169073 USB3 port 3: enabled 0
1131 17:49:38.169727 PCI: 00:14.1: enabled 0
1132 17:49:38.172742 PCI: 00:14.2: enabled 1
1133 17:49:38.175943 PCI: 00:14.3: enabled 1
1134 17:49:38.179784 GENERIC: 0.0: enabled 1
1135 17:49:38.182681 PCI: 00:15.0: enabled 1
1136 17:49:38.183248 I2C: 00:1a: enabled 1
1137 17:49:38.186403 I2C: 00:31: enabled 1
1138 17:49:38.189434 I2C: 00:32: enabled 1
1139 17:49:38.192780 PCI: 00:15.1: enabled 1
1140 17:49:38.193308 I2C: 00:50: enabled 1
1141 17:49:38.196358 PCI: 00:15.2: enabled 0
1142 17:49:38.199472 PCI: 00:15.3: enabled 1
1143 17:49:38.202437 I2C: 00:10: enabled 1
1144 17:49:38.205804 PCI: 00:16.0: enabled 1
1145 17:49:38.206283 PCI: 00:16.1: enabled 0
1146 17:49:38.209362 PCI: 00:16.2: enabled 0
1147 17:49:38.212253 PCI: 00:16.3: enabled 0
1148 17:49:38.215817 PCI: 00:16.4: enabled 0
1149 17:49:38.219314 PCI: 00:16.5: enabled 0
1150 17:49:38.220018 PCI: 00:17.0: enabled 1
1151 17:49:38.222499 PCI: 00:19.0: enabled 0
1152 17:49:38.226033 PCI: 00:19.1: enabled 1
1153 17:49:38.229131 I2C: 00:15: enabled 1
1154 17:49:38.229579 I2C: 00:2c: enabled 1
1155 17:49:38.232630 PCI: 00:19.2: enabled 0
1156 17:49:38.236127 PCI: 00:1a.0: enabled 0
1157 17:49:38.239070 PCI: 00:1e.0: enabled 1
1158 17:49:38.242492 PCI: 00:1e.1: enabled 0
1159 17:49:38.243019 PCI: 00:1e.2: enabled 0
1160 17:49:38.246341 PCI: 00:1e.3: enabled 1
1161 17:49:38.249649 SPI: 00: enabled 1
1162 17:49:38.253144 PCI: 00:1f.0: enabled 1
1163 17:49:38.253714 PNP: 0c09.0: enabled 1
1164 17:49:38.255921 PCI: 00:1f.1: enabled 0
1165 17:49:38.259523 PCI: 00:1f.2: enabled 1
1166 17:49:38.262665 GENERIC: 0.0: enabled 1
1167 17:49:38.265769 GENERIC: 0.0: enabled 1
1168 17:49:38.269420 GENERIC: 1.0: enabled 1
1169 17:49:38.269845 PCI: 00:1f.3: enabled 1
1170 17:49:38.273168 PCI: 00:1f.4: enabled 0
1171 17:49:38.276085 PCI: 00:1f.5: enabled 1
1172 17:49:38.279541 PCI: 00:1f.6: enabled 0
1173 17:49:38.282328 PCI: 00:1f.7: enabled 0
1174 17:49:38.282903 Root Device scanning...
1175 17:49:38.285907 scan_static_bus for Root Device
1176 17:49:38.289631 CPU_CLUSTER: 0 enabled
1177 17:49:38.293007 DOMAIN: 0000 enabled
1178 17:49:38.293495 DOMAIN: 0000 scanning...
1179 17:49:38.295896 PCI: pci_scan_bus for bus 00
1180 17:49:38.299390 PCI: 00:00.0 [8086/0000] ops
1181 17:49:38.302860 PCI: 00:00.0 [8086/4609] enabled
1182 17:49:38.305723 PCI: 00:02.0 [8086/0000] bus ops
1183 17:49:38.309018 PCI: 00:02.0 [8086/46b3] enabled
1184 17:49:38.312569 PCI: 00:04.0 [8086/0000] bus ops
1185 17:49:38.315795 PCI: 00:04.0 [8086/461d] enabled
1186 17:49:38.319379 PCI: 00:06.0 [8086/0000] bus ops
1187 17:49:38.322762 PCI: 00:06.0 [8086/464d] enabled
1188 17:49:38.325709 PCI: 00:08.0 [8086/464f] disabled
1189 17:49:38.329151 PCI: 00:0a.0 [8086/467d] enabled
1190 17:49:38.333047 PCI: 00:0d.0 [8086/0000] bus ops
1191 17:49:38.336344 PCI: 00:0d.0 [8086/461e] enabled
1192 17:49:38.339575 PCI: 00:14.0 [8086/0000] bus ops
1193 17:49:38.342404 PCI: 00:14.0 [8086/51ed] enabled
1194 17:49:38.345947 PCI: 00:14.2 [8086/51ef] enabled
1195 17:49:38.349598 PCI: 00:14.3 [8086/0000] bus ops
1196 17:49:38.352692 PCI: 00:14.3 [8086/51f0] enabled
1197 17:49:38.355899 PCI: 00:15.0 [8086/0000] bus ops
1198 17:49:38.359362 PCI: 00:15.0 [8086/51e8] enabled
1199 17:49:38.362315 PCI: 00:15.1 [8086/0000] bus ops
1200 17:49:38.365857 PCI: 00:15.1 [8086/51e9] enabled
1201 17:49:38.369291 PCI: 00:15.2 [8086/0000] bus ops
1202 17:49:38.372781 PCI: 00:15.2 [8086/51ea] disabled
1203 17:49:38.376026 PCI: 00:15.3 [8086/0000] bus ops
1204 17:49:38.379401 PCI: 00:15.3 [8086/51eb] enabled
1205 17:49:38.382556 PCI: 00:16.0 [8086/0000] ops
1206 17:49:38.386025 PCI: 00:16.0 [8086/51e0] enabled
1207 17:49:38.392658 PCI: Static device PCI: 00:17.0 not found, disabling it.
1208 17:49:38.395733 PCI: 00:19.0 [8086/0000] bus ops
1209 17:49:38.399177 PCI: 00:19.0 [8086/51c5] disabled
1210 17:49:38.402681 PCI: 00:19.1 [8086/0000] bus ops
1211 17:49:38.405638 PCI: 00:19.1 [8086/51c6] enabled
1212 17:49:38.409218 PCI: 00:1e.0 [8086/0000] ops
1213 17:49:38.412674 PCI: 00:1e.0 [8086/51a8] enabled
1214 17:49:38.415600 PCI: 00:1e.3 [8086/0000] bus ops
1215 17:49:38.419892 PCI: 00:1e.3 [8086/51ab] enabled
1216 17:49:38.422657 PCI: 00:1f.0 [8086/0000] bus ops
1217 17:49:38.426202 PCI: 00:1f.0 [8086/5182] enabled
1218 17:49:38.429108 RTC Init
1219 17:49:38.433052 Set power on after power failure.
1220 17:49:38.433527 Disabling Deep S3
1221 17:49:38.435689 Disabling Deep S3
1222 17:49:38.439176 Disabling Deep S4
1223 17:49:38.439795 Disabling Deep S4
1224 17:49:38.442201 Disabling Deep S5
1225 17:49:38.442672 Disabling Deep S5
1226 17:49:38.445569 PCI: 00:1f.2 [0000/0000] hidden
1227 17:49:38.448911 PCI: 00:1f.3 [8086/0000] bus ops
1228 17:49:38.452521 PCI: 00:1f.3 [8086/51c8] enabled
1229 17:49:38.455818 PCI: 00:1f.5 [8086/0000] bus ops
1230 17:49:38.458830 PCI: 00:1f.5 [8086/51a4] enabled
1231 17:49:38.462468 GPIO: 0 enabled
1232 17:49:38.465513 PCI: Leftover static devices:
1233 17:49:38.466072 PCI: 00:01.0
1234 17:49:38.466561 PCI: 00:01.1
1235 17:49:38.468567 PCI: 00:05.0
1236 17:49:38.469059 PCI: 00:06.2
1237 17:49:38.472097 PCI: 00:09.0
1238 17:49:38.472522 PCI: 00:0d.1
1239 17:49:38.472857 PCI: 00:0d.2
1240 17:49:38.475336 PCI: 00:0d.3
1241 17:49:38.475760 PCI: 00:0e.0
1242 17:49:38.478740 PCI: 00:10.0
1243 17:49:38.479167 PCI: 00:10.1
1244 17:49:38.482526 PCI: 00:10.6
1245 17:49:38.482944 PCI: 00:10.7
1246 17:49:38.483276 PCI: 00:12.0
1247 17:49:38.485544 PCI: 00:12.6
1248 17:49:38.486063 PCI: 00:12.7
1249 17:49:38.488771 PCI: 00:13.0
1250 17:49:38.489239 PCI: 00:14.1
1251 17:49:38.489718 PCI: 00:16.1
1252 17:49:38.492417 PCI: 00:16.2
1253 17:49:38.492834 PCI: 00:16.3
1254 17:49:38.495764 PCI: 00:16.4
1255 17:49:38.496287 PCI: 00:16.5
1256 17:49:38.496622 PCI: 00:17.0
1257 17:49:38.498612 PCI: 00:19.2
1258 17:49:38.499032 PCI: 00:1a.0
1259 17:49:38.502031 PCI: 00:1e.1
1260 17:49:38.502451 PCI: 00:1e.2
1261 17:49:38.505482 PCI: 00:1f.1
1262 17:49:38.505903 PCI: 00:1f.4
1263 17:49:38.506232 PCI: 00:1f.6
1264 17:49:38.508487 PCI: 00:1f.7
1265 17:49:38.512111 PCI: Check your devicetree.cb.
1266 17:49:38.512491 PCI: 00:02.0 scanning...
1267 17:49:38.515985 scan_generic_bus for PCI: 00:02.0
1268 17:49:38.522324 scan_generic_bus for PCI: 00:02.0 done
1269 17:49:38.525288 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1270 17:49:38.528637 PCI: 00:04.0 scanning...
1271 17:49:38.532205 scan_generic_bus for PCI: 00:04.0
1272 17:49:38.535236 GENERIC: 0.0 enabled
1273 17:49:38.538565 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1274 17:49:38.545131 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1275 17:49:38.548888 PCI: 00:06.0 scanning...
1276 17:49:38.552321 do_pci_scan_bridge for PCI: 00:06.0
1277 17:49:38.555563 PCI: pci_scan_bus for bus 01
1278 17:49:38.559383 PCI: 01:00.0 [15b7/5009] enabled
1279 17:49:38.562110 Enabling Common Clock Configuration
1280 17:49:38.565556 L1 Sub-State supported from root port 6
1281 17:49:38.569083 L1 Sub-State Support = 0x5
1282 17:49:38.572023 CommonModeRestoreTime = 0x6e
1283 17:49:38.575705 Power On Value = 0x5, Power On Scale = 0x2
1284 17:49:38.576312 ASPM: Enabled L1
1285 17:49:38.581859 PCIe: Max_Payload_Size adjusted to 256
1286 17:49:38.582415 PCI: 01:00.0: Enabled LTR
1287 17:49:38.588476 PCI: 01:00.0: Programmed LTR max latencies
1288 17:49:38.592118 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1289 17:49:38.595184 PCI: 00:0d.0 scanning...
1290 17:49:38.598806 scan_static_bus for PCI: 00:0d.0
1291 17:49:38.601835 USB0 port 0 enabled
1292 17:49:38.602311 USB0 port 0 scanning...
1293 17:49:38.605088 scan_static_bus for USB0 port 0
1294 17:49:38.608459 USB3 port 0 enabled
1295 17:49:38.608883 USB3 port 1 disabled
1296 17:49:38.612266 USB3 port 2 enabled
1297 17:49:38.615323 USB3 port 3 disabled
1298 17:49:38.615817 USB3 port 0 scanning...
1299 17:49:38.618664 scan_static_bus for USB3 port 0
1300 17:49:38.625073 scan_static_bus for USB3 port 0 done
1301 17:49:38.628683 scan_bus: bus USB3 port 0 finished in 6 msecs
1302 17:49:38.631802 USB3 port 2 scanning...
1303 17:49:38.634824 scan_static_bus for USB3 port 2
1304 17:49:38.638671 scan_static_bus for USB3 port 2 done
1305 17:49:38.641562 scan_bus: bus USB3 port 2 finished in 6 msecs
1306 17:49:38.645255 scan_static_bus for USB0 port 0 done
1307 17:49:38.651552 scan_bus: bus USB0 port 0 finished in 43 msecs
1308 17:49:38.655532 scan_static_bus for PCI: 00:0d.0 done
1309 17:49:38.658570 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1310 17:49:38.661671 PCI: 00:14.0 scanning...
1311 17:49:38.664910 scan_static_bus for PCI: 00:14.0
1312 17:49:38.668628 USB0 port 0 enabled
1313 17:49:38.669141 USB0 port 0 scanning...
1314 17:49:38.671468 scan_static_bus for USB0 port 0
1315 17:49:38.675006 USB2 port 0 enabled
1316 17:49:38.678088 USB2 port 1 disabled
1317 17:49:38.678564 USB2 port 2 enabled
1318 17:49:38.681739 USB2 port 3 disabled
1319 17:49:38.685172 USB2 port 4 disabled
1320 17:49:38.685648 USB2 port 5 enabled
1321 17:49:38.688282 USB2 port 6 disabled
1322 17:49:38.688750 USB2 port 7 disabled
1323 17:49:38.691605 USB2 port 8 enabled
1324 17:49:38.694683 USB2 port 9 enabled
1325 17:49:38.695155 USB3 port 0 enabled
1326 17:49:38.698064 USB3 port 1 disabled
1327 17:49:38.701425 USB3 port 2 disabled
1328 17:49:38.702056 USB3 port 3 disabled
1329 17:49:38.704872 USB2 port 0 scanning...
1330 17:49:38.708490 scan_static_bus for USB2 port 0
1331 17:49:38.711412 scan_static_bus for USB2 port 0 done
1332 17:49:38.715480 scan_bus: bus USB2 port 0 finished in 6 msecs
1333 17:49:38.717984 USB2 port 2 scanning...
1334 17:49:38.721550 scan_static_bus for USB2 port 2
1335 17:49:38.725274 scan_static_bus for USB2 port 2 done
1336 17:49:38.731520 scan_bus: bus USB2 port 2 finished in 6 msecs
1337 17:49:38.732048 USB2 port 5 scanning...
1338 17:49:38.734808 scan_static_bus for USB2 port 5
1339 17:49:38.738404 scan_static_bus for USB2 port 5 done
1340 17:49:38.745286 scan_bus: bus USB2 port 5 finished in 6 msecs
1341 17:49:38.748218 USB2 port 8 scanning...
1342 17:49:38.751487 scan_static_bus for USB2 port 8
1343 17:49:38.754916 scan_static_bus for USB2 port 8 done
1344 17:49:38.757978 scan_bus: bus USB2 port 8 finished in 6 msecs
1345 17:49:38.761062 USB2 port 9 scanning...
1346 17:49:38.764653 scan_static_bus for USB2 port 9
1347 17:49:38.767995 scan_static_bus for USB2 port 9 done
1348 17:49:38.771429 scan_bus: bus USB2 port 9 finished in 6 msecs
1349 17:49:38.774339 USB3 port 0 scanning...
1350 17:49:38.777786 scan_static_bus for USB3 port 0
1351 17:49:38.781317 scan_static_bus for USB3 port 0 done
1352 17:49:38.784515 scan_bus: bus USB3 port 0 finished in 6 msecs
1353 17:49:38.791234 scan_static_bus for USB0 port 0 done
1354 17:49:38.794521 scan_bus: bus USB0 port 0 finished in 120 msecs
1355 17:49:38.797820 scan_static_bus for PCI: 00:14.0 done
1356 17:49:38.804548 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1357 17:49:38.805137 PCI: 00:14.3 scanning...
1358 17:49:38.808067 scan_static_bus for PCI: 00:14.3
1359 17:49:38.811264 GENERIC: 0.0 enabled
1360 17:49:38.814829 scan_static_bus for PCI: 00:14.3 done
1361 17:49:38.821373 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1362 17:49:38.821903 PCI: 00:15.0 scanning...
1363 17:49:38.824747 scan_static_bus for PCI: 00:15.0
1364 17:49:38.827761 I2C: 00:1a enabled
1365 17:49:38.831703 I2C: 00:31 enabled
1366 17:49:38.832275 I2C: 00:32 enabled
1367 17:49:38.834380 scan_static_bus for PCI: 00:15.0 done
1368 17:49:38.841326 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1369 17:49:38.841964 PCI: 00:15.1 scanning...
1370 17:49:38.844367 scan_static_bus for PCI: 00:15.1
1371 17:49:38.848066 I2C: 00:50 enabled
1372 17:49:38.850978 scan_static_bus for PCI: 00:15.1 done
1373 17:49:38.857426 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1374 17:49:38.857852 PCI: 00:15.3 scanning...
1375 17:49:38.861034 scan_static_bus for PCI: 00:15.3
1376 17:49:38.863973 I2C: 00:10 enabled
1377 17:49:38.867434 scan_static_bus for PCI: 00:15.3 done
1378 17:49:38.874600 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1379 17:49:38.875132 PCI: 00:19.1 scanning...
1380 17:49:38.877472 scan_static_bus for PCI: 00:19.1
1381 17:49:38.881562 I2C: 00:15 enabled
1382 17:49:38.882098 I2C: 00:2c enabled
1383 17:49:38.887701 scan_static_bus for PCI: 00:19.1 done
1384 17:49:38.890716 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1385 17:49:38.894620 PCI: 00:1e.3 scanning...
1386 17:49:38.897609 scan_generic_bus for PCI: 00:1e.3
1387 17:49:38.898081 SPI: 00 enabled
1388 17:49:38.904386 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1389 17:49:38.911202 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1390 17:49:38.911796 PCI: 00:1f.0 scanning...
1391 17:49:38.914635 scan_static_bus for PCI: 00:1f.0
1392 17:49:38.917751 PNP: 0c09.0 enabled
1393 17:49:38.920731 PNP: 0c09.0 scanning...
1394 17:49:38.924176 scan_static_bus for PNP: 0c09.0
1395 17:49:38.927573 scan_static_bus for PNP: 0c09.0 done
1396 17:49:38.930845 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1397 17:49:38.934125 scan_static_bus for PCI: 00:1f.0 done
1398 17:49:38.941180 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1399 17:49:38.944287 PCI: 00:1f.2 scanning...
1400 17:49:38.947717 scan_static_bus for PCI: 00:1f.2
1401 17:49:38.948245 GENERIC: 0.0 enabled
1402 17:49:38.950899 GENERIC: 0.0 scanning...
1403 17:49:38.954714 scan_static_bus for GENERIC: 0.0
1404 17:49:38.957852 GENERIC: 0.0 enabled
1405 17:49:38.958417 GENERIC: 1.0 enabled
1406 17:49:38.961379 scan_static_bus for GENERIC: 0.0 done
1407 17:49:38.967449 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1408 17:49:38.970967 scan_static_bus for PCI: 00:1f.2 done
1409 17:49:38.974345 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1410 17:49:38.977330 PCI: 00:1f.3 scanning...
1411 17:49:38.981219 scan_static_bus for PCI: 00:1f.3
1412 17:49:38.984012 scan_static_bus for PCI: 00:1f.3 done
1413 17:49:38.990711 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1414 17:49:38.991136 PCI: 00:1f.5 scanning...
1415 17:49:38.997484 scan_generic_bus for PCI: 00:1f.5
1416 17:49:39.000587 scan_generic_bus for PCI: 00:1f.5 done
1417 17:49:39.003714 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1418 17:49:39.010261 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1419 17:49:39.013623 scan_static_bus for Root Device done
1420 17:49:39.016938 scan_bus: bus Root Device finished in 729 msecs
1421 17:49:39.017503 done
1422 17:49:39.023849 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1423 17:49:39.030785 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1424 17:49:39.036918 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1425 17:49:39.040627 SPI flash protection: WPSW=1 SRP0=0
1426 17:49:39.043723 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1427 17:49:39.050339 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1428 17:49:39.054033 found VGA at PCI: 00:02.0
1429 17:49:39.057003 Setting up VGA for PCI: 00:02.0
1430 17:49:39.060446 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1431 17:49:39.067492 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1432 17:49:39.070133 Allocating resources...
1433 17:49:39.070562 Reading resources...
1434 17:49:39.073690 Root Device read_resources bus 0 link: 0
1435 17:49:39.079637 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1436 17:49:39.083428 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1437 17:49:39.089532 DOMAIN: 0000 read_resources bus 0 link: 0
1438 17:49:39.093240 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1439 17:49:39.099566 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1440 17:49:39.106423 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1441 17:49:39.113259 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1442 17:49:39.119438 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1443 17:49:39.126286 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1444 17:49:39.132661 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1445 17:49:39.139644 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1446 17:49:39.146289 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1447 17:49:39.152684 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1448 17:49:39.159366 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1449 17:49:39.162594 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1450 17:49:39.169721 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1451 17:49:39.176363 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1452 17:49:39.182791 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1453 17:49:39.189321 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1454 17:49:39.196263 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1455 17:49:39.203042 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1456 17:49:39.209416 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1457 17:49:39.215758 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1458 17:49:39.219387 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1459 17:49:39.225785 PCI: 00:04.0 read_resources bus 1 link: 0
1460 17:49:39.229290 PCI: 00:04.0 read_resources bus 1 link: 0 done
1461 17:49:39.232846 PCI: 00:06.0 read_resources bus 1 link: 0
1462 17:49:39.239399 PCI: 00:06.0 read_resources bus 1 link: 0 done
1463 17:49:39.242616 PCI: 00:0d.0 read_resources bus 0 link: 0
1464 17:49:39.246240 USB0 port 0 read_resources bus 0 link: 0
1465 17:49:39.252503 USB0 port 0 read_resources bus 0 link: 0 done
1466 17:49:39.255506 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1467 17:49:39.259114 PCI: 00:14.0 read_resources bus 0 link: 0
1468 17:49:39.265658 USB0 port 0 read_resources bus 0 link: 0
1469 17:49:39.269365 USB0 port 0 read_resources bus 0 link: 0 done
1470 17:49:39.272290 PCI: 00:14.0 read_resources bus 0 link: 0 done
1471 17:49:39.278952 PCI: 00:14.3 read_resources bus 0 link: 0
1472 17:49:39.282489 PCI: 00:14.3 read_resources bus 0 link: 0 done
1473 17:49:39.285416 PCI: 00:15.0 read_resources bus 0 link: 0
1474 17:49:39.292537 PCI: 00:15.0 read_resources bus 0 link: 0 done
1475 17:49:39.295589 PCI: 00:15.1 read_resources bus 0 link: 0
1476 17:49:39.302343 PCI: 00:15.1 read_resources bus 0 link: 0 done
1477 17:49:39.305605 PCI: 00:15.3 read_resources bus 0 link: 0
1478 17:49:39.308575 PCI: 00:15.3 read_resources bus 0 link: 0 done
1479 17:49:39.315291 PCI: 00:19.1 read_resources bus 0 link: 0
1480 17:49:39.319146 PCI: 00:19.1 read_resources bus 0 link: 0 done
1481 17:49:39.321977 PCI: 00:1e.3 read_resources bus 2 link: 0
1482 17:49:39.328670 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1483 17:49:39.332106 PCI: 00:1f.0 read_resources bus 0 link: 0
1484 17:49:39.338332 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1485 17:49:39.341582 PCI: 00:1f.2 read_resources bus 0 link: 0
1486 17:49:39.345469 GENERIC: 0.0 read_resources bus 0 link: 0
1487 17:49:39.351653 GENERIC: 0.0 read_resources bus 0 link: 0 done
1488 17:49:39.355028 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1489 17:49:39.361892 DOMAIN: 0000 read_resources bus 0 link: 0 done
1490 17:49:39.365048 Root Device read_resources bus 0 link: 0 done
1491 17:49:39.368367 Done reading resources.
1492 17:49:39.371494 Show resources in subtree (Root Device)...After reading.
1493 17:49:39.378191 Root Device child on link 0 CPU_CLUSTER: 0
1494 17:49:39.381641 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 17:49:39.381726 APIC: 00
1496 17:49:39.384677 APIC: 14
1497 17:49:39.384761 APIC: 16
1498 17:49:39.388278 APIC: 10
1499 17:49:39.388361 APIC: 12
1500 17:49:39.388427 APIC: 09
1501 17:49:39.391644 APIC: 01
1502 17:49:39.391728 APIC: 08
1503 17:49:39.394556 DOMAIN: 0000 child on link 0 GPIO: 0
1504 17:49:39.404891 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1505 17:49:39.414633 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1506 17:49:39.414719 GPIO: 0
1507 17:49:39.417975 PCI: 00:00.0
1508 17:49:39.427698 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1509 17:49:39.437876 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1510 17:49:39.444725 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1511 17:49:39.454396 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1512 17:49:39.464726 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1513 17:49:39.474581 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1514 17:49:39.484057 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1515 17:49:39.494558 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1516 17:49:39.501031 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1517 17:49:39.511008 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1518 17:49:39.520704 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1519 17:49:39.530602 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1520 17:49:39.540569 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1521 17:49:39.550601 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1522 17:49:39.557641 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1523 17:49:39.567199 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1524 17:49:39.577106 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1525 17:49:39.586893 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1526 17:49:39.597063 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1527 17:49:39.607196 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1528 17:49:39.617032 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1529 17:49:39.627094 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1530 17:49:39.633642 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1531 17:49:39.643648 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1532 17:49:39.653556 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1533 17:49:39.663419 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1534 17:49:39.673364 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1535 17:49:39.683116 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1536 17:49:39.683202 PCI: 00:02.0
1537 17:49:39.693226 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1538 17:49:39.706437 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1539 17:49:39.712935 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1540 17:49:39.716526 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1541 17:49:39.730012 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1542 17:49:39.730100 GENERIC: 0.0
1543 17:49:39.733362 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1544 17:49:39.743593 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1545 17:49:39.752901 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1546 17:49:39.762834 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1547 17:49:39.762920 PCI: 01:00.0
1548 17:49:39.772893 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1549 17:49:39.782981 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1550 17:49:39.786186 PCI: 00:08.0
1551 17:49:39.786271 PCI: 00:0a.0
1552 17:49:39.796727 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1553 17:49:39.803114 PCI: 00:0d.0 child on link 0 USB0 port 0
1554 17:49:39.812716 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1555 17:49:39.816273 USB0 port 0 child on link 0 USB3 port 0
1556 17:49:39.816348 USB3 port 0
1557 17:49:39.819843 USB3 port 1
1558 17:49:39.819917 USB3 port 2
1559 17:49:39.822644 USB3 port 3
1560 17:49:39.826144 PCI: 00:14.0 child on link 0 USB0 port 0
1561 17:49:39.836346 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1562 17:49:39.842827 USB0 port 0 child on link 0 USB2 port 0
1563 17:49:39.842903 USB2 port 0
1564 17:49:39.845930 USB2 port 1
1565 17:49:39.846002 USB2 port 2
1566 17:49:39.849482 USB2 port 3
1567 17:49:39.849561 USB2 port 4
1568 17:49:39.852960 USB2 port 5
1569 17:49:39.853045 USB2 port 6
1570 17:49:39.856071 USB2 port 7
1571 17:49:39.856141 USB2 port 8
1572 17:49:39.859620 USB2 port 9
1573 17:49:39.863322 USB3 port 0
1574 17:49:39.863411 USB3 port 1
1575 17:49:39.866185 USB3 port 2
1576 17:49:39.866256 USB3 port 3
1577 17:49:39.869398 PCI: 00:14.2
1578 17:49:39.879592 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1579 17:49:39.889437 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1580 17:49:39.892873 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1581 17:49:39.902655 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1582 17:49:39.902742 GENERIC: 0.0
1583 17:49:39.909097 PCI: 00:15.0 child on link 0 I2C: 00:1a
1584 17:49:39.919135 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1585 17:49:39.919225 I2C: 00:1a
1586 17:49:39.922826 I2C: 00:31
1587 17:49:39.922910 I2C: 00:32
1588 17:49:39.926113 PCI: 00:15.1 child on link 0 I2C: 00:50
1589 17:49:39.935828 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1590 17:49:39.939200 I2C: 00:50
1591 17:49:39.939284 PCI: 00:15.2
1592 17:49:39.945712 PCI: 00:15.3 child on link 0 I2C: 00:10
1593 17:49:39.955840 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1594 17:49:39.955930 I2C: 00:10
1595 17:49:39.959296 PCI: 00:16.0
1596 17:49:39.968878 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1597 17:49:39.968965 PCI: 00:19.0
1598 17:49:39.976163 PCI: 00:19.1 child on link 0 I2C: 00:15
1599 17:49:39.985575 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1600 17:49:39.985664 I2C: 00:15
1601 17:49:39.985731 I2C: 00:2c
1602 17:49:39.988918 PCI: 00:1e.0
1603 17:49:39.999355 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1604 17:49:40.005519 PCI: 00:1e.3 child on link 0 SPI: 00
1605 17:49:40.015441 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 17:49:40.015527 SPI: 00
1607 17:49:40.019166 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1608 17:49:40.028854 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1609 17:49:40.028940 PNP: 0c09.0
1610 17:49:40.039048 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1611 17:49:40.042422 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1612 17:49:40.051927 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1613 17:49:40.062519 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1614 17:49:40.065767 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1615 17:49:40.068912 GENERIC: 0.0
1616 17:49:40.069033 GENERIC: 1.0
1617 17:49:40.072361 PCI: 00:1f.3
1618 17:49:40.081816 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1619 17:49:40.091911 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1620 17:49:40.091997 PCI: 00:1f.5
1621 17:49:40.102129 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1622 17:49:40.108689 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1623 17:49:40.115111 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1624 17:49:40.121961 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1625 17:49:40.128772 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1626 17:49:40.131864 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1627 17:49:40.135048 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1628 17:49:40.145001 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1629 17:49:40.152116 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1630 17:49:40.158359 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1631 17:49:40.164840 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1632 17:49:40.171256 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1633 17:49:40.178315 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1634 17:49:40.188225 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1635 17:49:40.194728 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1636 17:49:40.197841 DOMAIN: 0000: Resource ranges:
1637 17:49:40.201541 * Base: 1000, Size: 800, Tag: 100
1638 17:49:40.204407 * Base: 1900, Size: e700, Tag: 100
1639 17:49:40.211146 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1640 17:49:40.217987 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1641 17:49:40.224396 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1642 17:49:40.231112 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1643 17:49:40.241087 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1644 17:49:40.248092 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1645 17:49:40.254051 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1646 17:49:40.260739 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1647 17:49:40.270922 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1648 17:49:40.277785 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1649 17:49:40.284000 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1650 17:49:40.293813 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1651 17:49:40.300895 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1652 17:49:40.307217 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1653 17:49:40.317711 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1654 17:49:40.324101 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1655 17:49:40.330920 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1656 17:49:40.340211 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1657 17:49:40.347193 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1658 17:49:40.354032 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1659 17:49:40.363564 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1660 17:49:40.370129 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1661 17:49:40.376863 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1662 17:49:40.386941 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1663 17:49:40.393505 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1664 17:49:40.400161 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1665 17:49:40.410182 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1666 17:49:40.416771 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1667 17:49:40.423730 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1668 17:49:40.433608 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1669 17:49:40.440024 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1670 17:49:40.446512 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1671 17:49:40.456436 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1672 17:49:40.459679 DOMAIN: 0000: Resource ranges:
1673 17:49:40.463320 * Base: 80400000, Size: 3fc00000, Tag: 200
1674 17:49:40.466551 * Base: d0000000, Size: 28000000, Tag: 200
1675 17:49:40.473408 * Base: fa000000, Size: 1000000, Tag: 200
1676 17:49:40.476551 * Base: fb001000, Size: 17ff000, Tag: 200
1677 17:49:40.479652 * Base: fe800000, Size: 300000, Tag: 200
1678 17:49:40.483161 * Base: feb80000, Size: 80000, Tag: 200
1679 17:49:40.489891 * Base: fed00000, Size: 40000, Tag: 200
1680 17:49:40.492957 * Base: fed70000, Size: 10000, Tag: 200
1681 17:49:40.495957 * Base: fed88000, Size: 8000, Tag: 200
1682 17:49:40.499770 * Base: fed93000, Size: d000, Tag: 200
1683 17:49:40.502648 * Base: feda2000, Size: 1e000, Tag: 200
1684 17:49:40.509349 * Base: fede0000, Size: 1220000, Tag: 200
1685 17:49:40.512860 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1686 17:49:40.519657 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1687 17:49:40.525834 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1688 17:49:40.532395 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1689 17:49:40.539296 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1690 17:49:40.546230 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1691 17:49:40.552302 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1692 17:49:40.559320 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1693 17:49:40.565713 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1694 17:49:40.572606 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1695 17:49:40.579332 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1696 17:49:40.585937 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1697 17:49:40.592051 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1698 17:49:40.598972 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1699 17:49:40.606038 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1700 17:49:40.612380 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1701 17:49:40.618887 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1702 17:49:40.625561 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1703 17:49:40.632507 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1704 17:49:40.638840 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1705 17:49:40.648871 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1706 17:49:40.655544 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1707 17:49:40.658629 PCI: 00:06.0: Resource ranges:
1708 17:49:40.661724 * Base: 80400000, Size: 100000, Tag: 200
1709 17:49:40.668627 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1710 17:49:40.675311 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1711 17:49:40.685099 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1712 17:49:40.692099 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1713 17:49:40.695093 Root Device assign_resources, bus 0 link: 0
1714 17:49:40.701773 DOMAIN: 0000 assign_resources, bus 0 link: 0
1715 17:49:40.708393 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1716 17:49:40.718374 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1717 17:49:40.725275 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1718 17:49:40.731838 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1719 17:49:40.738262 PCI: 00:04.0 assign_resources, bus 1 link: 0
1720 17:49:40.741435 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1721 17:49:40.751723 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1722 17:49:40.761450 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1723 17:49:40.768230 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1724 17:49:40.775004 PCI: 00:06.0 assign_resources, bus 1 link: 0
1725 17:49:40.781502 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1726 17:49:40.788171 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1727 17:49:40.794466 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1728 17:49:40.801529 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1729 17:49:40.811163 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1730 17:49:40.814373 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1731 17:49:40.821114 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1732 17:49:40.827975 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1733 17:49:40.831342 PCI: 00:14.0 assign_resources, bus 0 link: 0
1734 17:49:40.838081 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1735 17:49:40.844663 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1736 17:49:40.854450 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1737 17:49:40.861330 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1738 17:49:40.867906 PCI: 00:14.3 assign_resources, bus 0 link: 0
1739 17:49:40.870810 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1740 17:49:40.877632 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1741 17:49:40.884280 PCI: 00:15.0 assign_resources, bus 0 link: 0
1742 17:49:40.887585 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1743 17:49:40.897330 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1744 17:49:40.900348 PCI: 00:15.1 assign_resources, bus 0 link: 0
1745 17:49:40.907221 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1746 17:49:40.914356 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1747 17:49:40.917268 PCI: 00:15.3 assign_resources, bus 0 link: 0
1748 17:49:40.923861 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1749 17:49:40.930470 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1750 17:49:40.940194 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1751 17:49:40.943661 PCI: 00:19.1 assign_resources, bus 0 link: 0
1752 17:49:40.950223 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1753 17:49:40.956888 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1754 17:49:40.960752 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1755 17:49:40.967359 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1756 17:49:40.970516 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1757 17:49:40.976725 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1758 17:49:40.980548 LPC: Trying to open IO window from 800 size 1ff
1759 17:49:40.990092 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1760 17:49:40.996696 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1761 17:49:41.003721 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1762 17:49:41.010231 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1763 17:49:41.013349 Root Device assign_resources, bus 0 link: 0 done
1764 17:49:41.016836 Done setting resources.
1765 17:49:41.023382 Show resources in subtree (Root Device)...After assigning values.
1766 17:49:41.026599 Root Device child on link 0 CPU_CLUSTER: 0
1767 17:49:41.033222 CPU_CLUSTER: 0 child on link 0 APIC: 00
1768 17:49:41.033310 APIC: 00
1769 17:49:41.033379 APIC: 14
1770 17:49:41.036859 APIC: 16
1771 17:49:41.036979 APIC: 10
1772 17:49:41.037078 APIC: 12
1773 17:49:41.039907 APIC: 09
1774 17:49:41.039993 APIC: 01
1775 17:49:41.043478 APIC: 08
1776 17:49:41.046827 DOMAIN: 0000 child on link 0 GPIO: 0
1777 17:49:41.056349 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1778 17:49:41.066644 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1779 17:49:41.066776 GPIO: 0
1780 17:49:41.066892 PCI: 00:00.0
1781 17:49:41.076622 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1782 17:49:41.086175 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1783 17:49:41.096283 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1784 17:49:41.106793 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1785 17:49:41.116061 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1786 17:49:41.125912 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1787 17:49:41.132716 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1788 17:49:41.142633 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1789 17:49:41.152452 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1790 17:49:41.162401 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1791 17:49:41.171968 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1792 17:49:41.182395 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1793 17:49:41.192608 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1794 17:49:41.198599 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1795 17:49:41.208804 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1796 17:49:41.218829 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1797 17:49:41.228867 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1798 17:49:41.238930 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1799 17:49:41.248520 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1800 17:49:41.258248 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1801 17:49:41.268570 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1802 17:49:41.274818 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1803 17:49:41.284827 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1804 17:49:41.295259 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1805 17:49:41.305062 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1806 17:49:41.314731 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1807 17:49:41.325036 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1808 17:49:41.334925 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1809 17:49:41.335012 PCI: 00:02.0
1810 17:49:41.344995 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1811 17:49:41.358352 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1812 17:49:41.364990 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1813 17:49:41.371047 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1814 17:49:41.381326 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1815 17:49:41.381444 GENERIC: 0.0
1816 17:49:41.388116 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1817 17:49:41.397665 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1818 17:49:41.407799 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1819 17:49:41.418045 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1820 17:49:41.421142 PCI: 01:00.0
1821 17:49:41.431139 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1822 17:49:41.441372 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1823 17:49:41.441464 PCI: 00:08.0
1824 17:49:41.444225 PCI: 00:0a.0
1825 17:49:41.454561 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1826 17:49:41.457430 PCI: 00:0d.0 child on link 0 USB0 port 0
1827 17:49:41.470924 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1828 17:49:41.474376 USB0 port 0 child on link 0 USB3 port 0
1829 17:49:41.474477 USB3 port 0
1830 17:49:41.477315 USB3 port 1
1831 17:49:41.477412 USB3 port 2
1832 17:49:41.480990 USB3 port 3
1833 17:49:41.484118 PCI: 00:14.0 child on link 0 USB0 port 0
1834 17:49:41.493934 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1835 17:49:41.500718 USB0 port 0 child on link 0 USB2 port 0
1836 17:49:41.500828 USB2 port 0
1837 17:49:41.504116 USB2 port 1
1838 17:49:41.504204 USB2 port 2
1839 17:49:41.507101 USB2 port 3
1840 17:49:41.507213 USB2 port 4
1841 17:49:41.510875 USB2 port 5
1842 17:49:41.513724 USB2 port 6
1843 17:49:41.513831 USB2 port 7
1844 17:49:41.517723 USB2 port 8
1845 17:49:41.517806 USB2 port 9
1846 17:49:41.520311 USB3 port 0
1847 17:49:41.520394 USB3 port 1
1848 17:49:41.523528 USB3 port 2
1849 17:49:41.523644 USB3 port 3
1850 17:49:41.526983 PCI: 00:14.2
1851 17:49:41.537417 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1852 17:49:41.547091 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1853 17:49:41.550542 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1854 17:49:41.564068 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1855 17:49:41.564161 GENERIC: 0.0
1856 17:49:41.566735 PCI: 00:15.0 child on link 0 I2C: 00:1a
1857 17:49:41.576599 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1858 17:49:41.580043 I2C: 00:1a
1859 17:49:41.580129 I2C: 00:31
1860 17:49:41.583154 I2C: 00:32
1861 17:49:41.587152 PCI: 00:15.1 child on link 0 I2C: 00:50
1862 17:49:41.596677 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1863 17:49:41.600260 I2C: 00:50
1864 17:49:41.600347 PCI: 00:15.2
1865 17:49:41.606656 PCI: 00:15.3 child on link 0 I2C: 00:10
1866 17:49:41.616869 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1867 17:49:41.616959 I2C: 00:10
1868 17:49:41.620128 PCI: 00:16.0
1869 17:49:41.629941 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1870 17:49:41.630030 PCI: 00:19.0
1871 17:49:41.636602 PCI: 00:19.1 child on link 0 I2C: 00:15
1872 17:49:41.646352 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1873 17:49:41.646440 I2C: 00:15
1874 17:49:41.649955 I2C: 00:2c
1875 17:49:41.650041 PCI: 00:1e.0
1876 17:49:41.659657 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1877 17:49:41.666917 PCI: 00:1e.3 child on link 0 SPI: 00
1878 17:49:41.676127 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1879 17:49:41.676228 SPI: 00
1880 17:49:41.683044 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1881 17:49:41.689581 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1882 17:49:41.693154 PNP: 0c09.0
1883 17:49:41.699478 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1884 17:49:41.705983 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1885 17:49:41.716199 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1886 17:49:41.722781 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1887 17:49:41.729444 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1888 17:49:41.729533 GENERIC: 0.0
1889 17:49:41.732979 GENERIC: 1.0
1890 17:49:41.733095 PCI: 00:1f.3
1891 17:49:41.742611 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1892 17:49:41.755873 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1893 17:49:41.756009 PCI: 00:1f.5
1894 17:49:41.765836 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1895 17:49:41.769307 Done allocating resources.
1896 17:49:41.775960 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1897 17:49:41.782246 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1898 17:49:41.785417 Configure audio over I2S with MAX98373 NAU88L25B.
1899 17:49:41.790029 Enabling BT offload
1900 17:49:41.797586 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1901 17:49:41.800583 Enabling resources...
1902 17:49:41.804003 PCI: 00:00.0 subsystem <- 8086/4609
1903 17:49:41.807675 PCI: 00:00.0 cmd <- 06
1904 17:49:41.810629 PCI: 00:02.0 subsystem <- 8086/46b3
1905 17:49:41.814696 PCI: 00:02.0 cmd <- 03
1906 17:49:41.817676 PCI: 00:04.0 subsystem <- 8086/461d
1907 17:49:41.817761 PCI: 00:04.0 cmd <- 02
1908 17:49:41.820585 PCI: 00:06.0 bridge ctrl <- 0013
1909 17:49:41.824236 PCI: 00:06.0 subsystem <- 8086/464d
1910 17:49:41.827220 PCI: 00:06.0 cmd <- 106
1911 17:49:41.830888 PCI: 00:0a.0 subsystem <- 8086/467d
1912 17:49:41.833904 PCI: 00:0a.0 cmd <- 02
1913 17:49:41.837622 PCI: 00:0d.0 subsystem <- 8086/461e
1914 17:49:41.840694 PCI: 00:0d.0 cmd <- 02
1915 17:49:41.844373 PCI: 00:14.0 subsystem <- 8086/51ed
1916 17:49:41.847397 PCI: 00:14.0 cmd <- 02
1917 17:49:41.851084 PCI: 00:14.2 subsystem <- 8086/51ef
1918 17:49:41.851171 PCI: 00:14.2 cmd <- 02
1919 17:49:41.854129 PCI: 00:14.3 subsystem <- 8086/51f0
1920 17:49:41.857307 PCI: 00:14.3 cmd <- 02
1921 17:49:41.860375 PCI: 00:15.0 subsystem <- 8086/51e8
1922 17:49:41.864015 PCI: 00:15.0 cmd <- 02
1923 17:49:41.867845 PCI: 00:15.1 subsystem <- 8086/51e9
1924 17:49:41.870645 PCI: 00:15.1 cmd <- 06
1925 17:49:41.873636 PCI: 00:15.3 subsystem <- 8086/51eb
1926 17:49:41.877416 PCI: 00:15.3 cmd <- 02
1927 17:49:41.880384 PCI: 00:16.0 subsystem <- 8086/51e0
1928 17:49:41.880474 PCI: 00:16.0 cmd <- 02
1929 17:49:41.883962 PCI: 00:19.1 subsystem <- 8086/51c6
1930 17:49:41.887249 PCI: 00:19.1 cmd <- 02
1931 17:49:41.890791 PCI: 00:1e.0 subsystem <- 8086/51a8
1932 17:49:41.893803 PCI: 00:1e.0 cmd <- 06
1933 17:49:41.897232 PCI: 00:1e.3 subsystem <- 8086/51ab
1934 17:49:41.900654 PCI: 00:1e.3 cmd <- 02
1935 17:49:41.904067 PCI: 00:1f.0 subsystem <- 8086/5182
1936 17:49:41.907118 PCI: 00:1f.0 cmd <- 407
1937 17:49:41.910857 PCI: 00:1f.3 subsystem <- 8086/51c8
1938 17:49:41.910947 PCI: 00:1f.3 cmd <- 02
1939 17:49:41.913724 PCI: 00:1f.5 subsystem <- 8086/51a4
1940 17:49:41.917131 PCI: 00:1f.5 cmd <- 406
1941 17:49:41.920719 PCI: 01:00.0 cmd <- 02
1942 17:49:41.920805 done.
1943 17:49:41.927125 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1944 17:49:41.930694 ME: Version: Unavailable
1945 17:49:41.933673 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1946 17:49:41.936977 Initializing devices...
1947 17:49:41.940317 Root Device init
1948 17:49:41.940407 mainboard: EC init
1949 17:49:41.946941 Chrome EC: Set SMI mask to 0x0000000000000000
1950 17:49:41.947032 Chrome EC: UHEPI supported
1951 17:49:41.954294 Chrome EC: clear events_b mask to 0x0000000000000000
1952 17:49:41.960921 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1953 17:49:41.967666 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1954 17:49:41.974370 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1955 17:49:41.977896 Chrome EC: Set WAKE mask to 0x0000000000000000
1956 17:49:41.981002 Root Device init finished in 38 msecs
1957 17:49:41.983963 PCI: 00:00.0 init
1958 17:49:41.987340 CPU TDP = 15 Watts
1959 17:49:41.987425 CPU PL1 = 15 Watts
1960 17:49:41.990576 CPU PL2 = 55 Watts
1961 17:49:41.994211 CPU PL4 = 123 Watts
1962 17:49:41.997297 PCI: 00:00.0 init finished in 8 msecs
1963 17:49:41.997379 PCI: 00:02.0 init
1964 17:49:42.000639 GMA: Found VBT in CBFS
1965 17:49:42.004144 GMA: Found valid VBT in CBFS
1966 17:49:42.011196 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1967 17:49:42.017042 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1968 17:49:42.020367 PCI: 00:02.0 init finished in 18 msecs
1969 17:49:42.023703 PCI: 00:06.0 init
1970 17:49:42.027105 Initializing PCH PCIe bridge.
1971 17:49:42.030553 PCI: 00:06.0 init finished in 3 msecs
1972 17:49:42.030636 PCI: 00:0a.0 init
1973 17:49:42.033579 PCI: 00:0a.0 init finished in 0 msecs
1974 17:49:42.036896 PCI: 00:14.0 init
1975 17:49:42.040585 PCI: 00:14.0 init finished in 0 msecs
1976 17:49:42.043768 PCI: 00:14.2 init
1977 17:49:42.047220 PCI: 00:14.2 init finished in 0 msecs
1978 17:49:42.047299 PCI: 00:15.0 init
1979 17:49:42.050290 I2C bus 0 version 0x3230302a
1980 17:49:42.053794 DW I2C bus 0 at 0x80655000 (400 KHz)
1981 17:49:42.060033 PCI: 00:15.0 init finished in 6 msecs
1982 17:49:42.060144 PCI: 00:15.1 init
1983 17:49:42.063318 I2C bus 1 version 0x3230302a
1984 17:49:42.066729 DW I2C bus 1 at 0x80656000 (400 KHz)
1985 17:49:42.070392 PCI: 00:15.1 init finished in 6 msecs
1986 17:49:42.073557 PCI: 00:15.3 init
1987 17:49:42.076662 I2C bus 3 version 0x3230302a
1988 17:49:42.080040 DW I2C bus 3 at 0x80657000 (400 KHz)
1989 17:49:42.083662 PCI: 00:15.3 init finished in 6 msecs
1990 17:49:42.086949 PCI: 00:16.0 init
1991 17:49:42.090224 PCI: 00:16.0 init finished in 0 msecs
1992 17:49:42.090308 PCI: 00:19.1 init
1993 17:49:42.093351 I2C bus 5 version 0x3230302a
1994 17:49:42.096768 DW I2C bus 5 at 0x80659000 (400 KHz)
1995 17:49:42.099898 PCI: 00:19.1 init finished in 6 msecs
1996 17:49:42.103504 PCI: 00:1f.0 init
1997 17:49:42.106878 IOAPIC: Initializing IOAPIC at 0xfec00000
1998 17:49:42.109910 IOAPIC: ID = 0x02
1999 17:49:42.113397 IOAPIC: Dumping registers
2000 17:49:42.116389 reg 0x0000: 0x02000000
2001 17:49:42.116498 reg 0x0001: 0x00770020
2002 17:49:42.119515 reg 0x0002: 0x00000000
2003 17:49:42.123065 IOAPIC: 120 interrupts
2004 17:49:42.126534 IOAPIC: Clearing IOAPIC at 0xfec00000
2005 17:49:42.129552 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2006 17:49:42.136578 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2007 17:49:42.139947 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2008 17:49:42.146095 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2009 17:49:42.150031 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2010 17:49:42.156335 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2011 17:49:42.159778 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2012 17:49:42.162976 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2013 17:49:42.169653 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2014 17:49:42.173183 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2015 17:49:42.179528 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2016 17:49:42.183259 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2017 17:49:42.189891 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2018 17:49:42.192941 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2019 17:49:42.199749 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2020 17:49:42.203089 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2021 17:49:42.206284 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2022 17:49:42.212914 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2023 17:49:42.216394 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2024 17:49:42.222596 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2025 17:49:42.226275 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2026 17:49:42.232700 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2027 17:49:42.236282 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2028 17:49:42.242996 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2029 17:49:42.246039 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2030 17:49:42.249352 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2031 17:49:42.255930 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2032 17:49:42.259184 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2033 17:49:42.265819 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2034 17:49:42.269443 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2035 17:49:42.276120 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2036 17:49:42.279367 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2037 17:49:42.282429 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2038 17:49:42.290043 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2039 17:49:42.292861 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2040 17:49:42.299268 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2041 17:49:42.302572 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2042 17:49:42.309550 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2043 17:49:42.312601 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2044 17:49:42.319685 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2045 17:49:42.322913 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2046 17:49:42.325775 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2047 17:49:42.332603 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2048 17:49:42.335904 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2049 17:49:42.342850 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2050 17:49:42.345638 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2051 17:49:42.352327 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2052 17:49:42.355558 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2053 17:49:42.362636 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2054 17:49:42.366052 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2055 17:49:42.369181 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2056 17:49:42.375946 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2057 17:49:42.379529 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2058 17:49:42.385696 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2059 17:49:42.389398 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2060 17:49:42.395986 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2061 17:49:42.399026 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2062 17:49:42.402580 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2063 17:49:42.408936 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2064 17:49:42.412125 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2065 17:49:42.419226 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2066 17:49:42.422359 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2067 17:49:42.429472 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2068 17:49:42.432022 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2069 17:49:42.438530 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2070 17:49:42.442244 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2071 17:49:42.448805 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2072 17:49:42.452372 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2073 17:49:42.455475 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2074 17:49:42.462159 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2075 17:49:42.465267 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2076 17:49:42.472502 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2077 17:49:42.475536 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2078 17:49:42.481815 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2079 17:49:42.485599 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2080 17:49:42.488555 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2081 17:49:42.495237 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2082 17:49:42.498868 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2083 17:49:42.505392 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2084 17:49:42.508805 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2085 17:49:42.515530 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2086 17:49:42.518479 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2087 17:49:42.525522 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2088 17:49:42.528680 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2089 17:49:42.532351 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2090 17:49:42.538343 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2091 17:49:42.542233 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2092 17:49:42.548593 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2093 17:49:42.551859 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2094 17:49:42.558221 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2095 17:49:42.562010 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2096 17:49:42.568538 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2097 17:49:42.571478 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2098 17:49:42.575099 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2099 17:49:42.581710 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2100 17:49:42.585077 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2101 17:49:42.591490 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2102 17:49:42.594987 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2103 17:49:42.601360 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2104 17:49:42.604989 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2105 17:49:42.611956 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2106 17:49:42.614758 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2107 17:49:42.618689 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2108 17:49:42.624891 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2109 17:49:42.628153 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2110 17:49:42.634867 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2111 17:49:42.638364 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2112 17:49:42.644930 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2113 17:49:42.648083 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2114 17:49:42.651814 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2115 17:49:42.658494 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2116 17:49:42.661388 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2117 17:49:42.668239 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2118 17:49:42.671780 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2119 17:49:42.678420 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2120 17:49:42.681211 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2121 17:49:42.688048 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2122 17:49:42.691176 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2123 17:49:42.694529 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2124 17:49:42.701249 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2125 17:49:42.704684 IOAPIC: Bootstrap Processor Local APIC = 0x00
2126 17:49:42.711144 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2127 17:49:42.714907 PCI: 00:1f.0 init finished in 607 msecs
2128 17:49:42.717956 PCI: 00:1f.2 init
2129 17:49:42.718059 apm_control: Disabling ACPI.
2130 17:49:42.725341 APMC done.
2131 17:49:42.728268 PCI: 00:1f.2 init finished in 7 msecs
2132 17:49:42.731685 PCI: 00:1f.3 init
2133 17:49:42.734685 PCI: 00:1f.3 init finished in 0 msecs
2134 17:49:42.734805 PCI: 01:00.0 init
2135 17:49:42.737874 PCI: 01:00.0 init finished in 0 msecs
2136 17:49:42.741418 PNP: 0c09.0 init
2137 17:49:42.744691 Google Chrome EC uptime: 12.474 seconds
2138 17:49:42.751417 Google Chrome AP resets since EC boot: 1
2139 17:49:42.755079 Google Chrome most recent AP reset causes:
2140 17:49:42.757970 0.342: 32775 shutdown: entering G3
2141 17:49:42.764538 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2142 17:49:42.768126 PNP: 0c09.0 init finished in 23 msecs
2143 17:49:42.771340 GENERIC: 0.0 init
2144 17:49:42.774245 GENERIC: 0.0 init finished in 0 msecs
2145 17:49:42.774359 GENERIC: 1.0 init
2146 17:49:42.780979 GENERIC: 1.0 init finished in 0 msecs
2147 17:49:42.781086 Devices initialized
2148 17:49:42.784653 Show all devs... After init.
2149 17:49:42.787563 Root Device: enabled 1
2150 17:49:42.790897 CPU_CLUSTER: 0: enabled 1
2151 17:49:42.791010 DOMAIN: 0000: enabled 1
2152 17:49:42.794690 GPIO: 0: enabled 1
2153 17:49:42.797723 PCI: 00:00.0: enabled 1
2154 17:49:42.797829 PCI: 00:01.0: enabled 0
2155 17:49:42.800830 PCI: 00:01.1: enabled 0
2156 17:49:42.804202 PCI: 00:02.0: enabled 1
2157 17:49:42.807823 PCI: 00:04.0: enabled 1
2158 17:49:42.807938 PCI: 00:05.0: enabled 0
2159 17:49:42.811023 PCI: 00:06.0: enabled 1
2160 17:49:42.814336 PCI: 00:06.2: enabled 0
2161 17:49:42.817649 PCI: 00:07.0: enabled 0
2162 17:49:42.817767 PCI: 00:07.1: enabled 0
2163 17:49:42.820808 PCI: 00:07.2: enabled 0
2164 17:49:42.824509 PCI: 00:07.3: enabled 0
2165 17:49:42.824636 PCI: 00:08.0: enabled 0
2166 17:49:42.827651 PCI: 00:09.0: enabled 0
2167 17:49:42.831196 PCI: 00:0a.0: enabled 1
2168 17:49:42.834064 PCI: 00:0d.0: enabled 1
2169 17:49:42.834149 PCI: 00:0d.1: enabled 0
2170 17:49:42.837584 PCI: 00:0d.2: enabled 0
2171 17:49:42.840749 PCI: 00:0d.3: enabled 0
2172 17:49:42.844594 PCI: 00:0e.0: enabled 0
2173 17:49:42.844679 PCI: 00:10.0: enabled 0
2174 17:49:42.847761 PCI: 00:10.1: enabled 0
2175 17:49:42.850738 PCI: 00:10.6: enabled 0
2176 17:49:42.854347 PCI: 00:10.7: enabled 0
2177 17:49:42.854456 PCI: 00:12.0: enabled 0
2178 17:49:42.857521 PCI: 00:12.6: enabled 0
2179 17:49:42.861161 PCI: 00:12.7: enabled 0
2180 17:49:42.864121 PCI: 00:13.0: enabled 0
2181 17:49:42.864206 PCI: 00:14.0: enabled 1
2182 17:49:42.867731 PCI: 00:14.1: enabled 0
2183 17:49:42.870910 PCI: 00:14.2: enabled 1
2184 17:49:42.871015 PCI: 00:14.3: enabled 1
2185 17:49:42.874367 PCI: 00:15.0: enabled 1
2186 17:49:42.877216 PCI: 00:15.1: enabled 1
2187 17:49:42.880834 PCI: 00:15.2: enabled 0
2188 17:49:42.880941 PCI: 00:15.3: enabled 1
2189 17:49:42.884575 PCI: 00:16.0: enabled 1
2190 17:49:42.887844 PCI: 00:16.1: enabled 0
2191 17:49:42.890887 PCI: 00:16.2: enabled 0
2192 17:49:42.890996 PCI: 00:16.3: enabled 0
2193 17:49:42.894106 PCI: 00:16.4: enabled 0
2194 17:49:42.897349 PCI: 00:16.5: enabled 0
2195 17:49:42.900615 PCI: 00:17.0: enabled 0
2196 17:49:42.900728 PCI: 00:19.0: enabled 0
2197 17:49:42.904150 PCI: 00:19.1: enabled 1
2198 17:49:42.907636 PCI: 00:19.2: enabled 0
2199 17:49:42.907742 PCI: 00:1a.0: enabled 0
2200 17:49:42.910915 PCI: 00:1c.0: enabled 0
2201 17:49:42.914082 PCI: 00:1c.1: enabled 0
2202 17:49:42.917312 PCI: 00:1c.2: enabled 0
2203 17:49:42.917399 PCI: 00:1c.3: enabled 0
2204 17:49:42.920698 PCI: 00:1c.4: enabled 0
2205 17:49:42.924368 PCI: 00:1c.5: enabled 0
2206 17:49:42.927656 PCI: 00:1c.6: enabled 0
2207 17:49:42.927767 PCI: 00:1c.7: enabled 0
2208 17:49:42.930828 PCI: 00:1d.0: enabled 0
2209 17:49:42.933908 PCI: 00:1d.1: enabled 0
2210 17:49:42.937745 PCI: 00:1d.2: enabled 0
2211 17:49:42.937860 PCI: 00:1d.3: enabled 0
2212 17:49:42.940497 PCI: 00:1e.0: enabled 1
2213 17:49:42.944035 PCI: 00:1e.1: enabled 0
2214 17:49:42.947070 PCI: 00:1e.2: enabled 0
2215 17:49:42.947142 PCI: 00:1e.3: enabled 1
2216 17:49:42.950692 PCI: 00:1f.0: enabled 1
2217 17:49:42.953855 PCI: 00:1f.1: enabled 0
2218 17:49:42.953930 PCI: 00:1f.2: enabled 1
2219 17:49:42.957366 PCI: 00:1f.3: enabled 1
2220 17:49:42.960417 PCI: 00:1f.4: enabled 0
2221 17:49:42.964304 PCI: 00:1f.5: enabled 1
2222 17:49:42.964405 PCI: 00:1f.6: enabled 0
2223 17:49:42.967134 PCI: 00:1f.7: enabled 0
2224 17:49:42.970668 GENERIC: 0.0: enabled 1
2225 17:49:42.974251 GENERIC: 0.0: enabled 1
2226 17:49:42.974327 GENERIC: 1.0: enabled 1
2227 17:49:42.977214 GENERIC: 0.0: enabled 1
2228 17:49:42.980836 GENERIC: 1.0: enabled 1
2229 17:49:42.983649 USB0 port 0: enabled 1
2230 17:49:42.983756 USB0 port 0: enabled 1
2231 17:49:42.987517 GENERIC: 0.0: enabled 1
2232 17:49:42.990445 I2C: 00:1a: enabled 1
2233 17:49:42.990547 I2C: 00:31: enabled 1
2234 17:49:42.993983 I2C: 00:32: enabled 1
2235 17:49:42.997088 I2C: 00:50: enabled 1
2236 17:49:42.997194 I2C: 00:10: enabled 1
2237 17:49:43.000811 I2C: 00:15: enabled 1
2238 17:49:43.003940 I2C: 00:2c: enabled 1
2239 17:49:43.004046 GENERIC: 0.0: enabled 1
2240 17:49:43.007035 SPI: 00: enabled 1
2241 17:49:43.010395 PNP: 0c09.0: enabled 1
2242 17:49:43.010509 GENERIC: 0.0: enabled 1
2243 17:49:43.013653 USB3 port 0: enabled 1
2244 17:49:43.016851 USB3 port 1: enabled 0
2245 17:49:43.020063 USB3 port 2: enabled 1
2246 17:49:43.020173 USB3 port 3: enabled 0
2247 17:49:43.023854 USB2 port 0: enabled 1
2248 17:49:43.027203 USB2 port 1: enabled 0
2249 17:49:43.027309 USB2 port 2: enabled 1
2250 17:49:43.030116 USB2 port 3: enabled 0
2251 17:49:43.033925 USB2 port 4: enabled 0
2252 17:49:43.037120 USB2 port 5: enabled 1
2253 17:49:43.037196 USB2 port 6: enabled 0
2254 17:49:43.040073 USB2 port 7: enabled 0
2255 17:49:43.043555 USB2 port 8: enabled 1
2256 17:49:43.043661 USB2 port 9: enabled 1
2257 17:49:43.047220 USB3 port 0: enabled 1
2258 17:49:43.050488 USB3 port 1: enabled 0
2259 17:49:43.050579 USB3 port 2: enabled 0
2260 17:49:43.053504 USB3 port 3: enabled 0
2261 17:49:43.056653 GENERIC: 0.0: enabled 1
2262 17:49:43.060141 GENERIC: 1.0: enabled 1
2263 17:49:43.060262 APIC: 00: enabled 1
2264 17:49:43.063528 APIC: 14: enabled 1
2265 17:49:43.063645 APIC: 16: enabled 1
2266 17:49:43.067196 APIC: 10: enabled 1
2267 17:49:43.070131 APIC: 12: enabled 1
2268 17:49:43.070217 APIC: 09: enabled 1
2269 17:49:43.073371 APIC: 01: enabled 1
2270 17:49:43.076913 APIC: 08: enabled 1
2271 17:49:43.077035 PCI: 01:00.0: enabled 1
2272 17:49:43.083415 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2273 17:49:43.086724 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2274 17:49:43.093337 ELOG: NV offset 0xf20000 size 0x4000
2275 17:49:43.099832 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2276 17:49:43.106763 ELOG: Event(17) added with size 13 at 2024-03-19 17:49:43 UTC
2277 17:49:43.113091 ELOG: Event(9E) added with size 10 at 2024-03-19 17:49:43 UTC
2278 17:49:43.120036 ELOG: Event(9F) added with size 14 at 2024-03-19 17:49:43 UTC
2279 17:49:43.126464 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2280 17:49:43.132816 ELOG: Event(A0) added with size 9 at 2024-03-19 17:49:43 UTC
2281 17:49:43.135906 elog_add_boot_reason: Logged dev mode boot
2282 17:49:43.142809 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2283 17:49:43.142926 Finalize devices...
2284 17:49:43.146424 PCI: 00:16.0 final
2285 17:49:43.149640 PCI: 00:1f.2 final
2286 17:49:43.149717 GENERIC: 0.0 final
2287 17:49:43.155893 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2288 17:49:43.159423 GENERIC: 1.0 final
2289 17:49:43.162549 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2290 17:49:43.165714 Devices finalized
2291 17:49:43.172462 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2292 17:49:43.175711 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2293 17:49:43.182455 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2294 17:49:43.185371 ME: HFSTS1 : 0x90000245
2295 17:49:43.192472 ME: HFSTS2 : 0x82100116
2296 17:49:43.195540 ME: HFSTS3 : 0x00000050
2297 17:49:43.198891 ME: HFSTS4 : 0x00004000
2298 17:49:43.205359 ME: HFSTS5 : 0x00000000
2299 17:49:43.209295 ME: HFSTS6 : 0x40600006
2300 17:49:43.212106 ME: Manufacturing Mode : NO
2301 17:49:43.215385 ME: SPI Protection Mode Enabled : YES
2302 17:49:43.221984 ME: FPFs Committed : YES
2303 17:49:43.225344 ME: Manufacturing Vars Locked : YES
2304 17:49:43.228599 ME: FW Partition Table : OK
2305 17:49:43.232173 ME: Bringup Loader Failure : NO
2306 17:49:43.235336 ME: Firmware Init Complete : YES
2307 17:49:43.238592 ME: Boot Options Present : NO
2308 17:49:43.242079 ME: Update In Progress : NO
2309 17:49:43.248494 ME: D0i3 Support : YES
2310 17:49:43.251690 ME: Low Power State Enabled : NO
2311 17:49:43.255262 ME: CPU Replaced : YES
2312 17:49:43.258524 ME: CPU Replacement Valid : YES
2313 17:49:43.262230 ME: Current Working State : 5
2314 17:49:43.265190 ME: Current Operation State : 1
2315 17:49:43.268830 ME: Current Operation Mode : 0
2316 17:49:43.271625 ME: Error Code : 0
2317 17:49:43.275106 ME: Enhanced Debug Mode : NO
2318 17:49:43.281882 ME: CPU Debug Disabled : YES
2319 17:49:43.284874 ME: TXT Support : NO
2320 17:49:43.288289 ME: WP for RO is enabled : YES
2321 17:49:43.294938 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2322 17:49:43.298639 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2323 17:49:43.305092 Ramoops buffer: 0x100000@0x76899000.
2324 17:49:43.308633 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2325 17:49:43.318398 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2326 17:49:43.321711 CBFS: 'fallback/slic' not found.
2327 17:49:43.324645 ACPI: Writing ACPI tables at 7686d000.
2328 17:49:43.324755 ACPI: * FACS
2329 17:49:43.328164 ACPI: * DSDT
2330 17:49:43.334855 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2331 17:49:43.338040 ACPI: * FADT
2332 17:49:43.338161 SCI is IRQ9
2333 17:49:43.341199 ACPI: added table 1/32, length now 40
2334 17:49:43.344983 ACPI: * SSDT
2335 17:49:43.351954 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2336 17:49:43.354582 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2337 17:49:43.361260 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2338 17:49:43.364721 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2339 17:49:43.371642 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2340 17:49:43.374686 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2341 17:49:43.381285 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2342 17:49:43.387711 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2343 17:49:43.391028 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2344 17:49:43.397654 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2345 17:49:43.401030 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2346 17:49:43.407852 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2347 17:49:43.411446 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2348 17:49:43.414272 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2349 17:49:43.423000 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2350 17:49:43.426543 PS2K: Passing 80 keymaps to kernel
2351 17:49:43.432881 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2352 17:49:43.439455 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2353 17:49:43.446217 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2354 17:49:43.453123 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2355 17:49:43.459570 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2356 17:49:43.465811 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2357 17:49:43.469571 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2358 17:49:43.476005 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2359 17:49:43.482554 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2360 17:49:43.489354 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2361 17:49:43.492862 ACPI: added table 2/32, length now 44
2362 17:49:43.495706 ACPI: * MCFG
2363 17:49:43.499387 ACPI: added table 3/32, length now 48
2364 17:49:43.499468 ACPI: * TPM2
2365 17:49:43.502563 TPM2 log created at 0x7685d000
2366 17:49:43.509501 ACPI: added table 4/32, length now 52
2367 17:49:43.509608 ACPI: * LPIT
2368 17:49:43.512797 ACPI: added table 5/32, length now 56
2369 17:49:43.515849 ACPI: * MADT
2370 17:49:43.515932 SCI is IRQ9
2371 17:49:43.519117 ACPI: added table 6/32, length now 60
2372 17:49:43.522153 cmd_reg from pmc_make_ipc_cmd 1052838
2373 17:49:43.528718 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2374 17:49:43.535425 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2375 17:49:43.542355 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2376 17:49:43.545400 PMC CrashLog size in discovery mode: 0xC00
2377 17:49:43.548835 cpu crashlog bar addr: 0x80640000
2378 17:49:43.551898 cpu discovery table offset: 0x6030
2379 17:49:43.558892 cpu_crashlog_discovery_table buffer count: 0x3
2380 17:49:43.565177 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2381 17:49:43.571967 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2382 17:49:43.578618 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2383 17:49:43.582273 PMC crashLog size in discovery mode : 0xC00
2384 17:49:43.588908 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2385 17:49:43.595557 discover mode PMC crashlog size adjusted to: 0x200
2386 17:49:43.601770 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2387 17:49:43.605384 discover mode PMC crashlog size adjusted to: 0x0
2388 17:49:43.608331 m_cpu_crashLog_size : 0x3480 bytes
2389 17:49:43.612114 CPU crashLog present.
2390 17:49:43.615174 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2391 17:49:43.625356 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2392 17:49:43.625471 current = 76876550
2393 17:49:43.628798 ACPI: * DMAR
2394 17:49:43.631996 ACPI: added table 7/32, length now 64
2395 17:49:43.635020 ACPI: added table 8/32, length now 68
2396 17:49:43.635126 ACPI: * HPET
2397 17:49:43.642000 ACPI: added table 9/32, length now 72
2398 17:49:43.642124 ACPI: done.
2399 17:49:43.644888 ACPI tables: 38528 bytes.
2400 17:49:43.649041 smbios_write_tables: 76857000
2401 17:49:43.652252 EC returned error result code 3
2402 17:49:43.655670 Couldn't obtain OEM name from CBI
2403 17:49:43.658979 Create SMBIOS type 16
2404 17:49:43.659061 Create SMBIOS type 17
2405 17:49:43.662048 Create SMBIOS type 20
2406 17:49:43.665334 GENERIC: 0.0 (WIFI Device)
2407 17:49:43.668922 SMBIOS tables: 2156 bytes.
2408 17:49:43.672150 Writing table forward entry at 0x00000500
2409 17:49:43.678535 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2410 17:49:43.682034 Writing coreboot table at 0x76891000
2411 17:49:43.688581 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2412 17:49:43.692295 1. 0000000000001000-000000000009ffff: RAM
2413 17:49:43.698808 2. 00000000000a0000-00000000000fffff: RESERVED
2414 17:49:43.701703 3. 0000000000100000-0000000076856fff: RAM
2415 17:49:43.708789 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2416 17:49:43.711701 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2417 17:49:43.718278 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2418 17:49:43.721603 7. 0000000077000000-00000000803fffff: RESERVED
2419 17:49:43.728626 8. 00000000c0000000-00000000cfffffff: RESERVED
2420 17:49:43.732123 9. 00000000f8000000-00000000f9ffffff: RESERVED
2421 17:49:43.738340 10. 00000000fb000000-00000000fb000fff: RESERVED
2422 17:49:43.742015 11. 00000000fc800000-00000000fe7fffff: RESERVED
2423 17:49:43.748577 12. 00000000feb00000-00000000feb7ffff: RESERVED
2424 17:49:43.751846 13. 00000000fec00000-00000000fecfffff: RESERVED
2425 17:49:43.754873 14. 00000000fed40000-00000000fed6ffff: RESERVED
2426 17:49:43.761839 15. 00000000fed80000-00000000fed87fff: RESERVED
2427 17:49:43.764727 16. 00000000fed90000-00000000fed92fff: RESERVED
2428 17:49:43.771552 17. 00000000feda0000-00000000feda1fff: RESERVED
2429 17:49:43.775177 18. 00000000fedc0000-00000000feddffff: RESERVED
2430 17:49:43.778530 19. 0000000100000000-000000027fbfffff: RAM
2431 17:49:43.781433 Passing 4 GPIOs to payload:
2432 17:49:43.787792 NAME | PORT | POLARITY | VALUE
2433 17:49:43.794754 lid | undefined | high | high
2434 17:49:43.798218 power | undefined | high | low
2435 17:49:43.804787 oprom | undefined | high | low
2436 17:49:43.807906 EC in RW | 0x00000151 | high | high
2437 17:49:43.811543 Board ID: 3
2438 17:49:43.811655 FW config: 0x131
2439 17:49:43.818194 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 3d0c
2440 17:49:43.821154 coreboot table: 1788 bytes.
2441 17:49:43.825072 IMD ROOT 0. 0x76fff000 0x00001000
2442 17:49:43.827843 IMD SMALL 1. 0x76ffe000 0x00001000
2443 17:49:43.831438 FSP MEMORY 2. 0x76afe000 0x00500000
2444 17:49:43.834437 CONSOLE 3. 0x76ade000 0x00020000
2445 17:49:43.841176 RW MCACHE 4. 0x76add000 0x0000043c
2446 17:49:43.844800 RO MCACHE 5. 0x76adc000 0x00000fd8
2447 17:49:43.848265 FMAP 6. 0x76adb000 0x0000064a
2448 17:49:43.851623 TIME STAMP 7. 0x76ada000 0x00000910
2449 17:49:43.854557 VBOOT WORK 8. 0x76ac6000 0x00014000
2450 17:49:43.858195 MEM INFO 9. 0x76ac5000 0x000003b8
2451 17:49:43.861405 ROMSTG STCK10. 0x76ac4000 0x00001000
2452 17:49:43.864755 AFTER CAR 11. 0x76ab8000 0x0000c000
2453 17:49:43.871056 RAMSTAGE 12. 0x76a2e000 0x0008a000
2454 17:49:43.874744 ACPI BERT 13. 0x76a1e000 0x00010000
2455 17:49:43.877869 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2456 17:49:43.881512 REFCODE 15. 0x769ae000 0x0006f000
2457 17:49:43.884436 SMM BACKUP 16. 0x7699e000 0x00010000
2458 17:49:43.887847 IGD OPREGION17. 0x76999000 0x00004203
2459 17:49:43.891267 RAMOOPS 18. 0x76899000 0x00100000
2460 17:49:43.898035 COREBOOT 19. 0x76891000 0x00008000
2461 17:49:43.900882 ACPI 20. 0x7686d000 0x00024000
2462 17:49:43.904152 TPM2 TCGLOG21. 0x7685d000 0x00010000
2463 17:49:43.907733 PMC CRASHLOG22. 0x7685c000 0x00000c00
2464 17:49:43.910663 CPU CRASHLOG23. 0x76858000 0x00003480
2465 17:49:43.914367 SMBIOS 24. 0x76857000 0x00001000
2466 17:49:43.917756 IMD small region:
2467 17:49:43.921080 IMD ROOT 0. 0x76ffec00 0x00000400
2468 17:49:43.924131 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2469 17:49:43.927655 VPD 2. 0x76ffeb60 0x0000006c
2470 17:49:43.933991 POWER STATE 3. 0x76ffeb00 0x00000044
2471 17:49:43.937781 ROMSTAGE 4. 0x76ffeae0 0x00000004
2472 17:49:43.940752 ACPI GNVS 5. 0x76ffea80 0x00000048
2473 17:49:43.944249 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2474 17:49:43.950777 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2475 17:49:43.953846 MTRR: Physical address space:
2476 17:49:43.960610 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2477 17:49:43.967214 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2478 17:49:43.970735 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2479 17:49:43.977062 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2480 17:49:43.983814 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2481 17:49:43.990705 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2482 17:49:43.997442 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2483 17:49:44.000873 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 17:49:44.003845 MTRR: Fixed MSR 0x258 0x0606060606060606
2485 17:49:44.010527 MTRR: Fixed MSR 0x259 0x0000000000000000
2486 17:49:44.013826 MTRR: Fixed MSR 0x268 0x0606060606060606
2487 17:49:44.017395 MTRR: Fixed MSR 0x269 0x0606060606060606
2488 17:49:44.020320 MTRR: Fixed MSR 0x26a 0x0606060606060606
2489 17:49:44.027073 MTRR: Fixed MSR 0x26b 0x0606060606060606
2490 17:49:44.030524 MTRR: Fixed MSR 0x26c 0x0606060606060606
2491 17:49:44.033869 MTRR: Fixed MSR 0x26d 0x0606060606060606
2492 17:49:44.037063 MTRR: Fixed MSR 0x26e 0x0606060606060606
2493 17:49:44.043679 MTRR: Fixed MSR 0x26f 0x0606060606060606
2494 17:49:44.046709 call enable_fixed_mtrr()
2495 17:49:44.050185 CPU physical address size: 39 bits
2496 17:49:44.053289 MTRR: default type WB/UC MTRR counts: 6/6.
2497 17:49:44.057012 MTRR: UC selected as default type.
2498 17:49:44.063761 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2499 17:49:44.070648 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2500 17:49:44.077105 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2501 17:49:44.083560 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2502 17:49:44.089928 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2503 17:49:44.093246 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2504 17:49:44.101685 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 17:49:44.104816 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 17:49:44.108027 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 17:49:44.111691 MTRR: Fixed MSR 0x268 0x0606060606060606
2508 17:49:44.118322 MTRR: Fixed MSR 0x269 0x0606060606060606
2509 17:49:44.121246 MTRR: Fixed MSR 0x26a 0x0606060606060606
2510 17:49:44.124530 MTRR: Fixed MSR 0x26b 0x0606060606060606
2511 17:49:44.127968 MTRR: Fixed MSR 0x26c 0x0606060606060606
2512 17:49:44.134576 MTRR: Fixed MSR 0x26d 0x0606060606060606
2513 17:49:44.138105 MTRR: Fixed MSR 0x26e 0x0606060606060606
2514 17:49:44.141489 MTRR: Fixed MSR 0x26f 0x0606060606060606
2515 17:49:44.144740 MTRR: Fixed MSR 0x250 0x0606060606060606
2516 17:49:44.151372 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 17:49:44.151461 call enable_fixed_mtrr()
2518 17:49:44.157550 MTRR: Fixed MSR 0x250 0x0606060606060606
2519 17:49:44.160896 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 17:49:44.164400 MTRR: Fixed MSR 0x258 0x0606060606060606
2521 17:49:44.167528 MTRR: Fixed MSR 0x259 0x0000000000000000
2522 17:49:44.170952 MTRR: Fixed MSR 0x268 0x0606060606060606
2523 17:49:44.177643 MTRR: Fixed MSR 0x269 0x0606060606060606
2524 17:49:44.181121 MTRR: Fixed MSR 0x26a 0x0606060606060606
2525 17:49:44.184626 MTRR: Fixed MSR 0x26b 0x0606060606060606
2526 17:49:44.187475 MTRR: Fixed MSR 0x26c 0x0606060606060606
2527 17:49:44.194448 MTRR: Fixed MSR 0x26d 0x0606060606060606
2528 17:49:44.197666 MTRR: Fixed MSR 0x26e 0x0606060606060606
2529 17:49:44.201059 MTRR: Fixed MSR 0x26f 0x0606060606060606
2530 17:49:44.204143 MTRR: Fixed MSR 0x250 0x0606060606060606
2531 17:49:44.207856 call enable_fixed_mtrr()
2532 17:49:44.210700 MTRR: Fixed MSR 0x258 0x0606060606060606
2533 17:49:44.214457 CPU physical address size: 39 bits
2534 17:49:44.221022 MTRR: Fixed MSR 0x259 0x0000000000000000
2535 17:49:44.224484 MTRR: Fixed MSR 0x250 0x0606060606060606
2536 17:49:44.227535 CPU physical address size: 39 bits
2537 17:49:44.230491 MTRR: Fixed MSR 0x258 0x0606060606060606
2538 17:49:44.234185 MTRR: Fixed MSR 0x258 0x0606060606060606
2539 17:49:44.240843 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 17:49:44.244519 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 17:49:44.248039 MTRR: Fixed MSR 0x259 0x0000000000000000
2542 17:49:44.251273 MTRR: Fixed MSR 0x268 0x0606060606060606
2543 17:49:44.254583 MTRR: Fixed MSR 0x269 0x0606060606060606
2544 17:49:44.261588 MTRR: Fixed MSR 0x258 0x0606060606060606
2545 17:49:44.264501 MTRR: Fixed MSR 0x259 0x0000000000000000
2546 17:49:44.267986 MTRR: Fixed MSR 0x268 0x0606060606060606
2547 17:49:44.271091 MTRR: Fixed MSR 0x269 0x0606060606060606
2548 17:49:44.278043 MTRR: Fixed MSR 0x26a 0x0606060606060606
2549 17:49:44.281261 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 17:49:44.284717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 17:49:44.288211 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 17:49:44.291721 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 17:49:44.298110 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 17:49:44.301107 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 17:49:44.304709 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 17:49:44.307790 MTRR: Fixed MSR 0x26a 0x0606060606060606
2557 17:49:44.314571 MTRR: Fixed MSR 0x268 0x0606060606060606
2558 17:49:44.317783 MTRR: Fixed MSR 0x269 0x0606060606060606
2559 17:49:44.321404 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 17:49:44.324393 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 17:49:44.330722 MTRR: Fixed MSR 0x26c 0x0606060606060606
2562 17:49:44.334406 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 17:49:44.337616 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 17:49:44.341178 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 17:49:44.347413 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 17:49:44.347534 call enable_fixed_mtrr()
2567 17:49:44.351169 call enable_fixed_mtrr()
2568 17:49:44.354078 MTRR: Fixed MSR 0x26a 0x0606060606060606
2569 17:49:44.357542 CPU physical address size: 39 bits
2570 17:49:44.360837 CPU physical address size: 39 bits
2571 17:49:44.367374 MTRR: Fixed MSR 0x26b 0x0606060606060606
2572 17:49:44.370542 MTRR: Fixed MSR 0x26c 0x0606060606060606
2573 17:49:44.374346 MTRR: Fixed MSR 0x259 0x0000000000000000
2574 17:49:44.377284 MTRR: Fixed MSR 0x26c 0x0606060606060606
2575 17:49:44.384380 MTRR: Fixed MSR 0x26d 0x0606060606060606
2576 17:49:44.387056 MTRR: Fixed MSR 0x26e 0x0606060606060606
2577 17:49:44.390376 MTRR: Fixed MSR 0x26f 0x0606060606060606
2578 17:49:44.394188 MTRR: Fixed MSR 0x26d 0x0606060606060606
2579 17:49:44.397250 call enable_fixed_mtrr()
2580 17:49:44.400443 MTRR: Fixed MSR 0x26e 0x0606060606060606
2581 17:49:44.407252 MTRR: Fixed MSR 0x26f 0x0606060606060606
2582 17:49:44.410783 CPU physical address size: 39 bits
2583 17:49:44.413901 MTRR: Fixed MSR 0x268 0x0606060606060606
2584 17:49:44.417517 MTRR: Fixed MSR 0x269 0x0606060606060606
2585 17:49:44.420219 MTRR: Fixed MSR 0x26a 0x0606060606060606
2586 17:49:44.427158 MTRR: Fixed MSR 0x26b 0x0606060606060606
2587 17:49:44.430502 MTRR: Fixed MSR 0x26c 0x0606060606060606
2588 17:49:44.434151 MTRR: Fixed MSR 0x26d 0x0606060606060606
2589 17:49:44.437162 MTRR: Fixed MSR 0x26e 0x0606060606060606
2590 17:49:44.443885 MTRR: Fixed MSR 0x26f 0x0606060606060606
2591 17:49:44.443992 call enable_fixed_mtrr()
2592 17:49:44.446886 call enable_fixed_mtrr()
2593 17:49:44.450362 CPU physical address size: 39 bits
2594 17:49:44.453675 CPU physical address size: 39 bits
2595 17:49:44.457802
2596 17:49:44.457908 MTRR check
2597 17:49:44.460814 Fixed MTRRs : Enabled
2598 17:49:44.460912 Variable MTRRs: Enabled
2599 17:49:44.461021
2600 17:49:44.467210 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2601 17:49:44.470560 Checking cr50 for pending updates
2602 17:49:44.483098 Reading cr50 TPM mode
2603 17:49:44.498733 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2604 17:49:44.504865 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2605 17:49:44.511703 Checking segment from ROM address 0xf96cbe6c
2606 17:49:44.515357 Checking segment from ROM address 0xf96cbe88
2607 17:49:44.522059 Loading segment from ROM address 0xf96cbe6c
2608 17:49:44.522143 code (compression=1)
2609 17:49:44.531382 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2610 17:49:44.538683 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2611 17:49:44.541255 using LZMA
2612 17:49:44.563990 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2613 17:49:44.570268 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2614 17:49:44.578676 Loading segment from ROM address 0xf96cbe88
2615 17:49:44.581966 Entry Point 0x30000000
2616 17:49:44.582082 Loaded segments
2617 17:49:44.588456 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2618 17:49:44.595456 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2619 17:49:44.598313 Finalizing chipset.
2620 17:49:44.601965 apm_control: Finalizing SMM.
2621 17:49:44.602050 APMC done.
2622 17:49:44.605308 HECI: CSE device 16.1 is disabled
2623 17:49:44.608891 HECI: CSE device 16.2 is disabled
2624 17:49:44.611498 HECI: CSE device 16.3 is disabled
2625 17:49:44.614951 HECI: CSE device 16.4 is disabled
2626 17:49:44.618408 HECI: CSE device 16.5 is disabled
2627 17:49:44.621765 HECI: Sending End-of-Post
2628 17:49:44.630807 CSE: EOP requested action: continue boot
2629 17:49:44.634058 CSE EOP successful, continuing boot
2630 17:49:44.641068 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2631 17:49:44.644299 mp_park_aps done after 0 msecs.
2632 17:49:44.647346 Jumping to boot code at 0x30000000(0x76891000)
2633 17:49:44.657359 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2634 17:49:44.661664
2635 17:49:44.661759
2636 17:49:44.661827
2637 17:49:44.664514 Starting depthcharge on Volmar...
2638 17:49:44.664603
2639 17:49:44.665094 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2640 17:49:44.665199 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2641 17:49:44.665285 Setting prompt string to ['brya:']
2642 17:49:44.665369 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:40)
2643 17:49:44.671236 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2644 17:49:44.671323
2645 17:49:44.677929 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2646 17:49:44.678016
2647 17:49:44.684860 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2648 17:49:44.684946
2649 17:49:44.688254 configure_storage: Failed to remap 1C:2
2650 17:49:44.688343
2651 17:49:44.691154 Wipe memory regions:
2652 17:49:44.691262
2653 17:49:44.694700 [0x00000000001000, 0x000000000a0000)
2654 17:49:44.694809
2655 17:49:44.697663 [0x00000000100000, 0x00000030000000)
2656 17:49:44.805448
2657 17:49:44.809179 [0x00000032668e60, 0x00000076857000)
2658 17:49:44.960581
2659 17:49:44.963688 [0x00000100000000, 0x0000027fc00000)
2660 17:49:45.815002
2661 17:49:45.817925 ec_init: CrosEC protocol v3 supported (256, 256)
2662 17:49:46.427612
2663 17:49:46.427764 R8152: Initializing
2664 17:49:46.427863
2665 17:49:46.431042 Version 9 (ocp_data = 6010)
2666 17:49:46.431125
2667 17:49:46.434045 R8152: Done initializing
2668 17:49:46.434127
2669 17:49:46.437446 Adding net device
2670 17:49:46.738705
2671 17:49:46.741695 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2672 17:49:46.741785
2673 17:49:46.741851
2674 17:49:46.741912
2675 17:49:46.742230 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2677 17:49:46.842581 brya: tftpboot 192.168.201.1 13097486/tftp-deploy-94qffosr/kernel/bzImage 13097486/tftp-deploy-94qffosr/kernel/cmdline 13097486/tftp-deploy-94qffosr/ramdisk/ramdisk.cpio.gz
2678 17:49:46.842729 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2679 17:49:46.842842 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2680 17:49:46.847313 tftpboot 192.168.201.1 13097486/tftp-deploy-94qffosr/kernel/bzIploy-94qffosr/kernel/cmdline 13097486/tftp-deploy-94qffosr/ramdisk/ramdisk.cpio.gz
2681 17:49:46.847440
2682 17:49:46.847560 Waiting for link
2683 17:49:47.050327
2684 17:49:47.050471 done.
2685 17:49:47.050569
2686 17:49:47.050671 MAC: 00:e0:4c:68:05:70
2687 17:49:47.050771
2688 17:49:47.054041 Sending DHCP discover... done.
2689 17:49:47.054129
2690 17:49:47.056915 Waiting for reply... done.
2691 17:49:47.057043
2692 17:49:47.060522 Sending DHCP request... done.
2693 17:49:47.060610
2694 17:49:47.063655 Waiting for reply... done.
2695 17:49:47.063742
2696 17:49:47.067043 My ip is 192.168.201.16
2697 17:49:47.067129
2698 17:49:47.070434 The DHCP server ip is 192.168.201.1
2699 17:49:47.070522
2700 17:49:47.073613 TFTP server IP predefined by user: 192.168.201.1
2701 17:49:47.073701
2702 17:49:47.080295 Bootfile predefined by user: 13097486/tftp-deploy-94qffosr/kernel/bzImage
2703 17:49:47.080384
2704 17:49:47.083607 Sending tftp read request... done.
2705 17:49:47.083721
2706 17:49:47.090524 Waiting for the transfer...
2707 17:49:47.090640
2708 17:49:47.341449 00000000 ################################################################
2709 17:49:47.341631
2710 17:49:47.588368 00080000 ################################################################
2711 17:49:47.588550
2712 17:49:47.833039 00100000 ################################################################
2713 17:49:47.833212
2714 17:49:48.074187 00180000 ################################################################
2715 17:49:48.074360
2716 17:49:48.316030 00200000 ################################################################
2717 17:49:48.316176
2718 17:49:48.568068 00280000 ################################################################
2719 17:49:48.568248
2720 17:49:48.815548 00300000 ################################################################
2721 17:49:48.815723
2722 17:49:49.076342 00380000 ################################################################
2723 17:49:49.076510
2724 17:49:49.332000 00400000 ################################################################
2725 17:49:49.332147
2726 17:49:49.582551 00480000 ################################################################
2727 17:49:49.582702
2728 17:49:49.831444 00500000 ################################################################
2729 17:49:49.831590
2730 17:49:50.079953 00580000 ################################################################
2731 17:49:50.080100
2732 17:49:50.327795 00600000 ################################################################
2733 17:49:50.327943
2734 17:49:50.574847 00680000 ################################################################
2735 17:49:50.575023
2736 17:49:50.824415 00700000 ################################################################
2737 17:49:50.824568
2738 17:49:51.071491 00780000 ################################################################
2739 17:49:51.071667
2740 17:49:51.318158 00800000 ################################################################
2741 17:49:51.318334
2742 17:49:51.562525 00880000 ################################################################
2743 17:49:51.562686
2744 17:49:51.811670 00900000 ################################################################
2745 17:49:51.811902
2746 17:49:52.064095 00980000 ################################################################
2747 17:49:52.064228
2748 17:49:52.311351 00a00000 ################################################################
2749 17:49:52.311513
2750 17:49:52.555474 00a80000 ################################################################
2751 17:49:52.555619
2752 17:49:52.795162 00b00000 ################################################################
2753 17:49:52.795313
2754 17:49:53.042900 00b80000 ################################################################
2755 17:49:53.043035
2756 17:49:53.295592 00c00000 ################################################################
2757 17:49:53.295725
2758 17:49:53.549624 00c80000 ################################################################
2759 17:49:53.549760
2760 17:49:53.803304 00d00000 ################################################################
2761 17:49:53.803495
2762 17:49:54.048077 00d80000 ################################################################
2763 17:49:54.048253
2764 17:49:54.300400 00e00000 ################################################################
2765 17:49:54.300539
2766 17:49:54.547654 00e80000 ################################################################
2767 17:49:54.547791
2768 17:49:54.796001 00f00000 ################################################################
2769 17:49:54.796139
2770 17:49:55.043547 00f80000 ################################################################
2771 17:49:55.043683
2772 17:49:55.289719 01000000 ################################################################
2773 17:49:55.289855
2774 17:49:55.541435 01080000 ################################################################
2775 17:49:55.541604
2776 17:49:55.790302 01100000 ################################################################
2777 17:49:55.790446
2778 17:49:56.048078 01180000 ################################################################
2779 17:49:56.048242
2780 17:49:56.300423 01200000 ################################################################
2781 17:49:56.300564
2782 17:49:56.405702 01280000 ############################ done.
2783 17:49:56.405838
2784 17:49:56.408683 The bootfile was 19621344 bytes long.
2785 17:49:56.408785
2786 17:49:56.412257 Sending tftp read request... done.
2787 17:49:56.412346
2788 17:49:56.415434 Waiting for the transfer...
2789 17:49:56.415521
2790 17:49:56.666542 00000000 ################################################################
2791 17:49:56.666675
2792 17:49:56.913568 00080000 ################################################################
2793 17:49:56.913741
2794 17:49:57.159973 00100000 ################################################################
2795 17:49:57.160116
2796 17:49:57.407126 00180000 ################################################################
2797 17:49:57.407261
2798 17:49:57.662239 00200000 ################################################################
2799 17:49:57.662381
2800 17:49:57.910249 00280000 ################################################################
2801 17:49:57.910402
2802 17:49:58.146610 00300000 ################################################################
2803 17:49:58.146763
2804 17:49:58.382985 00380000 ################################################################
2805 17:49:58.383126
2806 17:49:58.623722 00400000 ################################################################
2807 17:49:58.623863
2808 17:49:58.880350 00480000 ################################################################
2809 17:49:58.880491
2810 17:49:59.134115 00500000 ################################################################
2811 17:49:59.134260
2812 17:49:59.384795 00580000 ################################################################
2813 17:49:59.384962
2814 17:49:59.644217 00600000 ################################################################
2815 17:49:59.644389
2816 17:49:59.890739 00680000 ################################################################
2817 17:49:59.890914
2818 17:50:00.128251 00700000 ############################################################ done.
2819 17:50:00.131826
2820 17:50:00.135198 Sending tftp read request... done.
2821 17:50:00.135694
2822 17:50:00.138917 Waiting for the transfer...
2823 17:50:00.139398
2824 17:50:00.139771 00000000 # done.
2825 17:50:00.140127
2826 17:50:00.149029 Command line loaded dynamically from TFTP file: 13097486/tftp-deploy-94qffosr/kernel/cmdline
2827 17:50:00.149511
2828 17:50:00.171784 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13097486/extract-nfsrootfs-bxwkhw2h,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2829 17:50:00.180934
2830 17:50:00.184172 Shutting down all USB controllers.
2831 17:50:00.184698
2832 17:50:00.185153 Removing current net device
2833 17:50:00.185632
2834 17:50:00.187311 Finalizing coreboot
2835 17:50:00.187785
2836 17:50:00.193844 Exiting depthcharge with code 4 at timestamp: 25777933
2837 17:50:00.194516
2838 17:50:00.195082
2839 17:50:00.195648 Starting kernel ...
2840 17:50:00.196172
2841 17:50:00.196747
2842 17:50:00.199364 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2843 17:50:00.200129 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2844 17:50:00.200792 Setting prompt string to ['Linux version [0-9]']
2845 17:50:00.201419 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2846 17:50:00.202023 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2848 17:54:25.201134 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2850 17:54:25.202252 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2852 17:54:25.203110 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2855 17:54:25.204820 end: 2 depthcharge-action (duration 00:05:00) [common]
2857 17:54:25.205430 Cleaning after the job
2858 17:54:25.205518 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/ramdisk
2859 17:54:25.208289 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/kernel
2860 17:54:25.211326 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/nfsrootfs
2861 17:54:25.248669 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13097486/tftp-deploy-94qffosr/modules
2862 17:54:25.249885 start: 4.1 power-off (timeout 00:00:30) [common]
2863 17:54:25.250066 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2864 17:54:25.328702 >> Command sent successfully.
2865 17:54:25.334419 Returned 0 in 0 seconds
2866 17:54:25.435468 end: 4.1 power-off (duration 00:00:00) [common]
2868 17:54:25.437548 start: 4.2 read-feedback (timeout 00:10:00) [common]
2869 17:54:25.438901 Listened to connection for namespace 'common' for up to 1s
2871 17:54:25.440351 Listened to connection for namespace 'common' for up to 1s
2872 17:54:26.439539 Finalising connection for namespace 'common'
2873 17:54:26.440230 Disconnecting from shell: Finalise
2874 17:54:26.440690
2875 17:54:26.541806 end: 4.2 read-feedback (duration 00:00:01) [common]
2876 17:54:26.542433 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13097486
2877 17:54:26.775997 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13097486
2878 17:54:26.776210 JobError: Your job cannot terminate cleanly.