Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:54:28.769540 lava-dispatcher, installed at version: 2024.03
2 14:54:28.769747 start: 0 validate
3 14:54:28.769859 Start time: 2024-06-13 14:54:28.769854+00:00 (UTC)
4 14:54:28.770001 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:54:28.770141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 14:54:29.042687 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:54:29.043426 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-26-ga958754c2b9e6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:54:37.563272 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:54:37.564151 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-26-ga958754c2b9e6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 14:54:39.574018 validate duration: 10.80
12 14:54:39.574259 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:54:39.574353 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:54:39.574464 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:54:39.574639 Not decompressing ramdisk as can be used compressed.
16 14:54:39.574736 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 14:54:39.574802 saving as /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/ramdisk/rootfs.cpio.gz
18 14:54:39.574893 total size: 8417901 (8 MB)
19 14:54:39.575892 progress 0 % (0 MB)
20 14:54:39.578246 progress 5 % (0 MB)
21 14:54:39.580512 progress 10 % (0 MB)
22 14:54:39.582668 progress 15 % (1 MB)
23 14:54:39.584957 progress 20 % (1 MB)
24 14:54:39.587277 progress 25 % (2 MB)
25 14:54:39.589440 progress 30 % (2 MB)
26 14:54:39.591433 progress 35 % (2 MB)
27 14:54:39.593782 progress 40 % (3 MB)
28 14:54:39.595967 progress 45 % (3 MB)
29 14:54:39.598072 progress 50 % (4 MB)
30 14:54:39.600339 progress 55 % (4 MB)
31 14:54:39.602443 progress 60 % (4 MB)
32 14:54:39.604481 progress 65 % (5 MB)
33 14:54:39.606601 progress 70 % (5 MB)
34 14:54:39.608772 progress 75 % (6 MB)
35 14:54:39.610894 progress 80 % (6 MB)
36 14:54:39.613068 progress 85 % (6 MB)
37 14:54:39.615214 progress 90 % (7 MB)
38 14:54:39.617384 progress 95 % (7 MB)
39 14:54:39.619368 progress 100 % (8 MB)
40 14:54:39.619597 8 MB downloaded in 0.04 s (179.61 MB/s)
41 14:54:39.619745 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:54:39.620012 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:54:39.620095 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:54:39.620172 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:54:39.620288 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-26-ga958754c2b9e6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 14:54:39.620352 saving as /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/kernel/bzImage
48 14:54:39.620406 total size: 19685696 (18 MB)
49 14:54:39.620461 No compression specified
50 14:54:39.621432 progress 0 % (0 MB)
51 14:54:39.626563 progress 5 % (0 MB)
52 14:54:39.631480 progress 10 % (1 MB)
53 14:54:39.636438 progress 15 % (2 MB)
54 14:54:39.641324 progress 20 % (3 MB)
55 14:54:39.646265 progress 25 % (4 MB)
56 14:54:39.651192 progress 30 % (5 MB)
57 14:54:39.656249 progress 35 % (6 MB)
58 14:54:39.661238 progress 40 % (7 MB)
59 14:54:39.666372 progress 45 % (8 MB)
60 14:54:39.671295 progress 50 % (9 MB)
61 14:54:39.676312 progress 55 % (10 MB)
62 14:54:39.681243 progress 60 % (11 MB)
63 14:54:39.686192 progress 65 % (12 MB)
64 14:54:39.691176 progress 70 % (13 MB)
65 14:54:39.696133 progress 75 % (14 MB)
66 14:54:39.701133 progress 80 % (15 MB)
67 14:54:39.705986 progress 85 % (15 MB)
68 14:54:39.710830 progress 90 % (16 MB)
69 14:54:39.715652 progress 95 % (17 MB)
70 14:54:39.720535 progress 100 % (18 MB)
71 14:54:39.720740 18 MB downloaded in 0.10 s (187.12 MB/s)
72 14:54:39.720883 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:54:39.721097 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:54:39.721182 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:54:39.721259 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:54:39.721373 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-26-ga958754c2b9e6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 14:54:39.721436 saving as /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/modules/modules.tar
79 14:54:39.721493 total size: 1634668 (1 MB)
80 14:54:39.721548 Using unxz to decompress xz
81 14:54:39.722888 progress 2 % (0 MB)
82 14:54:39.725037 progress 8 % (0 MB)
83 14:54:39.730975 progress 14 % (0 MB)
84 14:54:39.736864 progress 20 % (0 MB)
85 14:54:39.742736 progress 26 % (0 MB)
86 14:54:39.748037 progress 32 % (0 MB)
87 14:54:39.754321 progress 38 % (0 MB)
88 14:54:39.759934 progress 44 % (0 MB)
89 14:54:39.765483 progress 50 % (0 MB)
90 14:54:39.771575 progress 56 % (0 MB)
91 14:54:39.777583 progress 62 % (0 MB)
92 14:54:39.782612 progress 68 % (1 MB)
93 14:54:39.788587 progress 74 % (1 MB)
94 14:54:39.794564 progress 80 % (1 MB)
95 14:54:39.800491 progress 86 % (1 MB)
96 14:54:39.806085 progress 92 % (1 MB)
97 14:54:39.811946 progress 98 % (1 MB)
98 14:54:39.819541 1 MB downloaded in 0.10 s (15.90 MB/s)
99 14:54:39.819747 end: 1.3.1 http-download (duration 00:00:00) [common]
101 14:54:39.820121 end: 1.3 download-retry (duration 00:00:00) [common]
102 14:54:39.820245 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
103 14:54:39.820364 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
104 14:54:39.820480 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
105 14:54:39.820595 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
106 14:54:39.820824 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8
107 14:54:39.820994 makedir: /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin
108 14:54:39.821133 makedir: /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/tests
109 14:54:39.821265 makedir: /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/results
110 14:54:39.821396 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-add-keys
111 14:54:39.821573 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-add-sources
112 14:54:39.821741 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-background-process-start
113 14:54:39.821913 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-background-process-stop
114 14:54:39.822092 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-common-functions
115 14:54:39.822262 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-echo-ipv4
116 14:54:39.822427 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-install-packages
117 14:54:39.822594 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-installed-packages
118 14:54:39.822762 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-os-build
119 14:54:39.822929 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-probe-channel
120 14:54:39.823094 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-probe-ip
121 14:54:39.823259 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-target-ip
122 14:54:39.823425 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-target-mac
123 14:54:39.823591 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-target-storage
124 14:54:39.823761 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-case
125 14:54:39.823966 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-event
126 14:54:39.824133 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-feedback
127 14:54:39.824298 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-raise
128 14:54:39.824471 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-reference
129 14:54:39.824641 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-runner
130 14:54:39.824807 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-set
131 14:54:39.824973 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-test-shell
132 14:54:39.825145 Updating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-install-packages (oe)
133 14:54:39.825342 Updating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/bin/lava-installed-packages (oe)
134 14:54:39.825507 Creating /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/environment
135 14:54:39.825649 LAVA metadata
136 14:54:39.825751 - LAVA_JOB_ID=14331344
137 14:54:39.825844 - LAVA_DISPATCHER_IP=192.168.201.1
138 14:54:39.825979 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
139 14:54:39.826073 skipped lava-vland-overlay
140 14:54:39.826179 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
141 14:54:39.826293 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
142 14:54:39.826386 skipped lava-multinode-overlay
143 14:54:39.826493 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
144 14:54:39.826605 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
145 14:54:39.826713 Loading test definitions
146 14:54:39.826832 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
147 14:54:39.826929 Using /lava-14331344 at stage 0
148 14:54:39.827359 uuid=14331344_1.4.2.3.1 testdef=None
149 14:54:39.827476 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
150 14:54:39.827593 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
151 14:54:39.828304 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
153 14:54:39.828620 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
154 14:54:39.829498 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
156 14:54:39.829837 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
157 14:54:39.830684 runner path: /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/0/tests/0_dmesg test_uuid 14331344_1.4.2.3.1
158 14:54:39.830879 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
160 14:54:39.831186 Creating lava-test-runner.conf files
161 14:54:39.831279 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14331344/lava-overlay-07pzmav8/lava-14331344/0 for stage 0
162 14:54:39.831402 - 0_dmesg
163 14:54:39.831534 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
164 14:54:39.831650 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
165 14:54:39.840079 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
166 14:54:39.840213 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
167 14:54:39.840324 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
168 14:54:39.840440 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
169 14:54:39.840552 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
170 14:54:40.078191 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
171 14:54:40.078337 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
172 14:54:40.078415 extracting modules file /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14331344/extract-overlay-ramdisk-opb2zljv/ramdisk
173 14:54:40.125563 end: 1.4.4 extract-modules (duration 00:00:00) [common]
174 14:54:40.125713 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
175 14:54:40.125792 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14331344/compress-overlay-bma88sdg/overlay-1.4.2.4.tar.gz to ramdisk
176 14:54:40.125853 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14331344/compress-overlay-bma88sdg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14331344/extract-overlay-ramdisk-opb2zljv/ramdisk
177 14:54:40.132739 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
178 14:54:40.132838 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
179 14:54:40.132918 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
180 14:54:40.132996 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
181 14:54:40.133065 Building ramdisk /var/lib/lava/dispatcher/tmp/14331344/extract-overlay-ramdisk-opb2zljv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14331344/extract-overlay-ramdisk-opb2zljv/ramdisk
182 14:54:40.290326 >> 67295 blocks
183 14:54:41.392229 rename /var/lib/lava/dispatcher/tmp/14331344/extract-overlay-ramdisk-opb2zljv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/ramdisk/ramdisk.cpio.gz
184 14:54:41.392398 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
185 14:54:41.392488 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
186 14:54:41.392567 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
187 14:54:41.392634 No mkimage arch provided, not using FIT.
188 14:54:41.392706 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
189 14:54:41.392776 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
190 14:54:41.392849 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
191 14:54:41.392922 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
192 14:54:41.392979 No LXC device requested
193 14:54:41.393045 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
194 14:54:41.393115 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
195 14:54:41.393183 end: 1.6 deploy-device-env (duration 00:00:00) [common]
196 14:54:41.393238 Checking files for TFTP limit of 4294967296 bytes.
197 14:54:41.393526 end: 1 tftp-deploy (duration 00:00:02) [common]
198 14:54:41.393624 start: 2 depthcharge-action (timeout 00:05:00) [common]
199 14:54:41.393702 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
200 14:54:41.393789 substitutions:
201 14:54:41.393848 - {DTB}: None
202 14:54:41.393903 - {INITRD}: 14331344/tftp-deploy-ocq0qpv_/ramdisk/ramdisk.cpio.gz
203 14:54:41.393955 - {KERNEL}: 14331344/tftp-deploy-ocq0qpv_/kernel/bzImage
204 14:54:41.394005 - {LAVA_MAC}: None
205 14:54:41.394055 - {PRESEED_CONFIG}: None
206 14:54:41.394104 - {PRESEED_LOCAL}: None
207 14:54:41.394153 - {RAMDISK}: 14331344/tftp-deploy-ocq0qpv_/ramdisk/ramdisk.cpio.gz
208 14:54:41.394209 - {ROOT_PART}: None
209 14:54:41.394259 - {ROOT}: None
210 14:54:41.394308 - {SERVER_IP}: 192.168.201.1
211 14:54:41.394357 - {TEE}: None
212 14:54:41.394405 Parsed boot commands:
213 14:54:41.394452 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
214 14:54:41.394581 Parsed boot commands: tftpboot 192.168.201.1 14331344/tftp-deploy-ocq0qpv_/kernel/bzImage 14331344/tftp-deploy-ocq0qpv_/kernel/cmdline 14331344/tftp-deploy-ocq0qpv_/ramdisk/ramdisk.cpio.gz
215 14:54:41.394661 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
216 14:54:41.394734 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
217 14:54:41.394805 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
218 14:54:41.394876 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
219 14:54:41.394931 Not connected, no need to disconnect.
220 14:54:41.394995 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
221 14:54:41.395063 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
222 14:54:41.395120 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
223 14:54:41.398634 Setting prompt string to ['lava-test: # ']
224 14:54:41.398944 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
225 14:54:41.399037 end: 2.2.1 reset-connection (duration 00:00:00) [common]
226 14:54:41.399126 start: 2.2.2 reset-device (timeout 00:05:00) [common]
227 14:54:41.399234 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
228 14:54:41.399444 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-10']
229 14:54:54.942284 Returned 0 in 13 seconds
230 14:54:55.043326 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
232 14:54:55.044971 end: 2.2.2 reset-device (duration 00:00:14) [common]
233 14:54:55.045557 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
234 14:54:55.046083 Setting prompt string to 'Starting depthcharge on Volmar...'
235 14:54:55.046540 Changing prompt to 'Starting depthcharge on Volmar...'
236 14:54:55.046912 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
237 14:54:55.048998 [Enter `^Ec?' for help]
238 14:54:55.049425
239 14:54:55.049760
240 14:54:55.050074 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 bootblock starting (log level: 8)...
241 14:54:55.050524 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
242 14:54:55.050839 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000432
243 14:54:55.051129 CPU: AES supported, TXT NOT supported, VT supported
244 14:54:55.051429 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
245 14:54:55.051718 Cache size = 10 MiB
246 14:54:55.052100 MCH: device id 4609 (rev 04) is Alderlake-P
247 14:54:55.052578 PCH: device id 5182 (rev 01) is Alderlake-P SKU
248 14:54:55.052881 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
249 14:54:55.053180 VBOOT: Loading verstage.
250 14:54:55.053478 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 14:54:55.053778 FMAP: base = 0x0 size = 0x2000000 #areas = 37
252 14:54:55.054071 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 14:54:55.054445 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
254 14:54:55.054768 CBFS: Found 'fallback/verstage' @0x18df00 size 0x17368 in mcache @0xfef8597c
255 14:54:55.055083
256 14:54:55.055470
257 14:54:55.056002 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 verstage starting (log level: 8)...
258 14:54:55.056379 Probing TPM I2C: I2C bus 1 version 0x3230302a
259 14:54:55.056667 DW I2C bus 1 at 0xfe022000 (400 KHz)
260 14:54:55.056922 I2C TX abort detected (00000001)
261 14:54:55.057172 cr50_i2c_read: Address write failed
262 14:54:55.057423 .done! DID_VID 0x00281ae0
263 14:54:55.057715 TPM ready after 0 ms
264 14:54:55.057993 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
265 14:54:55.058287 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
266 14:54:55.058574 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
267 14:54:55.058901 tlcl_send_startup: Startup return code is 0
268 14:54:55.059231 TPM: setup succeeded
269 14:54:55.059487 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
270 14:54:55.059738 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 14:54:55.060051 Chrome EC: UHEPI supported
272 14:54:55.060418 Reading cr50 boot mode
273 14:54:55.060817 Cr50 says boot_mode is VERIFIED_RW(0x00).
274 14:54:55.061082 Phase 1
275 14:54:55.061336 FMAP: area GBB found @ 1805000 (458752 bytes)
276 14:54:55.061596 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
277 14:54:55.061900 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
278 14:54:55.062310 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
279 14:54:55.062584 VB2:vb2_check_recovery() Recovery was requested manually
280 14:54:55.062854 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
281 14:54:55.063133 Recovery requested (1009000e)
282 14:54:55.063384 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
283 14:54:55.063639 tlcl_extend: response is 0
284 14:54:55.063928 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
285 14:54:55.064187 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
286 14:54:55.064484 tlcl_extend: response is 0
287 14:54:55.064738 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
288 14:54:55.064992 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 14:54:55.065243 CBFS: Found 'fallback/romstage' @0x80 size 0x1e770 in mcache @0xfef8562c
290 14:54:55.065538 BS: verstage times (exec / console): total (unknown) / 159 ms
291 14:54:55.065828
292 14:54:55.066161
293 14:54:55.066417 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 romstage starting (log level: 8)...
294 14:54:55.066720 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 14:54:55.066975 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 14:54:55.067225 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
297 14:54:55.067473 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 14:54:55.067718 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
299 14:54:55.068045 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
300 14:54:55.068305 TCO_STS: 0000 0000
301 14:54:55.068558 GEN_PMCON: d0015038 00002200
302 14:54:55.068842 GBLRST_CAUSE: 00000000 00000000
303 14:54:55.069140 HPR_CAUSE0: 00000000
304 14:54:55.069458 prev_sleep_state 5
305 14:54:55.069710 Abort disabling TXT, as CPU is not TXT capable.
306 14:54:55.069963 cse_lite: Skip switching to RW in the recovery path
307 14:54:55.070215 Boot Count incremented to 13053
308 14:54:55.070498 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
309 14:54:55.070680 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
310 14:54:55.070860 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
311 14:54:55.071041 CBFS: Found 'fspm.bin' @0x80fc0 size 0xc0000 in mcache @0xfef858c4
312 14:54:55.071219 Chrome EC: UHEPI supported
313 14:54:55.071395 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 14:54:55.071573 Probing TPM I2C: done! DID_VID 0x00281ae0
315 14:54:55.071746 Locality already claimed
316 14:54:55.072063 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
317 14:54:55.072409 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 14:54:55.072608 MRC: Hash idx 0x100b comparison successful.
319 14:54:55.072787 MRC cache found, size f6c8
320 14:54:55.072966 bootmode is set to: 2
321 14:54:55.073142 EC returned error result code 3
322 14:54:55.073316 FW_CONFIG value from CBI is 0x131
323 14:54:55.073489 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
324 14:54:55.073665 SPD index = 0
325 14:54:55.073845 CBFS: Found 'spd.bin' @0x7ae00 size 0x600 in mcache @0xfef857c8
326 14:54:55.074022 SPD: module type is LPDDR4X
327 14:54:55.074498 SPD: module part number is K4U6E3S4AB-MGCL
328 14:54:55.074706 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
329 14:54:55.074888 SPD: device width 16 bits, bus width 16 bits
330 14:54:55.075064 SPD: module size is 1024 MB (per channel)
331 14:54:55.075241 CBMEM:
332 14:54:55.075449 IMD: root @ 0x76fff000 254 entries.
333 14:54:55.075611 IMD: root @ 0x76ffec00 62 entries.
334 14:54:55.075824 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
335 14:54:55.076005 RO_VPD is uninitialized or empty.
336 14:54:55.076141 FMAP: area RW_VPD found @ f29000 (8192 bytes)
337 14:54:55.076277 External stage cache:
338 14:54:55.076425 IMD: root @ 0x7bbff000 254 entries.
339 14:54:55.076561 IMD: root @ 0x7bbfec00 62 entries.
340 14:54:55.076694 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 14:54:55.076829 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
342 14:54:55.076963 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
343 14:54:55.077099 MRC: 'RECOVERY_MRC_CACHE' does not need update.
344 14:54:55.077232 8 DIMMs found
345 14:54:55.077375 SMM Memory Map
346 14:54:55.077510 SMRAM : 0x7b800000 0x800000
347 14:54:55.077642 Subregion 0: 0x7b800000 0x200000
348 14:54:55.077805 Subregion 1: 0x7ba00000 0x200000
349 14:54:55.077941 Subregion 2: 0x7bc00000 0x400000
350 14:54:55.078073 top_of_ram = 0x77000000
351 14:54:55.078208 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
352 14:54:55.078369 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
353 14:54:55.078596 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
354 14:54:55.078741 MTRR Range: Start=ff000000 End=0 (Size 1000000)
355 14:54:55.078875 Normal boot
356 14:54:55.079011 CBFS: Found 'fallback/postcar' @0x188000 size 0x5e9c in mcache @0xfef85938
357 14:54:55.079147 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x5aa8 memsize: 0xae60
358 14:54:55.079283 Processing 237 relocs. Offset value of 0x74aba000
359 14:54:55.079417 CLFLUSH [0x76aba000, 0x76ac4e60]
360 14:54:55.079552 CLFLUSH [0x76abfa80, 0x76abfa84]
361 14:54:55.079685 BS: romstage times (exec / console): total (unknown) / 289 ms
362 14:54:55.079819 CLFLUSH [0x76ab9000, 0x77000000]
363 14:54:55.079974 CLFLUSH [0x7ba00000, 0x7bc00000]
364 14:54:55.080108
365 14:54:55.080240
366 14:54:55.080431 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 postcar starting (log level: 8)...
367 14:54:55.080583 Normal boot
368 14:54:55.080694 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
369 14:54:55.080804 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
370 14:54:55.080913 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
371 14:54:55.081021 CBFS: Found 'fallback/ramstage' @0x54d40 size 0x25544 in mcache @0x76add10c
372 14:54:55.081129 Loading module at 0x76a2d000 with entry 0x76a2d000. filesize: 0x540c8 memsize: 0x8b290
373 14:54:55.081243 Processing 5947 relocs. Offset value of 0x72a2d000
374 14:54:55.081350 BS: postcar times (exec / console): total (unknown) / 54 ms
375 14:54:55.081459
376 14:54:55.081565
377 14:54:55.081671 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 ramstage starting (log level: 8)...
378 14:54:55.081798 Reserving BERT start 76a1c000, size 10000
379 14:54:55.081945 Normal boot
380 14:54:55.082065 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
381 14:54:55.082176 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
382 14:54:55.082285 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
383 14:54:55.082412 FMAP: area RW_VPD found @ f29000 (8192 bytes)
384 14:54:55.082521 Google Chrome EC: version:
385 14:54:55.082628 ro: volmar_v2.0.14126-e605144e9c
386 14:54:55.082735 rw: volmar_v2.0.25064-969857a660
387 14:54:55.082841 running image: 1
388 14:54:55.082947 ACPI _SWS is PM1 Index 8 GPE Index -1
389 14:54:55.083056 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
390 14:54:55.083164 EC returned error result code 3
391 14:54:55.083271 FW_CONFIG value from CBI is 0x131
392 14:54:55.083380 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
393 14:54:55.083489 PCI: 00:1c.2 disabled by fw_config
394 14:54:55.083596 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
395 14:54:55.083751 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
396 14:54:55.083924 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
397 14:54:55.084037 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
398 14:54:55.084146 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
399 14:54:55.084256 CBFS: Found 'cpu_microcode_blob.bin' @0x1e880 size 0x36400 in mcache @0x76add0ac
400 14:54:55.084377 microcode: sig=0x906a4 pf=0x80 revision=0x432
401 14:54:55.084488 microcode: Update skipped, already up-to-date
402 14:54:55.084597 CBFS: Found 'fsps.bin' @0x141000 size 0x46fc8 in mcache @0x76add304
403 14:54:55.084706 Detected 6 core, 8 thread CPU.
404 14:54:55.084814 Setting up SMI for CPU
405 14:54:55.084920 IED base = 0x7bc00000
406 14:54:55.085026 IED size = 0x00400000
407 14:54:55.085131 Will perform SMM setup.
408 14:54:55.085238 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
409 14:54:55.085398 LAPIC 0x0 in XAPIC mode.
410 14:54:55.085525 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
411 14:54:55.085617 Processing 18 relocs. Offset value of 0x00030000
412 14:54:55.085708 Attempting to start 7 APs
413 14:54:55.085798 Waiting for 10ms after sending INIT.
414 14:54:55.085887 Waiting for SIPI to complete...
415 14:54:55.085976 LAPIC 0x1c in XAPIC mode.
416 14:54:55.086065 LAPIC 0x8 in XAPIC mode.
417 14:54:55.086154 LAPIC 0x9 in XAPIC mode.
418 14:54:55.086243 AP: slot 7 apic_id 8, MCU rev: 0x00000432
419 14:54:55.086338 AP: slot 5 apic_id 9, MCU rev: 0x00000432
420 14:54:55.086478 LAPIC 0x18 in XAPIC mode.
421 14:54:55.086787 LAPIC 0x1 in XAPIC mode.
422 14:54:55.086892 LAPIC 0x1a in XAPIC mode.
423 14:54:55.086985 AP: slot 2 apic_id 1c, MCU rev: 0x00000432
424 14:54:55.087075 done.
425 14:54:55.087164 Waiting for SIPI to complete...
426 14:54:55.087254 done.
427 14:54:55.087343 AP: slot 4 apic_id 18, MCU rev: 0x00000432
428 14:54:55.087433 AP: slot 1 apic_id 1a, MCU rev: 0x00000432
429 14:54:55.087523 LAPIC 0x1e in XAPIC mode.
430 14:54:55.087611 AP: slot 6 apic_id 1, MCU rev: 0x00000432
431 14:54:55.087700 AP: slot 3 apic_id 1e, MCU rev: 0x00000432
432 14:54:55.087789 smm_setup_relocation_handler: enter
433 14:54:55.087918 smm_setup_relocation_handler: exit
434 14:54:55.088009 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
435 14:54:55.088100 Processing 11 relocs. Offset value of 0x00038000
436 14:54:55.088190 smm_module_setup_stub: stack_top = 0x7b804000
437 14:54:55.088280 smm_module_setup_stub: per cpu stack_size = 0x800
438 14:54:55.088393 smm_module_setup_stub: runtime.start32_offset = 0x4c
439 14:54:55.088548 smm_module_setup_stub: runtime.smm_size = 0x10000
440 14:54:55.088667 SMM Module: stub loaded at 38000. Will call 0x76a510e0
441 14:54:55.088780 Installing permanent SMM handler to 0x7b800000
442 14:54:55.088896 FX_SAVE [0x7b9ff000-0x7ba00000]
443 14:54:55.088989 HANDLER [0x7b9f5000-0x7b9fe568]
444 14:54:55.089080
445 14:54:55.089168 CPU 0
446 14:54:55.089256 ss0 [0x7b9f4c00-0x7b9f5000]
447 14:54:55.089345 stub0 [0x7b9ed000-0x7b9ed208]
448 14:54:55.089433
449 14:54:55.089521 CPU 1
450 14:54:55.089609 ss1 [0x7b9f4800-0x7b9f4c00]
451 14:54:55.089699 stub1 [0x7b9ecc00-0x7b9ece08]
452 14:54:55.089787
453 14:54:55.089874 CPU 2
454 14:54:55.089962 ss2 [0x7b9f4400-0x7b9f4800]
455 14:54:55.090051 stub2 [0x7b9ec800-0x7b9eca08]
456 14:54:55.090138
457 14:54:55.090225 CPU 3
458 14:54:55.090312 ss3 [0x7b9f4000-0x7b9f4400]
459 14:54:55.090401 stub3 [0x7b9ec400-0x7b9ec608]
460 14:54:55.090501
461 14:54:55.090577 CPU 4
462 14:54:55.090653 ss4 [0x7b9f3c00-0x7b9f4000]
463 14:54:55.090730 stub4 [0x7b9ec000-0x7b9ec208]
464 14:54:55.090806
465 14:54:55.090882 CPU 5
466 14:54:55.090958 ss5 [0x7b9f3800-0x7b9f3c00]
467 14:54:55.091034 stub5 [0x7b9ebc00-0x7b9ebe08]
468 14:54:55.091110
469 14:54:55.091186 CPU 6
470 14:54:55.091263 ss6 [0x7b9f3400-0x7b9f3800]
471 14:54:55.091340 stub6 [0x7b9eb800-0x7b9eba08]
472 14:54:55.091416
473 14:54:55.091492 CPU 7
474 14:54:55.091568 ss7 [0x7b9f3000-0x7b9f3400]
475 14:54:55.091644 stub7 [0x7b9eb400-0x7b9eb608]
476 14:54:55.091720
477 14:54:55.091817 stacks [0x7b800000-0x7b804000]
478 14:54:55.091935 Loading module at 0x7b9f5000 with entry 0x7b9f5d5f. filesize: 0x4448 memsize: 0x9568
479 14:54:55.092017 Processing 255 relocs. Offset value of 0x7b9f5000
480 14:54:55.092096 Loading module at 0x7b9ed000 with entry 0x7b9ed000. filesize: 0x208 memsize: 0x208
481 14:54:55.092175 Processing 11 relocs. Offset value of 0x7b9ed000
482 14:54:55.092252 smm_module_setup_stub: stack_top = 0x7b804000
483 14:54:55.092329 smm_module_setup_stub: per cpu stack_size = 0x800
484 14:54:55.092407 smm_module_setup_stub: runtime.start32_offset = 0x4c
485 14:54:55.092484 smm_module_setup_stub: runtime.smm_size = 0x200000
486 14:54:55.092560 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x1
487 14:54:55.092637 smm_place_entry_code: copying from 7b9ed000 to 7b9ecc00 0x208 bytes
488 14:54:55.092715 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x2
489 14:54:55.092793 smm_place_entry_code: copying from 7b9ed000 to 7b9ec800 0x208 bytes
490 14:54:55.092870 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x3
491 14:54:55.092947 smm_place_entry_code: copying from 7b9ed000 to 7b9ec400 0x208 bytes
492 14:54:55.093024 SMM Module: placing smm entry code at 7b9ec000, cpu # 0x4
493 14:54:55.093101 smm_place_entry_code: copying from 7b9ed000 to 7b9ec000 0x208 bytes
494 14:54:55.093178 SMM Module: placing smm entry code at 7b9ebc00, cpu # 0x5
495 14:54:55.093255 smm_place_entry_code: copying from 7b9ed000 to 7b9ebc00 0x208 bytes
496 14:54:55.093332 SMM Module: placing smm entry code at 7b9eb800, cpu # 0x6
497 14:54:55.093409 smm_place_entry_code: copying from 7b9ed000 to 7b9eb800 0x208 bytes
498 14:54:55.093487 SMM Module: placing smm entry code at 7b9eb400, cpu # 0x7
499 14:54:55.093564 smm_place_entry_code: copying from 7b9ed000 to 7b9eb400 0x208 bytes
500 14:54:55.093642 SMM Module: stub loaded at 7b9ed000. Will call 0x7b9f5d5f
501 14:54:55.093720 Clearing SMI status registers
502 14:54:55.093797 SMI_STS: PM1
503 14:54:55.093873 PM1_STS: PWRBTN
504 14:54:55.093950 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 0
505 14:54:55.094028 In relocation handler: CPU 0
506 14:54:55.094105 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
507 14:54:55.094185 Writing SMRR. base = 0x7b800006, mask=0xff800c00
508 14:54:55.094262 Relocation complete.
509 14:54:55.094339 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3800, cpu = 6
510 14:54:55.094417 In relocation handler: CPU 6
511 14:54:55.094497 New SMBASE=0x7b9e3800 IEDBASE=0x7bc00000
512 14:54:55.094576 Relocation complete.
513 14:54:55.094652 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 1
514 14:54:55.094729 In relocation handler: CPU 1
515 14:54:55.094805 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
516 14:54:55.094896 Writing SMRR. base = 0x7b800006, mask=0xff800c00
517 14:54:55.094983 Relocation complete.
518 14:54:55.095060 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 3
519 14:54:55.095165 In relocation handler: CPU 3
520 14:54:55.095245 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
521 14:54:55.095365 Writing SMRR. base = 0x7b800006, mask=0xff800c00
522 14:54:55.095446 Relocation complete.
523 14:54:55.095535 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 2
524 14:54:55.095603 In relocation handler: CPU 2
525 14:54:55.095905 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
526 14:54:55.095984 Writing SMRR. base = 0x7b800006, mask=0xff800c00
527 14:54:55.096053 Relocation complete.
528 14:54:55.096121 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4000, cpu = 4
529 14:54:55.096189 In relocation handler: CPU 4
530 14:54:55.096258 New SMBASE=0x7b9e4000 IEDBASE=0x7bc00000
531 14:54:55.096326 Writing SMRR. base = 0x7b800006, mask=0xff800c00
532 14:54:55.096394 Relocation complete.
533 14:54:55.096460 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3c00, cpu = 5
534 14:54:55.096528 In relocation handler: CPU 5
535 14:54:55.096595 New SMBASE=0x7b9e3c00 IEDBASE=0x7bc00000
536 14:54:55.096663 Relocation complete.
537 14:54:55.096730 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3400, cpu = 7
538 14:54:55.096797 In relocation handler: CPU 7
539 14:54:55.096877 New SMBASE=0x7b9e3400 IEDBASE=0x7bc00000
540 14:54:55.096946 Writing SMRR. base = 0x7b800006, mask=0xff800c00
541 14:54:55.097014 Relocation complete.
542 14:54:55.097081 Initializing CPU #0
543 14:54:55.097148 CPU: vendor Intel device 906a4
544 14:54:55.097216 CPU: family 06, model 9a, stepping 04
545 14:54:55.097283 Clearing out pending MCEs
546 14:54:55.097350 cpu: energy policy set to 7
547 14:54:55.097417 Turbo is available but hidden
548 14:54:55.097485 Turbo is available and visible
549 14:54:55.097552 microcode: Update skipped, already up-to-date
550 14:54:55.097619 CPU #0 initialized
551 14:54:55.097686 Initializing CPU #6
552 14:54:55.097753 Initializing CPU #3
553 14:54:55.097820 Initializing CPU #4
554 14:54:55.097886 Initializing CPU #2
555 14:54:55.097953 CPU: vendor Intel device 906a4
556 14:54:55.098019 CPU: family 06, model 9a, stepping 04
557 14:54:55.098086 CPU: vendor Intel device 906a4
558 14:54:55.098152 CPU: family 06, model 9a, stepping 04
559 14:54:55.098219 Initializing CPU #5
560 14:54:55.098297 Initializing CPU #7
561 14:54:55.098365 CPU: vendor Intel device 906a4
562 14:54:55.098431 CPU: family 06, model 9a, stepping 04
563 14:54:55.098497 Clearing out pending MCEs
564 14:54:55.098564 CPU: vendor Intel device 906a4
565 14:54:55.098669 CPU: family 06, model 9a, stepping 04
566 14:54:55.098739 CPU: vendor Intel device 906a4
567 14:54:55.098806 CPU: family 06, model 9a, stepping 04
568 14:54:55.098885 CPU: vendor Intel device 906a4
569 14:54:55.098952 CPU: family 06, model 9a, stepping 04
570 14:54:55.099019 cpu: energy policy set to 7
571 14:54:55.099085 Initializing CPU #1
572 14:54:55.099152 Clearing out pending MCEs
573 14:54:55.099218 Clearing out pending MCEs
574 14:54:55.099284 CPU: vendor Intel device 906a4
575 14:54:55.099351 CPU: family 06, model 9a, stepping 04
576 14:54:55.099416 Clearing out pending MCEs
577 14:54:55.099483 Clearing out pending MCEs
578 14:54:55.099549 cpu: energy policy set to 7
579 14:54:55.099616 cpu: energy policy set to 7
580 14:54:55.099683 cpu: energy policy set to 7
581 14:54:55.099750 microcode: Update skipped, already up-to-date
582 14:54:55.099817 CPU #5 initialized
583 14:54:55.099918 microcode: Update skipped, already up-to-date
584 14:54:55.099988 CPU #7 initialized
585 14:54:55.100056 microcode: Update skipped, already up-to-date
586 14:54:55.100123 CPU #2 initialized
587 14:54:55.100188 Clearing out pending MCEs
588 14:54:55.100254 microcode: Update skipped, already up-to-date
589 14:54:55.100321 CPU #3 initialized
590 14:54:55.100389 cpu: energy policy set to 7
591 14:54:55.100458 Clearing out pending MCEs
592 14:54:55.100544 microcode: Update skipped, already up-to-date
593 14:54:55.100649 CPU #4 initialized
594 14:54:55.100712 cpu: energy policy set to 7
595 14:54:55.100772 cpu: energy policy set to 7
596 14:54:55.100836 microcode: Update skipped, already up-to-date
597 14:54:55.100940 CPU #1 initialized
598 14:54:55.101002 microcode: Update skipped, already up-to-date
599 14:54:55.101063 CPU #6 initialized
600 14:54:55.101122 bsp_do_flight_plan done after 630 msecs.
601 14:54:55.101182 CPU: frequency set to 4400 MHz
602 14:54:55.101241 Enabling SMIs.
603 14:54:55.101301 Ramoops buffer: 0x100000@0x7689c000.
604 14:54:55.101360 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 378 / 446 ms
605 14:54:55.101421 Probing TPM I2C: done! DID_VID 0x00281ae0
606 14:54:55.101481 Locality already claimed
607 14:54:55.101540 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
608 14:54:55.101600 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
609 14:54:55.101660 Enabling GPIO PM b/c CR50 has long IRQ pulse support
610 14:54:55.101720 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
611 14:54:55.101780 CBFS: Found 'vbt.bin' @0x80540 size 0x4ee in mcache @0x76add214
612 14:54:55.101841 Found a VBT of 9216 bytes after decompression
613 14:54:55.101911 PCI 1.0, PIN A, using IRQ #16
614 14:54:55.101972 PCI 2.0, PIN A, using IRQ #17
615 14:54:55.102031 PCI 4.0, PIN A, using IRQ #18
616 14:54:55.102124 PCI 5.0, PIN A, using IRQ #16
617 14:54:55.102187 PCI 6.0, PIN A, using IRQ #16
618 14:54:55.102247 PCI 6.2, PIN C, using IRQ #18
619 14:54:55.102307 PCI 7.0, PIN A, using IRQ #19
620 14:54:55.102366 PCI 7.1, PIN B, using IRQ #20
621 14:54:55.102426 PCI 7.2, PIN C, using IRQ #21
622 14:54:55.102486 PCI 7.3, PIN D, using IRQ #22
623 14:54:55.102545 PCI 8.0, PIN A, using IRQ #23
624 14:54:55.102604 PCI D.0, PIN A, using IRQ #17
625 14:54:55.102662 PCI D.1, PIN B, using IRQ #19
626 14:54:55.102721 PCI 10.0, PIN A, using IRQ #24
627 14:54:55.102781 PCI 10.1, PIN B, using IRQ #25
628 14:54:55.102845 PCI 10.6, PIN C, using IRQ #20
629 14:54:55.102911 PCI 10.7, PIN D, using IRQ #21
630 14:54:55.102971 PCI 11.0, PIN A, using IRQ #26
631 14:54:55.103031 PCI 11.1, PIN B, using IRQ #27
632 14:54:55.103091 PCI 11.2, PIN C, using IRQ #28
633 14:54:55.103151 PCI 11.3, PIN D, using IRQ #29
634 14:54:55.103210 PCI 12.0, PIN A, using IRQ #30
635 14:54:55.103270 PCI 12.6, PIN B, using IRQ #31
636 14:54:55.103329 PCI 12.7, PIN C, using IRQ #22
637 14:54:55.103389 PCI 13.0, PIN A, using IRQ #32
638 14:54:55.103449 PCI 13.1, PIN B, using IRQ #33
639 14:54:55.103508 PCI 13.2, PIN C, using IRQ #34
640 14:54:55.103568 PCI 13.3, PIN D, using IRQ #35
641 14:54:55.103627 PCI 14.0, PIN B, using IRQ #23
642 14:54:55.103687 PCI 14.1, PIN A, using IRQ #36
643 14:54:55.103745 PCI 14.3, PIN C, using IRQ #17
644 14:54:55.103804 PCI 15.0, PIN A, using IRQ #37
645 14:54:55.104082 PCI 15.1, PIN B, using IRQ #38
646 14:54:55.104152 PCI 15.2, PIN C, using IRQ #39
647 14:54:55.104214 PCI 15.3, PIN D, using IRQ #40
648 14:54:55.104274 PCI 16.0, PIN A, using IRQ #18
649 14:54:55.104334 PCI 16.1, PIN B, using IRQ #19
650 14:54:55.104393 PCI 16.2, PIN C, using IRQ #20
651 14:54:55.104452 PCI 16.3, PIN D, using IRQ #21
652 14:54:55.104510 PCI 16.4, PIN A, using IRQ #18
653 14:54:55.104569 PCI 16.5, PIN B, using IRQ #19
654 14:54:55.104629 PCI 17.0, PIN A, using IRQ #22
655 14:54:55.104689 PCI 19.0, PIN A, using IRQ #41
656 14:54:55.104749 PCI 19.1, PIN B, using IRQ #42
657 14:54:55.104807 PCI 19.2, PIN C, using IRQ #43
658 14:54:55.104889 PCI 1C.0, PIN A, using IRQ #16
659 14:54:55.105001 PCI 1C.1, PIN B, using IRQ #17
660 14:54:55.105067 PCI 1C.2, PIN C, using IRQ #18
661 14:54:55.105127 PCI 1C.3, PIN D, using IRQ #19
662 14:54:55.105187 PCI 1C.4, PIN A, using IRQ #16
663 14:54:55.105265 PCI 1C.5, PIN B, using IRQ #17
664 14:54:55.105336 PCI 1C.6, PIN C, using IRQ #18
665 14:54:55.105396 PCI 1C.7, PIN D, using IRQ #19
666 14:54:55.105455 PCI 1D.0, PIN A, using IRQ #16
667 14:54:55.105524 PCI 1D.1, PIN B, using IRQ #17
668 14:54:55.105576 PCI 1D.2, PIN C, using IRQ #18
669 14:54:55.105630 PCI 1D.3, PIN D, using IRQ #19
670 14:54:55.105684 PCI 1E.0, PIN A, using IRQ #23
671 14:54:55.105737 PCI 1E.1, PIN B, using IRQ #20
672 14:54:55.105791 PCI 1E.2, PIN C, using IRQ #44
673 14:54:55.105845 PCI 1E.3, PIN D, using IRQ #45
674 14:54:55.105898 PCI 1F.3, PIN B, using IRQ #22
675 14:54:55.105952 PCI 1F.4, PIN C, using IRQ #23
676 14:54:55.106005 PCI 1F.6, PIN D, using IRQ #20
677 14:54:55.106067 PCI 1F.7, PIN A, using IRQ #21
678 14:54:55.106120 IRQ: Using dynamically assigned PCI IO-APIC IRQs
679 14:54:55.106175 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
680 14:54:55.106229 FSPS returned 0
681 14:54:55.106283 Executing Phase 1 of FspMultiPhaseSiInit
682 14:54:55.106337 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
683 14:54:55.106394 port C0 DISC req: usage 1 usb3 1 usb2 1
684 14:54:55.106448 Raw Buffer output 0 00000111
685 14:54:55.106501 Raw Buffer output 1 00000000
686 14:54:55.106555 pmc_send_ipc_cmd succeeded
687 14:54:55.106607 port C1 DISC req: usage 1 usb3 3 usb2 3
688 14:54:55.106660 Raw Buffer output 0 00000331
689 14:54:55.106714 Raw Buffer output 1 00000000
690 14:54:55.106767 pmc_send_ipc_cmd succeeded
691 14:54:55.106825 Detected 6 core, 8 thread CPU.
692 14:54:55.106889 Detected 6 core, 8 thread CPU.
693 14:54:55.106950 Detected 6 core, 8 thread CPU.
694 14:54:55.107004 Detected 6 core, 8 thread CPU.
695 14:54:55.107057 Detected 6 core, 8 thread CPU.
696 14:54:55.107111 Detected 6 core, 8 thread CPU.
697 14:54:55.107163 Detected 6 core, 8 thread CPU.
698 14:54:55.107215 Detected 6 core, 8 thread CPU.
699 14:54:55.107268 Detected 6 core, 8 thread CPU.
700 14:54:55.107321 Detected 6 core, 8 thread CPU.
701 14:54:55.107373 Detected 6 core, 8 thread CPU.
702 14:54:55.107426 Detected 6 core, 8 thread CPU.
703 14:54:55.107479 Detected 6 core, 8 thread CPU.
704 14:54:55.107532 Detected 6 core, 8 thread CPU.
705 14:54:55.107585 Detected 6 core, 8 thread CPU.
706 14:54:55.107638 Detected 6 core, 8 thread CPU.
707 14:54:55.107691 Detected 6 core, 8 thread CPU.
708 14:54:55.107744 Detected 6 core, 8 thread CPU.
709 14:54:55.107796 Detected 6 core, 8 thread CPU.
710 14:54:55.107859 Detected 6 core, 8 thread CPU.
711 14:54:55.107915 Detected 6 core, 8 thread CPU.
712 14:54:55.107968 Detected 6 core, 8 thread CPU.
713 14:54:55.108022 Detected 6 core, 8 thread CPU.
714 14:54:55.108074 Detected 6 core, 8 thread CPU.
715 14:54:55.108127 Detected 6 core, 8 thread CPU.
716 14:54:55.108180 Detected 6 core, 8 thread CPU.
717 14:54:55.108234 Detected 6 core, 8 thread CPU.
718 14:54:55.108298 Detected 6 core, 8 thread CPU.
719 14:54:55.108352 Detected 6 core, 8 thread CPU.
720 14:54:55.108404 Detected 6 core, 8 thread CPU.
721 14:54:55.108458 Detected 6 core, 8 thread CPU.
722 14:54:55.108511 Detected 6 core, 8 thread CPU.
723 14:54:55.108564 Detected 6 core, 8 thread CPU.
724 14:54:55.108617 Detected 6 core, 8 thread CPU.
725 14:54:55.108671 Detected 6 core, 8 thread CPU.
726 14:54:55.108753 Detected 6 core, 8 thread CPU.
727 14:54:55.108808 Detected 6 core, 8 thread CPU.
728 14:54:55.108862 Detected 6 core, 8 thread CPU.
729 14:54:55.108914 Detected 6 core, 8 thread CPU.
730 14:54:55.108967 Detected 6 core, 8 thread CPU.
731 14:54:55.109021 Detected 6 core, 8 thread CPU.
732 14:54:55.109075 Detected 6 core, 8 thread CPU.
733 14:54:55.109128 Display FSP Version Info HOB
734 14:54:55.109181 Reference Code - CPU = c.0.65.70
735 14:54:55.109234 uCode Version = 0.0.4.32
736 14:54:55.109287 TXT ACM version = ff.ff.ff.ffff
737 14:54:55.109341 Reference Code - ME = c.0.65.70
738 14:54:55.109393 MEBx version = 0.0.0.0
739 14:54:55.109446 ME Firmware Version = Consumer SKU
740 14:54:55.109499 Reference Code - PCH = c.0.65.70
741 14:54:55.109551 PCH-CRID Status = Disabled
742 14:54:55.109605 PCH-CRID Original Value = ff.ff.ff.ffff
743 14:54:55.109658 PCH-CRID New Value = ff.ff.ff.ffff
744 14:54:55.109712 OPROM - RST - RAID = ff.ff.ff.ffff
745 14:54:55.109766 PCH Hsio Version = 4.0.0.0
746 14:54:55.109821 Reference Code - SA - System Agent = c.0.65.70
747 14:54:55.109875 Reference Code - MRC = 0.0.3.80
748 14:54:55.109928 SA - PCIe Version = c.0.65.70
749 14:54:55.109981 SA-CRID Status = Disabled
750 14:54:55.110034 SA-CRID Original Value = 0.0.0.4
751 14:54:55.110088 SA-CRID New Value = 0.0.0.4
752 14:54:55.110141 OPROM - VBIOS = ff.ff.ff.ffff
753 14:54:55.110194 IO Manageability Engine FW Version = 24.0.6.0
754 14:54:55.110248 PHY Build Version = 0.0.0.2041
755 14:54:55.110301 Thunderbolt(TM) FW Version = 0.0.0.0
756 14:54:55.110355 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
757 14:54:55.110410 Sending EOP early from SoC
758 14:54:55.110463 HECI: coreboot in recovery mode; found CSE in expected SOFT TEMP DISABLE state, skipping EOP
759 14:54:55.110528 BS: BS_DEV_INIT_CHIPS run times (exec / console): 674 / 519 ms
760 14:54:55.110577 Enumerating buses...
761 14:54:55.110626 Show all devs... Before device enumeration.
762 14:54:55.110675 Root Device: enabled 1
763 14:54:55.110724 CPU_CLUSTER: 0: enabled 1
764 14:54:55.110967 DOMAIN: 0000: enabled 1
765 14:54:55.111021 GPIO: 0: enabled 1
766 14:54:55.111071 PCI: 00:00.0: enabled 1
767 14:54:55.111120 PCI: 00:01.0: enabled 0
768 14:54:55.111169 PCI: 00:01.1: enabled 0
769 14:54:55.111217 PCI: 00:02.0: enabled 1
770 14:54:55.111266 PCI: 00:04.0: enabled 1
771 14:54:55.111315 PCI: 00:05.0: enabled 0
772 14:54:55.111363 PCI: 00:06.0: enabled 1
773 14:54:55.111412 PCI: 00:06.2: enabled 0
774 14:54:55.111460 PCI: 00:07.0: enabled 0
775 14:54:55.111535 PCI: 00:07.1: enabled 0
776 14:54:55.111586 PCI: 00:07.2: enabled 0
777 14:54:55.111636 PCI: 00:07.3: enabled 0
778 14:54:55.111684 PCI: 00:08.0: enabled 0
779 14:54:55.111734 PCI: 00:09.0: enabled 0
780 14:54:55.111793 PCI: 00:0a.0: enabled 1
781 14:54:55.111851 PCI: 00:0d.0: enabled 1
782 14:54:55.111903 PCI: 00:0d.1: enabled 0
783 14:54:55.111952 PCI: 00:0d.2: enabled 0
784 14:54:55.112001 PCI: 00:0d.3: enabled 0
785 14:54:55.112050 PCI: 00:0e.0: enabled 0
786 14:54:55.112098 PCI: 00:10.0: enabled 0
787 14:54:55.112147 PCI: 00:10.1: enabled 0
788 14:54:55.112195 PCI: 00:10.6: enabled 0
789 14:54:55.112243 PCI: 00:10.7: enabled 0
790 14:54:55.112292 PCI: 00:12.0: enabled 0
791 14:54:55.112341 PCI: 00:12.6: enabled 0
792 14:54:55.112390 PCI: 00:12.7: enabled 0
793 14:54:55.112438 PCI: 00:13.0: enabled 0
794 14:54:55.112486 PCI: 00:14.0: enabled 1
795 14:54:55.112535 PCI: 00:14.1: enabled 0
796 14:54:55.112583 PCI: 00:14.2: enabled 1
797 14:54:55.112632 PCI: 00:14.3: enabled 1
798 14:54:55.112679 PCI: 00:15.0: enabled 1
799 14:54:55.112728 PCI: 00:15.1: enabled 1
800 14:54:55.112776 PCI: 00:15.2: enabled 0
801 14:54:55.112824 PCI: 00:15.3: enabled 1
802 14:54:55.112873 PCI: 00:16.0: enabled 1
803 14:54:55.112922 PCI: 00:16.1: enabled 0
804 14:54:55.112970 PCI: 00:16.2: enabled 0
805 14:54:55.113018 PCI: 00:16.3: enabled 0
806 14:54:55.113067 PCI: 00:16.4: enabled 0
807 14:54:55.113116 PCI: 00:16.5: enabled 0
808 14:54:55.113164 PCI: 00:17.0: enabled 1
809 14:54:55.113212 PCI: 00:19.0: enabled 0
810 14:54:55.113260 PCI: 00:19.1: enabled 1
811 14:54:55.113309 PCI: 00:19.2: enabled 0
812 14:54:55.113358 PCI: 00:1a.0: enabled 0
813 14:54:55.113406 PCI: 00:1c.0: enabled 0
814 14:54:55.113455 PCI: 00:1c.1: enabled 0
815 14:54:55.113503 PCI: 00:1c.2: enabled 0
816 14:54:55.113551 PCI: 00:1c.3: enabled 0
817 14:54:55.113599 PCI: 00:1c.4: enabled 0
818 14:54:55.113647 PCI: 00:1c.5: enabled 0
819 14:54:55.113695 PCI: 00:1c.6: enabled 0
820 14:54:55.113742 PCI: 00:1c.7: enabled 0
821 14:54:55.113790 PCI: 00:1d.0: enabled 0
822 14:54:55.113838 PCI: 00:1d.1: enabled 0
823 14:54:55.113886 PCI: 00:1d.2: enabled 0
824 14:54:55.113934 PCI: 00:1d.3: enabled 0
825 14:54:55.113982 PCI: 00:1e.0: enabled 1
826 14:54:55.114030 PCI: 00:1e.1: enabled 0
827 14:54:55.114086 PCI: 00:1e.2: enabled 0
828 14:54:55.114135 PCI: 00:1e.3: enabled 1
829 14:54:55.114183 PCI: 00:1f.0: enabled 1
830 14:54:55.114232 PCI: 00:1f.1: enabled 0
831 14:54:55.114279 PCI: 00:1f.2: enabled 1
832 14:54:55.114327 PCI: 00:1f.3: enabled 1
833 14:54:55.114375 PCI: 00:1f.4: enabled 0
834 14:54:55.114423 PCI: 00:1f.5: enabled 1
835 14:54:55.114471 PCI: 00:1f.6: enabled 0
836 14:54:55.114519 PCI: 00:1f.7: enabled 0
837 14:54:55.114567 GENERIC: 0.0: enabled 1
838 14:54:55.114616 GENERIC: 0.0: enabled 1
839 14:54:55.114664 GENERIC: 0.0: enabled 1
840 14:54:55.114712 GENERIC: 1.0: enabled 1
841 14:54:55.114772 GENERIC: 0.0: enabled 1
842 14:54:55.114820 GENERIC: 1.0: enabled 1
843 14:54:55.114869 USB0 port 0: enabled 1
844 14:54:55.114918 USB0 port 0: enabled 1
845 14:54:55.114966 GENERIC: 0.0: enabled 1
846 14:54:55.115014 I2C: 00:1a: enabled 1
847 14:54:55.115063 I2C: 00:31: enabled 1
848 14:54:55.115111 I2C: 00:32: enabled 1
849 14:54:55.115159 I2C: 00:50: enabled 1
850 14:54:55.115207 I2C: 00:10: enabled 1
851 14:54:55.115285 I2C: 00:15: enabled 1
852 14:54:55.115336 I2C: 00:2c: enabled 1
853 14:54:55.115385 GENERIC: 0.0: enabled 1
854 14:54:55.115434 SPI: 00: enabled 1
855 14:54:55.115496 PNP: 0c09.0: enabled 1
856 14:54:55.115545 GENERIC: 0.0: enabled 1
857 14:54:55.115593 USB3 port 0: enabled 1
858 14:54:55.115640 USB3 port 1: enabled 0
859 14:54:55.115688 USB3 port 2: enabled 1
860 14:54:55.115736 USB3 port 3: enabled 0
861 14:54:55.115783 USB2 port 0: enabled 1
862 14:54:55.115831 USB2 port 1: enabled 0
863 14:54:55.115931 USB2 port 2: enabled 1
864 14:54:55.115979 USB2 port 3: enabled 0
865 14:54:55.116027 USB2 port 4: enabled 0
866 14:54:55.116075 USB2 port 5: enabled 1
867 14:54:55.116123 USB2 port 6: enabled 0
868 14:54:55.116171 USB2 port 7: enabled 0
869 14:54:55.116218 USB2 port 8: enabled 1
870 14:54:55.116264 USB2 port 9: enabled 1
871 14:54:55.116312 USB3 port 0: enabled 1
872 14:54:55.116359 USB3 port 1: enabled 0
873 14:54:55.116406 USB3 port 2: enabled 0
874 14:54:55.116453 USB3 port 3: enabled 0
875 14:54:55.116500 GENERIC: 0.0: enabled 1
876 14:54:55.116548 GENERIC: 1.0: enabled 1
877 14:54:55.116595 APIC: 00: enabled 1
878 14:54:55.116643 APIC: 1a: enabled 1
879 14:54:55.116690 APIC: 1c: enabled 1
880 14:54:55.116738 APIC: 1e: enabled 1
881 14:54:55.116785 APIC: 18: enabled 1
882 14:54:55.116832 APIC: 09: enabled 1
883 14:54:55.116880 APIC: 01: enabled 1
884 14:54:55.116927 APIC: 08: enabled 1
885 14:54:55.116974 Compare with tree...
886 14:54:55.117021 Root Device: enabled 1
887 14:54:55.117068 CPU_CLUSTER: 0: enabled 1
888 14:54:55.117115 APIC: 00: enabled 1
889 14:54:55.117162 APIC: 1a: enabled 1
890 14:54:55.117210 APIC: 1c: enabled 1
891 14:54:55.117257 APIC: 1e: enabled 1
892 14:54:55.117304 APIC: 18: enabled 1
893 14:54:55.117352 APIC: 09: enabled 1
894 14:54:55.117399 APIC: 01: enabled 1
895 14:54:55.117447 APIC: 08: enabled 1
896 14:54:55.117495 DOMAIN: 0000: enabled 1
897 14:54:55.117541 GPIO: 0: enabled 1
898 14:54:55.117588 PCI: 00:00.0: enabled 1
899 14:54:55.117636 PCI: 00:01.0: enabled 0
900 14:54:55.117683 PCI: 00:01.1: enabled 0
901 14:54:55.117731 PCI: 00:02.0: enabled 1
902 14:54:55.117778 GENERIC: 0.0: enabled 1
903 14:54:55.117825 PCI: 00:04.0: enabled 1
904 14:54:55.117873 GENERIC: 0.0: enabled 1
905 14:54:55.117920 PCI: 00:05.0: enabled 0
906 14:54:55.117996 PCI: 00:06.0: enabled 1
907 14:54:55.118046 PCI: 00:06.2: enabled 0
908 14:54:55.118094 PCI: 00:08.0: enabled 0
909 14:54:55.118141 PCI: 00:09.0: enabled 0
910 14:54:55.118189 PCI: 00:0a.0: enabled 1
911 14:54:55.118237 PCI: 00:0d.0: enabled 1
912 14:54:55.118295 USB0 port 0: enabled 1
913 14:54:55.118344 USB3 port 0: enabled 1
914 14:54:55.118392 USB3 port 1: enabled 0
915 14:54:55.118440 USB3 port 2: enabled 1
916 14:54:55.118488 USB3 port 3: enabled 0
917 14:54:55.118535 PCI: 00:0d.1: enabled 0
918 14:54:55.118583 PCI: 00:0d.2: enabled 0
919 14:54:55.118631 PCI: 00:0d.3: enabled 0
920 14:54:55.118679 PCI: 00:0e.0: enabled 0
921 14:54:55.118727 PCI: 00:10.0: enabled 0
922 14:54:55.118775 PCI: 00:10.1: enabled 0
923 14:54:55.118823 PCI: 00:10.6: enabled 0
924 14:54:55.118870 PCI: 00:10.7: enabled 0
925 14:54:55.118919 PCI: 00:12.0: enabled 0
926 14:54:55.118967 PCI: 00:12.6: enabled 0
927 14:54:55.119015 PCI: 00:12.7: enabled 0
928 14:54:55.119063 PCI: 00:13.0: enabled 0
929 14:54:55.119311 PCI: 00:14.0: enabled 1
930 14:54:55.119366 USB0 port 0: enabled 1
931 14:54:55.119415 USB2 port 0: enabled 1
932 14:54:55.119464 USB2 port 1: enabled 0
933 14:54:55.119512 USB2 port 2: enabled 1
934 14:54:55.119560 USB2 port 3: enabled 0
935 14:54:55.119607 USB2 port 4: enabled 0
936 14:54:55.119655 USB2 port 5: enabled 1
937 14:54:55.119702 USB2 port 6: enabled 0
938 14:54:55.119749 USB2 port 7: enabled 0
939 14:54:55.119797 USB2 port 8: enabled 1
940 14:54:55.119875 USB2 port 9: enabled 1
941 14:54:55.119938 USB3 port 0: enabled 1
942 14:54:55.119986 USB3 port 1: enabled 0
943 14:54:55.120033 USB3 port 2: enabled 0
944 14:54:55.120081 USB3 port 3: enabled 0
945 14:54:55.120129 PCI: 00:14.1: enabled 0
946 14:54:55.120176 PCI: 00:14.2: enabled 1
947 14:54:55.120223 PCI: 00:14.3: enabled 1
948 14:54:55.120271 GENERIC: 0.0: enabled 1
949 14:54:55.120318 PCI: 00:15.0: enabled 1
950 14:54:55.120366 I2C: 00:1a: enabled 1
951 14:54:55.120413 I2C: 00:31: enabled 1
952 14:54:55.120460 I2C: 00:32: enabled 1
953 14:54:55.120507 PCI: 00:15.1: enabled 1
954 14:54:55.120555 I2C: 00:50: enabled 1
955 14:54:55.120603 PCI: 00:15.2: enabled 0
956 14:54:55.120651 PCI: 00:15.3: enabled 1
957 14:54:55.120697 I2C: 00:10: enabled 1
958 14:54:55.120745 PCI: 00:16.0: enabled 1
959 14:54:55.120792 PCI: 00:16.1: enabled 0
960 14:54:55.120839 PCI: 00:16.2: enabled 0
961 14:54:55.120887 PCI: 00:16.3: enabled 0
962 14:54:55.120934 PCI: 00:16.4: enabled 0
963 14:54:55.120981 PCI: 00:16.5: enabled 0
964 14:54:55.121029 PCI: 00:17.0: enabled 1
965 14:54:55.121076 PCI: 00:19.0: enabled 0
966 14:54:55.121123 PCI: 00:19.1: enabled 1
967 14:54:55.121170 I2C: 00:15: enabled 1
968 14:54:55.121217 I2C: 00:2c: enabled 1
969 14:54:55.121265 PCI: 00:19.2: enabled 0
970 14:54:55.121311 PCI: 00:1a.0: enabled 0
971 14:54:55.121358 PCI: 00:1e.0: enabled 1
972 14:54:55.121405 PCI: 00:1e.1: enabled 0
973 14:54:55.121453 PCI: 00:1e.2: enabled 0
974 14:54:55.121500 PCI: 00:1e.3: enabled 1
975 14:54:55.121548 SPI: 00: enabled 1
976 14:54:55.121595 PCI: 00:1f.0: enabled 1
977 14:54:55.121658 PNP: 0c09.0: enabled 1
978 14:54:55.121716 PCI: 00:1f.1: enabled 0
979 14:54:55.121764 PCI: 00:1f.2: enabled 1
980 14:54:55.121811 GENERIC: 0.0: enabled 1
981 14:54:55.121858 GENERIC: 0.0: enabled 1
982 14:54:55.121906 GENERIC: 1.0: enabled 1
983 14:54:55.121962 PCI: 00:1f.3: enabled 1
984 14:54:55.122011 PCI: 00:1f.4: enabled 0
985 14:54:55.122058 PCI: 00:1f.5: enabled 1
986 14:54:55.122106 PCI: 00:1f.6: enabled 0
987 14:54:55.122154 PCI: 00:1f.7: enabled 0
988 14:54:55.122201 Root Device scanning...
989 14:54:55.122248 scan_static_bus for Root Device
990 14:54:55.122295 CPU_CLUSTER: 0 enabled
991 14:54:55.122343 DOMAIN: 0000 enabled
992 14:54:55.122390 DOMAIN: 0000 scanning...
993 14:54:55.122437 PCI: pci_scan_bus for bus 00
994 14:54:55.122485 PCI: 00:00.0 [8086/0000] ops
995 14:54:55.122532 PCI: 00:00.0 [8086/4609] enabled
996 14:54:55.122578 PCI: 00:02.0 [8086/0000] bus ops
997 14:54:55.122626 PCI: 00:02.0 [8086/46b3] enabled
998 14:54:55.122674 PCI: 00:04.0 [8086/0000] bus ops
999 14:54:55.122722 PCI: 00:04.0 [8086/461d] enabled
1000 14:54:55.122768 PCI: 00:06.0 [8086/0000] bus ops
1001 14:54:55.122815 PCI: 00:06.0 [8086/464d] enabled
1002 14:54:55.122862 PCI: 00:08.0 [8086/464f] disabled
1003 14:54:55.122910 PCI: 00:0a.0 [8086/467d] enabled
1004 14:54:55.122957 PCI: 00:0d.0 [8086/0000] bus ops
1005 14:54:55.123005 PCI: 00:0d.0 [8086/461e] enabled
1006 14:54:55.123052 PCI: 00:14.0 [8086/0000] bus ops
1007 14:54:55.123099 PCI: 00:14.0 [8086/51ed] enabled
1008 14:54:55.123147 PCI: 00:14.2 [8086/51ef] enabled
1009 14:54:55.123194 PCI: 00:14.3 [8086/0000] bus ops
1010 14:54:55.123242 PCI: 00:14.3 [8086/51f0] enabled
1011 14:54:55.123290 PCI: 00:15.0 [8086/0000] bus ops
1012 14:54:55.123337 PCI: 00:15.0 [8086/51e8] enabled
1013 14:54:55.123385 PCI: 00:15.1 [8086/0000] bus ops
1014 14:54:55.123433 PCI: 00:15.1 [8086/51e9] enabled
1015 14:54:55.123481 PCI: 00:15.2 [8086/0000] bus ops
1016 14:54:55.123528 PCI: 00:15.2 [8086/51ea] disabled
1017 14:54:55.123576 PCI: 00:15.3 [8086/0000] bus ops
1018 14:54:55.123624 PCI: 00:15.3 [8086/51eb] enabled
1019 14:54:55.123671 PCI: 00:16.0 [8086/0000] ops
1020 14:54:55.123719 PCI: 00:16.0 [8086/51e0] enabled
1021 14:54:55.123766 PCI: Static device PCI: 00:17.0 not found, disabling it.
1022 14:54:55.123816 PCI: 00:19.0 [8086/0000] bus ops
1023 14:54:55.123914 PCI: 00:19.0 [8086/51c5] disabled
1024 14:54:55.123964 PCI: 00:19.1 [8086/0000] bus ops
1025 14:54:55.124012 PCI: 00:19.1 [8086/51c6] enabled
1026 14:54:55.124060 PCI: 00:1e.0 [8086/0000] ops
1027 14:54:55.124108 PCI: 00:1e.0 [8086/51a8] enabled
1028 14:54:55.124155 PCI: 00:1e.3 [8086/0000] bus ops
1029 14:54:55.124203 PCI: 00:1e.3 [8086/51ab] enabled
1030 14:54:55.124250 PCI: 00:1f.0 [8086/0000] bus ops
1031 14:54:55.124298 PCI: 00:1f.0 [8086/5182] enabled
1032 14:54:55.124346 RTC Init
1033 14:54:55.124394 Set power on after power failure.
1034 14:54:55.124442 Disabling Deep S3
1035 14:54:55.124490 Disabling Deep S3
1036 14:54:55.124537 Disabling Deep S4
1037 14:54:55.124584 Disabling Deep S4
1038 14:54:55.124631 Disabling Deep S5
1039 14:54:55.124679 Disabling Deep S5
1040 14:54:55.124726 PCI: 00:1f.2 [0000/0000] hidden
1041 14:54:55.124773 PCI: 00:1f.3 [8086/0000] bus ops
1042 14:54:55.124830 PCI: 00:1f.3 [8086/51c8] enabled
1043 14:54:55.124879 PCI: 00:1f.5 [8086/0000] bus ops
1044 14:54:55.124927 PCI: 00:1f.5 [8086/51a4] enabled
1045 14:54:55.124975 GPIO: 0 enabled
1046 14:54:55.125022 PCI: Leftover static devices:
1047 14:54:55.125070 PCI: 00:01.0
1048 14:54:55.125118 PCI: 00:01.1
1049 14:54:55.125176 PCI: 00:05.0
1050 14:54:55.125237 PCI: 00:06.2
1051 14:54:55.125286 PCI: 00:09.0
1052 14:54:55.125333 PCI: 00:0d.1
1053 14:54:55.125381 PCI: 00:0d.2
1054 14:54:55.125429 PCI: 00:0d.3
1055 14:54:55.125477 PCI: 00:0e.0
1056 14:54:55.125524 PCI: 00:10.0
1057 14:54:55.125571 PCI: 00:10.1
1058 14:54:55.125619 PCI: 00:10.6
1059 14:54:55.125666 PCI: 00:10.7
1060 14:54:55.125713 PCI: 00:12.0
1061 14:54:55.125760 PCI: 00:12.6
1062 14:54:55.125807 PCI: 00:12.7
1063 14:54:55.125854 PCI: 00:13.0
1064 14:54:55.125901 PCI: 00:14.1
1065 14:54:55.125947 PCI: 00:16.1
1066 14:54:55.125994 PCI: 00:16.2
1067 14:54:55.126042 PCI: 00:16.3
1068 14:54:55.126089 PCI: 00:16.4
1069 14:54:55.126136 PCI: 00:16.5
1070 14:54:55.126183 PCI: 00:17.0
1071 14:54:55.126230 PCI: 00:19.2
1072 14:54:55.126277 PCI: 00:1a.0
1073 14:54:55.126323 PCI: 00:1e.1
1074 14:54:55.126370 PCI: 00:1e.2
1075 14:54:55.126417 PCI: 00:1f.1
1076 14:54:55.126463 PCI: 00:1f.4
1077 14:54:55.126510 PCI: 00:1f.6
1078 14:54:55.126556 PCI: 00:1f.7
1079 14:54:55.126603 PCI: Check your devicetree.cb.
1080 14:54:55.126650 PCI: 00:02.0 scanning...
1081 14:54:55.126698 scan_generic_bus for PCI: 00:02.0
1082 14:54:55.126746 GENERIC: 0.0 enabled
1083 14:54:55.126793 bus: PCI: 00:02.0[0]->scan_generic_bus for PCI: 00:02.0 done
1084 14:54:55.127033 scan_bus: bus PCI: 00:02.0 finished in 11 msecs
1085 14:54:55.127089 PCI: 00:04.0 scanning...
1086 14:54:55.127138 scan_generic_bus for PCI: 00:04.0
1087 14:54:55.127186 GENERIC: 0.0 enabled
1088 14:54:55.127235 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1089 14:54:55.127283 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1090 14:54:55.127331 PCI: 00:06.0 scanning...
1091 14:54:55.127379 do_pci_scan_bridge for PCI: 00:06.0
1092 14:54:55.127426 PCI: pci_scan_bus for bus 01
1093 14:54:55.127475 PCI: 01:00.0 [15b7/5009] enabled
1094 14:54:55.127522 Enabling Common Clock Configuration
1095 14:54:55.127570 L1 Sub-State supported from root port 6
1096 14:54:55.127618 L1 Sub-State Support = 0x5
1097 14:54:55.127666 CommonModeRestoreTime = 0x6e
1098 14:54:55.127714 Power On Value = 0x5, Power On Scale = 0x2
1099 14:54:55.127762 ASPM: Enabled L1
1100 14:54:55.127809 PCIe: Max_Payload_Size adjusted to 256
1101 14:54:55.127864 PCI: 01:00.0: Enabled LTR
1102 14:54:55.127913 PCI: 01:00.0: Programmed LTR max latencies
1103 14:54:55.127961 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1104 14:54:55.128020 PCI: 00:0d.0 scanning...
1105 14:54:55.128083 scan_static_bus for PCI: 00:0d.0
1106 14:54:55.128132 USB0 port 0 enabled
1107 14:54:55.128180 USB0 port 0 scanning...
1108 14:54:55.128228 scan_static_bus for USB0 port 0
1109 14:54:55.128276 USB3 port 0 enabled
1110 14:54:55.128324 USB3 port 1 disabled
1111 14:54:55.128380 USB3 port 2 enabled
1112 14:54:55.128429 USB3 port 3 disabled
1113 14:54:55.128476 USB3 port 0 scanning...
1114 14:54:55.128524 scan_static_bus for USB3 port 0
1115 14:54:55.128572 scan_static_bus for USB3 port 0 done
1116 14:54:55.128619 scan_bus: bus USB3 port 0 finished in 6 msecs
1117 14:54:55.128666 USB3 port 2 scanning...
1118 14:54:55.128714 scan_static_bus for USB3 port 2
1119 14:54:55.128762 scan_static_bus for USB3 port 2 done
1120 14:54:55.128809 scan_bus: bus USB3 port 2 finished in 6 msecs
1121 14:54:55.128856 scan_static_bus for USB0 port 0 done
1122 14:54:55.128904 scan_bus: bus USB0 port 0 finished in 43 msecs
1123 14:54:55.128952 scan_static_bus for PCI: 00:0d.0 done
1124 14:54:55.129000 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1125 14:54:55.129047 PCI: 00:14.0 scanning...
1126 14:54:55.129095 scan_static_bus for PCI: 00:14.0
1127 14:54:55.129143 USB0 port 0 enabled
1128 14:54:55.129190 USB0 port 0 scanning...
1129 14:54:55.129238 scan_static_bus for USB0 port 0
1130 14:54:55.129285 USB2 port 0 enabled
1131 14:54:55.129333 USB2 port 1 disabled
1132 14:54:55.129380 USB2 port 2 enabled
1133 14:54:55.129427 USB2 port 3 disabled
1134 14:54:55.129475 USB2 port 4 disabled
1135 14:54:55.129521 USB2 port 5 enabled
1136 14:54:55.129568 USB2 port 6 disabled
1137 14:54:55.129616 USB2 port 7 disabled
1138 14:54:55.129663 USB2 port 8 enabled
1139 14:54:55.129711 USB2 port 9 enabled
1140 14:54:55.129760 USB3 port 0 enabled
1141 14:54:55.129808 USB3 port 1 disabled
1142 14:54:55.129855 USB3 port 2 disabled
1143 14:54:55.129903 USB3 port 3 disabled
1144 14:54:55.129950 USB2 port 0 scanning...
1145 14:54:55.129999 scan_static_bus for USB2 port 0
1146 14:54:55.130046 scan_static_bus for USB2 port 0 done
1147 14:54:55.130094 scan_bus: bus USB2 port 0 finished in 6 msecs
1148 14:54:55.130142 USB2 port 2 scanning...
1149 14:54:55.130189 scan_static_bus for USB2 port 2
1150 14:54:55.130237 scan_static_bus for USB2 port 2 done
1151 14:54:55.130285 scan_bus: bus USB2 port 2 finished in 6 msecs
1152 14:54:55.130333 USB2 port 5 scanning...
1153 14:54:55.130380 scan_static_bus for USB2 port 5
1154 14:54:55.130429 scan_static_bus for USB2 port 5 done
1155 14:54:55.130477 scan_bus: bus USB2 port 5 finished in 6 msecs
1156 14:54:55.130525 USB2 port 8 scanning...
1157 14:54:55.130572 scan_static_bus for USB2 port 8
1158 14:54:55.130620 scan_static_bus for USB2 port 8 done
1159 14:54:55.130667 scan_bus: bus USB2 port 8 finished in 6 msecs
1160 14:54:55.130716 USB2 port 9 scanning...
1161 14:54:55.130764 scan_static_bus for USB2 port 9
1162 14:54:55.130811 scan_static_bus for USB2 port 9 done
1163 14:54:55.130859 scan_bus: bus USB2 port 9 finished in 6 msecs
1164 14:54:55.130907 USB3 port 0 scanning...
1165 14:54:55.130955 scan_static_bus for USB3 port 0
1166 14:54:55.131002 scan_static_bus for USB3 port 0 done
1167 14:54:55.131050 scan_bus: bus USB3 port 0 finished in 6 msecs
1168 14:54:55.131097 scan_static_bus for USB0 port 0 done
1169 14:54:55.131144 scan_bus: bus USB0 port 0 finished in 120 msecs
1170 14:54:55.131192 scan_static_bus for PCI: 00:14.0 done
1171 14:54:55.131240 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1172 14:54:55.131287 PCI: 00:14.3 scanning...
1173 14:54:55.131335 scan_static_bus for PCI: 00:14.3
1174 14:54:55.131382 GENERIC: 0.0 enabled
1175 14:54:55.131430 scan_static_bus for PCI: 00:14.3 done
1176 14:54:55.131505 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1177 14:54:55.131556 PCI: 00:15.0 scanning...
1178 14:54:55.131604 scan_static_bus for PCI: 00:15.0
1179 14:54:55.131652 I2C: 00:1a enabled
1180 14:54:55.131701 I2C: 00:31 enabled
1181 14:54:55.131758 I2C: 00:32 enabled
1182 14:54:55.131807 scan_static_bus for PCI: 00:15.0 done
1183 14:54:55.131862 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1184 14:54:55.131912 PCI: 00:15.1 scanning...
1185 14:54:55.131960 scan_static_bus for PCI: 00:15.1
1186 14:54:55.132008 I2C: 00:50 enabled
1187 14:54:55.132055 scan_static_bus for PCI: 00:15.1 done
1188 14:54:55.132103 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1189 14:54:55.132150 PCI: 00:15.3 scanning...
1190 14:54:55.132198 scan_static_bus for PCI: 00:15.3
1191 14:54:55.132245 I2C: 00:10 enabled
1192 14:54:55.132293 scan_static_bus for PCI: 00:15.3 done
1193 14:54:55.132341 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1194 14:54:55.132389 PCI: 00:19.1 scanning...
1195 14:54:55.132436 scan_static_bus for PCI: 00:19.1
1196 14:54:55.132483 I2C: 00:15 enabled
1197 14:54:55.132530 I2C: 00:2c enabled
1198 14:54:55.132577 scan_static_bus for PCI: 00:19.1 done
1199 14:54:55.132625 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1200 14:54:55.132673 PCI: 00:1e.3 scanning...
1201 14:54:55.132721 scan_generic_bus for PCI: 00:1e.3
1202 14:54:55.132769 SPI: 00 enabled
1203 14:54:55.132816 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1204 14:54:55.132864 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1205 14:54:55.132912 PCI: 00:1f.0 scanning...
1206 14:54:55.132959 scan_static_bus for PCI: 00:1f.0
1207 14:54:55.133006 PNP: 0c09.0 enabled
1208 14:54:55.133054 PNP: 0c09.0 scanning...
1209 14:54:55.133101 scan_static_bus for PNP: 0c09.0
1210 14:54:55.133338 scan_static_bus for PNP: 0c09.0 done
1211 14:54:55.133392 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1212 14:54:55.133441 scan_static_bus for PCI: 00:1f.0 done
1213 14:54:55.133489 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1214 14:54:55.133537 PCI: 00:1f.2 scanning...
1215 14:54:55.133585 scan_static_bus for PCI: 00:1f.2
1216 14:54:55.133633 GENERIC: 0.0 enabled
1217 14:54:55.133680 GENERIC: 0.0 scanning...
1218 14:54:55.133728 scan_static_bus for GENERIC: 0.0
1219 14:54:55.133776 GENERIC: 0.0 enabled
1220 14:54:55.133823 GENERIC: 1.0 enabled
1221 14:54:55.133871 scan_static_bus for GENERIC: 0.0 done
1222 14:54:55.133919 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1223 14:54:55.133968 scan_static_bus for PCI: 00:1f.2 done
1224 14:54:55.134015 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1225 14:54:55.134063 PCI: 00:1f.3 scanning...
1226 14:54:55.134110 scan_static_bus for PCI: 00:1f.3
1227 14:54:55.134158 scan_static_bus for PCI: 00:1f.3 done
1228 14:54:55.134205 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1229 14:54:55.134253 PCI: 00:1f.5 scanning...
1230 14:54:55.134300 scan_generic_bus for PCI: 00:1f.5
1231 14:54:55.134347 scan_generic_bus for PCI: 00:1f.5 done
1232 14:54:55.134394 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1233 14:54:55.134441 scan_bus: bus DOMAIN: 0000 finished in 714 msecs
1234 14:54:55.134487 scan_static_bus for Root Device done
1235 14:54:55.134533 scan_bus: bus Root Device finished in 733 msecs
1236 14:54:55.134580 done
1237 14:54:55.134627 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1306 ms
1238 14:54:55.134675 Chrome EC: UHEPI supported
1239 14:54:55.134722 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1240 14:54:55.134769 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1241 14:54:55.134816 SPI flash protection: WPSW=0 SRP0=0
1242 14:54:55.134863 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1243 14:54:55.134910 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1244 14:54:55.134965 found VGA at PCI: 00:02.0
1245 14:54:55.135034 Setting up VGA for PCI: 00:02.0
1246 14:54:55.135086 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1247 14:54:55.135134 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1248 14:54:55.135182 Allocating resources...
1249 14:54:55.135229 Reading resources...
1250 14:54:55.135276 Root Device read_resources bus 0 link: 0
1251 14:54:55.135324 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1252 14:54:55.135371 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1253 14:54:55.135418 DOMAIN: 0000 read_resources bus 0 link: 0
1254 14:54:55.135464 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1255 14:54:55.135512 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1256 14:54:55.135559 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1257 14:54:55.135607 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1258 14:54:55.135654 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1259 14:54:55.135702 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1260 14:54:55.135749 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1261 14:54:55.135797 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1262 14:54:55.135876 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1263 14:54:55.135942 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1264 14:54:55.135990 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1265 14:54:55.136039 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1266 14:54:55.136087 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1267 14:54:55.136135 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1268 14:54:55.136183 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1269 14:54:55.136231 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1270 14:54:55.136278 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1271 14:54:55.136325 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1272 14:54:55.136373 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1273 14:54:55.136420 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1274 14:54:55.136468 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1275 14:54:55.136516 PCI: 00:02.0 read_resources bus 1 link: 0
1276 14:54:55.136563 GENERIC: 0.0 missing read_resources
1277 14:54:55.136611 PCI: 00:02.0 read_resources bus 1 link: 0 done
1278 14:54:55.136658 PCI: 00:04.0 read_resources bus 2 link: 0
1279 14:54:55.136705 PCI: 00:04.0 read_resources bus 2 link: 0 done
1280 14:54:55.136752 PCI: 00:06.0 read_resources bus 1 link: 0
1281 14:54:55.136799 PCI: 00:06.0 read_resources bus 1 link: 0 done
1282 14:54:55.136847 PCI: 00:0d.0 read_resources bus 0 link: 0
1283 14:54:55.136894 USB0 port 0 read_resources bus 0 link: 0
1284 14:54:55.136941 USB0 port 0 read_resources bus 0 link: 0 done
1285 14:54:55.136988 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1286 14:54:55.137036 PCI: 00:14.0 read_resources bus 0 link: 0
1287 14:54:55.137082 USB0 port 0 read_resources bus 0 link: 0
1288 14:54:55.137129 USB0 port 0 read_resources bus 0 link: 0 done
1289 14:54:55.137176 PCI: 00:14.0 read_resources bus 0 link: 0 done
1290 14:54:55.137223 PCI: 00:14.3 read_resources bus 0 link: 0
1291 14:54:55.137271 PCI: 00:14.3 read_resources bus 0 link: 0 done
1292 14:54:55.137318 PCI: 00:15.0 read_resources bus 0 link: 0
1293 14:54:55.137366 PCI: 00:15.0 read_resources bus 0 link: 0 done
1294 14:54:55.137413 PCI: 00:15.1 read_resources bus 0 link: 0
1295 14:54:55.137460 PCI: 00:15.1 read_resources bus 0 link: 0 done
1296 14:54:55.137507 PCI: 00:15.3 read_resources bus 0 link: 0
1297 14:54:55.137742 PCI: 00:15.3 read_resources bus 0 link: 0 done
1298 14:54:55.137812 PCI: 00:19.1 read_resources bus 0 link: 0
1299 14:54:55.137862 PCI: 00:19.1 read_resources bus 0 link: 0 done
1300 14:54:55.137922 PCI: 00:1e.3 read_resources bus 3 link: 0
1301 14:54:55.137969 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1302 14:54:55.138016 PCI: 00:1f.0 read_resources bus 0 link: 0
1303 14:54:55.138088 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1304 14:54:55.138151 PCI: 00:1f.2 read_resources bus 0 link: 0
1305 14:54:55.138202 GENERIC: 0.0 read_resources bus 0 link: 0
1306 14:54:55.138250 GENERIC: 0.0 read_resources bus 0 link: 0 done
1307 14:54:55.138299 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1308 14:54:55.138389 DOMAIN: 0000 read_resources bus 0 link: 0 done
1309 14:54:55.138451 Root Device read_resources bus 0 link: 0 done
1310 14:54:55.138498 Done reading resources.
1311 14:54:55.138546 Show resources in subtree (Root Device)...After reading.
1312 14:54:55.138596 Root Device child on link 0 CPU_CLUSTER: 0
1313 14:54:55.138686 CPU_CLUSTER: 0 child on link 0 APIC: 00
1314 14:54:55.138751 APIC: 00
1315 14:54:55.138837 APIC: 1a
1316 14:54:55.138938 APIC: 1c
1317 14:54:55.139027 APIC: 1e
1318 14:54:55.139106 APIC: 18
1319 14:54:55.139187 APIC: 09
1320 14:54:55.139238 APIC: 01
1321 14:54:55.139286 APIC: 08
1322 14:54:55.139333 DOMAIN: 0000 child on link 0 GPIO: 0
1323 14:54:55.139381 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1324 14:54:55.139430 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1325 14:54:55.139478 GPIO: 0
1326 14:54:55.139525 PCI: 00:00.0
1327 14:54:55.139572 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1328 14:54:55.139621 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1329 14:54:55.139669 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1330 14:54:55.139717 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1331 14:54:55.139764 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1332 14:54:55.139812 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1333 14:54:55.139904 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1334 14:54:55.139955 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1335 14:54:55.140003 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1336 14:54:55.140051 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1337 14:54:55.140099 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1338 14:54:55.140147 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1339 14:54:55.140195 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1340 14:54:55.140243 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1341 14:54:55.140292 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1342 14:54:55.140341 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1343 14:54:55.140389 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1344 14:54:55.140437 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1345 14:54:55.140486 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1346 14:54:55.140534 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1347 14:54:55.140583 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1348 14:54:55.140632 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1349 14:54:55.140680 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1350 14:54:55.140728 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1351 14:54:55.140776 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1352 14:54:55.140824 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1353 14:54:55.140872 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1354 14:54:55.140920 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1355 14:54:55.140968 PCI: 00:02.0 child on link 0 GENERIC: 0.0
1356 14:54:55.141016 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1357 14:54:55.141065 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1358 14:54:55.141312 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1359 14:54:55.141369 GENERIC: 0.0
1360 14:54:55.141418 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1361 14:54:55.141467 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1362 14:54:55.141516 GENERIC: 0.0
1363 14:54:55.141564 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1364 14:54:55.141612 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1365 14:54:55.141660 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1366 14:54:55.141708 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1367 14:54:55.141785 PCI: 01:00.0
1368 14:54:55.141836 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1369 14:54:55.141885 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1370 14:54:55.141934 PCI: 00:08.0
1371 14:54:55.141982 PCI: 00:0a.0
1372 14:54:55.142029 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1373 14:54:55.142077 PCI: 00:0d.0 child on link 0 USB0 port 0
1374 14:54:55.142125 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1375 14:54:55.142175 USB0 port 0 child on link 0 USB3 port 0
1376 14:54:55.142223 USB3 port 0
1377 14:54:55.142270 USB3 port 1
1378 14:54:55.142317 USB3 port 2
1379 14:54:55.142364 USB3 port 3
1380 14:54:55.142412 PCI: 00:14.0 child on link 0 USB0 port 0
1381 14:54:55.142459 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1382 14:54:55.142507 USB0 port 0 child on link 0 USB2 port 0
1383 14:54:55.142555 USB2 port 0
1384 14:54:55.142602 USB2 port 1
1385 14:54:55.142649 USB2 port 2
1386 14:54:55.142696 USB2 port 3
1387 14:54:55.142743 USB2 port 4
1388 14:54:55.142790 USB2 port 5
1389 14:54:55.142837 USB2 port 6
1390 14:54:55.142885 USB2 port 7
1391 14:54:55.142932 USB2 port 8
1392 14:54:55.142978 USB2 port 9
1393 14:54:55.143024 USB3 port 0
1394 14:54:55.143071 USB3 port 1
1395 14:54:55.143118 USB3 port 2
1396 14:54:55.143166 USB3 port 3
1397 14:54:55.143213 PCI: 00:14.2
1398 14:54:55.143261 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1399 14:54:55.143309 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1400 14:54:55.143358 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1401 14:54:55.143405 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1402 14:54:55.143453 GENERIC: 0.0
1403 14:54:55.143500 PCI: 00:15.0 child on link 0 I2C: 00:1a
1404 14:54:55.143548 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1405 14:54:55.143596 I2C: 00:1a
1406 14:54:55.143642 I2C: 00:31
1407 14:54:55.143689 I2C: 00:32
1408 14:54:55.143736 PCI: 00:15.1 child on link 0 I2C: 00:50
1409 14:54:55.143783 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1410 14:54:55.143831 I2C: 00:50
1411 14:54:55.143938 PCI: 00:15.2
1412 14:54:55.143987 PCI: 00:15.3 child on link 0 I2C: 00:10
1413 14:54:55.144035 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1414 14:54:55.144084 I2C: 00:10
1415 14:54:55.144132 PCI: 00:16.0
1416 14:54:55.144180 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1417 14:54:55.144228 PCI: 00:19.0
1418 14:54:55.144276 PCI: 00:19.1 child on link 0 I2C: 00:15
1419 14:54:55.144323 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1420 14:54:55.144371 I2C: 00:15
1421 14:54:55.144418 I2C: 00:2c
1422 14:54:55.144465 PCI: 00:1e.0
1423 14:54:55.144521 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1424 14:54:55.144589 PCI: 00:1e.3 child on link 0 SPI: 00
1425 14:54:55.144638 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1426 14:54:55.144689 SPI: 00
1427 14:54:55.144737 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1428 14:54:55.144786 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1429 14:54:55.144834 PNP: 0c09.0
1430 14:54:55.144892 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1431 14:54:55.144942 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1432 14:54:55.144990 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 14:54:55.145039 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1434 14:54:55.145087 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1435 14:54:55.145135 GENERIC: 0.0
1436 14:54:55.145182 GENERIC: 1.0
1437 14:54:55.145229 PCI: 00:1f.3
1438 14:54:55.145276 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1439 14:54:55.145325 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1440 14:54:55.145373 PCI: 00:1f.5
1441 14:54:55.145420 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1442 14:54:55.145654 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1443 14:54:55.145713 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1444 14:54:55.145762 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1445 14:54:55.145810 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1446 14:54:55.145858 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1447 14:54:55.145906 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1448 14:54:55.145953 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1449 14:54:55.146001 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1450 14:54:55.146049 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1451 14:54:55.146096 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1452 14:54:55.146144 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1453 14:54:55.146192 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1454 14:54:55.146240 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1455 14:54:55.146288 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1456 14:54:55.146336 DOMAIN: 0000: Resource ranges:
1457 14:54:55.146383 * Base: 1000, Size: 800, Tag: 100
1458 14:54:55.146431 * Base: 1900, Size: e700, Tag: 100
1459 14:54:55.146478 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1460 14:54:55.146526 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1461 14:54:55.146573 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1462 14:54:55.146621 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1463 14:54:55.146668 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1464 14:54:55.146720 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1465 14:54:55.146775 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1466 14:54:55.146831 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1467 14:54:55.146880 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1468 14:54:55.146927 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1469 14:54:55.146975 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1470 14:54:55.147023 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1471 14:54:55.147071 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1472 14:54:55.147119 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1473 14:54:55.147167 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1474 14:54:55.147214 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1475 14:54:55.147262 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1476 14:54:55.147309 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1477 14:54:55.147356 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1478 14:54:55.147404 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1479 14:54:55.147452 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1480 14:54:55.147499 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1481 14:54:55.147547 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1482 14:54:55.147595 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1483 14:54:55.147643 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1484 14:54:55.147691 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1485 14:54:55.147739 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1486 14:54:55.147787 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1487 14:54:55.147835 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1488 14:54:55.147932 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1489 14:54:55.147980 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1490 14:54:55.148041 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1491 14:54:55.148103 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1492 14:54:55.148163 DOMAIN: 0000: Resource ranges:
1493 14:54:55.148212 * Base: 80400000, Size: 3fc00000, Tag: 200
1494 14:54:55.148260 * Base: d0000000, Size: 28000000, Tag: 200
1495 14:54:55.148307 * Base: fa000000, Size: 1000000, Tag: 200
1496 14:54:55.148355 * Base: fb001000, Size: 17ff000, Tag: 200
1497 14:54:55.148403 * Base: fe800000, Size: 300000, Tag: 200
1498 14:54:55.148450 * Base: feb80000, Size: 80000, Tag: 200
1499 14:54:55.148497 * Base: fed00000, Size: 40000, Tag: 200
1500 14:54:55.148544 * Base: fed70000, Size: 10000, Tag: 200
1501 14:54:55.148592 * Base: fed88000, Size: 8000, Tag: 200
1502 14:54:55.148647 * Base: fed93000, Size: d000, Tag: 200
1503 14:54:55.148884 * Base: feda2000, Size: 1e000, Tag: 200
1504 14:54:55.148937 * Base: fede0000, Size: 1220000, Tag: 200
1505 14:54:55.148986 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1506 14:54:55.149034 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1507 14:54:55.149082 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1508 14:54:55.149130 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1509 14:54:55.149178 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1510 14:54:55.149226 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1511 14:54:55.149273 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1512 14:54:55.149321 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1513 14:54:55.149369 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1514 14:54:55.149417 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1515 14:54:55.149465 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1516 14:54:55.149514 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1517 14:54:55.149561 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1518 14:54:55.149609 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1519 14:54:55.149656 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1520 14:54:55.149703 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1521 14:54:55.149751 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1522 14:54:55.149798 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1523 14:54:55.149845 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1524 14:54:55.149893 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1525 14:54:55.149940 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1526 14:54:55.149988 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1527 14:54:55.150036 PCI: 00:06.0: Resource ranges:
1528 14:54:55.150083 * Base: 80400000, Size: 100000, Tag: 200
1529 14:54:55.150130 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1530 14:54:55.150177 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1531 14:54:55.150224 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1532 14:54:55.150272 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1533 14:54:55.150320 Root Device assign_resources, bus 0 link: 0
1534 14:54:55.150368 DOMAIN: 0000 assign_resources, bus 0 link: 0
1535 14:54:55.150415 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1536 14:54:55.150464 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1537 14:54:55.150512 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1538 14:54:55.150560 PCI: 00:02.0 assign_resources, bus 1 link: 0
1539 14:54:55.150607 PCI: 00:02.0 assign_resources, bus 1 link: 0 done
1540 14:54:55.150654 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1541 14:54:55.150701 PCI: 00:04.0 assign_resources, bus 2 link: 0
1542 14:54:55.150749 PCI: 00:04.0 assign_resources, bus 2 link: 0 done
1543 14:54:55.150797 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1544 14:54:55.150844 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1545 14:54:55.150893 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1546 14:54:55.150942 PCI: 00:06.0 assign_resources, bus 1 link: 0
1547 14:54:55.150988 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1548 14:54:55.151036 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1549 14:54:55.151084 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1550 14:54:55.151131 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1551 14:54:55.151180 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1552 14:54:55.151228 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1553 14:54:55.151275 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1554 14:54:55.151349 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1555 14:54:55.151400 PCI: 00:14.0 assign_resources, bus 0 link: 0
1556 14:54:55.151447 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1557 14:54:55.151496 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1558 14:54:55.151544 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1559 14:54:55.151592 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1560 14:54:55.151640 PCI: 00:14.3 assign_resources, bus 0 link: 0
1561 14:54:55.151688 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1562 14:54:55.151745 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1563 14:54:55.151793 PCI: 00:15.0 assign_resources, bus 0 link: 0
1564 14:54:55.151881 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1565 14:54:55.152118 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1566 14:54:55.152174 PCI: 00:15.1 assign_resources, bus 0 link: 0
1567 14:54:55.152223 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1568 14:54:55.152272 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1569 14:54:55.152320 PCI: 00:15.3 assign_resources, bus 0 link: 0
1570 14:54:55.152367 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1571 14:54:55.152415 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1572 14:54:55.152463 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1573 14:54:55.152510 PCI: 00:19.1 assign_resources, bus 0 link: 0
1574 14:54:55.152557 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1575 14:54:55.152606 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1576 14:54:55.152654 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1577 14:54:55.152701 PCI: 00:1e.3 assign_resources, bus 3 link: 0 done
1578 14:54:55.152748 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1579 14:54:55.152795 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1580 14:54:55.152842 LPC: Trying to open IO window from 800 size 1ff
1581 14:54:55.152890 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1582 14:54:55.152939 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1583 14:54:55.152987 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1584 14:54:55.153034 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1585 14:54:55.153082 Root Device assign_resources, bus 0 link: 0 done
1586 14:54:55.153129 Done setting resources.
1587 14:54:55.153175 Show resources in subtree (Root Device)...After assigning values.
1588 14:54:55.153223 Root Device child on link 0 CPU_CLUSTER: 0
1589 14:54:55.153271 CPU_CLUSTER: 0 child on link 0 APIC: 00
1590 14:54:55.153318 APIC: 00
1591 14:54:55.153365 APIC: 1a
1592 14:54:55.153411 APIC: 1c
1593 14:54:55.153458 APIC: 1e
1594 14:54:55.153504 APIC: 18
1595 14:54:55.153551 APIC: 09
1596 14:54:55.153597 APIC: 01
1597 14:54:55.153644 APIC: 08
1598 14:54:55.153690 DOMAIN: 0000 child on link 0 GPIO: 0
1599 14:54:55.153739 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1600 14:54:55.153787 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1601 14:54:55.153835 GPIO: 0
1602 14:54:55.153882 PCI: 00:00.0
1603 14:54:55.153929 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1604 14:54:55.153978 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1605 14:54:55.154026 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1606 14:54:55.154074 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1607 14:54:55.154122 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1608 14:54:55.154170 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1609 14:54:55.154219 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1610 14:54:55.154266 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1611 14:54:55.154343 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1612 14:54:55.154395 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1613 14:54:55.154444 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1614 14:54:55.154493 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1615 14:54:55.154541 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1616 14:54:55.154590 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1617 14:54:55.154638 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1618 14:54:55.154695 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1619 14:54:55.154744 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1620 14:54:55.154793 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1621 14:54:55.154842 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1622 14:54:55.154892 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1623 14:54:55.154940 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1624 14:54:55.154988 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1625 14:54:55.155036 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1626 14:54:55.155271 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1627 14:54:55.155325 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1628 14:54:55.155375 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1629 14:54:55.155423 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1630 14:54:55.155472 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1631 14:54:55.155520 PCI: 00:02.0 child on link 0 GENERIC: 0.0
1632 14:54:55.155569 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1633 14:54:55.155618 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1634 14:54:55.155667 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1635 14:54:55.155715 GENERIC: 0.0
1636 14:54:55.155763 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1637 14:54:55.155810 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1638 14:54:55.155908 GENERIC: 0.0
1639 14:54:55.155957 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1640 14:54:55.156005 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1641 14:54:55.156055 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1642 14:54:55.156104 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1643 14:54:55.156153 PCI: 01:00.0
1644 14:54:55.156201 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1645 14:54:55.156249 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1646 14:54:55.156297 PCI: 00:08.0
1647 14:54:55.156344 PCI: 00:0a.0
1648 14:54:55.156392 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1649 14:54:55.156440 PCI: 00:0d.0 child on link 0 USB0 port 0
1650 14:54:55.156488 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1651 14:54:55.156537 USB0 port 0 child on link 0 USB3 port 0
1652 14:54:55.156585 USB3 port 0
1653 14:54:55.156632 USB3 port 1
1654 14:54:55.156679 USB3 port 2
1655 14:54:55.156726 USB3 port 3
1656 14:54:55.156772 PCI: 00:14.0 child on link 0 USB0 port 0
1657 14:54:55.156820 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1658 14:54:55.156868 USB0 port 0 child on link 0 USB2 port 0
1659 14:54:55.156916 USB2 port 0
1660 14:54:55.156963 USB2 port 1
1661 14:54:55.157009 USB2 port 2
1662 14:54:55.157056 USB2 port 3
1663 14:54:55.157103 USB2 port 4
1664 14:54:55.157151 USB2 port 5
1665 14:54:55.157198 USB2 port 6
1666 14:54:55.157245 USB2 port 7
1667 14:54:55.157291 USB2 port 8
1668 14:54:55.157337 USB2 port 9
1669 14:54:55.157384 USB3 port 0
1670 14:54:55.157431 USB3 port 1
1671 14:54:55.157477 USB3 port 2
1672 14:54:55.157524 USB3 port 3
1673 14:54:55.157571 PCI: 00:14.2
1674 14:54:55.157618 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1675 14:54:55.157667 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1676 14:54:55.157715 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1677 14:54:55.157763 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1678 14:54:55.157811 GENERIC: 0.0
1679 14:54:55.157858 PCI: 00:15.0 child on link 0 I2C: 00:1a
1680 14:54:55.157932 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1681 14:54:55.157984 I2C: 00:1a
1682 14:54:55.158032 I2C: 00:31
1683 14:54:55.158080 I2C: 00:32
1684 14:54:55.158137 PCI: 00:15.1 child on link 0 I2C: 00:50
1685 14:54:55.158187 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1686 14:54:55.158235 I2C: 00:50
1687 14:54:55.158283 PCI: 00:15.2
1688 14:54:55.158330 PCI: 00:15.3 child on link 0 I2C: 00:10
1689 14:54:55.158379 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1690 14:54:55.158427 I2C: 00:10
1691 14:54:55.158474 PCI: 00:16.0
1692 14:54:55.158521 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1693 14:54:55.158569 PCI: 00:19.0
1694 14:54:55.158626 PCI: 00:19.1 child on link 0 I2C: 00:15
1695 14:54:55.158682 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1696 14:54:55.158730 I2C: 00:15
1697 14:54:55.158777 I2C: 00:2c
1698 14:54:55.158825 PCI: 00:1e.0
1699 14:54:55.158872 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1700 14:54:55.158926 PCI: 00:1e.3 child on link 0 SPI: 00
1701 14:54:55.158975 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1702 14:54:55.159023 SPI: 00
1703 14:54:55.159071 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1704 14:54:55.159305 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1705 14:54:55.159359 PNP: 0c09.0
1706 14:54:55.159407 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1707 14:54:55.159455 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1708 14:54:55.159503 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1709 14:54:55.159552 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1710 14:54:55.159599 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1711 14:54:55.159646 GENERIC: 0.0
1712 14:54:55.159694 GENERIC: 1.0
1713 14:54:55.159740 PCI: 00:1f.3
1714 14:54:55.159788 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1715 14:54:55.159843 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1716 14:54:55.159896 PCI: 00:1f.5
1717 14:54:55.159944 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1718 14:54:55.159992 Done allocating resources.
1719 14:54:55.160040 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2748 ms
1720 14:54:55.160087 coreboot skipped calling FSP notify phase: 00000020.
1721 14:54:55.160135 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1722 14:54:55.160183 Configure audio over I2S with MAX98373 NAU88L25B.
1723 14:54:55.160230 Enabling BT offload
1724 14:54:55.160277 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 17 ms
1725 14:54:55.160325 Enabling resources...
1726 14:54:55.160373 PCI: 00:00.0 subsystem <- 8086/4609
1727 14:54:55.160420 PCI: 00:00.0 cmd <- 06
1728 14:54:55.160466 PCI: 00:02.0 subsystem <- 8086/46b3
1729 14:54:55.160513 PCI: 00:02.0 cmd <- 03
1730 14:54:55.160560 PCI: 00:04.0 subsystem <- 8086/461d
1731 14:54:55.160618 PCI: 00:04.0 cmd <- 02
1732 14:54:55.160670 PCI: 00:06.0 bridge ctrl <- 0013
1733 14:54:55.313421 PCI: 00:06.0 subsystem <- 8086/464d
1734 14:54:55.314046 PCI: 00:06.0 cmd <- 106
1735 14:54:55.314384 PCI: 00:0a.0 subsystem <- 8086/467d
1736 14:54:55.314693 PCI: 00:0a.0 cmd <- 02
1737 14:54:55.314983 PCI: 00:0d.0 subsystem <- 8086/461e
1738 14:54:55.315287 PCI: 00:0d.0 cmd <- 02
1739 14:54:55.315567 PCI: 00:14.0 subsystem <- 8086/51ed
1740 14:54:55.315871 PCI: 00:14.0 cmd <- 02
1741 14:54:55.316221 PCI: 00:14.2 subsystem <- 8086/51ef
1742 14:54:55.316501 PCI: 00:14.2 cmd <- 02
1743 14:54:55.316848 PCI: 00:14.3 subsystem <- 8086/51f0
1744 14:54:55.317178 PCI: 00:14.3 cmd <- 02
1745 14:54:55.317524 PCI: 00:15.0 subsystem <- 8086/51e8
1746 14:54:55.317841 PCI: 00:15.0 cmd <- 02
1747 14:54:55.318115 PCI: 00:15.1 subsystem <- 8086/51e9
1748 14:54:55.318382 PCI: 00:15.1 cmd <- 06
1749 14:54:55.318647 PCI: 00:15.3 subsystem <- 8086/51eb
1750 14:54:55.318913 PCI: 00:15.3 cmd <- 02
1751 14:54:55.319177 PCI: 00:16.0 subsystem <- 8086/51e0
1752 14:54:55.319510 PCI: 00:16.0 cmd <- 02
1753 14:54:55.319785 PCI: 00:19.1 subsystem <- 8086/51c6
1754 14:54:55.320108 PCI: 00:19.1 cmd <- 02
1755 14:54:55.320518 PCI: 00:1e.0 subsystem <- 8086/51a8
1756 14:54:55.320837 PCI: 00:1e.0 cmd <- 06
1757 14:54:55.321112 PCI: 00:1e.3 subsystem <- 8086/51ab
1758 14:54:55.321402 PCI: 00:1e.3 cmd <- 02
1759 14:54:55.321667 PCI: 00:1f.0 subsystem <- 8086/5182
1760 14:54:55.321934 PCI: 00:1f.0 cmd <- 407
1761 14:54:55.322204 PCI: 00:1f.3 subsystem <- 8086/51c8
1762 14:54:55.322477 PCI: 00:1f.3 cmd <- 02
1763 14:54:55.322746 PCI: 00:1f.5 subsystem <- 8086/51a4
1764 14:54:55.323015 PCI: 00:1f.5 cmd <- 406
1765 14:54:55.323343 PCI: 01:00.0 cmd <- 02
1766 14:54:55.323724 done.
1767 14:54:55.324216 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1768 14:54:55.324510 ME: Version: Unavailable
1769 14:54:55.324785 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1770 14:54:55.325061 Initializing devices...
1771 14:54:55.325417 Root Device init
1772 14:54:55.325698 mainboard: EC init
1773 14:54:55.325968 Chrome EC: Set SMI mask to 0x0000000000000000
1774 14:54:55.326238 Chrome EC: clear events_b mask to 0x0000000000000000
1775 14:54:55.326505 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1776 14:54:55.326859 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001001105e
1777 14:54:55.327176 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001809105e
1778 14:54:55.327574 Chrome EC: Set WAKE mask to 0x0000000000000000
1779 14:54:55.327895 Root Device init finished in 35 msecs
1780 14:54:55.328218 PCI: 00:00.0 init
1781 14:54:55.328494 CPU TDP = 15 Watts
1782 14:54:55.328764 CPU PL1 = 15 Watts
1783 14:54:55.329030 CPU PL2 = 55 Watts
1784 14:54:55.329354 CPU PL4 = 123 Watts
1785 14:54:55.329631 PCI: 00:00.0 init finished in 7 msecs
1786 14:54:55.329902 PCI: 00:02.0 init
1787 14:54:55.330203 GMA: Found VBT in CBFS
1788 14:54:55.330575 GMA: Found valid VBT in CBFS
1789 14:54:55.330901 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1790 14:54:55.331184 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1791 14:54:55.331483 PCI: 00:02.0 init finished in 18 msecs
1792 14:54:55.331755 PCI: 00:06.0 init
1793 14:54:55.332070 Initializing PCH PCIe bridge.
1794 14:54:55.332342 PCI: 00:06.0 init finished in 3 msecs
1795 14:54:55.332612 PCI: 00:0a.0 init
1796 14:54:55.332880 PCI: 00:0a.0 init finished in 0 msecs
1797 14:54:55.333148 PCI: 00:14.0 init
1798 14:54:55.333670 PCI: 00:14.0 init finished in 0 msecs
1799 14:54:55.333997 PCI: 00:14.2 init
1800 14:54:55.334317 PCI: 00:14.2 init finished in 0 msecs
1801 14:54:55.334591 PCI: 00:15.0 init
1802 14:54:55.334862 I2C bus 0 version 0x3230302a
1803 14:54:55.335134 DW I2C bus 0 at 0x80655000 (400 KHz)
1804 14:54:55.335410 PCI: 00:15.0 init finished in 6 msecs
1805 14:54:55.335681 PCI: 00:15.1 init
1806 14:54:55.336022 I2C bus 1 version 0x3230302a
1807 14:54:55.336301 DW I2C bus 1 at 0x80656000 (400 KHz)
1808 14:54:55.336575 PCI: 00:15.1 init finished in 6 msecs
1809 14:54:55.336891 PCI: 00:15.3 init
1810 14:54:55.337203 I2C bus 3 version 0x3230302a
1811 14:54:55.337476 DW I2C bus 3 at 0x80657000 (400 KHz)
1812 14:54:55.337743 PCI: 00:15.3 init finished in 6 msecs
1813 14:54:55.338014 PCI: 00:16.0 init
1814 14:54:55.338285 PCI: 00:16.0 init finished in 0 msecs
1815 14:54:55.338560 PCI: 00:19.1 init
1816 14:54:55.338827 I2C bus 5 version 0x3230302a
1817 14:54:55.339536 DW I2C bus 5 at 0x80659000 (400 KHz)
1818 14:54:55.340095 PCI: 00:19.1 init finished in 6 msecs
1819 14:54:55.340489 PCI: 00:1f.0 init
1820 14:54:55.340693 IOAPIC: Initializing IOAPIC at 0xfec00000
1821 14:54:55.340885 IOAPIC: ID = 0x02
1822 14:54:55.341079 IOAPIC: Dumping registers
1823 14:54:55.341271 reg 0x0000: 0x02000000
1824 14:54:55.341460 reg 0x0001: 0x00770020
1825 14:54:55.341645 reg 0x0002: 0x00000000
1826 14:54:55.341830 IOAPIC: 120 interrupts
1827 14:54:55.342018 IOAPIC: Clearing IOAPIC at 0xfec00000
1828 14:54:55.342208 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1829 14:54:55.342402 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1830 14:54:55.342592 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1831 14:54:55.342782 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1832 14:54:55.342970 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1833 14:54:55.343196 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1834 14:54:55.343388 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1835 14:54:55.343577 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1836 14:54:55.343768 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1837 14:54:55.343992 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1838 14:54:55.344222 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1839 14:54:55.344414 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1840 14:54:55.344605 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1841 14:54:55.344793 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1842 14:54:55.344983 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1843 14:54:55.345171 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1844 14:54:55.345358 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1845 14:54:55.345546 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1846 14:54:55.345688 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1847 14:54:55.345828 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1848 14:54:55.345968 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1849 14:54:55.346108 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1850 14:54:55.346247 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1851 14:54:55.346388 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1852 14:54:55.346528 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1853 14:54:55.346696 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1854 14:54:55.346837 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1855 14:54:55.347003 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1856 14:54:55.347147 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1857 14:54:55.347287 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1858 14:54:55.347427 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1859 14:54:55.347567 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1860 14:54:55.347707 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1861 14:54:55.347859 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1862 14:54:55.348003 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1863 14:54:55.348142 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1864 14:54:55.348281 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1865 14:54:55.348422 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1866 14:54:55.348561 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1867 14:54:55.348700 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1868 14:54:55.348841 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1869 14:54:55.348997 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1870 14:54:55.349149 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1871 14:54:55.349288 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1872 14:54:55.349429 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1873 14:54:55.349569 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1874 14:54:55.349710 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1875 14:54:55.349851 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1876 14:54:55.349990 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1877 14:54:55.350159 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1878 14:54:55.350302 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1879 14:54:55.350458 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1880 14:54:55.350585 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1881 14:54:55.350698 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1882 14:54:55.350810 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1883 14:54:55.350922 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1884 14:54:55.351033 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1885 14:54:55.351143 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1886 14:54:55.351254 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1887 14:54:55.351366 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1888 14:54:55.351500 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1889 14:54:55.351615 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1890 14:54:55.351727 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1891 14:54:55.351848 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1892 14:54:55.351974 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1893 14:54:55.352089 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1894 14:54:55.352202 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1895 14:54:55.352314 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1896 14:54:55.352424 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1897 14:54:55.352534 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1898 14:54:55.352647 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1899 14:54:55.352759 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1900 14:54:55.352872 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1901 14:54:55.352984 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1902 14:54:55.353118 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1903 14:54:55.353231 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1904 14:54:55.353344 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1905 14:54:55.353691 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1906 14:54:55.353814 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1907 14:54:55.353931 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1908 14:54:55.354060 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1909 14:54:55.354175 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1910 14:54:55.354286 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1911 14:54:55.354399 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1912 14:54:55.354510 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1913 14:54:55.354621 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1914 14:54:55.354732 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1915 14:54:55.354843 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1916 14:54:55.354954 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1917 14:54:55.355065 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1918 14:54:55.355175 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1919 14:54:55.355285 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1920 14:54:55.355395 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1921 14:54:55.355514 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1922 14:54:55.355606 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1923 14:54:55.355698 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1924 14:54:55.355790 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1925 14:54:55.355904 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1926 14:54:55.355999 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1927 14:54:55.356091 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1928 14:54:55.356184 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1929 14:54:55.356277 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1930 14:54:55.356369 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1931 14:54:55.356459 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1932 14:54:55.356551 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1933 14:54:55.356643 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1934 14:54:55.356735 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1935 14:54:55.356843 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1936 14:54:55.356937 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1937 14:54:55.357043 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1938 14:54:55.357136 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1939 14:54:55.357229 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1940 14:54:55.357322 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1941 14:54:55.357414 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1942 14:54:55.357508 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1943 14:54:55.357602 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1944 14:54:55.357695 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1945 14:54:55.357786 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1946 14:54:55.357878 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1947 14:54:55.357969 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1948 14:54:55.358060 IOAPIC: Bootstrap Processor Local APIC = 0x00
1949 14:54:55.358154 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1950 14:54:55.358246 PCI: 00:1f.0 init finished in 607 msecs
1951 14:54:55.358339 PCI: 00:1f.2 init
1952 14:54:55.358431 apm_control: Disabling ACPI.
1953 14:54:55.358524 APMC done.
1954 14:54:55.358617 PCI: 00:1f.2 init finished in 8 msecs
1955 14:54:55.358710 PCI: 00:1f.3 init
1956 14:54:55.358802 PCI: 00:1f.3 init finished in 0 msecs
1957 14:54:55.358895 PCI: 01:00.0 init
1958 14:54:55.358987 PCI: 01:00.0 init finished in 0 msecs
1959 14:54:55.359080 PNP: 0c09.0 init
1960 14:54:55.359172 Google Chrome EC uptime: 11.069 seconds
1961 14:54:55.359264 Google Chrome AP resets since EC boot: 0
1962 14:54:55.359357 Google Chrome most recent AP reset causes:
1963 14:54:55.359450 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1964 14:54:55.359543 PNP: 0c09.0 init finished in 19 msecs
1965 14:54:55.359636 GENERIC: 0.0 init
1966 14:54:55.359728 GENERIC: 0.0 init finished in 0 msecs
1967 14:54:55.359819 GENERIC: 1.0 init
1968 14:54:55.359941 GENERIC: 1.0 init finished in 0 msecs
1969 14:54:55.360036 Devices initialized
1970 14:54:55.360144 Show all devs... After init.
1971 14:54:55.360237 Root Device: enabled 1
1972 14:54:55.360330 CPU_CLUSTER: 0: enabled 1
1973 14:54:55.360422 DOMAIN: 0000: enabled 1
1974 14:54:55.360531 GPIO: 0: enabled 1
1975 14:54:55.360610 PCI: 00:00.0: enabled 1
1976 14:54:55.360690 PCI: 00:01.0: enabled 0
1977 14:54:55.360770 PCI: 00:01.1: enabled 0
1978 14:54:55.360848 PCI: 00:02.0: enabled 1
1979 14:54:55.360926 PCI: 00:04.0: enabled 1
1980 14:54:55.361003 PCI: 00:05.0: enabled 0
1981 14:54:55.361082 PCI: 00:06.0: enabled 1
1982 14:54:55.361160 PCI: 00:06.2: enabled 0
1983 14:54:55.361238 PCI: 00:07.0: enabled 0
1984 14:54:55.361316 PCI: 00:07.1: enabled 0
1985 14:54:55.361394 PCI: 00:07.2: enabled 0
1986 14:54:55.361473 PCI: 00:07.3: enabled 0
1987 14:54:55.361552 PCI: 00:08.0: enabled 0
1988 14:54:55.361630 PCI: 00:09.0: enabled 0
1989 14:54:55.361708 PCI: 00:0a.0: enabled 1
1990 14:54:55.361785 PCI: 00:0d.0: enabled 1
1991 14:54:55.361863 PCI: 00:0d.1: enabled 0
1992 14:54:55.361940 PCI: 00:0d.2: enabled 0
1993 14:54:55.362018 PCI: 00:0d.3: enabled 0
1994 14:54:55.362096 PCI: 00:0e.0: enabled 0
1995 14:54:55.362174 PCI: 00:10.0: enabled 0
1996 14:54:55.362252 PCI: 00:10.1: enabled 0
1997 14:54:55.362330 PCI: 00:10.6: enabled 0
1998 14:54:55.362407 PCI: 00:10.7: enabled 0
1999 14:54:55.362485 PCI: 00:12.0: enabled 0
2000 14:54:55.362563 PCI: 00:12.6: enabled 0
2001 14:54:55.362640 PCI: 00:12.7: enabled 0
2002 14:54:55.362717 PCI: 00:13.0: enabled 0
2003 14:54:55.362794 PCI: 00:14.0: enabled 1
2004 14:54:55.362871 PCI: 00:14.1: enabled 0
2005 14:54:55.362949 PCI: 00:14.2: enabled 1
2006 14:54:55.363039 PCI: 00:14.3: enabled 1
2007 14:54:55.363118 PCI: 00:15.0: enabled 1
2008 14:54:55.363196 PCI: 00:15.1: enabled 1
2009 14:54:55.363274 PCI: 00:15.2: enabled 0
2010 14:54:55.363370 PCI: 00:15.3: enabled 1
2011 14:54:55.363451 PCI: 00:16.0: enabled 1
2012 14:54:55.363529 PCI: 00:16.1: enabled 0
2013 14:54:55.363607 PCI: 00:16.2: enabled 0
2014 14:54:55.363685 PCI: 00:16.3: enabled 0
2015 14:54:55.363763 PCI: 00:16.4: enabled 0
2016 14:54:55.363853 PCI: 00:16.5: enabled 0
2017 14:54:55.363937 PCI: 00:17.0: enabled 0
2018 14:54:55.364028 PCI: 00:19.0: enabled 0
2019 14:54:55.364109 PCI: 00:19.1: enabled 1
2020 14:54:55.364395 PCI: 00:19.2: enabled 0
2021 14:54:55.364482 PCI: 00:1a.0: enabled 0
2022 14:54:55.364562 PCI: 00:1c.0: enabled 0
2023 14:54:55.364641 PCI: 00:1c.1: enabled 0
2024 14:54:55.364720 PCI: 00:1c.2: enabled 0
2025 14:54:55.364800 PCI: 00:1c.3: enabled 0
2026 14:54:55.364878 PCI: 00:1c.4: enabled 0
2027 14:54:55.364956 PCI: 00:1c.5: enabled 0
2028 14:54:55.365036 PCI: 00:1c.6: enabled 0
2029 14:54:55.365114 PCI: 00:1c.7: enabled 0
2030 14:54:55.365192 PCI: 00:1d.0: enabled 0
2031 14:54:55.365270 PCI: 00:1d.1: enabled 0
2032 14:54:55.365348 PCI: 00:1d.2: enabled 0
2033 14:54:55.365426 PCI: 00:1d.3: enabled 0
2034 14:54:55.365511 PCI: 00:1e.0: enabled 1
2035 14:54:55.365579 PCI: 00:1e.1: enabled 0
2036 14:54:55.365648 PCI: 00:1e.2: enabled 0
2037 14:54:55.365717 PCI: 00:1e.3: enabled 1
2038 14:54:55.365786 PCI: 00:1f.0: enabled 1
2039 14:54:55.365855 PCI: 00:1f.1: enabled 0
2040 14:54:55.365923 PCI: 00:1f.2: enabled 1
2041 14:54:55.365991 PCI: 00:1f.3: enabled 1
2042 14:54:55.366059 PCI: 00:1f.4: enabled 0
2043 14:54:55.366127 PCI: 00:1f.5: enabled 1
2044 14:54:55.366195 PCI: 00:1f.6: enabled 0
2045 14:54:55.366267 PCI: 00:1f.7: enabled 0
2046 14:54:55.366336 GENERIC: 0.0: enabled 1
2047 14:54:55.366406 GENERIC: 0.0: enabled 1
2048 14:54:55.366474 GENERIC: 0.0: enabled 1
2049 14:54:55.366542 GENERIC: 1.0: enabled 1
2050 14:54:55.366611 GENERIC: 0.0: enabled 1
2051 14:54:55.366679 GENERIC: 1.0: enabled 1
2052 14:54:55.366758 USB0 port 0: enabled 1
2053 14:54:55.366828 USB0 port 0: enabled 1
2054 14:54:55.366897 GENERIC: 0.0: enabled 1
2055 14:54:55.366976 I2C: 00:1a: enabled 1
2056 14:54:55.367046 I2C: 00:31: enabled 1
2057 14:54:55.367114 I2C: 00:32: enabled 1
2058 14:54:55.367181 I2C: 00:50: enabled 1
2059 14:54:55.367249 I2C: 00:10: enabled 1
2060 14:54:55.367317 I2C: 00:15: enabled 1
2061 14:54:55.367386 I2C: 00:2c: enabled 1
2062 14:54:55.367455 GENERIC: 0.0: enabled 1
2063 14:54:55.367522 SPI: 00: enabled 1
2064 14:54:55.367589 PNP: 0c09.0: enabled 1
2065 14:54:55.367657 GENERIC: 0.0: enabled 1
2066 14:54:55.367725 USB3 port 0: enabled 1
2067 14:54:55.367794 USB3 port 1: enabled 0
2068 14:54:55.367888 USB3 port 2: enabled 1
2069 14:54:55.367963 USB3 port 3: enabled 0
2070 14:54:55.368032 USB2 port 0: enabled 1
2071 14:54:55.368100 USB2 port 1: enabled 0
2072 14:54:55.368169 USB2 port 2: enabled 1
2073 14:54:55.368237 USB2 port 3: enabled 0
2074 14:54:55.368304 USB2 port 4: enabled 0
2075 14:54:55.368372 USB2 port 5: enabled 1
2076 14:54:55.368440 USB2 port 6: enabled 0
2077 14:54:55.368507 USB2 port 7: enabled 0
2078 14:54:55.368576 USB2 port 8: enabled 1
2079 14:54:55.368644 USB2 port 9: enabled 1
2080 14:54:55.368712 USB3 port 0: enabled 1
2081 14:54:55.368780 USB3 port 1: enabled 0
2082 14:54:55.368848 USB3 port 2: enabled 0
2083 14:54:55.368917 USB3 port 3: enabled 0
2084 14:54:55.368984 GENERIC: 0.0: enabled 1
2085 14:54:55.369051 GENERIC: 1.0: enabled 1
2086 14:54:55.369118 APIC: 00: enabled 1
2087 14:54:55.369185 APIC: 1a: enabled 1
2088 14:54:55.369252 APIC: 1c: enabled 1
2089 14:54:55.369320 APIC: 1e: enabled 1
2090 14:54:55.369387 APIC: 18: enabled 1
2091 14:54:55.369454 APIC: 09: enabled 1
2092 14:54:55.369522 APIC: 01: enabled 1
2093 14:54:55.369595 APIC: 08: enabled 1
2094 14:54:55.369686 PCI: 01:00.0: enabled 1
2095 14:54:55.369757 BS: BS_DEV_INIT run times (exec / console): 9 / 1129 ms
2096 14:54:55.369826 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2097 14:54:55.369896 ELOG: NV offset 0xf20000 size 0x4000
2098 14:54:55.369966 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2099 14:54:55.370036 ELOG: Event(17) added with size 13 at 2024-06-13 14:54:53 UTC
2100 14:54:55.370105 ELOG: Event(92) added with size 9 at 2024-06-13 14:54:53 UTC
2101 14:54:55.370176 ELOG: Event(93) added with size 9 at 2024-06-13 14:54:53 UTC
2102 14:54:55.370246 ELOG: Event(9E) added with size 10 at 2024-06-13 14:54:53 UTC
2103 14:54:55.370316 ELOG: Event(9F) added with size 14 at 2024-06-13 14:54:53 UTC
2104 14:54:55.370395 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2105 14:54:55.370479 ELOG: Event(A1) added with size 10 at 2024-06-13 14:54:53 UTC
2106 14:54:55.370541 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2107 14:54:55.370602 ELOG: Event(A0) added with size 9 at 2024-06-13 14:54:53 UTC
2108 14:54:55.370664 elog_add_boot_reason: Logged dev mode boot
2109 14:54:55.370726 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2110 14:54:55.370787 Finalize devices...
2111 14:54:55.370848 PCI: 00:02.0 final
2112 14:54:55.370909 PCI: 00:16.0 final
2113 14:54:55.370969 PCI: 00:1f.2 final
2114 14:54:55.371030 GENERIC: 0.0 final
2115 14:54:55.371090 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2116 14:54:55.371152 GENERIC: 1.0 final
2117 14:54:55.371214 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2118 14:54:55.371276 Devices finalized
2119 14:54:55.371336 BS: BS_POST_DEVICE run times (exec / console): 0 / 26 ms
2120 14:54:55.371399 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2121 14:54:55.371460 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2122 14:54:55.371522 ME: HFSTS1 : 0x80030045
2123 14:54:55.371587 ME: HFSTS2 : 0x30280116
2124 14:54:55.371663 ME: HFSTS3 : 0x00000050
2125 14:54:55.371726 ME: HFSTS4 : 0x00004000
2126 14:54:55.371788 ME: HFSTS5 : 0x00000000
2127 14:54:55.371856 ME: HFSTS6 : 0x40400006
2128 14:54:55.371919 ME: Manufacturing Mode : YES
2129 14:54:55.371981 ME: SPI Protection Mode Enabled : YES
2130 14:54:55.372042 ME: FPFs Committed : YES
2131 14:54:55.372103 ME: Manufacturing Vars Locked : NO
2132 14:54:55.372164 ME: FW Partition Table : OK
2133 14:54:55.372225 ME: Bringup Loader Failure : NO
2134 14:54:55.372286 ME: Firmware Init Complete : NO
2135 14:54:55.372348 ME: Boot Options Present : NO
2136 14:54:55.372409 ME: Update In Progress : NO
2137 14:54:55.372470 ME: D0i3 Support : YES
2138 14:54:55.372531 ME: Low Power State Enabled : NO
2139 14:54:55.372593 ME: CPU Replaced : YES
2140 14:54:55.372655 ME: CPU Replacement Valid : YES
2141 14:54:55.372715 ME: Current Working State : 5
2142 14:54:55.372777 ME: Current Operation State : 1
2143 14:54:55.372838 ME: Current Operation Mode : 3
2144 14:54:55.372899 ME: Error Code : 0
2145 14:54:55.372961 ME: Enhanced Debug Mode : NO
2146 14:54:55.373220 ME: CPU Debug Disabled : YES
2147 14:54:55.373288 ME: TXT Support : NO
2148 14:54:55.373352 ME: WP for RO is enabled : YES
2149 14:54:55.373413 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2150 14:54:55.373476 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2151 14:54:55.373538 ELOG: Event(91) added with size 10 at 2024-06-13 14:54:54 UTC
2152 14:54:55.373601 Chrome EC: clear events_b mask to 0x0000000020004000
2153 14:54:55.373663 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 11 ms
2154 14:54:55.373725 CBFS: Found 'fallback/dsdt.aml' @0x7b440 size 0x5097 in mcache @0x76add1e8
2155 14:54:55.373788 CBFS: 'fallback/slic' not found.
2156 14:54:55.373849 ACPI: Writing ACPI tables at 7686b000.
2157 14:54:55.373910 ACPI: * FACS
2158 14:54:55.373981 ACPI: * DSDT
2159 14:54:55.374043 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2160 14:54:55.374104 ACPI: * FADT
2161 14:54:55.374164 SCI is IRQ9
2162 14:54:55.374226 ACPI: added table 1/32, length now 40
2163 14:54:55.374288 ACPI: * SSDT
2164 14:54:55.374349 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2165 14:54:55.374411 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2166 14:54:55.374473 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2167 14:54:55.374535 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2168 14:54:55.374596 CBFS: Found 'wifi_sar_0.hex' @0x80c00 size 0xe6 in mcache @0x76add29c
2169 14:54:55.374657 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2170 14:54:55.374718 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2171 14:54:55.374779 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2172 14:54:55.374841 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2173 14:54:55.374902 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2174 14:54:55.374963 I2C TX abort detected (00000001)
2175 14:54:55.375025 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10 -- NOT FOUND, skipping
2176 14:54:55.375087 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2177 14:54:55.375148 I2C TX abort detected (00000001)
2178 14:54:55.375209 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c -- NOT FOUND, skipping
2179 14:54:55.375271 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2180 14:54:55.375333 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2181 14:54:55.375396 PS2K: Passing 80 keymaps to kernel
2182 14:54:55.375457 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2183 14:54:55.375530 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2184 14:54:55.375586 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2185 14:54:55.375642 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2186 14:54:55.375698 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2187 14:54:55.375754 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2188 14:54:55.375810 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2189 14:54:55.375883 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2190 14:54:55.375941 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2191 14:54:55.375997 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2192 14:54:55.376053 ACPI: added table 2/32, length now 44
2193 14:54:55.376110 ACPI: * MCFG
2194 14:54:55.376164 ACPI: added table 3/32, length now 48
2195 14:54:55.376219 ACPI: * TPM2
2196 14:54:55.376274 TPM2 log created at 0x7685b000
2197 14:54:55.376331 ACPI: added table 4/32, length now 52
2198 14:54:55.376386 ACPI: * LPIT
2199 14:54:55.376441 ACPI: added table 5/32, length now 56
2200 14:54:55.376506 ACPI: * MADT
2201 14:54:55.376563 SCI is IRQ9
2202 14:54:55.376618 ACPI: added table 6/32, length now 60
2203 14:54:55.376673 cmd_reg from pmc_make_ipc_cmd 1052838
2204 14:54:55.376729 CL PMC desc table: numb of regions is 0x2 at addr 0x8064a1bc
2205 14:54:55.376784 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2206 14:54:55.376839 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2207 14:54:55.376904 PMC CrashLog size in discovery mode: 0xC00
2208 14:54:55.376961 cpu crashlog bar addr: 0x80640000
2209 14:54:55.377016 cpu discovery table offset: 0x6030
2210 14:54:55.377072 cpu_crashlog_discovery_table buffer count: 0x3
2211 14:54:55.377128 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2212 14:54:55.377184 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2213 14:54:55.377240 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2214 14:54:55.377295 PMC crashLog size in discovery mode : 0xC00
2215 14:54:55.377351 Invalid data 0x0 at offset 0x2200 from addr 0x80648000 of PMC SRAM.
2216 14:54:55.377407 discover mode PMC crashlog size adjusted to: 0x200
2217 14:54:55.377463 Invalid data 0x0 at offset 0x3e00 from addr 0x80648000 of PMC SRAM.
2218 14:54:55.377519 discover mode PMC crashlog size adjusted to: 0x0
2219 14:54:55.377574 m_cpu_crashLog_size : 0x3480 bytes
2220 14:54:55.377629 CPU crashLog present.
2221 14:54:55.377684 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2222 14:54:55.377739 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2223 14:54:55.377795 current = 76874430
2224 14:54:55.377850 ACPI: * DMAR
2225 14:54:55.377905 ACPI: added table 7/32, length now 64
2226 14:54:55.377960 ACPI: added table 8/32, length now 68
2227 14:54:55.378015 ACPI: * HPET
2228 14:54:55.378070 ACPI: added table 9/32, length now 72
2229 14:54:55.378125 ACPI: done.
2230 14:54:55.378180 ACPI tables: 38240 bytes.
2231 14:54:55.378235 smbios_write_tables: 76855000
2232 14:54:55.378289 EC returned error result code 3
2233 14:54:55.378344 Couldn't obtain OEM name from CBI
2234 14:54:55.378398 Create SMBIOS type 16
2235 14:54:55.378453 Create SMBIOS type 17
2236 14:54:55.378507 Create SMBIOS type 20
2237 14:54:55.378562 GENERIC: 0.0 (WIFI Device)
2238 14:54:55.378809 SMBIOS tables: 2156 bytes.
2239 14:54:55.378870 Writing table forward entry at 0x00000500
2240 14:54:55.378927 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9955
2241 14:54:55.378982 Writing coreboot table at 0x7688f000
2242 14:54:55.379036 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2243 14:54:55.379091 1. 0000000000001000-000000000009ffff: RAM
2244 14:54:55.379146 2. 00000000000a0000-00000000000fffff: RESERVED
2245 14:54:55.379201 3. 0000000000100000-0000000076854fff: RAM
2246 14:54:55.379256 4. 0000000076855000-0000000076a2cfff: CONFIGURATION TABLES
2247 14:54:55.379311 5. 0000000076a2d000-0000000076ab8fff: RAMSTAGE
2248 14:54:55.379366 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2249 14:54:55.379421 7. 0000000077000000-00000000803fffff: RESERVED
2250 14:54:55.379476 8. 00000000c0000000-00000000cfffffff: RESERVED
2251 14:54:55.379530 9. 00000000f8000000-00000000f9ffffff: RESERVED
2252 14:54:55.379585 10. 00000000fb000000-00000000fb000fff: RESERVED
2253 14:54:55.379642 11. 00000000fc800000-00000000fe7fffff: RESERVED
2254 14:54:55.379698 12. 00000000feb00000-00000000feb7ffff: RESERVED
2255 14:54:55.379754 13. 00000000fec00000-00000000fecfffff: RESERVED
2256 14:54:55.379810 14. 00000000fed40000-00000000fed6ffff: RESERVED
2257 14:54:55.379881 15. 00000000fed80000-00000000fed87fff: RESERVED
2258 14:54:55.379938 16. 00000000fed90000-00000000fed92fff: RESERVED
2259 14:54:55.380006 17. 00000000feda0000-00000000feda1fff: RESERVED
2260 14:54:55.380063 18. 00000000fedc0000-00000000feddffff: RESERVED
2261 14:54:55.380119 19. 0000000100000000-000000027fbfffff: RAM
2262 14:54:55.380175 Passing 4 GPIOs to payload:
2263 14:54:55.380229 NAME | PORT | POLARITY | VALUE
2264 14:54:55.380284 lid | undefined | high | high
2265 14:54:55.380350 power | undefined | high | low
2266 14:54:55.380408 oprom | undefined | high | low
2267 14:54:55.380463 EC in RW | 0x00000151 | high | low
2268 14:54:55.380528 Board ID: 3
2269 14:54:55.380579 FW config: 0x131
2270 14:54:55.380629 Wrote coreboot table at: 0x7688f000, 0x6e4 bytes, checksum 66c3
2271 14:54:55.380680 coreboot table: 1788 bytes.
2272 14:54:55.380729 IMD ROOT 0. 0x76fff000 0x00001000
2273 14:54:55.380779 IMD SMALL 1. 0x76ffe000 0x00001000
2274 14:54:55.380828 FSP MEMORY 2. 0x76afe000 0x00500000
2275 14:54:55.380878 CONSOLE 3. 0x76ade000 0x00020000
2276 14:54:55.380927 RO MCACHE 4. 0x76add000 0x00000fd8
2277 14:54:55.380978 FMAP 5. 0x76adc000 0x0000064a
2278 14:54:55.381028 TIME STAMP 6. 0x76adb000 0x00000910
2279 14:54:55.381078 VBOOT WORK 7. 0x76ac7000 0x00014000
2280 14:54:55.381128 MEM INFO 8. 0x76ac6000 0x000003b8
2281 14:54:55.381178 ROMSTG STCK 9. 0x76ac5000 0x00001000
2282 14:54:55.381227 AFTER CAR 10. 0x76ab9000 0x0000c000
2283 14:54:55.381276 RAMSTAGE 11. 0x76a2c000 0x0008d000
2284 14:54:55.381326 ACPI BERT 12. 0x76a1c000 0x00010000
2285 14:54:55.381375 CHROMEOS NVS13. 0x76a1b000 0x00000f00
2286 14:54:55.381425 REFCODE 14. 0x769ac000 0x0006f000
2287 14:54:55.381476 SMM BACKUP 15. 0x7699c000 0x00010000
2288 14:54:55.381526 RAMOOPS 16. 0x7689c000 0x00100000
2289 14:54:55.381575 IGD OPREGION17. 0x76897000 0x00004203
2290 14:54:55.381625 COREBOOT 18. 0x7688f000 0x00008000
2291 14:54:55.381675 ACPI 19. 0x7686b000 0x00024000
2292 14:54:55.381725 TPM2 TCGLOG20. 0x7685b000 0x00010000
2293 14:54:55.381775 PMC CRASHLOG21. 0x7685a000 0x00000c00
2294 14:54:55.381824 CPU CRASHLOG22. 0x76856000 0x00003480
2295 14:54:55.381873 SMBIOS 23. 0x76855000 0x00001000
2296 14:54:55.381922 IMD small region:
2297 14:54:55.381973 IMD ROOT 0. 0x76ffec00 0x00000400
2298 14:54:55.382022 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2299 14:54:55.382072 VPD 2. 0x76ffeba0 0x00000027
2300 14:54:55.382122 POWER STATE 3. 0x76ffeb40 0x00000044
2301 14:54:55.382171 ROMSTAGE 4. 0x76ffeb20 0x00000004
2302 14:54:55.382221 ACPI GNVS 5. 0x76ffeac0 0x00000048
2303 14:54:55.382271 TYPE_C INFO 6. 0x76ffeaa0 0x0000000c
2304 14:54:55.382320 BS: BS_WRITE_TABLES run times (exec / console): 8 / 635 ms
2305 14:54:55.382370 MTRR: Physical address space:
2306 14:54:55.382420 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2307 14:54:55.382471 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2308 14:54:55.382523 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2309 14:54:55.382574 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2310 14:54:55.382625 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2311 14:54:55.382676 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2312 14:54:55.382727 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2313 14:54:55.382779 MTRR: Fixed MSR 0x250 0x0606060606060606
2314 14:54:55.382829 MTRR: Fixed MSR 0x258 0x0606060606060606
2315 14:54:55.382889 MTRR: Fixed MSR 0x259 0x0000000000000000
2316 14:54:55.382940 MTRR: Fixed MSR 0x268 0x0606060606060606
2317 14:54:55.382989 MTRR: Fixed MSR 0x269 0x0606060606060606
2318 14:54:55.383039 MTRR: Fixed MSR 0x26a 0x0606060606060606
2319 14:54:55.383089 MTRR: Fixed MSR 0x26b 0x0606060606060606
2320 14:54:55.383139 MTRR: Fixed MSR 0x26c 0x0606060606060606
2321 14:54:55.383189 MTRR: Fixed MSR 0x26d 0x0606060606060606
2322 14:54:55.383239 MTRR: Fixed MSR 0x26e 0x0606060606060606
2323 14:54:55.383289 MTRR: Fixed MSR 0x26f 0x0606060606060606
2324 14:54:55.383338 call enable_fixed_mtrr()
2325 14:54:55.383388 CPU physical address size: 39 bits
2326 14:54:55.383438 MTRR: default type WB/UC MTRR counts: 6/6.
2327 14:54:55.383488 MTRR: UC selected as default type.
2328 14:54:55.383537 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2329 14:54:55.383587 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2330 14:54:55.383826 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2331 14:54:55.383918 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2332 14:54:55.383999 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2333 14:54:55.384079 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2334 14:54:55.384146 MTRR: Fixed MSR 0x250 0x0606060606060606
2335 14:54:55.384198 MTRR: Fixed MSR 0x258 0x0606060606060606
2336 14:54:55.384249 MTRR: Fixed MSR 0x259 0x0000000000000000
2337 14:54:55.384299 MTRR: Fixed MSR 0x268 0x0606060606060606
2338 14:54:55.384349 MTRR: Fixed MSR 0x269 0x0606060606060606
2339 14:54:55.384398 MTRR: Fixed MSR 0x26a 0x0606060606060606
2340 14:54:55.384448 MTRR: Fixed MSR 0x26b 0x0606060606060606
2341 14:54:55.384498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2342 14:54:55.384547 MTRR: Fixed MSR 0x26d 0x0606060606060606
2343 14:54:55.384597 MTRR: Fixed MSR 0x26e 0x0606060606060606
2344 14:54:55.384646 MTRR: Fixed MSR 0x26f 0x0606060606060606
2345 14:54:55.384696 MTRR: Fixed MSR 0x250 0x0606060606060606
2346 14:54:55.384746 MTRR: Fixed MSR 0x250 0x0606060606060606
2347 14:54:55.384795 MTRR: Fixed MSR 0x258 0x0606060606060606
2348 14:54:55.384845 MTRR: Fixed MSR 0x259 0x0000000000000000
2349 14:54:55.384894 MTRR: Fixed MSR 0x268 0x0606060606060606
2350 14:54:55.384944 MTRR: Fixed MSR 0x269 0x0606060606060606
2351 14:54:55.384993 MTRR: Fixed MSR 0x26a 0x0606060606060606
2352 14:54:55.385041 MTRR: Fixed MSR 0x26b 0x0606060606060606
2353 14:54:55.385091 MTRR: Fixed MSR 0x26c 0x0606060606060606
2354 14:54:55.385141 MTRR: Fixed MSR 0x26d 0x0606060606060606
2355 14:54:55.385192 MTRR: Fixed MSR 0x26e 0x0606060606060606
2356 14:54:55.385242 MTRR: Fixed MSR 0x26f 0x0606060606060606
2357 14:54:55.385291 MTRR: Fixed MSR 0x258 0x0606060606060606
2358 14:54:55.385341 call enable_fixed_mtrr()
2359 14:54:55.385390 MTRR: Fixed MSR 0x250 0x0606060606060606
2360 14:54:55.385440 MTRR: Fixed MSR 0x258 0x0606060606060606
2361 14:54:55.385499 MTRR: Fixed MSR 0x259 0x0000000000000000
2362 14:54:55.385546 MTRR: Fixed MSR 0x268 0x0606060606060606
2363 14:54:55.385593 MTRR: Fixed MSR 0x269 0x0606060606060606
2364 14:54:55.385641 MTRR: Fixed MSR 0x26a 0x0606060606060606
2365 14:54:55.385688 MTRR: Fixed MSR 0x26b 0x0606060606060606
2366 14:54:55.385736 MTRR: Fixed MSR 0x26c 0x0606060606060606
2367 14:54:55.385783 MTRR: Fixed MSR 0x26d 0x0606060606060606
2368 14:54:55.385831 MTRR: Fixed MSR 0x26e 0x0606060606060606
2369 14:54:55.385879 MTRR: Fixed MSR 0x26f 0x0606060606060606
2370 14:54:55.385926 CPU physical address size: 39 bits
2371 14:54:55.385973 MTRR: Fixed MSR 0x259 0x0000000000000000
2372 14:54:55.386020 MTRR: Fixed MSR 0x250 0x0606060606060606
2373 14:54:55.386067 MTRR: Fixed MSR 0x258 0x0606060606060606
2374 14:54:55.386115 MTRR: Fixed MSR 0x259 0x0000000000000000
2375 14:54:55.386163 MTRR: Fixed MSR 0x268 0x0606060606060606
2376 14:54:55.386210 MTRR: Fixed MSR 0x269 0x0606060606060606
2377 14:54:55.386257 MTRR: Fixed MSR 0x26a 0x0606060606060606
2378 14:54:55.386304 MTRR: Fixed MSR 0x26b 0x0606060606060606
2379 14:54:55.386362 MTRR: Fixed MSR 0x26c 0x0606060606060606
2380 14:54:55.386410 MTRR: Fixed MSR 0x26d 0x0606060606060606
2381 14:54:55.386457 MTRR: Fixed MSR 0x26e 0x0606060606060606
2382 14:54:55.386504 MTRR: Fixed MSR 0x26f 0x0606060606060606
2383 14:54:55.386551 MTRR: Fixed MSR 0x268 0x0606060606060606
2384 14:54:55.386599 MTRR: Fixed MSR 0x269 0x0606060606060606
2385 14:54:55.386646 MTRR: Fixed MSR 0x26a 0x0606060606060606
2386 14:54:55.386704 MTRR: Fixed MSR 0x26b 0x0606060606060606
2387 14:54:55.386752 MTRR: Fixed MSR 0x26c 0x0606060606060606
2388 14:54:55.386800 MTRR: Fixed MSR 0x26d 0x0606060606060606
2389 14:54:55.386847 MTRR: Fixed MSR 0x26e 0x0606060606060606
2390 14:54:55.386894 MTRR: Fixed MSR 0x26f 0x0606060606060606
2391 14:54:55.386942 call enable_fixed_mtrr()
2392 14:54:55.386989 call enable_fixed_mtrr()
2393 14:54:55.387036 MTRR: Fixed MSR 0x250 0x0606060606060606
2394 14:54:55.387083 CPU physical address size: 39 bits
2395 14:54:55.387131 call enable_fixed_mtrr()
2396 14:54:55.387178 call enable_fixed_mtrr()
2397 14:54:55.387226 CPU physical address size: 39 bits
2398 14:54:55.387274 MTRR: Fixed MSR 0x258 0x0606060606060606
2399 14:54:55.387321 MTRR: Fixed MSR 0x259 0x0000000000000000
2400 14:54:55.387368 MTRR: Fixed MSR 0x268 0x0606060606060606
2401 14:54:55.387415 MTRR: Fixed MSR 0x269 0x0606060606060606
2402 14:54:55.387463 MTRR: Fixed MSR 0x26a 0x0606060606060606
2403 14:54:55.387511 MTRR: Fixed MSR 0x26b 0x0606060606060606
2404 14:54:55.387559 MTRR: Fixed MSR 0x26c 0x0606060606060606
2405 14:54:55.387607 MTRR: Fixed MSR 0x26d 0x0606060606060606
2406 14:54:55.387654 MTRR: Fixed MSR 0x26e 0x0606060606060606
2407 14:54:55.387701 MTRR: Fixed MSR 0x26f 0x0606060606060606
2408 14:54:55.387749 CPU physical address size: 39 bits
2409 14:54:55.387796 MTRR: Fixed MSR 0x250 0x0606060606060606
2410 14:54:55.387848 call enable_fixed_mtrr()
2411 14:54:55.387897 MTRR: Fixed MSR 0x258 0x0606060606060606
2412 14:54:55.387943 MTRR: Fixed MSR 0x259 0x0000000000000000
2413 14:54:55.387991 MTRR: Fixed MSR 0x268 0x0606060606060606
2414 14:54:55.388039 MTRR: Fixed MSR 0x269 0x0606060606060606
2415 14:54:55.388086 MTRR: Fixed MSR 0x26a 0x0606060606060606
2416 14:54:55.388133 MTRR: Fixed MSR 0x26b 0x0606060606060606
2417 14:54:55.388180 MTRR: Fixed MSR 0x26c 0x0606060606060606
2418 14:54:55.388228 MTRR: Fixed MSR 0x26d 0x0606060606060606
2419 14:54:55.388275 MTRR: Fixed MSR 0x26e 0x0606060606060606
2420 14:54:55.388322 MTRR: Fixed MSR 0x26f 0x0606060606060606
2421 14:54:55.388369 CPU physical address size: 39 bits
2422 14:54:55.388416 call enable_fixed_mtrr()
2423 14:54:55.388463 CPU physical address size: 39 bits
2424 14:54:55.388510 CPU physical address size: 39 bits
2425 14:54:55.388557
2426 14:54:55.388604 MTRR check
2427 14:54:55.388651 Fixed MTRRs : Enabled
2428 14:54:55.388700 Variable MTRRs: Enabled
2429 14:54:55.388747
2430 14:54:55.388794 BS: BS_WRITE_TABLES exit times (exec / console): 241 / 150 ms
2431 14:54:55.389027 CBFS: Found 'fallback/payload' @0x3b5e80 size 0x25905 in mcache @0x76addf68
2432 14:54:55.389081 Checking segment from ROM address 0xffc2aeac
2433 14:54:55.389130 Checking segment from ROM address 0xffc2aec8
2434 14:54:55.389179 Loading segment from ROM address 0xffc2aeac
2435 14:54:55.389227 code (compression=1)
2436 14:54:55.390378 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc2aee4 filesize 0x258cd
2437 14:54:55.396910 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258cd
2438 14:54:55.400706 using LZMA
2439 14:54:55.421422 [ 0x30000000, 30051214, 0x32668e60) <- ffc2aee4
2440 14:54:55.427918 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2441 14:54:55.437113 Loading segment from ROM address 0xffc2aec8
2442 14:54:55.439900 Entry Point 0x30000000
2443 14:54:55.440053 Loaded segments
2444 14:54:55.446131 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2445 14:54:55.449584 coreboot skipped calling FSP notify phase: 00000040.
2446 14:54:55.456370 coreboot skipped calling FSP notify phase: 000000f0.
2447 14:54:55.462760 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2448 14:54:55.462908 Finalizing chipset.
2449 14:54:55.466500 apm_control: Finalizing SMM.
2450 14:54:55.469507 APMC done.
2451 14:54:55.476510 HECI: coreboot in recovery mode; found CSE in expected SOFT TEMP DISABLE state, skipping EOP
2452 14:54:55.479274 Disabling Heci using PMC IPC
2453 14:54:55.483577 HECI: CSE device 16.0 is hidden
2454 14:54:55.487290 HECI: CSE device 16.1 is disabled
2455 14:54:55.493995 HECI: CSE device 16.2 is disabled
2456 14:54:55.496827 HECI: CSE device 16.3 is disabled
2457 14:54:55.500480 HECI: CSE device 16.4 is disabled
2458 14:54:55.504074 HECI: CSE device 16.5 is disabled
2459 14:54:55.507092 BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 39 ms
2460 14:54:55.510561 mp_park_aps done after 0 msecs.
2461 14:54:55.516585 Jumping to boot code at 0x30000000(0x7688f000)
2462 14:54:55.527073 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2463 14:54:55.530538
2464 14:54:55.531053
2465 14:54:55.531392
2466 14:54:55.533699 Starting depthcharge on Volmar...
2467 14:54:55.534225
2468 14:54:55.535293 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2469 14:54:55.535812 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2470 14:54:55.536270 Setting prompt string to ['brya:']
2471 14:54:55.536708 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2472 14:54:55.540528 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2473 14:54:55.540990
2474 14:54:55.546908 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2475 14:54:55.547338
2476 14:54:55.553734 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2477 14:54:55.554255
2478 14:54:55.557081 configure_storage: Failed to remap 1C:2
2479 14:54:55.557508
2480 14:54:55.560308 Wipe memory regions:
2481 14:54:55.560741
2482 14:54:55.563361 [0x00000000001000, 0x000000000a0000)
2483 14:54:55.563791
2484 14:54:55.567115 [0x00000000100000, 0x00000030000000)
2485 14:54:55.680265
2486 14:54:55.683792 [0x00000032668e60, 0x00000076855000)
2487 14:54:55.841580
2488 14:54:55.844371 [0x00000100000000, 0x0000027fc00000)
2489 14:54:56.727175
2490 14:54:56.730557 ec_init: CrosEC protocol v3 supported (256, 256)
2491 14:54:57.339585
2492 14:54:57.340277 R8152: Initializing
2493 14:54:57.340657
2494 14:54:57.342758 Version 9 (ocp_data = 6010)
2495 14:54:57.343187
2496 14:54:57.345895 R8152: Done initializing
2497 14:54:57.346328
2498 14:54:57.349187 Adding net device
2499 14:54:57.650414
2500 14:54:57.653052 [firmware-brya-14505.B-collabora] May 21 2024 15:13:27
2501 14:54:57.653537
2502 14:54:57.653929
2503 14:54:57.654691 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2505 14:54:57.755946 brya: tftpboot 192.168.201.1 14331344/tftp-deploy-ocq0qpv_/kernel/bzImage 14331344/tftp-deploy-ocq0qpv_/kernel/cmdline 14331344/tftp-deploy-ocq0qpv_/ramdisk/ramdisk.cpio.gz
2506 14:54:57.756771 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2507 14:54:57.757314 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2508 14:54:57.762072 tftpboot 192.168.201.1 14331344/tftp-deploy-ocq0qpv_/kernel/bzIploy-ocq0qpv_/kernel/cmdline 14331344/tftp-deploy-ocq0qpv_/ramdisk/ramdisk.cpio.gz
2509 14:54:57.762524
2510 14:54:57.763032 Waiting for link
2511 14:54:57.964034
2512 14:54:57.964148 done.
2513 14:54:57.964209
2514 14:54:57.964264 MAC: 00:e0:4c:68:05:c6
2515 14:54:57.964317
2516 14:54:57.967364 Sending DHCP discover... done.
2517 14:54:57.967470
2518 14:54:57.970480 Waiting for reply... done.
2519 14:54:57.970551
2520 14:54:57.974071 Sending DHCP request... done.
2521 14:54:57.974149
2522 14:54:57.977235 Waiting for reply... done.
2523 14:54:57.977312
2524 14:54:57.980688 My ip is 192.168.201.17
2525 14:54:57.980765
2526 14:54:57.984085 The DHCP server ip is 192.168.201.1
2527 14:54:57.984162
2528 14:54:57.990590 TFTP server IP predefined by user: 192.168.201.1
2529 14:54:57.990669
2530 14:54:57.997067 Bootfile predefined by user: 14331344/tftp-deploy-ocq0qpv_/kernel/bzImage
2531 14:54:57.997145
2532 14:54:58.000996 Sending tftp read request... done.
2533 14:54:58.001074
2534 14:54:58.003576 Waiting for the transfer...
2535 14:54:58.003675
2536 14:54:58.297899 00000000 ################################################################
2537 14:54:58.298014
2538 14:54:58.558585 00080000 ################################################################
2539 14:54:58.558711
2540 14:54:58.806462 00100000 ################################################################
2541 14:54:58.806581
2542 14:54:59.060763 00180000 ################################################################
2543 14:54:59.060878
2544 14:54:59.317584 00200000 ################################################################
2545 14:54:59.317700
2546 14:54:59.582024 00280000 ################################################################
2547 14:54:59.582149
2548 14:54:59.832537 00300000 ################################################################
2549 14:54:59.832658
2550 14:55:00.082291 00380000 ################################################################
2551 14:55:00.082408
2552 14:55:00.336102 00400000 ################################################################
2553 14:55:00.336220
2554 14:55:00.598099 00480000 ################################################################
2555 14:55:00.598208
2556 14:55:00.852474 00500000 ################################################################
2557 14:55:00.852599
2558 14:55:01.113641 00580000 ################################################################
2559 14:55:01.113791
2560 14:55:01.375614 00600000 ################################################################
2561 14:55:01.375727
2562 14:55:01.639446 00680000 ################################################################
2563 14:55:01.639560
2564 14:55:01.897850 00700000 ################################################################
2565 14:55:01.897974
2566 14:55:02.146634 00780000 ################################################################
2567 14:55:02.146740
2568 14:55:02.402231 00800000 ################################################################
2569 14:55:02.402377
2570 14:55:02.654445 00880000 ################################################################
2571 14:55:02.654588
2572 14:55:02.904732 00900000 ################################################################
2573 14:55:02.904921
2574 14:55:03.165759 00980000 ################################################################
2575 14:55:03.165871
2576 14:55:03.444677 00a00000 ################################################################
2577 14:55:03.444800
2578 14:55:03.702698 00a80000 ################################################################
2579 14:55:03.702815
2580 14:55:03.966829 00b00000 ################################################################
2581 14:55:03.966939
2582 14:55:04.229728 00b80000 ################################################################
2583 14:55:04.229842
2584 14:55:04.483312 00c00000 ################################################################
2585 14:55:04.483423
2586 14:55:04.732544 00c80000 ################################################################
2587 14:55:04.732653
2588 14:55:05.006330 00d00000 ################################################################
2589 14:55:05.006460
2590 14:55:05.261318 00d80000 ################################################################
2591 14:55:05.261430
2592 14:55:05.529076 00e00000 ################################################################
2593 14:55:05.529190
2594 14:55:05.803509 00e80000 ################################################################
2595 14:55:05.803619
2596 14:55:06.074194 00f00000 ################################################################
2597 14:55:06.074308
2598 14:55:06.332082 00f80000 ################################################################
2599 14:55:06.332193
2600 14:55:06.598575 01000000 ################################################################
2601 14:55:06.598688
2602 14:55:06.864345 01080000 ################################################################
2603 14:55:06.864457
2604 14:55:07.139510 01100000 ################################################################
2605 14:55:07.139624
2606 14:55:07.410314 01180000 ################################################################
2607 14:55:07.410448
2608 14:55:07.706405 01200000 ################################################################
2609 14:55:07.706517
2610 14:55:07.850466 01280000 #################################### done.
2611 14:55:07.850575
2612 14:55:07.853276 The bootfile was 19685696 bytes long.
2613 14:55:07.853352
2614 14:55:07.856744 Sending tftp read request... done.
2615 14:55:07.856816
2616 14:55:07.860026 Waiting for the transfer...
2617 14:55:07.860102
2618 14:55:08.123137 00000000 ################################################################
2619 14:55:08.123250
2620 14:55:08.400942 00080000 ################################################################
2621 14:55:08.401056
2622 14:55:08.673522 00100000 ################################################################
2623 14:55:08.673655
2624 14:55:08.946108 00180000 ################################################################
2625 14:55:08.946234
2626 14:55:09.226673 00200000 ################################################################
2627 14:55:09.226793
2628 14:55:09.492182 00280000 ################################################################
2629 14:55:09.492296
2630 14:55:09.745288 00300000 ################################################################
2631 14:55:09.745404
2632 14:55:10.017190 00380000 ################################################################
2633 14:55:10.017307
2634 14:55:10.293236 00400000 ################################################################
2635 14:55:10.293347
2636 14:55:10.556440 00480000 ################################################################
2637 14:55:10.556586
2638 14:55:10.832693 00500000 ################################################################
2639 14:55:10.832807
2640 14:55:11.105817 00580000 ################################################################
2641 14:55:11.105933
2642 14:55:11.387513 00600000 ################################################################
2643 14:55:11.387634
2644 14:55:11.668300 00680000 ################################################################
2645 14:55:11.668411
2646 14:55:11.923602 00700000 ################################################################
2647 14:55:11.923713
2648 14:55:12.180230 00780000 ################################################################
2649 14:55:12.180367
2650 14:55:12.449650 00800000 ################################################################
2651 14:55:12.449765
2652 14:55:12.718736 00880000 ################################################################
2653 14:55:12.718849
2654 14:55:12.975881 00900000 ################################################################
2655 14:55:12.976016
2656 14:55:13.239974 00980000 ################################################################
2657 14:55:13.240089
2658 14:55:13.463875 00a00000 #################################################### done.
2659 14:55:13.464027
2660 14:55:13.467204 Sending tftp read request... done.
2661 14:55:13.467282
2662 14:55:13.470721 Waiting for the transfer...
2663 14:55:13.470799
2664 14:55:13.470859 00000000 # done.
2665 14:55:13.470917
2666 14:55:13.480871 Command line loaded dynamically from TFTP file: 14331344/tftp-deploy-ocq0qpv_/kernel/cmdline
2667 14:55:13.480951
2668 14:55:13.493971 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2669 14:55:13.502827
2670 14:55:13.506212 Shutting down all USB controllers.
2671 14:55:13.506316
2672 14:55:13.506410 Removing current net device
2673 14:55:13.506493
2674 14:55:13.509623 Finalizing coreboot
2675 14:55:13.509740
2676 14:55:13.516152 Exiting depthcharge with code 4 at timestamp: 28026315
2677 14:55:13.516280
2678 14:55:13.516378
2679 14:55:13.516500 Starting kernel ...
2680 14:55:13.516597
2681 14:55:13.516691
2682 14:55:13.517300 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2683 14:55:13.517465 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2684 14:55:13.517595 Setting prompt string to ['Linux version [0-9]']
2685 14:55:13.517711 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2686 14:55:13.517829 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2688 14:59:41.518602 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2690 14:59:41.519627 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2692 14:59:41.520487 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2695 14:59:41.521777 end: 2 depthcharge-action (duration 00:05:00) [common]
2697 14:59:41.522972 Cleaning after the job
2698 14:59:41.523427 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/ramdisk
2699 14:59:41.530175 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/kernel
2700 14:59:41.541012 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331344/tftp-deploy-ocq0qpv_/modules
2701 14:59:41.546751 start: 4.1 power-off (timeout 00:00:30) [common]
2702 14:59:41.547442 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-10', '--port=1', '--command=off']
2703 14:59:42.491567 >> Command sent successfully.
2704 14:59:42.504981 Returned 0 in 0 seconds
2705 14:59:42.606534 end: 4.1 power-off (duration 00:00:01) [common]
2707 14:59:42.607825 start: 4.2 read-feedback (timeout 00:09:59) [common]
2708 14:59:42.609023 Listened to connection for namespace 'common' for up to 1s
2710 14:59:42.610363 Listened to connection for namespace 'common' for up to 1s
2711 14:59:43.609502 Finalising connection for namespace 'common'
2712 14:59:43.609732 Disconnecting from shell: Finalise
2713 14:59:43.609858
2714 14:59:43.710590 end: 4.2 read-feedback (duration 00:00:01) [common]
2715 14:59:43.711198 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14331344
2716 14:59:43.770421 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14331344
2717 14:59:43.770627 JobError: Your job cannot terminate cleanly.