Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:54:48.379358 lava-dispatcher, installed at version: 2024.03
2 14:54:48.379541 start: 0 validate
3 14:54:48.379647 Start time: 2024-06-13 14:54:48.379642+00:00 (UTC)
4 14:54:48.379756 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:54:48.379884 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 14:54:48.648409 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:54:48.648959 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-26-ga958754c2b9e6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:55:04.923644 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:55:04.923801 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:55:05.190925 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:55:05.191098 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-26-ga958754c2b9e6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 14:55:07.193120 validate duration: 18.81
14 14:55:07.193362 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:55:07.193448 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:55:07.193519 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:55:07.193631 Not decompressing ramdisk as can be used compressed.
18 14:55:07.193703 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 14:55:07.193756 saving as /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/ramdisk/initrd.cpio.gz
20 14:55:07.193808 total size: 6137763 (5 MB)
21 14:55:07.459102 progress 0 % (0 MB)
22 14:55:07.460544 progress 5 % (0 MB)
23 14:55:07.461641 progress 10 % (0 MB)
24 14:55:07.462896 progress 15 % (0 MB)
25 14:55:07.464009 progress 20 % (1 MB)
26 14:55:07.465056 progress 25 % (1 MB)
27 14:55:07.466280 progress 30 % (1 MB)
28 14:55:07.467389 progress 35 % (2 MB)
29 14:55:07.468480 progress 40 % (2 MB)
30 14:55:07.469649 progress 45 % (2 MB)
31 14:55:07.470702 progress 50 % (2 MB)
32 14:55:07.471894 progress 55 % (3 MB)
33 14:55:07.472941 progress 60 % (3 MB)
34 14:55:07.473962 progress 65 % (3 MB)
35 14:55:07.475221 progress 70 % (4 MB)
36 14:55:07.476270 progress 75 % (4 MB)
37 14:55:07.477316 progress 80 % (4 MB)
38 14:55:07.478422 progress 85 % (5 MB)
39 14:55:07.479418 progress 90 % (5 MB)
40 14:55:07.480473 progress 95 % (5 MB)
41 14:55:07.481784 progress 100 % (5 MB)
42 14:55:07.481896 5 MB downloaded in 0.29 s (20.32 MB/s)
43 14:55:07.482031 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:55:07.482232 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:55:07.482296 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:55:07.482355 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:55:07.482473 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-26-ga958754c2b9e6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 14:55:07.482526 saving as /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/kernel/bzImage
50 14:55:07.482568 total size: 19685696 (18 MB)
51 14:55:07.482611 No compression specified
52 14:55:07.483520 progress 0 % (0 MB)
53 14:55:07.486898 progress 5 % (0 MB)
54 14:55:07.490300 progress 10 % (1 MB)
55 14:55:07.493690 progress 15 % (2 MB)
56 14:55:07.496989 progress 20 % (3 MB)
57 14:55:07.500523 progress 25 % (4 MB)
58 14:55:07.503912 progress 30 % (5 MB)
59 14:55:07.507476 progress 35 % (6 MB)
60 14:55:07.510864 progress 40 % (7 MB)
61 14:55:07.514392 progress 45 % (8 MB)
62 14:55:07.517741 progress 50 % (9 MB)
63 14:55:07.521155 progress 55 % (10 MB)
64 14:55:07.524664 progress 60 % (11 MB)
65 14:55:07.528021 progress 65 % (12 MB)
66 14:55:07.531367 progress 70 % (13 MB)
67 14:55:07.534643 progress 75 % (14 MB)
68 14:55:07.538016 progress 80 % (15 MB)
69 14:55:07.541316 progress 85 % (15 MB)
70 14:55:07.544655 progress 90 % (16 MB)
71 14:55:07.547916 progress 95 % (17 MB)
72 14:55:07.551519 progress 100 % (18 MB)
73 14:55:07.551671 18 MB downloaded in 0.07 s (271.69 MB/s)
74 14:55:07.551804 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:55:07.551986 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:55:07.552052 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:55:07.552112 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:55:07.552230 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 14:55:07.552280 saving as /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/nfsrootfs/full.rootfs.tar
81 14:55:07.552323 total size: 58462052 (55 MB)
82 14:55:07.552366 Using unxz to decompress xz
83 14:55:07.553621 progress 0 % (0 MB)
84 14:55:07.684022 progress 5 % (2 MB)
85 14:55:07.817100 progress 10 % (5 MB)
86 14:55:07.948172 progress 15 % (8 MB)
87 14:55:08.065744 progress 20 % (11 MB)
88 14:55:08.199737 progress 25 % (13 MB)
89 14:55:08.331947 progress 30 % (16 MB)
90 14:55:08.439043 progress 35 % (19 MB)
91 14:55:08.496683 progress 40 % (22 MB)
92 14:55:08.621193 progress 45 % (25 MB)
93 14:55:08.759104 progress 50 % (27 MB)
94 14:55:08.885280 progress 55 % (30 MB)
95 14:55:09.016370 progress 60 % (33 MB)
96 14:55:09.148462 progress 65 % (36 MB)
97 14:55:09.276046 progress 70 % (39 MB)
98 14:55:09.416954 progress 75 % (41 MB)
99 14:55:09.533064 progress 80 % (44 MB)
100 14:55:09.649129 progress 85 % (47 MB)
101 14:55:09.786203 progress 90 % (50 MB)
102 14:55:09.925175 progress 95 % (52 MB)
103 14:55:10.064895 progress 100 % (55 MB)
104 14:55:10.068904 55 MB downloaded in 2.52 s (22.15 MB/s)
105 14:55:10.069085 end: 1.3.1 http-download (duration 00:00:03) [common]
107 14:55:10.069306 end: 1.3 download-retry (duration 00:00:03) [common]
108 14:55:10.069389 start: 1.4 download-retry (timeout 00:09:57) [common]
109 14:55:10.069465 start: 1.4.1 http-download (timeout 00:09:57) [common]
110 14:55:10.069600 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-26-ga958754c2b9e6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 14:55:10.069666 saving as /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/modules/modules.tar
112 14:55:10.069725 total size: 1634668 (1 MB)
113 14:55:10.069784 Using unxz to decompress xz
114 14:55:10.071028 progress 2 % (0 MB)
115 14:55:10.072892 progress 8 % (0 MB)
116 14:55:10.077922 progress 14 % (0 MB)
117 14:55:10.083024 progress 20 % (0 MB)
118 14:55:10.087927 progress 26 % (0 MB)
119 14:55:10.092600 progress 32 % (0 MB)
120 14:55:10.097898 progress 38 % (0 MB)
121 14:55:10.102524 progress 44 % (0 MB)
122 14:55:10.107205 progress 50 % (0 MB)
123 14:55:10.112428 progress 56 % (0 MB)
124 14:55:10.117331 progress 62 % (0 MB)
125 14:55:10.121440 progress 68 % (1 MB)
126 14:55:10.126656 progress 74 % (1 MB)
127 14:55:10.131800 progress 80 % (1 MB)
128 14:55:10.136763 progress 86 % (1 MB)
129 14:55:10.141674 progress 92 % (1 MB)
130 14:55:10.146685 progress 98 % (1 MB)
131 14:55:10.153185 1 MB downloaded in 0.08 s (18.68 MB/s)
132 14:55:10.153355 end: 1.4.1 http-download (duration 00:00:00) [common]
134 14:55:10.153562 end: 1.4 download-retry (duration 00:00:00) [common]
135 14:55:10.153656 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
136 14:55:10.153737 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
137 14:55:10.911438 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14331358/extract-nfsrootfs-ch3me6ys
138 14:55:10.911619 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
139 14:55:10.911712 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
140 14:55:10.911867 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n
141 14:55:10.911980 makedir: /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin
142 14:55:10.912067 makedir: /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/tests
143 14:55:10.912160 makedir: /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/results
144 14:55:10.912243 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-add-keys
145 14:55:10.912360 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-add-sources
146 14:55:10.912465 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-background-process-start
147 14:55:10.912568 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-background-process-stop
148 14:55:10.912677 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-common-functions
149 14:55:10.912780 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-echo-ipv4
150 14:55:10.912879 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-install-packages
151 14:55:10.912988 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-installed-packages
152 14:55:10.913080 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-os-build
153 14:55:10.913172 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-probe-channel
154 14:55:10.913266 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-probe-ip
155 14:55:10.913359 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-target-ip
156 14:55:10.913453 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-target-mac
157 14:55:10.913547 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-target-storage
158 14:55:10.913643 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-case
159 14:55:10.913736 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-event
160 14:55:10.913830 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-feedback
161 14:55:10.913924 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-raise
162 14:55:10.914017 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-reference
163 14:55:10.914111 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-runner
164 14:55:10.914204 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-set
165 14:55:10.914297 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-test-shell
166 14:55:10.914390 Updating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-install-packages (oe)
167 14:55:10.914510 Updating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/bin/lava-installed-packages (oe)
168 14:55:10.914603 Creating /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/environment
169 14:55:10.914678 LAVA metadata
170 14:55:10.914737 - LAVA_JOB_ID=14331358
171 14:55:10.914789 - LAVA_DISPATCHER_IP=192.168.201.1
172 14:55:10.914876 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
173 14:55:10.914927 skipped lava-vland-overlay
174 14:55:10.914994 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
175 14:55:10.915060 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
176 14:55:10.915106 skipped lava-multinode-overlay
177 14:55:10.915170 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
178 14:55:10.915234 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
179 14:55:10.915289 Loading test definitions
180 14:55:10.915359 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
181 14:55:10.915412 Using /lava-14331358 at stage 0
182 14:55:10.915657 uuid=14331358_1.5.2.3.1 testdef=None
183 14:55:10.915725 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
184 14:55:10.915791 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
185 14:55:10.916165 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
187 14:55:10.916336 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
188 14:55:10.916770 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
190 14:55:10.916957 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
191 14:55:10.917383 runner path: /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/0/tests/0_wifi-basic test_uuid 14331358_1.5.2.3.1
192 14:55:10.917501 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 14:55:10.917663 Creating lava-test-runner.conf files
195 14:55:10.917718 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14331358/lava-overlay-j3px6t9n/lava-14331358/0 for stage 0
196 14:55:10.917793 - 0_wifi-basic
197 14:55:10.917870 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
198 14:55:10.917938 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
199 14:55:10.922306 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
200 14:55:10.922394 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
201 14:55:10.922470 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 14:55:10.922542 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
203 14:55:10.922613 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
204 14:55:11.021169 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 14:55:11.021311 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
206 14:55:11.021391 extracting modules file /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14331358/extract-nfsrootfs-ch3me6ys
207 14:55:11.049348 extracting modules file /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14331358/extract-overlay-ramdisk-02tdqv7o/ramdisk
208 14:55:11.078514 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 14:55:11.078646 start: 1.5.5 apply-overlay-tftp (timeout 00:09:56) [common]
210 14:55:11.078716 [common] Applying overlay to NFS
211 14:55:11.078765 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14331358/compress-overlay-g_jqxaiu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14331358/extract-nfsrootfs-ch3me6ys
212 14:55:11.083259 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
213 14:55:11.083355 start: 1.5.6 configure-preseed-file (timeout 00:09:56) [common]
214 14:55:11.083424 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 14:55:11.083488 start: 1.5.7 compress-ramdisk (timeout 00:09:56) [common]
216 14:55:11.083548 Building ramdisk /var/lib/lava/dispatcher/tmp/14331358/extract-overlay-ramdisk-02tdqv7o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14331358/extract-overlay-ramdisk-02tdqv7o/ramdisk
217 14:55:11.129464 >> 48201 blocks
218 14:55:11.909817 rename /var/lib/lava/dispatcher/tmp/14331358/extract-overlay-ramdisk-02tdqv7o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/ramdisk/ramdisk.cpio.gz
219 14:55:11.909997 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 14:55:11.910090 start: 1.5.8 prepare-kernel (timeout 00:09:55) [common]
221 14:55:11.910188 start: 1.5.8.1 prepare-fit (timeout 00:09:55) [common]
222 14:55:11.910260 No mkimage arch provided, not using FIT.
223 14:55:11.910333 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 14:55:11.910404 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 14:55:11.910480 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
226 14:55:11.910554 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:55) [common]
227 14:55:11.910615 No LXC device requested
228 14:55:11.910681 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 14:55:11.910752 start: 1.7 deploy-device-env (timeout 00:09:55) [common]
230 14:55:11.910814 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 14:55:11.910866 Checking files for TFTP limit of 4294967296 bytes.
232 14:55:11.911127 end: 1 tftp-deploy (duration 00:00:05) [common]
233 14:55:11.911216 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 14:55:11.911280 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 14:55:11.911354 substitutions:
236 14:55:11.911402 - {DTB}: None
237 14:55:11.911444 - {INITRD}: 14331358/tftp-deploy-qk9zo130/ramdisk/ramdisk.cpio.gz
238 14:55:11.911485 - {KERNEL}: 14331358/tftp-deploy-qk9zo130/kernel/bzImage
239 14:55:11.911524 - {LAVA_MAC}: None
240 14:55:11.911563 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14331358/extract-nfsrootfs-ch3me6ys
241 14:55:11.911604 - {NFS_SERVER_IP}: 192.168.201.1
242 14:55:11.911642 - {PRESEED_CONFIG}: None
243 14:55:11.911692 - {PRESEED_LOCAL}: None
244 14:55:11.911768 - {RAMDISK}: 14331358/tftp-deploy-qk9zo130/ramdisk/ramdisk.cpio.gz
245 14:55:11.911811 - {ROOT_PART}: None
246 14:55:11.911858 - {ROOT}: None
247 14:55:11.911901 - {SERVER_IP}: 192.168.201.1
248 14:55:11.911941 - {TEE}: None
249 14:55:11.911981 Parsed boot commands:
250 14:55:11.912033 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 14:55:11.912144 Parsed boot commands: tftpboot 192.168.201.1 14331358/tftp-deploy-qk9zo130/kernel/bzImage 14331358/tftp-deploy-qk9zo130/kernel/cmdline 14331358/tftp-deploy-qk9zo130/ramdisk/ramdisk.cpio.gz
252 14:55:11.912214 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 14:55:11.912274 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 14:55:11.912331 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 14:55:11.912386 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 14:55:11.912432 Not connected, no need to disconnect.
257 14:55:11.912482 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 14:55:11.912536 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 14:55:11.912580 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
260 14:55:11.915884 Setting prompt string to ['lava-test: # ']
261 14:55:11.916128 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 14:55:11.916206 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 14:55:11.916281 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 14:55:11.916346 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 14:55:11.916481 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-3']
266 14:55:25.318958 Returned 0 in 13 seconds
267 14:55:25.419665 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
269 14:55:25.420361 end: 2.2.2 reset-device (duration 00:00:14) [common]
270 14:55:25.420454 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
271 14:55:25.420553 Setting prompt string to 'Starting depthcharge on Volmar...'
272 14:55:25.420611 Changing prompt to 'Starting depthcharge on Volmar...'
273 14:55:25.420669 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
274 14:55:25.420991 [Enter `^Ec?' for help]
275 14:55:25.421061
276 14:55:25.421112
277 14:55:25.421161 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
278 14:55:25.421211 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
279 14:55:25.421259 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
280 14:55:25.421305 CPU: AES supported, TXT NOT supported, VT supported
281 14:55:25.421358 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
282 14:55:25.421399 Cache size = 10 MiB
283 14:55:25.421438 MCH: device id 4609 (rev 04) is Alderlake-P
284 14:55:25.421483 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
285 14:55:25.421522 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
286 14:55:25.421561 VBOOT: Loading verstage.
287 14:55:25.421606 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 14:55:25.421649 FMAP: base = 0x0 size = 0x2000000 #areas = 37
289 14:55:25.421690 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 14:55:25.421730 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
291 14:55:25.421769 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
292 14:55:25.421808
293 14:55:25.421846
294 14:55:25.421884 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
295 14:55:25.421924 Probing TPM I2C: I2C bus 1 version 0x3230302a
296 14:55:25.421962 DW I2C bus 1 at 0xfe022000 (400 KHz)
297 14:55:25.422000 I2C TX abort detected (00000001)
298 14:55:25.422039 cr50_i2c_read: Address write failed
299 14:55:25.422083 .done! DID_VID 0x00281ae0
300 14:55:25.422121 TPM ready after 0 ms
301 14:55:25.422166 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
302 14:55:25.422203 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
303 14:55:25.422240 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 14:55:25.422277 tlcl_send_startup: Startup return code is 0
305 14:55:25.422315 TPM: setup succeeded
306 14:55:25.422353 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
307 14:55:25.422391 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 14:55:25.422429 Chrome EC: UHEPI supported
309 14:55:25.422467 Reading cr50 boot mode
310 14:55:25.422504 Cr50 says boot_mode is VERIFIED_RW(0x00).
311 14:55:25.422541 Phase 1
312 14:55:25.422578 FMAP: area GBB found @ 1805000 (458752 bytes)
313 14:55:25.422617 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 14:55:25.422655 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 14:55:25.422693 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
316 14:55:25.422731 VB2:vb2_check_recovery() Recovery was requested manually
317 14:55:25.422769 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
318 14:55:25.422807 Recovery requested (1009000e)
319 14:55:25.422845 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
320 14:55:25.422882 tlcl_extend: response is 0
321 14:55:25.422920 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
322 14:55:25.422958 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
323 14:55:25.422996 tlcl_extend: response is 0
324 14:55:25.423034 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
325 14:55:25.423072 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 14:55:25.423110 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
327 14:55:25.423147 BS: verstage times (exec / console): total (unknown) / 156 ms
328 14:55:25.423193
329 14:55:25.423248
330 14:55:25.423286 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
331 14:55:25.423326 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 14:55:25.423363 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 14:55:25.423402 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
334 14:55:25.423440 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 14:55:25.423479 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
336 14:55:25.423517 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
337 14:55:25.423557 TCO_STS: 0000 0000
338 14:55:25.423596 GEN_PMCON: d0015038 00002200
339 14:55:25.423647 GBLRST_CAUSE: 00000000 00000000
340 14:55:25.423685 HPR_CAUSE0: 00000000
341 14:55:25.423721 prev_sleep_state 5
342 14:55:25.423759 Abort disabling TXT, as CPU is not TXT capable.
343 14:55:25.423796 cse_lite: Skip switching to RW in the recovery path
344 14:55:25.423834 Boot Count incremented to 3773
345 14:55:25.423899 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
346 14:55:25.423945 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
347 14:55:25.423991 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
348 14:55:25.424030 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
349 14:55:25.424076 Chrome EC: UHEPI supported
350 14:55:25.424134 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
351 14:55:25.424180 Probing TPM I2C: done! DID_VID 0x00281ae0
352 14:55:25.424219 Locality already claimed
353 14:55:25.424265 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
354 14:55:25.424308 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
355 14:55:25.424364 MRC: Hash idx 0x100b comparison successful.
356 14:55:25.424405 MRC cache found, size f6c8
357 14:55:25.424450 bootmode is set to: 2
358 14:55:25.424492 EC returned error result code 3
359 14:55:25.424545 FW_CONFIG value from CBI is 0x131
360 14:55:25.424586 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
361 14:55:25.424625 SPD index = 0
362 14:55:25.424664 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
363 14:55:25.424703 SPD: module type is LPDDR4X
364 14:55:25.424755 SPD: module part number is K4U6E3S4AB-MGCL
365 14:55:25.424794 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
366 14:55:25.425015 SPD: device width 16 bits, bus width 16 bits
367 14:55:25.425083 SPD: module size is 1024 MB (per channel)
368 14:55:25.425125 CBMEM:
369 14:55:25.425170 IMD: root @ 0x76fff000 254 entries.
370 14:55:25.425211 IMD: root @ 0x76ffec00 62 entries.
371 14:55:25.425249 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
372 14:55:25.425289 RO_VPD is uninitialized or empty.
373 14:55:25.425350 FMAP: area RW_VPD found @ f29000 (8192 bytes)
374 14:55:25.425406 External stage cache:
375 14:55:25.425450 IMD: root @ 0x7bbff000 254 entries.
376 14:55:25.425495 IMD: root @ 0x7bbfec00 62 entries.
377 14:55:25.425556 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
378 14:55:25.425606 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
379 14:55:25.425651 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
380 14:55:25.425707 MRC: 'RECOVERY_MRC_CACHE' does not need update.
381 14:55:25.425750 8 DIMMs found
382 14:55:25.425793 SMM Memory Map
383 14:55:25.425833 SMRAM : 0x7b800000 0x800000
384 14:55:25.425871 Subregion 0: 0x7b800000 0x200000
385 14:55:25.425910 Subregion 1: 0x7ba00000 0x200000
386 14:55:25.425949 Subregion 2: 0x7bc00000 0x400000
387 14:55:25.425988 top_of_ram = 0x77000000
388 14:55:25.426027 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
389 14:55:25.426066 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
390 14:55:25.426105 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
391 14:55:25.426143 MTRR Range: Start=ff000000 End=0 (Size 1000000)
392 14:55:25.426182 Normal boot
393 14:55:25.426221 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
394 14:55:25.426260 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
395 14:55:25.426298 Processing 237 relocs. Offset value of 0x74aba000
396 14:55:25.426336 BS: romstage times (exec / console): total (unknown) / 280 ms
397 14:55:25.426375
398 14:55:25.426420
399 14:55:25.426470 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
400 14:55:25.426520 Normal boot
401 14:55:25.426576 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
402 14:55:25.426618 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 14:55:25.426658 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 14:55:25.426704 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
405 14:55:25.426757 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
406 14:55:25.426810 Processing 5931 relocs. Offset value of 0x72a30000
407 14:55:25.426870 BS: postcar times (exec / console): total (unknown) / 51 ms
408 14:55:25.426913
409 14:55:25.426964
410 14:55:25.427021 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
411 14:55:25.427072 Reserving BERT start 76a1f000, size 10000
412 14:55:25.427113 Normal boot
413 14:55:25.427152 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
414 14:55:25.427192 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
415 14:55:25.427250 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
416 14:55:25.427299 FMAP: area RW_VPD found @ f29000 (8192 bytes)
417 14:55:25.427354 Google Chrome EC: version:
418 14:55:25.427400 ro: volmar_v2.0.14126-e605144e9c
419 14:55:25.427454 rw: volmar_v0.0.55-22d1557
420 14:55:25.427495 running image: 1
421 14:55:25.427539 ACPI _SWS is PM1 Index 8 GPE Index -1
422 14:55:25.427590 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
423 14:55:25.427630 EC returned error result code 3
424 14:55:25.427669 FW_CONFIG value from CBI is 0x131
425 14:55:25.427708 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
426 14:55:25.427747 PCI: 00:1c.2 disabled by fw_config
427 14:55:25.427786 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
428 14:55:25.427825 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
429 14:55:25.427871 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
430 14:55:25.427912 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
431 14:55:25.427951 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
432 14:55:25.428009 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
433 14:55:25.428053 microcode: sig=0x906a4 pf=0x80 revision=0x423
434 14:55:25.428093 microcode: Update skipped, already up-to-date
435 14:55:25.428133 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
436 14:55:25.428171 Detected 6 core, 8 thread CPU.
437 14:55:25.428217 Setting up SMI for CPU
438 14:55:25.428269 IED base = 0x7bc00000
439 14:55:25.428311 IED size = 0x00400000
440 14:55:25.428350 Will perform SMM setup.
441 14:55:25.428388 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
442 14:55:25.428443 LAPIC 0x0 in XAPIC mode.
443 14:55:25.428498 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
444 14:55:25.428547 Processing 18 relocs. Offset value of 0x00030000
445 14:55:25.428587 Attempting to start 7 APs
446 14:55:25.428627 Waiting for 10ms after sending INIT.
447 14:55:25.428681 Waiting for SIPI to complete...
448 14:55:25.428727 done.
449 14:55:25.428767 LAPIC 0x12 in XAPIC mode.
450 14:55:25.428806 LAPIC 0x16 in XAPIC mode.
451 14:55:25.428845 LAPIC 0x14 in XAPIC mode.
452 14:55:25.428888 AP: slot 3 apic_id 16, MCU rev: 0x00000423
453 14:55:25.428943 AP: slot 1 apic_id 12, MCU rev: 0x00000423
454 14:55:25.428992 LAPIC 0x10 in XAPIC mode.
455 14:55:25.429045 AP: slot 2 apic_id 14, MCU rev: 0x00000423
456 14:55:25.429101 AP: slot 4 apic_id 10, MCU rev: 0x00000423
457 14:55:25.429146 LAPIC 0x8 in XAPIC mode.
458 14:55:25.429185 LAPIC 0x9 in XAPIC mode.
459 14:55:25.429245 AP: slot 6 apic_id 8, MCU rev: 0x00000423
460 14:55:25.429292 LAPIC 0x1 in XAPIC mode.
461 14:55:25.429347 AP: slot 5 apic_id 9, MCU rev: 0x00000423
462 14:55:25.429398 Waiting for SIPI to complete...
463 14:55:25.429637 done.
464 14:55:25.429685 AP: slot 7 apic_id 1, MCU rev: 0x00000423
465 14:55:25.429730 smm_setup_relocation_handler: enter
466 14:55:25.429777 smm_setup_relocation_handler: exit
467 14:55:25.429832 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
468 14:55:25.429877 Processing 11 relocs. Offset value of 0x00038000
469 14:55:25.429918 smm_module_setup_stub: stack_top = 0x7b804000
470 14:55:25.429969 smm_module_setup_stub: per cpu stack_size = 0x800
471 14:55:25.430018 smm_module_setup_stub: runtime.start32_offset = 0x4c
472 14:55:25.430058 smm_module_setup_stub: runtime.smm_size = 0x10000
473 14:55:25.430098 SMM Module: stub loaded at 38000. Will call 0x76a53094
474 14:55:25.430142 Installing permanent SMM handler to 0x7b800000
475 14:55:25.430197 smm_load_module: total_smm_space_needed e468, available -> 200000
476 14:55:25.430239 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
477 14:55:25.430290 Processing 255 relocs. Offset value of 0x7b9f6000
478 14:55:25.430345 smm_load_module: smram_start: 0x7b800000
479 14:55:25.430393 smm_load_module: smram_end: 7ba00000
480 14:55:25.430433 smm_load_module: handler start 0x7b9f6d5f
481 14:55:25.430477 smm_load_module: handler_size 98d0
482 14:55:25.430533 smm_load_module: fxsave_area 0x7b9ff000
483 14:55:25.430574 smm_load_module: fxsave_size 1000
484 14:55:25.430614 smm_load_module: CONFIG_MSEG_SIZE 0x0
485 14:55:25.430653 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
486 14:55:25.430692 smm_load_module: handler_mod_params.smbase = 0x7b800000
487 14:55:25.430731 smm_load_module: per_cpu_save_state_size = 0x400
488 14:55:25.430769 smm_load_module: num_cpus = 0x8
489 14:55:25.430808 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
490 14:55:25.430846 smm_load_module: total_save_state_size = 0x2000
491 14:55:25.430885 smm_load_module: cpu0 entry: 7b9e6000
492 14:55:25.430924 smm_create_map: cpus allowed in one segment 30
493 14:55:25.430963 smm_create_map: min # of segments needed 1
494 14:55:25.431002 CPU 0x0
495 14:55:25.431040 smbase 7b9e6000 entry 7b9ee000
496 14:55:25.431084 ss_start 7b9f5c00 code_end 7b9ee208
497 14:55:25.431123 CPU 0x1
498 14:55:25.431175 smbase 7b9e5c00 entry 7b9edc00
499 14:55:25.431218 ss_start 7b9f5800 code_end 7b9ede08
500 14:55:25.431263 CPU 0x2
501 14:55:25.431318 smbase 7b9e5800 entry 7b9ed800
502 14:55:25.431360 ss_start 7b9f5400 code_end 7b9eda08
503 14:55:25.431401 CPU 0x3
504 14:55:25.431440 smbase 7b9e5400 entry 7b9ed400
505 14:55:25.431486 ss_start 7b9f5000 code_end 7b9ed608
506 14:55:25.431553 CPU 0x4
507 14:55:25.431609 smbase 7b9e5000 entry 7b9ed000
508 14:55:25.431650 ss_start 7b9f4c00 code_end 7b9ed208
509 14:55:25.431689 CPU 0x5
510 14:55:25.431729 smbase 7b9e4c00 entry 7b9ecc00
511 14:55:25.431771 ss_start 7b9f4800 code_end 7b9ece08
512 14:55:25.431817 CPU 0x6
513 14:55:25.431864 smbase 7b9e4800 entry 7b9ec800
514 14:55:25.431904 ss_start 7b9f4400 code_end 7b9eca08
515 14:55:25.431948 CPU 0x7
516 14:55:25.431987 smbase 7b9e4400 entry 7b9ec400
517 14:55:25.432026 ss_start 7b9f4000 code_end 7b9ec608
518 14:55:25.432065 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
519 14:55:25.432110 Processing 11 relocs. Offset value of 0x7b9ee000
520 14:55:25.432148 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
521 14:55:25.432189 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
522 14:55:25.432228 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
523 14:55:25.432267 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
524 14:55:25.432307 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
525 14:55:25.432347 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
526 14:55:25.432386 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
527 14:55:25.432425 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
528 14:55:25.432465 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
529 14:55:25.432504 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
530 14:55:25.432542 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
531 14:55:25.432581 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
532 14:55:25.432619 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
533 14:55:25.432658 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
534 14:55:25.432698 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
535 14:55:25.432736 smm_module_setup_stub: stack_top = 0x7b804000
536 14:55:25.432775 smm_module_setup_stub: per cpu stack_size = 0x800
537 14:55:25.432813 smm_module_setup_stub: runtime.start32_offset = 0x4c
538 14:55:25.432851 smm_module_setup_stub: runtime.smm_size = 0x200000
539 14:55:25.432890 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
540 14:55:25.432929 Clearing SMI status registers
541 14:55:25.432968 SMI_STS: PM1
542 14:55:25.433008 PM1_STS: PWRBTN
543 14:55:25.433047 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
544 14:55:25.433095 In relocation handler: CPU 0
545 14:55:25.433136 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
546 14:55:25.433175 Writing SMRR. base = 0x7b800006, mask=0xff800c00
547 14:55:25.433214 Relocation complete.
548 14:55:25.433252 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
549 14:55:25.433291 In relocation handler: CPU 7
550 14:55:25.433330 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
551 14:55:25.433369 Relocation complete.
552 14:55:25.433611 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
553 14:55:25.433687 In relocation handler: CPU 2
554 14:55:25.433747 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
555 14:55:25.433790 Writing SMRR. base = 0x7b800006, mask=0xff800c00
556 14:55:25.433830 Relocation complete.
557 14:55:25.433869 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
558 14:55:25.433909 In relocation handler: CPU 3
559 14:55:25.433949 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
560 14:55:25.433988 Writing SMRR. base = 0x7b800006, mask=0xff800c00
561 14:55:25.434027 Relocation complete.
562 14:55:25.434066 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
563 14:55:25.434104 In relocation handler: CPU 1
564 14:55:25.434142 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
565 14:55:25.434182 Writing SMRR. base = 0x7b800006, mask=0xff800c00
566 14:55:25.434221 Relocation complete.
567 14:55:25.434260 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
568 14:55:25.434298 In relocation handler: CPU 4
569 14:55:25.434336 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
570 14:55:25.434376 Writing SMRR. base = 0x7b800006, mask=0xff800c00
571 14:55:25.434414 Relocation complete.
572 14:55:25.434452 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
573 14:55:25.434490 In relocation handler: CPU 5
574 14:55:25.434528 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
575 14:55:25.434566 Relocation complete.
576 14:55:25.434604 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
577 14:55:25.434642 In relocation handler: CPU 6
578 14:55:25.434679 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
579 14:55:25.434717 Writing SMRR. base = 0x7b800006, mask=0xff800c00
580 14:55:25.434756 Relocation complete.
581 14:55:25.434794 Initializing CPU #0
582 14:55:25.434833 CPU: vendor Intel device 906a4
583 14:55:25.434871 CPU: family 06, model 9a, stepping 04
584 14:55:25.434908 Clearing out pending MCEs
585 14:55:25.434946 cpu: energy policy set to 7
586 14:55:25.434984 Turbo is available but hidden
587 14:55:25.435021 Turbo is available and visible
588 14:55:25.435059 microcode: Update skipped, already up-to-date
589 14:55:25.435099 CPU #0 initialized
590 14:55:25.435137 Initializing CPU #7
591 14:55:25.435175 Initializing CPU #2
592 14:55:25.435212 Initializing CPU #4
593 14:55:25.435251 CPU: vendor Intel device 906a4
594 14:55:25.435289 CPU: family 06, model 9a, stepping 04
595 14:55:25.435328 CPU: vendor Intel device 906a4
596 14:55:25.435367 CPU: family 06, model 9a, stepping 04
597 14:55:25.435405 Initializing CPU #1
598 14:55:25.435443 Initializing CPU #3
599 14:55:25.435480 Clearing out pending MCEs
600 14:55:25.435523 CPU: vendor Intel device 906a4
601 14:55:25.435569 CPU: family 06, model 9a, stepping 04
602 14:55:25.435615 CPU: vendor Intel device 906a4
603 14:55:25.435654 CPU: family 06, model 9a, stepping 04
604 14:55:25.435693 Clearing out pending MCEs
605 14:55:25.435732 cpu: energy policy set to 7
606 14:55:25.435771 Clearing out pending MCEs
607 14:55:25.435809 cpu: energy policy set to 7
608 14:55:25.435848 microcode: Update skipped, already up-to-date
609 14:55:25.435898 CPU #2 initialized
610 14:55:25.435938 cpu: energy policy set to 7
611 14:55:25.435977 Clearing out pending MCEs
612 14:55:25.436016 microcode: Update skipped, already up-to-date
613 14:55:25.436055 CPU #4 initialized
614 14:55:25.436094 cpu: energy policy set to 7
615 14:55:25.436133 microcode: Update skipped, already up-to-date
616 14:55:25.436171 CPU #3 initialized
617 14:55:25.436209 microcode: Update skipped, already up-to-date
618 14:55:25.436247 CPU #1 initialized
619 14:55:25.436285 CPU: vendor Intel device 906a4
620 14:55:25.436324 CPU: family 06, model 9a, stepping 04
621 14:55:25.436363 Initializing CPU #6
622 14:55:25.436401 Initializing CPU #5
623 14:55:25.436440 CPU: vendor Intel device 906a4
624 14:55:25.436478 CPU: family 06, model 9a, stepping 04
625 14:55:25.436517 Clearing out pending MCEs
626 14:55:25.436555 CPU: vendor Intel device 906a4
627 14:55:25.436594 CPU: family 06, model 9a, stepping 04
628 14:55:25.436632 Clearing out pending MCEs
629 14:55:25.436670 Clearing out pending MCEs
630 14:55:25.436708 cpu: energy policy set to 7
631 14:55:25.436746 cpu: energy policy set to 7
632 14:55:25.436785 cpu: energy policy set to 7
633 14:55:25.436832 microcode: Update skipped, already up-to-date
634 14:55:25.436873 CPU #7 initialized
635 14:55:25.436911 microcode: Update skipped, already up-to-date
636 14:55:25.436950 CPU #5 initialized
637 14:55:25.436988 microcode: Update skipped, already up-to-date
638 14:55:25.437027 CPU #6 initialized
639 14:55:25.437065 bsp_do_flight_plan done after 692 msecs.
640 14:55:25.437104 CPU: frequency set to 4400 MHz
641 14:55:25.437142 Enabling SMIs.
642 14:55:25.437180 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
643 14:55:25.437219 Probing TPM I2C: done! DID_VID 0x00281ae0
644 14:55:25.437258 Locality already claimed
645 14:55:25.437296 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
646 14:55:25.437333 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
647 14:55:25.437372 Enabling GPIO PM b/c CR50 has long IRQ pulse support
648 14:55:25.437409 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
649 14:55:25.437447 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
650 14:55:25.437484 Found a VBT of 9216 bytes after decompression
651 14:55:25.437526 PCI 1.0, PIN A, using IRQ #16
652 14:55:25.437571 PCI 2.0, PIN A, using IRQ #17
653 14:55:25.437616 PCI 4.0, PIN A, using IRQ #18
654 14:55:25.437656 PCI 5.0, PIN A, using IRQ #16
655 14:55:25.437693 PCI 6.0, PIN A, using IRQ #16
656 14:55:25.437732 PCI 6.2, PIN C, using IRQ #18
657 14:55:25.437770 PCI 7.0, PIN A, using IRQ #19
658 14:55:25.437807 PCI 7.1, PIN B, using IRQ #20
659 14:55:25.437845 PCI 7.2, PIN C, using IRQ #21
660 14:55:25.437883 PCI 7.3, PIN D, using IRQ #22
661 14:55:25.437921 PCI 8.0, PIN A, using IRQ #23
662 14:55:25.437958 PCI D.0, PIN A, using IRQ #17
663 14:55:25.437997 PCI D.1, PIN B, using IRQ #19
664 14:55:25.438035 PCI 10.0, PIN A, using IRQ #24
665 14:55:25.438073 PCI 10.1, PIN B, using IRQ #25
666 14:55:25.438110 PCI 10.6, PIN C, using IRQ #20
667 14:55:25.438149 PCI 10.7, PIN D, using IRQ #21
668 14:55:25.438371 PCI 11.0, PIN A, using IRQ #26
669 14:55:25.438418 PCI 11.1, PIN B, using IRQ #27
670 14:55:25.438459 PCI 11.2, PIN C, using IRQ #28
671 14:55:25.438497 PCI 11.3, PIN D, using IRQ #29
672 14:55:25.438535 PCI 12.0, PIN A, using IRQ #30
673 14:55:25.438574 PCI 12.6, PIN B, using IRQ #31
674 14:55:25.438613 PCI 12.7, PIN C, using IRQ #22
675 14:55:25.438661 PCI 13.0, PIN A, using IRQ #32
676 14:55:25.438701 PCI 13.1, PIN B, using IRQ #33
677 14:55:25.438740 PCI 13.2, PIN C, using IRQ #34
678 14:55:25.438778 PCI 13.3, PIN D, using IRQ #35
679 14:55:25.438816 PCI 14.0, PIN B, using IRQ #23
680 14:55:25.438854 PCI 14.1, PIN A, using IRQ #36
681 14:55:25.438891 PCI 14.3, PIN C, using IRQ #17
682 14:55:25.438930 PCI 15.0, PIN A, using IRQ #37
683 14:55:25.438968 PCI 15.1, PIN B, using IRQ #38
684 14:55:25.439006 PCI 15.2, PIN C, using IRQ #39
685 14:55:25.439045 PCI 15.3, PIN D, using IRQ #40
686 14:55:25.439083 PCI 16.0, PIN A, using IRQ #18
687 14:55:25.439122 PCI 16.1, PIN B, using IRQ #19
688 14:55:25.439160 PCI 16.2, PIN C, using IRQ #20
689 14:55:25.439198 PCI 16.3, PIN D, using IRQ #21
690 14:55:25.439236 PCI 16.4, PIN A, using IRQ #18
691 14:55:25.439275 PCI 16.5, PIN B, using IRQ #19
692 14:55:25.439313 PCI 17.0, PIN A, using IRQ #22
693 14:55:25.439351 PCI 19.0, PIN A, using IRQ #41
694 14:55:25.439389 PCI 19.1, PIN B, using IRQ #42
695 14:55:25.439428 PCI 19.2, PIN C, using IRQ #43
696 14:55:25.439466 PCI 1C.0, PIN A, using IRQ #16
697 14:55:25.439504 PCI 1C.1, PIN B, using IRQ #17
698 14:55:25.439542 PCI 1C.2, PIN C, using IRQ #18
699 14:55:25.439579 PCI 1C.3, PIN D, using IRQ #19
700 14:55:25.439617 PCI 1C.4, PIN A, using IRQ #16
701 14:55:25.439655 PCI 1C.5, PIN B, using IRQ #17
702 14:55:25.439693 PCI 1C.6, PIN C, using IRQ #18
703 14:55:25.439739 PCI 1C.7, PIN D, using IRQ #19
704 14:55:25.439780 PCI 1D.0, PIN A, using IRQ #16
705 14:55:25.439818 PCI 1D.1, PIN B, using IRQ #17
706 14:55:25.439861 PCI 1D.2, PIN C, using IRQ #18
707 14:55:25.439900 PCI 1D.3, PIN D, using IRQ #19
708 14:55:25.439938 PCI 1E.0, PIN A, using IRQ #23
709 14:55:25.439976 PCI 1E.1, PIN B, using IRQ #20
710 14:55:25.440014 PCI 1E.2, PIN C, using IRQ #44
711 14:55:25.440053 PCI 1E.3, PIN D, using IRQ #45
712 14:55:25.440091 PCI 1F.3, PIN B, using IRQ #22
713 14:55:25.440130 PCI 1F.4, PIN C, using IRQ #23
714 14:55:25.440168 PCI 1F.6, PIN D, using IRQ #20
715 14:55:25.440207 PCI 1F.7, PIN A, using IRQ #21
716 14:55:25.440246 IRQ: Using dynamically assigned PCI IO-APIC IRQs
717 14:55:25.440286 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
718 14:55:25.440326 FSPS returned 0
719 14:55:25.440364 Executing Phase 1 of FspMultiPhaseSiInit
720 14:55:25.440403 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
721 14:55:25.440444 port C0 DISC req: usage 1 usb3 1 usb2 1
722 14:55:25.440484 Raw Buffer output 0 00000111
723 14:55:25.440522 Raw Buffer output 1 00000000
724 14:55:25.440561 pmc_send_ipc_cmd succeeded
725 14:55:25.440599 port C1 DISC req: usage 1 usb3 3 usb2 3
726 14:55:25.440638 Raw Buffer output 0 00000331
727 14:55:25.440676 Raw Buffer output 1 00000000
728 14:55:25.440714 pmc_send_ipc_cmd succeeded
729 14:55:25.440752 Detected 6 core, 8 thread CPU.
730 14:55:25.440790 Detected 6 core, 8 thread CPU.
731 14:55:25.440829 Detected 6 core, 8 thread CPU.
732 14:55:25.440866 Detected 6 core, 8 thread CPU.
733 14:55:25.440905 Detected 6 core, 8 thread CPU.
734 14:55:25.440943 Detected 6 core, 8 thread CPU.
735 14:55:25.440981 Detected 6 core, 8 thread CPU.
736 14:55:25.441019 Detected 6 core, 8 thread CPU.
737 14:55:25.441057 Detected 6 core, 8 thread CPU.
738 14:55:25.441094 Detected 6 core, 8 thread CPU.
739 14:55:25.441131 Detected 6 core, 8 thread CPU.
740 14:55:25.441169 Detected 6 core, 8 thread CPU.
741 14:55:25.441205 Detected 6 core, 8 thread CPU.
742 14:55:25.441243 Detected 6 core, 8 thread CPU.
743 14:55:25.441282 Detected 6 core, 8 thread CPU.
744 14:55:25.441320 Detected 6 core, 8 thread CPU.
745 14:55:25.441358 Detected 6 core, 8 thread CPU.
746 14:55:25.441395 Detected 6 core, 8 thread CPU.
747 14:55:25.441432 Detected 6 core, 8 thread CPU.
748 14:55:25.441470 Detected 6 core, 8 thread CPU.
749 14:55:25.441512 Detected 6 core, 8 thread CPU.
750 14:55:25.441557 Detected 6 core, 8 thread CPU.
751 14:55:25.441596 Detected 6 core, 8 thread CPU.
752 14:55:25.441635 Detected 6 core, 8 thread CPU.
753 14:55:25.441673 Detected 6 core, 8 thread CPU.
754 14:55:25.441711 Detected 6 core, 8 thread CPU.
755 14:55:25.441749 Detected 6 core, 8 thread CPU.
756 14:55:25.441786 Detected 6 core, 8 thread CPU.
757 14:55:25.441824 Detected 6 core, 8 thread CPU.
758 14:55:25.441863 Detected 6 core, 8 thread CPU.
759 14:55:25.441900 Detected 6 core, 8 thread CPU.
760 14:55:25.441938 Detected 6 core, 8 thread CPU.
761 14:55:25.441976 Detected 6 core, 8 thread CPU.
762 14:55:25.442014 Detected 6 core, 8 thread CPU.
763 14:55:25.442051 Detected 6 core, 8 thread CPU.
764 14:55:25.442090 Detected 6 core, 8 thread CPU.
765 14:55:25.442128 Detected 6 core, 8 thread CPU.
766 14:55:25.442176 Detected 6 core, 8 thread CPU.
767 14:55:25.442216 Detected 6 core, 8 thread CPU.
768 14:55:25.442254 Detected 6 core, 8 thread CPU.
769 14:55:25.442292 Detected 6 core, 8 thread CPU.
770 14:55:25.442330 Detected 6 core, 8 thread CPU.
771 14:55:25.442368 Display FSP Version Info HOB
772 14:55:25.442405 Reference Code - CPU = c.0.65.70
773 14:55:25.442443 uCode Version = 0.0.4.23
774 14:55:25.442481 TXT ACM version = ff.ff.ff.ffff
775 14:55:25.442519 Reference Code - ME = c.0.65.70
776 14:55:25.442558 MEBx version = 0.0.0.0
777 14:55:25.442596 ME Firmware Version = Consumer SKU
778 14:55:25.442635 Reference Code - PCH = c.0.65.70
779 14:55:25.442673 PCH-CRID Status = Disabled
780 14:55:25.442710 PCH-CRID Original Value = ff.ff.ff.ffff
781 14:55:25.442748 PCH-CRID New Value = ff.ff.ff.ffff
782 14:55:25.442787 OPROM - RST - RAID = ff.ff.ff.ffff
783 14:55:25.442825 PCH Hsio Version = 4.0.0.0
784 14:55:25.442864 Reference Code - SA - System Agent = c.0.65.70
785 14:55:25.442902 Reference Code - MRC = 0.0.3.80
786 14:55:25.442940 SA - PCIe Version = c.0.65.70
787 14:55:25.442979 SA-CRID Status = Disabled
788 14:55:25.443017 SA-CRID Original Value = 0.0.0.4
789 14:55:25.443055 SA-CRID New Value = 0.0.0.4
790 14:55:25.443093 OPROM - VBIOS = ff.ff.ff.ffff
791 14:55:25.443316 IO Manageability Engine FW Version = 24.0.4.0
792 14:55:25.443363 PHY Build Version = 0.0.0.2016
793 14:55:25.443404 Thunderbolt(TM) FW Version = 0.0.0.0
794 14:55:25.443443 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
795 14:55:25.443483 BS: BS_DEV_INIT_CHIPS run times (exec / console): 473 / 507 ms
796 14:55:25.443527 Enumerating buses...
797 14:55:25.443574 Show all devs... Before device enumeration.
798 14:55:25.443619 Root Device: enabled 1
799 14:55:25.443660 CPU_CLUSTER: 0: enabled 1
800 14:55:25.443698 DOMAIN: 0000: enabled 1
801 14:55:25.443736 GPIO: 0: enabled 1
802 14:55:25.443773 PCI: 00:00.0: enabled 1
803 14:55:25.443811 PCI: 00:01.0: enabled 0
804 14:55:25.443856 PCI: 00:01.1: enabled 0
805 14:55:25.443897 PCI: 00:02.0: enabled 1
806 14:55:25.443936 PCI: 00:04.0: enabled 1
807 14:55:25.443975 PCI: 00:05.0: enabled 0
808 14:55:25.444014 PCI: 00:06.0: enabled 1
809 14:55:25.444052 PCI: 00:06.2: enabled 0
810 14:55:25.444091 PCI: 00:07.0: enabled 0
811 14:55:25.444129 PCI: 00:07.1: enabled 0
812 14:55:25.444166 PCI: 00:07.2: enabled 0
813 14:55:25.444205 PCI: 00:07.3: enabled 0
814 14:55:25.444243 PCI: 00:08.0: enabled 0
815 14:55:25.444282 PCI: 00:09.0: enabled 0
816 14:55:25.444320 PCI: 00:0a.0: enabled 1
817 14:55:25.444359 PCI: 00:0d.0: enabled 1
818 14:55:25.444397 PCI: 00:0d.1: enabled 0
819 14:55:25.444435 PCI: 00:0d.2: enabled 0
820 14:55:25.444472 PCI: 00:0d.3: enabled 0
821 14:55:25.444509 PCI: 00:0e.0: enabled 0
822 14:55:25.444547 PCI: 00:10.0: enabled 0
823 14:55:25.444583 PCI: 00:10.1: enabled 0
824 14:55:25.444621 PCI: 00:10.6: enabled 0
825 14:55:25.444658 PCI: 00:10.7: enabled 0
826 14:55:25.444696 PCI: 00:12.0: enabled 0
827 14:55:25.444734 PCI: 00:12.6: enabled 0
828 14:55:25.444772 PCI: 00:12.7: enabled 0
829 14:55:25.444810 PCI: 00:13.0: enabled 0
830 14:55:25.444848 PCI: 00:14.0: enabled 1
831 14:55:25.444886 PCI: 00:14.1: enabled 0
832 14:55:25.444923 PCI: 00:14.2: enabled 1
833 14:55:25.444961 PCI: 00:14.3: enabled 1
834 14:55:25.444999 PCI: 00:15.0: enabled 1
835 14:55:25.445037 PCI: 00:15.1: enabled 1
836 14:55:25.445075 PCI: 00:15.2: enabled 0
837 14:55:25.445112 PCI: 00:15.3: enabled 1
838 14:55:25.445151 PCI: 00:16.0: enabled 1
839 14:55:25.445189 PCI: 00:16.1: enabled 0
840 14:55:25.445227 PCI: 00:16.2: enabled 0
841 14:55:25.445266 PCI: 00:16.3: enabled 0
842 14:55:25.445304 PCI: 00:16.4: enabled 0
843 14:55:25.445342 PCI: 00:16.5: enabled 0
844 14:55:25.445381 PCI: 00:17.0: enabled 1
845 14:55:25.445419 PCI: 00:19.0: enabled 0
846 14:55:25.445457 PCI: 00:19.1: enabled 1
847 14:55:25.445507 PCI: 00:19.2: enabled 0
848 14:55:25.445550 PCI: 00:1a.0: enabled 0
849 14:55:25.445588 PCI: 00:1c.0: enabled 0
850 14:55:25.445626 PCI: 00:1c.1: enabled 0
851 14:55:25.445664 PCI: 00:1c.2: enabled 0
852 14:55:25.445703 PCI: 00:1c.3: enabled 0
853 14:55:25.445741 PCI: 00:1c.4: enabled 0
854 14:55:25.445779 PCI: 00:1c.5: enabled 0
855 14:55:25.445817 PCI: 00:1c.6: enabled 0
856 14:55:25.445855 PCI: 00:1c.7: enabled 0
857 14:55:25.445893 PCI: 00:1d.0: enabled 0
858 14:55:25.445932 PCI: 00:1d.1: enabled 0
859 14:55:25.445970 PCI: 00:1d.2: enabled 0
860 14:55:25.446008 PCI: 00:1d.3: enabled 0
861 14:55:25.446046 PCI: 00:1e.0: enabled 1
862 14:55:25.446083 PCI: 00:1e.1: enabled 0
863 14:55:25.446121 PCI: 00:1e.2: enabled 0
864 14:55:25.446158 PCI: 00:1e.3: enabled 1
865 14:55:25.446197 PCI: 00:1f.0: enabled 1
866 14:55:25.446234 PCI: 00:1f.1: enabled 0
867 14:55:25.446272 PCI: 00:1f.2: enabled 1
868 14:55:25.446309 PCI: 00:1f.3: enabled 1
869 14:55:25.446347 PCI: 00:1f.4: enabled 0
870 14:55:25.446385 PCI: 00:1f.5: enabled 1
871 14:55:25.446422 PCI: 00:1f.6: enabled 0
872 14:55:25.446460 PCI: 00:1f.7: enabled 0
873 14:55:25.446498 GENERIC: 0.0: enabled 1
874 14:55:25.446535 GENERIC: 0.0: enabled 1
875 14:55:25.446573 GENERIC: 1.0: enabled 1
876 14:55:25.446610 GENERIC: 0.0: enabled 1
877 14:55:25.446648 GENERIC: 1.0: enabled 1
878 14:55:25.446685 USB0 port 0: enabled 1
879 14:55:25.446732 USB0 port 0: enabled 1
880 14:55:25.446770 GENERIC: 0.0: enabled 1
881 14:55:25.446808 I2C: 00:1a: enabled 1
882 14:55:25.446847 I2C: 00:31: enabled 1
883 14:55:25.446886 I2C: 00:32: enabled 1
884 14:55:25.446924 I2C: 00:50: enabled 1
885 14:55:25.446961 I2C: 00:10: enabled 1
886 14:55:25.446999 I2C: 00:15: enabled 1
887 14:55:25.447038 I2C: 00:2c: enabled 1
888 14:55:25.447076 GENERIC: 0.0: enabled 1
889 14:55:25.447114 SPI: 00: enabled 1
890 14:55:25.447151 PNP: 0c09.0: enabled 1
891 14:55:25.447190 GENERIC: 0.0: enabled 1
892 14:55:25.447227 USB3 port 0: enabled 1
893 14:55:25.447264 USB3 port 1: enabled 0
894 14:55:25.447302 USB3 port 2: enabled 1
895 14:55:25.447340 USB3 port 3: enabled 0
896 14:55:25.447378 USB2 port 0: enabled 1
897 14:55:25.447415 USB2 port 1: enabled 0
898 14:55:25.447452 USB2 port 2: enabled 1
899 14:55:25.447490 USB2 port 3: enabled 0
900 14:55:25.447531 USB2 port 4: enabled 0
901 14:55:25.447577 USB2 port 5: enabled 1
902 14:55:25.447621 USB2 port 6: enabled 0
903 14:55:25.447659 USB2 port 7: enabled 0
904 14:55:25.447697 USB2 port 8: enabled 1
905 14:55:25.447734 USB2 port 9: enabled 1
906 14:55:25.447772 USB3 port 0: enabled 1
907 14:55:25.447810 USB3 port 1: enabled 0
908 14:55:25.447847 USB3 port 2: enabled 0
909 14:55:25.447890 USB3 port 3: enabled 0
910 14:55:25.447928 GENERIC: 0.0: enabled 1
911 14:55:25.447967 GENERIC: 1.0: enabled 1
912 14:55:25.448004 APIC: 00: enabled 1
913 14:55:25.448042 APIC: 12: enabled 1
914 14:55:25.448080 APIC: 14: enabled 1
915 14:55:25.448118 APIC: 16: enabled 1
916 14:55:25.448155 APIC: 10: enabled 1
917 14:55:25.448193 APIC: 09: enabled 1
918 14:55:25.448230 APIC: 08: enabled 1
919 14:55:25.448268 APIC: 01: enabled 1
920 14:55:25.448306 Compare with tree...
921 14:55:25.448344 Root Device: enabled 1
922 14:55:25.448383 CPU_CLUSTER: 0: enabled 1
923 14:55:25.448422 APIC: 00: enabled 1
924 14:55:25.448460 APIC: 12: enabled 1
925 14:55:25.448499 APIC: 14: enabled 1
926 14:55:25.448536 APIC: 16: enabled 1
927 14:55:25.448575 APIC: 10: enabled 1
928 14:55:25.448613 APIC: 09: enabled 1
929 14:55:25.448651 APIC: 08: enabled 1
930 14:55:25.448689 APIC: 01: enabled 1
931 14:55:25.448728 DOMAIN: 0000: enabled 1
932 14:55:25.448766 GPIO: 0: enabled 1
933 14:55:25.448803 PCI: 00:00.0: enabled 1
934 14:55:25.448851 PCI: 00:01.0: enabled 0
935 14:55:25.448890 PCI: 00:01.1: enabled 0
936 14:55:25.448929 PCI: 00:02.0: enabled 1
937 14:55:25.448967 PCI: 00:04.0: enabled 1
938 14:55:25.449005 GENERIC: 0.0: enabled 1
939 14:55:25.449043 PCI: 00:05.0: enabled 0
940 14:55:25.449082 PCI: 00:06.0: enabled 1
941 14:55:25.449122 PCI: 00:06.2: enabled 0
942 14:55:25.449160 PCI: 00:08.0: enabled 0
943 14:55:25.449198 PCI: 00:09.0: enabled 0
944 14:55:25.449235 PCI: 00:0a.0: enabled 1
945 14:55:25.449273 PCI: 00:0d.0: enabled 1
946 14:55:25.449311 USB0 port 0: enabled 1
947 14:55:25.449348 USB3 port 0: enabled 1
948 14:55:25.449387 USB3 port 1: enabled 0
949 14:55:25.449424 USB3 port 2: enabled 1
950 14:55:25.449463 USB3 port 3: enabled 0
951 14:55:25.449504 PCI: 00:0d.1: enabled 0
952 14:55:25.449735 PCI: 00:0d.2: enabled 0
953 14:55:25.449786 PCI: 00:0d.3: enabled 0
954 14:55:25.449827 PCI: 00:0e.0: enabled 0
955 14:55:25.449866 PCI: 00:10.0: enabled 0
956 14:55:25.449904 PCI: 00:10.1: enabled 0
957 14:55:25.449943 PCI: 00:10.6: enabled 0
958 14:55:25.449990 PCI: 00:10.7: enabled 0
959 14:55:25.450031 PCI: 00:12.0: enabled 0
960 14:55:25.450071 PCI: 00:12.6: enabled 0
961 14:55:25.450110 PCI: 00:12.7: enabled 0
962 14:55:25.450149 PCI: 00:13.0: enabled 0
963 14:55:25.450187 PCI: 00:14.0: enabled 1
964 14:55:25.450226 USB0 port 0: enabled 1
965 14:55:25.450265 USB2 port 0: enabled 1
966 14:55:25.450303 USB2 port 1: enabled 0
967 14:55:25.450341 USB2 port 2: enabled 1
968 14:55:25.450380 USB2 port 3: enabled 0
969 14:55:25.450418 USB2 port 4: enabled 0
970 14:55:25.450456 USB2 port 5: enabled 1
971 14:55:25.450494 USB2 port 6: enabled 0
972 14:55:25.450531 USB2 port 7: enabled 0
973 14:55:25.450570 USB2 port 8: enabled 1
974 14:55:25.450608 USB2 port 9: enabled 1
975 14:55:25.450646 USB3 port 0: enabled 1
976 14:55:25.450684 USB3 port 1: enabled 0
977 14:55:25.450722 USB3 port 2: enabled 0
978 14:55:25.450759 USB3 port 3: enabled 0
979 14:55:25.450797 PCI: 00:14.1: enabled 0
980 14:55:25.450835 PCI: 00:14.2: enabled 1
981 14:55:25.450873 PCI: 00:14.3: enabled 1
982 14:55:25.450911 GENERIC: 0.0: enabled 1
983 14:55:25.450949 PCI: 00:15.0: enabled 1
984 14:55:25.450987 I2C: 00:1a: enabled 1
985 14:55:25.451025 I2C: 00:31: enabled 1
986 14:55:25.451064 I2C: 00:32: enabled 1
987 14:55:25.451102 PCI: 00:15.1: enabled 1
988 14:55:25.451139 I2C: 00:50: enabled 1
989 14:55:25.451175 PCI: 00:15.2: enabled 0
990 14:55:25.451212 PCI: 00:15.3: enabled 1
991 14:55:25.451250 I2C: 00:10: enabled 1
992 14:55:25.451287 PCI: 00:16.0: enabled 1
993 14:55:25.451325 PCI: 00:16.1: enabled 0
994 14:55:25.451362 PCI: 00:16.2: enabled 0
995 14:55:25.451400 PCI: 00:16.3: enabled 0
996 14:55:25.451439 PCI: 00:16.4: enabled 0
997 14:55:25.451476 PCI: 00:16.5: enabled 0
998 14:55:25.451514 PCI: 00:17.0: enabled 1
999 14:55:25.451551 PCI: 00:19.0: enabled 0
1000 14:55:25.451588 PCI: 00:19.1: enabled 1
1001 14:55:25.451626 I2C: 00:15: enabled 1
1002 14:55:25.451664 I2C: 00:2c: enabled 1
1003 14:55:25.451701 PCI: 00:19.2: enabled 0
1004 14:55:25.451738 PCI: 00:1a.0: enabled 0
1005 14:55:25.451776 PCI: 00:1e.0: enabled 1
1006 14:55:25.451814 PCI: 00:1e.1: enabled 0
1007 14:55:25.451858 PCI: 00:1e.2: enabled 0
1008 14:55:25.451897 PCI: 00:1e.3: enabled 1
1009 14:55:25.451936 SPI: 00: enabled 1
1010 14:55:25.451974 PCI: 00:1f.0: enabled 1
1011 14:55:25.452012 PNP: 0c09.0: enabled 1
1012 14:55:25.452050 PCI: 00:1f.1: enabled 0
1013 14:55:25.452088 PCI: 00:1f.2: enabled 1
1014 14:55:25.452127 GENERIC: 0.0: enabled 1
1015 14:55:25.452165 GENERIC: 0.0: enabled 1
1016 14:55:25.452203 GENERIC: 1.0: enabled 1
1017 14:55:25.452242 PCI: 00:1f.3: enabled 1
1018 14:55:25.452279 PCI: 00:1f.4: enabled 0
1019 14:55:25.452317 PCI: 00:1f.5: enabled 1
1020 14:55:25.452354 PCI: 00:1f.6: enabled 0
1021 14:55:25.452392 PCI: 00:1f.7: enabled 0
1022 14:55:25.452432 Root Device scanning...
1023 14:55:25.452471 scan_static_bus for Root Device
1024 14:55:25.452510 CPU_CLUSTER: 0 enabled
1025 14:55:25.452549 DOMAIN: 0000 enabled
1026 14:55:25.452588 DOMAIN: 0000 scanning...
1027 14:55:25.452626 PCI: pci_scan_bus for bus 00
1028 14:55:25.452664 PCI: 00:00.0 [8086/0000] ops
1029 14:55:25.452703 PCI: 00:00.0 [8086/4609] enabled
1030 14:55:25.452742 PCI: 00:02.0 [8086/0000] bus ops
1031 14:55:25.452781 PCI: 00:02.0 [8086/46b3] enabled
1032 14:55:25.452818 PCI: 00:04.0 [8086/0000] bus ops
1033 14:55:25.452857 PCI: 00:04.0 [8086/461d] enabled
1034 14:55:25.452895 PCI: 00:06.0 [8086/0000] bus ops
1035 14:55:25.452932 PCI: 00:06.0 [8086/464d] enabled
1036 14:55:25.452970 PCI: 00:08.0 [8086/464f] disabled
1037 14:55:25.453008 PCI: 00:0a.0 [8086/467d] enabled
1038 14:55:25.453047 PCI: 00:0d.0 [8086/0000] bus ops
1039 14:55:25.453086 PCI: 00:0d.0 [8086/461e] enabled
1040 14:55:25.453124 PCI: 00:14.0 [8086/0000] bus ops
1041 14:55:25.453162 PCI: 00:14.0 [8086/51ed] enabled
1042 14:55:25.453200 PCI: 00:14.2 [8086/51ef] enabled
1043 14:55:25.453238 PCI: 00:14.3 [8086/0000] bus ops
1044 14:55:25.453275 PCI: 00:14.3 [8086/51f0] enabled
1045 14:55:25.453313 PCI: 00:15.0 [8086/0000] bus ops
1046 14:55:25.453350 PCI: 00:15.0 [8086/51e8] enabled
1047 14:55:25.453388 PCI: 00:15.1 [8086/0000] bus ops
1048 14:55:25.453436 PCI: 00:15.1 [8086/51e9] enabled
1049 14:55:25.453475 PCI: 00:15.2 [8086/0000] bus ops
1050 14:55:25.453513 PCI: 00:15.2 [8086/51ea] disabled
1051 14:55:25.453551 PCI: 00:15.3 [8086/0000] bus ops
1052 14:55:25.453589 PCI: 00:15.3 [8086/51eb] enabled
1053 14:55:25.453626 PCI: 00:16.0 [8086/0000] ops
1054 14:55:25.453664 PCI: 00:16.0 [8086/51e0] enabled
1055 14:55:25.453701 PCI: Static device PCI: 00:17.0 not found, disabling it.
1056 14:55:25.453739 PCI: 00:19.0 [8086/0000] bus ops
1057 14:55:25.453776 PCI: 00:19.0 [8086/51c5] disabled
1058 14:55:25.453814 PCI: 00:19.1 [8086/0000] bus ops
1059 14:55:25.453851 PCI: 00:19.1 [8086/51c6] enabled
1060 14:55:25.453889 PCI: 00:1e.0 [8086/0000] ops
1061 14:55:25.453927 PCI: 00:1e.0 [8086/51a8] enabled
1062 14:55:25.453964 PCI: 00:1e.3 [8086/0000] bus ops
1063 14:55:25.454001 PCI: 00:1e.3 [8086/51ab] enabled
1064 14:55:25.454039 PCI: 00:1f.0 [8086/0000] bus ops
1065 14:55:25.454077 PCI: 00:1f.0 [8086/5182] enabled
1066 14:55:25.454115 RTC Init
1067 14:55:25.454152 Set power on after power failure.
1068 14:55:25.454190 Disabling Deep S3
1069 14:55:25.454228 Disabling Deep S3
1070 14:55:25.454266 Disabling Deep S4
1071 14:55:25.454304 Disabling Deep S4
1072 14:55:25.454341 Disabling Deep S5
1073 14:55:25.454379 Disabling Deep S5
1074 14:55:25.454418 PCI: 00:1f.2 [0000/0000] hidden
1075 14:55:25.454455 PCI: 00:1f.3 [8086/0000] bus ops
1076 14:55:25.454492 PCI: 00:1f.3 [8086/51c8] enabled
1077 14:55:25.454530 PCI: 00:1f.5 [8086/0000] bus ops
1078 14:55:25.454568 PCI: 00:1f.5 [8086/51a4] enabled
1079 14:55:25.454605 GPIO: 0 enabled
1080 14:55:25.454643 PCI: Leftover static devices:
1081 14:55:25.454681 PCI: 00:01.0
1082 14:55:25.454719 PCI: 00:01.1
1083 14:55:25.454756 PCI: 00:05.0
1084 14:55:25.454793 PCI: 00:06.2
1085 14:55:25.454831 PCI: 00:09.0
1086 14:55:25.454869 PCI: 00:0d.1
1087 14:55:25.454907 PCI: 00:0d.2
1088 14:55:25.454945 PCI: 00:0d.3
1089 14:55:25.454982 PCI: 00:0e.0
1090 14:55:25.455020 PCI: 00:10.0
1091 14:55:25.455057 PCI: 00:10.1
1092 14:55:25.455094 PCI: 00:10.6
1093 14:55:25.455132 PCI: 00:10.7
1094 14:55:25.455170 PCI: 00:12.0
1095 14:55:25.455208 PCI: 00:12.6
1096 14:55:25.455246 PCI: 00:12.7
1097 14:55:25.455283 PCI: 00:13.0
1098 14:55:25.455321 PCI: 00:14.1
1099 14:55:25.455358 PCI: 00:16.1
1100 14:55:25.455396 PCI: 00:16.2
1101 14:55:25.455435 PCI: 00:16.3
1102 14:55:25.455472 PCI: 00:16.4
1103 14:55:25.455508 PCI: 00:16.5
1104 14:55:25.455546 PCI: 00:17.0
1105 14:55:25.455583 PCI: 00:19.2
1106 14:55:25.455802 PCI: 00:1a.0
1107 14:55:25.455856 PCI: 00:1e.1
1108 14:55:25.455898 PCI: 00:1e.2
1109 14:55:25.455938 PCI: 00:1f.1
1110 14:55:25.455977 PCI: 00:1f.4
1111 14:55:25.456015 PCI: 00:1f.6
1112 14:55:25.456053 PCI: 00:1f.7
1113 14:55:25.456091 PCI: Check your devicetree.cb.
1114 14:55:25.456130 PCI: 00:02.0 scanning...
1115 14:55:25.456169 scan_generic_bus for PCI: 00:02.0
1116 14:55:25.456207 scan_generic_bus for PCI: 00:02.0 done
1117 14:55:25.456245 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1118 14:55:25.456283 PCI: 00:04.0 scanning...
1119 14:55:25.456331 scan_generic_bus for PCI: 00:04.0
1120 14:55:25.456370 GENERIC: 0.0 enabled
1121 14:55:25.456409 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1122 14:55:25.456448 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1123 14:55:25.456488 PCI: 00:06.0 scanning...
1124 14:55:25.456526 do_pci_scan_bridge for PCI: 00:06.0
1125 14:55:25.456564 PCI: pci_scan_bus for bus 01
1126 14:55:25.456603 PCI: 01:00.0 [15b7/5009] enabled
1127 14:55:25.456641 Enabling Common Clock Configuration
1128 14:55:25.456679 L1 Sub-State supported from root port 6
1129 14:55:25.456718 L1 Sub-State Support = 0x5
1130 14:55:25.456756 CommonModeRestoreTime = 0x6e
1131 14:55:25.456795 Power On Value = 0x5, Power On Scale = 0x2
1132 14:55:25.456833 ASPM: Enabled L1
1133 14:55:25.456871 PCIe: Max_Payload_Size adjusted to 256
1134 14:55:25.456909 PCI: 01:00.0: Enabled LTR
1135 14:55:25.456947 PCI: 01:00.0: Programmed LTR max latencies
1136 14:55:25.456986 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1137 14:55:25.457025 PCI: 00:0d.0 scanning...
1138 14:55:25.457063 scan_static_bus for PCI: 00:0d.0
1139 14:55:25.457101 USB0 port 0 enabled
1140 14:55:25.457139 USB0 port 0 scanning...
1141 14:55:25.457177 scan_static_bus for USB0 port 0
1142 14:55:25.457216 USB3 port 0 enabled
1143 14:55:25.457254 USB3 port 1 disabled
1144 14:55:25.457292 USB3 port 2 enabled
1145 14:55:25.457331 USB3 port 3 disabled
1146 14:55:25.457369 USB3 port 0 scanning...
1147 14:55:25.457408 scan_static_bus for USB3 port 0
1148 14:55:25.457446 scan_static_bus for USB3 port 0 done
1149 14:55:25.457484 scan_bus: bus USB3 port 0 finished in 6 msecs
1150 14:55:25.457522 USB3 port 2 scanning...
1151 14:55:25.457562 scan_static_bus for USB3 port 2
1152 14:55:25.457600 scan_static_bus for USB3 port 2 done
1153 14:55:25.457638 scan_bus: bus USB3 port 2 finished in 6 msecs
1154 14:55:25.457676 scan_static_bus for USB0 port 0 done
1155 14:55:25.457714 scan_bus: bus USB0 port 0 finished in 43 msecs
1156 14:55:25.457752 scan_static_bus for PCI: 00:0d.0 done
1157 14:55:25.457789 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1158 14:55:25.457827 PCI: 00:14.0 scanning...
1159 14:55:25.457865 scan_static_bus for PCI: 00:14.0
1160 14:55:25.457903 USB0 port 0 enabled
1161 14:55:25.457942 USB0 port 0 scanning...
1162 14:55:25.457980 scan_static_bus for USB0 port 0
1163 14:55:25.458019 USB2 port 0 enabled
1164 14:55:25.458056 USB2 port 1 disabled
1165 14:55:25.458094 USB2 port 2 enabled
1166 14:55:25.458132 USB2 port 3 disabled
1167 14:55:25.458170 USB2 port 4 disabled
1168 14:55:25.458208 USB2 port 5 enabled
1169 14:55:25.458245 USB2 port 6 disabled
1170 14:55:25.458284 USB2 port 7 disabled
1171 14:55:25.458321 USB2 port 8 enabled
1172 14:55:25.458359 USB2 port 9 enabled
1173 14:55:25.458397 USB3 port 0 enabled
1174 14:55:25.458434 USB3 port 1 disabled
1175 14:55:25.458472 USB3 port 2 disabled
1176 14:55:25.458509 USB3 port 3 disabled
1177 14:55:25.458548 USB2 port 0 scanning...
1178 14:55:25.458587 scan_static_bus for USB2 port 0
1179 14:55:25.458625 scan_static_bus for USB2 port 0 done
1180 14:55:25.458664 scan_bus: bus USB2 port 0 finished in 6 msecs
1181 14:55:25.458702 USB2 port 2 scanning...
1182 14:55:25.458741 scan_static_bus for USB2 port 2
1183 14:55:25.458779 scan_static_bus for USB2 port 2 done
1184 14:55:25.458819 scan_bus: bus USB2 port 2 finished in 6 msecs
1185 14:55:25.458857 USB2 port 5 scanning...
1186 14:55:25.458895 scan_static_bus for USB2 port 5
1187 14:55:25.458933 scan_static_bus for USB2 port 5 done
1188 14:55:25.458970 scan_bus: bus USB2 port 5 finished in 6 msecs
1189 14:55:25.459007 USB2 port 8 scanning...
1190 14:55:25.459045 scan_static_bus for USB2 port 8
1191 14:55:25.459083 scan_static_bus for USB2 port 8 done
1192 14:55:25.459120 scan_bus: bus USB2 port 8 finished in 6 msecs
1193 14:55:25.459158 USB2 port 9 scanning...
1194 14:55:25.459197 scan_static_bus for USB2 port 9
1195 14:55:25.459235 scan_static_bus for USB2 port 9 done
1196 14:55:25.459274 scan_bus: bus USB2 port 9 finished in 6 msecs
1197 14:55:25.459312 USB3 port 0 scanning...
1198 14:55:25.459350 scan_static_bus for USB3 port 0
1199 14:55:25.459388 scan_static_bus for USB3 port 0 done
1200 14:55:25.459426 scan_bus: bus USB3 port 0 finished in 6 msecs
1201 14:55:25.459465 scan_static_bus for USB0 port 0 done
1202 14:55:25.459506 scan_bus: bus USB0 port 0 finished in 120 msecs
1203 14:55:25.459550 scan_static_bus for PCI: 00:14.0 done
1204 14:55:25.459595 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1205 14:55:25.459635 PCI: 00:14.3 scanning...
1206 14:55:25.459681 scan_static_bus for PCI: 00:14.3
1207 14:55:25.459720 GENERIC: 0.0 enabled
1208 14:55:25.459758 scan_static_bus for PCI: 00:14.3 done
1209 14:55:25.459796 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1210 14:55:25.459833 PCI: 00:15.0 scanning...
1211 14:55:25.459875 scan_static_bus for PCI: 00:15.0
1212 14:55:25.459914 I2C: 00:1a enabled
1213 14:55:25.459951 I2C: 00:31 enabled
1214 14:55:25.459989 I2C: 00:32 enabled
1215 14:55:25.460027 scan_static_bus for PCI: 00:15.0 done
1216 14:55:25.460064 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1217 14:55:25.460102 PCI: 00:15.1 scanning...
1218 14:55:25.460139 scan_static_bus for PCI: 00:15.1
1219 14:55:25.460177 I2C: 00:50 enabled
1220 14:55:25.460216 scan_static_bus for PCI: 00:15.1 done
1221 14:55:25.460253 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1222 14:55:25.460291 PCI: 00:15.3 scanning...
1223 14:55:25.460329 scan_static_bus for PCI: 00:15.3
1224 14:55:25.460367 I2C: 00:10 enabled
1225 14:55:25.460405 scan_static_bus for PCI: 00:15.3 done
1226 14:55:25.460443 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1227 14:55:25.460484 PCI: 00:19.1 scanning...
1228 14:55:25.460522 scan_static_bus for PCI: 00:19.1
1229 14:55:25.460561 I2C: 00:15 enabled
1230 14:55:25.460599 I2C: 00:2c enabled
1231 14:55:25.460637 scan_static_bus for PCI: 00:19.1 done
1232 14:55:25.460674 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1233 14:55:25.460713 PCI: 00:1e.3 scanning...
1234 14:55:25.460750 scan_generic_bus for PCI: 00:1e.3
1235 14:55:25.460788 SPI: 00 enabled
1236 14:55:25.461007 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1237 14:55:25.461053 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1238 14:55:25.461094 PCI: 00:1f.0 scanning...
1239 14:55:25.461133 scan_static_bus for PCI: 00:1f.0
1240 14:55:25.461172 PNP: 0c09.0 enabled
1241 14:55:25.461211 PNP: 0c09.0 scanning...
1242 14:55:25.461250 scan_static_bus for PNP: 0c09.0
1243 14:55:25.461288 scan_static_bus for PNP: 0c09.0 done
1244 14:55:25.461326 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1245 14:55:25.461364 scan_static_bus for PCI: 00:1f.0 done
1246 14:55:25.461402 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1247 14:55:25.461441 PCI: 00:1f.2 scanning...
1248 14:55:25.461479 scan_static_bus for PCI: 00:1f.2
1249 14:55:25.461518 GENERIC: 0.0 enabled
1250 14:55:25.461555 GENERIC: 0.0 scanning...
1251 14:55:25.461593 scan_static_bus for GENERIC: 0.0
1252 14:55:25.461630 GENERIC: 0.0 enabled
1253 14:55:25.461668 GENERIC: 1.0 enabled
1254 14:55:25.461708 scan_static_bus for GENERIC: 0.0 done
1255 14:55:25.461747 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1256 14:55:25.461785 scan_static_bus for PCI: 00:1f.2 done
1257 14:55:25.461823 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1258 14:55:25.461862 PCI: 00:1f.3 scanning...
1259 14:55:25.461900 scan_static_bus for PCI: 00:1f.3
1260 14:55:25.461937 scan_static_bus for PCI: 00:1f.3 done
1261 14:55:25.461976 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1262 14:55:25.462015 PCI: 00:1f.5 scanning...
1263 14:55:25.462052 scan_generic_bus for PCI: 00:1f.5
1264 14:55:25.462090 scan_generic_bus for PCI: 00:1f.5 done
1265 14:55:25.462128 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1266 14:55:25.462167 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1267 14:55:25.462205 scan_static_bus for Root Device done
1268 14:55:25.462243 scan_bus: bus Root Device finished in 729 msecs
1269 14:55:25.462281 done
1270 14:55:25.462320 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1271 14:55:25.462360 Chrome EC: UHEPI supported
1272 14:55:25.462397 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1273 14:55:25.462436 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1274 14:55:25.462475 SPI flash protection: WPSW=0 SRP0=0
1275 14:55:25.462514 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1276 14:55:25.462552 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1277 14:55:25.462591 found VGA at PCI: 00:02.0
1278 14:55:25.462629 Setting up VGA for PCI: 00:02.0
1279 14:55:25.462667 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1280 14:55:25.462706 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1281 14:55:25.462744 Allocating resources...
1282 14:55:25.462782 Reading resources...
1283 14:55:25.462820 Root Device read_resources bus 0 link: 0
1284 14:55:25.462858 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1285 14:55:25.462895 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1286 14:55:25.462934 DOMAIN: 0000 read_resources bus 0 link: 0
1287 14:55:25.462972 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1288 14:55:25.463010 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1289 14:55:25.463049 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1290 14:55:25.463087 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1291 14:55:25.463125 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1292 14:55:25.463174 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1293 14:55:25.463213 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1294 14:55:25.463251 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1295 14:55:25.463289 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1296 14:55:25.463327 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1297 14:55:25.463366 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1298 14:55:25.463404 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1299 14:55:25.463443 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1300 14:55:25.463482 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1301 14:55:25.463521 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1302 14:55:25.463560 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1303 14:55:25.463598 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1304 14:55:25.463636 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1305 14:55:25.463675 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1306 14:55:25.463713 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1307 14:55:25.463753 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1308 14:55:25.463791 PCI: 00:04.0 read_resources bus 1 link: 0
1309 14:55:25.463830 PCI: 00:04.0 read_resources bus 1 link: 0 done
1310 14:55:25.463878 PCI: 00:06.0 read_resources bus 1 link: 0
1311 14:55:25.463918 PCI: 00:06.0 read_resources bus 1 link: 0 done
1312 14:55:25.463957 PCI: 00:0d.0 read_resources bus 0 link: 0
1313 14:55:25.463995 USB0 port 0 read_resources bus 0 link: 0
1314 14:55:25.464033 USB0 port 0 read_resources bus 0 link: 0 done
1315 14:55:25.464072 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1316 14:55:25.464109 PCI: 00:14.0 read_resources bus 0 link: 0
1317 14:55:25.464148 USB0 port 0 read_resources bus 0 link: 0
1318 14:55:25.464187 USB0 port 0 read_resources bus 0 link: 0 done
1319 14:55:25.464225 PCI: 00:14.0 read_resources bus 0 link: 0 done
1320 14:55:25.464263 PCI: 00:14.3 read_resources bus 0 link: 0
1321 14:55:25.464302 PCI: 00:14.3 read_resources bus 0 link: 0 done
1322 14:55:25.464340 PCI: 00:15.0 read_resources bus 0 link: 0
1323 14:55:25.464378 PCI: 00:15.0 read_resources bus 0 link: 0 done
1324 14:55:25.464416 PCI: 00:15.1 read_resources bus 0 link: 0
1325 14:55:25.464633 PCI: 00:15.1 read_resources bus 0 link: 0 done
1326 14:55:25.464680 PCI: 00:15.3 read_resources bus 0 link: 0
1327 14:55:25.464721 PCI: 00:15.3 read_resources bus 0 link: 0 done
1328 14:55:25.464760 PCI: 00:19.1 read_resources bus 0 link: 0
1329 14:55:25.464798 PCI: 00:19.1 read_resources bus 0 link: 0 done
1330 14:55:25.464836 PCI: 00:1e.3 read_resources bus 2 link: 0
1331 14:55:25.464875 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1332 14:55:25.464913 PCI: 00:1f.0 read_resources bus 0 link: 0
1333 14:55:25.464951 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1334 14:55:25.464989 PCI: 00:1f.2 read_resources bus 0 link: 0
1335 14:55:25.465028 GENERIC: 0.0 read_resources bus 0 link: 0
1336 14:55:25.465066 GENERIC: 0.0 read_resources bus 0 link: 0 done
1337 14:55:25.465105 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1338 14:55:25.465144 DOMAIN: 0000 read_resources bus 0 link: 0 done
1339 14:55:25.465182 Root Device read_resources bus 0 link: 0 done
1340 14:55:25.465221 Done reading resources.
1341 14:55:25.465259 Show resources in subtree (Root Device)...After reading.
1342 14:55:25.465297 Root Device child on link 0 CPU_CLUSTER: 0
1343 14:55:25.465335 CPU_CLUSTER: 0 child on link 0 APIC: 00
1344 14:55:25.465373 APIC: 00
1345 14:55:25.465412 APIC: 12
1346 14:55:25.465449 APIC: 14
1347 14:55:25.465487 APIC: 16
1348 14:55:25.465525 APIC: 10
1349 14:55:25.465563 APIC: 09
1350 14:55:25.465601 APIC: 08
1351 14:55:25.465639 APIC: 01
1352 14:55:25.465677 DOMAIN: 0000 child on link 0 GPIO: 0
1353 14:55:25.465715 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1354 14:55:25.465754 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1355 14:55:25.465792 GPIO: 0
1356 14:55:25.465831 PCI: 00:00.0
1357 14:55:25.465869 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1358 14:55:25.465907 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1359 14:55:25.465946 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1360 14:55:25.465984 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1361 14:55:25.466022 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1362 14:55:25.466070 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1363 14:55:25.466112 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1364 14:55:25.466151 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1365 14:55:25.466190 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1366 14:55:25.466228 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1367 14:55:25.466266 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1368 14:55:25.466306 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1369 14:55:25.466344 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1370 14:55:25.466383 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1371 14:55:25.466421 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1372 14:55:25.466460 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1373 14:55:25.466500 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1374 14:55:25.466539 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1375 14:55:25.466577 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1376 14:55:25.466616 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1377 14:55:25.466656 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1378 14:55:25.466694 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1379 14:55:25.466732 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1380 14:55:25.466770 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1381 14:55:25.466809 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1382 14:55:25.466847 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1383 14:55:25.466887 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1384 14:55:25.466925 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1385 14:55:25.466964 PCI: 00:02.0
1386 14:55:25.467003 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1387 14:55:25.467222 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1388 14:55:25.467268 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1389 14:55:25.467308 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1390 14:55:25.467347 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1391 14:55:25.467386 GENERIC: 0.0
1392 14:55:25.467425 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1393 14:55:25.467464 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1394 14:55:25.467503 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1395 14:55:25.467541 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1396 14:55:25.467581 PCI: 01:00.0
1397 14:55:25.467618 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1398 14:55:25.467656 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1399 14:55:25.467694 PCI: 00:08.0
1400 14:55:25.467731 PCI: 00:0a.0
1401 14:55:25.467770 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1402 14:55:25.467809 PCI: 00:0d.0 child on link 0 USB0 port 0
1403 14:55:25.467847 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1404 14:55:25.467896 USB0 port 0 child on link 0 USB3 port 0
1405 14:55:25.467937 USB3 port 0
1406 14:55:25.467975 USB3 port 1
1407 14:55:25.468013 USB3 port 2
1408 14:55:25.468050 USB3 port 3
1409 14:55:25.468088 PCI: 00:14.0 child on link 0 USB0 port 0
1410 14:55:25.468126 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1411 14:55:25.468164 USB0 port 0 child on link 0 USB2 port 0
1412 14:55:25.468202 USB2 port 0
1413 14:55:25.468239 USB2 port 1
1414 14:55:25.468277 USB2 port 2
1415 14:55:25.468315 USB2 port 3
1416 14:55:25.468353 USB2 port 4
1417 14:55:25.468389 USB2 port 5
1418 14:55:25.468427 USB2 port 6
1419 14:55:25.468465 USB2 port 7
1420 14:55:25.468502 USB2 port 8
1421 14:55:25.468540 USB2 port 9
1422 14:55:25.468578 USB3 port 0
1423 14:55:25.468615 USB3 port 1
1424 14:55:25.468653 USB3 port 2
1425 14:55:25.468691 USB3 port 3
1426 14:55:25.468728 PCI: 00:14.2
1427 14:55:25.468765 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1428 14:55:25.468803 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1429 14:55:25.468842 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1430 14:55:25.468880 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1431 14:55:25.468918 GENERIC: 0.0
1432 14:55:25.468955 PCI: 00:15.0 child on link 0 I2C: 00:1a
1433 14:55:25.468993 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1434 14:55:25.469032 I2C: 00:1a
1435 14:55:25.469069 I2C: 00:31
1436 14:55:25.469106 I2C: 00:32
1437 14:55:25.469143 PCI: 00:15.1 child on link 0 I2C: 00:50
1438 14:55:25.469181 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1439 14:55:25.469220 I2C: 00:50
1440 14:55:25.469258 PCI: 00:15.2
1441 14:55:25.469295 PCI: 00:15.3 child on link 0 I2C: 00:10
1442 14:55:25.469334 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1443 14:55:25.469373 I2C: 00:10
1444 14:55:25.469411 PCI: 00:16.0
1445 14:55:25.469449 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1446 14:55:25.469499 PCI: 00:19.0
1447 14:55:25.469538 PCI: 00:19.1 child on link 0 I2C: 00:15
1448 14:55:25.469576 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1449 14:55:25.469614 I2C: 00:15
1450 14:55:25.469652 I2C: 00:2c
1451 14:55:25.469690 PCI: 00:1e.0
1452 14:55:25.469728 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1453 14:55:25.469767 PCI: 00:1e.3 child on link 0 SPI: 00
1454 14:55:25.469805 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1455 14:55:25.469843 SPI: 00
1456 14:55:25.469880 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1457 14:55:25.469919 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1458 14:55:25.469957 PNP: 0c09.0
1459 14:55:25.469995 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1460 14:55:25.470033 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1461 14:55:25.470070 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1462 14:55:25.470109 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1463 14:55:25.470147 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1464 14:55:25.470185 GENERIC: 0.0
1465 14:55:25.470224 GENERIC: 1.0
1466 14:55:25.470262 PCI: 00:1f.3
1467 14:55:25.470300 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1468 14:55:25.470338 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1469 14:55:25.470376 PCI: 00:1f.5
1470 14:55:25.470591 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1471 14:55:25.470638 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1472 14:55:25.470680 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1473 14:55:25.470720 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1474 14:55:25.470760 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1475 14:55:25.470799 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1476 14:55:25.470837 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1477 14:55:25.470876 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1478 14:55:25.470915 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1479 14:55:25.470953 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1480 14:55:25.470991 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1481 14:55:25.471029 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1482 14:55:25.471068 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1483 14:55:25.471107 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1484 14:55:25.471145 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1485 14:55:25.471183 DOMAIN: 0000: Resource ranges:
1486 14:55:25.471220 * Base: 1000, Size: 800, Tag: 100
1487 14:55:25.471261 * Base: 1900, Size: e700, Tag: 100
1488 14:55:25.471298 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1489 14:55:25.471336 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1490 14:55:25.471374 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1491 14:55:25.471412 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1492 14:55:25.471451 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1493 14:55:25.471489 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1494 14:55:25.471527 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1495 14:55:25.471566 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1496 14:55:25.471604 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1497 14:55:25.471643 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1498 14:55:25.471681 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1499 14:55:25.471719 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1500 14:55:25.471757 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1501 14:55:25.471795 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1502 14:55:25.471833 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1503 14:55:25.471876 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1504 14:55:25.471915 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1505 14:55:25.471953 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1506 14:55:25.471991 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1507 14:55:25.472029 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1508 14:55:25.472066 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1509 14:55:25.472104 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1510 14:55:25.472142 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1511 14:55:25.472180 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1512 14:55:25.472219 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1513 14:55:25.472258 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1514 14:55:25.472297 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1515 14:55:25.472335 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1516 14:55:25.472373 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1517 14:55:25.472412 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1518 14:55:25.472450 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1519 14:55:25.472489 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1520 14:55:25.472528 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1521 14:55:25.472566 DOMAIN: 0000: Resource ranges:
1522 14:55:25.472604 * Base: 80400000, Size: 3fc00000, Tag: 200
1523 14:55:25.472642 * Base: d0000000, Size: 28000000, Tag: 200
1524 14:55:25.472680 * Base: fa000000, Size: 1000000, Tag: 200
1525 14:55:25.472718 * Base: fb001000, Size: 17ff000, Tag: 200
1526 14:55:25.472756 * Base: fe800000, Size: 300000, Tag: 200
1527 14:55:25.472794 * Base: feb80000, Size: 80000, Tag: 200
1528 14:55:25.472832 * Base: fed00000, Size: 40000, Tag: 200
1529 14:55:25.472871 * Base: fed70000, Size: 10000, Tag: 200
1530 14:55:25.473086 * Base: fed88000, Size: 8000, Tag: 200
1531 14:55:25.473133 * Base: fed93000, Size: d000, Tag: 200
1532 14:55:25.473172 * Base: feda2000, Size: 1e000, Tag: 200
1533 14:55:25.473211 * Base: fede0000, Size: 1220000, Tag: 200
1534 14:55:25.473249 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1535 14:55:25.473288 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1536 14:55:25.473327 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1537 14:55:25.473366 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1538 14:55:25.473406 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1539 14:55:25.473444 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1540 14:55:25.473483 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1541 14:55:25.473521 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1542 14:55:25.473560 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1543 14:55:25.473597 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1544 14:55:25.473636 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1545 14:55:25.473675 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1546 14:55:25.473712 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1547 14:55:25.473753 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1548 14:55:25.473790 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1549 14:55:25.473828 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1550 14:55:25.473867 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1551 14:55:25.473907 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1552 14:55:25.473945 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1553 14:55:25.473984 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1554 14:55:25.474023 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1555 14:55:25.474062 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1556 14:55:25.474101 PCI: 00:06.0: Resource ranges:
1557 14:55:25.474140 * Base: 80400000, Size: 100000, Tag: 200
1558 14:55:25.474179 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1559 14:55:25.474218 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1560 14:55:25.474257 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1561 14:55:25.474296 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1562 14:55:25.474335 Root Device assign_resources, bus 0 link: 0
1563 14:55:25.474373 DOMAIN: 0000 assign_resources, bus 0 link: 0
1564 14:55:25.474411 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1565 14:55:25.474449 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1566 14:55:25.474489 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1567 14:55:25.474528 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1568 14:55:25.474565 PCI: 00:04.0 assign_resources, bus 1 link: 0
1569 14:55:25.474603 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1570 14:55:25.474641 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1571 14:55:25.474678 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1572 14:55:25.474716 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1573 14:55:25.474754 PCI: 00:06.0 assign_resources, bus 1 link: 0
1574 14:55:25.474793 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1575 14:55:25.474832 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1576 14:55:25.474870 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1577 14:55:25.474908 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1578 14:55:25.474945 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1579 14:55:25.474982 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1580 14:55:25.475020 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1581 14:55:25.475057 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1582 14:55:25.475095 PCI: 00:14.0 assign_resources, bus 0 link: 0
1583 14:55:25.475133 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1584 14:55:25.475170 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1585 14:55:25.475208 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1586 14:55:25.475247 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1587 14:55:25.475284 PCI: 00:14.3 assign_resources, bus 0 link: 0
1588 14:55:25.475322 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1589 14:55:25.475359 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1590 14:55:25.475398 PCI: 00:15.0 assign_resources, bus 0 link: 0
1591 14:55:25.475436 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1592 14:55:25.475651 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1593 14:55:25.475696 PCI: 00:15.1 assign_resources, bus 0 link: 0
1594 14:55:25.475737 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1595 14:55:25.475775 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1596 14:55:25.475815 PCI: 00:15.3 assign_resources, bus 0 link: 0
1597 14:55:25.475863 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1598 14:55:25.475904 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1599 14:55:25.475943 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1600 14:55:25.475982 PCI: 00:19.1 assign_resources, bus 0 link: 0
1601 14:55:25.476020 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1602 14:55:25.476058 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1603 14:55:25.476096 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1604 14:55:25.476134 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1605 14:55:25.476172 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1606 14:55:25.476210 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1607 14:55:25.476249 LPC: Trying to open IO window from 800 size 1ff
1608 14:55:25.476287 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1609 14:55:25.476329 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1610 14:55:25.476368 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1611 14:55:25.476407 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1612 14:55:25.476446 Root Device assign_resources, bus 0 link: 0 done
1613 14:55:25.476484 Done setting resources.
1614 14:55:25.476522 Show resources in subtree (Root Device)...After assigning values.
1615 14:55:25.476570 Root Device child on link 0 CPU_CLUSTER: 0
1616 14:55:25.476609 CPU_CLUSTER: 0 child on link 0 APIC: 00
1617 14:55:25.476647 APIC: 00
1618 14:55:25.476686 APIC: 12
1619 14:55:25.476724 APIC: 14
1620 14:55:25.476761 APIC: 16
1621 14:55:25.476798 APIC: 10
1622 14:55:25.476834 APIC: 09
1623 14:55:25.476872 APIC: 08
1624 14:55:25.476909 APIC: 01
1625 14:55:25.476946 DOMAIN: 0000 child on link 0 GPIO: 0
1626 14:55:25.476985 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1627 14:55:25.477023 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1628 14:55:25.477061 GPIO: 0
1629 14:55:25.477099 PCI: 00:00.0
1630 14:55:25.477138 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1631 14:55:25.477177 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1632 14:55:25.477216 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1633 14:55:25.477255 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1634 14:55:25.477293 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1635 14:55:25.477332 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1636 14:55:25.477371 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1637 14:55:25.477410 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1638 14:55:25.477448 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1639 14:55:25.477487 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1640 14:55:25.477525 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1641 14:55:25.477564 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1642 14:55:25.477603 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1643 14:55:25.477641 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1644 14:55:25.477681 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1645 14:55:25.477720 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1646 14:55:25.477759 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1647 14:55:25.477797 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1648 14:55:25.477836 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1649 14:55:25.477874 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1650 14:55:25.477913 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1651 14:55:25.477952 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1652 14:55:25.477990 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1653 14:55:25.478205 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1654 14:55:25.478250 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1655 14:55:25.478290 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1656 14:55:25.478329 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1657 14:55:25.478367 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1658 14:55:25.478406 PCI: 00:02.0
1659 14:55:25.478444 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1660 14:55:25.478483 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1661 14:55:25.478522 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1662 14:55:25.478561 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1663 14:55:25.478600 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1664 14:55:25.478638 GENERIC: 0.0
1665 14:55:25.478675 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1666 14:55:25.478714 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1667 14:55:25.478752 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1668 14:55:25.478792 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1669 14:55:25.478830 PCI: 01:00.0
1670 14:55:25.478869 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1671 14:55:25.478909 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1672 14:55:25.478948 PCI: 00:08.0
1673 14:55:25.478986 PCI: 00:0a.0
1674 14:55:25.479024 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1675 14:55:25.479063 PCI: 00:0d.0 child on link 0 USB0 port 0
1676 14:55:25.479101 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1677 14:55:25.479139 USB0 port 0 child on link 0 USB3 port 0
1678 14:55:25.479177 USB3 port 0
1679 14:55:25.479215 USB3 port 1
1680 14:55:25.479251 USB3 port 2
1681 14:55:25.479290 USB3 port 3
1682 14:55:25.479328 PCI: 00:14.0 child on link 0 USB0 port 0
1683 14:55:25.479366 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1684 14:55:25.479405 USB0 port 0 child on link 0 USB2 port 0
1685 14:55:25.479444 USB2 port 0
1686 14:55:25.479492 USB2 port 1
1687 14:55:25.479530 USB2 port 2
1688 14:55:25.479568 USB2 port 3
1689 14:55:25.479605 USB2 port 4
1690 14:55:25.479643 USB2 port 5
1691 14:55:25.479680 USB2 port 6
1692 14:55:25.479719 USB2 port 7
1693 14:55:25.479757 USB2 port 8
1694 14:55:25.479794 USB2 port 9
1695 14:55:25.479833 USB3 port 0
1696 14:55:25.479877 USB3 port 1
1697 14:55:25.479917 USB3 port 2
1698 14:55:25.479954 USB3 port 3
1699 14:55:25.479992 PCI: 00:14.2
1700 14:55:25.480030 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1701 14:55:25.480069 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1702 14:55:25.480107 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1703 14:55:25.480146 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1704 14:55:25.480184 GENERIC: 0.0
1705 14:55:25.480222 PCI: 00:15.0 child on link 0 I2C: 00:1a
1706 14:55:25.480261 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1707 14:55:25.480299 I2C: 00:1a
1708 14:55:25.480337 I2C: 00:31
1709 14:55:25.480375 I2C: 00:32
1710 14:55:25.480414 PCI: 00:15.1 child on link 0 I2C: 00:50
1711 14:55:25.480453 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1712 14:55:25.480490 I2C: 00:50
1713 14:55:25.480527 PCI: 00:15.2
1714 14:55:25.480566 PCI: 00:15.3 child on link 0 I2C: 00:10
1715 14:55:25.480604 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1716 14:55:25.480643 I2C: 00:10
1717 14:55:25.480681 PCI: 00:16.0
1718 14:55:25.480720 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1719 14:55:25.480758 PCI: 00:19.0
1720 14:55:25.480796 PCI: 00:19.1 child on link 0 I2C: 00:15
1721 14:55:25.480834 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1722 14:55:25.480873 I2C: 00:15
1723 14:55:25.480911 I2C: 00:2c
1724 14:55:25.480949 PCI: 00:1e.0
1725 14:55:25.480987 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1726 14:55:25.481025 PCI: 00:1e.3 child on link 0 SPI: 00
1727 14:55:25.481063 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1728 14:55:25.481102 SPI: 00
1729 14:55:25.481141 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1730 14:55:25.481180 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1731 14:55:25.481220 PNP: 0c09.0
1732 14:55:25.481434 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1733 14:55:25.481479 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1734 14:55:25.481519 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1735 14:55:25.481560 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1736 14:55:25.481599 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1737 14:55:25.481637 GENERIC: 0.0
1738 14:55:25.481675 GENERIC: 1.0
1739 14:55:25.481713 PCI: 00:1f.3
1740 14:55:25.481755 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1741 14:55:25.481801 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1742 14:55:25.481841 PCI: 00:1f.5
1743 14:55:25.481879 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1744 14:55:25.481917 Done allocating resources.
1745 14:55:25.481955 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1746 14:55:25.481994 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1747 14:55:25.482033 Configure audio over I2S with MAX98373 NAU88L25B.
1748 14:55:25.482071 Enabling BT offload
1749 14:55:25.482109 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1750 14:55:25.482147 Enabling resources...
1751 14:55:25.482184 PCI: 00:00.0 subsystem <- 8086/4609
1752 14:55:25.482222 PCI: 00:00.0 cmd <- 06
1753 14:55:25.482260 PCI: 00:02.0 subsystem <- 8086/46b3
1754 14:55:25.482298 PCI: 00:02.0 cmd <- 03
1755 14:55:25.482335 PCI: 00:04.0 subsystem <- 8086/461d
1756 14:55:25.482373 PCI: 00:04.0 cmd <- 02
1757 14:55:25.482410 PCI: 00:06.0 bridge ctrl <- 0013
1758 14:55:25.482447 PCI: 00:06.0 subsystem <- 8086/464d
1759 14:55:25.482485 PCI: 00:06.0 cmd <- 106
1760 14:55:25.482524 PCI: 00:0a.0 subsystem <- 8086/467d
1761 14:55:25.482563 PCI: 00:0a.0 cmd <- 02
1762 14:55:25.482602 PCI: 00:0d.0 subsystem <- 8086/461e
1763 14:55:25.482639 PCI: 00:0d.0 cmd <- 02
1764 14:55:25.482677 PCI: 00:14.0 subsystem <- 8086/51ed
1765 14:55:25.482726 PCI: 00:14.0 cmd <- 02
1766 14:55:25.482765 PCI: 00:14.2 subsystem <- 8086/51ef
1767 14:55:25.482804 PCI: 00:14.2 cmd <- 02
1768 14:55:25.482842 PCI: 00:14.3 subsystem <- 8086/51f0
1769 14:55:25.482880 PCI: 00:14.3 cmd <- 02
1770 14:55:25.628422 PCI: 00:15.0 subsystem <- 8086/51e8
1771 14:55:25.628794 PCI: 00:15.0 cmd <- 02
1772 14:55:25.629010 PCI: 00:15.1 subsystem <- 8086/51e9
1773 14:55:25.629206 PCI: 00:15.1 cmd <- 06
1774 14:55:25.629392 PCI: 00:15.3 subsystem <- 8086/51eb
1775 14:55:25.629574 PCI: 00:15.3 cmd <- 02
1776 14:55:25.629749 PCI: 00:16.0 subsystem <- 8086/51e0
1777 14:55:25.629925 PCI: 00:16.0 cmd <- 02
1778 14:55:25.630101 PCI: 00:19.1 subsystem <- 8086/51c6
1779 14:55:25.630285 PCI: 00:19.1 cmd <- 02
1780 14:55:25.630483 PCI: 00:1e.0 subsystem <- 8086/51a8
1781 14:55:25.630662 PCI: 00:1e.0 cmd <- 06
1782 14:55:25.630840 PCI: 00:1e.3 subsystem <- 8086/51ab
1783 14:55:25.631019 PCI: 00:1e.3 cmd <- 02
1784 14:55:25.631196 PCI: 00:1f.0 subsystem <- 8086/5182
1785 14:55:25.631368 PCI: 00:1f.0 cmd <- 407
1786 14:55:25.631542 PCI: 00:1f.3 subsystem <- 8086/51c8
1787 14:55:25.631718 PCI: 00:1f.3 cmd <- 02
1788 14:55:25.631921 PCI: 00:1f.5 subsystem <- 8086/51a4
1789 14:55:25.632104 PCI: 00:1f.5 cmd <- 406
1790 14:55:25.632276 PCI: 01:00.0 cmd <- 02
1791 14:55:25.632530 done.
1792 14:55:25.632716 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1793 14:55:25.632896 ME: Version: Unavailable
1794 14:55:25.633076 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1795 14:55:25.633255 Initializing devices...
1796 14:55:25.633430 Root Device init
1797 14:55:25.633604 mainboard: EC init
1798 14:55:25.633777 Chrome EC: Set SMI mask to 0x0000000000000000
1799 14:55:25.633955 Chrome EC: clear events_b mask to 0x0000000000000000
1800 14:55:25.634131 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1801 14:55:25.634312 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1802 14:55:25.634524 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1803 14:55:25.634725 Chrome EC: Set WAKE mask to 0x0000000000000000
1804 14:55:25.634902 Root Device init finished in 39 msecs
1805 14:55:25.635079 PCI: 00:00.0 init
1806 14:55:25.635251 CPU TDP = 15 Watts
1807 14:55:25.635431 CPU PL1 = 15 Watts
1808 14:55:25.635607 CPU PL2 = 55 Watts
1809 14:55:25.635780 CPU PL4 = 123 Watts
1810 14:55:25.635989 PCI: 00:00.0 init finished in 8 msecs
1811 14:55:25.636173 PCI: 00:02.0 init
1812 14:55:25.636352 GMA: Found VBT in CBFS
1813 14:55:25.636546 GMA: Found valid VBT in CBFS
1814 14:55:25.636721 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1815 14:55:25.636900 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1816 14:55:25.637079 PCI: 00:02.0 init finished in 18 msecs
1817 14:55:25.637256 PCI: 00:06.0 init
1818 14:55:25.637431 Initializing PCH PCIe bridge.
1819 14:55:25.637601 PCI: 00:06.0 init finished in 3 msecs
1820 14:55:25.637776 PCI: 00:0a.0 init
1821 14:55:25.637952 PCI: 00:0a.0 init finished in 0 msecs
1822 14:55:25.638130 PCI: 00:14.0 init
1823 14:55:25.638307 PCI: 00:14.0 init finished in 0 msecs
1824 14:55:25.638499 PCI: 00:14.2 init
1825 14:55:25.638674 PCI: 00:14.2 init finished in 0 msecs
1826 14:55:25.638853 PCI: 00:15.0 init
1827 14:55:25.639027 I2C bus 0 version 0x3230302a
1828 14:55:25.639202 DW I2C bus 0 at 0x80655000 (400 KHz)
1829 14:55:25.639378 PCI: 00:15.0 init finished in 6 msecs
1830 14:55:25.639551 PCI: 00:15.1 init
1831 14:55:25.639724 I2C bus 1 version 0x3230302a
1832 14:55:25.639924 DW I2C bus 1 at 0x80656000 (400 KHz)
1833 14:55:25.640107 PCI: 00:15.1 init finished in 6 msecs
1834 14:55:25.640285 PCI: 00:15.3 init
1835 14:55:25.640528 I2C bus 3 version 0x3230302a
1836 14:55:25.640714 DW I2C bus 3 at 0x80657000 (400 KHz)
1837 14:55:25.640893 PCI: 00:15.3 init finished in 6 msecs
1838 14:55:25.641069 PCI: 00:16.0 init
1839 14:55:25.641245 PCI: 00:16.0 init finished in 0 msecs
1840 14:55:25.641422 PCI: 00:19.1 init
1841 14:55:25.641611 I2C bus 5 version 0x3230302a
1842 14:55:25.641759 DW I2C bus 5 at 0x80659000 (400 KHz)
1843 14:55:25.641906 PCI: 00:19.1 init finished in 6 msecs
1844 14:55:25.642053 PCI: 00:1f.0 init
1845 14:55:25.642528 IOAPIC: Initializing IOAPIC at 0xfec00000
1846 14:55:25.642715 IOAPIC: ID = 0x02
1847 14:55:25.642868 IOAPIC: Dumping registers
1848 14:55:25.643022 reg 0x0000: 0x02000000
1849 14:55:25.643174 reg 0x0001: 0x00770020
1850 14:55:25.643322 reg 0x0002: 0x00000000
1851 14:55:25.643471 IOAPIC: 120 interrupts
1852 14:55:25.643620 IOAPIC: Clearing IOAPIC at 0xfec00000
1853 14:55:25.643768 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1854 14:55:25.643952 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1855 14:55:25.644107 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1856 14:55:25.644259 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1857 14:55:25.644442 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1858 14:55:25.644601 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1859 14:55:25.644752 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1860 14:55:25.644886 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1861 14:55:25.644995 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1862 14:55:25.645105 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1863 14:55:25.645218 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1864 14:55:25.645326 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1865 14:55:25.645438 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1866 14:55:25.645546 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1867 14:55:25.645653 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1868 14:55:25.645761 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1869 14:55:25.645890 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1870 14:55:25.646006 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1871 14:55:25.646119 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1872 14:55:25.646232 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1873 14:55:25.646342 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1874 14:55:25.646487 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1875 14:55:25.646631 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1876 14:55:25.646817 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1877 14:55:25.646935 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1878 14:55:25.646974 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1879 14:55:25.647012 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1880 14:55:25.647049 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1881 14:55:25.647086 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1882 14:55:25.647123 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1883 14:55:25.647160 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1884 14:55:25.647197 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1885 14:55:25.647234 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1886 14:55:25.647270 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1887 14:55:25.647308 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1888 14:55:25.647345 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1889 14:55:25.647383 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1890 14:55:25.647421 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1891 14:55:25.647459 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1892 14:55:25.647497 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1893 14:55:25.647535 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1894 14:55:25.647573 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1895 14:55:25.647611 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1896 14:55:25.647648 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1897 14:55:25.647686 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1898 14:55:25.647723 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1899 14:55:25.647761 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1900 14:55:25.647799 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1901 14:55:25.647836 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1902 14:55:25.647900 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1903 14:55:25.647939 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1904 14:55:25.647977 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1905 14:55:25.648016 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1906 14:55:25.648054 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1907 14:55:25.648091 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1908 14:55:25.648130 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1909 14:55:25.648168 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1910 14:55:25.648206 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1911 14:55:25.648244 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1912 14:55:25.648283 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1913 14:55:25.648321 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1914 14:55:25.648359 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1915 14:55:25.648401 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1916 14:55:25.648473 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1917 14:55:25.648515 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1918 14:55:25.648554 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1919 14:55:25.648593 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1920 14:55:25.648631 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1921 14:55:25.648669 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1922 14:55:25.648707 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1923 14:55:25.648745 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1924 14:55:25.648783 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1925 14:55:25.648821 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1926 14:55:25.648860 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1927 14:55:25.648898 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1928 14:55:25.648936 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1929 14:55:25.648973 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1930 14:55:25.649011 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1931 14:55:25.649048 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1932 14:55:25.649273 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1933 14:55:25.649322 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1934 14:55:25.649364 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1935 14:55:25.649403 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1936 14:55:25.649442 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1937 14:55:25.649480 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1938 14:55:25.649519 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1939 14:55:25.649557 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1940 14:55:25.649596 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1941 14:55:25.649635 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1942 14:55:25.649675 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1943 14:55:25.649713 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1944 14:55:25.649751 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1945 14:55:25.649790 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1946 14:55:25.649829 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1947 14:55:25.649868 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1948 14:55:25.649906 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1949 14:55:25.649946 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1950 14:55:25.649988 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1951 14:55:25.650025 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1952 14:55:25.650063 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1953 14:55:25.650101 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1954 14:55:25.650140 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1955 14:55:25.650178 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1956 14:55:25.650216 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1957 14:55:25.650254 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1958 14:55:25.650292 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1959 14:55:25.650330 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1960 14:55:25.650368 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1961 14:55:25.650411 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1962 14:55:25.650455 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1963 14:55:25.650495 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1964 14:55:25.650534 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1965 14:55:25.650572 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1966 14:55:25.650610 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1967 14:55:25.650648 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1968 14:55:25.650686 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1969 14:55:25.650724 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1970 14:55:25.650761 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1971 14:55:25.650799 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1972 14:55:25.650837 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1973 14:55:25.650876 IOAPIC: Bootstrap Processor Local APIC = 0x00
1974 14:55:25.650914 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1975 14:55:25.650953 PCI: 00:1f.0 init finished in 607 msecs
1976 14:55:25.650991 PCI: 00:1f.2 init
1977 14:55:25.651028 apm_control: Disabling ACPI.
1978 14:55:25.651066 APMC done.
1979 14:55:25.651104 PCI: 00:1f.2 init finished in 8 msecs
1980 14:55:25.651142 PCI: 00:1f.3 init
1981 14:55:25.651181 PCI: 00:1f.3 init finished in 0 msecs
1982 14:55:25.651220 PCI: 01:00.0 init
1983 14:55:25.651258 PCI: 01:00.0 init finished in 0 msecs
1984 14:55:25.651296 PNP: 0c09.0 init
1985 14:55:25.651334 Google Chrome EC uptime: 10.906 seconds
1986 14:55:25.651372 Google Chrome AP resets since EC boot: 0
1987 14:55:25.651411 Google Chrome most recent AP reset causes:
1988 14:55:25.651450 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1989 14:55:25.651489 PNP: 0c09.0 init finished in 19 msecs
1990 14:55:25.651527 GENERIC: 0.0 init
1991 14:55:25.651565 GENERIC: 0.0 init finished in 0 msecs
1992 14:55:25.651603 GENERIC: 1.0 init
1993 14:55:25.651640 GENERIC: 1.0 init finished in 0 msecs
1994 14:55:25.651679 Devices initialized
1995 14:55:25.651717 Show all devs... After init.
1996 14:55:25.651754 Root Device: enabled 1
1997 14:55:25.651792 CPU_CLUSTER: 0: enabled 1
1998 14:55:25.651830 DOMAIN: 0000: enabled 1
1999 14:55:25.651874 GPIO: 0: enabled 1
2000 14:55:25.651913 PCI: 00:00.0: enabled 1
2001 14:55:25.651950 PCI: 00:01.0: enabled 0
2002 14:55:25.651989 PCI: 00:01.1: enabled 0
2003 14:55:25.652027 PCI: 00:02.0: enabled 1
2004 14:55:25.652065 PCI: 00:04.0: enabled 1
2005 14:55:25.652103 PCI: 00:05.0: enabled 0
2006 14:55:25.652142 PCI: 00:06.0: enabled 1
2007 14:55:25.652180 PCI: 00:06.2: enabled 0
2008 14:55:25.652217 PCI: 00:07.0: enabled 0
2009 14:55:25.652255 PCI: 00:07.1: enabled 0
2010 14:55:25.652292 PCI: 00:07.2: enabled 0
2011 14:55:25.652329 PCI: 00:07.3: enabled 0
2012 14:55:25.652366 PCI: 00:08.0: enabled 0
2013 14:55:25.652408 PCI: 00:09.0: enabled 0
2014 14:55:25.652476 PCI: 00:0a.0: enabled 1
2015 14:55:25.652542 PCI: 00:0d.0: enabled 1
2016 14:55:25.652585 PCI: 00:0d.1: enabled 0
2017 14:55:25.652626 PCI: 00:0d.2: enabled 0
2018 14:55:25.652665 PCI: 00:0d.3: enabled 0
2019 14:55:25.652704 PCI: 00:0e.0: enabled 0
2020 14:55:25.652742 PCI: 00:10.0: enabled 0
2021 14:55:25.652780 PCI: 00:10.1: enabled 0
2022 14:55:25.652817 PCI: 00:10.6: enabled 0
2023 14:55:25.652855 PCI: 00:10.7: enabled 0
2024 14:55:25.652893 PCI: 00:12.0: enabled 0
2025 14:55:25.652931 PCI: 00:12.6: enabled 0
2026 14:55:25.652969 PCI: 00:12.7: enabled 0
2027 14:55:25.653007 PCI: 00:13.0: enabled 0
2028 14:55:25.653045 PCI: 00:14.0: enabled 1
2029 14:55:25.653084 PCI: 00:14.1: enabled 0
2030 14:55:25.653123 PCI: 00:14.2: enabled 1
2031 14:55:25.653161 PCI: 00:14.3: enabled 1
2032 14:55:25.653200 PCI: 00:15.0: enabled 1
2033 14:55:25.653238 PCI: 00:15.1: enabled 1
2034 14:55:25.653276 PCI: 00:15.2: enabled 0
2035 14:55:25.653313 PCI: 00:15.3: enabled 1
2036 14:55:25.653351 PCI: 00:16.0: enabled 1
2037 14:55:25.653390 PCI: 00:16.1: enabled 0
2038 14:55:25.653429 PCI: 00:16.2: enabled 0
2039 14:55:25.653467 PCI: 00:16.3: enabled 0
2040 14:55:25.653506 PCI: 00:16.4: enabled 0
2041 14:55:25.653543 PCI: 00:16.5: enabled 0
2042 14:55:25.653582 PCI: 00:17.0: enabled 0
2043 14:55:25.653620 PCI: 00:19.0: enabled 0
2044 14:55:25.653657 PCI: 00:19.1: enabled 1
2045 14:55:25.653698 PCI: 00:19.2: enabled 0
2046 14:55:25.653735 PCI: 00:1a.0: enabled 0
2047 14:55:25.653773 PCI: 00:1c.0: enabled 0
2048 14:55:25.653811 PCI: 00:1c.1: enabled 0
2049 14:55:25.654028 PCI: 00:1c.2: enabled 0
2050 14:55:25.654074 PCI: 00:1c.3: enabled 0
2051 14:55:25.654113 PCI: 00:1c.4: enabled 0
2052 14:55:25.654153 PCI: 00:1c.5: enabled 0
2053 14:55:25.654204 PCI: 00:1c.6: enabled 0
2054 14:55:25.654241 PCI: 00:1c.7: enabled 0
2055 14:55:25.654279 PCI: 00:1d.0: enabled 0
2056 14:55:25.654316 PCI: 00:1d.1: enabled 0
2057 14:55:25.654352 PCI: 00:1d.2: enabled 0
2058 14:55:25.654389 PCI: 00:1d.3: enabled 0
2059 14:55:25.654427 PCI: 00:1e.0: enabled 1
2060 14:55:25.654464 PCI: 00:1e.1: enabled 0
2061 14:55:25.654502 PCI: 00:1e.2: enabled 0
2062 14:55:25.654540 PCI: 00:1e.3: enabled 1
2063 14:55:25.654578 PCI: 00:1f.0: enabled 1
2064 14:55:25.654615 PCI: 00:1f.1: enabled 0
2065 14:55:25.654653 PCI: 00:1f.2: enabled 1
2066 14:55:25.654690 PCI: 00:1f.3: enabled 1
2067 14:55:25.654729 PCI: 00:1f.4: enabled 0
2068 14:55:25.654767 PCI: 00:1f.5: enabled 1
2069 14:55:25.654803 PCI: 00:1f.6: enabled 0
2070 14:55:25.654841 PCI: 00:1f.7: enabled 0
2071 14:55:25.654878 GENERIC: 0.0: enabled 1
2072 14:55:25.654914 GENERIC: 0.0: enabled 1
2073 14:55:25.654951 GENERIC: 1.0: enabled 1
2074 14:55:25.654988 GENERIC: 0.0: enabled 1
2075 14:55:25.655024 GENERIC: 1.0: enabled 1
2076 14:55:25.655061 USB0 port 0: enabled 1
2077 14:55:25.655099 USB0 port 0: enabled 1
2078 14:55:25.655135 GENERIC: 0.0: enabled 1
2079 14:55:25.655171 I2C: 00:1a: enabled 1
2080 14:55:25.655208 I2C: 00:31: enabled 1
2081 14:55:25.655244 I2C: 00:32: enabled 1
2082 14:55:25.655281 I2C: 00:50: enabled 1
2083 14:55:25.655319 I2C: 00:10: enabled 1
2084 14:55:25.655356 I2C: 00:15: enabled 1
2085 14:55:25.655393 I2C: 00:2c: enabled 1
2086 14:55:25.655429 GENERIC: 0.0: enabled 1
2087 14:55:25.655466 SPI: 00: enabled 1
2088 14:55:25.655502 PNP: 0c09.0: enabled 1
2089 14:55:25.655538 GENERIC: 0.0: enabled 1
2090 14:55:25.655575 USB3 port 0: enabled 1
2091 14:55:25.655611 USB3 port 1: enabled 0
2092 14:55:25.655648 USB3 port 2: enabled 1
2093 14:55:25.655685 USB3 port 3: enabled 0
2094 14:55:25.655722 USB2 port 0: enabled 1
2095 14:55:25.655759 USB2 port 1: enabled 0
2096 14:55:25.655795 USB2 port 2: enabled 1
2097 14:55:25.655832 USB2 port 3: enabled 0
2098 14:55:25.655874 USB2 port 4: enabled 0
2099 14:55:25.655929 USB2 port 5: enabled 1
2100 14:55:25.655979 USB2 port 6: enabled 0
2101 14:55:25.656017 USB2 port 7: enabled 0
2102 14:55:25.656054 USB2 port 8: enabled 1
2103 14:55:25.656092 USB2 port 9: enabled 1
2104 14:55:25.656133 USB3 port 0: enabled 1
2105 14:55:25.656176 USB3 port 1: enabled 0
2106 14:55:25.656236 USB3 port 2: enabled 0
2107 14:55:25.656274 USB3 port 3: enabled 0
2108 14:55:25.656325 GENERIC: 0.0: enabled 1
2109 14:55:25.656362 GENERIC: 1.0: enabled 1
2110 14:55:25.656399 APIC: 00: enabled 1
2111 14:55:25.656436 APIC: 12: enabled 1
2112 14:55:25.656473 APIC: 14: enabled 1
2113 14:55:25.656511 APIC: 16: enabled 1
2114 14:55:25.656549 APIC: 10: enabled 1
2115 14:55:25.656587 APIC: 09: enabled 1
2116 14:55:25.656624 APIC: 08: enabled 1
2117 14:55:25.656661 APIC: 01: enabled 1
2118 14:55:25.656698 PCI: 01:00.0: enabled 1
2119 14:55:25.656735 BS: BS_DEV_INIT run times (exec / console): 14 / 1126 ms
2120 14:55:25.656773 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2121 14:55:25.656811 ELOG: NV offset 0xf20000 size 0x4000
2122 14:55:25.656848 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2123 14:55:25.656886 ELOG: Event(17) added with size 13 at 2024-06-13 14:55:24 UTC
2124 14:55:25.656924 ELOG: Event(92) added with size 9 at 2024-06-13 14:55:24 UTC
2125 14:55:25.656963 ELOG: Event(93) added with size 9 at 2024-06-13 14:55:24 UTC
2126 14:55:25.657001 ELOG: Event(9E) added with size 10 at 2024-06-13 14:55:24 UTC
2127 14:55:25.657039 ELOG: Event(9F) added with size 14 at 2024-06-13 14:55:24 UTC
2128 14:55:25.657077 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2129 14:55:25.657115 ELOG: Event(A1) added with size 10 at 2024-06-13 14:55:24 UTC
2130 14:55:25.657152 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2131 14:55:25.657190 ELOG: Event(A0) added with size 9 at 2024-06-13 14:55:24 UTC
2132 14:55:25.657228 elog_add_boot_reason: Logged dev mode boot
2133 14:55:25.657264 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2134 14:55:25.657302 Finalize devices...
2135 14:55:25.657339 PCI: 00:16.0 final
2136 14:55:25.657376 PCI: 00:1f.2 final
2137 14:55:25.657414 GENERIC: 0.0 final
2138 14:55:25.657451 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2139 14:55:25.657488 GENERIC: 1.0 final
2140 14:55:25.657525 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2141 14:55:25.657562 Devices finalized
2142 14:55:25.657599 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2143 14:55:25.657636 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2144 14:55:25.657673 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2145 14:55:25.657712 ME: HFSTS1 : 0x80030045
2146 14:55:25.657750 ME: HFSTS2 : 0x30280116
2147 14:55:25.657788 ME: HFSTS3 : 0x00000050
2148 14:55:25.657826 ME: HFSTS4 : 0x00004000
2149 14:55:25.657863 ME: HFSTS5 : 0x00000000
2150 14:55:25.657902 ME: HFSTS6 : 0x40400006
2151 14:55:25.657939 ME: Manufacturing Mode : YES
2152 14:55:25.657977 ME: SPI Protection Mode Enabled : YES
2153 14:55:25.658014 ME: FPFs Committed : YES
2154 14:55:25.658052 ME: Manufacturing Vars Locked : NO
2155 14:55:25.658089 ME: FW Partition Table : OK
2156 14:55:25.658125 ME: Bringup Loader Failure : NO
2157 14:55:25.658163 ME: Firmware Init Complete : NO
2158 14:55:25.658200 ME: Boot Options Present : NO
2159 14:55:25.658237 ME: Update In Progress : NO
2160 14:55:25.658283 ME: D0i3 Support : YES
2161 14:55:25.658321 ME: Low Power State Enabled : NO
2162 14:55:25.658358 ME: CPU Replaced : YES
2163 14:55:25.658395 ME: CPU Replacement Valid : YES
2164 14:55:25.658432 ME: Current Working State : 5
2165 14:55:25.658469 ME: Current Operation State : 1
2166 14:55:25.658506 ME: Current Operation Mode : 3
2167 14:55:25.658543 ME: Error Code : 0
2168 14:55:25.658580 ME: Enhanced Debug Mode : NO
2169 14:55:25.658617 ME: CPU Debug Disabled : YES
2170 14:55:25.658654 ME: TXT Support : NO
2171 14:55:25.658691 ME: WP for RO is enabled : YES
2172 14:55:25.658906 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2173 14:55:25.658981 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2174 14:55:25.659021 ELOG: Event(91) added with size 10 at 2024-06-13 14:55:24 UTC
2175 14:55:25.659060 Chrome EC: clear events_b mask to 0x0000000020004000
2176 14:55:25.659097 Ramoops buffer: 0x100000@0x7689a000.
2177 14:55:25.659135 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2178 14:55:25.659173 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2179 14:55:25.659211 CBFS: 'fallback/slic' not found.
2180 14:55:25.659248 ACPI: Writing ACPI tables at 7686e000.
2181 14:55:25.659285 ACPI: * FACS
2182 14:55:25.659322 ACPI: * DSDT
2183 14:55:25.659360 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2184 14:55:25.659397 ACPI: * FADT
2185 14:55:25.659436 SCI is IRQ9
2186 14:55:25.659474 ACPI: added table 1/32, length now 40
2187 14:55:25.659512 ACPI: * SSDT
2188 14:55:25.659550 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2189 14:55:25.659588 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2190 14:55:25.659626 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2191 14:55:25.659664 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2192 14:55:25.659702 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2193 14:55:25.659741 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2194 14:55:25.659778 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2195 14:55:25.659816 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2196 14:55:25.659858 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2197 14:55:25.659914 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2198 14:55:25.659966 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2199 14:55:25.660004 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2200 14:55:25.660041 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2201 14:55:25.660079 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2202 14:55:25.660117 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2203 14:55:25.660154 PS2K: Passing 80 keymaps to kernel
2204 14:55:25.660192 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2205 14:55:25.660229 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2206 14:55:25.660270 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2207 14:55:25.660337 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2208 14:55:25.660377 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2209 14:55:25.660416 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2210 14:55:25.660455 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2211 14:55:25.660493 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2212 14:55:25.660545 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2213 14:55:25.660583 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2214 14:55:25.660620 ACPI: added table 2/32, length now 44
2215 14:55:25.660658 ACPI: * MCFG
2216 14:55:25.660695 ACPI: added table 3/32, length now 48
2217 14:55:25.660733 ACPI: * TPM2
2218 14:55:25.660772 TPM2 log created at 0x7685e000
2219 14:55:25.660811 ACPI: added table 4/32, length now 52
2220 14:55:25.660848 ACPI: * LPIT
2221 14:55:25.660886 ACPI: added table 5/32, length now 56
2222 14:55:25.660922 ACPI: * MADT
2223 14:55:25.660959 SCI is IRQ9
2224 14:55:25.660998 ACPI: added table 6/32, length now 60
2225 14:55:25.661036 cmd_reg from pmc_make_ipc_cmd 1052838
2226 14:55:25.661074 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2227 14:55:25.661112 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2228 14:55:25.661150 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2229 14:55:25.661187 PMC CrashLog size in discovery mode: 0xC00
2230 14:55:25.661225 cpu crashlog bar addr: 0x80640000
2231 14:55:25.661262 cpu discovery table offset: 0x6030
2232 14:55:25.661300 cpu_crashlog_discovery_table buffer count: 0x3
2233 14:55:25.661338 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2234 14:55:25.661377 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2235 14:55:25.661416 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2236 14:55:25.661453 PMC crashLog size in discovery mode : 0xC00
2237 14:55:25.661492 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2238 14:55:25.661529 discover mode PMC crashlog size adjusted to: 0x200
2239 14:55:25.661566 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2240 14:55:25.661604 discover mode PMC crashlog size adjusted to: 0x0
2241 14:55:25.661641 m_cpu_crashLog_size : 0x3480 bytes
2242 14:55:25.661679 CPU crashLog present.
2243 14:55:25.661716 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2244 14:55:25.661754 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2245 14:55:25.661792 current = 76877550
2246 14:55:25.661829 ACPI: * DMAR
2247 14:55:25.661866 ACPI: added table 7/32, length now 64
2248 14:55:25.661903 ACPI: added table 8/32, length now 68
2249 14:55:25.661940 ACPI: * HPET
2250 14:55:25.661978 ACPI: added table 9/32, length now 72
2251 14:55:25.662014 ACPI: done.
2252 14:55:25.662051 ACPI tables: 38528 bytes.
2253 14:55:25.662088 smbios_write_tables: 76858000
2254 14:55:25.662125 EC returned error result code 3
2255 14:55:25.662162 Couldn't obtain OEM name from CBI
2256 14:55:25.662199 Create SMBIOS type 16
2257 14:55:25.662242 Create SMBIOS type 17
2258 14:55:25.662302 Create SMBIOS type 20
2259 14:55:25.662350 GENERIC: 0.0 (WIFI Device)
2260 14:55:25.662419 SMBIOS tables: 2156 bytes.
2261 14:55:25.662460 Writing table forward entry at 0x00000500
2262 14:55:25.662536 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2263 14:55:25.662592 Writing coreboot table at 0x76892000
2264 14:55:25.662630 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2265 14:55:25.662878 1. 0000000000001000-000000000009ffff: RAM
2266 14:55:25.662968 2. 00000000000a0000-00000000000fffff: RESERVED
2267 14:55:25.663023 3. 0000000000100000-0000000076857fff: RAM
2268 14:55:25.663062 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2269 14:55:25.663102 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2270 14:55:25.663140 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2271 14:55:25.663177 7. 0000000077000000-00000000803fffff: RESERVED
2272 14:55:25.663215 8. 00000000c0000000-00000000cfffffff: RESERVED
2273 14:55:25.663251 9. 00000000f8000000-00000000f9ffffff: RESERVED
2274 14:55:25.663288 10. 00000000fb000000-00000000fb000fff: RESERVED
2275 14:55:25.663326 11. 00000000fc800000-00000000fe7fffff: RESERVED
2276 14:55:25.663365 12. 00000000feb00000-00000000feb7ffff: RESERVED
2277 14:55:25.663403 13. 00000000fec00000-00000000fecfffff: RESERVED
2278 14:55:25.663442 14. 00000000fed40000-00000000fed6ffff: RESERVED
2279 14:55:25.663480 15. 00000000fed80000-00000000fed87fff: RESERVED
2280 14:55:25.663517 16. 00000000fed90000-00000000fed92fff: RESERVED
2281 14:55:25.663554 17. 00000000feda0000-00000000feda1fff: RESERVED
2282 14:55:25.663592 18. 00000000fedc0000-00000000feddffff: RESERVED
2283 14:55:25.663630 19. 0000000100000000-000000027fbfffff: RAM
2284 14:55:25.663668 Passing 4 GPIOs to payload:
2285 14:55:25.663729 NAME | PORT | POLARITY | VALUE
2286 14:55:25.663769 lid | undefined | high | high
2287 14:55:25.663820 power | undefined | high | low
2288 14:55:25.663878 oprom | undefined | high | low
2289 14:55:25.663921 EC in RW | 0x00000151 | high | low
2290 14:55:25.663988 Board ID: 3
2291 14:55:25.664051 FW config: 0x131
2292 14:55:25.664091 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 3291
2293 14:55:25.664141 coreboot table: 1764 bytes.
2294 14:55:25.664190 IMD ROOT 0. 0x76fff000 0x00001000
2295 14:55:25.664232 IMD SMALL 1. 0x76ffe000 0x00001000
2296 14:55:25.664295 FSP MEMORY 2. 0x76afe000 0x00500000
2297 14:55:25.664343 CONSOLE 3. 0x76ade000 0x00020000
2298 14:55:25.664383 RO MCACHE 4. 0x76add000 0x00000fd8
2299 14:55:25.664422 FMAP 5. 0x76adc000 0x0000064a
2300 14:55:25.664460 TIME STAMP 6. 0x76adb000 0x00000910
2301 14:55:25.664499 VBOOT WORK 7. 0x76ac7000 0x00014000
2302 14:55:25.664539 MEM INFO 8. 0x76ac6000 0x000003b8
2303 14:55:25.664578 ROMSTG STCK 9. 0x76ac5000 0x00001000
2304 14:55:25.664616 AFTER CAR 10. 0x76ab9000 0x0000c000
2305 14:55:25.664656 RAMSTAGE 11. 0x76a2f000 0x0008a000
2306 14:55:25.664694 ACPI BERT 12. 0x76a1f000 0x00010000
2307 14:55:25.664732 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2308 14:55:25.664776 REFCODE 14. 0x769af000 0x0006f000
2309 14:55:25.664814 SMM BACKUP 15. 0x7699f000 0x00010000
2310 14:55:25.664870 IGD OPREGION16. 0x7699a000 0x00004203
2311 14:55:25.664917 RAMOOPS 17. 0x7689a000 0x00100000
2312 14:55:25.664956 COREBOOT 18. 0x76892000 0x00008000
2313 14:55:25.665005 ACPI 19. 0x7686e000 0x00024000
2314 14:55:25.665054 TPM2 TCGLOG20. 0x7685e000 0x00010000
2315 14:55:25.665094 PMC CRASHLOG21. 0x7685d000 0x00000c00
2316 14:55:25.665133 CPU CRASHLOG22. 0x76859000 0x00003480
2317 14:55:25.665171 SMBIOS 23. 0x76858000 0x00001000
2318 14:55:25.665217 IMD small region:
2319 14:55:25.665259 IMD ROOT 0. 0x76ffec00 0x00000400
2320 14:55:25.665363 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2321 14:55:25.665405 VPD 2. 0x76ffeb80 0x00000058
2322 14:55:25.665448 POWER STATE 3. 0x76ffeb20 0x00000044
2323 14:55:25.665501 ROMSTAGE 4. 0x76ffeb00 0x00000004
2324 14:55:25.665542 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2325 14:55:25.665582 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2326 14:55:25.665621 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2327 14:55:25.665660 MTRR: Physical address space:
2328 14:55:25.665700 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2329 14:55:25.665740 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2330 14:55:25.665781 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2331 14:55:25.665820 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2332 14:55:25.665860 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2333 14:55:25.665899 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2334 14:55:25.665938 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2335 14:55:25.665982 MTRR: Fixed MSR 0x250 0x0606060606060606
2336 14:55:25.666022 MTRR: Fixed MSR 0x258 0x0606060606060606
2337 14:55:25.666066 MTRR: Fixed MSR 0x259 0x0000000000000000
2338 14:55:25.666119 MTRR: Fixed MSR 0x268 0x0606060606060606
2339 14:55:25.666160 MTRR: Fixed MSR 0x269 0x0606060606060606
2340 14:55:25.666199 MTRR: Fixed MSR 0x26a 0x0606060606060606
2341 14:55:25.666243 MTRR: Fixed MSR 0x26b 0x0606060606060606
2342 14:55:25.666284 MTRR: Fixed MSR 0x26c 0x0606060606060606
2343 14:55:25.666336 MTRR: Fixed MSR 0x26d 0x0606060606060606
2344 14:55:25.666383 MTRR: Fixed MSR 0x26e 0x0606060606060606
2345 14:55:25.666422 MTRR: Fixed MSR 0x26f 0x0606060606060606
2346 14:55:25.666474 call enable_fixed_mtrr()
2347 14:55:25.666521 CPU physical address size: 39 bits
2348 14:55:25.666567 MTRR: default type WB/UC MTRR counts: 6/6.
2349 14:55:25.666613 MTRR: UC selected as default type.
2350 14:55:25.666664 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2351 14:55:25.666705 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2352 14:55:25.666745 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2353 14:55:25.666797 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2354 14:55:25.666838 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2355 14:55:25.667077 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2356 14:55:25.667129 MTRR: Fixed MSR 0x250 0x0606060606060606
2357 14:55:25.667200 MTRR: Fixed MSR 0x258 0x0606060606060606
2358 14:55:25.667258 MTRR: Fixed MSR 0x259 0x0000000000000000
2359 14:55:25.667299 MTRR: Fixed MSR 0x268 0x0606060606060606
2360 14:55:25.667346 MTRR: Fixed MSR 0x269 0x0606060606060606
2361 14:55:25.667392 MTRR: Fixed MSR 0x26a 0x0606060606060606
2362 14:55:25.667446 MTRR: Fixed MSR 0x26b 0x0606060606060606
2363 14:55:25.667498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2364 14:55:25.667558 MTRR: Fixed MSR 0x26d 0x0606060606060606
2365 14:55:25.667606 MTRR: Fixed MSR 0x26e 0x0606060606060606
2366 14:55:25.667660 MTRR: Fixed MSR 0x26f 0x0606060606060606
2367 14:55:25.667701 MTRR: Fixed MSR 0x250 0x0606060606060606
2368 14:55:25.667742 MTRR: Fixed MSR 0x250 0x0606060606060606
2369 14:55:25.667786 call enable_fixed_mtrr()
2370 14:55:25.667859 MTRR: Fixed MSR 0x258 0x0606060606060606
2371 14:55:25.667906 MTRR: Fixed MSR 0x259 0x0000000000000000
2372 14:55:25.667946 MTRR: Fixed MSR 0x268 0x0606060606060606
2373 14:55:25.667986 MTRR: Fixed MSR 0x269 0x0606060606060606
2374 14:55:25.668047 MTRR: Fixed MSR 0x250 0x0606060606060606
2375 14:55:25.668090 MTRR: Fixed MSR 0x250 0x0606060606060606
2376 14:55:25.668130 MTRR: Fixed MSR 0x258 0x0606060606060606
2377 14:55:25.668175 MTRR: Fixed MSR 0x259 0x0000000000000000
2378 14:55:25.668214 MTRR: Fixed MSR 0x268 0x0606060606060606
2379 14:55:25.668253 MTRR: Fixed MSR 0x269 0x0606060606060606
2380 14:55:25.668292 MTRR: Fixed MSR 0x26a 0x0606060606060606
2381 14:55:25.668341 MTRR: Fixed MSR 0x26b 0x0606060606060606
2382 14:55:25.668387 MTRR: Fixed MSR 0x26c 0x0606060606060606
2383 14:55:25.668451 MTRR: Fixed MSR 0x26d 0x0606060606060606
2384 14:55:25.668500 MTRR: Fixed MSR 0x26e 0x0606060606060606
2385 14:55:25.668540 MTRR: Fixed MSR 0x26f 0x0606060606060606
2386 14:55:25.668579 CPU physical address size: 39 bits
2387 14:55:25.668618 MTRR: Fixed MSR 0x250 0x0606060606060606
2388 14:55:25.668677 MTRR: Fixed MSR 0x258 0x0606060606060606
2389 14:55:25.668742 MTRR: Fixed MSR 0x259 0x0000000000000000
2390 14:55:25.668799 MTRR: Fixed MSR 0x268 0x0606060606060606
2391 14:55:25.668840 MTRR: Fixed MSR 0x269 0x0606060606060606
2392 14:55:25.668878 MTRR: Fixed MSR 0x258 0x0606060606060606
2393 14:55:25.668917 call enable_fixed_mtrr()
2394 14:55:25.668965 MTRR: Fixed MSR 0x26a 0x0606060606060606
2395 14:55:25.669024 MTRR: Fixed MSR 0x26b 0x0606060606060606
2396 14:55:25.669082 MTRR: Fixed MSR 0x26c 0x0606060606060606
2397 14:55:25.669148 MTRR: Fixed MSR 0x26d 0x0606060606060606
2398 14:55:25.669209 MTRR: Fixed MSR 0x26e 0x0606060606060606
2399 14:55:25.669250 MTRR: Fixed MSR 0x26f 0x0606060606060606
2400 14:55:25.669289 MTRR: Fixed MSR 0x259 0x0000000000000000
2401 14:55:25.669332 MTRR: Fixed MSR 0x258 0x0606060606060606
2402 14:55:25.669378 call enable_fixed_mtrr()
2403 14:55:25.669418 MTRR: Fixed MSR 0x250 0x0606060606060606
2404 14:55:25.669456 MTRR: Fixed MSR 0x268 0x0606060606060606
2405 14:55:25.669496 MTRR: Fixed MSR 0x269 0x0606060606060606
2406 14:55:25.669544 CPU physical address size: 39 bits
2407 14:55:25.669584 MTRR: Fixed MSR 0x259 0x0000000000000000
2408 14:55:25.669642 CPU physical address size: 39 bits
2409 14:55:25.669703 MTRR: Fixed MSR 0x268 0x0606060606060606
2410 14:55:25.669747 MTRR: Fixed MSR 0x26a 0x0606060606060606
2411 14:55:25.669787 MTRR: Fixed MSR 0x258 0x0606060606060606
2412 14:55:25.669834 MTRR: Fixed MSR 0x269 0x0606060606060606
2413 14:55:25.669886 MTRR: Fixed MSR 0x259 0x0000000000000000
2414 14:55:25.669939 MTRR: Fixed MSR 0x268 0x0606060606060606
2415 14:55:25.669979 MTRR: Fixed MSR 0x269 0x0606060606060606
2416 14:55:25.670017 MTRR: Fixed MSR 0x26a 0x0606060606060606
2417 14:55:25.670068 MTRR: Fixed MSR 0x26b 0x0606060606060606
2418 14:55:25.670109 MTRR: Fixed MSR 0x26c 0x0606060606060606
2419 14:55:25.670148 MTRR: Fixed MSR 0x26d 0x0606060606060606
2420 14:55:25.670196 MTRR: Fixed MSR 0x26e 0x0606060606060606
2421 14:55:25.670257 MTRR: Fixed MSR 0x26f 0x0606060606060606
2422 14:55:25.670314 MTRR: Fixed MSR 0x26b 0x0606060606060606
2423 14:55:25.670357 call enable_fixed_mtrr()
2424 14:55:25.670396 MTRR: Fixed MSR 0x26a 0x0606060606060606
2425 14:55:25.670447 MTRR: Fixed MSR 0x26c 0x0606060606060606
2426 14:55:25.670506 MTRR: Fixed MSR 0x26d 0x0606060606060606
2427 14:55:25.670550 MTRR: Fixed MSR 0x26e 0x0606060606060606
2428 14:55:25.670590 MTRR: Fixed MSR 0x26f 0x0606060606060606
2429 14:55:25.670628 MTRR: Fixed MSR 0x26b 0x0606060606060606
2430 14:55:25.670666 call enable_fixed_mtrr()
2431 14:55:25.670703 CPU physical address size: 39 bits
2432 14:55:25.670741 CPU physical address size: 39 bits
2433 14:55:25.670780 MTRR: Fixed MSR 0x26c 0x0606060606060606
2434 14:55:25.670827 MTRR: Fixed MSR 0x26a 0x0606060606060606
2435 14:55:25.670872 MTRR: Fixed MSR 0x26d 0x0606060606060606
2436 14:55:25.670912 MTRR: Fixed MSR 0x26e 0x0606060606060606
2437 14:55:25.670961 MTRR: Fixed MSR 0x26f 0x0606060606060606
2438 14:55:25.671000 MTRR: Fixed MSR 0x26b 0x0606060606060606
2439 14:55:25.671049 call enable_fixed_mtrr()
2440 14:55:25.671090 MTRR: Fixed MSR 0x26c 0x0606060606060606
2441 14:55:25.671129 MTRR: Fixed MSR 0x26d 0x0606060606060606
2442 14:55:25.671167 MTRR: Fixed MSR 0x26e 0x0606060606060606
2443 14:55:25.671213 MTRR: Fixed MSR 0x26f 0x0606060606060606
2444 14:55:25.671255 CPU physical address size: 39 bits
2445 14:55:25.671295 call enable_fixed_mtrr()
2446 14:55:25.671333 CPU physical address size: 39 bits
2447 14:55:25.671372
2448 14:55:25.671419 MTRR check
2449 14:55:25.671459 Fixed MTRRs : Enabled
2450 14:55:25.671498 Variable MTRRs: Enabled
2451 14:55:25.671536
2452 14:55:25.671575 BS: BS_WRITE_TABLES exit times (exec / console): 245 / 150 ms
2453 14:55:25.671619 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2454 14:55:25.671671 Checking segment from ROM address 0xffc26dac
2455 14:55:25.671711 Checking segment from ROM address 0xffc26dc8
2456 14:55:25.671749 Loading segment from ROM address 0xffc26dac
2457 14:55:25.671800 code (compression=1)
2458 14:55:25.672051 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2459 14:55:25.672102 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2460 14:55:25.672142 using LZMA
2461 14:55:25.675485 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2462 14:55:25.682143 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2463 14:55:25.690445 Loading segment from ROM address 0xffc26dc8
2464 14:55:25.694156 Entry Point 0x30000000
2465 14:55:25.694227 Loaded segments
2466 14:55:25.700523 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2467 14:55:25.707627 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2468 14:55:25.710600 Finalizing chipset.
2469 14:55:25.713769 apm_control: Finalizing SMM.
2470 14:55:25.714058 APMC done.
2471 14:55:25.717235 HECI: CSE device 16.0 is hidden
2472 14:55:25.720352 HECI: CSE device 16.1 is disabled
2473 14:55:25.724246 HECI: CSE device 16.2 is disabled
2474 14:55:25.727709 HECI: CSE device 16.3 is disabled
2475 14:55:25.730680 HECI: CSE device 16.4 is disabled
2476 14:55:25.734128 HECI: CSE device 16.5 is disabled
2477 14:55:25.737768 HECI: CSE device 16.0 is hidden
2478 14:55:25.744024 CSE is disabled, cannot send End-of-Post (EOP) message
2479 14:55:25.747256 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2480 14:55:25.750153 mp_park_aps done after 0 msecs.
2481 14:55:25.756763 Jumping to boot code at 0x30000000(0x76892000)
2482 14:55:25.766816 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2483 14:55:25.771498
2484 14:55:25.771962
2485 14:55:25.772200
2486 14:55:25.774244 Starting depthcharge on Volmar...
2487 14:55:25.774566
2488 14:55:25.775330 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2489 14:55:25.775654 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2490 14:55:25.775954 Setting prompt string to ['brya:']
2491 14:55:25.776207 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2492 14:55:25.781073 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2493 14:55:25.781479
2494 14:55:25.787450 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2495 14:55:25.787772
2496 14:55:25.793821 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2497 14:55:25.794236
2498 14:55:25.797763 configure_storage: Failed to remap 1C:2
2499 14:55:25.798172
2500 14:55:25.800482 Wipe memory regions:
2501 14:55:25.800800
2502 14:55:25.803949 [0x00000000001000, 0x000000000a0000)
2503 14:55:25.804270
2504 14:55:25.807140 [0x00000000100000, 0x00000030000000)
2505 14:55:25.920903
2506 14:55:25.923819 [0x00000032668e60, 0x00000076858000)
2507 14:55:26.084063
2508 14:55:26.087454 [0x00000100000000, 0x0000027fc00000)
2509 14:55:26.984168
2510 14:55:26.987234 ec_init: CrosEC protocol v3 supported (256, 256)
2511 14:55:27.595171
2512 14:55:27.595298 R8152: Initializing
2513 14:55:27.595351
2514 14:55:27.598466 Version 9 (ocp_data = 6010)
2515 14:55:27.598539
2516 14:55:27.601768 R8152: Done initializing
2517 14:55:27.601826
2518 14:55:27.605112 Adding net device
2519 14:55:27.907091
2520 14:55:27.909906 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2521 14:55:27.909970
2522 14:55:27.910017
2523 14:55:27.910263 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2525 14:55:28.010543 brya: tftpboot 192.168.201.1 14331358/tftp-deploy-qk9zo130/kernel/bzImage 14331358/tftp-deploy-qk9zo130/kernel/cmdline 14331358/tftp-deploy-qk9zo130/ramdisk/ramdisk.cpio.gz
2526 14:55:28.010730 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2527 14:55:28.010803 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2528 14:55:28.014791 tftpboot 192.168.201.1 14331358/tftp-deploy-qk9zo130/kernel/bzImloy-qk9zo130/kernel/cmdline 14331358/tftp-deploy-qk9zo130/ramdisk/ramdisk.cpio.gz
2529 14:55:28.014866
2530 14:55:28.014913 Waiting for link
2531 14:55:28.217220
2532 14:55:28.217334 done.
2533 14:55:28.217403
2534 14:55:28.217450 MAC: 00:e0:4c:68:02:ef
2535 14:55:28.217498
2536 14:55:28.220447 Sending DHCP discover... done.
2537 14:55:28.220513
2538 14:55:28.223903 Waiting for reply... done.
2539 14:55:28.223958
2540 14:55:28.227583 Sending DHCP request... done.
2541 14:55:28.227642
2542 14:55:28.234068 Waiting for reply... done.
2543 14:55:28.234146
2544 14:55:28.234189 My ip is 192.168.201.16
2545 14:55:28.234233
2546 14:55:28.237038 The DHCP server ip is 192.168.201.1
2547 14:55:28.237109
2548 14:55:28.243818 TFTP server IP predefined by user: 192.168.201.1
2549 14:55:28.243905
2550 14:55:28.250232 Bootfile predefined by user: 14331358/tftp-deploy-qk9zo130/kernel/bzImage
2551 14:55:28.250315
2552 14:55:28.254159 Sending tftp read request... done.
2553 14:55:28.254236
2554 14:55:28.257250 Waiting for the transfer...
2555 14:55:28.257307
2556 14:55:28.488382 00000000 ################################################################
2557 14:55:28.488518
2558 14:55:28.717189 00080000 ################################################################
2559 14:55:28.717300
2560 14:55:28.942272 00100000 ################################################################
2561 14:55:28.942399
2562 14:55:29.172230 00180000 ################################################################
2563 14:55:29.172354
2564 14:55:29.399661 00200000 ################################################################
2565 14:55:29.399784
2566 14:55:29.628592 00280000 ################################################################
2567 14:55:29.628751
2568 14:55:29.855419 00300000 ################################################################
2569 14:55:29.855546
2570 14:55:30.083709 00380000 ################################################################
2571 14:55:30.083840
2572 14:55:30.313190 00400000 ################################################################
2573 14:55:30.313300
2574 14:55:30.538514 00480000 ################################################################
2575 14:55:30.538641
2576 14:55:30.764450 00500000 ################################################################
2577 14:55:30.764578
2578 14:55:30.993547 00580000 ################################################################
2579 14:55:30.993673
2580 14:55:31.223721 00600000 ################################################################
2581 14:55:31.223867
2582 14:55:31.453166 00680000 ################################################################
2583 14:55:31.453310
2584 14:55:31.681030 00700000 ################################################################
2585 14:55:31.681158
2586 14:55:31.907666 00780000 ################################################################
2587 14:55:31.907798
2588 14:55:32.135561 00800000 ################################################################
2589 14:55:32.135689
2590 14:55:32.362612 00880000 ################################################################
2591 14:55:32.362752
2592 14:55:32.592530 00900000 ################################################################
2593 14:55:32.592656
2594 14:55:32.821104 00980000 ################################################################
2595 14:55:32.821247
2596 14:55:33.048412 00a00000 ################################################################
2597 14:55:33.048534
2598 14:55:33.278162 00a80000 ################################################################
2599 14:55:33.278290
2600 14:55:33.505600 00b00000 ################################################################
2601 14:55:33.505734
2602 14:55:33.734632 00b80000 ################################################################
2603 14:55:33.734750
2604 14:55:33.964355 00c00000 ################################################################
2605 14:55:33.964461
2606 14:55:34.191485 00c80000 ################################################################
2607 14:55:34.191631
2608 14:55:34.420163 00d00000 ################################################################
2609 14:55:34.420269
2610 14:55:34.663069 00d80000 ################################################################
2611 14:55:34.663185
2612 14:55:34.896761 00e00000 ################################################################
2613 14:55:34.896884
2614 14:55:35.122934 00e80000 ################################################################
2615 14:55:35.123075
2616 14:55:35.351063 00f00000 ################################################################
2617 14:55:35.351190
2618 14:55:35.583156 00f80000 ################################################################
2619 14:55:35.583273
2620 14:55:35.813639 01000000 ################################################################
2621 14:55:35.813765
2622 14:55:36.042113 01080000 ################################################################
2623 14:55:36.042242
2624 14:55:36.271579 01100000 ################################################################
2625 14:55:36.271704
2626 14:55:36.499949 01180000 ################################################################
2627 14:55:36.500071
2628 14:55:36.727897 01200000 ################################################################
2629 14:55:36.728025
2630 14:55:36.855109 01280000 #################################### done.
2631 14:55:36.855226
2632 14:55:36.858534 The bootfile was 19685696 bytes long.
2633 14:55:36.858607
2634 14:55:36.861487 Sending tftp read request... done.
2635 14:55:36.861564
2636 14:55:36.865157 Waiting for the transfer...
2637 14:55:36.865228
2638 14:55:37.096927 00000000 ################################################################
2639 14:55:37.097052
2640 14:55:37.326369 00080000 ################################################################
2641 14:55:37.326498
2642 14:55:37.557038 00100000 ################################################################
2643 14:55:37.557159
2644 14:55:37.787862 00180000 ################################################################
2645 14:55:37.787986
2646 14:55:38.013878 00200000 ################################################################
2647 14:55:38.013995
2648 14:55:38.237793 00280000 ################################################################
2649 14:55:38.237919
2650 14:55:38.463363 00300000 ################################################################
2651 14:55:38.463483
2652 14:55:38.688700 00380000 ################################################################
2653 14:55:38.688818
2654 14:55:38.914759 00400000 ################################################################
2655 14:55:38.914876
2656 14:55:39.139864 00480000 ################################################################
2657 14:55:39.139992
2658 14:55:39.365414 00500000 ################################################################
2659 14:55:39.365532
2660 14:55:39.592928 00580000 ################################################################
2661 14:55:39.593048
2662 14:55:39.822047 00600000 ################################################################
2663 14:55:39.822172
2664 14:55:40.050911 00680000 ################################################################
2665 14:55:40.051034
2666 14:55:40.279543 00700000 ################################################################
2667 14:55:40.279674
2668 14:55:40.508045 00780000 ################################################################
2669 14:55:40.508186
2670 14:55:40.583838 00800000 ###################### done.
2671 14:55:40.586980
2672 14:55:40.590585 Sending tftp read request... done.
2673 14:55:40.590657
2674 14:55:40.590705 Waiting for the transfer...
2675 14:55:40.590749
2676 14:55:40.593979 00000000 # done.
2677 14:55:40.594056
2678 14:55:40.603656 Command line loaded dynamically from TFTP file: 14331358/tftp-deploy-qk9zo130/kernel/cmdline
2679 14:55:40.603736
2680 14:55:40.627649 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14331358/extract-nfsrootfs-ch3me6ys,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2681 14:55:40.636646
2682 14:55:40.640164 Shutting down all USB controllers.
2683 14:55:40.640591
2684 14:55:40.640828 Removing current net device
2685 14:55:40.641023
2686 14:55:40.642684 Finalizing coreboot
2687 14:55:40.643014
2688 14:55:40.649192 Exiting depthcharge with code 4 at timestamp: 24752472
2689 14:55:40.649541
2690 14:55:40.649765
2691 14:55:40.649961 Starting kernel ...
2692 14:55:40.650148
2693 14:55:40.650330
2694 14:55:40.651324 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2695 14:55:40.651645 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2696 14:55:40.651901 Setting prompt string to ['Linux version [0-9]']
2697 14:55:40.652127 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2698 14:55:40.652354 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2700 15:00:11.652311 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2702 15:00:11.653067 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2704 15:00:11.653584 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2707 15:00:11.654413 end: 2 depthcharge-action (duration 00:05:00) [common]
2709 15:00:11.655274 Cleaning after the job
2710 15:00:11.655566 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/ramdisk
2711 15:00:11.657168 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/kernel
2712 15:00:11.659142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/nfsrootfs
2713 15:00:11.682790 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14331358/tftp-deploy-qk9zo130/modules
2714 15:00:11.683977 start: 4.1 power-off (timeout 00:00:30) [common]
2715 15:00:11.684112 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-3', '--port=1', '--command=off']
2716 15:00:12.597386 >> Command sent successfully.
2717 15:00:12.605298 Returned 0 in 0 seconds
2718 15:00:12.705937 end: 4.1 power-off (duration 00:00:01) [common]
2720 15:00:12.707064 start: 4.2 read-feedback (timeout 00:09:59) [common]
2721 15:00:12.708009 Listened to connection for namespace 'common' for up to 1s
2723 15:00:12.709039 Listened to connection for namespace 'common' for up to 1s
2724 15:00:13.708110 Finalising connection for namespace 'common'
2725 15:00:13.708259 Disconnecting from shell: Finalise
2726 15:00:13.708323
2727 15:00:13.808644 end: 4.2 read-feedback (duration 00:00:01) [common]
2728 15:00:13.808786 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14331358
2729 15:00:13.914199 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14331358
2730 15:00:13.914371 JobError: Your job cannot terminate cleanly.