Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 11:50:47.028156 lava-dispatcher, installed at version: 2024.03
2 11:50:47.028338 start: 0 validate
3 11:50:47.028440 Start time: 2024-06-06 11:50:47.028432+00:00 (UTC)
4 11:50:47.028548 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:50:47.028665 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:50:47.289766 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:50:47.290376 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-554-gb39d14135501e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:50:54.800050 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:50:54.800749 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-554-gb39d14135501e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:50:55.067552 validate duration: 8.04
12 11:50:55.068542 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:50:55.068976 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:50:55.069381 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:50:55.069926 Not decompressing ramdisk as can be used compressed.
16 11:50:55.070299 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:50:55.070560 saving as /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/ramdisk/rootfs.cpio.gz
18 11:50:55.070803 total size: 8417901 (8 MB)
19 11:50:56.021809 progress 0 % (0 MB)
20 11:50:56.030024 progress 5 % (0 MB)
21 11:50:56.037028 progress 10 % (0 MB)
22 11:50:56.041241 progress 15 % (1 MB)
23 11:50:56.044097 progress 20 % (1 MB)
24 11:50:56.046199 progress 25 % (2 MB)
25 11:50:56.047705 progress 30 % (2 MB)
26 11:50:56.049123 progress 35 % (2 MB)
27 11:50:56.050639 progress 40 % (3 MB)
28 11:50:56.052089 progress 45 % (3 MB)
29 11:50:56.053684 progress 50 % (4 MB)
30 11:50:56.055165 progress 55 % (4 MB)
31 11:50:56.056672 progress 60 % (4 MB)
32 11:50:56.058081 progress 65 % (5 MB)
33 11:50:56.059544 progress 70 % (5 MB)
34 11:50:56.061049 progress 75 % (6 MB)
35 11:50:56.062558 progress 80 % (6 MB)
36 11:50:56.064003 progress 85 % (6 MB)
37 11:50:56.065456 progress 90 % (7 MB)
38 11:50:56.066874 progress 95 % (7 MB)
39 11:50:56.068249 progress 100 % (8 MB)
40 11:50:56.068418 8 MB downloaded in 1.00 s (8.05 MB/s)
41 11:50:56.068550 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:50:56.068731 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:50:56.068794 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:50:56.068854 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:50:56.068967 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-554-gb39d14135501e/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:50:56.069018 saving as /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/kernel/bzImage
48 11:50:56.069060 total size: 19692576 (18 MB)
49 11:50:56.069102 No compression specified
50 11:50:56.070080 progress 0 % (0 MB)
51 11:50:56.073467 progress 5 % (0 MB)
52 11:50:56.076816 progress 10 % (1 MB)
53 11:50:56.080234 progress 15 % (2 MB)
54 11:50:56.083555 progress 20 % (3 MB)
55 11:50:56.086868 progress 25 % (4 MB)
56 11:50:56.090207 progress 30 % (5 MB)
57 11:50:56.093842 progress 35 % (6 MB)
58 11:50:56.097101 progress 40 % (7 MB)
59 11:50:56.100367 progress 45 % (8 MB)
60 11:50:56.103622 progress 50 % (9 MB)
61 11:50:56.106871 progress 55 % (10 MB)
62 11:50:56.110108 progress 60 % (11 MB)
63 11:50:56.113359 progress 65 % (12 MB)
64 11:50:56.116597 progress 70 % (13 MB)
65 11:50:56.120039 progress 75 % (14 MB)
66 11:50:56.123340 progress 80 % (15 MB)
67 11:50:56.126620 progress 85 % (15 MB)
68 11:50:56.129853 progress 90 % (16 MB)
69 11:50:56.133066 progress 95 % (17 MB)
70 11:50:56.136289 progress 100 % (18 MB)
71 11:50:56.136489 18 MB downloaded in 0.07 s (278.54 MB/s)
72 11:50:56.136630 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:50:56.136806 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:50:56.136872 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:50:56.136929 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:50:56.137045 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-554-gb39d14135501e/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:50:56.137101 saving as /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/modules/modules.tar
79 11:50:56.137152 total size: 1624108 (1 MB)
80 11:50:56.137196 Using unxz to decompress xz
81 11:50:56.138429 progress 2 % (0 MB)
82 11:50:56.140088 progress 8 % (0 MB)
83 11:50:56.144866 progress 14 % (0 MB)
84 11:50:56.149704 progress 20 % (0 MB)
85 11:50:56.154678 progress 26 % (0 MB)
86 11:50:56.159374 progress 32 % (0 MB)
87 11:50:56.164610 progress 38 % (0 MB)
88 11:50:56.169634 progress 44 % (0 MB)
89 11:50:56.174540 progress 50 % (0 MB)
90 11:50:56.178677 progress 56 % (0 MB)
91 11:50:56.183560 progress 62 % (0 MB)
92 11:50:56.188880 progress 68 % (1 MB)
93 11:50:56.193980 progress 74 % (1 MB)
94 11:50:56.198343 progress 80 % (1 MB)
95 11:50:56.203780 progress 86 % (1 MB)
96 11:50:56.208681 progress 92 % (1 MB)
97 11:50:56.213716 progress 98 % (1 MB)
98 11:50:56.219952 1 MB downloaded in 0.08 s (18.71 MB/s)
99 11:50:56.220120 end: 1.3.1 http-download (duration 00:00:00) [common]
101 11:50:56.220343 end: 1.3 download-retry (duration 00:00:00) [common]
102 11:50:56.220415 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
103 11:50:56.220482 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
104 11:50:56.220540 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
105 11:50:56.220599 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
106 11:50:56.220755 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io
107 11:50:56.220854 makedir: /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin
108 11:50:56.220932 makedir: /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/tests
109 11:50:56.221006 makedir: /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/results
110 11:50:56.221083 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-add-keys
111 11:50:56.221207 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-add-sources
112 11:50:56.221316 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-background-process-start
113 11:50:56.221415 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-background-process-stop
114 11:50:56.221511 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-common-functions
115 11:50:56.221603 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-echo-ipv4
116 11:50:56.221691 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-install-packages
117 11:50:56.221777 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-installed-packages
118 11:50:56.221863 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-os-build
119 11:50:56.221951 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-probe-channel
120 11:50:56.222038 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-probe-ip
121 11:50:56.222125 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-target-ip
122 11:50:56.222210 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-target-mac
123 11:50:56.222295 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-target-storage
124 11:50:56.222397 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-case
125 11:50:56.222482 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-event
126 11:50:56.222566 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-feedback
127 11:50:56.222650 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-raise
128 11:50:56.222738 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-reference
129 11:50:56.222826 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-runner
130 11:50:56.222912 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-set
131 11:50:56.222996 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-test-shell
132 11:50:56.223082 Updating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-install-packages (oe)
133 11:50:56.223195 Updating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/bin/lava-installed-packages (oe)
134 11:50:56.223282 Creating /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/environment
135 11:50:56.223351 LAVA metadata
136 11:50:56.223406 - LAVA_JOB_ID=14202278
137 11:50:56.223452 - LAVA_DISPATCHER_IP=192.168.201.1
138 11:50:56.223526 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
139 11:50:56.223573 skipped lava-vland-overlay
140 11:50:56.223627 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
141 11:50:56.223685 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
142 11:50:56.223729 skipped lava-multinode-overlay
143 11:50:56.223779 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
144 11:50:56.223834 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
145 11:50:56.223885 Loading test definitions
146 11:50:56.223945 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
147 11:50:56.223993 Using /lava-14202278 at stage 0
148 11:50:56.224224 uuid=14202278_1.4.2.3.1 testdef=None
149 11:50:56.224288 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
150 11:50:56.224347 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
151 11:50:56.224712 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
153 11:50:56.224877 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
154 11:50:56.225379 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
156 11:50:56.225546 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
157 11:50:56.225983 runner path: /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/0/tests/0_dmesg test_uuid 14202278_1.4.2.3.1
158 11:50:56.226095 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
160 11:50:56.226246 Creating lava-test-runner.conf files
161 11:50:56.226290 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14202278/lava-overlay-xf70t6io/lava-14202278/0 for stage 0
162 11:50:56.226350 - 0_dmesg
163 11:50:56.226420 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
164 11:50:56.226481 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
165 11:50:56.231288 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
166 11:50:56.231372 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
167 11:50:56.231436 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
168 11:50:56.231496 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
169 11:50:56.231556 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
170 11:50:56.381001 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
171 11:50:56.381153 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
172 11:50:56.381239 extracting modules file /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14202278/extract-overlay-ramdisk-nj094t0r/ramdisk
173 11:50:56.408896 end: 1.4.4 extract-modules (duration 00:00:00) [common]
174 11:50:56.409026 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
175 11:50:56.409095 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14202278/compress-overlay-4tffed4x/overlay-1.4.2.4.tar.gz to ramdisk
176 11:50:56.409155 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14202278/compress-overlay-4tffed4x/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14202278/extract-overlay-ramdisk-nj094t0r/ramdisk
177 11:50:56.413563 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
178 11:50:56.413649 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
179 11:50:56.413715 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
180 11:50:56.413775 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
181 11:50:56.413828 Building ramdisk /var/lib/lava/dispatcher/tmp/14202278/extract-overlay-ramdisk-nj094t0r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14202278/extract-overlay-ramdisk-nj094t0r/ramdisk
182 11:50:56.478818 >> 67113 blocks
183 11:50:57.443583 rename /var/lib/lava/dispatcher/tmp/14202278/extract-overlay-ramdisk-nj094t0r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/ramdisk/ramdisk.cpio.gz
184 11:50:57.443749 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
185 11:50:57.443838 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
186 11:50:57.443910 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
187 11:50:57.443971 No mkimage arch provided, not using FIT.
188 11:50:57.444067 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
189 11:50:57.444134 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
190 11:50:57.444202 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
191 11:50:57.444267 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
192 11:50:57.444319 No LXC device requested
193 11:50:57.444381 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
194 11:50:57.444440 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
195 11:50:57.444498 end: 1.6 deploy-device-env (duration 00:00:00) [common]
196 11:50:57.444545 Checking files for TFTP limit of 4294967296 bytes.
197 11:50:57.444786 end: 1 tftp-deploy (duration 00:00:02) [common]
198 11:50:57.444858 start: 2 depthcharge-action (timeout 00:05:00) [common]
199 11:50:57.444919 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
200 11:50:57.444995 substitutions:
201 11:50:57.445043 - {DTB}: None
202 11:50:57.445089 - {INITRD}: 14202278/tftp-deploy-8fww6vgf/ramdisk/ramdisk.cpio.gz
203 11:50:57.445145 - {KERNEL}: 14202278/tftp-deploy-8fww6vgf/kernel/bzImage
204 11:50:57.445191 - {LAVA_MAC}: None
205 11:50:57.445249 - {PRESEED_CONFIG}: None
206 11:50:57.445297 - {PRESEED_LOCAL}: None
207 11:50:57.445337 - {RAMDISK}: 14202278/tftp-deploy-8fww6vgf/ramdisk/ramdisk.cpio.gz
208 11:50:57.445384 - {ROOT_PART}: None
209 11:50:57.445432 - {ROOT}: None
210 11:50:57.445470 - {SERVER_IP}: 192.168.201.1
211 11:50:57.445508 - {TEE}: None
212 11:50:57.445545 Parsed boot commands:
213 11:50:57.445582 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
214 11:50:57.445692 Parsed boot commands: tftpboot 192.168.201.1 14202278/tftp-deploy-8fww6vgf/kernel/bzImage 14202278/tftp-deploy-8fww6vgf/kernel/cmdline 14202278/tftp-deploy-8fww6vgf/ramdisk/ramdisk.cpio.gz
215 11:50:57.445758 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
216 11:50:57.445815 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
217 11:50:57.445874 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
218 11:50:57.445931 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
219 11:50:57.445977 Not connected, no need to disconnect.
220 11:50:57.446036 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
221 11:50:57.446092 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
222 11:50:57.446138 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
223 11:50:57.449032 Setting prompt string to ['lava-test: # ']
224 11:50:57.449274 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
225 11:50:57.449355 end: 2.2.1 reset-connection (duration 00:00:00) [common]
226 11:50:57.449434 start: 2.2.2 reset-device (timeout 00:05:00) [common]
227 11:50:57.449511 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
228 11:50:57.449642 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-3']
229 11:51:10.855481 Returned 0 in 13 seconds
230 11:51:10.955994 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
232 11:51:10.956261 end: 2.2.2 reset-device (duration 00:00:14) [common]
233 11:51:10.956339 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
234 11:51:10.956407 Setting prompt string to 'Starting depthcharge on Volmar...'
235 11:51:10.956461 Changing prompt to 'Starting depthcharge on Volmar...'
236 11:51:10.956513 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
237 11:51:10.956841 [Enter `^Ec?' for help]
238 11:51:10.956929
239 11:51:10.957000
240 11:51:10.957067 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
241 11:51:10.957136 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
242 11:51:10.957183 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
243 11:51:10.957229 CPU: AES supported, TXT NOT supported, VT supported
244 11:51:10.957279 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
245 11:51:10.957325 Cache size = 10 MiB
246 11:51:10.957371 MCH: device id 4609 (rev 04) is Alderlake-P
247 11:51:10.957420 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
248 11:51:10.957465 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
249 11:51:10.957511 VBOOT: Loading verstage.
250 11:51:10.957568 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 11:51:10.957635 FMAP: base = 0x0 size = 0x2000000 #areas = 37
252 11:51:10.957708 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 11:51:10.957758 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
254 11:51:10.957801 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
255 11:51:10.957842
256 11:51:10.957885
257 11:51:10.957925 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
258 11:51:10.957966 Probing TPM I2C: I2C bus 1 version 0x3230302a
259 11:51:10.958006 DW I2C bus 1 at 0xfe022000 (400 KHz)
260 11:51:10.958045 done! DID_VID 0x00281ae0
261 11:51:10.958085 TPM ready after 0 ms
262 11:51:10.958123 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
263 11:51:10.958164 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
264 11:51:10.958204 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
265 11:51:10.958243 tlcl_send_startup: Startup return code is 0
266 11:51:10.958283 TPM: setup succeeded
267 11:51:10.958322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 11:51:10.958361 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 11:51:10.958401 Chrome EC: UHEPI supported
270 11:51:10.958440 Reading cr50 boot mode
271 11:51:10.958479 Cr50 says boot_mode is VERIFIED_RW(0x00).
272 11:51:10.958518 Phase 1
273 11:51:10.958556 FMAP: area GBB found @ 1805000 (458752 bytes)
274 11:51:10.958595 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 11:51:10.958634 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 11:51:10.958672 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
277 11:51:10.958711 VB2:vb2_check_recovery() Recovery was requested manually
278 11:51:10.958750 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
279 11:51:10.958789 Recovery requested (1009000e)
280 11:51:10.958828 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
281 11:51:10.958866 tlcl_extend: response is 0
282 11:51:10.958904 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
283 11:51:10.958943 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
284 11:51:10.958983 tlcl_extend: response is 0
285 11:51:10.959021 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
286 11:51:10.959061 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
287 11:51:10.959101 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
288 11:51:10.959140 BS: verstage times (exec / console): total (unknown) / 149 ms
289 11:51:10.959180
290 11:51:10.959219
291 11:51:10.959258 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
292 11:51:10.959297 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
293 11:51:10.959336 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
294 11:51:10.959375 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
295 11:51:10.959413 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
296 11:51:10.959452 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
297 11:51:10.959491 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
298 11:51:10.959529 TCO_STS: 0000 0000
299 11:51:10.959571 GEN_PMCON: d0015038 00002200
300 11:51:10.959618 GBLRST_CAUSE: 00000000 00000000
301 11:51:10.959658 HPR_CAUSE0: 00000000
302 11:51:10.959696 prev_sleep_state 5
303 11:51:10.959734 Abort disabling TXT, as CPU is not TXT capable.
304 11:51:10.959773 cse_lite: Skip switching to RW in the recovery path
305 11:51:10.959813 Boot Count incremented to 3276
306 11:51:10.959851 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 11:51:10.959890 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 11:51:10.959929 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 11:51:10.959967 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
310 11:51:10.960005 Chrome EC: UHEPI supported
311 11:51:10.960052 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 11:51:10.960093 Probing TPM I2C: done! DID_VID 0x00281ae0
313 11:51:10.960132 Locality already claimed
314 11:51:10.960170 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
315 11:51:10.960209 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
316 11:51:10.960248 MRC: Hash idx 0x100b comparison successful.
317 11:51:10.960286 MRC cache found, size f6c8
318 11:51:10.960324 bootmode is set to: 2
319 11:51:10.960363 EC returned error result code 3
320 11:51:10.960402 FW_CONFIG value from CBI is 0x131
321 11:51:10.960441 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
322 11:51:10.960480 SPD index = 0
323 11:51:10.960519 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
324 11:51:10.960557 SPD: module type is LPDDR4X
325 11:51:10.960596 SPD: module part number is K4U6E3S4AB-MGCL
326 11:51:10.960634 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
327 11:51:10.960673 SPD: device width 16 bits, bus width 16 bits
328 11:51:10.960897 SPD: module size is 1024 MB (per channel)
329 11:51:10.960949 CBMEM:
330 11:51:10.960991 IMD: root @ 0x76fff000 254 entries.
331 11:51:10.961031 IMD: root @ 0x76ffec00 62 entries.
332 11:51:10.961070 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
333 11:51:10.961111 RO_VPD is uninitialized or empty.
334 11:51:10.961160 FMAP: area RW_VPD found @ f29000 (8192 bytes)
335 11:51:10.961200 External stage cache:
336 11:51:10.961238 IMD: root @ 0x7bbff000 254 entries.
337 11:51:10.961278 IMD: root @ 0x7bbfec00 62 entries.
338 11:51:10.961324 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
339 11:51:10.961366 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 11:51:10.961405 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
341 11:51:10.961445 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 11:51:10.961484 8 DIMMs found
343 11:51:10.961526 SMM Memory Map
344 11:51:10.961570 SMRAM : 0x7b800000 0x800000
345 11:51:10.961612 Subregion 0: 0x7b800000 0x200000
346 11:51:10.961650 Subregion 1: 0x7ba00000 0x200000
347 11:51:10.961690 Subregion 2: 0x7bc00000 0x400000
348 11:51:10.961729 top_of_ram = 0x77000000
349 11:51:10.961768 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
350 11:51:10.961807 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
351 11:51:10.961846 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
352 11:51:10.961885 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 11:51:10.961924 Normal boot
354 11:51:10.961963 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
355 11:51:10.962002 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
356 11:51:10.962041 Processing 237 relocs. Offset value of 0x74aba000
357 11:51:10.962080 BS: romstage times (exec / console): total (unknown) / 280 ms
358 11:51:10.962118
359 11:51:10.962156
360 11:51:10.962195 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
361 11:51:10.962235 Normal boot
362 11:51:10.962274 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
363 11:51:10.962313 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
364 11:51:10.962352 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
365 11:51:10.962391 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
366 11:51:10.962430 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
367 11:51:10.962470 Processing 5931 relocs. Offset value of 0x72a30000
368 11:51:10.962509 BS: postcar times (exec / console): total (unknown) / 51 ms
369 11:51:10.962547
370 11:51:10.962586
371 11:51:10.962624 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
372 11:51:10.962663 Reserving BERT start 76a1f000, size 10000
373 11:51:10.962701 Normal boot
374 11:51:10.962739 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 11:51:10.962778 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
376 11:51:10.962817 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
377 11:51:10.962855 FMAP: area RW_VPD found @ f29000 (8192 bytes)
378 11:51:10.962893 Google Chrome EC: version:
379 11:51:10.962947 ro: volmar_v2.0.14126-e605144e9c
380 11:51:10.962986 rw: volmar_v0.0.55-22d1557
381 11:51:10.963029 running image: 1
382 11:51:10.963071 ACPI _SWS is PM1 Index 8 GPE Index -1
383 11:51:10.963110 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
384 11:51:10.963149 EC returned error result code 3
385 11:51:10.963189 FW_CONFIG value from CBI is 0x131
386 11:51:10.963228 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
387 11:51:10.963266 PCI: 00:1c.2 disabled by fw_config
388 11:51:10.963306 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
389 11:51:10.963345 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
390 11:51:10.963384 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
391 11:51:10.963422 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
392 11:51:10.963460 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 11:51:10.963499 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
394 11:51:10.963538 microcode: sig=0x906a4 pf=0x80 revision=0x423
395 11:51:10.963580 microcode: Update skipped, already up-to-date
396 11:51:10.963626 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
397 11:51:10.963666 Detected 6 core, 8 thread CPU.
398 11:51:10.963704 Setting up SMI for CPU
399 11:51:10.963742 IED base = 0x7bc00000
400 11:51:10.963781 IED size = 0x00400000
401 11:51:10.963819 Will perform SMM setup.
402 11:51:10.963857 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
403 11:51:10.963896 LAPIC 0x0 in XAPIC mode.
404 11:51:10.963935 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
405 11:51:10.963974 Processing 18 relocs. Offset value of 0x00030000
406 11:51:10.964012 Attempting to start 7 APs
407 11:51:10.964051 Waiting for 10ms after sending INIT.
408 11:51:10.964089 Waiting for SIPI to complete...
409 11:51:10.964128 LAPIC 0x1 in XAPIC mode.
410 11:51:10.964166 LAPIC 0x16 in XAPIC mode.
411 11:51:10.964203 LAPIC 0x12 in XAPIC mode.
412 11:51:10.964241 LAPIC 0x10 in XAPIC mode.
413 11:51:10.964278 LAPIC 0x14 in XAPIC mode.
414 11:51:10.964317 AP: slot 4 apic_id 12, MCU rev: 0x00000423
415 11:51:10.964354 AP: slot 3 apic_id 10, MCU rev: 0x00000423
416 11:51:10.964393 AP: slot 1 apic_id 14, MCU rev: 0x00000423
417 11:51:10.964431 AP: slot 2 apic_id 16, MCU rev: 0x00000423
418 11:51:10.964469 LAPIC 0x8 in XAPIC mode.
419 11:51:10.964507 LAPIC 0x9 in XAPIC mode.
420 11:51:10.964552 AP: slot 7 apic_id 8, MCU rev: 0x00000423
421 11:51:10.964592 AP: slot 5 apic_id 9, MCU rev: 0x00000423
422 11:51:10.964631 AP: slot 6 apic_id 1, MCU rev: 0x00000423
423 11:51:10.964670 done.
424 11:51:10.964708 Waiting for SIPI to complete...
425 11:51:10.964747 done.
426 11:51:10.964967 smm_setup_relocation_handler: enter
427 11:51:10.965043 smm_setup_relocation_handler: exit
428 11:51:10.965108 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
429 11:51:10.965180 Processing 11 relocs. Offset value of 0x00038000
430 11:51:10.965244 smm_module_setup_stub: stack_top = 0x7b804000
431 11:51:10.965307 smm_module_setup_stub: per cpu stack_size = 0x800
432 11:51:10.965374 smm_module_setup_stub: runtime.start32_offset = 0x4c
433 11:51:10.965437 smm_module_setup_stub: runtime.smm_size = 0x10000
434 11:51:10.965500 SMM Module: stub loaded at 38000. Will call 0x76a53094
435 11:51:10.965563 Installing permanent SMM handler to 0x7b800000
436 11:51:10.965628 smm_load_module: total_smm_space_needed e468, available -> 200000
437 11:51:10.965694 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
438 11:51:10.965757 Processing 255 relocs. Offset value of 0x7b9f6000
439 11:51:10.965820 smm_load_module: smram_start: 0x7b800000
440 11:51:10.965865 smm_load_module: smram_end: 7ba00000
441 11:51:10.965905 smm_load_module: handler start 0x7b9f6d5f
442 11:51:10.965944 smm_load_module: handler_size 98d0
443 11:51:10.965983 smm_load_module: fxsave_area 0x7b9ff000
444 11:51:10.966021 smm_load_module: fxsave_size 1000
445 11:51:10.966061 smm_load_module: CONFIG_MSEG_SIZE 0x0
446 11:51:10.966100 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
447 11:51:10.966138 smm_load_module: handler_mod_params.smbase = 0x7b800000
448 11:51:10.966177 smm_load_module: per_cpu_save_state_size = 0x400
449 11:51:10.966216 smm_load_module: num_cpus = 0x8
450 11:51:10.966255 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
451 11:51:10.966294 smm_load_module: total_save_state_size = 0x2000
452 11:51:10.966333 smm_load_module: cpu0 entry: 7b9e6000
453 11:51:10.966373 smm_create_map: cpus allowed in one segment 30
454 11:51:10.966411 smm_create_map: min # of segments needed 1
455 11:51:10.966450 CPU 0x0
456 11:51:10.966489 smbase 7b9e6000 entry 7b9ee000
457 11:51:10.966528 ss_start 7b9f5c00 code_end 7b9ee208
458 11:51:10.966567 CPU 0x1
459 11:51:10.966606 smbase 7b9e5c00 entry 7b9edc00
460 11:51:10.966646 ss_start 7b9f5800 code_end 7b9ede08
461 11:51:10.966685 CPU 0x2
462 11:51:10.966723 smbase 7b9e5800 entry 7b9ed800
463 11:51:10.966762 ss_start 7b9f5400 code_end 7b9eda08
464 11:51:10.966801 CPU 0x3
465 11:51:10.966840 smbase 7b9e5400 entry 7b9ed400
466 11:51:10.966882 ss_start 7b9f5000 code_end 7b9ed608
467 11:51:10.966926 CPU 0x4
468 11:51:10.966965 smbase 7b9e5000 entry 7b9ed000
469 11:51:10.967006 ss_start 7b9f4c00 code_end 7b9ed208
470 11:51:10.967045 CPU 0x5
471 11:51:10.967083 smbase 7b9e4c00 entry 7b9ecc00
472 11:51:10.967121 ss_start 7b9f4800 code_end 7b9ece08
473 11:51:10.967160 CPU 0x6
474 11:51:10.967197 smbase 7b9e4800 entry 7b9ec800
475 11:51:10.967236 ss_start 7b9f4400 code_end 7b9eca08
476 11:51:10.967275 CPU 0x7
477 11:51:10.967313 smbase 7b9e4400 entry 7b9ec400
478 11:51:10.967356 ss_start 7b9f4000 code_end 7b9ec608
479 11:51:10.967411 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
480 11:51:10.967471 Processing 11 relocs. Offset value of 0x7b9ee000
481 11:51:10.967533 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
482 11:51:10.967597 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
483 11:51:10.967660 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
484 11:51:10.967724 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
485 11:51:10.967789 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
486 11:51:10.967853 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
487 11:51:10.967909 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
488 11:51:10.967967 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
489 11:51:10.968034 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
490 11:51:10.968107 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
491 11:51:10.968175 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
492 11:51:10.968242 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
493 11:51:10.968310 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
494 11:51:10.968378 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
495 11:51:10.968446 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
496 11:51:10.968514 smm_module_setup_stub: stack_top = 0x7b804000
497 11:51:10.968581 smm_module_setup_stub: per cpu stack_size = 0x800
498 11:51:10.968648 smm_module_setup_stub: runtime.start32_offset = 0x4c
499 11:51:10.968716 smm_module_setup_stub: runtime.smm_size = 0x200000
500 11:51:10.968784 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
501 11:51:10.968852 Clearing SMI status registers
502 11:51:10.968919 SMI_STS: PM1
503 11:51:10.968987 PM1_STS: PWRBTN
504 11:51:10.969054 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
505 11:51:10.969128 In relocation handler: CPU 0
506 11:51:10.969199 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
507 11:51:10.969273 Writing SMRR. base = 0x7b800006, mask=0xff800c00
508 11:51:10.969339 Relocation complete.
509 11:51:10.969406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
510 11:51:10.969473 In relocation handler: CPU 6
511 11:51:10.969541 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
512 11:51:10.969610 Relocation complete.
513 11:51:10.969686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
514 11:51:10.969754 In relocation handler: CPU 3
515 11:51:10.970031 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
516 11:51:10.970108 Writing SMRR. base = 0x7b800006, mask=0xff800c00
517 11:51:10.970176 Relocation complete.
518 11:51:10.970243 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
519 11:51:10.970310 In relocation handler: CPU 4
520 11:51:10.970376 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
521 11:51:10.970445 Writing SMRR. base = 0x7b800006, mask=0xff800c00
522 11:51:10.970512 Relocation complete.
523 11:51:10.970579 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
524 11:51:10.970646 In relocation handler: CPU 1
525 11:51:10.970713 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
526 11:51:10.970781 Writing SMRR. base = 0x7b800006, mask=0xff800c00
527 11:51:10.970842 Relocation complete.
528 11:51:10.970892 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
529 11:51:10.970934 In relocation handler: CPU 2
530 11:51:10.970974 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
531 11:51:10.971013 Writing SMRR. base = 0x7b800006, mask=0xff800c00
532 11:51:10.971053 Relocation complete.
533 11:51:10.971091 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
534 11:51:10.971130 In relocation handler: CPU 5
535 11:51:10.971168 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
536 11:51:10.971207 Relocation complete.
537 11:51:10.971245 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
538 11:51:10.971284 In relocation handler: CPU 7
539 11:51:10.971323 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
540 11:51:10.971363 Writing SMRR. base = 0x7b800006, mask=0xff800c00
541 11:51:10.971401 Relocation complete.
542 11:51:10.971439 Initializing CPU #0
543 11:51:10.971479 CPU: vendor Intel device 906a4
544 11:51:10.971517 CPU: family 06, model 9a, stepping 04
545 11:51:10.971555 Clearing out pending MCEs
546 11:51:10.971597 cpu: energy policy set to 7
547 11:51:10.971636 Turbo is available but hidden
548 11:51:10.971674 Turbo is available and visible
549 11:51:10.971713 microcode: Update skipped, already up-to-date
550 11:51:10.971752 CPU #0 initialized
551 11:51:10.971790 Initializing CPU #6
552 11:51:10.971827 Initializing CPU #4
553 11:51:10.971866 Initializing CPU #1
554 11:51:10.971904 CPU: vendor Intel device 906a4
555 11:51:10.971942 CPU: family 06, model 9a, stepping 04
556 11:51:10.971980 Initializing CPU #2
557 11:51:10.972019 CPU: vendor Intel device 906a4
558 11:51:10.972056 CPU: family 06, model 9a, stepping 04
559 11:51:10.972094 Initializing CPU #3
560 11:51:10.972133 Clearing out pending MCEs
561 11:51:10.972171 CPU: vendor Intel device 906a4
562 11:51:10.972210 CPU: family 06, model 9a, stepping 04
563 11:51:10.972248 Initializing CPU #7
564 11:51:10.972285 Clearing out pending MCEs
565 11:51:10.972323 cpu: energy policy set to 7
566 11:51:10.972361 cpu: energy policy set to 7
567 11:51:10.972399 Clearing out pending MCEs
568 11:51:10.972437 microcode: Update skipped, already up-to-date
569 11:51:10.972475 CPU #3 initialized
570 11:51:10.972513 cpu: energy policy set to 7
571 11:51:10.972551 CPU: vendor Intel device 906a4
572 11:51:10.972589 CPU: family 06, model 9a, stepping 04
573 11:51:10.972626 microcode: Update skipped, already up-to-date
574 11:51:10.972664 CPU #4 initialized
575 11:51:10.972702 Clearing out pending MCEs
576 11:51:10.972739 microcode: Update skipped, already up-to-date
577 11:51:10.972777 CPU #1 initialized
578 11:51:10.972816 cpu: energy policy set to 7
579 11:51:10.972854 Initializing CPU #5
580 11:51:10.972897 microcode: Update skipped, already up-to-date
581 11:51:10.972937 CPU #2 initialized
582 11:51:10.972974 CPU: vendor Intel device 906a4
583 11:51:10.973013 CPU: family 06, model 9a, stepping 04
584 11:51:10.973050 CPU: vendor Intel device 906a4
585 11:51:10.973088 CPU: family 06, model 9a, stepping 04
586 11:51:10.973135 Clearing out pending MCEs
587 11:51:10.973177 CPU: vendor Intel device 906a4
588 11:51:10.973216 CPU: family 06, model 9a, stepping 04
589 11:51:10.973255 Clearing out pending MCEs
590 11:51:10.973294 Clearing out pending MCEs
591 11:51:10.973332 cpu: energy policy set to 7
592 11:51:10.973370 cpu: energy policy set to 7
593 11:51:10.973408 microcode: Update skipped, already up-to-date
594 11:51:10.973446 CPU #6 initialized
595 11:51:10.973485 microcode: Update skipped, already up-to-date
596 11:51:10.973523 CPU #5 initialized
597 11:51:10.973562 cpu: energy policy set to 7
598 11:51:10.973606 microcode: Update skipped, already up-to-date
599 11:51:10.973645 CPU #7 initialized
600 11:51:10.973683 bsp_do_flight_plan done after 688 msecs.
601 11:51:10.973722 CPU: frequency set to 4400 MHz
602 11:51:10.973762 Enabling SMIs.
603 11:51:10.973800 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
604 11:51:10.973838 Probing TPM I2C: done! DID_VID 0x00281ae0
605 11:51:10.973878 Locality already claimed
606 11:51:10.973917 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
607 11:51:10.973955 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
608 11:51:10.973994 Enabling GPIO PM b/c CR50 has long IRQ pulse support
609 11:51:10.974033 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
610 11:51:10.974072 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
611 11:51:10.974110 Found a VBT of 9216 bytes after decompression
612 11:51:10.974148 PCI 1.0, PIN A, using IRQ #16
613 11:51:10.974188 PCI 2.0, PIN A, using IRQ #17
614 11:51:10.974237 PCI 4.0, PIN A, using IRQ #18
615 11:51:10.974278 PCI 5.0, PIN A, using IRQ #16
616 11:51:10.974317 PCI 6.0, PIN A, using IRQ #16
617 11:51:10.974354 PCI 6.2, PIN C, using IRQ #18
618 11:51:10.974392 PCI 7.0, PIN A, using IRQ #19
619 11:51:10.974431 PCI 7.1, PIN B, using IRQ #20
620 11:51:10.974468 PCI 7.2, PIN C, using IRQ #21
621 11:51:10.974506 PCI 7.3, PIN D, using IRQ #22
622 11:51:10.974545 PCI 8.0, PIN A, using IRQ #23
623 11:51:10.974583 PCI D.0, PIN A, using IRQ #17
624 11:51:10.974621 PCI D.1, PIN B, using IRQ #19
625 11:51:10.974660 PCI 10.0, PIN A, using IRQ #24
626 11:51:10.974699 PCI 10.1, PIN B, using IRQ #25
627 11:51:10.974737 PCI 10.6, PIN C, using IRQ #20
628 11:51:10.974775 PCI 10.7, PIN D, using IRQ #21
629 11:51:10.974812 PCI 11.0, PIN A, using IRQ #26
630 11:51:10.974850 PCI 11.1, PIN B, using IRQ #27
631 11:51:10.975076 PCI 11.2, PIN C, using IRQ #28
632 11:51:10.975142 PCI 11.3, PIN D, using IRQ #29
633 11:51:10.975193 PCI 12.0, PIN A, using IRQ #30
634 11:51:10.975243 PCI 12.6, PIN B, using IRQ #31
635 11:51:10.975291 PCI 12.7, PIN C, using IRQ #22
636 11:51:10.975339 PCI 13.0, PIN A, using IRQ #32
637 11:51:10.975388 PCI 13.1, PIN B, using IRQ #33
638 11:51:10.975436 PCI 13.2, PIN C, using IRQ #34
639 11:51:10.975484 PCI 13.3, PIN D, using IRQ #35
640 11:51:10.975532 PCI 14.0, PIN B, using IRQ #23
641 11:51:10.975582 PCI 14.1, PIN A, using IRQ #36
642 11:51:10.975632 PCI 14.3, PIN C, using IRQ #17
643 11:51:10.975675 PCI 15.0, PIN A, using IRQ #37
644 11:51:10.975715 PCI 15.1, PIN B, using IRQ #38
645 11:51:10.975755 PCI 15.2, PIN C, using IRQ #39
646 11:51:10.975793 PCI 15.3, PIN D, using IRQ #40
647 11:51:10.975831 PCI 16.0, PIN A, using IRQ #18
648 11:51:10.975870 PCI 16.1, PIN B, using IRQ #19
649 11:51:10.975908 PCI 16.2, PIN C, using IRQ #20
650 11:51:10.975946 PCI 16.3, PIN D, using IRQ #21
651 11:51:10.975984 PCI 16.4, PIN A, using IRQ #18
652 11:51:10.976022 PCI 16.5, PIN B, using IRQ #19
653 11:51:10.976060 PCI 17.0, PIN A, using IRQ #22
654 11:51:10.976099 PCI 19.0, PIN A, using IRQ #41
655 11:51:10.976137 PCI 19.1, PIN B, using IRQ #42
656 11:51:10.976175 PCI 19.2, PIN C, using IRQ #43
657 11:51:10.976213 PCI 1C.0, PIN A, using IRQ #16
658 11:51:10.976251 PCI 1C.1, PIN B, using IRQ #17
659 11:51:10.976289 PCI 1C.2, PIN C, using IRQ #18
660 11:51:10.976327 PCI 1C.3, PIN D, using IRQ #19
661 11:51:10.976365 PCI 1C.4, PIN A, using IRQ #16
662 11:51:10.976403 PCI 1C.5, PIN B, using IRQ #17
663 11:51:10.976441 PCI 1C.6, PIN C, using IRQ #18
664 11:51:10.976478 PCI 1C.7, PIN D, using IRQ #19
665 11:51:10.976516 PCI 1D.0, PIN A, using IRQ #16
666 11:51:10.976554 PCI 1D.1, PIN B, using IRQ #17
667 11:51:10.976592 PCI 1D.2, PIN C, using IRQ #18
668 11:51:10.976629 PCI 1D.3, PIN D, using IRQ #19
669 11:51:10.976666 PCI 1E.0, PIN A, using IRQ #23
670 11:51:10.976705 PCI 1E.1, PIN B, using IRQ #20
671 11:51:10.976747 PCI 1E.2, PIN C, using IRQ #44
672 11:51:10.976785 PCI 1E.3, PIN D, using IRQ #45
673 11:51:10.976824 PCI 1F.3, PIN B, using IRQ #22
674 11:51:10.976862 PCI 1F.4, PIN C, using IRQ #23
675 11:51:10.976901 PCI 1F.6, PIN D, using IRQ #20
676 11:51:10.976940 PCI 1F.7, PIN A, using IRQ #21
677 11:51:10.976995 IRQ: Using dynamically assigned PCI IO-APIC IRQs
678 11:51:10.977048 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
679 11:51:10.977090 FSPS returned 0
680 11:51:10.977141 Executing Phase 1 of FspMultiPhaseSiInit
681 11:51:10.977183 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
682 11:51:10.977226 port C0 DISC req: usage 1 usb3 1 usb2 1
683 11:51:10.977265 Raw Buffer output 0 00000111
684 11:51:10.977304 Raw Buffer output 1 00000000
685 11:51:10.977342 pmc_send_ipc_cmd succeeded
686 11:51:10.977381 port C1 DISC req: usage 1 usb3 3 usb2 3
687 11:51:10.977420 Raw Buffer output 0 00000331
688 11:51:10.977458 Raw Buffer output 1 00000000
689 11:51:10.977497 pmc_send_ipc_cmd succeeded
690 11:51:10.977535 Detected 6 core, 8 thread CPU.
691 11:51:10.977574 Detected 6 core, 8 thread CPU.
692 11:51:10.977612 Detected 6 core, 8 thread CPU.
693 11:51:10.977651 Detected 6 core, 8 thread CPU.
694 11:51:10.977689 Detected 6 core, 8 thread CPU.
695 11:51:10.977727 Detected 6 core, 8 thread CPU.
696 11:51:10.977765 Detected 6 core, 8 thread CPU.
697 11:51:10.977803 Detected 6 core, 8 thread CPU.
698 11:51:10.977841 Detected 6 core, 8 thread CPU.
699 11:51:10.977886 Detected 6 core, 8 thread CPU.
700 11:51:10.977925 Detected 6 core, 8 thread CPU.
701 11:51:10.977964 Detected 6 core, 8 thread CPU.
702 11:51:10.978001 Detected 6 core, 8 thread CPU.
703 11:51:10.978039 Detected 6 core, 8 thread CPU.
704 11:51:10.978077 Detected 6 core, 8 thread CPU.
705 11:51:10.978115 Detected 6 core, 8 thread CPU.
706 11:51:10.978154 Detected 6 core, 8 thread CPU.
707 11:51:10.978194 Detected 6 core, 8 thread CPU.
708 11:51:10.978235 Detected 6 core, 8 thread CPU.
709 11:51:10.978274 Detected 6 core, 8 thread CPU.
710 11:51:10.978313 Detected 6 core, 8 thread CPU.
711 11:51:10.978351 Detected 6 core, 8 thread CPU.
712 11:51:10.978389 Detected 6 core, 8 thread CPU.
713 11:51:10.978428 Detected 6 core, 8 thread CPU.
714 11:51:10.978466 Detected 6 core, 8 thread CPU.
715 11:51:10.978504 Detected 6 core, 8 thread CPU.
716 11:51:10.978542 Detected 6 core, 8 thread CPU.
717 11:51:10.978581 Detected 6 core, 8 thread CPU.
718 11:51:10.978619 Detected 6 core, 8 thread CPU.
719 11:51:10.978657 Detected 6 core, 8 thread CPU.
720 11:51:10.978695 Detected 6 core, 8 thread CPU.
721 11:51:10.978733 Detected 6 core, 8 thread CPU.
722 11:51:10.978770 Detected 6 core, 8 thread CPU.
723 11:51:10.978808 Detected 6 core, 8 thread CPU.
724 11:51:10.978848 Detected 6 core, 8 thread CPU.
725 11:51:10.978886 Detected 6 core, 8 thread CPU.
726 11:51:10.978924 Detected 6 core, 8 thread CPU.
727 11:51:10.978962 Detected 6 core, 8 thread CPU.
728 11:51:10.979000 Detected 6 core, 8 thread CPU.
729 11:51:10.979038 Detected 6 core, 8 thread CPU.
730 11:51:10.979075 Detected 6 core, 8 thread CPU.
731 11:51:10.979113 Detected 6 core, 8 thread CPU.
732 11:51:10.979151 Display FSP Version Info HOB
733 11:51:10.979189 Reference Code - CPU = c.0.65.70
734 11:51:10.979227 uCode Version = 0.0.4.23
735 11:51:10.979265 TXT ACM version = ff.ff.ff.ffff
736 11:51:10.979304 Reference Code - ME = c.0.65.70
737 11:51:10.979343 MEBx version = 0.0.0.0
738 11:51:10.979381 ME Firmware Version = Consumer SKU
739 11:51:10.979418 Reference Code - PCH = c.0.65.70
740 11:51:10.979456 PCH-CRID Status = Disabled
741 11:51:10.979494 PCH-CRID Original Value = ff.ff.ff.ffff
742 11:51:10.979531 PCH-CRID New Value = ff.ff.ff.ffff
743 11:51:10.979569 OPROM - RST - RAID = ff.ff.ff.ffff
744 11:51:10.979607 PCH Hsio Version = 4.0.0.0
745 11:51:10.979646 Reference Code - SA - System Agent = c.0.65.70
746 11:51:10.979684 Reference Code - MRC = 0.0.3.80
747 11:51:10.979723 SA - PCIe Version = c.0.65.70
748 11:51:10.979760 SA-CRID Status = Disabled
749 11:51:10.979798 SA-CRID Original Value = 0.0.0.4
750 11:51:10.979836 SA-CRID New Value = 0.0.0.4
751 11:51:10.979874 OPROM - VBIOS = ff.ff.ff.ffff
752 11:51:10.979913 IO Manageability Engine FW Version = 24.0.4.0
753 11:51:10.979951 PHY Build Version = 0.0.0.2016
754 11:51:10.980179 Thunderbolt(TM) FW Version = 0.0.0.0
755 11:51:10.980245 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
756 11:51:10.980304 BS: BS_DEV_INIT_CHIPS run times (exec / console): 474 / 507 ms
757 11:51:10.980363 Enumerating buses...
758 11:51:10.980420 Show all devs... Before device enumeration.
759 11:51:10.980476 Root Device: enabled 1
760 11:51:10.980533 CPU_CLUSTER: 0: enabled 1
761 11:51:10.980588 DOMAIN: 0000: enabled 1
762 11:51:10.980643 GPIO: 0: enabled 1
763 11:51:10.980695 PCI: 00:00.0: enabled 1
764 11:51:10.980740 PCI: 00:01.0: enabled 0
765 11:51:10.980781 PCI: 00:01.1: enabled 0
766 11:51:10.980820 PCI: 00:02.0: enabled 1
767 11:51:10.980859 PCI: 00:04.0: enabled 1
768 11:51:10.980897 PCI: 00:05.0: enabled 0
769 11:51:10.980935 PCI: 00:06.0: enabled 1
770 11:51:10.980973 PCI: 00:06.2: enabled 0
771 11:51:10.981011 PCI: 00:07.0: enabled 0
772 11:51:10.981049 PCI: 00:07.1: enabled 0
773 11:51:10.981087 PCI: 00:07.2: enabled 0
774 11:51:10.981134 PCI: 00:07.3: enabled 0
775 11:51:10.981176 PCI: 00:08.0: enabled 0
776 11:51:10.981215 PCI: 00:09.0: enabled 0
777 11:51:10.981254 PCI: 00:0a.0: enabled 1
778 11:51:10.981292 PCI: 00:0d.0: enabled 1
779 11:51:10.981330 PCI: 00:0d.1: enabled 0
780 11:51:10.981368 PCI: 00:0d.2: enabled 0
781 11:51:10.981407 PCI: 00:0d.3: enabled 0
782 11:51:10.981445 PCI: 00:0e.0: enabled 0
783 11:51:10.981483 PCI: 00:10.0: enabled 0
784 11:51:10.981521 PCI: 00:10.1: enabled 0
785 11:51:10.981560 PCI: 00:10.6: enabled 0
786 11:51:10.981597 PCI: 00:10.7: enabled 0
787 11:51:10.981636 PCI: 00:12.0: enabled 0
788 11:51:10.981674 PCI: 00:12.6: enabled 0
789 11:51:10.981713 PCI: 00:12.7: enabled 0
790 11:51:10.981753 PCI: 00:13.0: enabled 0
791 11:51:10.981792 PCI: 00:14.0: enabled 1
792 11:51:10.981830 PCI: 00:14.1: enabled 0
793 11:51:10.981868 PCI: 00:14.2: enabled 1
794 11:51:10.981906 PCI: 00:14.3: enabled 1
795 11:51:10.981945 PCI: 00:15.0: enabled 1
796 11:51:10.981983 PCI: 00:15.1: enabled 1
797 11:51:10.982022 PCI: 00:15.2: enabled 0
798 11:51:10.982060 PCI: 00:15.3: enabled 1
799 11:51:10.982098 PCI: 00:16.0: enabled 1
800 11:51:10.982136 PCI: 00:16.1: enabled 0
801 11:51:10.982174 PCI: 00:16.2: enabled 0
802 11:51:10.982212 PCI: 00:16.3: enabled 0
803 11:51:10.982250 PCI: 00:16.4: enabled 0
804 11:51:10.982288 PCI: 00:16.5: enabled 0
805 11:51:10.982327 PCI: 00:17.0: enabled 1
806 11:51:10.982366 PCI: 00:19.0: enabled 0
807 11:51:10.982405 PCI: 00:19.1: enabled 1
808 11:51:10.982444 PCI: 00:19.2: enabled 0
809 11:51:10.982483 PCI: 00:1a.0: enabled 0
810 11:51:10.982521 PCI: 00:1c.0: enabled 0
811 11:51:10.982559 PCI: 00:1c.1: enabled 0
812 11:51:10.982597 PCI: 00:1c.2: enabled 0
813 11:51:10.982635 PCI: 00:1c.3: enabled 0
814 11:51:10.982672 PCI: 00:1c.4: enabled 0
815 11:51:10.982711 PCI: 00:1c.5: enabled 0
816 11:51:10.982748 PCI: 00:1c.6: enabled 0
817 11:51:10.982786 PCI: 00:1c.7: enabled 0
818 11:51:10.982824 PCI: 00:1d.0: enabled 0
819 11:51:10.982862 PCI: 00:1d.1: enabled 0
820 11:51:10.982900 PCI: 00:1d.2: enabled 0
821 11:51:10.982938 PCI: 00:1d.3: enabled 0
822 11:51:10.982976 PCI: 00:1e.0: enabled 1
823 11:51:10.983015 PCI: 00:1e.1: enabled 0
824 11:51:10.983053 PCI: 00:1e.2: enabled 0
825 11:51:10.983091 PCI: 00:1e.3: enabled 1
826 11:51:10.983128 PCI: 00:1f.0: enabled 1
827 11:51:10.983166 PCI: 00:1f.1: enabled 0
828 11:51:10.983203 PCI: 00:1f.2: enabled 1
829 11:51:10.983242 PCI: 00:1f.3: enabled 1
830 11:51:10.983279 PCI: 00:1f.4: enabled 0
831 11:51:10.983318 PCI: 00:1f.5: enabled 1
832 11:51:10.983357 PCI: 00:1f.6: enabled 0
833 11:51:10.983403 PCI: 00:1f.7: enabled 0
834 11:51:10.983446 GENERIC: 0.0: enabled 1
835 11:51:10.983487 GENERIC: 0.0: enabled 1
836 11:51:10.983525 GENERIC: 1.0: enabled 1
837 11:51:10.983563 GENERIC: 0.0: enabled 1
838 11:51:10.983616 GENERIC: 1.0: enabled 1
839 11:51:10.983659 USB0 port 0: enabled 1
840 11:51:10.983698 USB0 port 0: enabled 1
841 11:51:10.983737 GENERIC: 0.0: enabled 1
842 11:51:10.983776 I2C: 00:1a: enabled 1
843 11:51:10.983815 I2C: 00:31: enabled 1
844 11:51:10.983853 I2C: 00:32: enabled 1
845 11:51:10.983891 I2C: 00:50: enabled 1
846 11:51:10.983929 I2C: 00:10: enabled 1
847 11:51:10.983967 I2C: 00:15: enabled 1
848 11:51:10.984006 I2C: 00:2c: enabled 1
849 11:51:10.984045 GENERIC: 0.0: enabled 1
850 11:51:10.984083 SPI: 00: enabled 1
851 11:51:10.984121 PNP: 0c09.0: enabled 1
852 11:51:10.984160 GENERIC: 0.0: enabled 1
853 11:51:10.984199 USB3 port 0: enabled 1
854 11:51:10.984237 USB3 port 1: enabled 0
855 11:51:10.984275 USB3 port 2: enabled 1
856 11:51:10.984313 USB3 port 3: enabled 0
857 11:51:10.984351 USB2 port 0: enabled 1
858 11:51:10.984390 USB2 port 1: enabled 0
859 11:51:10.984429 USB2 port 2: enabled 1
860 11:51:10.984467 USB2 port 3: enabled 0
861 11:51:10.984507 USB2 port 4: enabled 0
862 11:51:10.984552 USB2 port 5: enabled 1
863 11:51:10.984592 USB2 port 6: enabled 0
864 11:51:10.984632 USB2 port 7: enabled 0
865 11:51:10.984671 USB2 port 8: enabled 1
866 11:51:10.984709 USB2 port 9: enabled 1
867 11:51:10.984748 USB3 port 0: enabled 1
868 11:51:10.984786 USB3 port 1: enabled 0
869 11:51:10.984825 USB3 port 2: enabled 0
870 11:51:10.984863 USB3 port 3: enabled 0
871 11:51:10.984902 GENERIC: 0.0: enabled 1
872 11:51:10.984940 GENERIC: 1.0: enabled 1
873 11:51:10.984979 APIC: 00: enabled 1
874 11:51:10.985018 APIC: 14: enabled 1
875 11:51:10.985057 APIC: 16: enabled 1
876 11:51:10.985095 APIC: 10: enabled 1
877 11:51:10.985141 APIC: 12: enabled 1
878 11:51:10.985181 APIC: 09: enabled 1
879 11:51:10.985220 APIC: 01: enabled 1
880 11:51:10.985259 APIC: 08: enabled 1
881 11:51:10.985297 Compare with tree...
882 11:51:10.985335 Root Device: enabled 1
883 11:51:10.985373 CPU_CLUSTER: 0: enabled 1
884 11:51:10.985411 APIC: 00: enabled 1
885 11:51:10.985451 APIC: 14: enabled 1
886 11:51:10.985489 APIC: 16: enabled 1
887 11:51:10.985528 APIC: 10: enabled 1
888 11:51:10.985566 APIC: 12: enabled 1
889 11:51:10.985605 APIC: 09: enabled 1
890 11:51:10.985644 APIC: 01: enabled 1
891 11:51:10.985682 APIC: 08: enabled 1
892 11:51:10.985721 DOMAIN: 0000: enabled 1
893 11:51:10.985760 GPIO: 0: enabled 1
894 11:51:10.985799 PCI: 00:00.0: enabled 1
895 11:51:10.985838 PCI: 00:01.0: enabled 0
896 11:51:10.985876 PCI: 00:01.1: enabled 0
897 11:51:10.985915 PCI: 00:02.0: enabled 1
898 11:51:10.985953 PCI: 00:04.0: enabled 1
899 11:51:10.985991 GENERIC: 0.0: enabled 1
900 11:51:10.986030 PCI: 00:05.0: enabled 0
901 11:51:10.986068 PCI: 00:06.0: enabled 1
902 11:51:10.986106 PCI: 00:06.2: enabled 0
903 11:51:10.986144 PCI: 00:08.0: enabled 0
904 11:51:10.986181 PCI: 00:09.0: enabled 0
905 11:51:10.986219 PCI: 00:0a.0: enabled 1
906 11:51:10.986257 PCI: 00:0d.0: enabled 1
907 11:51:10.986294 USB0 port 0: enabled 1
908 11:51:10.986338 USB3 port 0: enabled 1
909 11:51:10.986381 USB3 port 1: enabled 0
910 11:51:10.986422 USB3 port 2: enabled 1
911 11:51:10.986460 USB3 port 3: enabled 0
912 11:51:10.986499 PCI: 00:0d.1: enabled 0
913 11:51:10.986552 PCI: 00:0d.2: enabled 0
914 11:51:10.986594 PCI: 00:0d.3: enabled 0
915 11:51:10.986632 PCI: 00:0e.0: enabled 0
916 11:51:10.986859 PCI: 00:10.0: enabled 0
917 11:51:10.986917 PCI: 00:10.1: enabled 0
918 11:51:10.986976 PCI: 00:10.6: enabled 0
919 11:51:10.987034 PCI: 00:10.7: enabled 0
920 11:51:10.987090 PCI: 00:12.0: enabled 0
921 11:51:10.987142 PCI: 00:12.6: enabled 0
922 11:51:10.987200 PCI: 00:12.7: enabled 0
923 11:51:10.987256 PCI: 00:13.0: enabled 0
924 11:51:10.987301 PCI: 00:14.0: enabled 1
925 11:51:10.987340 USB0 port 0: enabled 1
926 11:51:10.987379 USB2 port 0: enabled 1
927 11:51:10.987426 USB2 port 1: enabled 0
928 11:51:10.987466 USB2 port 2: enabled 1
929 11:51:10.987507 USB2 port 3: enabled 0
930 11:51:10.987546 USB2 port 4: enabled 0
931 11:51:10.987585 USB2 port 5: enabled 1
932 11:51:10.987623 USB2 port 6: enabled 0
933 11:51:10.987663 USB2 port 7: enabled 0
934 11:51:10.987702 USB2 port 8: enabled 1
935 11:51:10.987740 USB2 port 9: enabled 1
936 11:51:10.987779 USB3 port 0: enabled 1
937 11:51:10.987817 USB3 port 1: enabled 0
938 11:51:10.987854 USB3 port 2: enabled 0
939 11:51:10.987892 USB3 port 3: enabled 0
940 11:51:10.987930 PCI: 00:14.1: enabled 0
941 11:51:10.987968 PCI: 00:14.2: enabled 1
942 11:51:10.988006 PCI: 00:14.3: enabled 1
943 11:51:10.988045 GENERIC: 0.0: enabled 1
944 11:51:10.988083 PCI: 00:15.0: enabled 1
945 11:51:10.988121 I2C: 00:1a: enabled 1
946 11:51:10.988159 I2C: 00:31: enabled 1
947 11:51:10.988197 I2C: 00:32: enabled 1
948 11:51:10.988234 PCI: 00:15.1: enabled 1
949 11:51:10.988272 I2C: 00:50: enabled 1
950 11:51:10.988310 PCI: 00:15.2: enabled 0
951 11:51:10.988347 PCI: 00:15.3: enabled 1
952 11:51:10.988385 I2C: 00:10: enabled 1
953 11:51:10.988424 PCI: 00:16.0: enabled 1
954 11:51:10.988462 PCI: 00:16.1: enabled 0
955 11:51:10.988500 PCI: 00:16.2: enabled 0
956 11:51:10.988538 PCI: 00:16.3: enabled 0
957 11:51:10.988576 PCI: 00:16.4: enabled 0
958 11:51:10.988615 PCI: 00:16.5: enabled 0
959 11:51:10.988653 PCI: 00:17.0: enabled 1
960 11:51:10.988690 PCI: 00:19.0: enabled 0
961 11:51:10.988727 PCI: 00:19.1: enabled 1
962 11:51:10.988766 I2C: 00:15: enabled 1
963 11:51:10.988804 I2C: 00:2c: enabled 1
964 11:51:10.988843 PCI: 00:19.2: enabled 0
965 11:51:10.988882 PCI: 00:1a.0: enabled 0
966 11:51:10.988920 PCI: 00:1e.0: enabled 1
967 11:51:10.988959 PCI: 00:1e.1: enabled 0
968 11:51:10.988997 PCI: 00:1e.2: enabled 0
969 11:51:10.989035 PCI: 00:1e.3: enabled 1
970 11:51:10.989072 SPI: 00: enabled 1
971 11:51:10.989110 PCI: 00:1f.0: enabled 1
972 11:51:10.989158 PNP: 0c09.0: enabled 1
973 11:51:10.989197 PCI: 00:1f.1: enabled 0
974 11:51:10.989237 PCI: 00:1f.2: enabled 1
975 11:51:10.989275 GENERIC: 0.0: enabled 1
976 11:51:10.989314 GENERIC: 0.0: enabled 1
977 11:51:10.989353 GENERIC: 1.0: enabled 1
978 11:51:10.989392 PCI: 00:1f.3: enabled 1
979 11:51:10.989429 PCI: 00:1f.4: enabled 0
980 11:51:10.989468 PCI: 00:1f.5: enabled 1
981 11:51:10.989506 PCI: 00:1f.6: enabled 0
982 11:51:10.989544 PCI: 00:1f.7: enabled 0
983 11:51:10.989583 Root Device scanning...
984 11:51:10.989621 scan_static_bus for Root Device
985 11:51:10.989659 CPU_CLUSTER: 0 enabled
986 11:51:10.989698 DOMAIN: 0000 enabled
987 11:51:10.989736 DOMAIN: 0000 scanning...
988 11:51:10.989775 PCI: pci_scan_bus for bus 00
989 11:51:10.989823 PCI: 00:00.0 [8086/0000] ops
990 11:51:10.989867 PCI: 00:00.0 [8086/4609] enabled
991 11:51:10.989907 PCI: 00:02.0 [8086/0000] bus ops
992 11:51:10.989946 PCI: 00:02.0 [8086/46b3] enabled
993 11:51:10.989984 PCI: 00:04.0 [8086/0000] bus ops
994 11:51:10.990037 PCI: 00:04.0 [8086/461d] enabled
995 11:51:10.990078 PCI: 00:06.0 [8086/0000] bus ops
996 11:51:10.990117 PCI: 00:06.0 [8086/464d] enabled
997 11:51:10.990156 PCI: 00:08.0 [8086/464f] disabled
998 11:51:10.990195 PCI: 00:0a.0 [8086/467d] enabled
999 11:51:10.990234 PCI: 00:0d.0 [8086/0000] bus ops
1000 11:51:10.990272 PCI: 00:0d.0 [8086/461e] enabled
1001 11:51:10.990310 PCI: 00:14.0 [8086/0000] bus ops
1002 11:51:10.990349 PCI: 00:14.0 [8086/51ed] enabled
1003 11:51:10.990388 PCI: 00:14.2 [8086/51ef] enabled
1004 11:51:10.990427 PCI: 00:14.3 [8086/0000] bus ops
1005 11:51:10.990465 PCI: 00:14.3 [8086/51f0] enabled
1006 11:51:10.990504 PCI: 00:15.0 [8086/0000] bus ops
1007 11:51:10.990542 PCI: 00:15.0 [8086/51e8] enabled
1008 11:51:10.990579 PCI: 00:15.1 [8086/0000] bus ops
1009 11:51:10.990618 PCI: 00:15.1 [8086/51e9] enabled
1010 11:51:10.990657 PCI: 00:15.2 [8086/0000] bus ops
1011 11:51:10.990696 PCI: 00:15.2 [8086/51ea] disabled
1012 11:51:10.990735 PCI: 00:15.3 [8086/0000] bus ops
1013 11:51:10.990773 PCI: 00:15.3 [8086/51eb] enabled
1014 11:51:10.990812 PCI: 00:16.0 [8086/0000] ops
1015 11:51:10.990851 PCI: 00:16.0 [8086/51e0] enabled
1016 11:51:10.990889 PCI: Static device PCI: 00:17.0 not found, disabling it.
1017 11:51:10.990927 PCI: 00:19.0 [8086/0000] bus ops
1018 11:51:10.990965 PCI: 00:19.0 [8086/51c5] disabled
1019 11:51:10.991003 PCI: 00:19.1 [8086/0000] bus ops
1020 11:51:10.991041 PCI: 00:19.1 [8086/51c6] enabled
1021 11:51:10.991079 PCI: 00:1e.0 [8086/0000] ops
1022 11:51:10.991120 PCI: 00:1e.0 [8086/51a8] enabled
1023 11:51:10.991166 PCI: 00:1e.3 [8086/0000] bus ops
1024 11:51:10.991208 PCI: 00:1e.3 [8086/51ab] enabled
1025 11:51:10.991248 PCI: 00:1f.0 [8086/0000] bus ops
1026 11:51:10.991286 PCI: 00:1f.0 [8086/5182] enabled
1027 11:51:10.991325 RTC Init
1028 11:51:10.991363 Set power on after power failure.
1029 11:51:10.991402 Disabling Deep S3
1030 11:51:10.991441 Disabling Deep S3
1031 11:51:10.991479 Disabling Deep S4
1032 11:51:10.991517 Disabling Deep S4
1033 11:51:10.991556 Disabling Deep S5
1034 11:51:10.991594 Disabling Deep S5
1035 11:51:10.991633 PCI: 00:1f.2 [0000/0000] hidden
1036 11:51:10.991671 PCI: 00:1f.3 [8086/0000] bus ops
1037 11:51:10.991709 PCI: 00:1f.3 [8086/51c8] enabled
1038 11:51:10.991747 PCI: 00:1f.5 [8086/0000] bus ops
1039 11:51:10.991786 PCI: 00:1f.5 [8086/51a4] enabled
1040 11:51:10.991824 GPIO: 0 enabled
1041 11:51:10.991862 PCI: Leftover static devices:
1042 11:51:10.991901 PCI: 00:01.0
1043 11:51:10.991940 PCI: 00:01.1
1044 11:51:10.991979 PCI: 00:05.0
1045 11:51:10.992017 PCI: 00:06.2
1046 11:51:10.992056 PCI: 00:09.0
1047 11:51:10.992094 PCI: 00:0d.1
1048 11:51:10.992132 PCI: 00:0d.2
1049 11:51:10.992170 PCI: 00:0d.3
1050 11:51:10.992207 PCI: 00:0e.0
1051 11:51:10.992245 PCI: 00:10.0
1052 11:51:10.992283 PCI: 00:10.1
1053 11:51:10.992321 PCI: 00:10.6
1054 11:51:10.992359 PCI: 00:10.7
1055 11:51:10.992397 PCI: 00:12.0
1056 11:51:10.992436 PCI: 00:12.6
1057 11:51:10.992475 PCI: 00:12.7
1058 11:51:10.992513 PCI: 00:13.0
1059 11:51:10.992552 PCI: 00:14.1
1060 11:51:10.992590 PCI: 00:16.1
1061 11:51:10.992628 PCI: 00:16.2
1062 11:51:10.992665 PCI: 00:16.3
1063 11:51:10.992703 PCI: 00:16.4
1064 11:51:10.992741 PCI: 00:16.5
1065 11:51:10.992779 PCI: 00:17.0
1066 11:51:10.992817 PCI: 00:19.2
1067 11:51:10.992855 PCI: 00:1a.0
1068 11:51:10.992892 PCI: 00:1e.1
1069 11:51:10.992931 PCI: 00:1e.2
1070 11:51:10.992969 PCI: 00:1f.1
1071 11:51:10.993008 PCI: 00:1f.4
1072 11:51:10.993045 PCI: 00:1f.6
1073 11:51:10.993268 PCI: 00:1f.7
1074 11:51:10.993336 PCI: Check your devicetree.cb.
1075 11:51:10.993392 PCI: 00:02.0 scanning...
1076 11:51:10.993449 scan_generic_bus for PCI: 00:02.0
1077 11:51:10.993505 scan_generic_bus for PCI: 00:02.0 done
1078 11:51:10.993561 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1079 11:51:10.993617 PCI: 00:04.0 scanning...
1080 11:51:10.993673 scan_generic_bus for PCI: 00:04.0
1081 11:51:10.993724 GENERIC: 0.0 enabled
1082 11:51:10.993773 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1083 11:51:10.993822 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1084 11:51:10.993871 PCI: 00:06.0 scanning...
1085 11:51:10.993920 do_pci_scan_bridge for PCI: 00:06.0
1086 11:51:10.993969 PCI: pci_scan_bus for bus 01
1087 11:51:10.994017 PCI: 01:00.0 [15b7/5009] enabled
1088 11:51:10.994066 Enabling Common Clock Configuration
1089 11:51:10.994114 L1 Sub-State supported from root port 6
1090 11:51:10.994164 L1 Sub-State Support = 0x5
1091 11:51:10.994213 CommonModeRestoreTime = 0x6e
1092 11:51:10.994262 Power On Value = 0x5, Power On Scale = 0x2
1093 11:51:10.994311 ASPM: Enabled L1
1094 11:51:10.994360 PCIe: Max_Payload_Size adjusted to 256
1095 11:51:10.994409 PCI: 01:00.0: Enabled LTR
1096 11:51:10.994460 PCI: 01:00.0: Programmed LTR max latencies
1097 11:51:10.994501 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1098 11:51:10.994540 PCI: 00:0d.0 scanning...
1099 11:51:10.994580 scan_static_bus for PCI: 00:0d.0
1100 11:51:10.994620 USB0 port 0 enabled
1101 11:51:10.994659 USB0 port 0 scanning...
1102 11:51:10.994697 scan_static_bus for USB0 port 0
1103 11:51:10.994736 USB3 port 0 enabled
1104 11:51:10.994775 USB3 port 1 disabled
1105 11:51:10.994813 USB3 port 2 enabled
1106 11:51:10.994851 USB3 port 3 disabled
1107 11:51:10.994889 USB3 port 0 scanning...
1108 11:51:10.994929 scan_static_bus for USB3 port 0
1109 11:51:10.994968 scan_static_bus for USB3 port 0 done
1110 11:51:10.995007 scan_bus: bus USB3 port 0 finished in 6 msecs
1111 11:51:10.995046 USB3 port 2 scanning...
1112 11:51:10.995084 scan_static_bus for USB3 port 2
1113 11:51:10.995123 scan_static_bus for USB3 port 2 done
1114 11:51:10.995162 scan_bus: bus USB3 port 2 finished in 6 msecs
1115 11:51:10.995200 scan_static_bus for USB0 port 0 done
1116 11:51:10.995238 scan_bus: bus USB0 port 0 finished in 43 msecs
1117 11:51:10.995278 scan_static_bus for PCI: 00:0d.0 done
1118 11:51:10.995317 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1119 11:51:10.995355 PCI: 00:14.0 scanning...
1120 11:51:10.995393 scan_static_bus for PCI: 00:14.0
1121 11:51:10.995431 USB0 port 0 enabled
1122 11:51:10.995469 USB0 port 0 scanning...
1123 11:51:10.995507 scan_static_bus for USB0 port 0
1124 11:51:10.995546 USB2 port 0 enabled
1125 11:51:10.995585 USB2 port 1 disabled
1126 11:51:10.995623 USB2 port 2 enabled
1127 11:51:10.995661 USB2 port 3 disabled
1128 11:51:10.995699 USB2 port 4 disabled
1129 11:51:10.995738 USB2 port 5 enabled
1130 11:51:10.995777 USB2 port 6 disabled
1131 11:51:10.995816 USB2 port 7 disabled
1132 11:51:10.995854 USB2 port 8 enabled
1133 11:51:10.995891 USB2 port 9 enabled
1134 11:51:10.995930 USB3 port 0 enabled
1135 11:51:10.995969 USB3 port 1 disabled
1136 11:51:10.996007 USB3 port 2 disabled
1137 11:51:10.996046 USB3 port 3 disabled
1138 11:51:10.996085 USB2 port 0 scanning...
1139 11:51:10.996124 scan_static_bus for USB2 port 0
1140 11:51:10.996163 scan_static_bus for USB2 port 0 done
1141 11:51:10.996202 scan_bus: bus USB2 port 0 finished in 6 msecs
1142 11:51:10.996240 USB2 port 2 scanning...
1143 11:51:10.996279 scan_static_bus for USB2 port 2
1144 11:51:10.996318 scan_static_bus for USB2 port 2 done
1145 11:51:10.996357 scan_bus: bus USB2 port 2 finished in 6 msecs
1146 11:51:10.996396 USB2 port 5 scanning...
1147 11:51:10.996434 scan_static_bus for USB2 port 5
1148 11:51:10.996473 scan_static_bus for USB2 port 5 done
1149 11:51:10.996512 scan_bus: bus USB2 port 5 finished in 6 msecs
1150 11:51:10.996550 USB2 port 8 scanning...
1151 11:51:10.996588 scan_static_bus for USB2 port 8
1152 11:51:10.996626 scan_static_bus for USB2 port 8 done
1153 11:51:10.996664 scan_bus: bus USB2 port 8 finished in 6 msecs
1154 11:51:10.996702 USB2 port 9 scanning...
1155 11:51:10.996740 scan_static_bus for USB2 port 9
1156 11:51:10.996779 scan_static_bus for USB2 port 9 done
1157 11:51:10.996817 scan_bus: bus USB2 port 9 finished in 6 msecs
1158 11:51:10.996864 USB3 port 0 scanning...
1159 11:51:10.996904 scan_static_bus for USB3 port 0
1160 11:51:10.996945 scan_static_bus for USB3 port 0 done
1161 11:51:10.996984 scan_bus: bus USB3 port 0 finished in 6 msecs
1162 11:51:10.997023 scan_static_bus for USB0 port 0 done
1163 11:51:10.997077 scan_bus: bus USB0 port 0 finished in 120 msecs
1164 11:51:10.997131 scan_static_bus for PCI: 00:14.0 done
1165 11:51:10.997174 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1166 11:51:10.997214 PCI: 00:14.3 scanning...
1167 11:51:10.997254 scan_static_bus for PCI: 00:14.3
1168 11:51:10.997293 GENERIC: 0.0 enabled
1169 11:51:10.997331 scan_static_bus for PCI: 00:14.3 done
1170 11:51:10.997370 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1171 11:51:10.997417 PCI: 00:15.0 scanning...
1172 11:51:10.997458 scan_static_bus for PCI: 00:15.0
1173 11:51:10.997497 I2C: 00:1a enabled
1174 11:51:10.997537 I2C: 00:31 enabled
1175 11:51:10.997575 I2C: 00:32 enabled
1176 11:51:10.997613 scan_static_bus for PCI: 00:15.0 done
1177 11:51:10.997652 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1178 11:51:10.997690 PCI: 00:15.1 scanning...
1179 11:51:10.997728 scan_static_bus for PCI: 00:15.1
1180 11:51:10.997767 I2C: 00:50 enabled
1181 11:51:10.997805 scan_static_bus for PCI: 00:15.1 done
1182 11:51:10.997844 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1183 11:51:10.997883 PCI: 00:15.3 scanning...
1184 11:51:10.997921 scan_static_bus for PCI: 00:15.3
1185 11:51:10.997960 I2C: 00:10 enabled
1186 11:51:10.997999 scan_static_bus for PCI: 00:15.3 done
1187 11:51:10.998036 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1188 11:51:10.998074 PCI: 00:19.1 scanning...
1189 11:51:10.998112 scan_static_bus for PCI: 00:19.1
1190 11:51:10.998151 I2C: 00:15 enabled
1191 11:51:10.998189 I2C: 00:2c enabled
1192 11:51:10.998227 scan_static_bus for PCI: 00:19.1 done
1193 11:51:10.998265 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1194 11:51:10.998303 PCI: 00:1e.3 scanning...
1195 11:51:10.998341 scan_generic_bus for PCI: 00:1e.3
1196 11:51:10.998379 SPI: 00 enabled
1197 11:51:10.998418 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1198 11:51:10.998644 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1199 11:51:10.998708 PCI: 00:1f.0 scanning...
1200 11:51:10.998760 scan_static_bus for PCI: 00:1f.0
1201 11:51:10.998810 PNP: 0c09.0 enabled
1202 11:51:10.998858 PNP: 0c09.0 scanning...
1203 11:51:10.998907 scan_static_bus for PNP: 0c09.0
1204 11:51:10.998956 scan_static_bus for PNP: 0c09.0 done
1205 11:51:10.999005 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1206 11:51:10.999054 scan_static_bus for PCI: 00:1f.0 done
1207 11:51:10.999103 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1208 11:51:10.999152 PCI: 00:1f.2 scanning...
1209 11:51:10.999200 scan_static_bus for PCI: 00:1f.2
1210 11:51:10.999249 GENERIC: 0.0 enabled
1211 11:51:10.999296 GENERIC: 0.0 scanning...
1212 11:51:10.999345 scan_static_bus for GENERIC: 0.0
1213 11:51:10.999393 GENERIC: 0.0 enabled
1214 11:51:10.999440 GENERIC: 1.0 enabled
1215 11:51:10.999488 scan_static_bus for GENERIC: 0.0 done
1216 11:51:10.999537 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1217 11:51:10.999585 scan_static_bus for PCI: 00:1f.2 done
1218 11:51:10.999634 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1219 11:51:10.999682 PCI: 00:1f.3 scanning...
1220 11:51:10.999730 scan_static_bus for PCI: 00:1f.3
1221 11:51:10.999781 scan_static_bus for PCI: 00:1f.3 done
1222 11:51:10.999824 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1223 11:51:10.999870 PCI: 00:1f.5 scanning...
1224 11:51:10.999919 scan_generic_bus for PCI: 00:1f.5
1225 11:51:10.999959 scan_generic_bus for PCI: 00:1f.5 done
1226 11:51:11.000001 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1227 11:51:11.000051 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1228 11:51:11.000093 scan_static_bus for Root Device done
1229 11:51:11.000132 scan_bus: bus Root Device finished in 729 msecs
1230 11:51:11.000171 done
1231 11:51:11.000209 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1232 11:51:11.000248 Chrome EC: UHEPI supported
1233 11:51:11.000287 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1234 11:51:11.000325 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1235 11:51:11.000364 SPI flash protection: WPSW=0 SRP0=0
1236 11:51:11.000402 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1237 11:51:11.000440 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1238 11:51:11.000479 found VGA at PCI: 00:02.0
1239 11:51:11.000518 Setting up VGA for PCI: 00:02.0
1240 11:51:11.000557 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1241 11:51:11.000595 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1242 11:51:11.000632 Allocating resources...
1243 11:51:11.000670 Reading resources...
1244 11:51:11.000709 Root Device read_resources bus 0 link: 0
1245 11:51:11.000746 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1246 11:51:11.000784 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1247 11:51:11.000822 DOMAIN: 0000 read_resources bus 0 link: 0
1248 11:51:11.000861 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1249 11:51:11.000905 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1250 11:51:11.000944 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1251 11:51:11.000982 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1252 11:51:11.001019 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1253 11:51:11.001057 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1254 11:51:11.001095 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1255 11:51:11.001142 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1256 11:51:11.001182 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1257 11:51:11.001221 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1258 11:51:11.001260 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1259 11:51:11.001298 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1260 11:51:11.001337 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1261 11:51:11.001376 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1262 11:51:11.001414 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1263 11:51:11.001453 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1264 11:51:11.001492 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1265 11:51:11.001531 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1266 11:51:11.001569 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1267 11:51:11.001608 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1268 11:51:11.001645 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1269 11:51:11.001684 PCI: 00:04.0 read_resources bus 1 link: 0
1270 11:51:11.001721 PCI: 00:04.0 read_resources bus 1 link: 0 done
1271 11:51:11.001759 PCI: 00:06.0 read_resources bus 1 link: 0
1272 11:51:11.001798 PCI: 00:06.0 read_resources bus 1 link: 0 done
1273 11:51:11.001841 PCI: 00:0d.0 read_resources bus 0 link: 0
1274 11:51:11.001896 USB0 port 0 read_resources bus 0 link: 0
1275 11:51:11.001938 USB0 port 0 read_resources bus 0 link: 0 done
1276 11:51:11.001976 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1277 11:51:11.002015 PCI: 00:14.0 read_resources bus 0 link: 0
1278 11:51:11.002055 USB0 port 0 read_resources bus 0 link: 0
1279 11:51:11.002093 USB0 port 0 read_resources bus 0 link: 0 done
1280 11:51:11.002131 PCI: 00:14.0 read_resources bus 0 link: 0 done
1281 11:51:11.002169 PCI: 00:14.3 read_resources bus 0 link: 0
1282 11:51:11.002209 PCI: 00:14.3 read_resources bus 0 link: 0 done
1283 11:51:11.002247 PCI: 00:15.0 read_resources bus 0 link: 0
1284 11:51:11.002286 PCI: 00:15.0 read_resources bus 0 link: 0 done
1285 11:51:11.002325 PCI: 00:15.1 read_resources bus 0 link: 0
1286 11:51:11.002363 PCI: 00:15.1 read_resources bus 0 link: 0 done
1287 11:51:11.002583 PCI: 00:15.3 read_resources bus 0 link: 0
1288 11:51:11.002633 PCI: 00:15.3 read_resources bus 0 link: 0 done
1289 11:51:11.002673 PCI: 00:19.1 read_resources bus 0 link: 0
1290 11:51:11.002712 PCI: 00:19.1 read_resources bus 0 link: 0 done
1291 11:51:11.002751 PCI: 00:1e.3 read_resources bus 2 link: 0
1292 11:51:11.002790 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1293 11:51:11.002828 PCI: 00:1f.0 read_resources bus 0 link: 0
1294 11:51:11.002867 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1295 11:51:11.002905 PCI: 00:1f.2 read_resources bus 0 link: 0
1296 11:51:11.002943 GENERIC: 0.0 read_resources bus 0 link: 0
1297 11:51:11.002981 GENERIC: 0.0 read_resources bus 0 link: 0 done
1298 11:51:11.003020 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1299 11:51:11.003059 DOMAIN: 0000 read_resources bus 0 link: 0 done
1300 11:51:11.003098 Root Device read_resources bus 0 link: 0 done
1301 11:51:11.003136 Done reading resources.
1302 11:51:11.003173 Show resources in subtree (Root Device)...After reading.
1303 11:51:11.003212 Root Device child on link 0 CPU_CLUSTER: 0
1304 11:51:11.003251 CPU_CLUSTER: 0 child on link 0 APIC: 00
1305 11:51:11.003291 APIC: 00
1306 11:51:11.003330 APIC: 14
1307 11:51:11.003373 APIC: 16
1308 11:51:11.003413 APIC: 10
1309 11:51:11.003451 APIC: 12
1310 11:51:11.003489 APIC: 09
1311 11:51:11.003527 APIC: 01
1312 11:51:11.003574 APIC: 08
1313 11:51:11.003620 DOMAIN: 0000 child on link 0 GPIO: 0
1314 11:51:11.003661 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1315 11:51:11.003700 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1316 11:51:11.003739 GPIO: 0
1317 11:51:11.003784 PCI: 00:00.0
1318 11:51:11.003828 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1319 11:51:11.003869 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1320 11:51:11.003907 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1321 11:51:11.003947 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1322 11:51:11.003985 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1323 11:51:11.004025 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1324 11:51:11.004072 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1325 11:51:11.004112 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1326 11:51:11.004151 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1327 11:51:11.004189 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1328 11:51:11.004227 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1329 11:51:11.004266 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1330 11:51:11.004306 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1331 11:51:11.004345 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1332 11:51:11.004384 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1333 11:51:11.004422 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1334 11:51:11.004461 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1335 11:51:11.004500 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1336 11:51:11.004539 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1337 11:51:11.004577 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1338 11:51:11.004616 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1339 11:51:11.004654 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1340 11:51:11.004692 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1341 11:51:11.004730 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1342 11:51:11.004770 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1343 11:51:11.004809 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1344 11:51:11.004847 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1345 11:51:11.004886 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1346 11:51:11.004924 PCI: 00:02.0
1347 11:51:11.004963 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1348 11:51:11.005159 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1349 11:51:11.005227 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1350 11:51:11.005286 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1351 11:51:11.005343 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1352 11:51:11.005400 GENERIC: 0.0
1353 11:51:11.005456 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1354 11:51:11.005513 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1355 11:51:11.005571 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1356 11:51:11.005630 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1357 11:51:11.005687 PCI: 01:00.0
1358 11:51:11.005742 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1359 11:51:11.005798 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1360 11:51:11.005858 PCI: 00:08.0
1361 11:51:11.005921 PCI: 00:0a.0
1362 11:51:11.005974 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1363 11:51:11.006025 PCI: 00:0d.0 child on link 0 USB0 port 0
1364 11:51:11.006073 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1365 11:51:11.006121 USB0 port 0 child on link 0 USB3 port 0
1366 11:51:11.006170 USB3 port 0
1367 11:51:11.006218 USB3 port 1
1368 11:51:11.006265 USB3 port 2
1369 11:51:11.006312 USB3 port 3
1370 11:51:11.006360 PCI: 00:14.0 child on link 0 USB0 port 0
1371 11:51:11.006408 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1372 11:51:11.006456 USB0 port 0 child on link 0 USB2 port 0
1373 11:51:11.006505 USB2 port 0
1374 11:51:11.006544 USB2 port 1
1375 11:51:11.006587 USB2 port 2
1376 11:51:11.006626 USB2 port 3
1377 11:51:11.006664 USB2 port 4
1378 11:51:11.006702 USB2 port 5
1379 11:51:11.006740 USB2 port 6
1380 11:51:11.006777 USB2 port 7
1381 11:51:11.006815 USB2 port 8
1382 11:51:11.006852 USB2 port 9
1383 11:51:11.006889 USB3 port 0
1384 11:51:11.006926 USB3 port 1
1385 11:51:11.006964 USB3 port 2
1386 11:51:11.007002 USB3 port 3
1387 11:51:11.007039 PCI: 00:14.2
1388 11:51:11.007077 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1389 11:51:11.007116 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1390 11:51:11.007154 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1391 11:51:11.007192 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1392 11:51:11.007231 GENERIC: 0.0
1393 11:51:11.007270 PCI: 00:15.0 child on link 0 I2C: 00:1a
1394 11:51:11.007308 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1395 11:51:11.007346 I2C: 00:1a
1396 11:51:11.007392 I2C: 00:31
1397 11:51:11.007432 I2C: 00:32
1398 11:51:11.007470 PCI: 00:15.1 child on link 0 I2C: 00:50
1399 11:51:11.007508 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1400 11:51:11.007547 I2C: 00:50
1401 11:51:11.007584 PCI: 00:15.2
1402 11:51:11.007621 PCI: 00:15.3 child on link 0 I2C: 00:10
1403 11:51:11.007660 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1404 11:51:11.007699 I2C: 00:10
1405 11:51:11.007737 PCI: 00:16.0
1406 11:51:11.007775 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1407 11:51:11.007816 PCI: 00:19.0
1408 11:51:11.007858 PCI: 00:19.1 child on link 0 I2C: 00:15
1409 11:51:11.007899 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1410 11:51:11.007938 I2C: 00:15
1411 11:51:11.007977 I2C: 00:2c
1412 11:51:11.008015 PCI: 00:1e.0
1413 11:51:11.008053 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 11:51:11.008091 PCI: 00:1e.3 child on link 0 SPI: 00
1415 11:51:11.008129 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1416 11:51:11.008167 SPI: 00
1417 11:51:11.008206 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1418 11:51:11.008245 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1419 11:51:11.008283 PNP: 0c09.0
1420 11:51:11.008320 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1421 11:51:11.008359 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1422 11:51:11.008397 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1423 11:51:11.008435 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1424 11:51:11.008474 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1425 11:51:11.008512 GENERIC: 0.0
1426 11:51:11.008551 GENERIC: 1.0
1427 11:51:11.008589 PCI: 00:1f.3
1428 11:51:11.008627 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1429 11:51:11.008666 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1430 11:51:11.008705 PCI: 00:1f.5
1431 11:51:11.008743 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1432 11:51:11.008965 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1433 11:51:11.009034 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1434 11:51:11.009098 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1435 11:51:11.009169 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1436 11:51:11.009212 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1437 11:51:11.009252 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1438 11:51:11.009290 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1439 11:51:11.009330 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1440 11:51:11.009369 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1441 11:51:11.009408 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1442 11:51:11.009446 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1443 11:51:11.009484 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1444 11:51:11.009523 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1445 11:51:11.009563 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1446 11:51:11.009602 DOMAIN: 0000: Resource ranges:
1447 11:51:11.009641 * Base: 1000, Size: 800, Tag: 100
1448 11:51:11.009681 * Base: 1900, Size: e700, Tag: 100
1449 11:51:11.009720 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1450 11:51:11.009759 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1451 11:51:11.009797 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1452 11:51:11.009836 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1453 11:51:11.009875 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1454 11:51:11.009914 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1455 11:51:11.009959 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1456 11:51:11.010000 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1457 11:51:11.010039 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1458 11:51:11.010077 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1459 11:51:11.010116 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1460 11:51:11.010154 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1461 11:51:11.010193 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1462 11:51:11.010249 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1463 11:51:11.010290 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1464 11:51:11.010329 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1465 11:51:11.010368 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1466 11:51:11.010405 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1467 11:51:11.010443 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1468 11:51:11.010482 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1469 11:51:11.010521 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1470 11:51:11.010559 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1471 11:51:11.010596 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1472 11:51:11.010634 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1473 11:51:11.010676 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1474 11:51:11.010719 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1475 11:51:11.010758 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1476 11:51:11.010796 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1477 11:51:11.010836 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1478 11:51:11.010875 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1479 11:51:11.010913 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1480 11:51:11.010951 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1481 11:51:11.010989 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1482 11:51:11.011027 DOMAIN: 0000: Resource ranges:
1483 11:51:11.011065 * Base: 80400000, Size: 3fc00000, Tag: 200
1484 11:51:11.011104 * Base: d0000000, Size: 28000000, Tag: 200
1485 11:51:11.011142 * Base: fa000000, Size: 1000000, Tag: 200
1486 11:51:11.011180 * Base: fb001000, Size: 17ff000, Tag: 200
1487 11:51:11.011218 * Base: fe800000, Size: 300000, Tag: 200
1488 11:51:11.011256 * Base: feb80000, Size: 80000, Tag: 200
1489 11:51:11.011294 * Base: fed00000, Size: 40000, Tag: 200
1490 11:51:11.011331 * Base: fed70000, Size: 10000, Tag: 200
1491 11:51:11.011370 * Base: fed88000, Size: 8000, Tag: 200
1492 11:51:11.011408 * Base: fed93000, Size: d000, Tag: 200
1493 11:51:11.011626 * Base: feda2000, Size: 1e000, Tag: 200
1494 11:51:11.011673 * Base: fede0000, Size: 1220000, Tag: 200
1495 11:51:11.011712 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1496 11:51:11.011752 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1497 11:51:11.011792 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1498 11:51:11.011831 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1499 11:51:11.011869 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1500 11:51:11.011908 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1501 11:51:11.011946 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1502 11:51:11.011984 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1503 11:51:11.012023 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1504 11:51:11.012060 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1505 11:51:11.012098 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1506 11:51:11.012136 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1507 11:51:11.012174 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1508 11:51:11.012212 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1509 11:51:11.012250 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1510 11:51:11.012288 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1511 11:51:11.012328 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1512 11:51:11.012366 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1513 11:51:11.012404 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1514 11:51:11.012442 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1515 11:51:11.012481 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1516 11:51:11.012520 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1517 11:51:11.012558 PCI: 00:06.0: Resource ranges:
1518 11:51:11.012595 * Base: 80400000, Size: 100000, Tag: 200
1519 11:51:11.012633 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1520 11:51:11.012671 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1521 11:51:11.012709 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1522 11:51:11.012747 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1523 11:51:11.012786 Root Device assign_resources, bus 0 link: 0
1524 11:51:11.012825 DOMAIN: 0000 assign_resources, bus 0 link: 0
1525 11:51:11.012863 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1526 11:51:11.012902 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1527 11:51:11.012941 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1528 11:51:11.012978 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1529 11:51:11.013017 PCI: 00:04.0 assign_resources, bus 1 link: 0
1530 11:51:11.013055 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1531 11:51:11.013094 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1532 11:51:11.013145 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1533 11:51:11.013185 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1534 11:51:11.013224 PCI: 00:06.0 assign_resources, bus 1 link: 0
1535 11:51:11.013270 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1536 11:51:11.013310 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1537 11:51:11.013349 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1538 11:51:11.013404 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1539 11:51:11.013447 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1540 11:51:11.013486 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1541 11:51:11.013524 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1542 11:51:11.013562 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1543 11:51:11.013601 PCI: 00:14.0 assign_resources, bus 0 link: 0
1544 11:51:11.013640 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1545 11:51:11.013679 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1546 11:51:11.013718 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1547 11:51:11.013756 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1548 11:51:11.013794 PCI: 00:14.3 assign_resources, bus 0 link: 0
1549 11:51:11.013833 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1550 11:51:11.013872 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1551 11:51:11.013911 PCI: 00:15.0 assign_resources, bus 0 link: 0
1552 11:51:11.013949 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1553 11:51:11.013987 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1554 11:51:11.014024 PCI: 00:15.1 assign_resources, bus 0 link: 0
1555 11:51:11.014250 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1556 11:51:11.014309 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1557 11:51:11.014372 PCI: 00:15.3 assign_resources, bus 0 link: 0
1558 11:51:11.014431 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1559 11:51:11.014482 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1560 11:51:11.014531 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1561 11:51:11.014580 PCI: 00:19.1 assign_resources, bus 0 link: 0
1562 11:51:11.014628 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1563 11:51:11.014677 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1564 11:51:11.014727 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1565 11:51:11.014775 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1566 11:51:11.014824 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1567 11:51:11.014873 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1568 11:51:11.014922 LPC: Trying to open IO window from 800 size 1ff
1569 11:51:11.014971 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1570 11:51:11.015020 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1571 11:51:11.015069 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1572 11:51:11.015118 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1573 11:51:11.015166 Root Device assign_resources, bus 0 link: 0 done
1574 11:51:11.015215 Done setting resources.
1575 11:51:11.015264 Show resources in subtree (Root Device)...After assigning values.
1576 11:51:11.015312 Root Device child on link 0 CPU_CLUSTER: 0
1577 11:51:11.015360 CPU_CLUSTER: 0 child on link 0 APIC: 00
1578 11:51:11.015407 APIC: 00
1579 11:51:11.015455 APIC: 14
1580 11:51:11.015503 APIC: 16
1581 11:51:11.015550 APIC: 10
1582 11:51:11.015597 APIC: 12
1583 11:51:11.015644 APIC: 09
1584 11:51:11.015691 APIC: 01
1585 11:51:11.015738 APIC: 08
1586 11:51:11.015785 DOMAIN: 0000 child on link 0 GPIO: 0
1587 11:51:11.015833 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1588 11:51:11.015882 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1589 11:51:11.015930 GPIO: 0
1590 11:51:11.015978 PCI: 00:00.0
1591 11:51:11.016026 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1592 11:51:11.016074 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1593 11:51:11.016123 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1594 11:51:11.016171 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1595 11:51:11.016214 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1596 11:51:11.016252 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1597 11:51:11.016292 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1598 11:51:11.016331 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1599 11:51:11.016370 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1600 11:51:11.016409 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1601 11:51:11.016448 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1602 11:51:11.016487 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1603 11:51:11.016525 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1604 11:51:11.016563 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1605 11:51:11.016602 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1606 11:51:11.016641 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1607 11:51:11.016680 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1608 11:51:11.016718 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1609 11:51:11.016755 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1610 11:51:11.016793 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1611 11:51:11.016830 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1612 11:51:11.016869 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1613 11:51:11.016908 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1614 11:51:11.016946 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1615 11:51:11.017153 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1616 11:51:11.017202 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1617 11:51:11.017259 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1618 11:51:11.017302 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1619 11:51:11.017342 PCI: 00:02.0
1620 11:51:11.017380 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1621 11:51:11.017419 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1622 11:51:11.017457 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1623 11:51:11.017496 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1624 11:51:11.017534 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1625 11:51:11.017573 GENERIC: 0.0
1626 11:51:11.017611 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1627 11:51:11.017651 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1628 11:51:11.017690 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1629 11:51:11.017729 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1630 11:51:11.017768 PCI: 01:00.0
1631 11:51:11.017814 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1632 11:51:11.017855 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1633 11:51:11.017895 PCI: 00:08.0
1634 11:51:11.017933 PCI: 00:0a.0
1635 11:51:11.017972 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1636 11:51:11.018011 PCI: 00:0d.0 child on link 0 USB0 port 0
1637 11:51:11.018049 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1638 11:51:11.018088 USB0 port 0 child on link 0 USB3 port 0
1639 11:51:11.018125 USB3 port 0
1640 11:51:11.018163 USB3 port 1
1641 11:51:11.018201 USB3 port 2
1642 11:51:11.018240 USB3 port 3
1643 11:51:11.018279 PCI: 00:14.0 child on link 0 USB0 port 0
1644 11:51:11.018318 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1645 11:51:11.018357 USB0 port 0 child on link 0 USB2 port 0
1646 11:51:11.018395 USB2 port 0
1647 11:51:11.018433 USB2 port 1
1648 11:51:11.018471 USB2 port 2
1649 11:51:11.018509 USB2 port 3
1650 11:51:11.018548 USB2 port 4
1651 11:51:11.018586 USB2 port 5
1652 11:51:11.018624 USB2 port 6
1653 11:51:11.018661 USB2 port 7
1654 11:51:11.018698 USB2 port 8
1655 11:51:11.018736 USB2 port 9
1656 11:51:11.018773 USB3 port 0
1657 11:51:11.018810 USB3 port 1
1658 11:51:11.018847 USB3 port 2
1659 11:51:11.018884 USB3 port 3
1660 11:51:11.018922 PCI: 00:14.2
1661 11:51:11.018960 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1662 11:51:11.018998 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1663 11:51:11.019036 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1664 11:51:11.019074 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1665 11:51:11.019114 GENERIC: 0.0
1666 11:51:11.019151 PCI: 00:15.0 child on link 0 I2C: 00:1a
1667 11:51:11.019189 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1668 11:51:11.019228 I2C: 00:1a
1669 11:51:11.019266 I2C: 00:31
1670 11:51:11.019303 I2C: 00:32
1671 11:51:11.019340 PCI: 00:15.1 child on link 0 I2C: 00:50
1672 11:51:11.019378 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1673 11:51:11.019416 I2C: 00:50
1674 11:51:11.019454 PCI: 00:15.2
1675 11:51:11.019491 PCI: 00:15.3 child on link 0 I2C: 00:10
1676 11:51:11.019530 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1677 11:51:11.019569 I2C: 00:10
1678 11:51:11.019607 PCI: 00:16.0
1679 11:51:11.019645 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1680 11:51:11.019683 PCI: 00:19.0
1681 11:51:11.019728 PCI: 00:19.1 child on link 0 I2C: 00:15
1682 11:51:11.019768 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1683 11:51:11.019808 I2C: 00:15
1684 11:51:11.019846 I2C: 00:2c
1685 11:51:11.019883 PCI: 00:1e.0
1686 11:51:11.019921 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1687 11:51:11.019977 PCI: 00:1e.3 child on link 0 SPI: 00
1688 11:51:11.020020 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1689 11:51:11.020060 SPI: 00
1690 11:51:11.020099 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1691 11:51:11.020137 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1692 11:51:11.020176 PNP: 0c09.0
1693 11:51:11.020214 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1694 11:51:11.020432 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1695 11:51:11.020478 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1696 11:51:11.020520 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1697 11:51:11.020561 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1698 11:51:11.020599 GENERIC: 0.0
1699 11:51:11.020637 GENERIC: 1.0
1700 11:51:11.020675 PCI: 00:1f.3
1701 11:51:11.020720 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1702 11:51:11.020762 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1703 11:51:11.020801 PCI: 00:1f.5
1704 11:51:11.020845 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1705 11:51:11.020889 Done allocating resources.
1706 11:51:11.020928 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1707 11:51:11.020968 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1708 11:51:11.021006 Configure audio over I2S with MAX98373 NAU88L25B.
1709 11:51:11.021044 Enabling BT offload
1710 11:51:11.021082 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1711 11:51:11.021129 Enabling resources...
1712 11:51:11.021170 PCI: 00:00.0 subsystem <- 8086/4609
1713 11:51:11.021208 PCI: 00:00.0 cmd <- 06
1714 11:51:11.021247 PCI: 00:02.0 subsystem <- 8086/46b3
1715 11:51:11.021285 PCI: 00:02.0 cmd <- 03
1716 11:51:11.021325 PCI: 00:04.0 subsystem <- 8086/461d
1717 11:51:11.021363 PCI: 00:04.0 cmd <- 02
1718 11:51:11.021401 PCI: 00:06.0 bridge ctrl <- 0013
1719 11:51:11.021439 PCI: 00:06.0 subsystem <- 8086/464d
1720 11:51:11.021479 PCI: 00:06.0 cmd <- 106
1721 11:51:11.021516 PCI: 00:0a.0 subsystem <- 8086/467d
1722 11:51:11.021553 PCI: 00:0a.0 cmd <- 02
1723 11:51:11.021590 PCI: 00:0d.0 subsystem <- 8086/461e
1724 11:51:11.021629 PCI: 00:0d.0 cmd <- 02
1725 11:51:11.021667 PCI: 00:14.0 subsystem <- 8086/51ed
1726 11:51:11.021705 PCI: 00:14.0 cmd <- 02
1727 11:51:11.021743 PCI: 00:14.2 subsystem <- 8086/51ef
1728 11:51:11.021781 PCI: 00:14.2 cmd <- 02
1729 11:51:11.021819 PCI: 00:14.3 subsystem <- 8086/51f0
1730 11:51:11.021857 PCI: 00:14.3 cmd <- 02
1731 11:51:11.021895 PCI: 00:15.0 subsystem <- 8086/51e8
1732 11:51:11.021932 PCI: 00:15.0 cmd <- 02
1733 11:51:11.021970 PCI: 00:15.1 subsystem <- 8086/51e9
1734 11:51:11.022008 PCI: 00:15.1 cmd <- 06
1735 11:51:11.022046 PCI: 00:15.3 subsystem <- 8086/51eb
1736 11:51:11.022084 PCI: 00:15.3 cmd <- 02
1737 11:51:11.022122 PCI: 00:16.0 subsystem <- 8086/51e0
1738 11:51:11.022159 PCI: 00:16.0 cmd <- 02
1739 11:51:11.281212 PCI: 00:19.1 subsystem <- 8086/51c6
1740 11:51:11.281331 PCI: 00:19.1 cmd <- 02
1741 11:51:11.281380 PCI: 00:1e.0 subsystem <- 8086/51a8
1742 11:51:11.281422 PCI: 00:1e.0 cmd <- 06
1743 11:51:11.281461 PCI: 00:1e.3 subsystem <- 8086/51ab
1744 11:51:11.281500 PCI: 00:1e.3 cmd <- 02
1745 11:51:11.281554 PCI: 00:1f.0 subsystem <- 8086/5182
1746 11:51:11.281606 PCI: 00:1f.0 cmd <- 407
1747 11:51:11.281645 PCI: 00:1f.3 subsystem <- 8086/51c8
1748 11:51:11.281682 PCI: 00:1f.3 cmd <- 02
1749 11:51:11.281720 PCI: 00:1f.5 subsystem <- 8086/51a4
1750 11:51:11.281757 PCI: 00:1f.5 cmd <- 406
1751 11:51:11.281794 PCI: 01:00.0 cmd <- 02
1752 11:51:11.281831 done.
1753 11:51:11.281870 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1754 11:51:11.281910 ME: Version: Unavailable
1755 11:51:11.281953 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1756 11:51:11.282012 Initializing devices...
1757 11:51:11.282052 Root Device init
1758 11:51:11.282093 mainboard: EC init
1759 11:51:11.282132 Chrome EC: Set SMI mask to 0x0000000000000000
1760 11:51:11.282172 Chrome EC: clear events_b mask to 0x0000000000000000
1761 11:51:11.282211 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1762 11:51:11.282250 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1763 11:51:11.282288 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1764 11:51:11.282327 Chrome EC: Set WAKE mask to 0x0000000000000000
1765 11:51:11.282367 Root Device init finished in 35 msecs
1766 11:51:11.282406 PCI: 00:00.0 init
1767 11:51:11.282444 CPU TDP = 15 Watts
1768 11:51:11.282483 CPU PL1 = 15 Watts
1769 11:51:11.282521 CPU PL2 = 55 Watts
1770 11:51:11.282558 CPU PL4 = 123 Watts
1771 11:51:11.282595 PCI: 00:00.0 init finished in 8 msecs
1772 11:51:11.282634 PCI: 00:02.0 init
1773 11:51:11.282672 GMA: Found VBT in CBFS
1774 11:51:11.282710 GMA: Found valid VBT in CBFS
1775 11:51:11.282748 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1776 11:51:11.282787 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1777 11:51:11.282827 PCI: 00:02.0 init finished in 18 msecs
1778 11:51:11.282866 PCI: 00:06.0 init
1779 11:51:11.282903 Initializing PCH PCIe bridge.
1780 11:51:11.282942 PCI: 00:06.0 init finished in 3 msecs
1781 11:51:11.282980 PCI: 00:0a.0 init
1782 11:51:11.283018 PCI: 00:0a.0 init finished in 0 msecs
1783 11:51:11.283057 PCI: 00:14.0 init
1784 11:51:11.283095 PCI: 00:14.0 init finished in 0 msecs
1785 11:51:11.283133 PCI: 00:14.2 init
1786 11:51:11.283172 PCI: 00:14.2 init finished in 0 msecs
1787 11:51:11.283210 PCI: 00:15.0 init
1788 11:51:11.283249 I2C bus 0 version 0x3230302a
1789 11:51:11.283287 DW I2C bus 0 at 0x80655000 (400 KHz)
1790 11:51:11.283334 PCI: 00:15.0 init finished in 6 msecs
1791 11:51:11.283374 PCI: 00:15.1 init
1792 11:51:11.283416 I2C bus 1 version 0x3230302a
1793 11:51:11.283454 DW I2C bus 1 at 0x80656000 (400 KHz)
1794 11:51:11.283506 PCI: 00:15.1 init finished in 6 msecs
1795 11:51:11.283561 PCI: 00:15.3 init
1796 11:51:11.283604 I2C bus 3 version 0x3230302a
1797 11:51:11.283645 DW I2C bus 3 at 0x80657000 (400 KHz)
1798 11:51:11.283690 PCI: 00:15.3 init finished in 6 msecs
1799 11:51:11.283730 PCI: 00:16.0 init
1800 11:51:11.283781 PCI: 00:16.0 init finished in 0 msecs
1801 11:51:11.283835 PCI: 00:19.1 init
1802 11:51:11.283903 I2C bus 5 version 0x3230302a
1803 11:51:11.283941 DW I2C bus 5 at 0x80659000 (400 KHz)
1804 11:51:11.284009 PCI: 00:19.1 init finished in 6 msecs
1805 11:51:11.284046 PCI: 00:1f.0 init
1806 11:51:11.284084 IOAPIC: Initializing IOAPIC at 0xfec00000
1807 11:51:11.284122 IOAPIC: ID = 0x02
1808 11:51:11.284161 IOAPIC: Dumping registers
1809 11:51:11.284398 reg 0x0000: 0x02000000
1810 11:51:11.284463 reg 0x0001: 0x00770020
1811 11:51:11.284527 reg 0x0002: 0x00000000
1812 11:51:11.284586 IOAPIC: 120 interrupts
1813 11:51:11.284642 IOAPIC: Clearing IOAPIC at 0xfec00000
1814 11:51:11.284698 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1815 11:51:11.284755 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1816 11:51:11.284813 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1817 11:51:11.284871 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1818 11:51:11.284927 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1819 11:51:11.284983 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1820 11:51:11.285039 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1821 11:51:11.285097 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1822 11:51:11.285164 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1823 11:51:11.285222 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1824 11:51:11.285273 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1825 11:51:11.285322 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1826 11:51:11.285370 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1827 11:51:11.285419 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1828 11:51:11.285467 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1829 11:51:11.285506 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1830 11:51:11.285545 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1831 11:51:11.285584 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1832 11:51:11.285622 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1833 11:51:11.285661 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1834 11:51:11.285699 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1835 11:51:11.285737 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1836 11:51:11.285776 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1837 11:51:11.285815 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1838 11:51:11.285853 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1839 11:51:11.285891 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1840 11:51:11.285930 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1841 11:51:11.285968 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1842 11:51:11.286006 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1843 11:51:11.286044 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1844 11:51:11.286083 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1845 11:51:11.286122 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1846 11:51:11.286161 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1847 11:51:11.286199 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1848 11:51:11.286237 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1849 11:51:11.286277 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1850 11:51:11.286316 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1851 11:51:11.286355 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1852 11:51:11.286393 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1853 11:51:11.286440 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1854 11:51:11.286481 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1855 11:51:11.286523 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1856 11:51:11.286563 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1857 11:51:11.286616 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1858 11:51:11.286657 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1859 11:51:11.286697 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1860 11:51:11.286736 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1861 11:51:11.286775 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1862 11:51:11.286813 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1863 11:51:11.286852 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1864 11:51:11.286899 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1865 11:51:11.286940 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1866 11:51:11.286978 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1867 11:51:11.287018 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1868 11:51:11.287057 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1869 11:51:11.287095 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1870 11:51:11.287133 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1871 11:51:11.287171 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1872 11:51:11.287209 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1873 11:51:11.287247 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1874 11:51:11.287285 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1875 11:51:11.287324 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1876 11:51:11.287362 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1877 11:51:11.287401 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1878 11:51:11.287439 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1879 11:51:11.287477 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1880 11:51:11.287515 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1881 11:51:11.287553 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1882 11:51:11.287592 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1883 11:51:11.287631 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1884 11:51:11.287668 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1885 11:51:11.287706 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1886 11:51:11.287745 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1887 11:51:11.287783 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1888 11:51:11.287822 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1889 11:51:11.287860 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1890 11:51:11.287899 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1891 11:51:11.287941 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1892 11:51:11.287983 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1893 11:51:11.288023 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1894 11:51:11.288250 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1895 11:51:11.288300 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1896 11:51:11.288340 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1897 11:51:11.288380 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1898 11:51:11.288418 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1899 11:51:11.288456 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1900 11:51:11.288496 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1901 11:51:11.288535 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1902 11:51:11.288574 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1903 11:51:11.288613 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1904 11:51:11.288652 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1905 11:51:11.288691 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1906 11:51:11.288729 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1907 11:51:11.288768 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1908 11:51:11.288807 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1909 11:51:11.288846 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1910 11:51:11.288884 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1911 11:51:11.288924 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1912 11:51:11.288962 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1913 11:51:11.289001 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1914 11:51:11.289039 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1915 11:51:11.289077 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1916 11:51:11.289115 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1917 11:51:11.289175 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1918 11:51:11.289218 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1919 11:51:11.289258 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1920 11:51:11.289296 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1921 11:51:11.289335 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1922 11:51:11.289373 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1923 11:51:11.289412 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1924 11:51:11.289450 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1925 11:51:11.289488 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1926 11:51:11.289526 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1927 11:51:11.289565 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1928 11:51:11.289604 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1929 11:51:11.289645 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1930 11:51:11.289689 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1931 11:51:11.289728 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1932 11:51:11.289767 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1933 11:51:11.289806 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1934 11:51:11.289845 IOAPIC: Bootstrap Processor Local APIC = 0x00
1935 11:51:11.289885 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1936 11:51:11.289923 PCI: 00:1f.0 init finished in 607 msecs
1937 11:51:11.289968 PCI: 00:1f.2 init
1938 11:51:11.290013 apm_control: Disabling ACPI.
1939 11:51:11.290053 APMC done.
1940 11:51:11.290092 PCI: 00:1f.2 init finished in 7 msecs
1941 11:51:11.290130 PCI: 00:1f.3 init
1942 11:51:11.290169 PCI: 00:1f.3 init finished in 0 msecs
1943 11:51:11.290209 PCI: 01:00.0 init
1944 11:51:11.290255 PCI: 01:00.0 init finished in 0 msecs
1945 11:51:11.290294 PNP: 0c09.0 init
1946 11:51:11.290333 Google Chrome EC uptime: 10.889 seconds
1947 11:51:11.290372 Google Chrome AP resets since EC boot: 0
1948 11:51:11.290411 Google Chrome most recent AP reset causes:
1949 11:51:11.290451 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1950 11:51:11.290490 PNP: 0c09.0 init finished in 19 msecs
1951 11:51:11.290528 GENERIC: 0.0 init
1952 11:51:11.290567 GENERIC: 0.0 init finished in 0 msecs
1953 11:51:11.290606 GENERIC: 1.0 init
1954 11:51:11.290645 GENERIC: 1.0 init finished in 0 msecs
1955 11:51:11.290683 Devices initialized
1956 11:51:11.290721 Show all devs... After init.
1957 11:51:11.290759 Root Device: enabled 1
1958 11:51:11.290798 CPU_CLUSTER: 0: enabled 1
1959 11:51:11.290836 DOMAIN: 0000: enabled 1
1960 11:51:11.290874 GPIO: 0: enabled 1
1961 11:51:11.290913 PCI: 00:00.0: enabled 1
1962 11:51:11.290951 PCI: 00:01.0: enabled 0
1963 11:51:11.290990 PCI: 00:01.1: enabled 0
1964 11:51:11.291028 PCI: 00:02.0: enabled 1
1965 11:51:11.291067 PCI: 00:04.0: enabled 1
1966 11:51:11.291107 PCI: 00:05.0: enabled 0
1967 11:51:11.291145 PCI: 00:06.0: enabled 1
1968 11:51:11.291184 PCI: 00:06.2: enabled 0
1969 11:51:11.291222 PCI: 00:07.0: enabled 0
1970 11:51:11.291260 PCI: 00:07.1: enabled 0
1971 11:51:11.291299 PCI: 00:07.2: enabled 0
1972 11:51:11.291337 PCI: 00:07.3: enabled 0
1973 11:51:11.291376 PCI: 00:08.0: enabled 0
1974 11:51:11.291414 PCI: 00:09.0: enabled 0
1975 11:51:11.291453 PCI: 00:0a.0: enabled 1
1976 11:51:11.291491 PCI: 00:0d.0: enabled 1
1977 11:51:11.291530 PCI: 00:0d.1: enabled 0
1978 11:51:11.291569 PCI: 00:0d.2: enabled 0
1979 11:51:11.291607 PCI: 00:0d.3: enabled 0
1980 11:51:11.291646 PCI: 00:0e.0: enabled 0
1981 11:51:11.291684 PCI: 00:10.0: enabled 0
1982 11:51:11.291723 PCI: 00:10.1: enabled 0
1983 11:51:11.291762 PCI: 00:10.6: enabled 0
1984 11:51:11.291800 PCI: 00:10.7: enabled 0
1985 11:51:11.291839 PCI: 00:12.0: enabled 0
1986 11:51:11.291877 PCI: 00:12.6: enabled 0
1987 11:51:11.291915 PCI: 00:12.7: enabled 0
1988 11:51:11.291959 PCI: 00:13.0: enabled 0
1989 11:51:11.292002 PCI: 00:14.0: enabled 1
1990 11:51:11.292044 PCI: 00:14.1: enabled 0
1991 11:51:11.292083 PCI: 00:14.2: enabled 1
1992 11:51:11.292120 PCI: 00:14.3: enabled 1
1993 11:51:11.292159 PCI: 00:15.0: enabled 1
1994 11:51:11.292197 PCI: 00:15.1: enabled 1
1995 11:51:11.292235 PCI: 00:15.2: enabled 0
1996 11:51:11.292274 PCI: 00:15.3: enabled 1
1997 11:51:11.292313 PCI: 00:16.0: enabled 1
1998 11:51:11.292351 PCI: 00:16.1: enabled 0
1999 11:51:11.292389 PCI: 00:16.2: enabled 0
2000 11:51:11.292428 PCI: 00:16.3: enabled 0
2001 11:51:11.292467 PCI: 00:16.4: enabled 0
2002 11:51:11.292505 PCI: 00:16.5: enabled 0
2003 11:51:11.292544 PCI: 00:17.0: enabled 0
2004 11:51:11.292581 PCI: 00:19.0: enabled 0
2005 11:51:11.292620 PCI: 00:19.1: enabled 1
2006 11:51:11.292658 PCI: 00:19.2: enabled 0
2007 11:51:11.292697 PCI: 00:1a.0: enabled 0
2008 11:51:11.292736 PCI: 00:1c.0: enabled 0
2009 11:51:11.292775 PCI: 00:1c.1: enabled 0
2010 11:51:11.292814 PCI: 00:1c.2: enabled 0
2011 11:51:11.292853 PCI: 00:1c.3: enabled 0
2012 11:51:11.292891 PCI: 00:1c.4: enabled 0
2013 11:51:11.293111 PCI: 00:1c.5: enabled 0
2014 11:51:11.293163 PCI: 00:1c.6: enabled 0
2015 11:51:11.293203 PCI: 00:1c.7: enabled 0
2016 11:51:11.293242 PCI: 00:1d.0: enabled 0
2017 11:51:11.293282 PCI: 00:1d.1: enabled 0
2018 11:51:11.293320 PCI: 00:1d.2: enabled 0
2019 11:51:11.293358 PCI: 00:1d.3: enabled 0
2020 11:51:11.293397 PCI: 00:1e.0: enabled 1
2021 11:51:11.293437 PCI: 00:1e.1: enabled 0
2022 11:51:11.293475 PCI: 00:1e.2: enabled 0
2023 11:51:11.293514 PCI: 00:1e.3: enabled 1
2024 11:51:11.293552 PCI: 00:1f.0: enabled 1
2025 11:51:11.293592 PCI: 00:1f.1: enabled 0
2026 11:51:11.293638 PCI: 00:1f.2: enabled 1
2027 11:51:11.293681 PCI: 00:1f.3: enabled 1
2028 11:51:11.293724 PCI: 00:1f.4: enabled 0
2029 11:51:11.293762 PCI: 00:1f.5: enabled 1
2030 11:51:11.293801 PCI: 00:1f.6: enabled 0
2031 11:51:11.293850 PCI: 00:1f.7: enabled 0
2032 11:51:11.293897 GENERIC: 0.0: enabled 1
2033 11:51:11.293938 GENERIC: 0.0: enabled 1
2034 11:51:11.293977 GENERIC: 1.0: enabled 1
2035 11:51:11.294016 GENERIC: 0.0: enabled 1
2036 11:51:11.294055 GENERIC: 1.0: enabled 1
2037 11:51:11.294099 USB0 port 0: enabled 1
2038 11:51:11.294142 USB0 port 0: enabled 1
2039 11:51:11.294181 GENERIC: 0.0: enabled 1
2040 11:51:11.294220 I2C: 00:1a: enabled 1
2041 11:51:11.294259 I2C: 00:31: enabled 1
2042 11:51:11.294298 I2C: 00:32: enabled 1
2043 11:51:11.294336 I2C: 00:50: enabled 1
2044 11:51:11.294375 I2C: 00:10: enabled 1
2045 11:51:11.294416 I2C: 00:15: enabled 1
2046 11:51:11.294455 I2C: 00:2c: enabled 1
2047 11:51:11.294494 GENERIC: 0.0: enabled 1
2048 11:51:11.294533 SPI: 00: enabled 1
2049 11:51:11.294571 PNP: 0c09.0: enabled 1
2050 11:51:11.294611 GENERIC: 0.0: enabled 1
2051 11:51:11.294649 USB3 port 0: enabled 1
2052 11:51:11.294687 USB3 port 1: enabled 0
2053 11:51:11.294726 USB3 port 2: enabled 1
2054 11:51:11.294764 USB3 port 3: enabled 0
2055 11:51:11.294802 USB2 port 0: enabled 1
2056 11:51:11.294840 USB2 port 1: enabled 0
2057 11:51:11.294878 USB2 port 2: enabled 1
2058 11:51:11.294916 USB2 port 3: enabled 0
2059 11:51:11.294954 USB2 port 4: enabled 0
2060 11:51:11.294992 USB2 port 5: enabled 1
2061 11:51:11.295031 USB2 port 6: enabled 0
2062 11:51:11.295070 USB2 port 7: enabled 0
2063 11:51:11.295108 USB2 port 8: enabled 1
2064 11:51:11.295147 USB2 port 9: enabled 1
2065 11:51:11.295186 USB3 port 0: enabled 1
2066 11:51:11.295224 USB3 port 1: enabled 0
2067 11:51:11.295263 USB3 port 2: enabled 0
2068 11:51:11.295301 USB3 port 3: enabled 0
2069 11:51:11.295340 GENERIC: 0.0: enabled 1
2070 11:51:11.295378 GENERIC: 1.0: enabled 1
2071 11:51:11.295416 APIC: 00: enabled 1
2072 11:51:11.295454 APIC: 14: enabled 1
2073 11:51:11.295492 APIC: 16: enabled 1
2074 11:51:11.295531 APIC: 10: enabled 1
2075 11:51:11.295570 APIC: 12: enabled 1
2076 11:51:11.295609 APIC: 09: enabled 1
2077 11:51:11.295647 APIC: 01: enabled 1
2078 11:51:11.295686 APIC: 08: enabled 1
2079 11:51:11.295725 PCI: 01:00.0: enabled 1
2080 11:51:11.295763 BS: BS_DEV_INIT run times (exec / console): 10 / 1126 ms
2081 11:51:11.295802 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2082 11:51:11.295841 ELOG: NV offset 0xf20000 size 0x4000
2083 11:51:11.295880 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2084 11:51:11.295919 ELOG: Event(17) added with size 13 at 2024-06-06 11:51:09 UTC
2085 11:51:11.295958 ELOG: Event(92) added with size 9 at 2024-06-06 11:51:09 UTC
2086 11:51:11.295996 ELOG: Event(93) added with size 9 at 2024-06-06 11:51:09 UTC
2087 11:51:11.296034 ELOG: Event(9E) added with size 10 at 2024-06-06 11:51:09 UTC
2088 11:51:11.296076 ELOG: Event(9F) added with size 14 at 2024-06-06 11:51:09 UTC
2089 11:51:11.296121 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2090 11:51:11.296161 ELOG: Event(A1) added with size 10 at 2024-06-06 11:51:09 UTC
2091 11:51:11.296200 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2092 11:51:11.296239 ELOG: Event(A0) added with size 9 at 2024-06-06 11:51:09 UTC
2093 11:51:11.296278 elog_add_boot_reason: Logged dev mode boot
2094 11:51:11.296317 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2095 11:51:11.296357 Finalize devices...
2096 11:51:11.296397 PCI: 00:16.0 final
2097 11:51:11.296435 PCI: 00:1f.2 final
2098 11:51:11.296474 GENERIC: 0.0 final
2099 11:51:11.296513 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2100 11:51:11.296552 GENERIC: 1.0 final
2101 11:51:11.296592 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2102 11:51:11.296636 Devices finalized
2103 11:51:11.296677 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2104 11:51:11.296718 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2105 11:51:11.296756 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2106 11:51:11.296795 ME: HFSTS1 : 0x80030045
2107 11:51:11.296839 ME: HFSTS2 : 0x30280116
2108 11:51:11.296879 ME: HFSTS3 : 0x00000050
2109 11:51:11.296919 ME: HFSTS4 : 0x00004000
2110 11:51:11.296972 ME: HFSTS5 : 0x00000000
2111 11:51:11.297017 ME: HFSTS6 : 0x40400006
2112 11:51:11.297057 ME: Manufacturing Mode : YES
2113 11:51:11.297096 ME: SPI Protection Mode Enabled : YES
2114 11:51:11.297150 ME: FPFs Committed : YES
2115 11:51:11.297194 ME: Manufacturing Vars Locked : NO
2116 11:51:11.297234 ME: FW Partition Table : OK
2117 11:51:11.297303 ME: Bringup Loader Failure : NO
2118 11:51:11.297352 ME: Firmware Init Complete : NO
2119 11:51:11.297392 ME: Boot Options Present : NO
2120 11:51:11.297445 ME: Update In Progress : NO
2121 11:51:11.297499 ME: D0i3 Support : YES
2122 11:51:11.297542 ME: Low Power State Enabled : NO
2123 11:51:11.297582 ME: CPU Replaced : YES
2124 11:51:11.297622 ME: CPU Replacement Valid : YES
2125 11:51:11.297662 ME: Current Working State : 5
2126 11:51:11.297703 ME: Current Operation State : 1
2127 11:51:11.297742 ME: Current Operation Mode : 3
2128 11:51:11.297781 ME: Error Code : 0
2129 11:51:11.297820 ME: Enhanced Debug Mode : NO
2130 11:51:11.297866 ME: CPU Debug Disabled : YES
2131 11:51:11.297921 ME: TXT Support : NO
2132 11:51:11.297962 ME: WP for RO is enabled : YES
2133 11:51:11.298003 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2134 11:51:11.298042 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2135 11:51:11.298296 ELOG: Event(91) added with size 10 at 2024-06-06 11:51:09 UTC
2136 11:51:11.298350 Chrome EC: clear events_b mask to 0x0000000020004000
2137 11:51:11.298392 Ramoops buffer: 0x100000@0x7689a000.
2138 11:51:11.298433 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 15 ms
2139 11:51:11.298472 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2140 11:51:11.298513 CBFS: 'fallback/slic' not found.
2141 11:51:11.298551 ACPI: Writing ACPI tables at 7686e000.
2142 11:51:11.298590 ACPI: * FACS
2143 11:51:11.298629 ACPI: * DSDT
2144 11:51:11.298676 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2145 11:51:11.298729 ACPI: * FADT
2146 11:51:11.298772 SCI is IRQ9
2147 11:51:11.298812 ACPI: added table 1/32, length now 40
2148 11:51:11.298851 ACPI: * SSDT
2149 11:51:11.298890 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2150 11:51:11.298929 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2151 11:51:11.298970 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2152 11:51:11.299009 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2153 11:51:11.299048 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2154 11:51:11.299088 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2155 11:51:11.299127 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2156 11:51:11.299166 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2157 11:51:11.299205 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2158 11:51:11.299243 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2159 11:51:11.299282 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2160 11:51:11.299320 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2161 11:51:11.299360 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2162 11:51:11.299398 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2163 11:51:11.299437 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2164 11:51:11.299476 PS2K: Passing 80 keymaps to kernel
2165 11:51:11.299514 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2166 11:51:11.299553 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2167 11:51:11.299592 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2168 11:51:11.299630 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2169 11:51:11.299669 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2170 11:51:11.299706 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2171 11:51:11.299744 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2172 11:51:11.299783 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2173 11:51:11.299822 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2174 11:51:11.299860 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2175 11:51:11.299898 ACPI: added table 2/32, length now 44
2176 11:51:11.299936 ACPI: * MCFG
2177 11:51:11.299974 ACPI: added table 3/32, length now 48
2178 11:51:11.300012 ACPI: * TPM2
2179 11:51:11.300049 TPM2 log created at 0x7685e000
2180 11:51:11.300090 ACPI: added table 4/32, length now 52
2181 11:51:11.300136 ACPI: * LPIT
2182 11:51:11.300175 ACPI: added table 5/32, length now 56
2183 11:51:11.300217 ACPI: * MADT
2184 11:51:11.300264 SCI is IRQ9
2185 11:51:11.300309 ACPI: added table 6/32, length now 60
2186 11:51:11.300365 cmd_reg from pmc_make_ipc_cmd 1052838
2187 11:51:11.300407 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2188 11:51:11.300447 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2189 11:51:11.300487 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2190 11:51:11.300527 PMC CrashLog size in discovery mode: 0xC00
2191 11:51:11.300567 cpu crashlog bar addr: 0x80640000
2192 11:51:11.300606 cpu discovery table offset: 0x6030
2193 11:51:11.300645 cpu_crashlog_discovery_table buffer count: 0x3
2194 11:51:11.300684 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2195 11:51:11.300723 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2196 11:51:11.300763 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2197 11:51:11.300801 PMC crashLog size in discovery mode : 0xC00
2198 11:51:11.300840 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2199 11:51:11.300878 discover mode PMC crashlog size adjusted to: 0x200
2200 11:51:11.300916 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2201 11:51:11.300955 discover mode PMC crashlog size adjusted to: 0x0
2202 11:51:11.300993 m_cpu_crashLog_size : 0x3480 bytes
2203 11:51:11.301031 CPU crashLog present.
2204 11:51:11.301069 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2205 11:51:11.301109 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2206 11:51:11.301165 current = 76877550
2207 11:51:11.301206 ACPI: * DMAR
2208 11:51:11.301245 ACPI: added table 7/32, length now 64
2209 11:51:11.301284 ACPI: added table 8/32, length now 68
2210 11:51:11.301322 ACPI: * HPET
2211 11:51:11.301361 ACPI: added table 9/32, length now 72
2212 11:51:11.301399 ACPI: done.
2213 11:51:11.301438 ACPI tables: 38528 bytes.
2214 11:51:11.301476 smbios_write_tables: 76858000
2215 11:51:11.301515 EC returned error result code 3
2216 11:51:11.301553 Couldn't obtain OEM name from CBI
2217 11:51:11.301592 Create SMBIOS type 16
2218 11:51:11.301630 Create SMBIOS type 17
2219 11:51:11.301668 Create SMBIOS type 20
2220 11:51:11.301705 GENERIC: 0.0 (WIFI Device)
2221 11:51:11.301743 SMBIOS tables: 2156 bytes.
2222 11:51:11.301781 Writing table forward entry at 0x00000500
2223 11:51:11.301821 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2224 11:51:11.301861 Writing coreboot table at 0x76892000
2225 11:51:11.301899 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2226 11:51:11.301937 1. 0000000000001000-000000000009ffff: RAM
2227 11:51:11.302162 2. 00000000000a0000-00000000000fffff: RESERVED
2228 11:51:11.302211 3. 0000000000100000-0000000076857fff: RAM
2229 11:51:11.302252 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2230 11:51:11.302292 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2231 11:51:11.302331 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2232 11:51:11.302371 7. 0000000077000000-00000000803fffff: RESERVED
2233 11:51:11.302410 8. 00000000c0000000-00000000cfffffff: RESERVED
2234 11:51:11.302448 9. 00000000f8000000-00000000f9ffffff: RESERVED
2235 11:51:11.302488 10. 00000000fb000000-00000000fb000fff: RESERVED
2236 11:51:11.302528 11. 00000000fc800000-00000000fe7fffff: RESERVED
2237 11:51:11.302569 12. 00000000feb00000-00000000feb7ffff: RESERVED
2238 11:51:11.302608 13. 00000000fec00000-00000000fecfffff: RESERVED
2239 11:51:11.302647 14. 00000000fed40000-00000000fed6ffff: RESERVED
2240 11:51:11.302686 15. 00000000fed80000-00000000fed87fff: RESERVED
2241 11:51:11.302725 16. 00000000fed90000-00000000fed92fff: RESERVED
2242 11:51:11.302764 17. 00000000feda0000-00000000feda1fff: RESERVED
2243 11:51:11.302803 18. 00000000fedc0000-00000000feddffff: RESERVED
2244 11:51:11.302844 19. 0000000100000000-000000027fbfffff: RAM
2245 11:51:11.302883 Passing 4 GPIOs to payload:
2246 11:51:11.302921 NAME | PORT | POLARITY | VALUE
2247 11:51:11.302959 lid | undefined | high | high
2248 11:51:11.302997 power | undefined | high | low
2249 11:51:11.303036 oprom | undefined | high | low
2250 11:51:11.303074 EC in RW | 0x00000151 | high | low
2251 11:51:11.303113 Board ID: 3
2252 11:51:11.303152 FW config: 0x131
2253 11:51:11.303190 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 3291
2254 11:51:11.303228 coreboot table: 1764 bytes.
2255 11:51:11.303267 IMD ROOT 0. 0x76fff000 0x00001000
2256 11:51:11.303313 IMD SMALL 1. 0x76ffe000 0x00001000
2257 11:51:11.303353 FSP MEMORY 2. 0x76afe000 0x00500000
2258 11:51:11.303401 CONSOLE 3. 0x76ade000 0x00020000
2259 11:51:11.303441 RO MCACHE 4. 0x76add000 0x00000fd8
2260 11:51:11.303482 FMAP 5. 0x76adc000 0x0000064a
2261 11:51:11.303535 TIME STAMP 6. 0x76adb000 0x00000910
2262 11:51:11.303576 VBOOT WORK 7. 0x76ac7000 0x00014000
2263 11:51:11.303614 MEM INFO 8. 0x76ac6000 0x000003b8
2264 11:51:11.303653 ROMSTG STCK 9. 0x76ac5000 0x00001000
2265 11:51:11.303692 AFTER CAR 10. 0x76ab9000 0x0000c000
2266 11:51:11.303732 RAMSTAGE 11. 0x76a2f000 0x0008a000
2267 11:51:11.303771 ACPI BERT 12. 0x76a1f000 0x00010000
2268 11:51:11.303809 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2269 11:51:11.303846 REFCODE 14. 0x769af000 0x0006f000
2270 11:51:11.303885 SMM BACKUP 15. 0x7699f000 0x00010000
2271 11:51:11.303923 IGD OPREGION16. 0x7699a000 0x00004203
2272 11:51:11.303964 RAMOOPS 17. 0x7689a000 0x00100000
2273 11:51:11.304004 COREBOOT 18. 0x76892000 0x00008000
2274 11:51:11.304042 ACPI 19. 0x7686e000 0x00024000
2275 11:51:11.304079 TPM2 TCGLOG20. 0x7685e000 0x00010000
2276 11:51:11.304118 PMC CRASHLOG21. 0x7685d000 0x00000c00
2277 11:51:11.304156 CPU CRASHLOG22. 0x76859000 0x00003480
2278 11:51:11.304194 SMBIOS 23. 0x76858000 0x00001000
2279 11:51:11.304232 IMD small region:
2280 11:51:11.304270 IMD ROOT 0. 0x76ffec00 0x00000400
2281 11:51:11.304308 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2282 11:51:11.304346 VPD 2. 0x76ffeb80 0x00000058
2283 11:51:11.304384 POWER STATE 3. 0x76ffeb20 0x00000044
2284 11:51:11.304422 ROMSTAGE 4. 0x76ffeb00 0x00000004
2285 11:51:11.304459 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2286 11:51:11.304496 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2287 11:51:11.304534 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2288 11:51:11.304572 MTRR: Physical address space:
2289 11:51:11.304610 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2290 11:51:11.304650 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2291 11:51:11.304690 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2292 11:51:11.304730 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2293 11:51:11.304769 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2294 11:51:11.304808 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2295 11:51:11.304847 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2296 11:51:11.304886 MTRR: Fixed MSR 0x250 0x0606060606060606
2297 11:51:11.304925 MTRR: Fixed MSR 0x258 0x0606060606060606
2298 11:51:11.304962 MTRR: Fixed MSR 0x259 0x0000000000000000
2299 11:51:11.305000 MTRR: Fixed MSR 0x268 0x0606060606060606
2300 11:51:11.305037 MTRR: Fixed MSR 0x269 0x0606060606060606
2301 11:51:11.305077 MTRR: Fixed MSR 0x26a 0x0606060606060606
2302 11:51:11.305115 MTRR: Fixed MSR 0x26b 0x0606060606060606
2303 11:51:11.305165 MTRR: Fixed MSR 0x26c 0x0606060606060606
2304 11:51:11.305203 MTRR: Fixed MSR 0x26d 0x0606060606060606
2305 11:51:11.305241 MTRR: Fixed MSR 0x26e 0x0606060606060606
2306 11:51:11.305279 MTRR: Fixed MSR 0x26f 0x0606060606060606
2307 11:51:11.305317 call enable_fixed_mtrr()
2308 11:51:11.305354 CPU physical address size: 39 bits
2309 11:51:11.305391 MTRR: default type WB/UC MTRR counts: 6/6.
2310 11:51:11.305429 MTRR: UC selected as default type.
2311 11:51:11.305467 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2312 11:51:11.305505 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2313 11:51:11.305544 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2314 11:51:11.305582 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2315 11:51:11.305620 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2316 11:51:11.305658 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2317 11:51:11.305696 MTRR: Fixed MSR 0x250 0x0606060606060606
2318 11:51:11.305917 MTRR: Fixed MSR 0x258 0x0606060606060606
2319 11:51:11.305985 MTRR: Fixed MSR 0x259 0x0000000000000000
2320 11:51:11.306030 MTRR: Fixed MSR 0x268 0x0606060606060606
2321 11:51:11.306070 MTRR: Fixed MSR 0x269 0x0606060606060606
2322 11:51:11.306108 MTRR: Fixed MSR 0x26a 0x0606060606060606
2323 11:51:11.306146 MTRR: Fixed MSR 0x26b 0x0606060606060606
2324 11:51:11.306184 MTRR: Fixed MSR 0x26c 0x0606060606060606
2325 11:51:11.306221 MTRR: Fixed MSR 0x26d 0x0606060606060606
2326 11:51:11.306259 MTRR: Fixed MSR 0x26e 0x0606060606060606
2327 11:51:11.306298 MTRR: Fixed MSR 0x26f 0x0606060606060606
2328 11:51:11.306336 MTRR: Fixed MSR 0x250 0x0606060606060606
2329 11:51:11.306375 MTRR: Fixed MSR 0x250 0x0606060606060606
2330 11:51:11.306413 MTRR: Fixed MSR 0x250 0x0606060606060606
2331 11:51:11.306452 MTRR: Fixed MSR 0x258 0x0606060606060606
2332 11:51:11.306489 MTRR: Fixed MSR 0x259 0x0000000000000000
2333 11:51:11.306527 MTRR: Fixed MSR 0x268 0x0606060606060606
2334 11:51:11.306571 MTRR: Fixed MSR 0x269 0x0606060606060606
2335 11:51:11.306609 MTRR: Fixed MSR 0x250 0x0606060606060606
2336 11:51:11.306650 MTRR: Fixed MSR 0x250 0x0606060606060606
2337 11:51:11.306694 MTRR: Fixed MSR 0x258 0x0606060606060606
2338 11:51:11.306748 MTRR: Fixed MSR 0x259 0x0000000000000000
2339 11:51:11.306790 MTRR: Fixed MSR 0x268 0x0606060606060606
2340 11:51:11.306828 MTRR: Fixed MSR 0x269 0x0606060606060606
2341 11:51:11.306867 MTRR: Fixed MSR 0x26a 0x0606060606060606
2342 11:51:11.306905 MTRR: Fixed MSR 0x26b 0x0606060606060606
2343 11:51:11.306943 MTRR: Fixed MSR 0x26c 0x0606060606060606
2344 11:51:11.306980 MTRR: Fixed MSR 0x26d 0x0606060606060606
2345 11:51:11.307019 MTRR: Fixed MSR 0x26e 0x0606060606060606
2346 11:51:11.307056 MTRR: Fixed MSR 0x26f 0x0606060606060606
2347 11:51:11.307094 MTRR: Fixed MSR 0x250 0x0606060606060606
2348 11:51:11.307132 call enable_fixed_mtrr()
2349 11:51:11.307170 MTRR: Fixed MSR 0x258 0x0606060606060606
2350 11:51:11.307207 call enable_fixed_mtrr()
2351 11:51:11.307245 MTRR: Fixed MSR 0x258 0x0606060606060606
2352 11:51:11.307283 MTRR: Fixed MSR 0x259 0x0000000000000000
2353 11:51:11.307322 MTRR: Fixed MSR 0x268 0x0606060606060606
2354 11:51:11.307360 MTRR: Fixed MSR 0x269 0x0606060606060606
2355 11:51:11.307399 CPU physical address size: 39 bits
2356 11:51:11.307437 MTRR: Fixed MSR 0x26a 0x0606060606060606
2357 11:51:11.307476 MTRR: Fixed MSR 0x258 0x0606060606060606
2358 11:51:11.307514 CPU physical address size: 39 bits
2359 11:51:11.307552 MTRR: Fixed MSR 0x259 0x0000000000000000
2360 11:51:11.307590 MTRR: Fixed MSR 0x26a 0x0606060606060606
2361 11:51:11.307628 MTRR: Fixed MSR 0x259 0x0000000000000000
2362 11:51:11.307666 MTRR: Fixed MSR 0x26b 0x0606060606060606
2363 11:51:11.307704 MTRR: Fixed MSR 0x26c 0x0606060606060606
2364 11:51:11.307741 MTRR: Fixed MSR 0x26d 0x0606060606060606
2365 11:51:11.307779 MTRR: Fixed MSR 0x26e 0x0606060606060606
2366 11:51:11.307816 MTRR: Fixed MSR 0x26f 0x0606060606060606
2367 11:51:11.307853 MTRR: Fixed MSR 0x268 0x0606060606060606
2368 11:51:11.307890 MTRR: Fixed MSR 0x269 0x0606060606060606
2369 11:51:11.307928 call enable_fixed_mtrr()
2370 11:51:11.307971 MTRR: Fixed MSR 0x268 0x0606060606060606
2371 11:51:11.308010 MTRR: Fixed MSR 0x269 0x0606060606060606
2372 11:51:11.308048 MTRR: Fixed MSR 0x26a 0x0606060606060606
2373 11:51:11.308086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2374 11:51:11.308125 MTRR: Fixed MSR 0x26c 0x0606060606060606
2375 11:51:11.308163 MTRR: Fixed MSR 0x26d 0x0606060606060606
2376 11:51:11.308201 MTRR: Fixed MSR 0x26e 0x0606060606060606
2377 11:51:11.308239 MTRR: Fixed MSR 0x26f 0x0606060606060606
2378 11:51:11.308277 MTRR: Fixed MSR 0x258 0x0606060606060606
2379 11:51:11.308314 MTRR: Fixed MSR 0x26b 0x0606060606060606
2380 11:51:11.308351 MTRR: Fixed MSR 0x259 0x0000000000000000
2381 11:51:11.308389 MTRR: Fixed MSR 0x268 0x0606060606060606
2382 11:51:11.308426 MTRR: Fixed MSR 0x269 0x0606060606060606
2383 11:51:11.308464 MTRR: Fixed MSR 0x26c 0x0606060606060606
2384 11:51:11.308503 MTRR: Fixed MSR 0x26d 0x0606060606060606
2385 11:51:11.308541 MTRR: Fixed MSR 0x26e 0x0606060606060606
2386 11:51:11.308579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2387 11:51:11.308617 CPU physical address size: 39 bits
2388 11:51:11.308655 call enable_fixed_mtrr()
2389 11:51:11.308692 call enable_fixed_mtrr()
2390 11:51:11.308729 MTRR: Fixed MSR 0x26a 0x0606060606060606
2391 11:51:11.308767 CPU physical address size: 39 bits
2392 11:51:11.308805 CPU physical address size: 39 bits
2393 11:51:11.308843 MTRR: Fixed MSR 0x26b 0x0606060606060606
2394 11:51:11.308881 MTRR: Fixed MSR 0x26a 0x0606060606060606
2395 11:51:11.308919 MTRR: Fixed MSR 0x26c 0x0606060606060606
2396 11:51:11.308956 MTRR: Fixed MSR 0x26d 0x0606060606060606
2397 11:51:11.308994 MTRR: Fixed MSR 0x26e 0x0606060606060606
2398 11:51:11.309032 MTRR: Fixed MSR 0x26f 0x0606060606060606
2399 11:51:11.309071 MTRR: Fixed MSR 0x26b 0x0606060606060606
2400 11:51:11.309108 call enable_fixed_mtrr()
2401 11:51:11.309156 MTRR: Fixed MSR 0x26c 0x0606060606060606
2402 11:51:11.309195 MTRR: Fixed MSR 0x26d 0x0606060606060606
2403 11:51:11.309234 MTRR: Fixed MSR 0x26e 0x0606060606060606
2404 11:51:11.309272 MTRR: Fixed MSR 0x26f 0x0606060606060606
2405 11:51:11.309310 CPU physical address size: 39 bits
2406 11:51:11.309348 call enable_fixed_mtrr()
2407 11:51:11.309387 CPU physical address size: 39 bits
2408 11:51:11.309425
2409 11:51:11.309463 MTRR check
2410 11:51:11.309501 Fixed MTRRs : Enabled
2411 11:51:11.309548 Variable MTRRs: Enabled
2412 11:51:11.309607
2413 11:51:11.309673 BS: BS_WRITE_TABLES exit times (exec / console): 249 / 150 ms
2414 11:51:11.309729 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2415 11:51:11.309772 Checking segment from ROM address 0xffc26dac
2416 11:51:11.309811 Checking segment from ROM address 0xffc26dc8
2417 11:51:11.309850 Loading segment from ROM address 0xffc26dac
2418 11:51:11.309887 code (compression=1)
2419 11:51:11.309926 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2420 11:51:11.310159 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2421 11:51:11.310214 using LZMA
2422 11:51:11.310262 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2423 11:51:11.310303 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2424 11:51:11.310341 Loading segment from ROM address 0xffc26dc8
2425 11:51:11.310380 Entry Point 0x30000000
2426 11:51:11.310418 Loaded segments
2427 11:51:11.310456 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2428 11:51:11.310495 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2429 11:51:11.310533 Finalizing chipset.
2430 11:51:11.310571 apm_control: Finalizing SMM.
2431 11:51:11.310610 APMC done.
2432 11:51:11.310649 HECI: CSE device 16.0 is hidden
2433 11:51:11.310687 HECI: CSE device 16.1 is disabled
2434 11:51:11.310726 HECI: CSE device 16.2 is disabled
2435 11:51:11.310763 HECI: CSE device 16.3 is disabled
2436 11:51:11.310801 HECI: CSE device 16.4 is disabled
2437 11:51:11.310840 HECI: CSE device 16.5 is disabled
2438 11:51:11.310877 HECI: CSE device 16.0 is hidden
2439 11:51:11.310917 CSE is disabled, cannot send End-of-Post (EOP) message
2440 11:51:11.310956 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2441 11:51:11.310995 mp_park_aps done after 0 msecs.
2442 11:51:11.311032 Jumping to boot code at 0x30000000(0x76892000)
2443 11:51:11.311071 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2444 11:51:11.311110
2445 11:51:11.311148
2446 11:51:11.311185
2447 11:51:11.311223 Starting depthcharge on Volmar...
2448 11:51:11.311263
2449 11:51:11.311302 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2450 11:51:11.311341
2451 11:51:11.311378 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2452 11:51:11.311416
2453 11:51:11.311454 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2454 11:51:11.311492
2455 11:51:11.311531 configure_storage: Failed to remap 1C:2
2456 11:51:11.311570
2457 11:51:11.311617 Wipe memory regions:
2458 11:51:11.311660
2459 11:51:11.311945 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2460 11:51:11.312030 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2461 11:51:11.312090 Setting prompt string to ['brya:']
2462 11:51:11.312146 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2463 11:51:11.313344 [0x00000000001000, 0x000000000a0000)
2464 11:51:11.313427
2465 11:51:11.316719 [0x00000000100000, 0x00000030000000)
2466 11:51:11.427694
2467 11:51:11.430875 [0x00000032668e60, 0x00000076858000)
2468 11:51:11.584116
2469 11:51:11.587534 [0x00000100000000, 0x0000027fc00000)
2470 11:51:12.450904
2471 11:51:12.454438 ec_init: CrosEC protocol v3 supported (256, 256)
2472 11:51:13.062074
2473 11:51:13.062187 R8152: Initializing
2474 11:51:13.062238
2475 11:51:13.065621 Version 9 (ocp_data = 6010)
2476 11:51:13.065693
2477 11:51:13.068667 R8152: Done initializing
2478 11:51:13.068764
2479 11:51:13.072171 Adding net device
2480 11:51:13.373478
2481 11:51:13.376812 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2482 11:51:13.376893
2483 11:51:13.376958
2484 11:51:13.377186 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2486 11:51:13.477555 brya: tftpboot 192.168.201.1 14202278/tftp-deploy-8fww6vgf/kernel/bzImage 14202278/tftp-deploy-8fww6vgf/kernel/cmdline 14202278/tftp-deploy-8fww6vgf/ramdisk/ramdisk.cpio.gz
2487 11:51:13.477768 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2488 11:51:13.477881 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2489 11:51:13.482130 tftpboot 192.168.201.1 14202278/tftp-deploy-8fww6vgf/kernel/bzIploy-8fww6vgf/kernel/cmdline 14202278/tftp-deploy-8fww6vgf/ramdisk/ramdisk.cpio.gz
2490 11:51:13.482217
2491 11:51:13.482270 Waiting for link
2492 11:51:13.685065
2493 11:51:13.685221 done.
2494 11:51:13.685280
2495 11:51:13.685326 MAC: 00:e0:4c:68:02:ef
2496 11:51:13.685367
2497 11:51:13.688515 Sending DHCP discover... done.
2498 11:51:13.688590
2499 11:51:13.691434 Waiting for reply... done.
2500 11:51:13.691506
2501 11:51:13.694550 Sending DHCP request... done.
2502 11:51:13.694625
2503 11:51:13.701340 Waiting for reply... done.
2504 11:51:13.701414
2505 11:51:13.701464 My ip is 192.168.201.16
2506 11:51:13.701508
2507 11:51:13.704574 The DHCP server ip is 192.168.201.1
2508 11:51:13.704647
2509 11:51:13.711557 TFTP server IP predefined by user: 192.168.201.1
2510 11:51:13.711630
2511 11:51:13.718315 Bootfile predefined by user: 14202278/tftp-deploy-8fww6vgf/kernel/bzImage
2512 11:51:13.718407
2513 11:51:13.721180 Sending tftp read request... done.
2514 11:51:13.721242
2515 11:51:13.724567 Waiting for the transfer...
2516 11:51:13.724646
2517 11:51:13.955461 00000000 ################################################################
2518 11:51:13.955574
2519 11:51:14.185046 00080000 ################################################################
2520 11:51:14.185175
2521 11:51:14.412522 00100000 ################################################################
2522 11:51:14.412642
2523 11:51:14.641341 00180000 ################################################################
2524 11:51:14.641468
2525 11:51:14.870121 00200000 ################################################################
2526 11:51:14.870232
2527 11:51:15.095857 00280000 ################################################################
2528 11:51:15.095968
2529 11:51:15.322875 00300000 ################################################################
2530 11:51:15.323000
2531 11:51:15.549262 00380000 ################################################################
2532 11:51:15.549374
2533 11:51:15.776341 00400000 ################################################################
2534 11:51:15.776448
2535 11:51:16.005351 00480000 ################################################################
2536 11:51:16.005471
2537 11:51:16.233725 00500000 ################################################################
2538 11:51:16.233845
2539 11:51:16.462625 00580000 ################################################################
2540 11:51:16.462736
2541 11:51:16.688308 00600000 ################################################################
2542 11:51:16.688466
2543 11:51:16.915832 00680000 ################################################################
2544 11:51:16.915941
2545 11:51:17.142703 00700000 ################################################################
2546 11:51:17.142813
2547 11:51:17.368990 00780000 ################################################################
2548 11:51:17.369105
2549 11:51:17.596449 00800000 ################################################################
2550 11:51:17.596563
2551 11:51:17.823335 00880000 ################################################################
2552 11:51:17.823463
2553 11:51:18.052038 00900000 ################################################################
2554 11:51:18.052149
2555 11:51:18.278673 00980000 ################################################################
2556 11:51:18.278784
2557 11:51:18.506628 00a00000 ################################################################
2558 11:51:18.506736
2559 11:51:18.734416 00a80000 ################################################################
2560 11:51:18.734528
2561 11:51:18.963007 00b00000 ################################################################
2562 11:51:18.963116
2563 11:51:19.190938 00b80000 ################################################################
2564 11:51:19.191048
2565 11:51:19.418637 00c00000 ################################################################
2566 11:51:19.418764
2567 11:51:19.648192 00c80000 ################################################################
2568 11:51:19.648318
2569 11:51:19.877138 00d00000 ################################################################
2570 11:51:19.877303
2571 11:51:20.106683 00d80000 ################################################################
2572 11:51:20.106794
2573 11:51:20.338380 00e00000 ################################################################
2574 11:51:20.338489
2575 11:51:20.567738 00e80000 ################################################################
2576 11:51:20.567850
2577 11:51:20.796579 00f00000 ################################################################
2578 11:51:20.796688
2579 11:51:21.026334 00f80000 ################################################################
2580 11:51:21.026447
2581 11:51:21.253694 01000000 ################################################################
2582 11:51:21.253829
2583 11:51:21.478038 01080000 ################################################################
2584 11:51:21.478148
2585 11:51:21.706621 01100000 ################################################################
2586 11:51:21.706742
2587 11:51:21.934464 01180000 ################################################################
2588 11:51:21.934587
2589 11:51:22.161582 01200000 ################################################################
2590 11:51:22.161688
2591 11:51:22.288941 01280000 #################################### done.
2592 11:51:22.289066
2593 11:51:22.292025 The bootfile was 19692576 bytes long.
2594 11:51:22.292098
2595 11:51:22.295492 Sending tftp read request... done.
2596 11:51:22.295580
2597 11:51:22.298885 Waiting for the transfer...
2598 11:51:22.298959
2599 11:51:22.527483 00000000 ################################################################
2600 11:51:22.527587
2601 11:51:22.753570 00080000 ################################################################
2602 11:51:22.753679
2603 11:51:22.979572 00100000 ################################################################
2604 11:51:22.979696
2605 11:51:23.204922 00180000 ################################################################
2606 11:51:23.205032
2607 11:51:23.430899 00200000 ################################################################
2608 11:51:23.431068
2609 11:51:23.656565 00280000 ################################################################
2610 11:51:23.656671
2611 11:51:23.882496 00300000 ################################################################
2612 11:51:23.882627
2613 11:51:24.109285 00380000 ################################################################
2614 11:51:24.109386
2615 11:51:24.334728 00400000 ################################################################
2616 11:51:24.334836
2617 11:51:24.561218 00480000 ################################################################
2618 11:51:24.561330
2619 11:51:24.786826 00500000 ################################################################
2620 11:51:24.786932
2621 11:51:25.012734 00580000 ################################################################
2622 11:51:25.012844
2623 11:51:25.239755 00600000 ################################################################
2624 11:51:25.239865
2625 11:51:25.465124 00680000 ################################################################
2626 11:51:25.465256
2627 11:51:25.690737 00700000 ################################################################
2628 11:51:25.690852
2629 11:51:25.916693 00780000 ################################################################
2630 11:51:25.916802
2631 11:51:26.144932 00800000 ################################################################
2632 11:51:26.145044
2633 11:51:26.374414 00880000 ################################################################
2634 11:51:26.374556
2635 11:51:26.604885 00900000 ################################################################
2636 11:51:26.604997
2637 11:51:26.829644 00980000 ################################################################
2638 11:51:26.829754
2639 11:51:27.013508 00a00000 ################################################### done.
2640 11:51:27.013657
2641 11:51:27.016749 Sending tftp read request... done.
2642 11:51:27.016808
2643 11:51:27.016865 Waiting for the transfer...
2644 11:51:27.019966
2645 11:51:27.020025 00000000 # done.
2646 11:51:27.020083
2647 11:51:27.029935 Command line loaded dynamically from TFTP file: 14202278/tftp-deploy-8fww6vgf/kernel/cmdline
2648 11:51:27.030020
2649 11:51:27.044378 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2650 11:51:27.052061
2651 11:51:27.055467 Shutting down all USB controllers.
2652 11:51:27.055850
2653 11:51:27.056079 Removing current net device
2654 11:51:27.056279
2655 11:51:27.058839 Finalizing coreboot
2656 11:51:27.059290
2657 11:51:27.065293 Exiting depthcharge with code 4 at timestamp: 25639517
2658 11:51:27.065620
2659 11:51:27.065845
2660 11:51:27.066041 Starting kernel ...
2661 11:51:27.066226
2662 11:51:27.066403
2663 11:51:27.067432 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2664 11:51:27.067770 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2665 11:51:27.068015 Setting prompt string to ['Linux version [0-9]']
2666 11:51:27.068234 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2667 11:51:27.068461 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2669 11:55:57.068530 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2671 11:55:57.069255 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2673 11:55:57.069819 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2676 11:55:57.070717 end: 2 depthcharge-action (duration 00:05:00) [common]
2678 11:55:57.071496 Cleaning after the job
2679 11:55:57.071787 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/ramdisk
2680 11:55:57.074194 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/kernel
2681 11:55:57.075863 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202278/tftp-deploy-8fww6vgf/modules
2682 11:55:57.076847 start: 4.1 power-off (timeout 00:00:30) [common]
2683 11:55:57.076972 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-3', '--port=1', '--command=off']
2684 11:55:57.999827 >> Command sent successfully.
2685 11:55:58.009914 Returned 0 in 0 seconds
2686 11:55:58.110884 end: 4.1 power-off (duration 00:00:01) [common]
2688 11:55:58.112146 start: 4.2 read-feedback (timeout 00:09:59) [common]
2689 11:55:58.112974 Listened to connection for namespace 'common' for up to 1s
2691 11:55:58.114128 Listened to connection for namespace 'common' for up to 1s
2692 11:55:59.113359 Finalising connection for namespace 'common'
2693 11:55:59.113911 Disconnecting from shell: Finalise
2694 11:55:59.114273
2695 11:55:59.215158 end: 4.2 read-feedback (duration 00:00:01) [common]
2696 11:55:59.215683 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14202278
2697 11:55:59.230405 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14202278
2698 11:55:59.230557 JobError: Your job cannot terminate cleanly.