Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 11:50:56.164412 lava-dispatcher, installed at version: 2024.03
2 11:50:56.164654 start: 0 validate
3 11:50:56.164785 Start time: 2024-06-06 11:50:56.164777+00:00 (UTC)
4 11:50:56.164900 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:50:56.165023 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 11:50:56.426746 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:50:56.427499 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-554-gb39d14135501e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:51:02.438233 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:51:02.438957 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:51:02.701171 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:51:02.701862 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-554-gb39d14135501e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:03.708690 validate duration: 7.54
14 11:51:03.708947 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:03.709050 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:03.709141 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:03.709257 Not decompressing ramdisk as can be used compressed.
18 11:51:03.709359 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
19 11:51:03.709428 saving as /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/ramdisk/initrd.cpio.gz
20 11:51:03.709492 total size: 6137767 (5 MB)
21 11:51:03.710534 progress 0 % (0 MB)
22 11:51:03.712325 progress 5 % (0 MB)
23 11:51:03.714088 progress 10 % (0 MB)
24 11:51:03.715854 progress 15 % (0 MB)
25 11:51:03.717519 progress 20 % (1 MB)
26 11:51:03.719129 progress 25 % (1 MB)
27 11:51:03.720922 progress 30 % (1 MB)
28 11:51:03.722513 progress 35 % (2 MB)
29 11:51:03.724088 progress 40 % (2 MB)
30 11:51:03.725825 progress 45 % (2 MB)
31 11:51:03.727312 progress 50 % (2 MB)
32 11:51:03.729001 progress 55 % (3 MB)
33 11:51:03.730488 progress 60 % (3 MB)
34 11:51:03.731979 progress 65 % (3 MB)
35 11:51:03.733673 progress 70 % (4 MB)
36 11:51:03.735154 progress 75 % (4 MB)
37 11:51:03.736694 progress 80 % (4 MB)
38 11:51:03.738336 progress 85 % (5 MB)
39 11:51:03.739826 progress 90 % (5 MB)
40 11:51:03.741381 progress 95 % (5 MB)
41 11:51:03.743034 progress 100 % (5 MB)
42 11:51:03.743176 5 MB downloaded in 0.03 s (173.77 MB/s)
43 11:51:03.743344 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:51:03.743590 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:51:03.743686 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:51:03.743810 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:51:03.743930 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-554-gb39d14135501e/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:51:03.743997 saving as /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/kernel/bzImage
50 11:51:03.744061 total size: 19692576 (18 MB)
51 11:51:03.744121 No compression specified
52 11:51:03.745288 progress 0 % (0 MB)
53 11:51:03.750322 progress 5 % (0 MB)
54 11:51:03.755387 progress 10 % (1 MB)
55 11:51:03.760561 progress 15 % (2 MB)
56 11:51:03.765637 progress 20 % (3 MB)
57 11:51:03.770710 progress 25 % (4 MB)
58 11:51:03.775747 progress 30 % (5 MB)
59 11:51:03.780810 progress 35 % (6 MB)
60 11:51:03.785807 progress 40 % (7 MB)
61 11:51:03.790804 progress 45 % (8 MB)
62 11:51:03.795861 progress 50 % (9 MB)
63 11:51:03.800908 progress 55 % (10 MB)
64 11:51:03.806060 progress 60 % (11 MB)
65 11:51:03.811069 progress 65 % (12 MB)
66 11:51:03.816059 progress 70 % (13 MB)
67 11:51:03.821015 progress 75 % (14 MB)
68 11:51:03.826067 progress 80 % (15 MB)
69 11:51:03.830991 progress 85 % (15 MB)
70 11:51:03.835847 progress 90 % (16 MB)
71 11:51:03.840717 progress 95 % (17 MB)
72 11:51:03.845590 progress 100 % (18 MB)
73 11:51:03.845828 18 MB downloaded in 0.10 s (184.55 MB/s)
74 11:51:03.845974 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:03.846204 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:03.846290 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:51:03.846372 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:51:03.846506 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
80 11:51:03.846573 saving as /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/nfsrootfs/full.rootfs.tar
81 11:51:03.846642 total size: 116951716 (111 MB)
82 11:51:03.846703 Using unxz to decompress xz
83 11:51:03.850731 progress 0 % (0 MB)
84 11:51:04.150516 progress 5 % (5 MB)
85 11:51:04.491824 progress 10 % (11 MB)
86 11:51:04.825664 progress 15 % (16 MB)
87 11:51:05.153476 progress 20 % (22 MB)
88 11:51:05.442276 progress 25 % (27 MB)
89 11:51:05.753885 progress 30 % (33 MB)
90 11:51:06.048416 progress 35 % (39 MB)
91 11:51:06.209279 progress 40 % (44 MB)
92 11:51:06.462386 progress 45 % (50 MB)
93 11:51:06.799964 progress 50 % (55 MB)
94 11:51:07.080023 progress 55 % (61 MB)
95 11:51:07.414351 progress 60 % (66 MB)
96 11:51:07.749743 progress 65 % (72 MB)
97 11:51:08.084724 progress 70 % (78 MB)
98 11:51:08.425835 progress 75 % (83 MB)
99 11:51:08.732346 progress 80 % (89 MB)
100 11:51:09.043875 progress 85 % (94 MB)
101 11:51:09.366726 progress 90 % (100 MB)
102 11:51:09.679711 progress 95 % (105 MB)
103 11:51:10.020072 progress 100 % (111 MB)
104 11:51:10.024993 111 MB downloaded in 6.18 s (18.05 MB/s)
105 11:51:10.025241 end: 1.3.1 http-download (duration 00:00:06) [common]
107 11:51:10.025497 end: 1.3 download-retry (duration 00:00:06) [common]
108 11:51:10.025585 start: 1.4 download-retry (timeout 00:09:54) [common]
109 11:51:10.025670 start: 1.4.1 http-download (timeout 00:09:54) [common]
110 11:51:10.025818 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-554-gb39d14135501e/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:51:10.025891 saving as /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/modules/modules.tar
112 11:51:10.025952 total size: 1624108 (1 MB)
113 11:51:10.026014 Using unxz to decompress xz
114 11:51:10.030053 progress 2 % (0 MB)
115 11:51:10.032262 progress 8 % (0 MB)
116 11:51:10.038227 progress 14 % (0 MB)
117 11:51:10.044169 progress 20 % (0 MB)
118 11:51:10.050320 progress 26 % (0 MB)
119 11:51:10.055859 progress 32 % (0 MB)
120 11:51:10.062274 progress 38 % (0 MB)
121 11:51:10.068521 progress 44 % (0 MB)
122 11:51:10.075902 progress 50 % (0 MB)
123 11:51:10.080933 progress 56 % (0 MB)
124 11:51:10.086956 progress 62 % (0 MB)
125 11:51:10.093890 progress 68 % (1 MB)
126 11:51:10.099834 progress 74 % (1 MB)
127 11:51:10.104832 progress 80 % (1 MB)
128 11:51:10.111474 progress 86 % (1 MB)
129 11:51:10.117238 progress 92 % (1 MB)
130 11:51:10.123489 progress 98 % (1 MB)
131 11:51:10.131374 1 MB downloaded in 0.11 s (14.69 MB/s)
132 11:51:10.131613 end: 1.4.1 http-download (duration 00:00:00) [common]
134 11:51:10.131877 end: 1.4 download-retry (duration 00:00:00) [common]
135 11:51:10.131972 start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
136 11:51:10.132064 start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
137 11:51:12.121075 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14202285/extract-nfsrootfs-yd5p15ds
138 11:51:12.121252 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
139 11:51:12.121350 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
140 11:51:12.121514 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0
141 11:51:12.121641 makedir: /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin
142 11:51:12.121743 makedir: /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/tests
143 11:51:12.121840 makedir: /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/results
144 11:51:12.121939 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-add-keys
145 11:51:12.122079 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-add-sources
146 11:51:12.122216 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-background-process-start
147 11:51:12.122363 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-background-process-stop
148 11:51:12.122489 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-common-functions
149 11:51:12.122615 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-echo-ipv4
150 11:51:12.122743 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-install-packages
151 11:51:12.122865 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-installed-packages
152 11:51:12.122987 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-os-build
153 11:51:12.123141 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-probe-channel
154 11:51:12.123265 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-probe-ip
155 11:51:12.123387 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-target-ip
156 11:51:12.123508 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-target-mac
157 11:51:12.123629 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-target-storage
158 11:51:12.123753 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-case
159 11:51:12.123875 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-event
160 11:51:12.123995 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-feedback
161 11:51:12.124116 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-raise
162 11:51:12.124235 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-reference
163 11:51:12.124357 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-runner
164 11:51:12.124485 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-set
165 11:51:12.124607 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-test-shell
166 11:51:12.124730 Updating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-install-packages (oe)
167 11:51:12.124878 Updating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/bin/lava-installed-packages (oe)
168 11:51:12.124995 Creating /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/environment
169 11:51:12.125089 LAVA metadata
170 11:51:12.125154 - LAVA_JOB_ID=14202285
171 11:51:12.125216 - LAVA_DISPATCHER_IP=192.168.201.1
172 11:51:12.125319 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
173 11:51:12.125386 skipped lava-vland-overlay
174 11:51:12.125464 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
175 11:51:12.125544 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
176 11:51:12.125605 skipped lava-multinode-overlay
177 11:51:12.125676 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
178 11:51:12.125755 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
179 11:51:12.125828 Loading test definitions
180 11:51:12.125914 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
181 11:51:12.125985 Using /lava-14202285 at stage 0
182 11:51:12.126290 uuid=14202285_1.5.2.3.1 testdef=None
183 11:51:12.126377 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
184 11:51:12.126460 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
185 11:51:12.126956 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
187 11:51:12.127171 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
188 11:51:12.127810 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
190 11:51:12.128037 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
191 11:51:12.128697 runner path: /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/0/tests/0_dmesg test_uuid 14202285_1.5.2.3.1
192 11:51:12.128888 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 11:51:12.129221 Creating lava-test-runner.conf files
195 11:51:12.129311 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14202285/lava-overlay-mhp1ojw0/lava-14202285/0 for stage 0
196 11:51:12.129428 - 0_dmesg
197 11:51:12.129552 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
198 11:51:12.129665 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
199 11:51:12.135916 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
200 11:51:12.136017 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
201 11:51:12.136101 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 11:51:12.136184 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
203 11:51:12.136267 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
204 11:51:12.287250 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 11:51:12.287606 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
206 11:51:12.287719 extracting modules file /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14202285/extract-nfsrootfs-yd5p15ds
207 11:51:12.330135 extracting modules file /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14202285/extract-overlay-ramdisk-aij7gjpu/ramdisk
208 11:51:12.373283 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 11:51:12.373441 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
210 11:51:12.373586 [common] Applying overlay to NFS
211 11:51:12.373663 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14202285/compress-overlay-7b23tsih/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14202285/extract-nfsrootfs-yd5p15ds
212 11:51:12.379950 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
213 11:51:12.380065 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
214 11:51:12.380154 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 11:51:12.380244 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
216 11:51:12.380322 Building ramdisk /var/lib/lava/dispatcher/tmp/14202285/extract-overlay-ramdisk-aij7gjpu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14202285/extract-overlay-ramdisk-aij7gjpu/ramdisk
217 11:51:12.504911 >> 48019 blocks
218 11:51:13.385794 rename /var/lib/lava/dispatcher/tmp/14202285/extract-overlay-ramdisk-aij7gjpu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/ramdisk/ramdisk.cpio.gz
219 11:51:13.386208 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 11:51:13.386325 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
221 11:51:13.386433 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
222 11:51:13.386525 No mkimage arch provided, not using FIT.
223 11:51:13.386610 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 11:51:13.386693 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 11:51:13.386796 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
226 11:51:13.386882 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
227 11:51:13.386961 No LXC device requested
228 11:51:13.387042 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 11:51:13.387130 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
230 11:51:13.387217 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 11:51:13.387291 Checking files for TFTP limit of 4294967296 bytes.
232 11:51:13.387697 end: 1 tftp-deploy (duration 00:00:10) [common]
233 11:51:13.387806 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 11:51:13.387901 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 11:51:13.388024 substitutions:
236 11:51:13.388092 - {DTB}: None
237 11:51:13.388155 - {INITRD}: 14202285/tftp-deploy-yj6xvjeb/ramdisk/ramdisk.cpio.gz
238 11:51:13.388217 - {KERNEL}: 14202285/tftp-deploy-yj6xvjeb/kernel/bzImage
239 11:51:13.388276 - {LAVA_MAC}: None
240 11:51:13.388333 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14202285/extract-nfsrootfs-yd5p15ds
241 11:51:13.388390 - {NFS_SERVER_IP}: 192.168.201.1
242 11:51:13.388452 - {PRESEED_CONFIG}: None
243 11:51:13.388544 - {PRESEED_LOCAL}: None
244 11:51:13.388599 - {RAMDISK}: 14202285/tftp-deploy-yj6xvjeb/ramdisk/ramdisk.cpio.gz
245 11:51:13.388655 - {ROOT_PART}: None
246 11:51:13.388709 - {ROOT}: None
247 11:51:13.388763 - {SERVER_IP}: 192.168.201.1
248 11:51:13.388817 - {TEE}: None
249 11:51:13.388870 Parsed boot commands:
250 11:51:13.388923 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 11:51:13.389099 Parsed boot commands: tftpboot 192.168.201.1 14202285/tftp-deploy-yj6xvjeb/kernel/bzImage 14202285/tftp-deploy-yj6xvjeb/kernel/cmdline 14202285/tftp-deploy-yj6xvjeb/ramdisk/ramdisk.cpio.gz
252 11:51:13.389186 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 11:51:13.389270 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 11:51:13.389365 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 11:51:13.389450 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 11:51:13.389525 Not connected, no need to disconnect.
257 11:51:13.389599 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 11:51:13.389679 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 11:51:13.389747 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
260 11:51:13.393420 Setting prompt string to ['lava-test: # ']
261 11:51:13.393757 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 11:51:13.393875 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 11:51:13.393978 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 11:51:13.394069 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 11:51:13.394260 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-9', '--port=1', '--command=reboot']
266 11:51:18.542945 >> Command sent successfully.
267 11:51:18.553093 Returned 0 in 5 seconds
268 11:51:18.654487 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 11:51:18.656029 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 11:51:18.656653 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 11:51:18.657183 Setting prompt string to 'Starting depthcharge on Volmar...'
273 11:51:18.657576 Changing prompt to 'Starting depthcharge on Volmar...'
274 11:51:18.657950 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
275 11:51:18.659853 [Enter `^Ec?' for help]
276 11:51:20.029341
277 11:51:20.029880
278 11:51:20.039884 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 bootblock starting (log level: 8)...
279 11:51:20.043905 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
280 11:51:20.047057 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000432
281 11:51:20.054921 CPU: AES supported, TXT NOT supported, VT supported
282 11:51:20.061952 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
283 11:51:20.062555 Cache size = 10 MiB
284 11:51:20.068549 MCH: device id 4609 (rev 04) is Alderlake-P
285 11:51:20.071967 PCH: device id 5182 (rev 01) is Alderlake-P SKU
286 11:51:20.079578 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
287 11:51:20.080124 VBOOT: Loading verstage.
288 11:51:20.086070 FMAP: Found "FLASH" version 1.1 at 0x1804000.
289 11:51:20.089009 FMAP: base = 0x0 size = 0x2000000 #areas = 37
290 11:51:20.092994 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 11:51:20.100865 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
292 11:51:20.110741 CBFS: Found 'fallback/verstage' @0x18df00 size 0x17368 in mcache @0xfef8597c
293 11:51:20.111304
294 11:51:20.111804
295 11:51:20.120401 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 verstage starting (log level: 8)...
296 11:51:20.128619 Probing TPM I2C: I2C bus 1 version 0x3230302a
297 11:51:20.132052 DW I2C bus 1 at 0xfe022000 (400 KHz)
298 11:51:20.134972 I2C TX abort detected (00000001)
299 11:51:20.138439 cr50_i2c_read: Address write failed
300 11:51:20.150848 .done! DID_VID 0x00281ae0
301 11:51:20.154268 TPM ready after 0 ms
302 11:51:20.158208 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
303 11:51:20.168511 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
304 11:51:20.175077 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 11:51:20.224774 tlcl_send_startup: Startup return code is 0
306 11:51:20.225340 TPM: setup succeeded
307 11:51:20.245864 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 11:51:20.268183 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 11:51:20.272106 Chrome EC: UHEPI supported
310 11:51:20.275505 Reading cr50 boot mode
311 11:51:20.290306 Cr50 says boot_mode is VERIFIED_RW(0x00).
312 11:51:20.290785 Phase 1
313 11:51:20.297226 FMAP: area GBB found @ 1805000 (458752 bytes)
314 11:51:20.303810 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 11:51:20.310712 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 11:51:20.317050 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
317 11:51:20.320429 Phase 2
318 11:51:20.320943 Phase 3
319 11:51:20.323842 FMAP: area GBB found @ 1805000 (458752 bytes)
320 11:51:20.330337 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
321 11:51:20.334036 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
322 11:51:20.341721 VB2:vb2_verify_keyblock() Checking keyblock signature...
323 11:51:20.348278 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
324 11:51:20.355326 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
325 11:51:20.361186 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
326 11:51:20.375693 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
327 11:51:20.378765 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 11:51:20.385184 VB2:vb2_verify_fw_preamble() Verifying preamble.
329 11:51:20.391877 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
330 11:51:20.398996 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
331 11:51:20.405601 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
332 11:51:20.409465 Phase 4
333 11:51:20.412669 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
334 11:51:20.419514 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
335 11:51:20.633598 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
336 11:51:20.640429 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
337 11:51:20.643379 Saving vboot hash.
338 11:51:20.650442 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
339 11:51:20.665620 tlcl_extend: response is 0
340 11:51:20.672821 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
341 11:51:20.679067 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
342 11:51:20.693474 tlcl_extend: response is 0
343 11:51:20.701365 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
344 11:51:20.720372 tlcl_lock_nv_write: response is 0
345 11:51:20.739130 tlcl_lock_nv_write: response is 0
346 11:51:20.739665 Slot A is selected
347 11:51:20.745888 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
348 11:51:20.752802 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
349 11:51:20.759356 CBFS: Found 'fallback/romstage' @0x0 size 0x1e770 in mcache @0xfef87600
350 11:51:20.765744 BS: verstage times (exec / console): total (unknown) / 266 ms
351 11:51:20.766220
352 11:51:20.766589
353 11:51:20.775892 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 romstage starting (log level: 8)...
354 11:51:20.779135 Google Chrome EC: version:
355 11:51:20.782375 ro: volmar_v2.0.14126-e605144e9c
356 11:51:20.785817 rw: volmar_v2.0.25064-969857a660
357 11:51:20.788907 running image: 2
358 11:51:20.796091 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
359 11:51:20.802341 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
360 11:51:20.809274 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
361 11:51:20.815730 CBFS: Found 'ecrw.hash' @0x80a80 size 0x20 in mcache @0xfef8785c
362 11:51:20.825746 VB2:check_ec_hash() Hexp RW(active): 472f9aad26329abccc24ce39c0bd099c387c49a6db929b56b777b04cd4b924c4
363 11:51:20.835624 VB2:check_ec_hash() Hmir: 472f9aad26329abccc24ce39c0bd099c387c49a6db929b56b777b04cd4b924c4
364 11:51:20.842574 EC took 1701us to calculate image hash
365 11:51:20.852560 VB2:check_ec_hash() Heff RW(active): 472f9aad26329abccc24ce39c0bd099c387c49a6db929b56b777b04cd4b924c4
366 11:51:20.855852 VB2:sync_ec() select_rw=RW(active)
367 11:51:20.866584 Waited 270us to clear limit power flag.
368 11:51:20.869918 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 11:51:20.873036 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 11:51:20.876501 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
371 11:51:20.883408 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
372 11:51:20.886370 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
373 11:51:20.889552 TCO_STS: 0000 0000
374 11:51:20.893123 GEN_PMCON: d0015038 00002200
375 11:51:20.896391 GBLRST_CAUSE: 00000000 00000000
376 11:51:20.896937 HPR_CAUSE0: 00000000
377 11:51:20.899739 prev_sleep_state 5
378 11:51:20.903419 Abort disabling TXT, as CPU is not TXT capable.
379 11:51:20.911755 cse_lite: Number of partitions = 3
380 11:51:20.914791 cse_lite: Current partition = RO
381 11:51:20.915265 cse_lite: Next partition = RO
382 11:51:20.918024 cse_lite: Flags = 0x7
383 11:51:20.924822 cse_lite: RO version = 16.1.30.2307 (Status=0x0, Start=0x2000, End=0x14ffff)
384 11:51:20.934631 cse_lite: RW version = 16.1.30.2307 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
385 11:51:20.937940 FMAP: area SI_ME found @ 1000 (5238784 bytes)
386 11:51:20.944677 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
387 11:51:20.951357 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
388 11:51:20.957746 CBFS: Found 'me_rw.version' @0x80980 size 0xd in mcache @0xfef877e8
389 11:51:20.961479 cse_lite: CSE CBFS RW version : 16.1.30.2307
390 11:51:20.967525 cse_lite: Set Boot Partition Info Command (RW)
391 11:51:20.971074 HECI: Global Reset(Type:1) Command
392 11:51:22.387801
393 11:51:22.388342
394 11:51:22.397498 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 bootblock starting (log level: 8)...
395 11:51:22.401149 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
396 11:51:22.407648 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000432
397 11:51:22.410949 CPU: AES supported, TXT NOT supported, VT supported
398 11:51:22.420647 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
399 11:51:22.421146 Cache size = 10 MiB
400 11:51:22.424319 MCH: device id 4609 (rev 04) is Alderlake-P
401 11:51:22.431680 PCH: device id 5182 (rev 01) is Alderlake-P SKU
402 11:51:22.435246 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
403 11:51:22.438294 VBOOT: Loading verstage.
404 11:51:22.441551 FMAP: Found "FLASH" version 1.1 at 0x1804000.
405 11:51:22.448522 FMAP: base = 0x0 size = 0x2000000 #areas = 37
406 11:51:22.451860 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
407 11:51:22.461603 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
408 11:51:22.468513 CBFS: Found 'fallback/verstage' @0x18df00 size 0x17368 in mcache @0xfef8597c
409 11:51:22.469064
410 11:51:22.469433
411 11:51:22.481956 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 verstage starting (log level: 8)...
412 11:51:22.484873 Probing TPM I2C: I2C bus 1 version 0x3230302a
413 11:51:22.489178 DW I2C bus 1 at 0xfe022000 (400 KHz)
414 11:51:22.492504 done! DID_VID 0x00281ae0
415 11:51:22.495899 TPM ready after 0 ms
416 11:51:22.499576 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
417 11:51:22.512731 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
418 11:51:22.520217 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
419 11:51:22.566446 tlcl_send_startup: Startup return code is 0
420 11:51:22.567021 TPM: setup succeeded
421 11:51:22.587648 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
422 11:51:22.609241 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
423 11:51:22.613458 Chrome EC: UHEPI supported
424 11:51:22.616349 Reading cr50 boot mode
425 11:51:22.631286 Cr50 says boot_mode is VERIFIED_RW(0x00).
426 11:51:22.631834 Phase 1
427 11:51:22.637663 FMAP: area GBB found @ 1805000 (458752 bytes)
428 11:51:22.644671 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
429 11:51:22.651280 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
430 11:51:22.657893 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
431 11:51:22.661197 Phase 2
432 11:51:22.661783 Phase 3
433 11:51:22.664758 FMAP: area GBB found @ 1805000 (458752 bytes)
434 11:51:22.671918 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
435 11:51:22.674707 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
436 11:51:22.681166 VB2:vb2_verify_keyblock() Checking keyblock signature...
437 11:51:22.688409 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
438 11:51:22.694540 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
439 11:51:22.704779 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
440 11:51:22.716603 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
441 11:51:22.719866 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
442 11:51:22.726256 VB2:vb2_verify_fw_preamble() Verifying preamble.
443 11:51:22.733045 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
444 11:51:22.739829 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
445 11:51:22.746199 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
446 11:51:22.750885 Phase 4
447 11:51:22.754179 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
448 11:51:22.760537 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
449 11:51:22.974924 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
450 11:51:22.981091 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
451 11:51:22.984733 Saving vboot hash.
452 11:51:22.991252 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
453 11:51:23.007394 tlcl_extend: response is 0
454 11:51:23.013973 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
455 11:51:23.020298 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
456 11:51:23.034897 tlcl_extend: response is 0
457 11:51:23.041078 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
458 11:51:23.061720 tlcl_lock_nv_write: response is 0
459 11:51:23.080710 tlcl_lock_nv_write: response is 0
460 11:51:23.081253 Slot A is selected
461 11:51:23.087156 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
462 11:51:23.093725 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
463 11:51:23.100332 CBFS: Found 'fallback/romstage' @0x0 size 0x1e770 in mcache @0xfef87600
464 11:51:23.107239 BS: verstage times (exec / console): total (unknown) / 259 ms
465 11:51:23.107783
466 11:51:23.108271
467 11:51:23.117323 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 romstage starting (log level: 8)...
468 11:51:23.120518 Google Chrome EC: version:
469 11:51:23.123374 ro: volmar_v2.0.14126-e605144e9c
470 11:51:23.126940 rw: volmar_v2.0.25064-969857a660
471 11:51:23.130794 running image: 2
472 11:51:23.136920 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
473 11:51:23.143489 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
474 11:51:23.150351 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
475 11:51:23.156581 CBFS: Found 'ecrw.hash' @0x80a80 size 0x20 in mcache @0xfef8785c
476 11:51:23.166920 VB2:check_ec_hash() Hexp RW(active): 472f9aad26329abccc24ce39c0bd099c387c49a6db929b56b777b04cd4b924c4
477 11:51:23.176804 VB2:check_ec_hash() Hmir: 472f9aad26329abccc24ce39c0bd099c387c49a6db929b56b777b04cd4b924c4
478 11:51:23.180361 EC took 936us to calculate image hash
479 11:51:23.191737 VB2:check_ec_hash() Heff RW(active): 472f9aad26329abccc24ce39c0bd099c387c49a6db929b56b777b04cd4b924c4
480 11:51:23.194817 VB2:sync_ec() select_rw=RW(active)
481 11:51:23.205369 Waited 270us to clear limit power flag.
482 11:51:23.208576 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
483 11:51:23.211890 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
484 11:51:23.215063 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
485 11:51:23.221731 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
486 11:51:23.224858 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
487 11:51:23.228210 TCO_STS: 0000 0000
488 11:51:23.231525 GEN_PMCON: d1001038 00002200
489 11:51:23.234976 GBLRST_CAUSE: 00000040 00000000
490 11:51:23.235406 HPR_CAUSE0: 00000000
491 11:51:23.238122 prev_sleep_state 5
492 11:51:23.244815 Abort disabling TXT, as CPU is not TXT capable.
493 11:51:23.248067 cse_lite: Number of partitions = 3
494 11:51:23.251415 cse_lite: Current partition = RW
495 11:51:23.255023 cse_lite: Next partition = RW
496 11:51:23.258185 cse_lite: Flags = 0x7
497 11:51:23.264925 cse_lite: RO version = 16.1.30.2307 (Status=0x0, Start=0x2000, End=0x14ffff)
498 11:51:23.271799 cse_lite: RW version = 16.1.30.2307 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
499 11:51:23.278307 FMAP: area SI_ME found @ 1000 (5238784 bytes)
500 11:51:23.284828 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
501 11:51:23.288244 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
502 11:51:23.294553 CBFS: Found 'me_rw.version' @0x80980 size 0xd in mcache @0xfef877e8
503 11:51:23.301293 cse_lite: CSE CBFS RW version : 16.1.30.2307
504 11:51:23.304558 Boot Count incremented to 11340
505 11:51:23.311498 CBFS: Found 'fspm.bin' @0x80fc0 size 0xc0000 in mcache @0xfef878fc
506 11:51:23.318272 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
507 11:51:23.331037 Probing TPM I2C: done! DID_VID 0x00281ae0
508 11:51:23.334150 Locality already claimed
509 11:51:23.337366 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
510 11:51:23.357333 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
511 11:51:23.363452 MRC: Hash idx 0x100d comparison successful.
512 11:51:23.367200 MRC cache found, size f6c8
513 11:51:23.367758 bootmode is set to: 2
514 11:51:23.372251 EC returned error result code 3
515 11:51:23.375574 FW_CONFIG value from CBI is 0x131
516 11:51:23.382589 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
517 11:51:23.385757 SPD index = 0
518 11:51:23.392218 CBFS: Found 'spd.bin' @0x7ad00 size 0x600 in mcache @0xfef8776c
519 11:51:23.392833 SPD: module type is LPDDR4X
520 11:51:23.400699 SPD: module part number is K4U6E3S4AB-MGCL
521 11:51:23.407296 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
522 11:51:23.410762 SPD: device width 16 bits, bus width 16 bits
523 11:51:23.414041 SPD: module size is 1024 MB (per channel)
524 11:51:23.484363 CBMEM:
525 11:51:23.487493 IMD: root @ 0x76fff000 254 entries.
526 11:51:23.490865 IMD: root @ 0x76ffec00 62 entries.
527 11:51:23.498790 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
528 11:51:23.501794 RO_VPD is uninitialized or empty.
529 11:51:23.505044 FMAP: area RW_VPD found @ f29000 (8192 bytes)
530 11:51:23.512204 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
531 11:51:23.515452 External stage cache:
532 11:51:23.518833 IMD: root @ 0x7bbff000 254 entries.
533 11:51:23.521888 IMD: root @ 0x7bbfec00 62 entries.
534 11:51:23.528775 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
535 11:51:23.535464 MRC: Checking cached data update for 'RW_MRC_CACHE'.
536 11:51:23.539306 MRC: 'RW_MRC_CACHE' does not need update.
537 11:51:23.539920 8 DIMMs found
538 11:51:23.542588 SMM Memory Map
539 11:51:23.546235 SMRAM : 0x7b800000 0x800000
540 11:51:23.549217 Subregion 0: 0x7b800000 0x200000
541 11:51:23.552318 Subregion 1: 0x7ba00000 0x200000
542 11:51:23.555832 Subregion 2: 0x7bc00000 0x400000
543 11:51:23.559398 top_of_ram = 0x77000000
544 11:51:23.562351 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
545 11:51:23.568785 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
546 11:51:23.575742 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
547 11:51:23.578637 MTRR Range: Start=ff000000 End=0 (Size 1000000)
548 11:51:23.579153 Normal boot
549 11:51:23.588970 CBFS: Found 'fallback/postcar' @0x188000 size 0x5e9c in mcache @0xfef87970
550 11:51:23.595356 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60
551 11:51:23.602213 Processing 237 relocs. Offset value of 0x74ab9000
552 11:51:23.605152 CLFLUSH [0x76ab9000, 0x76ac3e60]
553 11:51:23.609114 CLFLUSH [0x76abea80, 0x76abea84]
554 11:51:23.616970 BS: romstage times (exec / console): total (unknown) / 387 ms
555 11:51:23.620130 CLFLUSH [0x76ab8000, 0x77000000]
556 11:51:23.628420 CLFLUSH [0x7ba00000, 0x7bc00000]
557 11:51:23.638390
558 11:51:23.638990
559 11:51:23.647872 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 postcar starting (log level: 8)...
560 11:51:23.648413 Normal boot
561 11:51:23.655290 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
562 11:51:23.661541 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
563 11:51:23.668410 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
564 11:51:23.677881 CBFS: Found 'fallback/ramstage' @0x54c40 size 0x25544 in mcache @0x76add0b0
565 11:51:23.723840 Loading module at 0x76a2c000 with entry 0x76a2c000. filesize: 0x540c8 memsize: 0x8b290
566 11:51:23.730514 Processing 5947 relocs. Offset value of 0x72a2c000
567 11:51:23.734006 BS: postcar times (exec / console): total (unknown) / 54 ms
568 11:51:23.737016
569 11:51:23.737480
570 11:51:23.746885 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 ramstage starting (log level: 8)...
571 11:51:23.750663 Reserving BERT start 76a1b000, size 10000
572 11:51:23.754105 Normal boot
573 11:51:23.757084 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
574 11:51:23.764199 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
575 11:51:23.771977 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
576 11:51:23.774758 FMAP: area RW_VPD found @ f29000 (8192 bytes)
577 11:51:23.779542 Google Chrome EC: version:
578 11:51:23.782481 ro: volmar_v2.0.14126-e605144e9c
579 11:51:23.785891 rw: volmar_v2.0.25064-969857a660
580 11:51:23.789149 running image: 2
581 11:51:23.791961 ACPI _SWS is PM1 Index 8 GPE Index -1
582 11:51:23.798975 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
583 11:51:23.802650 EC returned error result code 3
584 11:51:23.805731 FW_CONFIG value from CBI is 0x131
585 11:51:23.812370 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
586 11:51:23.816131 PCI: 00:1c.2 disabled by fw_config
587 11:51:23.819384 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
588 11:51:23.825983 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
589 11:51:23.829123 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
590 11:51:23.835844 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
591 11:51:23.839084 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
592 11:51:23.849399 CBFS: Found 'cpu_microcode_blob.bin' @0x1e800 size 0x36400 in mcache @0x76add080
593 11:51:23.852578 microcode: sig=0x906a4 pf=0x80 revision=0x432
594 11:51:23.859469 microcode: Update skipped, already up-to-date
595 11:51:23.865964 CBFS: Found 'fsps.bin' @0x141000 size 0x46fc8 in mcache @0x76add33c
596 11:51:23.896597 Detected 6 core, 8 thread CPU.
597 11:51:23.899633 Setting up SMI for CPU
598 11:51:23.903132 IED base = 0x7bc00000
599 11:51:23.903600 IED size = 0x00400000
600 11:51:23.906725 Will perform SMM setup.
601 11:51:23.909745 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
602 11:51:23.913454 LAPIC 0x0 in XAPIC mode.
603 11:51:23.922894 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
604 11:51:23.926485 Processing 18 relocs. Offset value of 0x00030000
605 11:51:23.930968 Attempting to start 7 APs
606 11:51:23.934424 Waiting for 10ms after sending INIT.
607 11:51:23.947782 Waiting for SIPI to complete...
608 11:51:23.951280 done.
609 11:51:23.951894 LAPIC 0x1 in XAPIC mode.
610 11:51:23.954471 Waiting for SIPI to complete...
611 11:51:23.960991 AP: slot 6 apic_id 1, MCU rev: 0x00000432
612 11:51:23.961501 done.
613 11:51:23.964175 LAPIC 0x12 in XAPIC mode.
614 11:51:23.964867 LAPIC 0x9 in XAPIC mode.
615 11:51:23.967645 LAPIC 0x16 in XAPIC mode.
616 11:51:23.971008 LAPIC 0x8 in XAPIC mode.
617 11:51:23.974234 LAPIC 0x10 in XAPIC mode.
618 11:51:23.977412 AP: slot 1 apic_id 16, MCU rev: 0x00000432
619 11:51:23.980816 AP: slot 3 apic_id 12, MCU rev: 0x00000432
620 11:51:23.984561 LAPIC 0x14 in XAPIC mode.
621 11:51:23.987189 AP: slot 2 apic_id 10, MCU rev: 0x00000432
622 11:51:23.993842 AP: slot 4 apic_id 14, MCU rev: 0x00000432
623 11:51:23.997385 AP: slot 7 apic_id 8, MCU rev: 0x00000432
624 11:51:24.000629 AP: slot 5 apic_id 9, MCU rev: 0x00000432
625 11:51:24.004011 smm_setup_relocation_handler: enter
626 11:51:24.007676 smm_setup_relocation_handler: exit
627 11:51:24.016962 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
628 11:51:24.020660 Processing 11 relocs. Offset value of 0x00038000
629 11:51:24.027197 smm_module_setup_stub: stack_top = 0x7b804000
630 11:51:24.030357 smm_module_setup_stub: per cpu stack_size = 0x800
631 11:51:24.037269 smm_module_setup_stub: runtime.start32_offset = 0x4c
632 11:51:24.040241 smm_module_setup_stub: runtime.smm_size = 0x10000
633 11:51:24.046913 SMM Module: stub loaded at 38000. Will call 0x76a500e0
634 11:51:24.050441 Installing permanent SMM handler to 0x7b800000
635 11:51:24.053696 FX_SAVE [0x7b9ff000-0x7ba00000]
636 11:51:24.060305 HANDLER [0x7b9f5000-0x7b9fe568]
637 11:51:24.060835
638 11:51:24.061335 CPU 0
639 11:51:24.063416 ss0 [0x7b9f4c00-0x7b9f5000]
640 11:51:24.066982 stub0 [0x7b9ed000-0x7b9ed208]
641 11:51:24.067551
642 11:51:24.068010 CPU 1
643 11:51:24.070472 ss1 [0x7b9f4800-0x7b9f4c00]
644 11:51:24.076852 stub1 [0x7b9ecc00-0x7b9ece08]
645 11:51:24.077323
646 11:51:24.077730 CPU 2
647 11:51:24.080328 ss2 [0x7b9f4400-0x7b9f4800]
648 11:51:24.083704 stub2 [0x7b9ec800-0x7b9eca08]
649 11:51:24.084295
650 11:51:24.084786 CPU 3
651 11:51:24.087052 ss3 [0x7b9f4000-0x7b9f4400]
652 11:51:24.093480 stub3 [0x7b9ec400-0x7b9ec608]
653 11:51:24.093953
654 11:51:24.094320 CPU 4
655 11:51:24.096661 ss4 [0x7b9f3c00-0x7b9f4000]
656 11:51:24.100284 stub4 [0x7b9ec000-0x7b9ec208]
657 11:51:24.100801
658 11:51:24.101173 CPU 5
659 11:51:24.103787 ss5 [0x7b9f3800-0x7b9f3c00]
660 11:51:24.110244 stub5 [0x7b9ebc00-0x7b9ebe08]
661 11:51:24.110784
662 11:51:24.111159 CPU 6
663 11:51:24.113373 ss6 [0x7b9f3400-0x7b9f3800]
664 11:51:24.116875 stub6 [0x7b9eb800-0x7b9eba08]
665 11:51:24.117440
666 11:51:24.117851 CPU 7
667 11:51:24.120580 ss7 [0x7b9f3000-0x7b9f3400]
668 11:51:24.126591 stub7 [0x7b9eb400-0x7b9eb608]
669 11:51:24.127078
670 11:51:24.130197 stacks [0x7b800000-0x7b804000]
671 11:51:24.136724 Loading module at 0x7b9f5000 with entry 0x7b9f5d5f. filesize: 0x4448 memsize: 0x9568
672 11:51:24.143656 Processing 255 relocs. Offset value of 0x7b9f5000
673 11:51:24.150370 Loading module at 0x7b9ed000 with entry 0x7b9ed000. filesize: 0x208 memsize: 0x208
674 11:51:24.156636 Processing 11 relocs. Offset value of 0x7b9ed000
675 11:51:24.160350 smm_module_setup_stub: stack_top = 0x7b804000
676 11:51:24.166818 smm_module_setup_stub: per cpu stack_size = 0x800
677 11:51:24.170301 smm_module_setup_stub: runtime.start32_offset = 0x4c
678 11:51:24.176815 smm_module_setup_stub: runtime.smm_size = 0x200000
679 11:51:24.180975 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x1
680 11:51:24.187084 smm_place_entry_code: copying from 7b9ed000 to 7b9ecc00 0x208 bytes
681 11:51:24.193231 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x2
682 11:51:24.200376 smm_place_entry_code: copying from 7b9ed000 to 7b9ec800 0x208 bytes
683 11:51:24.207237 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x3
684 11:51:24.213693 smm_place_entry_code: copying from 7b9ed000 to 7b9ec400 0x208 bytes
685 11:51:24.220058 SMM Module: placing smm entry code at 7b9ec000, cpu # 0x4
686 11:51:24.226980 smm_place_entry_code: copying from 7b9ed000 to 7b9ec000 0x208 bytes
687 11:51:24.233102 SMM Module: placing smm entry code at 7b9ebc00, cpu # 0x5
688 11:51:24.239923 smm_place_entry_code: copying from 7b9ed000 to 7b9ebc00 0x208 bytes
689 11:51:24.243145 SMM Module: placing smm entry code at 7b9eb800, cpu # 0x6
690 11:51:24.250116 smm_place_entry_code: copying from 7b9ed000 to 7b9eb800 0x208 bytes
691 11:51:24.256631 SMM Module: placing smm entry code at 7b9eb400, cpu # 0x7
692 11:51:24.263207 smm_place_entry_code: copying from 7b9ed000 to 7b9eb400 0x208 bytes
693 11:51:24.269627 SMM Module: stub loaded at 7b9ed000. Will call 0x7b9f5d5f
694 11:51:24.273422 Clearing SMI status registers
695 11:51:24.276612 SMI_STS: PM1
696 11:51:24.279933 PM1_STS: WAK PWRBTN
697 11:51:24.286623 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 0
698 11:51:24.289787 In relocation handler: CPU 0
699 11:51:24.293328 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
700 11:51:24.296567 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 11:51:24.299940 Relocation complete.
702 11:51:24.306522 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3800, cpu = 6
703 11:51:24.310105 In relocation handler: CPU 6
704 11:51:24.313134 New SMBASE=0x7b9e3800 IEDBASE=0x7bc00000
705 11:51:24.316699 Relocation complete.
706 11:51:24.323571 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 2
707 11:51:24.326662 In relocation handler: CPU 2
708 11:51:24.329668 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
709 11:51:24.336382 Writing SMRR. base = 0x7b800006, mask=0xff800c00
710 11:51:24.336922 Relocation complete.
711 11:51:24.343250 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3c00, cpu = 5
712 11:51:24.346328 In relocation handler: CPU 5
713 11:51:24.353395 New SMBASE=0x7b9e3c00 IEDBASE=0x7bc00000
714 11:51:24.353948 Relocation complete.
715 11:51:24.360169 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 1
716 11:51:24.363489 In relocation handler: CPU 1
717 11:51:24.366827 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
718 11:51:24.373411 Writing SMRR. base = 0x7b800006, mask=0xff800c00
719 11:51:24.376743 Relocation complete.
720 11:51:24.382840 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3400, cpu = 7
721 11:51:24.386413 In relocation handler: CPU 7
722 11:51:24.389831 New SMBASE=0x7b9e3400 IEDBASE=0x7bc00000
723 11:51:24.393144 Writing SMRR. base = 0x7b800006, mask=0xff800c00
724 11:51:24.396520 Relocation complete.
725 11:51:24.403207 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 3
726 11:51:24.406290 In relocation handler: CPU 3
727 11:51:24.410069 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
728 11:51:24.416309 Writing SMRR. base = 0x7b800006, mask=0xff800c00
729 11:51:24.416818 Relocation complete.
730 11:51:24.422791 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4000, cpu = 4
731 11:51:24.426294 In relocation handler: CPU 4
732 11:51:24.432934 New SMBASE=0x7b9e4000 IEDBASE=0x7bc00000
733 11:51:24.436486 Writing SMRR. base = 0x7b800006, mask=0xff800c00
734 11:51:24.439507 Relocation complete.
735 11:51:24.439977 Initializing CPU #0
736 11:51:24.443054 CPU: vendor Intel device 906a4
737 11:51:24.446501 CPU: family 06, model 9a, stepping 04
738 11:51:24.449311 Clearing out pending MCEs
739 11:51:24.452878 cpu: energy policy set to 7
740 11:51:24.455951 Turbo is available but hidden
741 11:51:24.459558 Turbo is available and visible
742 11:51:24.462906 microcode: Update skipped, already up-to-date
743 11:51:24.466537 CPU #0 initialized
744 11:51:24.469628 Initializing CPU #6
745 11:51:24.470099 Initializing CPU #2
746 11:51:24.472802 Initializing CPU #4
747 11:51:24.473284 Initializing CPU #3
748 11:51:24.476253 CPU: vendor Intel device 906a4
749 11:51:24.479458 CPU: family 06, model 9a, stepping 04
750 11:51:24.482985 Initializing CPU #5
751 11:51:24.486393 Initializing CPU #7
752 11:51:24.489540 CPU: vendor Intel device 906a4
753 11:51:24.492619 CPU: family 06, model 9a, stepping 04
754 11:51:24.496074 Clearing out pending MCEs
755 11:51:24.496628 Clearing out pending MCEs
756 11:51:24.499445 CPU: vendor Intel device 906a4
757 11:51:24.502825 CPU: family 06, model 9a, stepping 04
758 11:51:24.506245 Initializing CPU #1
759 11:51:24.509719 CPU: vendor Intel device 906a4
760 11:51:24.512879 CPU: family 06, model 9a, stepping 04
761 11:51:24.516042 cpu: energy policy set to 7
762 11:51:24.519606 CPU: vendor Intel device 906a4
763 11:51:24.523264 CPU: family 06, model 9a, stepping 04
764 11:51:24.526232 CPU: vendor Intel device 906a4
765 11:51:24.529479 CPU: family 06, model 9a, stepping 04
766 11:51:24.532408 Clearing out pending MCEs
767 11:51:24.536103 Clearing out pending MCEs
768 11:51:24.539426 cpu: energy policy set to 7
769 11:51:24.539899 cpu: energy policy set to 7
770 11:51:24.542665 Clearing out pending MCEs
771 11:51:24.546055 CPU: vendor Intel device 906a4
772 11:51:24.549150 CPU: family 06, model 9a, stepping 04
773 11:51:24.555834 microcode: Update skipped, already up-to-date
774 11:51:24.556338 CPU #6 initialized
775 11:51:24.559413 Clearing out pending MCEs
776 11:51:24.562550 Clearing out pending MCEs
777 11:51:24.566217 microcode: Update skipped, already up-to-date
778 11:51:24.569185 CPU #4 initialized
779 11:51:24.572960 cpu: energy policy set to 7
780 11:51:24.573457 cpu: energy policy set to 7
781 11:51:24.575954 cpu: energy policy set to 7
782 11:51:24.579962 cpu: energy policy set to 7
783 11:51:24.586307 microcode: Update skipped, already up-to-date
784 11:51:24.586916 CPU #5 initialized
785 11:51:24.592752 microcode: Update skipped, already up-to-date
786 11:51:24.593223 CPU #1 initialized
787 11:51:24.599158 microcode: Update skipped, already up-to-date
788 11:51:24.599634 CPU #7 initialized
789 11:51:24.602842 microcode: Update skipped, already up-to-date
790 11:51:24.605683 CPU #2 initialized
791 11:51:24.609318 microcode: Update skipped, already up-to-date
792 11:51:24.612297 CPU #3 initialized
793 11:51:24.616001 bsp_do_flight_plan done after 652 msecs.
794 11:51:24.619049 CPU: frequency set to 4400 MHz
795 11:51:24.623094 Enabling SMIs.
796 11:51:24.625839 Ramoops buffer: 0x100000@0x7689b000.
797 11:51:24.632947 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 447 ms
798 11:51:24.648250 Probing TPM I2C: done! DID_VID 0x00281ae0
799 11:51:24.651786 Locality already claimed
800 11:51:24.654974 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
801 11:51:24.666466 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
802 11:51:24.670136 Enabling GPIO PM b/c CR50 has long IRQ pulse support
803 11:51:24.676141 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
804 11:51:24.683288 CBFS: Found 'vbt.bin' @0x80440 size 0x4ee in mcache @0x76add1b8
805 11:51:24.686601 Found a VBT of 9216 bytes after decompression
806 11:51:24.689639 PCI 1.0, PIN A, using IRQ #16
807 11:51:24.693456 PCI 2.0, PIN A, using IRQ #17
808 11:51:24.696350 PCI 4.0, PIN A, using IRQ #18
809 11:51:24.699522 PCI 5.0, PIN A, using IRQ #16
810 11:51:24.703459 PCI 6.0, PIN A, using IRQ #16
811 11:51:24.706718 PCI 6.2, PIN C, using IRQ #18
812 11:51:24.709796 PCI 7.0, PIN A, using IRQ #19
813 11:51:24.713394 PCI 7.1, PIN B, using IRQ #20
814 11:51:24.716278 PCI 7.2, PIN C, using IRQ #21
815 11:51:24.719983 PCI 7.3, PIN D, using IRQ #22
816 11:51:24.723007 PCI 8.0, PIN A, using IRQ #23
817 11:51:24.726359 PCI D.0, PIN A, using IRQ #17
818 11:51:24.726857 PCI D.1, PIN B, using IRQ #19
819 11:51:24.729735 PCI 10.0, PIN A, using IRQ #24
820 11:51:24.733004 PCI 10.1, PIN B, using IRQ #25
821 11:51:24.736293 PCI 10.6, PIN C, using IRQ #20
822 11:51:24.739500 PCI 10.7, PIN D, using IRQ #21
823 11:51:24.742999 PCI 11.0, PIN A, using IRQ #26
824 11:51:24.746224 PCI 11.1, PIN B, using IRQ #27
825 11:51:24.749530 PCI 11.2, PIN C, using IRQ #28
826 11:51:24.752734 PCI 11.3, PIN D, using IRQ #29
827 11:51:24.756289 PCI 12.0, PIN A, using IRQ #30
828 11:51:24.759419 PCI 12.6, PIN B, using IRQ #31
829 11:51:24.763350 PCI 12.7, PIN C, using IRQ #22
830 11:51:24.766181 PCI 13.0, PIN A, using IRQ #32
831 11:51:24.769930 PCI 13.1, PIN B, using IRQ #33
832 11:51:24.772933 PCI 13.2, PIN C, using IRQ #34
833 11:51:24.776098 PCI 13.3, PIN D, using IRQ #35
834 11:51:24.779970 PCI 14.0, PIN B, using IRQ #23
835 11:51:24.780605 PCI 14.1, PIN A, using IRQ #36
836 11:51:24.782607 PCI 14.3, PIN C, using IRQ #17
837 11:51:24.786212 PCI 15.0, PIN A, using IRQ #37
838 11:51:24.789479 PCI 15.1, PIN B, using IRQ #38
839 11:51:24.792642 PCI 15.2, PIN C, using IRQ #39
840 11:51:24.795977 PCI 15.3, PIN D, using IRQ #40
841 11:51:24.799586 PCI 16.0, PIN A, using IRQ #18
842 11:51:24.802783 PCI 16.1, PIN B, using IRQ #19
843 11:51:24.806382 PCI 16.2, PIN C, using IRQ #20
844 11:51:24.809591 PCI 16.3, PIN D, using IRQ #21
845 11:51:24.812947 PCI 16.4, PIN A, using IRQ #18
846 11:51:24.816272 PCI 16.5, PIN B, using IRQ #19
847 11:51:24.819672 PCI 17.0, PIN A, using IRQ #22
848 11:51:24.822710 PCI 19.0, PIN A, using IRQ #41
849 11:51:24.826243 PCI 19.1, PIN B, using IRQ #42
850 11:51:24.829171 PCI 19.2, PIN C, using IRQ #43
851 11:51:24.832361 PCI 1C.0, PIN A, using IRQ #16
852 11:51:24.832873 PCI 1C.1, PIN B, using IRQ #17
853 11:51:24.835971 PCI 1C.2, PIN C, using IRQ #18
854 11:51:24.839673 PCI 1C.3, PIN D, using IRQ #19
855 11:51:24.842555 PCI 1C.4, PIN A, using IRQ #16
856 11:51:24.846159 PCI 1C.5, PIN B, using IRQ #17
857 11:51:24.849263 PCI 1C.6, PIN C, using IRQ #18
858 11:51:24.852897 PCI 1C.7, PIN D, using IRQ #19
859 11:51:24.856142 PCI 1D.0, PIN A, using IRQ #16
860 11:51:24.859697 PCI 1D.1, PIN B, using IRQ #17
861 11:51:24.862562 PCI 1D.2, PIN C, using IRQ #18
862 11:51:24.865988 PCI 1D.3, PIN D, using IRQ #19
863 11:51:24.869004 PCI 1E.0, PIN A, using IRQ #23
864 11:51:24.872258 PCI 1E.1, PIN B, using IRQ #20
865 11:51:24.875663 PCI 1E.2, PIN C, using IRQ #44
866 11:51:24.878927 PCI 1E.3, PIN D, using IRQ #45
867 11:51:24.882788 PCI 1F.3, PIN B, using IRQ #22
868 11:51:24.886079 PCI 1F.4, PIN C, using IRQ #23
869 11:51:24.886640 PCI 1F.6, PIN D, using IRQ #20
870 11:51:24.888877 PCI 1F.7, PIN A, using IRQ #21
871 11:51:24.895630 IRQ: Using dynamically assigned PCI IO-APIC IRQs
872 11:51:24.902573 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
873 11:51:25.086285 FSPS returned 0
874 11:51:25.089875 Executing Phase 1 of FspMultiPhaseSiInit
875 11:51:25.099842 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
876 11:51:25.102874 port C0 DISC req: usage 1 usb3 1 usb2 1
877 11:51:25.106374 Raw Buffer output 0 00000111
878 11:51:25.109472 Raw Buffer output 1 00000000
879 11:51:25.113067 pmc_send_ipc_cmd succeeded
880 11:51:25.119836 port C1 DISC req: usage 1 usb3 3 usb2 3
881 11:51:25.120385 Raw Buffer output 0 00000331
882 11:51:25.122888 Raw Buffer output 1 00000000
883 11:51:25.127347 pmc_send_ipc_cmd succeeded
884 11:51:25.131244 Detected 6 core, 8 thread CPU.
885 11:51:25.135027 Detected 6 core, 8 thread CPU.
886 11:51:25.139530 Detected 6 core, 8 thread CPU.
887 11:51:25.143376 Detected 6 core, 8 thread CPU.
888 11:51:25.146374 Detected 6 core, 8 thread CPU.
889 11:51:25.149486 Detected 6 core, 8 thread CPU.
890 11:51:25.152578 Detected 6 core, 8 thread CPU.
891 11:51:25.156115 Detected 6 core, 8 thread CPU.
892 11:51:25.159665 Detected 6 core, 8 thread CPU.
893 11:51:25.162845 Detected 6 core, 8 thread CPU.
894 11:51:25.166331 Detected 6 core, 8 thread CPU.
895 11:51:25.169453 Detected 6 core, 8 thread CPU.
896 11:51:25.172671 Detected 6 core, 8 thread CPU.
897 11:51:25.175804 Detected 6 core, 8 thread CPU.
898 11:51:25.179272 Detected 6 core, 8 thread CPU.
899 11:51:25.182701 Detected 6 core, 8 thread CPU.
900 11:51:25.186188 Detected 6 core, 8 thread CPU.
901 11:51:25.189393 Detected 6 core, 8 thread CPU.
902 11:51:25.192717 Detected 6 core, 8 thread CPU.
903 11:51:25.195804 Detected 6 core, 8 thread CPU.
904 11:51:25.199045 Detected 6 core, 8 thread CPU.
905 11:51:25.202711 Detected 6 core, 8 thread CPU.
906 11:51:25.683127 Detected 6 core, 8 thread CPU.
907 11:51:25.686273 Detected 6 core, 8 thread CPU.
908 11:51:25.689447 Detected 6 core, 8 thread CPU.
909 11:51:25.693332 Detected 6 core, 8 thread CPU.
910 11:51:25.696321 Detected 6 core, 8 thread CPU.
911 11:51:25.699916 Detected 6 core, 8 thread CPU.
912 11:51:25.703094 Detected 6 core, 8 thread CPU.
913 11:51:25.706357 Detected 6 core, 8 thread CPU.
914 11:51:25.710074 Detected 6 core, 8 thread CPU.
915 11:51:25.713068 Detected 6 core, 8 thread CPU.
916 11:51:25.716338 Detected 6 core, 8 thread CPU.
917 11:51:25.719553 Detected 6 core, 8 thread CPU.
918 11:51:25.723122 Detected 6 core, 8 thread CPU.
919 11:51:25.725966 Detected 6 core, 8 thread CPU.
920 11:51:25.729813 Detected 6 core, 8 thread CPU.
921 11:51:25.733089 Detected 6 core, 8 thread CPU.
922 11:51:25.736040 Detected 6 core, 8 thread CPU.
923 11:51:25.739641 Detected 6 core, 8 thread CPU.
924 11:51:25.742925 Detected 6 core, 8 thread CPU.
925 11:51:25.746309 Detected 6 core, 8 thread CPU.
926 11:51:25.749569 Display FSP Version Info HOB
927 11:51:25.752758 Reference Code - CPU = c.0.65.70
928 11:51:25.753234 uCode Version = 0.0.4.32
929 11:51:25.756373 TXT ACM version = ff.ff.ff.ffff
930 11:51:25.759354 Reference Code - ME = c.0.65.70
931 11:51:25.763075 MEBx version = 0.0.0.0
932 11:51:25.765994 ME Firmware Version = Lite SKU
933 11:51:25.769591 Reference Code - PCH = c.0.65.70
934 11:51:25.772978 PCH-CRID Status = Disabled
935 11:51:25.776190 PCH-CRID Original Value = ff.ff.ff.ffff
936 11:51:25.779705 PCH-CRID New Value = ff.ff.ff.ffff
937 11:51:25.782823 OPROM - RST - RAID = ff.ff.ff.ffff
938 11:51:25.786043 PCH Hsio Version = 4.0.0.0
939 11:51:25.789421 Reference Code - SA - System Agent = c.0.65.70
940 11:51:25.792946 Reference Code - MRC = 0.0.3.80
941 11:51:25.796258 SA - PCIe Version = c.0.65.70
942 11:51:25.799224 SA-CRID Status = Disabled
943 11:51:25.802796 SA-CRID Original Value = 0.0.0.4
944 11:51:25.806158 SA-CRID New Value = 0.0.0.4
945 11:51:25.809442 OPROM - VBIOS = ff.ff.ff.ffff
946 11:51:25.812430 IO Manageability Engine FW Version = 24.0.6.0
947 11:51:25.816132 PHY Build Version = 0.0.0.2041
948 11:51:25.819596 Thunderbolt(TM) FW Version = 0.0.0.0
949 11:51:25.825990 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
950 11:51:25.829055 Sending EOP early from SoC
951 11:51:25.832256 HECI: Sending End-of-Post
952 11:51:25.839033 BS: BS_DEV_INIT_CHIPS run times (exec / console): 687 / 512 ms
953 11:51:25.839574 Enumerating buses...
954 11:51:25.845862 Show all devs... Before device enumeration.
955 11:51:25.846333 Root Device: enabled 1
956 11:51:25.849318 CPU_CLUSTER: 0: enabled 1
957 11:51:25.852362 DOMAIN: 0000: enabled 1
958 11:51:25.852861 GPIO: 0: enabled 1
959 11:51:25.855605 PCI: 00:00.0: enabled 1
960 11:51:25.859160 PCI: 00:01.0: enabled 0
961 11:51:25.862557 PCI: 00:01.1: enabled 0
962 11:51:25.863112 PCI: 00:02.0: enabled 1
963 11:51:25.865777 PCI: 00:04.0: enabled 1
964 11:51:25.869468 PCI: 00:05.0: enabled 0
965 11:51:25.872370 PCI: 00:06.0: enabled 1
966 11:51:25.872871 PCI: 00:06.2: enabled 0
967 11:51:25.875811 PCI: 00:07.0: enabled 0
968 11:51:25.879114 PCI: 00:07.1: enabled 0
969 11:51:25.882621 PCI: 00:07.2: enabled 0
970 11:51:25.883183 PCI: 00:07.3: enabled 0
971 11:51:25.885803 PCI: 00:08.0: enabled 0
972 11:51:25.888610 PCI: 00:09.0: enabled 0
973 11:51:25.892051 PCI: 00:0a.0: enabled 1
974 11:51:25.892552 PCI: 00:0d.0: enabled 1
975 11:51:25.895769 PCI: 00:0d.1: enabled 0
976 11:51:25.898969 PCI: 00:0d.2: enabled 0
977 11:51:25.899440 PCI: 00:0d.3: enabled 0
978 11:51:25.902271 PCI: 00:0e.0: enabled 0
979 11:51:25.905611 PCI: 00:10.0: enabled 0
980 11:51:25.908540 PCI: 00:10.1: enabled 0
981 11:51:25.909011 PCI: 00:10.6: enabled 0
982 11:51:25.912142 PCI: 00:10.7: enabled 0
983 11:51:25.915759 PCI: 00:12.0: enabled 0
984 11:51:25.918960 PCI: 00:12.6: enabled 0
985 11:51:25.919522 PCI: 00:12.7: enabled 0
986 11:51:25.921922 PCI: 00:13.0: enabled 0
987 11:51:25.925767 PCI: 00:14.0: enabled 1
988 11:51:25.929094 PCI: 00:14.1: enabled 0
989 11:51:25.929567 PCI: 00:14.2: enabled 1
990 11:51:25.932277 PCI: 00:14.3: enabled 1
991 11:51:25.935552 PCI: 00:15.0: enabled 1
992 11:51:25.936092 PCI: 00:15.1: enabled 1
993 11:51:25.938581 PCI: 00:15.2: enabled 0
994 11:51:25.941856 PCI: 00:15.3: enabled 1
995 11:51:25.945171 PCI: 00:16.0: enabled 1
996 11:51:25.945640 PCI: 00:16.1: enabled 0
997 11:51:25.948965 PCI: 00:16.2: enabled 0
998 11:51:25.952115 PCI: 00:16.3: enabled 0
999 11:51:25.955412 PCI: 00:16.4: enabled 0
1000 11:51:25.955880 PCI: 00:16.5: enabled 0
1001 11:51:25.958740 PCI: 00:17.0: enabled 1
1002 11:51:25.962230 PCI: 00:19.0: enabled 0
1003 11:51:25.965201 PCI: 00:19.1: enabled 1
1004 11:51:25.965668 PCI: 00:19.2: enabled 0
1005 11:51:25.968473 PCI: 00:1a.0: enabled 0
1006 11:51:25.972128 PCI: 00:1c.0: enabled 0
1007 11:51:25.975611 PCI: 00:1c.1: enabled 0
1008 11:51:25.976209 PCI: 00:1c.2: enabled 0
1009 11:51:25.978703 PCI: 00:1c.3: enabled 0
1010 11:51:25.982062 PCI: 00:1c.4: enabled 0
1011 11:51:25.982576 PCI: 00:1c.5: enabled 0
1012 11:51:25.985207 PCI: 00:1c.6: enabled 0
1013 11:51:25.988416 PCI: 00:1c.7: enabled 0
1014 11:51:25.991856 PCI: 00:1d.0: enabled 0
1015 11:51:25.992328 PCI: 00:1d.1: enabled 0
1016 11:51:25.995364 PCI: 00:1d.2: enabled 0
1017 11:51:25.998815 PCI: 00:1d.3: enabled 0
1018 11:51:26.002033 PCI: 00:1e.0: enabled 1
1019 11:51:26.002500 PCI: 00:1e.1: enabled 0
1020 11:51:26.005038 PCI: 00:1e.2: enabled 0
1021 11:51:26.008763 PCI: 00:1e.3: enabled 1
1022 11:51:26.011956 PCI: 00:1f.0: enabled 1
1023 11:51:26.012424 PCI: 00:1f.1: enabled 0
1024 11:51:26.015065 PCI: 00:1f.2: enabled 1
1025 11:51:26.018590 PCI: 00:1f.3: enabled 1
1026 11:51:26.019100 PCI: 00:1f.4: enabled 0
1027 11:51:26.021770 PCI: 00:1f.5: enabled 1
1028 11:51:26.025125 PCI: 00:1f.6: enabled 0
1029 11:51:26.028947 PCI: 00:1f.7: enabled 0
1030 11:51:26.029430 GENERIC: 0.0: enabled 1
1031 11:51:26.032380 GENERIC: 0.0: enabled 1
1032 11:51:26.035695 GENERIC: 0.0: enabled 1
1033 11:51:26.038799 GENERIC: 1.0: enabled 1
1034 11:51:26.039267 GENERIC: 0.0: enabled 1
1035 11:51:26.042260 GENERIC: 1.0: enabled 1
1036 11:51:26.045019 USB0 port 0: enabled 1
1037 11:51:26.048415 USB0 port 0: enabled 1
1038 11:51:26.049006 GENERIC: 0.0: enabled 1
1039 11:51:26.051749 I2C: 00:1a: enabled 1
1040 11:51:26.055416 I2C: 00:31: enabled 1
1041 11:51:26.055976 I2C: 00:32: enabled 1
1042 11:51:26.058755 I2C: 00:50: enabled 1
1043 11:51:26.061496 I2C: 00:10: enabled 1
1044 11:51:26.061964 I2C: 00:15: enabled 1
1045 11:51:26.064764 I2C: 00:2c: enabled 1
1046 11:51:26.068386 GENERIC: 0.0: enabled 1
1047 11:51:26.068968 SPI: 00: enabled 1
1048 11:51:26.071731 PNP: 0c09.0: enabled 1
1049 11:51:26.074891 GENERIC: 0.0: enabled 1
1050 11:51:26.075430 USB3 port 0: enabled 1
1051 11:51:26.078519 USB3 port 1: enabled 0
1052 11:51:26.081392 USB3 port 2: enabled 1
1053 11:51:26.085043 USB3 port 3: enabled 0
1054 11:51:26.085511 USB2 port 0: enabled 1
1055 11:51:26.088175 USB2 port 1: enabled 0
1056 11:51:26.091695 USB2 port 2: enabled 1
1057 11:51:26.092160 USB2 port 3: enabled 0
1058 11:51:26.094966 USB2 port 4: enabled 0
1059 11:51:26.098201 USB2 port 5: enabled 1
1060 11:51:26.101350 USB2 port 6: enabled 0
1061 11:51:26.101814 USB2 port 7: enabled 0
1062 11:51:26.105206 USB2 port 8: enabled 1
1063 11:51:26.108221 USB2 port 9: enabled 1
1064 11:51:26.108718 USB3 port 0: enabled 1
1065 11:51:26.111511 USB3 port 1: enabled 0
1066 11:51:26.115608 USB3 port 2: enabled 0
1067 11:51:26.116175 USB3 port 3: enabled 0
1068 11:51:26.118549 GENERIC: 0.0: enabled 1
1069 11:51:26.121563 GENERIC: 1.0: enabled 1
1070 11:51:26.125105 APIC: 00: enabled 1
1071 11:51:26.125651 APIC: 16: enabled 1
1072 11:51:26.128319 APIC: 10: enabled 1
1073 11:51:26.128838 APIC: 12: enabled 1
1074 11:51:26.131659 APIC: 14: enabled 1
1075 11:51:26.134695 APIC: 09: enabled 1
1076 11:51:26.135162 APIC: 01: enabled 1
1077 11:51:26.138120 APIC: 08: enabled 1
1078 11:51:26.138590 Compare with tree...
1079 11:51:26.141362 Root Device: enabled 1
1080 11:51:26.144579 CPU_CLUSTER: 0: enabled 1
1081 11:51:26.148122 APIC: 00: enabled 1
1082 11:51:26.148623 APIC: 16: enabled 1
1083 11:51:26.151401 APIC: 10: enabled 1
1084 11:51:26.155027 APIC: 12: enabled 1
1085 11:51:26.155489 APIC: 14: enabled 1
1086 11:51:26.157953 APIC: 09: enabled 1
1087 11:51:26.161898 APIC: 01: enabled 1
1088 11:51:26.162479 APIC: 08: enabled 1
1089 11:51:26.164779 DOMAIN: 0000: enabled 1
1090 11:51:26.168380 GPIO: 0: enabled 1
1091 11:51:26.171566 PCI: 00:00.0: enabled 1
1092 11:51:26.172046 PCI: 00:01.0: enabled 0
1093 11:51:26.174982 PCI: 00:01.1: enabled 0
1094 11:51:26.177888 PCI: 00:02.0: enabled 1
1095 11:51:26.181686 GENERIC: 0.0: enabled 1
1096 11:51:26.184638 PCI: 00:04.0: enabled 1
1097 11:51:26.185124 GENERIC: 0.0: enabled 1
1098 11:51:26.188216 PCI: 00:05.0: enabled 0
1099 11:51:26.191491 PCI: 00:06.0: enabled 1
1100 11:51:26.194808 PCI: 00:06.2: enabled 0
1101 11:51:26.198187 PCI: 00:08.0: enabled 0
1102 11:51:26.198673 PCI: 00:09.0: enabled 0
1103 11:51:26.201969 PCI: 00:0a.0: enabled 1
1104 11:51:26.204721 PCI: 00:0d.0: enabled 1
1105 11:51:26.208208 USB0 port 0: enabled 1
1106 11:51:26.211318 USB3 port 0: enabled 1
1107 11:51:26.211805 USB3 port 1: enabled 0
1108 11:51:26.215115 USB3 port 2: enabled 1
1109 11:51:26.218097 USB3 port 3: enabled 0
1110 11:51:26.221368 PCI: 00:0d.1: enabled 0
1111 11:51:26.224706 PCI: 00:0d.2: enabled 0
1112 11:51:26.225272 PCI: 00:0d.3: enabled 0
1113 11:51:26.228572 PCI: 00:0e.0: enabled 0
1114 11:51:26.231115 PCI: 00:10.0: enabled 0
1115 11:51:26.234987 PCI: 00:10.1: enabled 0
1116 11:51:26.238057 PCI: 00:10.6: enabled 0
1117 11:51:26.238524 PCI: 00:10.7: enabled 0
1118 11:51:26.241072 PCI: 00:12.0: enabled 0
1119 11:51:26.244578 PCI: 00:12.6: enabled 0
1120 11:51:26.247791 PCI: 00:12.7: enabled 0
1121 11:51:26.251032 PCI: 00:13.0: enabled 0
1122 11:51:26.251497 PCI: 00:14.0: enabled 1
1123 11:51:26.254619 USB0 port 0: enabled 1
1124 11:51:26.257607 USB2 port 0: enabled 1
1125 11:51:26.261483 USB2 port 1: enabled 0
1126 11:51:26.264429 USB2 port 2: enabled 1
1127 11:51:26.267818 USB2 port 3: enabled 0
1128 11:51:26.268301 USB2 port 4: enabled 0
1129 11:51:26.271318 USB2 port 5: enabled 1
1130 11:51:26.274756 USB2 port 6: enabled 0
1131 11:51:26.278130 USB2 port 7: enabled 0
1132 11:51:26.281043 USB2 port 8: enabled 1
1133 11:51:26.281620 USB2 port 9: enabled 1
1134 11:51:26.284847 USB3 port 0: enabled 1
1135 11:51:26.288072 USB3 port 1: enabled 0
1136 11:51:26.291806 USB3 port 2: enabled 0
1137 11:51:26.294934 USB3 port 3: enabled 0
1138 11:51:26.297618 PCI: 00:14.1: enabled 0
1139 11:51:26.298085 PCI: 00:14.2: enabled 1
1140 11:51:26.301328 PCI: 00:14.3: enabled 1
1141 11:51:26.305039 GENERIC: 0.0: enabled 1
1142 11:51:26.308200 PCI: 00:15.0: enabled 1
1143 11:51:26.308854 I2C: 00:1a: enabled 1
1144 11:51:26.311547 I2C: 00:31: enabled 1
1145 11:51:26.314939 I2C: 00:32: enabled 1
1146 11:51:26.317938 PCI: 00:15.1: enabled 1
1147 11:51:26.321801 I2C: 00:50: enabled 1
1148 11:51:26.322543 PCI: 00:15.2: enabled 0
1149 11:51:26.324361 PCI: 00:15.3: enabled 1
1150 11:51:26.327941 I2C: 00:10: enabled 1
1151 11:51:26.331504 PCI: 00:16.0: enabled 1
1152 11:51:26.334865 PCI: 00:16.1: enabled 0
1153 11:51:26.335433 PCI: 00:16.2: enabled 0
1154 11:51:26.337809 PCI: 00:16.3: enabled 0
1155 11:51:26.341152 PCI: 00:16.4: enabled 0
1156 11:51:26.344279 PCI: 00:16.5: enabled 0
1157 11:51:26.344908 PCI: 00:17.0: enabled 1
1158 11:51:26.347811 PCI: 00:19.0: enabled 0
1159 11:51:26.351245 PCI: 00:19.1: enabled 1
1160 11:51:26.354422 I2C: 00:15: enabled 1
1161 11:51:26.358029 I2C: 00:2c: enabled 1
1162 11:51:26.358500 PCI: 00:19.2: enabled 0
1163 11:51:26.360773 PCI: 00:1a.0: enabled 0
1164 11:51:26.363964 PCI: 00:1e.0: enabled 1
1165 11:51:26.367817 PCI: 00:1e.1: enabled 0
1166 11:51:26.370983 PCI: 00:1e.2: enabled 0
1167 11:51:26.371746 PCI: 00:1e.3: enabled 1
1168 11:51:26.374390 SPI: 00: enabled 1
1169 11:51:26.377908 PCI: 00:1f.0: enabled 1
1170 11:51:26.380727 PNP: 0c09.0: enabled 1
1171 11:51:26.381194 PCI: 00:1f.1: enabled 0
1172 11:51:26.384595 PCI: 00:1f.2: enabled 1
1173 11:51:26.387536 GENERIC: 0.0: enabled 1
1174 11:51:26.391102 GENERIC: 0.0: enabled 1
1175 11:51:26.394077 GENERIC: 1.0: enabled 1
1176 11:51:26.397263 PCI: 00:1f.3: enabled 1
1177 11:51:26.397883 PCI: 00:1f.4: enabled 0
1178 11:51:26.400858 PCI: 00:1f.5: enabled 1
1179 11:51:26.404280 PCI: 00:1f.6: enabled 0
1180 11:51:26.407461 PCI: 00:1f.7: enabled 0
1181 11:51:26.407925 Root Device scanning...
1182 11:51:26.410971 scan_static_bus for Root Device
1183 11:51:26.414267 CPU_CLUSTER: 0 enabled
1184 11:51:26.417270 DOMAIN: 0000 enabled
1185 11:51:26.420915 DOMAIN: 0000 scanning...
1186 11:51:26.421496 PCI: pci_scan_bus for bus 00
1187 11:51:26.423909 PCI: 00:00.0 [8086/0000] ops
1188 11:51:26.427428 PCI: 00:00.0 [8086/4609] enabled
1189 11:51:26.430975 PCI: 00:02.0 [8086/0000] bus ops
1190 11:51:26.434128 PCI: 00:02.0 [8086/46b3] enabled
1191 11:51:26.437142 PCI: 00:04.0 [8086/0000] bus ops
1192 11:51:26.440910 PCI: 00:04.0 [8086/461d] enabled
1193 11:51:26.444163 PCI: 00:06.0 [8086/0000] bus ops
1194 11:51:26.447314 PCI: 00:06.0 [8086/464d] enabled
1195 11:51:26.450767 PCI: 00:08.0 [8086/464f] disabled
1196 11:51:26.454228 PCI: 00:0a.0 [8086/467d] enabled
1197 11:51:26.457744 PCI: 00:0d.0 [8086/0000] bus ops
1198 11:51:26.460802 PCI: 00:0d.0 [8086/461e] enabled
1199 11:51:26.464745 PCI: 00:14.0 [8086/0000] bus ops
1200 11:51:26.467681 PCI: 00:14.0 [8086/51ed] enabled
1201 11:51:26.471375 PCI: 00:14.2 [8086/51ef] enabled
1202 11:51:26.474681 PCI: 00:14.3 [8086/0000] bus ops
1203 11:51:26.478136 PCI: 00:14.3 [8086/51f0] enabled
1204 11:51:26.481277 PCI: 00:15.0 [8086/0000] bus ops
1205 11:51:26.484426 PCI: 00:15.0 [8086/51e8] enabled
1206 11:51:26.488175 PCI: 00:15.1 [8086/0000] bus ops
1207 11:51:26.491468 PCI: 00:15.1 [8086/51e9] enabled
1208 11:51:26.494479 PCI: 00:15.2 [8086/0000] bus ops
1209 11:51:26.501098 PCI: 00:15.2 [8086/51ea] disabled
1210 11:51:26.504541 PCI: 00:15.3 [8086/0000] bus ops
1211 11:51:26.508115 PCI: 00:15.3 [8086/51eb] enabled
1212 11:51:26.508709 PCI: 00:16.0 [8086/0000] ops
1213 11:51:26.511393 PCI: 00:16.0 [8086/51e0] enabled
1214 11:51:26.517696 PCI: Static device PCI: 00:17.0 not found, disabling it.
1215 11:51:26.521039 PCI: 00:19.0 [8086/0000] bus ops
1216 11:51:26.524613 PCI: 00:19.0 [8086/51c5] disabled
1217 11:51:26.527757 PCI: 00:19.1 [8086/0000] bus ops
1218 11:51:26.530956 PCI: 00:19.1 [8086/51c6] enabled
1219 11:51:26.534515 PCI: 00:1e.0 [8086/0000] ops
1220 11:51:26.537889 PCI: 00:1e.0 [8086/51a8] enabled
1221 11:51:26.540954 PCI: 00:1e.3 [8086/0000] bus ops
1222 11:51:26.544528 PCI: 00:1e.3 [8086/51ab] enabled
1223 11:51:26.547694 PCI: 00:1f.0 [8086/0000] bus ops
1224 11:51:26.551044 PCI: 00:1f.0 [8086/5182] enabled
1225 11:51:26.554496 RTC Init
1226 11:51:26.557380 Set power on after power failure.
1227 11:51:26.560958 Disabling Deep S3
1228 11:51:26.561419 Disabling Deep S3
1229 11:51:26.564692 Disabling Deep S4
1230 11:51:26.565152 Disabling Deep S4
1231 11:51:26.567489 Disabling Deep S5
1232 11:51:26.568041 Disabling Deep S5
1233 11:51:26.571019 PCI: 00:1f.2 [0000/0000] hidden
1234 11:51:26.574252 PCI: 00:1f.3 [8086/0000] bus ops
1235 11:51:26.577864 PCI: 00:1f.3 [8086/51c8] enabled
1236 11:51:26.580969 PCI: 00:1f.5 [8086/0000] bus ops
1237 11:51:26.584332 PCI: 00:1f.5 [8086/51a4] enabled
1238 11:51:26.588069 GPIO: 0 enabled
1239 11:51:26.591313 PCI: Leftover static devices:
1240 11:51:26.591902 PCI: 00:01.0
1241 11:51:26.594491 PCI: 00:01.1
1242 11:51:26.594952 PCI: 00:05.0
1243 11:51:26.595317 PCI: 00:06.2
1244 11:51:26.597725 PCI: 00:09.0
1245 11:51:26.598239 PCI: 00:0d.1
1246 11:51:26.600924 PCI: 00:0d.2
1247 11:51:26.601463 PCI: 00:0d.3
1248 11:51:26.601828 PCI: 00:0e.0
1249 11:51:26.604405 PCI: 00:10.0
1250 11:51:26.604906 PCI: 00:10.1
1251 11:51:26.607435 PCI: 00:10.6
1252 11:51:26.607894 PCI: 00:10.7
1253 11:51:26.608257 PCI: 00:12.0
1254 11:51:26.611078 PCI: 00:12.6
1255 11:51:26.611606 PCI: 00:12.7
1256 11:51:26.614592 PCI: 00:13.0
1257 11:51:26.615157 PCI: 00:14.1
1258 11:51:26.617558 PCI: 00:16.1
1259 11:51:26.618018 PCI: 00:16.2
1260 11:51:26.618378 PCI: 00:16.3
1261 11:51:26.620953 PCI: 00:16.4
1262 11:51:26.621415 PCI: 00:16.5
1263 11:51:26.624564 PCI: 00:17.0
1264 11:51:26.625025 PCI: 00:19.2
1265 11:51:26.625429 PCI: 00:1a.0
1266 11:51:26.627227 PCI: 00:1e.1
1267 11:51:26.627688 PCI: 00:1e.2
1268 11:51:26.630902 PCI: 00:1f.1
1269 11:51:26.631404 PCI: 00:1f.4
1270 11:51:26.631781 PCI: 00:1f.6
1271 11:51:26.633995 PCI: 00:1f.7
1272 11:51:26.637714 PCI: Check your devicetree.cb.
1273 11:51:26.640735 PCI: 00:02.0 scanning...
1274 11:51:26.644061 scan_generic_bus for PCI: 00:02.0
1275 11:51:26.644593 GENERIC: 0.0 enabled
1276 11:51:26.650661 bus: PCI: 00:02.0[0]->scan_generic_bus for PCI: 00:02.0 done
1277 11:51:26.654325 scan_bus: bus PCI: 00:02.0 finished in 11 msecs
1278 11:51:26.657573 PCI: 00:04.0 scanning...
1279 11:51:26.661025 scan_generic_bus for PCI: 00:04.0
1280 11:51:26.664180 GENERIC: 0.0 enabled
1281 11:51:26.670846 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1282 11:51:26.674208 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1283 11:51:26.677472 PCI: 00:06.0 scanning...
1284 11:51:26.680588 do_pci_scan_bridge for PCI: 00:06.0
1285 11:51:26.684284 PCI: pci_scan_bus for bus 01
1286 11:51:26.687235 PCI: 01:00.0 [15b7/5009] enabled
1287 11:51:26.691289 Enabling Common Clock Configuration
1288 11:51:26.694205 L1 Sub-State supported from root port 6
1289 11:51:26.697561 L1 Sub-State Support = 0x5
1290 11:51:26.700526 CommonModeRestoreTime = 0x6e
1291 11:51:26.704203 Power On Value = 0x5, Power On Scale = 0x2
1292 11:51:26.707393 ASPM: Enabled L1
1293 11:51:26.710617 PCIe: Max_Payload_Size adjusted to 256
1294 11:51:26.714420 PCI: 01:00.0: Enabled LTR
1295 11:51:26.717229 PCI: 01:00.0: Programmed LTR max latencies
1296 11:51:26.721284 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1297 11:51:26.724183 PCI: 00:0d.0 scanning...
1298 11:51:26.727313 scan_static_bus for PCI: 00:0d.0
1299 11:51:26.730808 USB0 port 0 enabled
1300 11:51:26.733967 USB0 port 0 scanning...
1301 11:51:26.737647 scan_static_bus for USB0 port 0
1302 11:51:26.738113 USB3 port 0 enabled
1303 11:51:26.740846 USB3 port 1 disabled
1304 11:51:26.741308 USB3 port 2 enabled
1305 11:51:26.743884 USB3 port 3 disabled
1306 11:51:26.747141 USB3 port 0 scanning...
1307 11:51:26.750779 scan_static_bus for USB3 port 0
1308 11:51:26.754297 scan_static_bus for USB3 port 0 done
1309 11:51:26.757579 scan_bus: bus USB3 port 0 finished in 6 msecs
1310 11:51:26.760641 USB3 port 2 scanning...
1311 11:51:26.763938 scan_static_bus for USB3 port 2
1312 11:51:26.767290 scan_static_bus for USB3 port 2 done
1313 11:51:26.774256 scan_bus: bus USB3 port 2 finished in 6 msecs
1314 11:51:26.777398 scan_static_bus for USB0 port 0 done
1315 11:51:26.780418 scan_bus: bus USB0 port 0 finished in 43 msecs
1316 11:51:26.783700 scan_static_bus for PCI: 00:0d.0 done
1317 11:51:26.790361 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1318 11:51:26.790845 PCI: 00:14.0 scanning...
1319 11:51:26.793711 scan_static_bus for PCI: 00:14.0
1320 11:51:26.797907 USB0 port 0 enabled
1321 11:51:26.800394 USB0 port 0 scanning...
1322 11:51:26.803867 scan_static_bus for USB0 port 0
1323 11:51:26.804350 USB2 port 0 enabled
1324 11:51:26.807103 USB2 port 1 disabled
1325 11:51:26.810291 USB2 port 2 enabled
1326 11:51:26.810773 USB2 port 3 disabled
1327 11:51:26.813852 USB2 port 4 disabled
1328 11:51:26.816858 USB2 port 5 enabled
1329 11:51:26.817339 USB2 port 6 disabled
1330 11:51:26.820932 USB2 port 7 disabled
1331 11:51:26.821525 USB2 port 8 enabled
1332 11:51:26.823901 USB2 port 9 enabled
1333 11:51:26.826885 USB3 port 0 enabled
1334 11:51:26.827365 USB3 port 1 disabled
1335 11:51:26.830365 USB3 port 2 disabled
1336 11:51:26.833681 USB3 port 3 disabled
1337 11:51:26.834165 USB2 port 0 scanning...
1338 11:51:26.836909 scan_static_bus for USB2 port 0
1339 11:51:26.840427 scan_static_bus for USB2 port 0 done
1340 11:51:26.846753 scan_bus: bus USB2 port 0 finished in 6 msecs
1341 11:51:26.850063 USB2 port 2 scanning...
1342 11:51:26.853574 scan_static_bus for USB2 port 2
1343 11:51:26.857237 scan_static_bus for USB2 port 2 done
1344 11:51:26.860437 scan_bus: bus USB2 port 2 finished in 6 msecs
1345 11:51:26.863575 USB2 port 5 scanning...
1346 11:51:26.867090 scan_static_bus for USB2 port 5
1347 11:51:26.870722 scan_static_bus for USB2 port 5 done
1348 11:51:26.873356 scan_bus: bus USB2 port 5 finished in 6 msecs
1349 11:51:26.876988 USB2 port 8 scanning...
1350 11:51:26.879852 scan_static_bus for USB2 port 8
1351 11:51:26.883460 scan_static_bus for USB2 port 8 done
1352 11:51:26.886947 scan_bus: bus USB2 port 8 finished in 6 msecs
1353 11:51:26.889989 USB2 port 9 scanning...
1354 11:51:26.893136 scan_static_bus for USB2 port 9
1355 11:51:26.896846 scan_static_bus for USB2 port 9 done
1356 11:51:26.903555 scan_bus: bus USB2 port 9 finished in 6 msecs
1357 11:51:26.904118 USB3 port 0 scanning...
1358 11:51:26.906976 scan_static_bus for USB3 port 0
1359 11:51:26.910632 scan_static_bus for USB3 port 0 done
1360 11:51:26.916641 scan_bus: bus USB3 port 0 finished in 6 msecs
1361 11:51:26.920283 scan_static_bus for USB0 port 0 done
1362 11:51:26.923705 scan_bus: bus USB0 port 0 finished in 120 msecs
1363 11:51:26.930022 scan_static_bus for PCI: 00:14.0 done
1364 11:51:26.933282 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1365 11:51:26.936397 PCI: 00:14.3 scanning...
1366 11:51:26.939684 scan_static_bus for PCI: 00:14.3
1367 11:51:26.940148 GENERIC: 0.0 enabled
1368 11:51:26.946544 scan_static_bus for PCI: 00:14.3 done
1369 11:51:26.949615 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1370 11:51:26.953034 PCI: 00:15.0 scanning...
1371 11:51:26.956631 scan_static_bus for PCI: 00:15.0
1372 11:51:26.957098 I2C: 00:1a enabled
1373 11:51:26.960152 I2C: 00:31 enabled
1374 11:51:26.963099 I2C: 00:32 enabled
1375 11:51:26.966424 scan_static_bus for PCI: 00:15.0 done
1376 11:51:26.970068 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1377 11:51:26.973845 PCI: 00:15.1 scanning...
1378 11:51:26.976439 scan_static_bus for PCI: 00:15.1
1379 11:51:26.976966 I2C: 00:50 enabled
1380 11:51:26.983450 scan_static_bus for PCI: 00:15.1 done
1381 11:51:26.986430 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1382 11:51:26.990165 PCI: 00:15.3 scanning...
1383 11:51:26.993204 scan_static_bus for PCI: 00:15.3
1384 11:51:26.993686 I2C: 00:10 enabled
1385 11:51:26.996642 scan_static_bus for PCI: 00:15.3 done
1386 11:51:27.002747 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1387 11:51:27.006348 PCI: 00:19.1 scanning...
1388 11:51:27.009926 scan_static_bus for PCI: 00:19.1
1389 11:51:27.010512 I2C: 00:15 enabled
1390 11:51:27.012932 I2C: 00:2c enabled
1391 11:51:27.017043 scan_static_bus for PCI: 00:19.1 done
1392 11:51:27.019304 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1393 11:51:27.023073 PCI: 00:1e.3 scanning...
1394 11:51:27.026027 scan_generic_bus for PCI: 00:1e.3
1395 11:51:27.029346 SPI: 00 enabled
1396 11:51:27.036434 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1397 11:51:27.039422 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1398 11:51:27.042575 PCI: 00:1f.0 scanning...
1399 11:51:27.046008 scan_static_bus for PCI: 00:1f.0
1400 11:51:27.046495 PNP: 0c09.0 enabled
1401 11:51:27.049207 PNP: 0c09.0 scanning...
1402 11:51:27.052608 scan_static_bus for PNP: 0c09.0
1403 11:51:27.055909 scan_static_bus for PNP: 0c09.0 done
1404 11:51:27.062672 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1405 11:51:27.066109 scan_static_bus for PCI: 00:1f.0 done
1406 11:51:27.068918 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1407 11:51:27.072713 PCI: 00:1f.2 scanning...
1408 11:51:27.075981 scan_static_bus for PCI: 00:1f.2
1409 11:51:27.079332 GENERIC: 0.0 enabled
1410 11:51:27.079954 GENERIC: 0.0 scanning...
1411 11:51:27.082518 scan_static_bus for GENERIC: 0.0
1412 11:51:27.085731 GENERIC: 0.0 enabled
1413 11:51:27.089017 GENERIC: 1.0 enabled
1414 11:51:27.092571 scan_static_bus for GENERIC: 0.0 done
1415 11:51:27.095860 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1416 11:51:27.099168 scan_static_bus for PCI: 00:1f.2 done
1417 11:51:27.105850 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1418 11:51:27.109078 PCI: 00:1f.3 scanning...
1419 11:51:27.112874 scan_static_bus for PCI: 00:1f.3
1420 11:51:27.116044 scan_static_bus for PCI: 00:1f.3 done
1421 11:51:27.119362 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1422 11:51:27.122832 PCI: 00:1f.5 scanning...
1423 11:51:27.125614 scan_generic_bus for PCI: 00:1f.5
1424 11:51:27.129268 scan_generic_bus for PCI: 00:1f.5 done
1425 11:51:27.135513 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1426 11:51:27.138899 scan_bus: bus DOMAIN: 0000 finished in 714 msecs
1427 11:51:27.142369 scan_static_bus for Root Device done
1428 11:51:27.148932 scan_bus: bus Root Device finished in 733 msecs
1429 11:51:27.149397 done
1430 11:51:27.155907 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1306 ms
1431 11:51:27.159426 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1432 11:51:27.165744 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1433 11:51:27.169151 SPI flash protection: WPSW=0 SRP0=0
1434 11:51:27.175761 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1435 11:51:27.179188 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1436 11:51:27.182463 found VGA at PCI: 00:02.0
1437 11:51:27.185682 Setting up VGA for PCI: 00:02.0
1438 11:51:27.192071 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1439 11:51:27.195588 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1440 11:51:27.199208 Allocating resources...
1441 11:51:27.202273 Reading resources...
1442 11:51:27.205836 Root Device read_resources bus 0 link: 0
1443 11:51:27.208844 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1444 11:51:27.215927 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1445 11:51:27.219162 DOMAIN: 0000 read_resources bus 0 link: 0
1446 11:51:27.225770 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1447 11:51:27.232289 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1448 11:51:27.239024 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1449 11:51:27.242500 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1450 11:51:27.248512 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1451 11:51:27.255655 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1452 11:51:27.262294 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1453 11:51:27.268583 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1454 11:51:27.275310 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1455 11:51:27.281938 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1456 11:51:27.288774 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1457 11:51:27.295307 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1458 11:51:27.302087 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1459 11:51:27.308561 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1460 11:51:27.314908 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1461 11:51:27.318385 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1462 11:51:27.325391 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1463 11:51:27.331919 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1464 11:51:27.338402 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1465 11:51:27.345290 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1466 11:51:27.351840 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1467 11:51:27.354700 PCI: 00:02.0 read_resources bus 1 link: 0
1468 11:51:27.358337 GENERIC: 0.0 missing read_resources
1469 11:51:27.365211 PCI: 00:02.0 read_resources bus 1 link: 0 done
1470 11:51:27.368496 PCI: 00:04.0 read_resources bus 2 link: 0
1471 11:51:27.371856 PCI: 00:04.0 read_resources bus 2 link: 0 done
1472 11:51:27.378280 PCI: 00:06.0 read_resources bus 1 link: 0
1473 11:51:27.381458 PCI: 00:06.0 read_resources bus 1 link: 0 done
1474 11:51:27.384611 PCI: 00:0d.0 read_resources bus 0 link: 0
1475 11:51:27.388250 USB0 port 0 read_resources bus 0 link: 0
1476 11:51:27.394797 USB0 port 0 read_resources bus 0 link: 0 done
1477 11:51:27.398064 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1478 11:51:27.404680 PCI: 00:14.0 read_resources bus 0 link: 0
1479 11:51:27.408145 USB0 port 0 read_resources bus 0 link: 0
1480 11:51:27.411547 USB0 port 0 read_resources bus 0 link: 0 done
1481 11:51:27.418301 PCI: 00:14.0 read_resources bus 0 link: 0 done
1482 11:51:27.421355 PCI: 00:14.3 read_resources bus 0 link: 0
1483 11:51:27.424607 PCI: 00:14.3 read_resources bus 0 link: 0 done
1484 11:51:27.431318 PCI: 00:15.0 read_resources bus 0 link: 0
1485 11:51:27.434055 PCI: 00:15.0 read_resources bus 0 link: 0 done
1486 11:51:27.437492 PCI: 00:15.1 read_resources bus 0 link: 0
1487 11:51:27.444327 PCI: 00:15.1 read_resources bus 0 link: 0 done
1488 11:51:27.447336 PCI: 00:15.3 read_resources bus 0 link: 0
1489 11:51:27.454517 PCI: 00:15.3 read_resources bus 0 link: 0 done
1490 11:51:27.457387 PCI: 00:19.1 read_resources bus 0 link: 0
1491 11:51:27.460667 PCI: 00:19.1 read_resources bus 0 link: 0 done
1492 11:51:27.467515 PCI: 00:1e.3 read_resources bus 3 link: 0
1493 11:51:27.470664 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1494 11:51:27.473908 PCI: 00:1f.0 read_resources bus 0 link: 0
1495 11:51:27.480885 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1496 11:51:27.484183 PCI: 00:1f.2 read_resources bus 0 link: 0
1497 11:51:27.487413 GENERIC: 0.0 read_resources bus 0 link: 0
1498 11:51:27.493655 GENERIC: 0.0 read_resources bus 0 link: 0 done
1499 11:51:27.497505 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1500 11:51:27.503835 DOMAIN: 0000 read_resources bus 0 link: 0 done
1501 11:51:27.507256 Root Device read_resources bus 0 link: 0 done
1502 11:51:27.510472 Done reading resources.
1503 11:51:27.516951 Show resources in subtree (Root Device)...After reading.
1504 11:51:27.520231 Root Device child on link 0 CPU_CLUSTER: 0
1505 11:51:27.524219 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 11:51:27.527313 APIC: 00
1507 11:51:27.527845 APIC: 16
1508 11:51:27.528214 APIC: 10
1509 11:51:27.530330 APIC: 12
1510 11:51:27.530797 APIC: 14
1511 11:51:27.531161 APIC: 09
1512 11:51:27.534075 APIC: 01
1513 11:51:27.534541 APIC: 08
1514 11:51:27.536890 DOMAIN: 0000 child on link 0 GPIO: 0
1515 11:51:27.547212 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1516 11:51:27.557715 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1517 11:51:27.558251 GPIO: 0
1518 11:51:27.560171 PCI: 00:00.0
1519 11:51:27.570221 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1520 11:51:27.580526 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1521 11:51:27.586595 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1522 11:51:27.596389 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1523 11:51:27.606676 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1524 11:51:27.616722 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1525 11:51:27.626786 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1526 11:51:27.636646 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1527 11:51:27.646739 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1528 11:51:27.653391 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1529 11:51:27.663022 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1530 11:51:27.672998 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1531 11:51:27.683447 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1532 11:51:27.692979 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1533 11:51:27.703013 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1534 11:51:27.709603 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1535 11:51:27.719784 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1536 11:51:27.730049 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1537 11:51:27.739673 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1538 11:51:27.749398 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1539 11:51:27.759746 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1540 11:51:27.769578 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1541 11:51:27.776420 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1542 11:51:27.786210 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1543 11:51:27.796649 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1544 11:51:27.806112 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1545 11:51:27.815998 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1546 11:51:27.825630 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1547 11:51:27.829186 PCI: 00:02.0 child on link 0 GENERIC: 0.0
1548 11:51:27.839148 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1549 11:51:27.852394 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1550 11:51:27.858888 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1551 11:51:27.862089 GENERIC: 0.0
1552 11:51:27.865414 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1553 11:51:27.875295 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1554 11:51:27.878704 GENERIC: 0.0
1555 11:51:27.881964 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1556 11:51:27.892306 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1557 11:51:27.902041 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1558 11:51:27.908480 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1559 11:51:27.912103 PCI: 01:00.0
1560 11:51:27.922164 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 11:51:27.931850 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1562 11:51:27.932517 PCI: 00:08.0
1563 11:51:27.934950 PCI: 00:0a.0
1564 11:51:27.944929 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1565 11:51:27.948278 PCI: 00:0d.0 child on link 0 USB0 port 0
1566 11:51:27.958204 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1567 11:51:27.962035 USB0 port 0 child on link 0 USB3 port 0
1568 11:51:27.964983 USB3 port 0
1569 11:51:27.968290 USB3 port 1
1570 11:51:27.968796 USB3 port 2
1571 11:51:27.971963 USB3 port 3
1572 11:51:27.975249 PCI: 00:14.0 child on link 0 USB0 port 0
1573 11:51:27.985088 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1574 11:51:27.988429 USB0 port 0 child on link 0 USB2 port 0
1575 11:51:27.991392 USB2 port 0
1576 11:51:27.991917 USB2 port 1
1577 11:51:27.995043 USB2 port 2
1578 11:51:27.995500 USB2 port 3
1579 11:51:27.998462 USB2 port 4
1580 11:51:27.998920 USB2 port 5
1581 11:51:28.001460 USB2 port 6
1582 11:51:28.005165 USB2 port 7
1583 11:51:28.005623 USB2 port 8
1584 11:51:28.008376 USB2 port 9
1585 11:51:28.008866 USB3 port 0
1586 11:51:28.011817 USB3 port 1
1587 11:51:28.012343 USB3 port 2
1588 11:51:28.015072 USB3 port 3
1589 11:51:28.015526 PCI: 00:14.2
1590 11:51:28.024751 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1591 11:51:28.035073 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1592 11:51:28.041588 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1593 11:51:28.051921 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1594 11:51:28.052470 GENERIC: 0.0
1595 11:51:28.054637 PCI: 00:15.0 child on link 0 I2C: 00:1a
1596 11:51:28.064569 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1597 11:51:28.068434 I2C: 00:1a
1598 11:51:28.068995 I2C: 00:31
1599 11:51:28.071742 I2C: 00:32
1600 11:51:28.074927 PCI: 00:15.1 child on link 0 I2C: 00:50
1601 11:51:28.084899 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 11:51:28.087839 I2C: 00:50
1603 11:51:28.088297 PCI: 00:15.2
1604 11:51:28.091460 PCI: 00:15.3 child on link 0 I2C: 00:10
1605 11:51:28.101438 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 11:51:28.104883 I2C: 00:10
1607 11:51:28.105346 PCI: 00:16.0
1608 11:51:28.114434 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1609 11:51:28.118543 PCI: 00:19.0
1610 11:51:28.121740 PCI: 00:19.1 child on link 0 I2C: 00:15
1611 11:51:28.131483 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 11:51:28.134353 I2C: 00:15
1613 11:51:28.134858 I2C: 00:2c
1614 11:51:28.137682 PCI: 00:1e.0
1615 11:51:28.147542 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1616 11:51:28.151003 PCI: 00:1e.3 child on link 0 SPI: 00
1617 11:51:28.161246 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1618 11:51:28.161760 SPI: 00
1619 11:51:28.167823 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1620 11:51:28.174450 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1621 11:51:28.177526 PNP: 0c09.0
1622 11:51:28.187530 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1623 11:51:28.191145 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1624 11:51:28.201090 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1625 11:51:28.210859 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1626 11:51:28.214010 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1627 11:51:28.214472 GENERIC: 0.0
1628 11:51:28.217681 GENERIC: 1.0
1629 11:51:28.221138 PCI: 00:1f.3
1630 11:51:28.231541 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1631 11:51:28.240902 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1632 11:51:28.241473 PCI: 00:1f.5
1633 11:51:28.250964 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1634 11:51:28.257593 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1635 11:51:28.263704 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1636 11:51:28.270594 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1637 11:51:28.277138 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1638 11:51:28.280811 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1639 11:51:28.283602 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1640 11:51:28.290875 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1641 11:51:28.297061 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1642 11:51:28.307367 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1643 11:51:28.314142 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1644 11:51:28.320048 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1645 11:51:28.326861 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1646 11:51:28.333486 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1647 11:51:28.343944 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1648 11:51:28.346954 DOMAIN: 0000: Resource ranges:
1649 11:51:28.350270 * Base: 1000, Size: 800, Tag: 100
1650 11:51:28.353387 * Base: 1900, Size: e700, Tag: 100
1651 11:51:28.356941 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1652 11:51:28.363496 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1653 11:51:28.369856 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1654 11:51:28.379919 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1655 11:51:28.386945 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1656 11:51:28.393067 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1657 11:51:28.403441 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1658 11:51:28.410027 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1659 11:51:28.416696 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1660 11:51:28.426400 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1661 11:51:28.433333 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1662 11:51:28.439626 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1663 11:51:28.449839 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1664 11:51:28.456313 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1665 11:51:28.462925 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1666 11:51:28.472717 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1667 11:51:28.479438 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1668 11:51:28.486053 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1669 11:51:28.495826 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1670 11:51:28.502591 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1671 11:51:28.509831 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1672 11:51:28.519335 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1673 11:51:28.525955 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1674 11:51:28.532612 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1675 11:51:28.542219 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1676 11:51:28.549257 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1677 11:51:28.555591 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1678 11:51:28.566016 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1679 11:51:28.572199 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1680 11:51:28.579032 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1681 11:51:28.588697 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1682 11:51:28.595852 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1683 11:51:28.602315 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1684 11:51:28.605094 DOMAIN: 0000: Resource ranges:
1685 11:51:28.612220 * Base: 80400000, Size: 3fc00000, Tag: 200
1686 11:51:28.615461 * Base: d0000000, Size: 28000000, Tag: 200
1687 11:51:28.619011 * Base: fa000000, Size: 1000000, Tag: 200
1688 11:51:28.622191 * Base: fb001000, Size: 17ff000, Tag: 200
1689 11:51:28.628939 * Base: fe800000, Size: 300000, Tag: 200
1690 11:51:28.631928 * Base: feb80000, Size: 80000, Tag: 200
1691 11:51:28.635508 * Base: fed00000, Size: 40000, Tag: 200
1692 11:51:28.638742 * Base: fed70000, Size: 10000, Tag: 200
1693 11:51:28.645170 * Base: fed88000, Size: 8000, Tag: 200
1694 11:51:28.648807 * Base: fed93000, Size: d000, Tag: 200
1695 11:51:28.651598 * Base: feda2000, Size: 1e000, Tag: 200
1696 11:51:28.655025 * Base: fede0000, Size: 1220000, Tag: 200
1697 11:51:28.661846 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1698 11:51:28.668697 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1699 11:51:28.674761 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1700 11:51:28.681628 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1701 11:51:28.688623 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1702 11:51:28.694784 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1703 11:51:28.701554 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1704 11:51:28.708134 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1705 11:51:28.714964 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1706 11:51:28.721726 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1707 11:51:28.728116 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1708 11:51:28.735277 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1709 11:51:28.741871 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1710 11:51:28.748413 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1711 11:51:28.754554 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1712 11:51:28.761070 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1713 11:51:28.767987 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1714 11:51:28.774787 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1715 11:51:28.781251 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1716 11:51:28.787881 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1717 11:51:28.794536 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1718 11:51:28.804132 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1719 11:51:28.807686 PCI: 00:06.0: Resource ranges:
1720 11:51:28.811059 * Base: 80400000, Size: 100000, Tag: 200
1721 11:51:28.817549 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1722 11:51:28.824176 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1723 11:51:28.831151 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1724 11:51:28.840581 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1725 11:51:28.844058 Root Device assign_resources, bus 0 link: 0
1726 11:51:28.847383 DOMAIN: 0000 assign_resources, bus 0 link: 0
1727 11:51:28.857213 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1728 11:51:28.864380 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1729 11:51:28.870668 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1730 11:51:28.877262 PCI: 00:02.0 assign_resources, bus 1 link: 0
1731 11:51:28.880561 PCI: 00:02.0 assign_resources, bus 1 link: 0 done
1732 11:51:28.890344 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1733 11:51:28.893953 PCI: 00:04.0 assign_resources, bus 2 link: 0
1734 11:51:28.900644 PCI: 00:04.0 assign_resources, bus 2 link: 0 done
1735 11:51:28.906950 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1736 11:51:28.917080 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1737 11:51:28.926944 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1738 11:51:28.930716 PCI: 00:06.0 assign_resources, bus 1 link: 0
1739 11:51:28.937262 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1740 11:51:28.947028 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1741 11:51:28.950059 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1742 11:51:28.959986 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1743 11:51:28.966919 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1744 11:51:28.973868 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1745 11:51:28.976968 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1746 11:51:28.983248 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1747 11:51:28.990452 PCI: 00:14.0 assign_resources, bus 0 link: 0
1748 11:51:28.993322 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1749 11:51:29.003544 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1750 11:51:29.010044 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1751 11:51:29.019864 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1752 11:51:29.023090 PCI: 00:14.3 assign_resources, bus 0 link: 0
1753 11:51:29.026561 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1754 11:51:29.036277 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1755 11:51:29.039823 PCI: 00:15.0 assign_resources, bus 0 link: 0
1756 11:51:29.046712 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1757 11:51:29.053164 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1758 11:51:29.056527 PCI: 00:15.1 assign_resources, bus 0 link: 0
1759 11:51:29.063084 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1760 11:51:29.069790 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1761 11:51:29.076431 PCI: 00:15.3 assign_resources, bus 0 link: 0
1762 11:51:29.079486 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1763 11:51:29.089775 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1764 11:51:29.096611 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1765 11:51:29.099825 PCI: 00:19.1 assign_resources, bus 0 link: 0
1766 11:51:29.106537 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1767 11:51:29.113021 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1768 11:51:29.119525 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1769 11:51:29.122900 PCI: 00:1e.3 assign_resources, bus 3 link: 0 done
1770 11:51:29.129413 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1771 11:51:29.133023 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1772 11:51:29.135992 LPC: Trying to open IO window from 800 size 1ff
1773 11:51:29.146765 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1774 11:51:29.152736 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1775 11:51:29.162533 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1776 11:51:29.165863 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1777 11:51:29.172664 Root Device assign_resources, bus 0 link: 0 done
1778 11:51:29.173232 Done setting resources.
1779 11:51:29.179300 Show resources in subtree (Root Device)...After assigning values.
1780 11:51:29.185647 Root Device child on link 0 CPU_CLUSTER: 0
1781 11:51:29.189057 CPU_CLUSTER: 0 child on link 0 APIC: 00
1782 11:51:29.189478 APIC: 00
1783 11:51:29.192298 APIC: 16
1784 11:51:29.193044 APIC: 10
1785 11:51:29.193430 APIC: 12
1786 11:51:29.195816 APIC: 14
1787 11:51:29.196279 APIC: 09
1788 11:51:29.199151 APIC: 01
1789 11:51:29.199697 APIC: 08
1790 11:51:29.202726 DOMAIN: 0000 child on link 0 GPIO: 0
1791 11:51:29.212193 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1792 11:51:29.222593 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1793 11:51:29.223065 GPIO: 0
1794 11:51:29.225190 PCI: 00:00.0
1795 11:51:29.235183 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1796 11:51:29.245370 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1797 11:51:29.252180 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1798 11:51:29.261595 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1799 11:51:29.272071 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1800 11:51:29.282093 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1801 11:51:29.291790 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1802 11:51:29.301801 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1803 11:51:29.308686 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1804 11:51:29.318716 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1805 11:51:29.328321 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1806 11:51:29.338534 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1807 11:51:29.348303 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1808 11:51:29.358112 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1809 11:51:29.365165 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1810 11:51:29.374838 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1811 11:51:29.384841 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1812 11:51:29.394902 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1813 11:51:29.404776 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1814 11:51:29.414525 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1815 11:51:29.424336 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1816 11:51:29.434533 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1817 11:51:29.441249 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1818 11:51:29.451187 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1819 11:51:29.461321 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1820 11:51:29.471542 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1821 11:51:29.481101 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1822 11:51:29.490983 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1823 11:51:29.494297 PCI: 00:02.0 child on link 0 GENERIC: 0.0
1824 11:51:29.507662 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1825 11:51:29.517394 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1826 11:51:29.527342 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1827 11:51:29.527875 GENERIC: 0.0
1828 11:51:29.530653 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1829 11:51:29.544256 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1830 11:51:29.544862 GENERIC: 0.0
1831 11:51:29.547405 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1832 11:51:29.557382 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1833 11:51:29.571006 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1834 11:51:29.580343 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1835 11:51:29.580845 PCI: 01:00.0
1836 11:51:29.594499 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1837 11:51:29.603445 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1838 11:51:29.603959 PCI: 00:08.0
1839 11:51:29.606848 PCI: 00:0a.0
1840 11:51:29.617121 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1841 11:51:29.620906 PCI: 00:0d.0 child on link 0 USB0 port 0
1842 11:51:29.629977 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1843 11:51:29.636423 USB0 port 0 child on link 0 USB3 port 0
1844 11:51:29.636933 USB3 port 0
1845 11:51:29.640395 USB3 port 1
1846 11:51:29.641027 USB3 port 2
1847 11:51:29.643245 USB3 port 3
1848 11:51:29.646738 PCI: 00:14.0 child on link 0 USB0 port 0
1849 11:51:29.656400 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1850 11:51:29.663254 USB0 port 0 child on link 0 USB2 port 0
1851 11:51:29.663722 USB2 port 0
1852 11:51:29.666539 USB2 port 1
1853 11:51:29.667108 USB2 port 2
1854 11:51:29.669807 USB2 port 3
1855 11:51:29.670272 USB2 port 4
1856 11:51:29.672854 USB2 port 5
1857 11:51:29.673319 USB2 port 6
1858 11:51:29.676234 USB2 port 7
1859 11:51:29.676729 USB2 port 8
1860 11:51:29.679901 USB2 port 9
1861 11:51:29.680360 USB3 port 0
1862 11:51:29.683290 USB3 port 1
1863 11:51:29.683753 USB3 port 2
1864 11:51:29.686805 USB3 port 3
1865 11:51:29.689945 PCI: 00:14.2
1866 11:51:29.699763 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1867 11:51:29.709878 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1868 11:51:29.713568 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1869 11:51:29.723506 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1870 11:51:29.726492 GENERIC: 0.0
1871 11:51:29.730423 PCI: 00:15.0 child on link 0 I2C: 00:1a
1872 11:51:29.739400 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1873 11:51:29.742994 I2C: 00:1a
1874 11:51:29.743550 I2C: 00:31
1875 11:51:29.746197 I2C: 00:32
1876 11:51:29.749685 PCI: 00:15.1 child on link 0 I2C: 00:50
1877 11:51:29.759332 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1878 11:51:29.759863 I2C: 00:50
1879 11:51:29.762633 PCI: 00:15.2
1880 11:51:29.765948 PCI: 00:15.3 child on link 0 I2C: 00:10
1881 11:51:29.775818 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1882 11:51:29.779306 I2C: 00:10
1883 11:51:29.779779 PCI: 00:16.0
1884 11:51:29.792666 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1885 11:51:29.793392 PCI: 00:19.0
1886 11:51:29.795749 PCI: 00:19.1 child on link 0 I2C: 00:15
1887 11:51:29.805625 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1888 11:51:29.809498 I2C: 00:15
1889 11:51:29.809988 I2C: 00:2c
1890 11:51:29.812284 PCI: 00:1e.0
1891 11:51:29.822415 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1892 11:51:29.826028 PCI: 00:1e.3 child on link 0 SPI: 00
1893 11:51:29.839225 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1894 11:51:29.839756 SPI: 00
1895 11:51:29.842473 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1896 11:51:29.852712 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1897 11:51:29.853312 PNP: 0c09.0
1898 11:51:29.862595 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1899 11:51:29.865419 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1900 11:51:29.875672 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1901 11:51:29.885519 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1902 11:51:29.888855 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1903 11:51:29.891949 GENERIC: 0.0
1904 11:51:29.892410 GENERIC: 1.0
1905 11:51:29.895468 PCI: 00:1f.3
1906 11:51:29.905350 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1907 11:51:29.915244 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1908 11:51:29.918824 PCI: 00:1f.5
1909 11:51:29.928804 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1910 11:51:29.932637 Done allocating resources.
1911 11:51:29.938369 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2748 ms
1912 11:51:29.941672 coreboot skipped calling FSP notify phase: 00000020.
1913 11:51:29.948633 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1914 11:51:29.952028 Configure audio over I2S with MAX98373 NAU88L25B.
1915 11:51:29.957119 Enabling BT offload
1916 11:51:29.964425 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 17 ms
1917 11:51:29.967732 Enabling resources...
1918 11:51:29.971154 PCI: 00:00.0 subsystem <- 8086/4609
1919 11:51:29.974402 PCI: 00:00.0 cmd <- 06
1920 11:51:29.977765 PCI: 00:02.0 subsystem <- 8086/46b3
1921 11:51:29.981060 PCI: 00:02.0 cmd <- 03
1922 11:51:29.984204 PCI: 00:04.0 subsystem <- 8086/461d
1923 11:51:29.984721 PCI: 00:04.0 cmd <- 02
1924 11:51:29.987771 PCI: 00:06.0 bridge ctrl <- 0013
1925 11:51:29.991075 PCI: 00:06.0 subsystem <- 8086/464d
1926 11:51:29.994743 PCI: 00:06.0 cmd <- 106
1927 11:51:29.997795 PCI: 00:0a.0 subsystem <- 8086/467d
1928 11:51:30.000878 PCI: 00:0a.0 cmd <- 02
1929 11:51:30.004364 PCI: 00:0d.0 subsystem <- 8086/461e
1930 11:51:30.007856 PCI: 00:0d.0 cmd <- 02
1931 11:51:30.010868 PCI: 00:14.0 subsystem <- 8086/51ed
1932 11:51:30.014486 PCI: 00:14.0 cmd <- 02
1933 11:51:30.017671 PCI: 00:14.2 subsystem <- 8086/51ef
1934 11:51:30.018183 PCI: 00:14.2 cmd <- 02
1935 11:51:30.020842 PCI: 00:14.3 subsystem <- 8086/51f0
1936 11:51:30.024397 PCI: 00:14.3 cmd <- 02
1937 11:51:30.027583 PCI: 00:15.0 subsystem <- 8086/51e8
1938 11:51:30.030874 PCI: 00:15.0 cmd <- 02
1939 11:51:30.034000 PCI: 00:15.1 subsystem <- 8086/51e9
1940 11:51:30.037685 PCI: 00:15.1 cmd <- 06
1941 11:51:30.040903 PCI: 00:15.3 subsystem <- 8086/51eb
1942 11:51:30.044259 PCI: 00:15.3 cmd <- 02
1943 11:51:30.048307 PCI: 00:16.0 subsystem <- 8086/51e0
1944 11:51:30.048928 PCI: 00:16.0 cmd <- 02
1945 11:51:30.051022 PCI: 00:19.1 subsystem <- 8086/51c6
1946 11:51:30.054733 PCI: 00:19.1 cmd <- 02
1947 11:51:30.057550 PCI: 00:1e.0 subsystem <- 8086/51a8
1948 11:51:30.060812 PCI: 00:1e.0 cmd <- 06
1949 11:51:30.064700 PCI: 00:1e.3 subsystem <- 8086/51ab
1950 11:51:30.068083 PCI: 00:1e.3 cmd <- 02
1951 11:51:30.070911 PCI: 00:1f.0 subsystem <- 8086/5182
1952 11:51:30.074394 PCI: 00:1f.0 cmd <- 407
1953 11:51:30.077860 PCI: 00:1f.3 subsystem <- 8086/51c8
1954 11:51:30.078381 PCI: 00:1f.3 cmd <- 02
1955 11:51:30.080895 PCI: 00:1f.5 subsystem <- 8086/51a4
1956 11:51:30.084271 PCI: 00:1f.5 cmd <- 406
1957 11:51:30.087868 PCI: 01:00.0 cmd <- 02
1958 11:51:30.088542 done.
1959 11:51:30.094126 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1960 11:51:30.097090 ME: Version: Unavailable
1961 11:51:30.101027 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1962 11:51:30.104343 Initializing devices...
1963 11:51:30.107203 Root Device init
1964 11:51:30.107694 mainboard: EC init
1965 11:51:30.113984 Chrome EC: Set SMI mask to 0x0000000000000000
1966 11:51:30.114500 Chrome EC: UHEPI supported
1967 11:51:30.121583 Chrome EC: clear events_b mask to 0x0000000000000000
1968 11:51:30.127916 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1969 11:51:30.134937 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001001105e
1970 11:51:30.141076 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001809105e
1971 11:51:30.144177 Chrome EC: Set WAKE mask to 0x0000000000000000
1972 11:51:30.152334 Root Device init finished in 40 msecs
1973 11:51:30.152919 PCI: 00:00.0 init
1974 11:51:30.155281 CPU TDP = 15 Watts
1975 11:51:30.155742 CPU PL1 = 15 Watts
1976 11:51:30.158824 CPU PL2 = 55 Watts
1977 11:51:30.161885 CPU PL4 = 123 Watts
1978 11:51:30.165335 PCI: 00:00.0 init finished in 7 msecs
1979 11:51:30.165797 PCI: 00:02.0 init
1980 11:51:30.168913 GMA: Found VBT in CBFS
1981 11:51:30.171821 GMA: Found valid VBT in CBFS
1982 11:51:30.178940 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1983 11:51:30.185667 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1984 11:51:30.188424 PCI: 00:02.0 init finished in 18 msecs
1985 11:51:30.191663 PCI: 00:06.0 init
1986 11:51:30.195213 Initializing PCH PCIe bridge.
1987 11:51:30.198879 PCI: 00:06.0 init finished in 3 msecs
1988 11:51:30.199537 PCI: 00:0a.0 init
1989 11:51:30.201972 PCI: 00:0a.0 init finished in 0 msecs
1990 11:51:30.205143 PCI: 00:14.0 init
1991 11:51:30.208485 PCI: 00:14.0 init finished in 0 msecs
1992 11:51:30.211876 PCI: 00:14.2 init
1993 11:51:30.215058 PCI: 00:14.2 init finished in 0 msecs
1994 11:51:30.215521 PCI: 00:15.0 init
1995 11:51:30.218528 I2C bus 0 version 0x3230302a
1996 11:51:30.221739 DW I2C bus 0 at 0x80655000 (400 KHz)
1997 11:51:30.228181 PCI: 00:15.0 init finished in 6 msecs
1998 11:51:30.228761 PCI: 00:15.1 init
1999 11:51:30.231538 I2C bus 1 version 0x3230302a
2000 11:51:30.234711 DW I2C bus 1 at 0x80656000 (400 KHz)
2001 11:51:30.238201 PCI: 00:15.1 init finished in 6 msecs
2002 11:51:30.241545 PCI: 00:15.3 init
2003 11:51:30.245166 I2C bus 3 version 0x3230302a
2004 11:51:30.248095 DW I2C bus 3 at 0x80657000 (400 KHz)
2005 11:51:30.251389 PCI: 00:15.3 init finished in 6 msecs
2006 11:51:30.254592 PCI: 00:16.0 init
2007 11:51:30.258091 PCI: 00:16.0 init finished in 0 msecs
2008 11:51:30.258640 PCI: 00:19.1 init
2009 11:51:30.261853 I2C bus 5 version 0x3230302a
2010 11:51:30.264645 DW I2C bus 5 at 0x80659000 (400 KHz)
2011 11:51:30.267899 PCI: 00:19.1 init finished in 6 msecs
2012 11:51:30.271100 PCI: 00:1f.0 init
2013 11:51:30.274938 IOAPIC: Initializing IOAPIC at 0xfec00000
2014 11:51:30.278327 IOAPIC: ID = 0x02
2015 11:51:30.281289 IOAPIC: Dumping registers
2016 11:51:30.281753 reg 0x0000: 0x02000000
2017 11:51:30.284915 reg 0x0001: 0x00770020
2018 11:51:30.287691 reg 0x0002: 0x00000000
2019 11:51:30.291252 IOAPIC: 120 interrupts
2020 11:51:30.294861 IOAPIC: Clearing IOAPIC at 0xfec00000
2021 11:51:30.297928 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2022 11:51:30.304407 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2023 11:51:30.307873 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2024 11:51:30.314600 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2025 11:51:30.317946 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2026 11:51:30.324751 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2027 11:51:30.327787 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2028 11:51:30.331299 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2029 11:51:30.337349 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2030 11:51:30.340665 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2031 11:51:30.347485 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2032 11:51:30.350647 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2033 11:51:30.357364 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2034 11:51:30.361016 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2035 11:51:30.367430 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2036 11:51:30.370586 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2037 11:51:30.373829 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2038 11:51:30.380557 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2039 11:51:30.384284 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2040 11:51:30.390696 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2041 11:51:30.393974 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2042 11:51:30.400515 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2043 11:51:30.404124 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2044 11:51:30.410327 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2045 11:51:30.413908 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2046 11:51:30.417226 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2047 11:51:30.424484 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2048 11:51:30.427564 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2049 11:51:30.434302 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2050 11:51:30.437246 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2051 11:51:30.444500 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2052 11:51:30.447391 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2053 11:51:30.454399 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2054 11:51:30.456965 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2055 11:51:30.460340 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2056 11:51:30.467010 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2057 11:51:30.470564 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2058 11:51:30.476859 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2059 11:51:30.480314 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2060 11:51:30.486940 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2061 11:51:30.490288 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2062 11:51:30.497257 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2063 11:51:30.500421 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2064 11:51:30.503516 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2065 11:51:30.510181 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2066 11:51:30.513653 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2067 11:51:30.520988 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2068 11:51:30.524045 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2069 11:51:30.530357 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2070 11:51:30.533561 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2071 11:51:30.537114 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2072 11:51:30.543936 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2073 11:51:30.547122 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2074 11:51:30.553567 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2075 11:51:30.556988 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2076 11:51:30.563410 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2077 11:51:30.566627 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2078 11:51:30.573642 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2079 11:51:30.576969 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2080 11:51:30.580182 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2081 11:51:30.586889 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2082 11:51:30.590168 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2083 11:51:30.596666 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2084 11:51:30.599976 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2085 11:51:30.606719 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2086 11:51:30.609850 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2087 11:51:30.616578 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2088 11:51:30.620025 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2089 11:51:30.623413 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2090 11:51:30.630118 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2091 11:51:30.633473 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2092 11:51:30.639697 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2093 11:51:30.643500 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2094 11:51:30.650411 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2095 11:51:30.653638 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2096 11:51:30.659844 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2097 11:51:30.663048 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2098 11:51:30.666368 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2099 11:51:30.672957 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2100 11:51:30.676246 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2101 11:51:30.682788 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2102 11:51:30.686405 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2103 11:51:30.693094 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2104 11:51:30.696722 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2105 11:51:30.703187 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2106 11:51:30.705955 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2107 11:51:30.709477 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2108 11:51:30.715918 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2109 11:51:30.719846 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2110 11:51:30.726358 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2111 11:51:30.729240 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2112 11:51:30.736068 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2113 11:51:30.739472 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2114 11:51:30.746083 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2115 11:51:30.749532 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2116 11:51:30.752922 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2117 11:51:30.759785 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2118 11:51:30.763204 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2119 11:51:30.769258 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2120 11:51:30.772426 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2121 11:51:30.778946 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2122 11:51:30.782224 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2123 11:51:30.789464 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2124 11:51:30.792560 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2125 11:51:30.795747 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2126 11:51:30.802665 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2127 11:51:30.805752 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2128 11:51:30.812067 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2129 11:51:30.815445 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2130 11:51:30.822121 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2131 11:51:30.825703 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2132 11:51:30.832240 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2133 11:51:30.835359 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2134 11:51:30.838697 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2135 11:51:30.845341 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2136 11:51:30.848936 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2137 11:51:30.855458 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2138 11:51:30.858933 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2139 11:51:30.865193 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2140 11:51:30.868661 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2141 11:51:30.871902 IOAPIC: Bootstrap Processor Local APIC = 0x00
2142 11:51:30.879055 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2143 11:51:30.881881 PCI: 00:1f.0 init finished in 607 msecs
2144 11:51:30.885247 PCI: 00:1f.2 init
2145 11:51:30.888787 apm_control: Disabling ACPI.
2146 11:51:30.892880 APMC done.
2147 11:51:30.896579 PCI: 00:1f.2 init finished in 7 msecs
2148 11:51:30.899453 PCI: 00:1f.3 init
2149 11:51:30.902803 PCI: 00:1f.3 init finished in 0 msecs
2150 11:51:30.903379 PCI: 01:00.0 init
2151 11:51:30.905947 PCI: 01:00.0 init finished in 0 msecs
2152 11:51:30.909312 PNP: 0c09.0 init
2153 11:51:30.915995 Google Chrome EC uptime: 12.299 seconds
2154 11:51:30.919663 Google Chrome AP resets since EC boot: 1
2155 11:51:30.922955 Google Chrome most recent AP reset causes:
2156 11:51:30.926092 0.342: 32775 shutdown: entering G3
2157 11:51:30.932806 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2158 11:51:30.935955 PNP: 0c09.0 init finished in 24 msecs
2159 11:51:30.939162 GENERIC: 0.0 init
2160 11:51:30.942863 GENERIC: 0.0 init finished in 0 msecs
2161 11:51:30.946394 GENERIC: 1.0 init
2162 11:51:30.949291 GENERIC: 1.0 init finished in 0 msecs
2163 11:51:30.949752 Devices initialized
2164 11:51:30.952902 Show all devs... After init.
2165 11:51:30.956222 Root Device: enabled 1
2166 11:51:30.959728 CPU_CLUSTER: 0: enabled 1
2167 11:51:30.962878 DOMAIN: 0000: enabled 1
2168 11:51:30.963430 GPIO: 0: enabled 1
2169 11:51:30.965655 PCI: 00:00.0: enabled 1
2170 11:51:30.969144 PCI: 00:01.0: enabled 0
2171 11:51:30.969602 PCI: 00:01.1: enabled 0
2172 11:51:30.972632 PCI: 00:02.0: enabled 1
2173 11:51:30.975701 PCI: 00:04.0: enabled 1
2174 11:51:30.979076 PCI: 00:05.0: enabled 0
2175 11:51:30.979626 PCI: 00:06.0: enabled 1
2176 11:51:30.982863 PCI: 00:06.2: enabled 0
2177 11:51:30.985682 PCI: 00:07.0: enabled 0
2178 11:51:30.989295 PCI: 00:07.1: enabled 0
2179 11:51:30.989757 PCI: 00:07.2: enabled 0
2180 11:51:30.992787 PCI: 00:07.3: enabled 0
2181 11:51:30.995445 PCI: 00:08.0: enabled 0
2182 11:51:30.995904 PCI: 00:09.0: enabled 0
2183 11:51:30.999164 PCI: 00:0a.0: enabled 1
2184 11:51:31.002170 PCI: 00:0d.0: enabled 1
2185 11:51:31.005824 PCI: 00:0d.1: enabled 0
2186 11:51:31.006380 PCI: 00:0d.2: enabled 0
2187 11:51:31.008753 PCI: 00:0d.3: enabled 0
2188 11:51:31.012386 PCI: 00:0e.0: enabled 0
2189 11:51:31.016002 PCI: 00:10.0: enabled 0
2190 11:51:31.016497 PCI: 00:10.1: enabled 0
2191 11:51:31.018627 PCI: 00:10.6: enabled 0
2192 11:51:31.022626 PCI: 00:10.7: enabled 0
2193 11:51:31.025362 PCI: 00:12.0: enabled 0
2194 11:51:31.025967 PCI: 00:12.6: enabled 0
2195 11:51:31.029122 PCI: 00:12.7: enabled 0
2196 11:51:31.032225 PCI: 00:13.0: enabled 0
2197 11:51:31.035374 PCI: 00:14.0: enabled 1
2198 11:51:31.035866 PCI: 00:14.1: enabled 0
2199 11:51:31.038693 PCI: 00:14.2: enabled 1
2200 11:51:31.041759 PCI: 00:14.3: enabled 1
2201 11:51:31.042217 PCI: 00:15.0: enabled 1
2202 11:51:31.045427 PCI: 00:15.1: enabled 1
2203 11:51:31.048618 PCI: 00:15.2: enabled 0
2204 11:51:31.051887 PCI: 00:15.3: enabled 1
2205 11:51:31.052346 PCI: 00:16.0: enabled 1
2206 11:51:31.055379 PCI: 00:16.1: enabled 0
2207 11:51:31.059187 PCI: 00:16.2: enabled 0
2208 11:51:31.062381 PCI: 00:16.3: enabled 0
2209 11:51:31.062923 PCI: 00:16.4: enabled 0
2210 11:51:31.065675 PCI: 00:16.5: enabled 0
2211 11:51:31.068506 PCI: 00:17.0: enabled 0
2212 11:51:31.072024 PCI: 00:19.0: enabled 0
2213 11:51:31.072507 PCI: 00:19.1: enabled 1
2214 11:51:31.074975 PCI: 00:19.2: enabled 0
2215 11:51:31.078605 PCI: 00:1a.0: enabled 0
2216 11:51:31.081789 PCI: 00:1c.0: enabled 0
2217 11:51:31.082245 PCI: 00:1c.1: enabled 0
2218 11:51:31.085083 PCI: 00:1c.2: enabled 0
2219 11:51:31.088691 PCI: 00:1c.3: enabled 0
2220 11:51:31.089148 PCI: 00:1c.4: enabled 0
2221 11:51:31.091960 PCI: 00:1c.5: enabled 0
2222 11:51:31.095528 PCI: 00:1c.6: enabled 0
2223 11:51:31.098741 PCI: 00:1c.7: enabled 0
2224 11:51:31.099290 PCI: 00:1d.0: enabled 0
2225 11:51:31.101924 PCI: 00:1d.1: enabled 0
2226 11:51:31.105078 PCI: 00:1d.2: enabled 0
2227 11:51:31.108308 PCI: 00:1d.3: enabled 0
2228 11:51:31.108813 PCI: 00:1e.0: enabled 1
2229 11:51:31.112172 PCI: 00:1e.1: enabled 0
2230 11:51:31.115538 PCI: 00:1e.2: enabled 0
2231 11:51:31.118972 PCI: 00:1e.3: enabled 1
2232 11:51:31.119433 PCI: 00:1f.0: enabled 1
2233 11:51:31.121568 PCI: 00:1f.1: enabled 0
2234 11:51:31.125199 PCI: 00:1f.2: enabled 1
2235 11:51:31.125750 PCI: 00:1f.3: enabled 1
2236 11:51:31.128681 PCI: 00:1f.4: enabled 0
2237 11:51:31.132068 PCI: 00:1f.5: enabled 1
2238 11:51:31.135196 PCI: 00:1f.6: enabled 0
2239 11:51:31.135727 PCI: 00:1f.7: enabled 0
2240 11:51:31.138734 GENERIC: 0.0: enabled 1
2241 11:51:31.141525 GENERIC: 0.0: enabled 1
2242 11:51:31.145371 GENERIC: 0.0: enabled 1
2243 11:51:31.145826 GENERIC: 1.0: enabled 1
2244 11:51:31.148425 GENERIC: 0.0: enabled 1
2245 11:51:31.151742 GENERIC: 1.0: enabled 1
2246 11:51:31.155195 USB0 port 0: enabled 1
2247 11:51:31.155871 USB0 port 0: enabled 1
2248 11:51:31.158786 GENERIC: 0.0: enabled 1
2249 11:51:31.161942 I2C: 00:1a: enabled 1
2250 11:51:31.162400 I2C: 00:31: enabled 1
2251 11:51:31.164915 I2C: 00:32: enabled 1
2252 11:51:31.168121 I2C: 00:50: enabled 1
2253 11:51:31.168610 I2C: 00:10: enabled 1
2254 11:51:31.171928 I2C: 00:15: enabled 1
2255 11:51:31.175346 I2C: 00:2c: enabled 1
2256 11:51:31.175868 GENERIC: 0.0: enabled 1
2257 11:51:31.178023 SPI: 00: enabled 1
2258 11:51:31.181636 PNP: 0c09.0: enabled 1
2259 11:51:31.182254 GENERIC: 0.0: enabled 1
2260 11:51:31.185097 USB3 port 0: enabled 1
2261 11:51:31.188158 USB3 port 1: enabled 0
2262 11:51:31.191359 USB3 port 2: enabled 1
2263 11:51:31.191816 USB3 port 3: enabled 0
2264 11:51:31.194857 USB2 port 0: enabled 1
2265 11:51:31.198114 USB2 port 1: enabled 0
2266 11:51:31.198651 USB2 port 2: enabled 1
2267 11:51:31.201803 USB2 port 3: enabled 0
2268 11:51:31.204776 USB2 port 4: enabled 0
2269 11:51:31.207990 USB2 port 5: enabled 1
2270 11:51:31.208477 USB2 port 6: enabled 0
2271 11:51:31.211616 USB2 port 7: enabled 0
2272 11:51:31.214857 USB2 port 8: enabled 1
2273 11:51:31.215408 USB2 port 9: enabled 1
2274 11:51:31.218012 USB3 port 0: enabled 1
2275 11:51:31.221534 USB3 port 1: enabled 0
2276 11:51:31.222082 USB3 port 2: enabled 0
2277 11:51:31.224698 USB3 port 3: enabled 0
2278 11:51:31.228016 GENERIC: 0.0: enabled 1
2279 11:51:31.231720 GENERIC: 1.0: enabled 1
2280 11:51:31.232248 APIC: 00: enabled 1
2281 11:51:31.234844 APIC: 16: enabled 1
2282 11:51:31.238291 APIC: 10: enabled 1
2283 11:51:31.238761 APIC: 12: enabled 1
2284 11:51:31.241212 APIC: 14: enabled 1
2285 11:51:31.241671 APIC: 09: enabled 1
2286 11:51:31.244584 APIC: 01: enabled 1
2287 11:51:31.248196 APIC: 08: enabled 1
2288 11:51:31.248774 PCI: 01:00.0: enabled 1
2289 11:51:31.254816 BS: BS_DEV_INIT run times (exec / console): 11 / 1136 ms
2290 11:51:31.261668 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2291 11:51:31.264647 ELOG: NV offset 0xf20000 size 0x4000
2292 11:51:31.271081 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2293 11:51:31.278286 ELOG: Event(17) added with size 13 at 2024-06-06 11:51:31 UTC
2294 11:51:31.284281 ELOG: Event(9E) added with size 10 at 2024-06-06 11:51:31 UTC
2295 11:51:31.291211 ELOG: Event(9F) added with size 14 at 2024-06-06 11:51:31 UTC
2296 11:51:31.297578 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2297 11:51:31.304199 ELOG: Event(A0) added with size 9 at 2024-06-06 11:51:31 UTC
2298 11:51:31.307895 elog_add_boot_reason: Logged dev mode boot
2299 11:51:31.314338 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2300 11:51:31.314799 Finalize devices...
2301 11:51:31.317764 PCI: 00:02.0 final
2302 11:51:31.318223 PCI: 00:16.0 final
2303 11:51:31.324607 CSE RW Firmware Version: 16.1.30.2307
2304 11:51:31.325144 PCI: 00:1f.2 final
2305 11:51:31.327973 GENERIC: 0.0 final
2306 11:51:31.334681 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2307 11:51:31.335210 GENERIC: 1.0 final
2308 11:51:31.340901 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2309 11:51:31.343929 Devices finalized
2310 11:51:31.347682 BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms
2311 11:51:31.354280 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2312 11:51:31.360805 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2313 11:51:31.364107 ME: HFSTS1 : 0x90000245
2314 11:51:31.367579 ME: HFSTS2 : 0x32850116
2315 11:51:31.374227 ME: HFSTS3 : 0x00000050
2316 11:51:31.377832 ME: HFSTS4 : 0x00004000
2317 11:51:31.380534 ME: HFSTS5 : 0x00000000
2318 11:51:31.387072 ME: HFSTS6 : 0x40600006
2319 11:51:31.390388 ME: Manufacturing Mode : NO
2320 11:51:31.393962 ME: SPI Protection Mode Enabled : YES
2321 11:51:31.397117 ME: FPFs Committed : YES
2322 11:51:31.400349 ME: Manufacturing Vars Locked : YES
2323 11:51:31.407446 ME: FW Partition Table : OK
2324 11:51:31.410248 ME: Bringup Loader Failure : NO
2325 11:51:31.413633 ME: Firmware Init Complete : YES
2326 11:51:31.417328 ME: Boot Options Present : NO
2327 11:51:31.420411 ME: Update In Progress : NO
2328 11:51:31.423475 ME: D0i3 Support : YES
2329 11:51:31.426851 ME: Low Power State Enabled : NO
2330 11:51:31.430238 ME: CPU Replaced : YES
2331 11:51:31.436786 ME: CPU Replacement Valid : YES
2332 11:51:31.440388 ME: Current Working State : 5
2333 11:51:31.443598 ME: Current Operation State : 1
2334 11:51:31.446688 ME: Current Operation Mode : 0
2335 11:51:31.450385 ME: Error Code : 0
2336 11:51:31.453758 ME: Enhanced Debug Mode : NO
2337 11:51:31.456833 ME: CPU Debug Disabled : YES
2338 11:51:31.460066 ME: TXT Support : NO
2339 11:51:31.466746 ME: WP for RO is enabled : YES
2340 11:51:31.470107 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2341 11:51:31.476917 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2342 11:51:31.483252 CBFS: Found 'fallback/dsdt.aml' @0x7b340 size 0x5097 in mcache @0x76add18c
2343 11:51:31.486601 CBFS: 'fallback/slic' not found.
2344 11:51:31.493133 ACPI: Writing ACPI tables at 7686a000.
2345 11:51:31.493602 ACPI: * FACS
2346 11:51:31.496552 ACPI: * DSDT
2347 11:51:31.500164 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2348 11:51:31.505509 ACPI: * FADT
2349 11:51:31.506023 SCI is IRQ9
2350 11:51:31.511892 ACPI: added table 1/32, length now 40
2351 11:51:31.512475 ACPI: * SSDT
2352 11:51:31.518903 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2353 11:51:31.522262 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2354 11:51:31.528280 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2355 11:51:31.531737 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2356 11:51:31.538260 CBFS: Found 'wifi_sar_0.hex' @0x80c00 size 0xe6 in mcache @0x76add2d4
2357 11:51:31.541938 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2358 11:51:31.548294 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2359 11:51:31.555254 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2360 11:51:31.558138 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2361 11:51:31.564937 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2362 11:51:31.568216 I2C TX abort detected (00000001)
2363 11:51:31.574588 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10 -- NOT FOUND, skipping
2364 11:51:31.581789 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2365 11:51:31.584544 I2C TX abort detected (00000001)
2366 11:51:31.591484 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c -- NOT FOUND, skipping
2367 11:51:31.594566 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2368 11:51:31.603494 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2369 11:51:31.606697 PS2K: Passing 80 keymaps to kernel
2370 11:51:31.613435 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2371 11:51:31.619743 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2372 11:51:31.626391 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2373 11:51:31.632824 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2374 11:51:31.639698 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2375 11:51:31.646655 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2376 11:51:31.649338 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2377 11:51:31.656263 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2378 11:51:31.663305 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2379 11:51:31.669360 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2380 11:51:31.672632 ACPI: added table 2/32, length now 44
2381 11:51:31.676431 ACPI: * MCFG
2382 11:51:31.679493 ACPI: added table 3/32, length now 48
2383 11:51:31.679957 ACPI: * TPM2
2384 11:51:31.682821 TPM2 log created at 0x7685a000
2385 11:51:31.689615 ACPI: added table 4/32, length now 52
2386 11:51:31.690082 ACPI: * LPIT
2387 11:51:31.693157 ACPI: added table 5/32, length now 56
2388 11:51:31.695894 ACPI: * MADT
2389 11:51:31.696352 SCI is IRQ9
2390 11:51:31.699941 ACPI: added table 6/32, length now 60
2391 11:51:31.702898 cmd_reg from pmc_make_ipc_cmd 1052838
2392 11:51:31.709599 CL PMC desc table: numb of regions is 0x2 at addr 0x8064a1bc
2393 11:51:31.716388 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2394 11:51:31.723407 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2395 11:51:31.726056 PMC CrashLog size in discovery mode: 0xC00
2396 11:51:31.729147 cpu crashlog bar addr: 0x80640000
2397 11:51:31.732875 cpu discovery table offset: 0x6030
2398 11:51:31.739546 cpu_crashlog_discovery_table buffer count: 0x3
2399 11:51:31.745958 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2400 11:51:31.752687 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2401 11:51:31.759555 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2402 11:51:31.762755 PMC crashLog size in discovery mode : 0xC00
2403 11:51:31.769071 Invalid data 0x0 at offset 0x2200 from addr 0x80648000 of PMC SRAM.
2404 11:51:31.775952 discover mode PMC crashlog size adjusted to: 0x200
2405 11:51:31.783006 Invalid data 0x0 at offset 0x3e00 from addr 0x80648000 of PMC SRAM.
2406 11:51:31.786064 discover mode PMC crashlog size adjusted to: 0x0
2407 11:51:31.789184 m_cpu_crashLog_size : 0x3480 bytes
2408 11:51:31.792127 CPU crashLog present.
2409 11:51:31.795927 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2410 11:51:31.805589 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2411 11:51:31.806124 current = 76873430
2412 11:51:31.808634 ACPI: * DMAR
2413 11:51:31.811928 ACPI: added table 7/32, length now 64
2414 11:51:31.815299 ACPI: added table 8/32, length now 68
2415 11:51:31.815768 ACPI: * HPET
2416 11:51:31.821975 ACPI: added table 9/32, length now 72
2417 11:51:31.822440 ACPI: done.
2418 11:51:31.825620 ACPI tables: 38240 bytes.
2419 11:51:31.829050 smbios_write_tables: 76854000
2420 11:51:31.832549 EC returned error result code 3
2421 11:51:31.835474 Couldn't obtain OEM name from CBI
2422 11:51:31.838670 Create SMBIOS type 16
2423 11:51:31.839136 Create SMBIOS type 17
2424 11:51:31.842353 Create SMBIOS type 20
2425 11:51:31.845404 GENERIC: 0.0 (WIFI Device)
2426 11:51:31.849030 SMBIOS tables: 2156 bytes.
2427 11:51:31.852737 Writing table forward entry at 0x00000500
2428 11:51:31.858733 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum a955
2429 11:51:31.861922 Writing coreboot table at 0x7688e000
2430 11:51:31.868880 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2431 11:51:31.872117 1. 0000000000001000-000000000009ffff: RAM
2432 11:51:31.878909 2. 00000000000a0000-00000000000fffff: RESERVED
2433 11:51:31.882053 3. 0000000000100000-0000000076853fff: RAM
2434 11:51:31.888597 4. 0000000076854000-0000000076a2bfff: CONFIGURATION TABLES
2435 11:51:31.892366 5. 0000000076a2c000-0000000076ab7fff: RAMSTAGE
2436 11:51:31.898973 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2437 11:51:31.902536 7. 0000000077000000-00000000803fffff: RESERVED
2438 11:51:31.908388 8. 00000000c0000000-00000000cfffffff: RESERVED
2439 11:51:31.912013 9. 00000000f8000000-00000000f9ffffff: RESERVED
2440 11:51:31.918714 10. 00000000fb000000-00000000fb000fff: RESERVED
2441 11:51:31.922114 11. 00000000fc800000-00000000fe7fffff: RESERVED
2442 11:51:31.928413 12. 00000000feb00000-00000000feb7ffff: RESERVED
2443 11:51:31.931831 13. 00000000fec00000-00000000fecfffff: RESERVED
2444 11:51:31.935110 14. 00000000fed40000-00000000fed6ffff: RESERVED
2445 11:51:31.941958 15. 00000000fed80000-00000000fed87fff: RESERVED
2446 11:51:31.944970 16. 00000000fed90000-00000000fed92fff: RESERVED
2447 11:51:31.952223 17. 00000000feda0000-00000000feda1fff: RESERVED
2448 11:51:31.955204 18. 00000000fedc0000-00000000feddffff: RESERVED
2449 11:51:31.958179 19. 0000000100000000-000000027fbfffff: RAM
2450 11:51:31.961843 Passing 4 GPIOs to payload:
2451 11:51:31.968284 NAME | PORT | POLARITY | VALUE
2452 11:51:31.975315 lid | undefined | high | high
2453 11:51:31.978215 power | undefined | high | low
2454 11:51:31.985197 oprom | undefined | high | low
2455 11:51:31.988826 EC in RW | 0x00000151 | high | high
2456 11:51:31.992246 Board ID: 3
2457 11:51:31.992871 FW config: 0x131
2458 11:51:31.998609 Wrote coreboot table at: 0x7688e000, 0x714 bytes, checksum 5222
2459 11:51:32.001745 coreboot table: 1836 bytes.
2460 11:51:32.004869 IMD ROOT 0. 0x76fff000 0x00001000
2461 11:51:32.008207 IMD SMALL 1. 0x76ffe000 0x00001000
2462 11:51:32.011975 FSP MEMORY 2. 0x76afe000 0x00500000
2463 11:51:32.014871 CONSOLE 3. 0x76ade000 0x00020000
2464 11:51:32.021650 RW MCACHE 4. 0x76add000 0x0000043c
2465 11:51:32.024762 RO MCACHE 5. 0x76adc000 0x00000fd8
2466 11:51:32.028003 FMAP 6. 0x76adb000 0x0000064a
2467 11:51:32.031543 TIME STAMP 7. 0x76ada000 0x00000910
2468 11:51:32.035040 VBOOT WORK 8. 0x76ac6000 0x00014000
2469 11:51:32.038492 MEM INFO 9. 0x76ac5000 0x000003b8
2470 11:51:32.041664 ROMSTG STCK10. 0x76ac4000 0x00001000
2471 11:51:32.044616 AFTER CAR 11. 0x76ab8000 0x0000c000
2472 11:51:32.051225 RAMSTAGE 12. 0x76a2b000 0x0008d000
2473 11:51:32.054481 ACPI BERT 13. 0x76a1b000 0x00010000
2474 11:51:32.057885 CHROMEOS NVS14. 0x76a1a000 0x00000f00
2475 11:51:32.061475 REFCODE 15. 0x769ab000 0x0006f000
2476 11:51:32.064405 SMM BACKUP 16. 0x7699b000 0x00010000
2477 11:51:32.068139 RAMOOPS 17. 0x7689b000 0x00100000
2478 11:51:32.071382 IGD OPREGION18. 0x76896000 0x00004203
2479 11:51:32.074923 COREBOOT 19. 0x7688e000 0x00008000
2480 11:51:32.081841 ACPI 20. 0x7686a000 0x00024000
2481 11:51:32.084738 TPM2 TCGLOG21. 0x7685a000 0x00010000
2482 11:51:32.087743 PMC CRASHLOG22. 0x76859000 0x00000c00
2483 11:51:32.091667 CPU CRASHLOG23. 0x76855000 0x00003480
2484 11:51:32.094724 SMBIOS 24. 0x76854000 0x00001000
2485 11:51:32.097978 IMD small region:
2486 11:51:32.101171 IMD ROOT 0. 0x76ffec00 0x00000400
2487 11:51:32.104302 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2488 11:51:32.107699 VPD 2. 0x76ffeba0 0x00000027
2489 11:51:32.114016 CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020
2490 11:51:32.117973 POWER STATE 4. 0x76ffeb20 0x00000044
2491 11:51:32.121133 ROMSTAGE 5. 0x76ffeb00 0x00000004
2492 11:51:32.124404 ACPI GNVS 6. 0x76ffeaa0 0x00000048
2493 11:51:32.130657 TYPE_C INFO 7. 0x76ffea80 0x0000000c
2494 11:51:32.134440 BS: BS_WRITE_TABLES run times (exec / console): 8 / 644 ms
2495 11:51:32.137340 MTRR: Physical address space:
2496 11:51:32.143924 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2497 11:51:32.150773 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2498 11:51:32.157232 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2499 11:51:32.164315 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2500 11:51:32.170711 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2501 11:51:32.176959 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2502 11:51:32.183751 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2503 11:51:32.186919 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 11:51:32.190291 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 11:51:32.193421 MTRR: Fixed MSR 0x259 0x0000000000000000
2506 11:51:32.200061 MTRR: Fixed MSR 0x268 0x0606060606060606
2507 11:51:32.203788 MTRR: Fixed MSR 0x269 0x0606060606060606
2508 11:51:32.207091 MTRR: Fixed MSR 0x26a 0x0606060606060606
2509 11:51:32.209970 MTRR: Fixed MSR 0x26b 0x0606060606060606
2510 11:51:32.213643 MTRR: Fixed MSR 0x26c 0x0606060606060606
2511 11:51:32.220275 MTRR: Fixed MSR 0x26d 0x0606060606060606
2512 11:51:32.223362 MTRR: Fixed MSR 0x26e 0x0606060606060606
2513 11:51:32.227070 MTRR: Fixed MSR 0x26f 0x0606060606060606
2514 11:51:32.230509 call enable_fixed_mtrr()
2515 11:51:32.233669 CPU physical address size: 39 bits
2516 11:51:32.236787 MTRR: default type WB/UC MTRR counts: 6/6.
2517 11:51:32.239862 MTRR: UC selected as default type.
2518 11:51:32.246506 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2519 11:51:32.253451 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2520 11:51:32.259770 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2521 11:51:32.266577 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2522 11:51:32.272932 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2523 11:51:32.279424 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2524 11:51:32.282660 MTRR: Fixed MSR 0x250 0x0606060606060606
2525 11:51:32.286458 MTRR: Fixed MSR 0x258 0x0606060606060606
2526 11:51:32.289693 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 11:51:32.296172 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 11:51:32.299201 MTRR: Fixed MSR 0x269 0x0606060606060606
2529 11:51:32.302929 MTRR: Fixed MSR 0x26a 0x0606060606060606
2530 11:51:32.305975 MTRR: Fixed MSR 0x26b 0x0606060606060606
2531 11:51:32.313179 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 11:51:32.315727 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 11:51:32.319376 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 11:51:32.322547 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 11:51:32.329591 MTRR: Fixed MSR 0x250 0x0606060606060606
2536 11:51:32.332815 MTRR: Fixed MSR 0x250 0x0606060606060606
2537 11:51:32.336258 MTRR: Fixed MSR 0x258 0x0606060606060606
2538 11:51:32.339682 MTRR: Fixed MSR 0x259 0x0000000000000000
2539 11:51:32.343241 MTRR: Fixed MSR 0x268 0x0606060606060606
2540 11:51:32.349390 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 11:51:32.352758 MTRR: Fixed MSR 0x26a 0x0606060606060606
2542 11:51:32.356350 MTRR: Fixed MSR 0x26b 0x0606060606060606
2543 11:51:32.359417 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 11:51:32.365928 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 11:51:32.369437 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 11:51:32.372787 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 11:51:32.376307 call enable_fixed_mtrr()
2548 11:51:32.379461 call enable_fixed_mtrr()
2549 11:51:32.382400 MTRR: Fixed MSR 0x250 0x0606060606060606
2550 11:51:32.386394 CPU physical address size: 39 bits
2551 11:51:32.389126 CPU physical address size: 39 bits
2552 11:51:32.392342 MTRR: Fixed MSR 0x250 0x0606060606060606
2553 11:51:32.396118 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 11:51:32.402739 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 11:51:32.405890 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 11:51:32.409033 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 11:51:32.412844 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 11:51:32.419136 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 11:51:32.422151 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 11:51:32.425739 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 11:51:32.429039 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 11:51:32.435660 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 11:51:32.439280 MTRR: Fixed MSR 0x250 0x0606060606060606
2564 11:51:32.442423 MTRR: Fixed MSR 0x258 0x0606060606060606
2565 11:51:32.445472 MTRR: Fixed MSR 0x259 0x0000000000000000
2566 11:51:32.452321 MTRR: Fixed MSR 0x268 0x0606060606060606
2567 11:51:32.456015 MTRR: Fixed MSR 0x269 0x0606060606060606
2568 11:51:32.459831 MTRR: Fixed MSR 0x26a 0x0606060606060606
2569 11:51:32.462381 MTRR: Fixed MSR 0x26b 0x0606060606060606
2570 11:51:32.465849 MTRR: Fixed MSR 0x26c 0x0606060606060606
2571 11:51:32.472292 MTRR: Fixed MSR 0x26d 0x0606060606060606
2572 11:51:32.475901 MTRR: Fixed MSR 0x26e 0x0606060606060606
2573 11:51:32.478581 MTRR: Fixed MSR 0x26f 0x0606060606060606
2574 11:51:32.482057 MTRR: Fixed MSR 0x258 0x0606060606060606
2575 11:51:32.485606 call enable_fixed_mtrr()
2576 11:51:32.488820 call enable_fixed_mtrr()
2577 11:51:32.491894 CPU physical address size: 39 bits
2578 11:51:32.495845 MTRR: Fixed MSR 0x258 0x0606060606060606
2579 11:51:32.498660 MTRR: Fixed MSR 0x259 0x0000000000000000
2580 11:51:32.505201 MTRR: Fixed MSR 0x268 0x0606060606060606
2581 11:51:32.508674 MTRR: Fixed MSR 0x269 0x0606060606060606
2582 11:51:32.511867 MTRR: Fixed MSR 0x26a 0x0606060606060606
2583 11:51:32.515449 MTRR: Fixed MSR 0x26b 0x0606060606060606
2584 11:51:32.521826 MTRR: Fixed MSR 0x26c 0x0606060606060606
2585 11:51:32.525657 MTRR: Fixed MSR 0x26d 0x0606060606060606
2586 11:51:32.528744 MTRR: Fixed MSR 0x26e 0x0606060606060606
2587 11:51:32.532546 MTRR: Fixed MSR 0x26f 0x0606060606060606
2588 11:51:32.538648 MTRR: Fixed MSR 0x250 0x0606060606060606
2589 11:51:32.542002 MTRR: Fixed MSR 0x259 0x0000000000000000
2590 11:51:32.545034 MTRR: Fixed MSR 0x268 0x0606060606060606
2591 11:51:32.548579 MTRR: Fixed MSR 0x269 0x0606060606060606
2592 11:51:32.551890 MTRR: Fixed MSR 0x26a 0x0606060606060606
2593 11:51:32.558291 MTRR: Fixed MSR 0x26b 0x0606060606060606
2594 11:51:32.562171 MTRR: Fixed MSR 0x26c 0x0606060606060606
2595 11:51:32.565143 MTRR: Fixed MSR 0x26d 0x0606060606060606
2596 11:51:32.568402 MTRR: Fixed MSR 0x26e 0x0606060606060606
2597 11:51:32.575179 MTRR: Fixed MSR 0x26f 0x0606060606060606
2598 11:51:32.575642 call enable_fixed_mtrr()
2599 11:51:32.582247 MTRR: Fixed MSR 0x258 0x0606060606060606
2600 11:51:32.582778 call enable_fixed_mtrr()
2601 11:51:32.588341 MTRR: Fixed MSR 0x259 0x0000000000000000
2602 11:51:32.591458 MTRR: Fixed MSR 0x268 0x0606060606060606
2603 11:51:32.594869 MTRR: Fixed MSR 0x269 0x0606060606060606
2604 11:51:32.598727 MTRR: Fixed MSR 0x26a 0x0606060606060606
2605 11:51:32.604878 MTRR: Fixed MSR 0x26b 0x0606060606060606
2606 11:51:32.608256 MTRR: Fixed MSR 0x26c 0x0606060606060606
2607 11:51:32.611624 MTRR: Fixed MSR 0x26d 0x0606060606060606
2608 11:51:32.614744 MTRR: Fixed MSR 0x26e 0x0606060606060606
2609 11:51:32.621232 MTRR: Fixed MSR 0x26f 0x0606060606060606
2610 11:51:32.625168 CPU physical address size: 39 bits
2611 11:51:32.627856 CPU physical address size: 39 bits
2612 11:51:32.628296 call enable_fixed_mtrr()
2613 11:51:32.634572 CPU physical address size: 39 bits
2614 11:51:32.637854 CPU physical address size: 39 bits
2615 11:51:32.638286
2616 11:51:32.638714 MTRR check
2617 11:51:32.641288 Fixed MTRRs : Enabled
2618 11:51:32.641724 Variable MTRRs: Enabled
2619 11:51:32.644593
2620 11:51:32.647907 BS: BS_WRITE_TABLES exit times (exec / console): 246 / 150 ms
2621 11:51:32.651221 Checking cr50 for pending updates
2622 11:51:32.664180 Reading cr50 TPM mode
2623 11:51:32.679148 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2624 11:51:32.689043 CBFS: Found 'fallback/payload' @0x1c0500 size 0x25905 in mcache @0x76add40c
2625 11:51:32.692440 Checking segment from ROM address 0xf96d052c
2626 11:51:32.695545 Checking segment from ROM address 0xf96d0548
2627 11:51:32.702585 Loading segment from ROM address 0xf96d052c
2628 11:51:32.703120 code (compression=1)
2629 11:51:32.712565 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96d0564 filesize 0x258cd
2630 11:51:32.719336 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258cd
2631 11:51:32.722145 using LZMA
2632 11:51:32.743709 [ 0x30000000, 30051214, 0x32668e60) <- f96d0564
2633 11:51:32.750079 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2634 11:51:32.757974 Loading segment from ROM address 0xf96d0548
2635 11:51:32.761895 Entry Point 0x30000000
2636 11:51:32.762452 Loaded segments
2637 11:51:32.768696 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2638 11:51:32.772041 coreboot skipped calling FSP notify phase: 00000040.
2639 11:51:32.778119 coreboot skipped calling FSP notify phase: 000000f0.
2640 11:51:32.784989 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2641 11:51:32.785466 Finalizing chipset.
2642 11:51:32.788511 apm_control: Finalizing SMM.
2643 11:51:32.791302 APMC done.
2644 11:51:32.795000 CSE: EOP requested action: continue boot
2645 11:51:32.798517 HECI: CSE device 16.1 is disabled
2646 11:51:32.801859 HECI: CSE device 16.2 is disabled
2647 11:51:32.804749 HECI: CSE device 16.3 is disabled
2648 11:51:32.808087 HECI: CSE device 16.4 is disabled
2649 11:51:32.811827 HECI: CSE device 16.5 is disabled
2650 11:51:32.818230 BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 27 ms
2651 11:51:32.821229 mp_park_aps done after 0 msecs.
2652 11:51:32.824811 Jumping to boot code at 0x30000000(0x7688e000)
2653 11:51:32.834567 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2654 11:51:32.840021
2655 11:51:32.840591
2656 11:51:32.841082
2657 11:51:32.843260 Starting depthcharge on Volmar...
2658 11:51:32.843727
2659 11:51:32.845257 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2660 11:51:32.845797 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2661 11:51:32.846269 Setting prompt string to ['brya:']
2662 11:51:32.846713 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2663 11:51:32.849741 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2664 11:51:32.850322
2665 11:51:32.856408 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2666 11:51:32.856972
2667 11:51:32.862970 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2668 11:51:32.863499
2669 11:51:32.866566 configure_storage: Failed to remap 1C:2
2670 11:51:32.867127
2671 11:51:32.869699 Wipe memory regions:
2672 11:51:32.870161
2673 11:51:32.873144 [0x00000000001000, 0x000000000a0000)
2674 11:51:32.873604
2675 11:51:32.875819 [0x00000000100000, 0x00000030000000)
2676 11:51:32.983318
2677 11:51:32.986482 [0x00000032668e60, 0x00000076854000)
2678 11:51:33.139173
2679 11:51:33.141871 [0x00000100000000, 0x0000027fc00000)
2680 11:51:33.995063
2681 11:51:33.997759 ec_init: CrosEC protocol v3 supported (256, 256)
2682 11:51:33.998333
2683 11:51:34.004246 update_all_tcss_ports_states: port C0 state: usb enable 1 mux conn 0, usb2 1, usb3 1
2684 11:51:34.007864
2685 11:51:34.017423 update_all_tcss_ports_states: port C0 req: usage 0 usb3 1 usb2 1 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2686 11:51:34.017975
2687 11:51:34.020938 pmc_check_ipc_sts: STS_BUSY done after 569 us
2688 11:51:34.021404
2689 11:51:34.024088 send_conn_disc_msg: pmc_send_cmd succeeded
2690 11:51:34.633644
2691 11:51:34.634173 R8152: Initializing
2692 11:51:34.634538
2693 11:51:34.636921 Version 9 (ocp_data = 6010)
2694 11:51:34.637383
2695 11:51:34.640510 R8152: Done initializing
2696 11:51:34.641072
2697 11:51:34.643688 Adding net device
2698 11:51:34.944519
2699 11:51:34.947759 [firmware-brya-14505.B-collabora] May 21 2024 15:13:27
2700 11:51:34.948221
2701 11:51:34.948640
2702 11:51:34.949475 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2704 11:51:35.050820 brya: tftpboot 192.168.201.1 14202285/tftp-deploy-yj6xvjeb/kernel/bzImage 14202285/tftp-deploy-yj6xvjeb/kernel/cmdline 14202285/tftp-deploy-yj6xvjeb/ramdisk/ramdisk.cpio.gz
2705 11:51:35.051455 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2706 11:51:35.051975 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2707 11:51:35.056073 tftpboot 192.168.201.1 14202285/tftp-deploy-yj6xvjeb/kernel/bzIploy-yj6xvjeb/kernel/cmdline 14202285/tftp-deploy-yj6xvjeb/ramdisk/ramdisk.cpio.gz
2708 11:51:35.056581
2709 11:51:35.056954 Waiting for link
2710 11:51:35.258938
2711 11:51:35.259467 done.
2712 11:51:35.259851
2713 11:51:35.260420 MAC: 00:e0:4c:68:05:70
2714 11:51:35.260884
2715 11:51:35.262507 Sending DHCP discover... done.
2716 11:51:35.262969
2717 11:51:35.265723 Waiting for reply... done.
2718 11:51:35.266490
2719 11:51:35.269006 Sending DHCP request... done.
2720 11:51:35.269475
2721 11:51:35.275305 Waiting for reply... done.
2722 11:51:35.275771
2723 11:51:35.276134 My ip is 192.168.201.16
2724 11:51:35.276513
2725 11:51:35.279294 The DHCP server ip is 192.168.201.1
2726 11:51:35.282345
2727 11:51:35.285219 TFTP server IP predefined by user: 192.168.201.1
2728 11:51:35.285689
2729 11:51:35.291759 Bootfile predefined by user: 14202285/tftp-deploy-yj6xvjeb/kernel/bzImage
2730 11:51:35.292223
2731 11:51:35.295249 Sending tftp read request... done.
2732 11:51:35.295707
2733 11:51:35.304289 Waiting for the transfer...
2734 11:51:35.304796
2735 11:51:35.567987 00000000 ################################################################
2736 11:51:35.568120
2737 11:51:35.844877 00080000 ################################################################
2738 11:51:35.845009
2739 11:51:36.099542 00100000 ################################################################
2740 11:51:36.099672
2741 11:51:36.347944 00180000 ################################################################
2742 11:51:36.348102
2743 11:51:36.624938 00200000 ################################################################
2744 11:51:36.625068
2745 11:51:36.894750 00280000 ################################################################
2746 11:51:36.894882
2747 11:51:37.148174 00300000 ################################################################
2748 11:51:37.148302
2749 11:51:37.413708 00380000 ################################################################
2750 11:51:37.413839
2751 11:51:37.680143 00400000 ################################################################
2752 11:51:37.680280
2753 11:51:37.934146 00480000 ################################################################
2754 11:51:37.934278
2755 11:51:38.172475 00500000 ################################################################
2756 11:51:38.172652
2757 11:51:38.409770 00580000 ################################################################
2758 11:51:38.409908
2759 11:51:38.642734 00600000 ################################################################
2760 11:51:38.642870
2761 11:51:38.890714 00680000 ################################################################
2762 11:51:38.890847
2763 11:51:39.141133 00700000 ################################################################
2764 11:51:39.141274
2765 11:51:39.398082 00780000 ################################################################
2766 11:51:39.398208
2767 11:51:39.648858 00800000 ################################################################
2768 11:51:39.648988
2769 11:51:39.895215 00880000 ################################################################
2770 11:51:39.895364
2771 11:51:40.142219 00900000 ################################################################
2772 11:51:40.142343
2773 11:51:40.396459 00980000 ################################################################
2774 11:51:40.396608
2775 11:51:40.653607 00a00000 ################################################################
2776 11:51:40.653734
2777 11:51:40.903854 00a80000 ################################################################
2778 11:51:40.903986
2779 11:51:41.177726 00b00000 ################################################################
2780 11:51:41.177856
2781 11:51:41.424434 00b80000 ################################################################
2782 11:51:41.424596
2783 11:51:41.684380 00c00000 ################################################################
2784 11:51:41.684510
2785 11:51:41.941188 00c80000 ################################################################
2786 11:51:41.941317
2787 11:51:42.198356 00d00000 ################################################################
2788 11:51:42.198517
2789 11:51:42.470957 00d80000 ################################################################
2790 11:51:42.471119
2791 11:51:42.719189 00e00000 ################################################################
2792 11:51:42.719315
2793 11:51:42.984678 00e80000 ################################################################
2794 11:51:42.984821
2795 11:51:43.259010 00f00000 ################################################################
2796 11:51:43.259148
2797 11:51:43.510326 00f80000 ################################################################
2798 11:51:43.510459
2799 11:51:43.763474 01000000 ################################################################
2800 11:51:43.763650
2801 11:51:44.032367 01080000 ################################################################
2802 11:51:44.032565
2803 11:51:44.294882 01100000 ################################################################
2804 11:51:44.295043
2805 11:51:44.562432 01180000 ################################################################
2806 11:51:44.562606
2807 11:51:44.822613 01200000 ################################################################
2808 11:51:44.822774
2809 11:51:44.960170 01280000 #################################### done.
2810 11:51:44.960296
2811 11:51:44.963814 The bootfile was 19692576 bytes long.
2812 11:51:44.963918
2813 11:51:44.967055 Sending tftp read request... done.
2814 11:51:44.967155
2815 11:51:44.970210 Waiting for the transfer...
2816 11:51:44.970308
2817 11:51:45.234169 00000000 ################################################################
2818 11:51:45.234327
2819 11:51:45.477217 00080000 ################################################################
2820 11:51:45.477372
2821 11:51:45.721470 00100000 ################################################################
2822 11:51:45.721655
2823 11:51:45.980424 00180000 ################################################################
2824 11:51:45.980583
2825 11:51:46.227975 00200000 ################################################################
2826 11:51:46.228101
2827 11:51:46.483257 00280000 ################################################################
2828 11:51:46.483411
2829 11:51:46.726312 00300000 ################################################################
2830 11:51:46.726484
2831 11:51:46.977640 00380000 ################################################################
2832 11:51:46.977772
2833 11:51:47.223308 00400000 ################################################################
2834 11:51:47.223468
2835 11:51:47.465916 00480000 ################################################################
2836 11:51:47.466054
2837 11:51:47.708351 00500000 ################################################################
2838 11:51:47.708533
2839 11:51:47.950945 00580000 ################################################################
2840 11:51:47.951090
2841 11:51:48.198101 00600000 ################################################################
2842 11:51:48.198239
2843 11:51:48.440164 00680000 ################################################################
2844 11:51:48.440302
2845 11:51:48.698589 00700000 ################################################################
2846 11:51:48.698726
2847 11:51:48.959380 00780000 ################################################################
2848 11:51:48.959522
2849 11:51:49.028689 00800000 ################### done.
2850 11:51:49.028806
2851 11:51:49.031945 Sending tftp read request... done.
2852 11:51:49.032037
2853 11:51:49.035090 Waiting for the transfer...
2854 11:51:49.035177
2855 11:51:49.038352 00000000 # done.
2856 11:51:49.038439
2857 11:51:49.045212 Command line loaded dynamically from TFTP file: 14202285/tftp-deploy-yj6xvjeb/kernel/cmdline
2858 11:51:49.045322
2859 11:51:49.071472 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14202285/extract-nfsrootfs-yd5p15ds,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2860 11:51:49.078138
2861 11:51:49.081358 Shutting down all USB controllers.
2862 11:51:49.081443
2863 11:51:49.081528 Removing current net device
2864 11:51:49.081607
2865 11:51:49.084630 Finalizing coreboot
2866 11:51:49.084715
2867 11:51:49.091192 Exiting depthcharge with code 4 at timestamp: 26714567
2868 11:51:49.091277
2869 11:51:49.091361
2870 11:51:49.091441 Starting kernel ...
2871 11:51:49.091517
2872 11:51:49.091593
2873 11:51:49.092017 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2874 11:51:49.092123 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2875 11:51:49.092206 Setting prompt string to ['Linux version [0-9]']
2876 11:51:49.092309 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2877 11:51:49.092412 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2879 11:56:13.093186 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2881 11:56:13.094893 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2883 11:56:13.096262 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2886 11:56:13.097958 end: 2 depthcharge-action (duration 00:05:00) [common]
2888 11:56:13.098167 Cleaning after the job
2889 11:56:13.098249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/ramdisk
2890 11:56:13.099247 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/kernel
2891 11:56:13.101499 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/nfsrootfs
2892 11:56:13.161343 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202285/tftp-deploy-yj6xvjeb/modules
2893 11:56:13.162765 start: 4.1 power-off (timeout 00:00:30) [common]
2894 11:56:13.162934 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-9', '--port=1', '--command=off']
2895 11:56:13.239831 >> Command sent successfully.
2896 11:56:13.243890 Returned 0 in 0 seconds
2897 11:56:13.344884 end: 4.1 power-off (duration 00:00:00) [common]
2899 11:56:13.346658 start: 4.2 read-feedback (timeout 00:10:00) [common]
2900 11:56:13.348043 Listened to connection for namespace 'common' for up to 1s
2902 11:56:13.349553 Listened to connection for namespace 'common' for up to 1s
2903 11:56:14.348709 Finalising connection for namespace 'common'
2904 11:56:14.349390 Disconnecting from shell: Finalise
2905 11:56:14.350033
2906 11:56:14.451207 end: 4.2 read-feedback (duration 00:00:01) [common]
2907 11:56:14.451876 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14202285
2908 11:56:14.762676 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14202285
2909 11:56:14.762871 JobError: Your job cannot terminate cleanly.