Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 11:50:53.825971 lava-dispatcher, installed at version: 2024.03
2 11:50:53.826199 start: 0 validate
3 11:50:53.826315 Start time: 2024-06-06 11:50:53.826308+00:00 (UTC)
4 11:50:53.826454 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:50:53.826592 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 11:50:54.090572 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:50:54.091309 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-554-gb39d14135501e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:50:59.600709 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:50:59.601559 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:50:59.853972 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:50:59.854222 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.218-cip49-554-gb39d14135501e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:00.857889 validate duration: 7.03
14 11:51:00.858124 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:00.858223 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:00.858311 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:00.858449 Not decompressing ramdisk as can be used compressed.
18 11:51:00.858536 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 11:51:00.858603 saving as /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/ramdisk/initrd.cpio.gz
20 11:51:00.858666 total size: 6137763 (5 MB)
21 11:51:00.859717 progress 0 % (0 MB)
22 11:51:00.861552 progress 5 % (0 MB)
23 11:51:00.863089 progress 10 % (0 MB)
24 11:51:00.864785 progress 15 % (0 MB)
25 11:51:00.866366 progress 20 % (1 MB)
26 11:51:00.867889 progress 25 % (1 MB)
27 11:51:00.869691 progress 30 % (1 MB)
28 11:51:00.871227 progress 35 % (2 MB)
29 11:51:00.872723 progress 40 % (2 MB)
30 11:51:00.874426 progress 45 % (2 MB)
31 11:51:00.875943 progress 50 % (2 MB)
32 11:51:00.877622 progress 55 % (3 MB)
33 11:51:00.879120 progress 60 % (3 MB)
34 11:51:00.880657 progress 65 % (3 MB)
35 11:51:00.882359 progress 70 % (4 MB)
36 11:51:00.883940 progress 75 % (4 MB)
37 11:51:00.885440 progress 80 % (4 MB)
38 11:51:00.887097 progress 85 % (5 MB)
39 11:51:00.888590 progress 90 % (5 MB)
40 11:51:00.890098 progress 95 % (5 MB)
41 11:51:00.891966 progress 100 % (5 MB)
42 11:51:00.892147 5 MB downloaded in 0.03 s (174.88 MB/s)
43 11:51:00.892301 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:51:00.892520 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:51:00.892601 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:51:00.892676 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:51:00.892808 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-554-gb39d14135501e/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:51:00.892870 saving as /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/kernel/bzImage
50 11:51:00.892923 total size: 19692576 (18 MB)
51 11:51:00.892977 No compression specified
52 11:51:00.894045 progress 0 % (0 MB)
53 11:51:00.899145 progress 5 % (0 MB)
54 11:51:00.904084 progress 10 % (1 MB)
55 11:51:00.909093 progress 15 % (2 MB)
56 11:51:00.914195 progress 20 % (3 MB)
57 11:51:00.919146 progress 25 % (4 MB)
58 11:51:00.924043 progress 30 % (5 MB)
59 11:51:00.928950 progress 35 % (6 MB)
60 11:51:00.934052 progress 40 % (7 MB)
61 11:51:00.939032 progress 45 % (8 MB)
62 11:51:00.944028 progress 50 % (9 MB)
63 11:51:00.949062 progress 55 % (10 MB)
64 11:51:00.954109 progress 60 % (11 MB)
65 11:51:00.959137 progress 65 % (12 MB)
66 11:51:00.964135 progress 70 % (13 MB)
67 11:51:00.969107 progress 75 % (14 MB)
68 11:51:00.974023 progress 80 % (15 MB)
69 11:51:00.978903 progress 85 % (15 MB)
70 11:51:00.983797 progress 90 % (16 MB)
71 11:51:00.988691 progress 95 % (17 MB)
72 11:51:00.993710 progress 100 % (18 MB)
73 11:51:00.993958 18 MB downloaded in 0.10 s (185.89 MB/s)
74 11:51:00.994113 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:00.994322 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:00.994427 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:51:00.994518 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:51:00.994649 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 11:51:00.994711 saving as /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/nfsrootfs/full.rootfs.tar
81 11:51:00.994782 total size: 58462052 (55 MB)
82 11:51:00.994865 Using unxz to decompress xz
83 11:51:00.996274 progress 0 % (0 MB)
84 11:51:01.154784 progress 5 % (2 MB)
85 11:51:01.316242 progress 10 % (5 MB)
86 11:51:01.474496 progress 15 % (8 MB)
87 11:51:01.614815 progress 20 % (11 MB)
88 11:51:01.773308 progress 25 % (13 MB)
89 11:51:01.932808 progress 30 % (16 MB)
90 11:51:02.058335 progress 35 % (19 MB)
91 11:51:02.128614 progress 40 % (22 MB)
92 11:51:02.276633 progress 45 % (25 MB)
93 11:51:02.438549 progress 50 % (27 MB)
94 11:51:02.587782 progress 55 % (30 MB)
95 11:51:02.750002 progress 60 % (33 MB)
96 11:51:02.913141 progress 65 % (36 MB)
97 11:51:03.070979 progress 70 % (39 MB)
98 11:51:03.243189 progress 75 % (41 MB)
99 11:51:03.388753 progress 80 % (44 MB)
100 11:51:03.533584 progress 85 % (47 MB)
101 11:51:03.703219 progress 90 % (50 MB)
102 11:51:03.873166 progress 95 % (52 MB)
103 11:51:04.048852 progress 100 % (55 MB)
104 11:51:04.053864 55 MB downloaded in 3.06 s (18.23 MB/s)
105 11:51:04.054043 end: 1.3.1 http-download (duration 00:00:03) [common]
107 11:51:04.054283 end: 1.3 download-retry (duration 00:00:03) [common]
108 11:51:04.054375 start: 1.4 download-retry (timeout 00:09:57) [common]
109 11:51:04.054467 start: 1.4.1 http-download (timeout 00:09:57) [common]
110 11:51:04.054609 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.218-cip49-554-gb39d14135501e/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:51:04.054676 saving as /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/modules/modules.tar
112 11:51:04.054762 total size: 1624108 (1 MB)
113 11:51:04.054852 Using unxz to decompress xz
114 11:51:04.056877 progress 2 % (0 MB)
115 11:51:04.058864 progress 8 % (0 MB)
116 11:51:04.064569 progress 14 % (0 MB)
117 11:51:04.070275 progress 20 % (0 MB)
118 11:51:04.076132 progress 26 % (0 MB)
119 11:51:04.081603 progress 32 % (0 MB)
120 11:51:04.087732 progress 38 % (0 MB)
121 11:51:04.093782 progress 44 % (0 MB)
122 11:51:04.100021 progress 50 % (0 MB)
123 11:51:04.104956 progress 56 % (0 MB)
124 11:51:04.110706 progress 62 % (0 MB)
125 11:51:04.117183 progress 68 % (1 MB)
126 11:51:04.122927 progress 74 % (1 MB)
127 11:51:04.128066 progress 80 % (1 MB)
128 11:51:04.135106 progress 86 % (1 MB)
129 11:51:04.140747 progress 92 % (1 MB)
130 11:51:04.146865 progress 98 % (1 MB)
131 11:51:04.154371 1 MB downloaded in 0.10 s (15.55 MB/s)
132 11:51:04.154566 end: 1.4.1 http-download (duration 00:00:00) [common]
134 11:51:04.154904 end: 1.4 download-retry (duration 00:00:00) [common]
135 11:51:04.155011 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
136 11:51:04.155115 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
137 11:51:05.396478 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14202291/extract-nfsrootfs-rva3sb2t
138 11:51:05.396683 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
139 11:51:05.396814 start: 1.5.2 lava-overlay (timeout 00:09:55) [common]
140 11:51:05.397021 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq
141 11:51:05.397209 makedir: /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin
142 11:51:05.397316 makedir: /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/tests
143 11:51:05.397441 makedir: /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/results
144 11:51:05.397558 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-add-keys
145 11:51:05.397700 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-add-sources
146 11:51:05.397856 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-background-process-start
147 11:51:05.398011 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-background-process-stop
148 11:51:05.398181 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-common-functions
149 11:51:05.398336 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-echo-ipv4
150 11:51:05.398490 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-install-packages
151 11:51:05.398641 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-installed-packages
152 11:51:05.398792 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-os-build
153 11:51:05.398943 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-probe-channel
154 11:51:05.399095 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-probe-ip
155 11:51:05.399245 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-target-ip
156 11:51:05.399398 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-target-mac
157 11:51:05.399550 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-target-storage
158 11:51:05.399704 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-case
159 11:51:05.399856 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-event
160 11:51:05.400009 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-feedback
161 11:51:05.400146 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-raise
162 11:51:05.400343 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-reference
163 11:51:05.400494 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-runner
164 11:51:05.400648 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-set
165 11:51:05.400802 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-test-shell
166 11:51:05.400955 Updating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-install-packages (oe)
167 11:51:05.401175 Updating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/bin/lava-installed-packages (oe)
168 11:51:05.401327 Creating /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/environment
169 11:51:05.401449 LAVA metadata
170 11:51:05.401548 - LAVA_JOB_ID=14202291
171 11:51:05.401640 - LAVA_DISPATCHER_IP=192.168.201.1
172 11:51:05.401776 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:55) [common]
173 11:51:05.401862 skipped lava-vland-overlay
174 11:51:05.401970 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
175 11:51:05.402078 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
176 11:51:05.402168 skipped lava-multinode-overlay
177 11:51:05.402274 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
178 11:51:05.402381 start: 1.5.2.3 test-definition (timeout 00:09:55) [common]
179 11:51:05.402475 Loading test definitions
180 11:51:05.402597 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:55) [common]
181 11:51:05.402688 Using /lava-14202291 at stage 0
182 11:51:05.403080 uuid=14202291_1.5.2.3.1 testdef=None
183 11:51:05.403193 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
184 11:51:05.403304 start: 1.5.2.3.2 test-overlay (timeout 00:09:55) [common]
185 11:51:05.403919 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
187 11:51:05.404257 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:55) [common]
188 11:51:05.405257 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
190 11:51:05.405495 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
191 11:51:05.406042 runner path: /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/0/tests/0_wifi-basic test_uuid 14202291_1.5.2.3.1
192 11:51:05.406216 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 11:51:05.406419 Creating lava-test-runner.conf files
195 11:51:05.406493 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14202291/lava-overlay-xk2w1xoq/lava-14202291/0 for stage 0
196 11:51:05.406594 - 0_wifi-basic
197 11:51:05.406720 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
198 11:51:05.406831 start: 1.5.2.4 compress-overlay (timeout 00:09:55) [common]
199 11:51:05.412198 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
200 11:51:05.412302 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
201 11:51:05.412394 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 11:51:05.412486 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
203 11:51:05.412576 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
204 11:51:05.561945 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 11:51:05.562093 start: 1.5.4 extract-modules (timeout 00:09:55) [common]
206 11:51:05.562172 extracting modules file /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14202291/extract-nfsrootfs-rva3sb2t
207 11:51:05.605341 extracting modules file /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14202291/extract-overlay-ramdisk-s9nb6xw3/ramdisk
208 11:51:05.649657 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 11:51:05.649850 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
210 11:51:05.649938 [common] Applying overlay to NFS
211 11:51:05.649999 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14202291/compress-overlay-jer9eck1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14202291/extract-nfsrootfs-rva3sb2t
212 11:51:05.656074 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
213 11:51:05.656172 start: 1.5.6 configure-preseed-file (timeout 00:09:55) [common]
214 11:51:05.656252 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 11:51:05.656330 start: 1.5.7 compress-ramdisk (timeout 00:09:55) [common]
216 11:51:05.656399 Building ramdisk /var/lib/lava/dispatcher/tmp/14202291/extract-overlay-ramdisk-s9nb6xw3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14202291/extract-overlay-ramdisk-s9nb6xw3/ramdisk
217 11:51:05.779096 >> 48019 blocks
218 11:51:06.717151 rename /var/lib/lava/dispatcher/tmp/14202291/extract-overlay-ramdisk-s9nb6xw3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/ramdisk/ramdisk.cpio.gz
219 11:51:06.717321 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 11:51:06.717408 start: 1.5.8 prepare-kernel (timeout 00:09:54) [common]
221 11:51:06.717488 start: 1.5.8.1 prepare-fit (timeout 00:09:54) [common]
222 11:51:06.717556 No mkimage arch provided, not using FIT.
223 11:51:06.717629 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 11:51:06.717701 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 11:51:06.717774 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
226 11:51:06.717848 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:54) [common]
227 11:51:06.717906 No LXC device requested
228 11:51:06.717974 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 11:51:06.718046 start: 1.7 deploy-device-env (timeout 00:09:54) [common]
230 11:51:06.718114 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 11:51:06.718170 Checking files for TFTP limit of 4294967296 bytes.
232 11:51:06.718452 end: 1 tftp-deploy (duration 00:00:06) [common]
233 11:51:06.718586 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 11:51:06.718730 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 11:51:06.718823 substitutions:
236 11:51:06.718883 - {DTB}: None
237 11:51:06.718936 - {INITRD}: 14202291/tftp-deploy-zzmq52ss/ramdisk/ramdisk.cpio.gz
238 11:51:06.718987 - {KERNEL}: 14202291/tftp-deploy-zzmq52ss/kernel/bzImage
239 11:51:06.719038 - {LAVA_MAC}: None
240 11:51:06.719088 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14202291/extract-nfsrootfs-rva3sb2t
241 11:51:06.719139 - {NFS_SERVER_IP}: 192.168.201.1
242 11:51:06.719188 - {PRESEED_CONFIG}: None
243 11:51:06.719247 - {PRESEED_LOCAL}: None
244 11:51:06.719298 - {RAMDISK}: 14202291/tftp-deploy-zzmq52ss/ramdisk/ramdisk.cpio.gz
245 11:51:06.719349 - {ROOT_PART}: None
246 11:51:06.719410 - {ROOT}: None
247 11:51:06.719459 - {SERVER_IP}: 192.168.201.1
248 11:51:06.719508 - {TEE}: None
249 11:51:06.719557 Parsed boot commands:
250 11:51:06.719605 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 11:51:06.719765 Parsed boot commands: tftpboot 192.168.201.1 14202291/tftp-deploy-zzmq52ss/kernel/bzImage 14202291/tftp-deploy-zzmq52ss/kernel/cmdline 14202291/tftp-deploy-zzmq52ss/ramdisk/ramdisk.cpio.gz
252 11:51:06.719876 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 11:51:06.719951 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 11:51:06.720024 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 11:51:06.720097 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 11:51:06.720155 Not connected, no need to disconnect.
257 11:51:06.720222 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 11:51:06.720293 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 11:51:06.720348 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-4'
260 11:51:06.723789 Setting prompt string to ['lava-test: # ']
261 11:51:06.724110 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 11:51:06.724213 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 11:51:06.724309 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 11:51:06.724395 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 11:51:06.724590 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-4']
266 11:51:20.256572 Returned 0 in 13 seconds
267 11:51:20.357497 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
269 11:51:20.358746 end: 2.2.2 reset-device (duration 00:00:14) [common]
270 11:51:20.359238 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
271 11:51:20.359648 Setting prompt string to 'Starting depthcharge on Volmar...'
272 11:51:20.359980 Changing prompt to 'Starting depthcharge on Volmar...'
273 11:51:20.360312 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
274 11:51:20.362102 [Enter `^Ec?' for help]
275 11:51:20.362490
276 11:51:20.362958
277 11:51:20.363285 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
278 11:51:20.363577 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
279 11:51:20.363848 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
280 11:51:20.364144 CPU: AES supported, TXT NOT supported, VT supported
281 11:51:20.364439 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
282 11:51:20.364737 Cache size = 10 MiB
283 11:51:20.365030 MCH: device id 4609 (rev 04) is Alderlake-P
284 11:51:20.365353 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
285 11:51:20.365638 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
286 11:51:20.365935 VBOOT: Loading verstage.
287 11:51:20.366214 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 11:51:20.366506 FMAP: base = 0x0 size = 0x2000000 #areas = 37
289 11:51:20.366818 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 11:51:20.367104 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
291 11:51:20.367399 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
292 11:51:20.367675
293 11:51:20.367959
294 11:51:20.368211 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
295 11:51:20.368470 Probing TPM I2C: I2C bus 1 version 0x3230302a
296 11:51:20.368738 DW I2C bus 1 at 0xfe022000 (400 KHz)
297 11:51:20.368991 I2C TX abort detected (00000001)
298 11:51:20.369354 cr50_i2c_read: Address write failed
299 11:51:20.369610 .done! DID_VID 0x00281ae0
300 11:51:20.369867 TPM ready after 0 ms
301 11:51:20.370138 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
302 11:51:20.370392 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
303 11:51:20.370670 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 11:51:20.370955 tlcl_send_startup: Startup return code is 0
305 11:51:20.371238 TPM: setup succeeded
306 11:51:20.371496 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
307 11:51:20.371751 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 11:51:20.372023 Chrome EC: UHEPI supported
309 11:51:20.372275 Reading cr50 boot mode
310 11:51:20.372522 Cr50 says boot_mode is VERIFIED_RW(0x00).
311 11:51:20.372849 Phase 1
312 11:51:20.373167 FMAP: area GBB found @ 1805000 (458752 bytes)
313 11:51:20.373460 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 11:51:20.373842 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 11:51:20.374139 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
316 11:51:20.374401 VB2:vb2_check_recovery() Recovery was requested manually
317 11:51:20.374684 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
318 11:51:20.374941 Recovery requested (1009000e)
319 11:51:20.375191 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
320 11:51:20.375461 tlcl_extend: response is 0
321 11:51:20.375714 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
322 11:51:20.375987 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
323 11:51:20.376246 tlcl_extend: response is 0
324 11:51:20.376496 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
325 11:51:20.376763 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 11:51:20.377041 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
327 11:51:20.377369 BS: verstage times (exec / console): total (unknown) / 156 ms
328 11:51:20.377624
329 11:51:20.377889
330 11:51:20.378142 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
331 11:51:20.378396 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 11:51:20.378670 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 11:51:20.378957 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
334 11:51:20.379341 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 11:51:20.379714 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
336 11:51:20.380008 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
337 11:51:20.380269 TCO_STS: 0000 0000
338 11:51:20.380540 GEN_PMCON: d0015038 00002200
339 11:51:20.380795 GBLRST_CAUSE: 00000000 00000000
340 11:51:20.381085 HPR_CAUSE0: 00000000
341 11:51:20.381367 prev_sleep_state 5
342 11:51:20.381621 Abort disabling TXT, as CPU is not TXT capable.
343 11:51:20.381889 cse_lite: Skip switching to RW in the recovery path
344 11:51:20.382142 Boot Count incremented to 10434
345 11:51:20.382392 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
346 11:51:20.382665 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
347 11:51:20.382922 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
348 11:51:20.383195 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
349 11:51:20.383451 Chrome EC: UHEPI supported
350 11:51:20.383702 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
351 11:51:20.383981 Probing TPM I2C: done! DID_VID 0x00281ae0
352 11:51:20.384395 Locality already claimed
353 11:51:20.384683 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
354 11:51:20.384939 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
355 11:51:20.385303 MRC: Hash idx 0x100b comparison successful.
356 11:51:20.385565 MRC cache found, size f6c8
357 11:51:20.385828 bootmode is set to: 2
358 11:51:20.386085 EC returned error result code 3
359 11:51:20.386342 FW_CONFIG value from CBI is 0x131
360 11:51:20.386618 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
361 11:51:20.386865 SPD index = 0
362 11:51:20.387084 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
363 11:51:20.387281 SPD: module type is LPDDR4X
364 11:51:20.387461 SPD: module part number is K4U6E3S4AB-MGCL
365 11:51:20.387644 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
366 11:51:20.388158 SPD: device width 16 bits, bus width 16 bits
367 11:51:20.388599 SPD: module size is 1024 MB (per channel)
368 11:51:20.389037 CBMEM:
369 11:51:20.389440 IMD: root @ 0x76fff000 254 entries.
370 11:51:20.389853 IMD: root @ 0x76ffec00 62 entries.
371 11:51:20.390271 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
372 11:51:20.390677 RO_VPD is uninitialized or empty.
373 11:51:20.391088 FMAP: area RW_VPD found @ f29000 (8192 bytes)
374 11:51:20.391505 External stage cache:
375 11:51:20.391888 IMD: root @ 0x7bbff000 254 entries.
376 11:51:20.392206 IMD: root @ 0x7bbfec00 62 entries.
377 11:51:20.392464 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
378 11:51:20.392614 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
379 11:51:20.392768 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
380 11:51:20.392907 MRC: 'RECOVERY_MRC_CACHE' does not need update.
381 11:51:20.393065 8 DIMMs found
382 11:51:20.393216 SMM Memory Map
383 11:51:20.393363 SMRAM : 0x7b800000 0x800000
384 11:51:20.393499 Subregion 0: 0x7b800000 0x200000
385 11:51:20.393635 Subregion 1: 0x7ba00000 0x200000
386 11:51:20.393770 Subregion 2: 0x7bc00000 0x400000
387 11:51:20.393918 top_of_ram = 0x77000000
388 11:51:20.394055 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
389 11:51:20.394204 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
390 11:51:20.394405 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
391 11:51:20.394557 MTRR Range: Start=ff000000 End=0 (Size 1000000)
392 11:51:20.394693 Normal boot
393 11:51:20.394832 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
394 11:51:20.394969 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
395 11:51:20.395121 Processing 237 relocs. Offset value of 0x74aba000
396 11:51:20.395258 BS: romstage times (exec / console): total (unknown) / 280 ms
397 11:51:20.395396
398 11:51:20.395529
399 11:51:20.395671 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
400 11:51:20.395810 Normal boot
401 11:51:20.395953 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
402 11:51:20.396091 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 11:51:20.396236 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 11:51:20.396379 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
405 11:51:20.396515 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
406 11:51:20.396657 Processing 5931 relocs. Offset value of 0x72a30000
407 11:51:20.396794 BS: postcar times (exec / console): total (unknown) / 51 ms
408 11:51:20.396932
409 11:51:20.397075
410 11:51:20.397186 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
411 11:51:20.397296 Reserving BERT start 76a1f000, size 10000
412 11:51:20.397413 Normal boot
413 11:51:20.397528 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
414 11:51:20.397644 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
415 11:51:20.397753 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
416 11:51:20.397877 FMAP: area RW_VPD found @ f29000 (8192 bytes)
417 11:51:20.398087 Google Chrome EC: version:
418 11:51:20.398207 ro: volmar_v2.0.14126-e605144e9c
419 11:51:20.398318 rw: volmar_v0.0.55-22d1557
420 11:51:20.398427 running image: 1
421 11:51:20.398544 ACPI _SWS is PM1 Index 8 GPE Index -1
422 11:51:20.398659 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
423 11:51:20.398768 EC returned error result code 3
424 11:51:20.398876 FW_CONFIG value from CBI is 0x131
425 11:51:20.398985 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
426 11:51:20.399188 PCI: 00:1c.2 disabled by fw_config
427 11:51:20.399313 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
428 11:51:20.399424 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
429 11:51:20.399535 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
430 11:51:20.399644 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
431 11:51:20.399767 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
432 11:51:20.399879 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
433 11:51:20.399991 microcode: sig=0x906a4 pf=0x80 revision=0x423
434 11:51:20.400099 microcode: Update skipped, already up-to-date
435 11:51:20.400208 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
436 11:51:20.400324 Detected 6 core, 8 thread CPU.
437 11:51:20.400434 Setting up SMI for CPU
438 11:51:20.400542 IED base = 0x7bc00000
439 11:51:20.400651 IED size = 0x00400000
440 11:51:20.400758 Will perform SMM setup.
441 11:51:20.400876 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
442 11:51:20.400986 LAPIC 0x0 in XAPIC mode.
443 11:51:20.401120 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
444 11:51:20.401232 Processing 18 relocs. Offset value of 0x00030000
445 11:51:20.401341 Attempting to start 7 APs
446 11:51:20.401456 Waiting for 10ms after sending INIT.
447 11:51:20.401564 Waiting for SIPI to complete...
448 11:51:20.401671 done.
449 11:51:20.401778 LAPIC 0x10 in XAPIC mode.
450 11:51:20.401887 LAPIC 0x8 in XAPIC mode.
451 11:51:20.401983 LAPIC 0x9 in XAPIC mode.
452 11:51:20.402076 LAPIC 0x14 in XAPIC mode.
453 11:51:20.402165 LAPIC 0x12 in XAPIC mode.
454 11:51:20.402256 AP: slot 2 apic_id 14, MCU rev: 0x00000423
455 11:51:20.402347 AP: slot 1 apic_id 12, MCU rev: 0x00000423
456 11:51:20.402437 AP: slot 3 apic_id 10, MCU rev: 0x00000423
457 11:51:20.402537 LAPIC 0x16 in XAPIC mode.
458 11:51:20.402629 AP: slot 7 apic_id 8, MCU rev: 0x00000423
459 11:51:20.402721 AP: slot 4 apic_id 16, MCU rev: 0x00000423
460 11:51:20.402811 AP: slot 5 apic_id 9, MCU rev: 0x00000423
461 11:51:20.402901 Waiting for SIPI to complete...
462 11:51:20.402992 done.
463 11:51:20.403314 LAPIC 0x1 in XAPIC mode.
464 11:51:20.403421 AP: slot 6 apic_id 1, MCU rev: 0x00000423
465 11:51:20.403513 smm_setup_relocation_handler: enter
466 11:51:20.403603 smm_setup_relocation_handler: exit
467 11:51:20.403700 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
468 11:51:20.403793 Processing 11 relocs. Offset value of 0x00038000
469 11:51:20.403922 smm_module_setup_stub: stack_top = 0x7b804000
470 11:51:20.404027 smm_module_setup_stub: per cpu stack_size = 0x800
471 11:51:20.404121 smm_module_setup_stub: runtime.start32_offset = 0x4c
472 11:51:20.404222 smm_module_setup_stub: runtime.smm_size = 0x10000
473 11:51:20.404316 SMM Module: stub loaded at 38000. Will call 0x76a53094
474 11:51:20.404409 Installing permanent SMM handler to 0x7b800000
475 11:51:20.404499 smm_load_module: total_smm_space_needed e468, available -> 200000
476 11:51:20.404593 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
477 11:51:20.404685 Processing 255 relocs. Offset value of 0x7b9f6000
478 11:51:20.404781 smm_load_module: smram_start: 0x7b800000
479 11:51:20.404871 smm_load_module: smram_end: 7ba00000
480 11:51:20.404960 smm_load_module: handler start 0x7b9f6d5f
481 11:51:20.405070 smm_load_module: handler_size 98d0
482 11:51:20.405164 smm_load_module: fxsave_area 0x7b9ff000
483 11:51:20.405255 smm_load_module: fxsave_size 1000
484 11:51:20.405355 smm_load_module: CONFIG_MSEG_SIZE 0x0
485 11:51:20.405447 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
486 11:51:20.405539 smm_load_module: handler_mod_params.smbase = 0x7b800000
487 11:51:20.405630 smm_load_module: per_cpu_save_state_size = 0x400
488 11:51:20.405719 smm_load_module: num_cpus = 0x8
489 11:51:20.405808 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
490 11:51:20.405905 smm_load_module: total_save_state_size = 0x2000
491 11:51:20.405996 smm_load_module: cpu0 entry: 7b9e6000
492 11:51:20.406086 smm_create_map: cpus allowed in one segment 30
493 11:51:20.406177 smm_create_map: min # of segments needed 1
494 11:51:20.406267 CPU 0x0
495 11:51:20.406357 smbase 7b9e6000 entry 7b9ee000
496 11:51:20.406453 ss_start 7b9f5c00 code_end 7b9ee208
497 11:51:20.406547 CPU 0x1
498 11:51:20.406637 smbase 7b9e5c00 entry 7b9edc00
499 11:51:20.406728 ss_start 7b9f5800 code_end 7b9ede08
500 11:51:20.406830 CPU 0x2
501 11:51:20.406906 smbase 7b9e5800 entry 7b9ed800
502 11:51:20.406989 ss_start 7b9f5400 code_end 7b9eda08
503 11:51:20.407068 CPU 0x3
504 11:51:20.407146 smbase 7b9e5400 entry 7b9ed400
505 11:51:20.407227 ss_start 7b9f5000 code_end 7b9ed608
506 11:51:20.407305 CPU 0x4
507 11:51:20.407382 smbase 7b9e5000 entry 7b9ed000
508 11:51:20.407460 ss_start 7b9f4c00 code_end 7b9ed208
509 11:51:20.407542 CPU 0x5
510 11:51:20.407624 smbase 7b9e4c00 entry 7b9ecc00
511 11:51:20.407707 ss_start 7b9f4800 code_end 7b9ece08
512 11:51:20.407785 CPU 0x6
513 11:51:20.407863 smbase 7b9e4800 entry 7b9ec800
514 11:51:20.407941 ss_start 7b9f4400 code_end 7b9eca08
515 11:51:20.408019 CPU 0x7
516 11:51:20.408100 smbase 7b9e4400 entry 7b9ec400
517 11:51:20.408178 ss_start 7b9f4000 code_end 7b9ec608
518 11:51:20.408256 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
519 11:51:20.408337 Processing 11 relocs. Offset value of 0x7b9ee000
520 11:51:20.408415 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
521 11:51:20.408494 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
522 11:51:20.408573 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
523 11:51:20.408657 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
524 11:51:20.408738 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
525 11:51:20.408817 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
526 11:51:20.408896 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
527 11:51:20.408975 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
528 11:51:20.409068 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
529 11:51:20.409148 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
530 11:51:20.409232 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
531 11:51:20.409310 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
532 11:51:20.409388 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
533 11:51:20.409467 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
534 11:51:20.409545 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
535 11:51:20.409624 smm_module_setup_stub: stack_top = 0x7b804000
536 11:51:20.409702 smm_module_setup_stub: per cpu stack_size = 0x800
537 11:51:20.409788 smm_module_setup_stub: runtime.start32_offset = 0x4c
538 11:51:20.409867 smm_module_setup_stub: runtime.smm_size = 0x200000
539 11:51:20.409944 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
540 11:51:20.410021 Clearing SMI status registers
541 11:51:20.410098 SMI_STS: PM1
542 11:51:20.410177 PM1_STS: PWRBTN
543 11:51:20.410255 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
544 11:51:20.410339 In relocation handler: CPU 0
545 11:51:20.410418 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
546 11:51:20.410496 Writing SMRR. base = 0x7b800006, mask=0xff800c00
547 11:51:20.410576 Relocation complete.
548 11:51:20.410653 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
549 11:51:20.410732 In relocation handler: CPU 6
550 11:51:20.410809 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
551 11:51:20.410895 Relocation complete.
552 11:51:20.411208 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
553 11:51:20.411397 In relocation handler: CPU 3
554 11:51:20.411576 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
555 11:51:20.411755 Writing SMRR. base = 0x7b800006, mask=0xff800c00
556 11:51:20.411929 Relocation complete.
557 11:51:20.412085 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
558 11:51:20.412239 In relocation handler: CPU 2
559 11:51:20.412393 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
560 11:51:20.412555 Writing SMRR. base = 0x7b800006, mask=0xff800c00
561 11:51:20.412707 Relocation complete.
562 11:51:20.412860 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
563 11:51:20.413029 In relocation handler: CPU 1
564 11:51:20.413188 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
565 11:51:20.413276 Writing SMRR. base = 0x7b800006, mask=0xff800c00
566 11:51:20.413347 Relocation complete.
567 11:51:20.413416 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
568 11:51:20.413485 In relocation handler: CPU 4
569 11:51:20.413558 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
570 11:51:20.413626 Writing SMRR. base = 0x7b800006, mask=0xff800c00
571 11:51:20.413694 Relocation complete.
572 11:51:20.413763 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
573 11:51:20.413832 In relocation handler: CPU 7
574 11:51:20.413899 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
575 11:51:20.413969 Writing SMRR. base = 0x7b800006, mask=0xff800c00
576 11:51:20.414036 Relocation complete.
577 11:51:20.414108 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
578 11:51:20.414179 In relocation handler: CPU 5
579 11:51:20.414247 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
580 11:51:20.414314 Relocation complete.
581 11:51:20.414382 Initializing CPU #0
582 11:51:20.414449 CPU: vendor Intel device 906a4
583 11:51:20.414516 CPU: family 06, model 9a, stepping 04
584 11:51:20.414584 Clearing out pending MCEs
585 11:51:20.414656 cpu: energy policy set to 7
586 11:51:20.414724 Turbo is available but hidden
587 11:51:20.414792 Turbo is available and visible
588 11:51:20.414859 microcode: Update skipped, already up-to-date
589 11:51:20.414928 CPU #0 initialized
590 11:51:20.414995 Initializing CPU #6
591 11:51:20.415063 Initializing CPU #3
592 11:51:20.415131 Initializing CPU #4
593 11:51:20.415203 CPU: vendor Intel device 906a4
594 11:51:20.415275 CPU: family 06, model 9a, stepping 04
595 11:51:20.415342 Initializing CPU #1
596 11:51:20.415410 Clearing out pending MCEs
597 11:51:20.415477 Initializing CPU #2
598 11:51:20.415544 CPU: vendor Intel device 906a4
599 11:51:20.415612 CPU: family 06, model 9a, stepping 04
600 11:51:20.415679 cpu: energy policy set to 7
601 11:51:20.415750 Clearing out pending MCEs
602 11:51:20.415819 CPU: vendor Intel device 906a4
603 11:51:20.415887 CPU: family 06, model 9a, stepping 04
604 11:51:20.415955 CPU: vendor Intel device 906a4
605 11:51:20.416022 CPU: family 06, model 9a, stepping 04
606 11:51:20.416091 microcode: Update skipped, already up-to-date
607 11:51:20.416158 CPU #3 initialized
608 11:51:20.416226 Clearing out pending MCEs
609 11:51:20.416300 Clearing out pending MCEs
610 11:51:20.416368 Initializing CPU #7
611 11:51:20.416436 cpu: energy policy set to 7
612 11:51:20.416504 cpu: energy policy set to 7
613 11:51:20.416571 microcode: Update skipped, already up-to-date
614 11:51:20.416639 CPU #4 initialized
615 11:51:20.416706 cpu: energy policy set to 7
616 11:51:20.416773 microcode: Update skipped, already up-to-date
617 11:51:20.416855 CPU #1 initialized
618 11:51:20.416915 microcode: Update skipped, already up-to-date
619 11:51:20.416975 CPU #2 initialized
620 11:51:20.417049 Initializing CPU #5
621 11:51:20.417113 CPU: vendor Intel device 906a4
622 11:51:20.417174 CPU: family 06, model 9a, stepping 04
623 11:51:20.417234 CPU: vendor Intel device 906a4
624 11:51:20.417295 CPU: family 06, model 9a, stepping 04
625 11:51:20.417359 CPU: vendor Intel device 906a4
626 11:51:20.417422 CPU: family 06, model 9a, stepping 04
627 11:51:20.417481 Clearing out pending MCEs
628 11:51:20.417541 Clearing out pending MCEs
629 11:51:20.417601 cpu: energy policy set to 7
630 11:51:20.417662 Clearing out pending MCEs
631 11:51:20.417722 cpu: energy policy set to 7
632 11:51:20.417783 microcode: Update skipped, already up-to-date
633 11:51:20.417843 CPU #5 initialized
634 11:51:20.417908 microcode: Update skipped, already up-to-date
635 11:51:20.417968 CPU #7 initialized
636 11:51:20.418028 cpu: energy policy set to 7
637 11:51:20.418087 microcode: Update skipped, already up-to-date
638 11:51:20.418147 CPU #6 initialized
639 11:51:20.418206 bsp_do_flight_plan done after 695 msecs.
640 11:51:20.418266 CPU: frequency set to 4400 MHz
641 11:51:20.418326 Enabling SMIs.
642 11:51:20.418386 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
643 11:51:20.418451 Probing TPM I2C: done! DID_VID 0x00281ae0
644 11:51:20.418513 Locality already claimed
645 11:51:20.418573 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
646 11:51:20.418634 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
647 11:51:20.418695 Enabling GPIO PM b/c CR50 has long IRQ pulse support
648 11:51:20.418756 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
649 11:51:20.418817 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
650 11:51:20.418879 Found a VBT of 9216 bytes after decompression
651 11:51:20.418939 PCI 1.0, PIN A, using IRQ #16
652 11:51:20.419004 PCI 2.0, PIN A, using IRQ #17
653 11:51:20.419064 PCI 4.0, PIN A, using IRQ #18
654 11:51:20.419124 PCI 5.0, PIN A, using IRQ #16
655 11:51:20.419183 PCI 6.0, PIN A, using IRQ #16
656 11:51:20.419243 PCI 6.2, PIN C, using IRQ #18
657 11:51:20.419302 PCI 7.0, PIN A, using IRQ #19
658 11:51:20.419364 PCI 7.1, PIN B, using IRQ #20
659 11:51:20.419425 PCI 7.2, PIN C, using IRQ #21
660 11:51:20.419485 PCI 7.3, PIN D, using IRQ #22
661 11:51:20.419550 PCI 8.0, PIN A, using IRQ #23
662 11:51:20.419612 PCI D.0, PIN A, using IRQ #17
663 11:51:20.419672 PCI D.1, PIN B, using IRQ #19
664 11:51:20.419732 PCI 10.0, PIN A, using IRQ #24
665 11:51:20.419791 PCI 10.1, PIN B, using IRQ #25
666 11:51:20.419851 PCI 10.6, PIN C, using IRQ #20
667 11:51:20.419910 PCI 10.7, PIN D, using IRQ #21
668 11:51:20.420175 PCI 11.0, PIN A, using IRQ #26
669 11:51:20.420314 PCI 11.1, PIN B, using IRQ #27
670 11:51:20.420450 PCI 11.2, PIN C, using IRQ #28
671 11:51:20.420584 PCI 11.3, PIN D, using IRQ #29
672 11:51:20.420728 PCI 12.0, PIN A, using IRQ #30
673 11:51:20.420865 PCI 12.6, PIN B, using IRQ #31
674 11:51:20.421000 PCI 12.7, PIN C, using IRQ #22
675 11:51:20.421087 PCI 13.0, PIN A, using IRQ #32
676 11:51:20.421150 PCI 13.1, PIN B, using IRQ #33
677 11:51:20.421216 PCI 13.2, PIN C, using IRQ #34
678 11:51:20.421277 PCI 13.3, PIN D, using IRQ #35
679 11:51:20.421338 PCI 14.0, PIN B, using IRQ #23
680 11:51:20.421399 PCI 14.1, PIN A, using IRQ #36
681 11:51:20.421460 PCI 14.3, PIN C, using IRQ #17
682 11:51:20.421521 PCI 15.0, PIN A, using IRQ #37
683 11:51:20.421582 PCI 15.1, PIN B, using IRQ #38
684 11:51:20.421642 PCI 15.2, PIN C, using IRQ #39
685 11:51:20.421706 PCI 15.3, PIN D, using IRQ #40
686 11:51:20.421769 PCI 16.0, PIN A, using IRQ #18
687 11:51:20.421839 PCI 16.1, PIN B, using IRQ #19
688 11:51:20.421894 PCI 16.2, PIN C, using IRQ #20
689 11:51:20.421948 PCI 16.3, PIN D, using IRQ #21
690 11:51:20.422004 PCI 16.4, PIN A, using IRQ #18
691 11:51:20.422059 PCI 16.5, PIN B, using IRQ #19
692 11:51:20.422113 PCI 17.0, PIN A, using IRQ #22
693 11:51:20.422166 PCI 19.0, PIN A, using IRQ #41
694 11:51:20.422223 PCI 19.1, PIN B, using IRQ #42
695 11:51:20.422279 PCI 19.2, PIN C, using IRQ #43
696 11:51:20.422333 PCI 1C.0, PIN A, using IRQ #16
697 11:51:20.422386 PCI 1C.1, PIN B, using IRQ #17
698 11:51:20.422440 PCI 1C.2, PIN C, using IRQ #18
699 11:51:20.422494 PCI 1C.3, PIN D, using IRQ #19
700 11:51:20.422549 PCI 1C.4, PIN A, using IRQ #16
701 11:51:20.422604 PCI 1C.5, PIN B, using IRQ #17
702 11:51:20.422659 PCI 1C.6, PIN C, using IRQ #18
703 11:51:20.422713 PCI 1C.7, PIN D, using IRQ #19
704 11:51:20.422770 PCI 1D.0, PIN A, using IRQ #16
705 11:51:20.422827 PCI 1D.1, PIN B, using IRQ #17
706 11:51:20.422881 PCI 1D.2, PIN C, using IRQ #18
707 11:51:20.422935 PCI 1D.3, PIN D, using IRQ #19
708 11:51:20.422990 PCI 1E.0, PIN A, using IRQ #23
709 11:51:20.423045 PCI 1E.1, PIN B, using IRQ #20
710 11:51:20.423100 PCI 1E.2, PIN C, using IRQ #44
711 11:51:20.423155 PCI 1E.3, PIN D, using IRQ #45
712 11:51:20.423209 PCI 1F.3, PIN B, using IRQ #22
713 11:51:20.423263 PCI 1F.4, PIN C, using IRQ #23
714 11:51:20.423320 PCI 1F.6, PIN D, using IRQ #20
715 11:51:20.423376 PCI 1F.7, PIN A, using IRQ #21
716 11:51:20.423430 IRQ: Using dynamically assigned PCI IO-APIC IRQs
717 11:51:20.423486 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
718 11:51:20.423542 FSPS returned 0
719 11:51:20.423597 Executing Phase 1 of FspMultiPhaseSiInit
720 11:51:20.423651 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
721 11:51:20.423708 port C0 DISC req: usage 1 usb3 1 usb2 1
722 11:51:20.423763 Raw Buffer output 0 00000111
723 11:51:20.423818 Raw Buffer output 1 00000000
724 11:51:20.423874 pmc_send_ipc_cmd succeeded
725 11:51:20.423930 port C1 DISC req: usage 1 usb3 3 usb2 3
726 11:51:20.423985 Raw Buffer output 0 00000331
727 11:51:20.424039 Raw Buffer output 1 00000000
728 11:51:20.424093 pmc_send_ipc_cmd succeeded
729 11:51:20.424148 Detected 6 core, 8 thread CPU.
730 11:51:20.424202 Detected 6 core, 8 thread CPU.
731 11:51:20.424255 Detected 6 core, 8 thread CPU.
732 11:51:20.424310 Detected 6 core, 8 thread CPU.
733 11:51:20.424364 Detected 6 core, 8 thread CPU.
734 11:51:20.424421 Detected 6 core, 8 thread CPU.
735 11:51:20.424475 Detected 6 core, 8 thread CPU.
736 11:51:20.424529 Detected 6 core, 8 thread CPU.
737 11:51:20.424584 Detected 6 core, 8 thread CPU.
738 11:51:20.424638 Detected 6 core, 8 thread CPU.
739 11:51:20.424692 Detected 6 core, 8 thread CPU.
740 11:51:20.424746 Detected 6 core, 8 thread CPU.
741 11:51:20.424799 Detected 6 core, 8 thread CPU.
742 11:51:20.424853 Detected 6 core, 8 thread CPU.
743 11:51:20.424910 Detected 6 core, 8 thread CPU.
744 11:51:20.424965 Detected 6 core, 8 thread CPU.
745 11:51:20.425028 Detected 6 core, 8 thread CPU.
746 11:51:20.425085 Detected 6 core, 8 thread CPU.
747 11:51:20.425140 Detected 6 core, 8 thread CPU.
748 11:51:20.425194 Detected 6 core, 8 thread CPU.
749 11:51:20.425249 Detected 6 core, 8 thread CPU.
750 11:51:20.425303 Detected 6 core, 8 thread CPU.
751 11:51:20.425357 Detected 6 core, 8 thread CPU.
752 11:51:20.425411 Detected 6 core, 8 thread CPU.
753 11:51:20.425468 Detected 6 core, 8 thread CPU.
754 11:51:20.425522 Detected 6 core, 8 thread CPU.
755 11:51:20.425577 Detected 6 core, 8 thread CPU.
756 11:51:20.425631 Detected 6 core, 8 thread CPU.
757 11:51:20.425687 Detected 6 core, 8 thread CPU.
758 11:51:20.425741 Detected 6 core, 8 thread CPU.
759 11:51:20.425796 Detected 6 core, 8 thread CPU.
760 11:51:20.425850 Detected 6 core, 8 thread CPU.
761 11:51:20.425904 Detected 6 core, 8 thread CPU.
762 11:51:20.425959 Detected 6 core, 8 thread CPU.
763 11:51:20.426016 Detected 6 core, 8 thread CPU.
764 11:51:20.426072 Detected 6 core, 8 thread CPU.
765 11:51:20.426127 Detected 6 core, 8 thread CPU.
766 11:51:20.426181 Detected 6 core, 8 thread CPU.
767 11:51:20.426236 Detected 6 core, 8 thread CPU.
768 11:51:20.426290 Detected 6 core, 8 thread CPU.
769 11:51:20.426344 Detected 6 core, 8 thread CPU.
770 11:51:20.426398 Detected 6 core, 8 thread CPU.
771 11:51:20.426453 Display FSP Version Info HOB
772 11:51:20.426507 Reference Code - CPU = c.0.65.70
773 11:51:20.426564 uCode Version = 0.0.4.23
774 11:51:20.426619 TXT ACM version = ff.ff.ff.ffff
775 11:51:20.426674 Reference Code - ME = c.0.65.70
776 11:51:20.426729 MEBx version = 0.0.0.0
777 11:51:20.426796 ME Firmware Version = Consumer SKU
778 11:51:20.426845 Reference Code - PCH = c.0.65.70
779 11:51:20.426895 PCH-CRID Status = Disabled
780 11:51:20.426945 PCH-CRID Original Value = ff.ff.ff.ffff
781 11:51:20.426995 PCH-CRID New Value = ff.ff.ff.ffff
782 11:51:20.427044 OPROM - RST - RAID = ff.ff.ff.ffff
783 11:51:20.427096 PCH Hsio Version = 4.0.0.0
784 11:51:20.427146 Reference Code - SA - System Agent = c.0.65.70
785 11:51:20.427198 Reference Code - MRC = 0.0.3.80
786 11:51:20.427247 SA - PCIe Version = c.0.65.70
787 11:51:20.427296 SA-CRID Status = Disabled
788 11:51:20.427345 SA-CRID Original Value = 0.0.0.4
789 11:51:20.427394 SA-CRID New Value = 0.0.0.4
790 11:51:20.427444 OPROM - VBIOS = ff.ff.ff.ffff
791 11:51:20.427693 IO Manageability Engine FW Version = 24.0.4.0
792 11:51:20.427809 PHY Build Version = 0.0.0.2016
793 11:51:20.427920 Thunderbolt(TM) FW Version = 0.0.0.0
794 11:51:20.428033 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
795 11:51:20.428150 BS: BS_DEV_INIT_CHIPS run times (exec / console): 463 / 507 ms
796 11:51:20.428269 Enumerating buses...
797 11:51:20.428379 Show all devs... Before device enumeration.
798 11:51:20.428441 Root Device: enabled 1
799 11:51:20.428493 CPU_CLUSTER: 0: enabled 1
800 11:51:20.428552 DOMAIN: 0000: enabled 1
801 11:51:20.428608 GPIO: 0: enabled 1
802 11:51:20.428662 PCI: 00:00.0: enabled 1
803 11:51:20.428713 PCI: 00:01.0: enabled 0
804 11:51:20.428763 PCI: 00:01.1: enabled 0
805 11:51:20.428812 PCI: 00:02.0: enabled 1
806 11:51:20.428862 PCI: 00:04.0: enabled 1
807 11:51:20.428912 PCI: 00:05.0: enabled 0
808 11:51:20.428961 PCI: 00:06.0: enabled 1
809 11:51:20.429020 PCI: 00:06.2: enabled 0
810 11:51:20.429074 PCI: 00:07.0: enabled 0
811 11:51:20.429123 PCI: 00:07.1: enabled 0
812 11:51:20.429176 PCI: 00:07.2: enabled 0
813 11:51:20.429227 PCI: 00:07.3: enabled 0
814 11:51:20.429277 PCI: 00:08.0: enabled 0
815 11:51:20.429327 PCI: 00:09.0: enabled 0
816 11:51:20.429375 PCI: 00:0a.0: enabled 1
817 11:51:20.429424 PCI: 00:0d.0: enabled 1
818 11:51:20.429474 PCI: 00:0d.1: enabled 0
819 11:51:20.429523 PCI: 00:0d.2: enabled 0
820 11:51:20.429572 PCI: 00:0d.3: enabled 0
821 11:51:20.429620 PCI: 00:0e.0: enabled 0
822 11:51:20.429673 PCI: 00:10.0: enabled 0
823 11:51:20.429722 PCI: 00:10.1: enabled 0
824 11:51:20.429771 PCI: 00:10.6: enabled 0
825 11:51:20.429820 PCI: 00:10.7: enabled 0
826 11:51:20.429869 PCI: 00:12.0: enabled 0
827 11:51:20.429918 PCI: 00:12.6: enabled 0
828 11:51:20.429968 PCI: 00:12.7: enabled 0
829 11:51:20.430016 PCI: 00:13.0: enabled 0
830 11:51:20.430065 PCI: 00:14.0: enabled 1
831 11:51:20.430115 PCI: 00:14.1: enabled 0
832 11:51:20.430163 PCI: 00:14.2: enabled 1
833 11:51:20.430215 PCI: 00:14.3: enabled 1
834 11:51:20.430265 PCI: 00:15.0: enabled 1
835 11:51:20.430314 PCI: 00:15.1: enabled 1
836 11:51:20.430363 PCI: 00:15.2: enabled 0
837 11:51:20.430412 PCI: 00:15.3: enabled 1
838 11:51:20.430461 PCI: 00:16.0: enabled 1
839 11:51:20.430509 PCI: 00:16.1: enabled 0
840 11:51:20.430558 PCI: 00:16.2: enabled 0
841 11:51:20.430608 PCI: 00:16.3: enabled 0
842 11:51:20.430656 PCI: 00:16.4: enabled 0
843 11:51:20.430704 PCI: 00:16.5: enabled 0
844 11:51:20.430756 PCI: 00:17.0: enabled 1
845 11:51:20.430806 PCI: 00:19.0: enabled 0
846 11:51:20.430855 PCI: 00:19.1: enabled 1
847 11:51:20.430904 PCI: 00:19.2: enabled 0
848 11:51:20.430953 PCI: 00:1a.0: enabled 0
849 11:51:20.431002 PCI: 00:1c.0: enabled 0
850 11:51:20.431051 PCI: 00:1c.1: enabled 0
851 11:51:20.431101 PCI: 00:1c.2: enabled 0
852 11:51:20.431150 PCI: 00:1c.3: enabled 0
853 11:51:20.431198 PCI: 00:1c.4: enabled 0
854 11:51:20.431248 PCI: 00:1c.5: enabled 0
855 11:51:20.431300 PCI: 00:1c.6: enabled 0
856 11:51:20.431351 PCI: 00:1c.7: enabled 0
857 11:51:20.431400 PCI: 00:1d.0: enabled 0
858 11:51:20.431449 PCI: 00:1d.1: enabled 0
859 11:51:20.431498 PCI: 00:1d.2: enabled 0
860 11:51:20.431547 PCI: 00:1d.3: enabled 0
861 11:51:20.431596 PCI: 00:1e.0: enabled 1
862 11:51:20.431646 PCI: 00:1e.1: enabled 0
863 11:51:20.431695 PCI: 00:1e.2: enabled 0
864 11:51:20.431743 PCI: 00:1e.3: enabled 1
865 11:51:20.431792 PCI: 00:1f.0: enabled 1
866 11:51:20.431857 PCI: 00:1f.1: enabled 0
867 11:51:20.431905 PCI: 00:1f.2: enabled 1
868 11:51:20.431953 PCI: 00:1f.3: enabled 1
869 11:51:20.432001 PCI: 00:1f.4: enabled 0
870 11:51:20.432049 PCI: 00:1f.5: enabled 1
871 11:51:20.432097 PCI: 00:1f.6: enabled 0
872 11:51:20.432145 PCI: 00:1f.7: enabled 0
873 11:51:20.432193 GENERIC: 0.0: enabled 1
874 11:51:20.432241 GENERIC: 0.0: enabled 1
875 11:51:20.432289 GENERIC: 1.0: enabled 1
876 11:51:20.432337 GENERIC: 0.0: enabled 1
877 11:51:20.432388 GENERIC: 1.0: enabled 1
878 11:51:20.432453 USB0 port 0: enabled 1
879 11:51:20.432505 USB0 port 0: enabled 1
880 11:51:20.432555 GENERIC: 0.0: enabled 1
881 11:51:20.432604 I2C: 00:1a: enabled 1
882 11:51:20.432652 I2C: 00:31: enabled 1
883 11:51:20.432700 I2C: 00:32: enabled 1
884 11:51:20.432748 I2C: 00:50: enabled 1
885 11:51:20.432797 I2C: 00:10: enabled 1
886 11:51:20.432845 I2C: 00:15: enabled 1
887 11:51:20.432897 I2C: 00:2c: enabled 1
888 11:51:20.432946 GENERIC: 0.0: enabled 1
889 11:51:20.432994 SPI: 00: enabled 1
890 11:51:20.433104 PNP: 0c09.0: enabled 1
891 11:51:20.433182 GENERIC: 0.0: enabled 1
892 11:51:20.433259 USB3 port 0: enabled 1
893 11:51:20.433340 USB3 port 1: enabled 0
894 11:51:20.433394 USB3 port 2: enabled 1
895 11:51:20.433447 USB3 port 3: enabled 0
896 11:51:20.433498 USB2 port 0: enabled 1
897 11:51:20.433547 USB2 port 1: enabled 0
898 11:51:20.433596 USB2 port 2: enabled 1
899 11:51:20.433644 USB2 port 3: enabled 0
900 11:51:20.433692 USB2 port 4: enabled 0
901 11:51:20.433740 USB2 port 5: enabled 1
902 11:51:20.433787 USB2 port 6: enabled 0
903 11:51:20.433835 USB2 port 7: enabled 0
904 11:51:20.433884 USB2 port 8: enabled 1
905 11:51:20.433932 USB2 port 9: enabled 1
906 11:51:20.433984 USB3 port 0: enabled 1
907 11:51:20.434032 USB3 port 1: enabled 0
908 11:51:20.434080 USB3 port 2: enabled 0
909 11:51:20.434128 USB3 port 3: enabled 0
910 11:51:20.434175 GENERIC: 0.0: enabled 1
911 11:51:20.434224 GENERIC: 1.0: enabled 1
912 11:51:20.434271 APIC: 00: enabled 1
913 11:51:20.434318 APIC: 12: enabled 1
914 11:51:20.434366 APIC: 14: enabled 1
915 11:51:20.434414 APIC: 10: enabled 1
916 11:51:20.434462 APIC: 16: enabled 1
917 11:51:20.434512 APIC: 09: enabled 1
918 11:51:20.434560 APIC: 01: enabled 1
919 11:51:20.434610 APIC: 08: enabled 1
920 11:51:20.434658 Compare with tree...
921 11:51:20.434706 Root Device: enabled 1
922 11:51:20.434754 CPU_CLUSTER: 0: enabled 1
923 11:51:20.434802 APIC: 00: enabled 1
924 11:51:20.434850 APIC: 12: enabled 1
925 11:51:20.434898 APIC: 14: enabled 1
926 11:51:20.434946 APIC: 10: enabled 1
927 11:51:20.434994 APIC: 16: enabled 1
928 11:51:20.435042 APIC: 09: enabled 1
929 11:51:20.435094 APIC: 01: enabled 1
930 11:51:20.435142 APIC: 08: enabled 1
931 11:51:20.435191 DOMAIN: 0000: enabled 1
932 11:51:20.435238 GPIO: 0: enabled 1
933 11:51:20.435286 PCI: 00:00.0: enabled 1
934 11:51:20.435334 PCI: 00:01.0: enabled 0
935 11:51:20.435382 PCI: 00:01.1: enabled 0
936 11:51:20.435430 PCI: 00:02.0: enabled 1
937 11:51:20.435478 PCI: 00:04.0: enabled 1
938 11:51:20.435526 GENERIC: 0.0: enabled 1
939 11:51:20.435574 PCI: 00:05.0: enabled 0
940 11:51:20.435626 PCI: 00:06.0: enabled 1
941 11:51:20.435676 PCI: 00:06.2: enabled 0
942 11:51:20.435724 PCI: 00:08.0: enabled 0
943 11:51:20.435772 PCI: 00:09.0: enabled 0
944 11:51:20.435820 PCI: 00:0a.0: enabled 1
945 11:51:20.435869 PCI: 00:0d.0: enabled 1
946 11:51:20.435917 USB0 port 0: enabled 1
947 11:51:20.435965 USB3 port 0: enabled 1
948 11:51:20.436013 USB3 port 1: enabled 0
949 11:51:20.436062 USB3 port 2: enabled 1
950 11:51:20.436110 USB3 port 3: enabled 0
951 11:51:20.436161 PCI: 00:0d.1: enabled 0
952 11:51:20.436413 PCI: 00:0d.2: enabled 0
953 11:51:20.436471 PCI: 00:0d.3: enabled 0
954 11:51:20.436521 PCI: 00:0e.0: enabled 0
955 11:51:20.436570 PCI: 00:10.0: enabled 0
956 11:51:20.436618 PCI: 00:10.1: enabled 0
957 11:51:20.436666 PCI: 00:10.6: enabled 0
958 11:51:20.436718 PCI: 00:10.7: enabled 0
959 11:51:20.436768 PCI: 00:12.0: enabled 0
960 11:51:20.436816 PCI: 00:12.6: enabled 0
961 11:51:20.436864 PCI: 00:12.7: enabled 0
962 11:51:20.436912 PCI: 00:13.0: enabled 0
963 11:51:20.436961 PCI: 00:14.0: enabled 1
964 11:51:20.437010 USB0 port 0: enabled 1
965 11:51:20.437074 USB2 port 0: enabled 1
966 11:51:20.437123 USB2 port 1: enabled 0
967 11:51:20.437172 USB2 port 2: enabled 1
968 11:51:20.437220 USB2 port 3: enabled 0
969 11:51:20.437274 USB2 port 4: enabled 0
970 11:51:20.437323 USB2 port 5: enabled 1
971 11:51:20.437371 USB2 port 6: enabled 0
972 11:51:20.437419 USB2 port 7: enabled 0
973 11:51:20.437467 USB2 port 8: enabled 1
974 11:51:20.437516 USB2 port 9: enabled 1
975 11:51:20.437564 USB3 port 0: enabled 1
976 11:51:20.437612 USB3 port 1: enabled 0
977 11:51:20.437661 USB3 port 2: enabled 0
978 11:51:20.437710 USB3 port 3: enabled 0
979 11:51:20.437758 PCI: 00:14.1: enabled 0
980 11:51:20.437809 PCI: 00:14.2: enabled 1
981 11:51:20.437859 PCI: 00:14.3: enabled 1
982 11:51:20.437907 GENERIC: 0.0: enabled 1
983 11:51:20.437955 PCI: 00:15.0: enabled 1
984 11:51:20.438003 I2C: 00:1a: enabled 1
985 11:51:20.438052 I2C: 00:31: enabled 1
986 11:51:20.438100 I2C: 00:32: enabled 1
987 11:51:20.438148 PCI: 00:15.1: enabled 1
988 11:51:20.438196 I2C: 00:50: enabled 1
989 11:51:20.438244 PCI: 00:15.2: enabled 0
990 11:51:20.438292 PCI: 00:15.3: enabled 1
991 11:51:20.438342 I2C: 00:10: enabled 1
992 11:51:20.438390 PCI: 00:16.0: enabled 1
993 11:51:20.438438 PCI: 00:16.1: enabled 0
994 11:51:20.438486 PCI: 00:16.2: enabled 0
995 11:51:20.438534 PCI: 00:16.3: enabled 0
996 11:51:20.438582 PCI: 00:16.4: enabled 0
997 11:51:20.438630 PCI: 00:16.5: enabled 0
998 11:51:20.438678 PCI: 00:17.0: enabled 1
999 11:51:20.438726 PCI: 00:19.0: enabled 0
1000 11:51:20.438774 PCI: 00:19.1: enabled 1
1001 11:51:20.438822 I2C: 00:15: enabled 1
1002 11:51:20.438873 I2C: 00:2c: enabled 1
1003 11:51:20.438923 PCI: 00:19.2: enabled 0
1004 11:51:20.438971 PCI: 00:1a.0: enabled 0
1005 11:51:20.439020 PCI: 00:1e.0: enabled 1
1006 11:51:20.439068 PCI: 00:1e.1: enabled 0
1007 11:51:20.439115 PCI: 00:1e.2: enabled 0
1008 11:51:20.439163 PCI: 00:1e.3: enabled 1
1009 11:51:20.439211 SPI: 00: enabled 1
1010 11:51:20.439260 PCI: 00:1f.0: enabled 1
1011 11:51:20.439308 PNP: 0c09.0: enabled 1
1012 11:51:20.439355 PCI: 00:1f.1: enabled 0
1013 11:51:20.439406 PCI: 00:1f.2: enabled 1
1014 11:51:20.439456 GENERIC: 0.0: enabled 1
1015 11:51:20.439505 GENERIC: 0.0: enabled 1
1016 11:51:20.439553 GENERIC: 1.0: enabled 1
1017 11:51:20.439601 PCI: 00:1f.3: enabled 1
1018 11:51:20.439649 PCI: 00:1f.4: enabled 0
1019 11:51:20.439697 PCI: 00:1f.5: enabled 1
1020 11:51:20.439745 PCI: 00:1f.6: enabled 0
1021 11:51:20.439792 PCI: 00:1f.7: enabled 0
1022 11:51:20.439845 Root Device scanning...
1023 11:51:20.439895 scan_static_bus for Root Device
1024 11:51:20.439947 CPU_CLUSTER: 0 enabled
1025 11:51:20.439997 DOMAIN: 0000 enabled
1026 11:51:20.440046 DOMAIN: 0000 scanning...
1027 11:51:20.440094 PCI: pci_scan_bus for bus 00
1028 11:51:20.440143 PCI: 00:00.0 [8086/0000] ops
1029 11:51:20.440191 PCI: 00:00.0 [8086/4609] enabled
1030 11:51:20.440240 PCI: 00:02.0 [8086/0000] bus ops
1031 11:51:20.440289 PCI: 00:02.0 [8086/46b3] enabled
1032 11:51:20.440338 PCI: 00:04.0 [8086/0000] bus ops
1033 11:51:20.440387 PCI: 00:04.0 [8086/461d] enabled
1034 11:51:20.440435 PCI: 00:06.0 [8086/0000] bus ops
1035 11:51:20.440487 PCI: 00:06.0 [8086/464d] enabled
1036 11:51:20.440535 PCI: 00:08.0 [8086/464f] disabled
1037 11:51:20.440584 PCI: 00:0a.0 [8086/467d] enabled
1038 11:51:20.440636 PCI: 00:0d.0 [8086/0000] bus ops
1039 11:51:20.440724 PCI: 00:0d.0 [8086/461e] enabled
1040 11:51:20.440794 PCI: 00:14.0 [8086/0000] bus ops
1041 11:51:20.440843 PCI: 00:14.0 [8086/51ed] enabled
1042 11:51:20.440892 PCI: 00:14.2 [8086/51ef] enabled
1043 11:51:20.440940 PCI: 00:14.3 [8086/0000] bus ops
1044 11:51:20.440989 PCI: 00:14.3 [8086/51f0] enabled
1045 11:51:20.441086 PCI: 00:15.0 [8086/0000] bus ops
1046 11:51:20.441137 PCI: 00:15.0 [8086/51e8] enabled
1047 11:51:20.441187 PCI: 00:15.1 [8086/0000] bus ops
1048 11:51:20.441235 PCI: 00:15.1 [8086/51e9] enabled
1049 11:51:20.441283 PCI: 00:15.2 [8086/0000] bus ops
1050 11:51:20.441331 PCI: 00:15.2 [8086/51ea] disabled
1051 11:51:20.441381 PCI: 00:15.3 [8086/0000] bus ops
1052 11:51:20.441430 PCI: 00:15.3 [8086/51eb] enabled
1053 11:51:20.441478 PCI: 00:16.0 [8086/0000] ops
1054 11:51:20.441526 PCI: 00:16.0 [8086/51e0] enabled
1055 11:51:20.441578 PCI: Static device PCI: 00:17.0 not found, disabling it.
1056 11:51:20.441627 PCI: 00:19.0 [8086/0000] bus ops
1057 11:51:20.441675 PCI: 00:19.0 [8086/51c5] disabled
1058 11:51:20.441726 PCI: 00:19.1 [8086/0000] bus ops
1059 11:51:20.441774 PCI: 00:19.1 [8086/51c6] enabled
1060 11:51:20.441823 PCI: 00:1e.0 [8086/0000] ops
1061 11:51:20.441872 PCI: 00:1e.0 [8086/51a8] enabled
1062 11:51:20.441920 PCI: 00:1e.3 [8086/0000] bus ops
1063 11:51:20.441969 PCI: 00:1e.3 [8086/51ab] enabled
1064 11:51:20.442017 PCI: 00:1f.0 [8086/0000] bus ops
1065 11:51:20.442066 PCI: 00:1f.0 [8086/5182] enabled
1066 11:51:20.442118 RTC Init
1067 11:51:20.442168 Set power on after power failure.
1068 11:51:20.442217 Disabling Deep S3
1069 11:51:20.442265 Disabling Deep S3
1070 11:51:20.442313 Disabling Deep S4
1071 11:51:20.442361 Disabling Deep S4
1072 11:51:20.442409 Disabling Deep S5
1073 11:51:20.442457 Disabling Deep S5
1074 11:51:20.442504 PCI: 00:1f.2 [0000/0000] hidden
1075 11:51:20.442555 PCI: 00:1f.3 [8086/0000] bus ops
1076 11:51:20.442603 PCI: 00:1f.3 [8086/51c8] enabled
1077 11:51:20.442654 PCI: 00:1f.5 [8086/0000] bus ops
1078 11:51:20.442701 PCI: 00:1f.5 [8086/51a4] enabled
1079 11:51:20.442750 GPIO: 0 enabled
1080 11:51:20.442798 PCI: Leftover static devices:
1081 11:51:20.442847 PCI: 00:01.0
1082 11:51:20.442895 PCI: 00:01.1
1083 11:51:20.442943 PCI: 00:05.0
1084 11:51:20.442991 PCI: 00:06.2
1085 11:51:20.443039 PCI: 00:09.0
1086 11:51:20.443088 PCI: 00:0d.1
1087 11:51:20.443136 PCI: 00:0d.2
1088 11:51:20.443187 PCI: 00:0d.3
1089 11:51:20.443235 PCI: 00:0e.0
1090 11:51:20.443285 PCI: 00:10.0
1091 11:51:20.443333 PCI: 00:10.1
1092 11:51:20.443381 PCI: 00:10.6
1093 11:51:20.443431 PCI: 00:10.7
1094 11:51:20.443479 PCI: 00:12.0
1095 11:51:20.443527 PCI: 00:12.6
1096 11:51:20.443575 PCI: 00:12.7
1097 11:51:20.443624 PCI: 00:13.0
1098 11:51:20.443673 PCI: 00:14.1
1099 11:51:20.443721 PCI: 00:16.1
1100 11:51:20.443772 PCI: 00:16.2
1101 11:51:20.443820 PCI: 00:16.3
1102 11:51:20.443869 PCI: 00:16.4
1103 11:51:20.443917 PCI: 00:16.5
1104 11:51:20.443965 PCI: 00:17.0
1105 11:51:20.444014 PCI: 00:19.2
1106 11:51:20.444255 PCI: 00:1a.0
1107 11:51:20.444373 PCI: 00:1e.1
1108 11:51:20.444483 PCI: 00:1e.2
1109 11:51:20.444591 PCI: 00:1f.1
1110 11:51:20.444699 PCI: 00:1f.4
1111 11:51:20.444807 PCI: 00:1f.6
1112 11:51:20.444918 PCI: 00:1f.7
1113 11:51:20.445054 PCI: Check your devicetree.cb.
1114 11:51:20.445180 PCI: 00:02.0 scanning...
1115 11:51:20.445289 scan_generic_bus for PCI: 00:02.0
1116 11:51:20.445403 scan_generic_bus for PCI: 00:02.0 done
1117 11:51:20.445517 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1118 11:51:20.445625 PCI: 00:04.0 scanning...
1119 11:51:20.445707 scan_generic_bus for PCI: 00:04.0
1120 11:51:20.445759 GENERIC: 0.0 enabled
1121 11:51:20.445809 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1122 11:51:20.445859 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1123 11:51:20.445912 PCI: 00:06.0 scanning...
1124 11:51:20.445961 do_pci_scan_bridge for PCI: 00:06.0
1125 11:51:20.446009 PCI: pci_scan_bus for bus 01
1126 11:51:20.446058 PCI: 01:00.0 [15b7/5009] enabled
1127 11:51:20.446106 Enabling Common Clock Configuration
1128 11:51:20.446155 L1 Sub-State supported from root port 6
1129 11:51:20.446203 L1 Sub-State Support = 0x5
1130 11:51:20.446251 CommonModeRestoreTime = 0x6e
1131 11:51:20.446299 Power On Value = 0x5, Power On Scale = 0x2
1132 11:51:20.446348 ASPM: Enabled L1
1133 11:51:20.446396 PCIe: Max_Payload_Size adjusted to 256
1134 11:51:20.446447 PCI: 01:00.0: Enabled LTR
1135 11:51:20.446516 PCI: 01:00.0: Programmed LTR max latencies
1136 11:51:20.446568 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1137 11:51:20.446617 PCI: 00:0d.0 scanning...
1138 11:51:20.446666 scan_static_bus for PCI: 00:0d.0
1139 11:51:20.446715 USB0 port 0 enabled
1140 11:51:20.446764 USB0 port 0 scanning...
1141 11:51:20.446813 scan_static_bus for USB0 port 0
1142 11:51:20.446861 USB3 port 0 enabled
1143 11:51:20.446909 USB3 port 1 disabled
1144 11:51:20.446958 USB3 port 2 enabled
1145 11:51:20.447009 USB3 port 3 disabled
1146 11:51:20.447058 USB3 port 0 scanning...
1147 11:51:20.447106 scan_static_bus for USB3 port 0
1148 11:51:20.447154 scan_static_bus for USB3 port 0 done
1149 11:51:20.447203 scan_bus: bus USB3 port 0 finished in 6 msecs
1150 11:51:20.447252 USB3 port 2 scanning...
1151 11:51:20.447305 scan_static_bus for USB3 port 2
1152 11:51:20.447365 scan_static_bus for USB3 port 2 done
1153 11:51:20.447414 scan_bus: bus USB3 port 2 finished in 6 msecs
1154 11:51:20.447463 scan_static_bus for USB0 port 0 done
1155 11:51:20.447515 scan_bus: bus USB0 port 0 finished in 43 msecs
1156 11:51:20.447566 scan_static_bus for PCI: 00:0d.0 done
1157 11:51:20.447615 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1158 11:51:20.447664 PCI: 00:14.0 scanning...
1159 11:51:20.447713 scan_static_bus for PCI: 00:14.0
1160 11:51:20.447762 USB0 port 0 enabled
1161 11:51:20.447809 USB0 port 0 scanning...
1162 11:51:20.447857 scan_static_bus for USB0 port 0
1163 11:51:20.447906 USB2 port 0 enabled
1164 11:51:20.447955 USB2 port 1 disabled
1165 11:51:20.448003 USB2 port 2 enabled
1166 11:51:20.448054 USB2 port 3 disabled
1167 11:51:20.448103 USB2 port 4 disabled
1168 11:51:20.448151 USB2 port 5 enabled
1169 11:51:20.448200 USB2 port 6 disabled
1170 11:51:20.448249 USB2 port 7 disabled
1171 11:51:20.448297 USB2 port 8 enabled
1172 11:51:20.448345 USB2 port 9 enabled
1173 11:51:20.448393 USB3 port 0 enabled
1174 11:51:20.448441 USB3 port 1 disabled
1175 11:51:20.448489 USB3 port 2 disabled
1176 11:51:20.448537 USB3 port 3 disabled
1177 11:51:20.448588 USB2 port 0 scanning...
1178 11:51:20.448638 scan_static_bus for USB2 port 0
1179 11:51:20.448687 scan_static_bus for USB2 port 0 done
1180 11:51:20.448735 scan_bus: bus USB2 port 0 finished in 6 msecs
1181 11:51:20.448784 USB2 port 2 scanning...
1182 11:51:20.448832 scan_static_bus for USB2 port 2
1183 11:51:20.448880 scan_static_bus for USB2 port 2 done
1184 11:51:20.448929 scan_bus: bus USB2 port 2 finished in 6 msecs
1185 11:51:20.448977 USB2 port 5 scanning...
1186 11:51:20.449035 scan_static_bus for USB2 port 5
1187 11:51:20.449085 scan_static_bus for USB2 port 5 done
1188 11:51:20.449138 scan_bus: bus USB2 port 5 finished in 6 msecs
1189 11:51:20.449186 USB2 port 8 scanning...
1190 11:51:20.449234 scan_static_bus for USB2 port 8
1191 11:51:20.449283 scan_static_bus for USB2 port 8 done
1192 11:51:20.449331 scan_bus: bus USB2 port 8 finished in 6 msecs
1193 11:51:20.449379 USB2 port 9 scanning...
1194 11:51:20.449428 scan_static_bus for USB2 port 9
1195 11:51:20.449476 scan_static_bus for USB2 port 9 done
1196 11:51:20.449525 scan_bus: bus USB2 port 9 finished in 6 msecs
1197 11:51:20.449574 USB3 port 0 scanning...
1198 11:51:20.449623 scan_static_bus for USB3 port 0
1199 11:51:20.449674 scan_static_bus for USB3 port 0 done
1200 11:51:20.449733 scan_bus: bus USB3 port 0 finished in 6 msecs
1201 11:51:20.449782 scan_static_bus for USB0 port 0 done
1202 11:51:20.449831 scan_bus: bus USB0 port 0 finished in 120 msecs
1203 11:51:20.449880 scan_static_bus for PCI: 00:14.0 done
1204 11:51:20.449929 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1205 11:51:20.449978 PCI: 00:14.3 scanning...
1206 11:51:20.450027 scan_static_bus for PCI: 00:14.3
1207 11:51:20.450075 GENERIC: 0.0 enabled
1208 11:51:20.450124 scan_static_bus for PCI: 00:14.3 done
1209 11:51:20.450172 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1210 11:51:20.450224 PCI: 00:15.0 scanning...
1211 11:51:20.450273 scan_static_bus for PCI: 00:15.0
1212 11:51:20.450322 I2C: 00:1a enabled
1213 11:51:20.450370 I2C: 00:31 enabled
1214 11:51:20.450418 I2C: 00:32 enabled
1215 11:51:20.450467 scan_static_bus for PCI: 00:15.0 done
1216 11:51:20.450516 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1217 11:51:20.450565 PCI: 00:15.1 scanning...
1218 11:51:20.450614 scan_static_bus for PCI: 00:15.1
1219 11:51:20.450662 I2C: 00:50 enabled
1220 11:51:20.450710 scan_static_bus for PCI: 00:15.1 done
1221 11:51:20.450762 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1222 11:51:20.450814 PCI: 00:15.3 scanning...
1223 11:51:20.450863 scan_static_bus for PCI: 00:15.3
1224 11:51:20.450911 I2C: 00:10 enabled
1225 11:51:20.450959 scan_static_bus for PCI: 00:15.3 done
1226 11:51:20.451008 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1227 11:51:20.451056 PCI: 00:19.1 scanning...
1228 11:51:20.451105 scan_static_bus for PCI: 00:19.1
1229 11:51:20.451171 I2C: 00:15 enabled
1230 11:51:20.451221 I2C: 00:2c enabled
1231 11:51:20.451273 scan_static_bus for PCI: 00:19.1 done
1232 11:51:20.451323 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1233 11:51:20.451372 PCI: 00:1e.3 scanning...
1234 11:51:20.451421 scan_generic_bus for PCI: 00:1e.3
1235 11:51:20.451469 SPI: 00 enabled
1236 11:51:20.451712 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1237 11:51:20.451768 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1238 11:51:20.451822 PCI: 00:1f.0 scanning...
1239 11:51:20.451873 scan_static_bus for PCI: 00:1f.0
1240 11:51:20.451922 PNP: 0c09.0 enabled
1241 11:51:20.451971 PNP: 0c09.0 scanning...
1242 11:51:20.452020 scan_static_bus for PNP: 0c09.0
1243 11:51:20.452069 scan_static_bus for PNP: 0c09.0 done
1244 11:51:20.452117 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1245 11:51:20.452166 scan_static_bus for PCI: 00:1f.0 done
1246 11:51:20.452214 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1247 11:51:20.452263 PCI: 00:1f.2 scanning...
1248 11:51:20.452312 scan_static_bus for PCI: 00:1f.2
1249 11:51:20.452363 GENERIC: 0.0 enabled
1250 11:51:20.452413 GENERIC: 0.0 scanning...
1251 11:51:20.452460 scan_static_bus for GENERIC: 0.0
1252 11:51:20.452509 GENERIC: 0.0 enabled
1253 11:51:20.452557 GENERIC: 1.0 enabled
1254 11:51:20.452605 scan_static_bus for GENERIC: 0.0 done
1255 11:51:20.452653 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1256 11:51:20.452701 scan_static_bus for PCI: 00:1f.2 done
1257 11:51:20.452750 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1258 11:51:20.452798 PCI: 00:1f.3 scanning...
1259 11:51:20.452847 scan_static_bus for PCI: 00:1f.3
1260 11:51:20.452897 scan_static_bus for PCI: 00:1f.3 done
1261 11:51:20.452947 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1262 11:51:20.452998 PCI: 00:1f.5 scanning...
1263 11:51:20.453056 scan_generic_bus for PCI: 00:1f.5
1264 11:51:20.453105 scan_generic_bus for PCI: 00:1f.5 done
1265 11:51:20.453154 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1266 11:51:20.453203 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1267 11:51:20.453251 scan_static_bus for Root Device done
1268 11:51:20.453299 scan_bus: bus Root Device finished in 729 msecs
1269 11:51:20.453347 done
1270 11:51:20.453395 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1271 11:51:20.453446 Chrome EC: UHEPI supported
1272 11:51:20.453495 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1273 11:51:20.453543 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1274 11:51:20.453591 SPI flash protection: WPSW=0 SRP0=0
1275 11:51:20.453640 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1276 11:51:20.453692 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1277 11:51:20.453757 found VGA at PCI: 00:02.0
1278 11:51:20.453842 Setting up VGA for PCI: 00:02.0
1279 11:51:20.453894 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1280 11:51:20.453943 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1281 11:51:20.453995 Allocating resources...
1282 11:51:20.454044 Reading resources...
1283 11:51:20.454094 Root Device read_resources bus 0 link: 0
1284 11:51:20.454143 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1285 11:51:20.454191 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1286 11:51:20.454239 DOMAIN: 0000 read_resources bus 0 link: 0
1287 11:51:20.454287 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1288 11:51:20.454336 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1289 11:51:20.454385 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1290 11:51:20.454433 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1291 11:51:20.454482 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1292 11:51:20.454535 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1293 11:51:20.454585 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1294 11:51:20.454634 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1295 11:51:20.454681 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1296 11:51:20.454730 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1297 11:51:20.454778 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1298 11:51:20.454827 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1299 11:51:20.454875 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1300 11:51:20.454924 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1301 11:51:20.454973 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1302 11:51:20.455022 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1303 11:51:20.455072 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1304 11:51:20.455121 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1305 11:51:20.455171 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1306 11:51:20.455220 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1307 11:51:20.455268 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1308 11:51:20.455316 PCI: 00:04.0 read_resources bus 1 link: 0
1309 11:51:20.455364 PCI: 00:04.0 read_resources bus 1 link: 0 done
1310 11:51:20.455413 PCI: 00:06.0 read_resources bus 1 link: 0
1311 11:51:20.455460 PCI: 00:06.0 read_resources bus 1 link: 0 done
1312 11:51:20.455508 PCI: 00:0d.0 read_resources bus 0 link: 0
1313 11:51:20.455556 USB0 port 0 read_resources bus 0 link: 0
1314 11:51:20.455605 USB0 port 0 read_resources bus 0 link: 0 done
1315 11:51:20.455657 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1316 11:51:20.455705 PCI: 00:14.0 read_resources bus 0 link: 0
1317 11:51:20.455753 USB0 port 0 read_resources bus 0 link: 0
1318 11:51:20.455801 USB0 port 0 read_resources bus 0 link: 0 done
1319 11:51:20.455849 PCI: 00:14.0 read_resources bus 0 link: 0 done
1320 11:51:20.455897 PCI: 00:14.3 read_resources bus 0 link: 0
1321 11:51:20.455944 PCI: 00:14.3 read_resources bus 0 link: 0 done
1322 11:51:20.455992 PCI: 00:15.0 read_resources bus 0 link: 0
1323 11:51:20.456040 PCI: 00:15.0 read_resources bus 0 link: 0 done
1324 11:51:20.456088 PCI: 00:15.1 read_resources bus 0 link: 0
1325 11:51:20.456330 PCI: 00:15.1 read_resources bus 0 link: 0 done
1326 11:51:20.456444 PCI: 00:15.3 read_resources bus 0 link: 0
1327 11:51:20.456552 PCI: 00:15.3 read_resources bus 0 link: 0 done
1328 11:51:20.456659 PCI: 00:19.1 read_resources bus 0 link: 0
1329 11:51:20.456771 PCI: 00:19.1 read_resources bus 0 link: 0 done
1330 11:51:20.456878 PCI: 00:1e.3 read_resources bus 2 link: 0
1331 11:51:20.456987 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1332 11:51:20.457102 PCI: 00:1f.0 read_resources bus 0 link: 0
1333 11:51:20.457211 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1334 11:51:20.457326 PCI: 00:1f.2 read_resources bus 0 link: 0
1335 11:51:20.457435 GENERIC: 0.0 read_resources bus 0 link: 0
1336 11:51:20.457542 GENERIC: 0.0 read_resources bus 0 link: 0 done
1337 11:51:20.457651 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1338 11:51:20.457758 DOMAIN: 0000 read_resources bus 0 link: 0 done
1339 11:51:20.457831 Root Device read_resources bus 0 link: 0 done
1340 11:51:20.457881 Done reading resources.
1341 11:51:20.457930 Show resources in subtree (Root Device)...After reading.
1342 11:51:20.457978 Root Device child on link 0 CPU_CLUSTER: 0
1343 11:51:20.458026 CPU_CLUSTER: 0 child on link 0 APIC: 00
1344 11:51:20.458074 APIC: 00
1345 11:51:20.458123 APIC: 12
1346 11:51:20.458171 APIC: 14
1347 11:51:20.458219 APIC: 10
1348 11:51:20.458266 APIC: 16
1349 11:51:20.458313 APIC: 09
1350 11:51:20.458364 APIC: 01
1351 11:51:20.458414 APIC: 08
1352 11:51:20.458462 DOMAIN: 0000 child on link 0 GPIO: 0
1353 11:51:20.458511 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1354 11:51:20.458560 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1355 11:51:20.458609 GPIO: 0
1356 11:51:20.458657 PCI: 00:00.0
1357 11:51:20.458705 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1358 11:51:20.458754 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1359 11:51:20.458804 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1360 11:51:20.458853 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1361 11:51:20.458905 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1362 11:51:20.458955 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1363 11:51:20.459003 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1364 11:51:20.459052 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1365 11:51:20.459101 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1366 11:51:20.459150 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1367 11:51:20.459199 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1368 11:51:20.459248 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1369 11:51:20.459297 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1370 11:51:20.459346 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1371 11:51:20.459394 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1372 11:51:20.459446 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1373 11:51:20.459497 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1374 11:51:20.459546 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1375 11:51:20.459595 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1376 11:51:20.459644 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1377 11:51:20.459694 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1378 11:51:20.459743 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1379 11:51:20.459793 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1380 11:51:20.459841 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1381 11:51:20.459890 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1382 11:51:20.459939 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1383 11:51:20.459991 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1384 11:51:20.460040 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1385 11:51:20.460089 PCI: 00:02.0
1386 11:51:20.460137 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1387 11:51:20.460380 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1388 11:51:20.460493 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1389 11:51:20.460610 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1390 11:51:20.460719 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1391 11:51:20.460827 GENERIC: 0.0
1392 11:51:20.460935 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1393 11:51:20.461073 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1394 11:51:20.461177 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1395 11:51:20.461230 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1396 11:51:20.461280 PCI: 01:00.0
1397 11:51:20.461329 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1398 11:51:20.461378 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1399 11:51:20.461427 PCI: 00:08.0
1400 11:51:20.461475 PCI: 00:0a.0
1401 11:51:20.461523 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1402 11:51:20.461572 PCI: 00:0d.0 child on link 0 USB0 port 0
1403 11:51:20.461620 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1404 11:51:20.461673 USB0 port 0 child on link 0 USB3 port 0
1405 11:51:20.461722 USB3 port 0
1406 11:51:20.461770 USB3 port 1
1407 11:51:20.461817 USB3 port 2
1408 11:51:20.461864 USB3 port 3
1409 11:51:20.461913 PCI: 00:14.0 child on link 0 USB0 port 0
1410 11:51:20.461961 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1411 11:51:20.462009 USB0 port 0 child on link 0 USB2 port 0
1412 11:51:20.462056 USB2 port 0
1413 11:51:20.462104 USB2 port 1
1414 11:51:20.462152 USB2 port 2
1415 11:51:20.462202 USB2 port 3
1416 11:51:20.462249 USB2 port 4
1417 11:51:20.462296 USB2 port 5
1418 11:51:20.462343 USB2 port 6
1419 11:51:20.462390 USB2 port 7
1420 11:51:20.462438 USB2 port 8
1421 11:51:20.462485 USB2 port 9
1422 11:51:20.462532 USB3 port 0
1423 11:51:20.462580 USB3 port 1
1424 11:51:20.462627 USB3 port 2
1425 11:51:20.462675 USB3 port 3
1426 11:51:20.462721 PCI: 00:14.2
1427 11:51:20.462768 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1428 11:51:20.462817 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1429 11:51:20.462867 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1430 11:51:20.462919 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1431 11:51:20.462969 GENERIC: 0.0
1432 11:51:20.463017 PCI: 00:15.0 child on link 0 I2C: 00:1a
1433 11:51:20.463066 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1434 11:51:20.463115 I2C: 00:1a
1435 11:51:20.463162 I2C: 00:31
1436 11:51:20.463209 I2C: 00:32
1437 11:51:20.463257 PCI: 00:15.1 child on link 0 I2C: 00:50
1438 11:51:20.463305 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1439 11:51:20.463353 I2C: 00:50
1440 11:51:20.463400 PCI: 00:15.2
1441 11:51:20.463451 PCI: 00:15.3 child on link 0 I2C: 00:10
1442 11:51:20.463500 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1443 11:51:20.463549 I2C: 00:10
1444 11:51:20.463597 PCI: 00:16.0
1445 11:51:20.463645 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1446 11:51:20.463694 PCI: 00:19.0
1447 11:51:20.463742 PCI: 00:19.1 child on link 0 I2C: 00:15
1448 11:51:20.463790 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1449 11:51:20.463839 I2C: 00:15
1450 11:51:20.463886 I2C: 00:2c
1451 11:51:20.463935 PCI: 00:1e.0
1452 11:51:20.463986 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1453 11:51:20.464036 PCI: 00:1e.3 child on link 0 SPI: 00
1454 11:51:20.464085 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1455 11:51:20.464133 SPI: 00
1456 11:51:20.464181 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1457 11:51:20.464229 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1458 11:51:20.464278 PNP: 0c09.0
1459 11:51:20.464325 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1460 11:51:20.464374 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1461 11:51:20.464421 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1462 11:51:20.464471 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1463 11:51:20.464522 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1464 11:51:20.464570 GENERIC: 0.0
1465 11:51:20.464618 GENERIC: 1.0
1466 11:51:20.464665 PCI: 00:1f.3
1467 11:51:20.464713 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1468 11:51:20.464762 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1469 11:51:20.464810 PCI: 00:1f.5
1470 11:51:20.465059 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1471 11:51:20.465117 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1472 11:51:20.465171 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1473 11:51:20.465220 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1474 11:51:20.465269 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1475 11:51:20.465318 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1476 11:51:20.465366 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1477 11:51:20.465415 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1478 11:51:20.465463 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1479 11:51:20.465512 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1480 11:51:20.465561 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1481 11:51:20.465613 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1482 11:51:20.465662 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1483 11:51:20.465711 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1484 11:51:20.465758 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1485 11:51:20.465807 DOMAIN: 0000: Resource ranges:
1486 11:51:20.465855 * Base: 1000, Size: 800, Tag: 100
1487 11:51:20.465903 * Base: 1900, Size: e700, Tag: 100
1488 11:51:20.465951 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1489 11:51:20.466000 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1490 11:51:20.466048 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1491 11:51:20.466096 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1492 11:51:20.466147 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1493 11:51:20.466197 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1494 11:51:20.466247 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1495 11:51:20.466295 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1496 11:51:20.466344 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1497 11:51:20.466392 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1498 11:51:20.466440 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1499 11:51:20.466489 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1500 11:51:20.466537 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1501 11:51:20.466586 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1502 11:51:20.466634 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1503 11:51:20.466685 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1504 11:51:20.466734 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1505 11:51:20.466783 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1506 11:51:20.466831 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1507 11:51:20.466879 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1508 11:51:20.466927 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1509 11:51:20.466975 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1510 11:51:20.467024 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1511 11:51:20.467072 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1512 11:51:20.467120 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1513 11:51:20.467170 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1514 11:51:20.467218 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1515 11:51:20.467270 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1516 11:51:20.467320 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1517 11:51:20.467369 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1518 11:51:20.467417 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1519 11:51:20.467466 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1520 11:51:20.467515 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1521 11:51:20.467563 DOMAIN: 0000: Resource ranges:
1522 11:51:20.467611 * Base: 80400000, Size: 3fc00000, Tag: 200
1523 11:51:20.467658 * Base: d0000000, Size: 28000000, Tag: 200
1524 11:51:20.467706 * Base: fa000000, Size: 1000000, Tag: 200
1525 11:51:20.467753 * Base: fb001000, Size: 17ff000, Tag: 200
1526 11:51:20.467804 * Base: fe800000, Size: 300000, Tag: 200
1527 11:51:20.467853 * Base: feb80000, Size: 80000, Tag: 200
1528 11:51:20.467900 * Base: fed00000, Size: 40000, Tag: 200
1529 11:51:20.467948 * Base: fed70000, Size: 10000, Tag: 200
1530 11:51:20.468187 * Base: fed88000, Size: 8000, Tag: 200
1531 11:51:20.468298 * Base: fed93000, Size: d000, Tag: 200
1532 11:51:20.468414 * Base: feda2000, Size: 1e000, Tag: 200
1533 11:51:20.468522 * Base: fede0000, Size: 1220000, Tag: 200
1534 11:51:20.468631 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1535 11:51:20.468740 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1536 11:51:20.468849 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1537 11:51:20.468961 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1538 11:51:20.469111 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1539 11:51:20.469221 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1540 11:51:20.469330 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1541 11:51:20.469443 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1542 11:51:20.469554 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1543 11:51:20.469625 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1544 11:51:20.469676 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1545 11:51:20.469725 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1546 11:51:20.469774 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1547 11:51:20.469822 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1548 11:51:20.469870 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1549 11:51:20.469918 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1550 11:51:20.469971 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1551 11:51:20.470020 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1552 11:51:20.470068 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1553 11:51:20.470117 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1554 11:51:20.470165 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1555 11:51:20.470214 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1556 11:51:20.470263 PCI: 00:06.0: Resource ranges:
1557 11:51:20.470312 * Base: 80400000, Size: 100000, Tag: 200
1558 11:51:20.470360 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1559 11:51:20.470409 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1560 11:51:20.470457 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1561 11:51:20.470509 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1562 11:51:20.470560 Root Device assign_resources, bus 0 link: 0
1563 11:51:20.470609 DOMAIN: 0000 assign_resources, bus 0 link: 0
1564 11:51:20.470658 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1565 11:51:20.470707 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1566 11:51:20.470756 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1567 11:51:20.470805 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1568 11:51:20.470853 PCI: 00:04.0 assign_resources, bus 1 link: 0
1569 11:51:20.470902 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1570 11:51:20.470950 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1571 11:51:20.470999 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1572 11:51:20.471050 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1573 11:51:20.471099 PCI: 00:06.0 assign_resources, bus 1 link: 0
1574 11:51:20.471147 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1575 11:51:20.471195 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1576 11:51:20.471244 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1577 11:51:20.471291 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1578 11:51:20.471340 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1579 11:51:20.471388 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1580 11:51:20.471436 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1581 11:51:20.471485 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1582 11:51:20.471532 PCI: 00:14.0 assign_resources, bus 0 link: 0
1583 11:51:20.471581 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1584 11:51:20.471632 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1585 11:51:20.471682 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1586 11:51:20.471731 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1587 11:51:20.471779 PCI: 00:14.3 assign_resources, bus 0 link: 0
1588 11:51:20.471826 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1589 11:51:20.471874 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1590 11:51:20.471923 PCI: 00:15.0 assign_resources, bus 0 link: 0
1591 11:51:20.471971 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1592 11:51:20.472211 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1593 11:51:20.472326 PCI: 00:15.1 assign_resources, bus 0 link: 0
1594 11:51:20.472434 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1595 11:51:20.472544 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1596 11:51:20.472653 PCI: 00:15.3 assign_resources, bus 0 link: 0
1597 11:51:20.472774 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1598 11:51:20.472885 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1599 11:51:20.472944 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1600 11:51:20.472995 PCI: 00:19.1 assign_resources, bus 0 link: 0
1601 11:51:20.473090 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1602 11:51:20.473141 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1603 11:51:20.473190 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1604 11:51:20.473242 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1605 11:51:20.473291 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1606 11:51:20.473339 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1607 11:51:20.473387 LPC: Trying to open IO window from 800 size 1ff
1608 11:51:20.473435 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1609 11:51:20.473484 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1610 11:51:20.473534 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1611 11:51:20.473583 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1612 11:51:20.473631 Root Device assign_resources, bus 0 link: 0 done
1613 11:51:20.473679 Done setting resources.
1614 11:51:20.473727 Show resources in subtree (Root Device)...After assigning values.
1615 11:51:20.473778 Root Device child on link 0 CPU_CLUSTER: 0
1616 11:51:20.473827 CPU_CLUSTER: 0 child on link 0 APIC: 00
1617 11:51:20.473876 APIC: 00
1618 11:51:20.473924 APIC: 12
1619 11:51:20.473972 APIC: 14
1620 11:51:20.474020 APIC: 10
1621 11:51:20.474067 APIC: 16
1622 11:51:20.474114 APIC: 09
1623 11:51:20.474162 APIC: 01
1624 11:51:20.474209 APIC: 08
1625 11:51:20.474256 DOMAIN: 0000 child on link 0 GPIO: 0
1626 11:51:20.474305 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1627 11:51:20.474358 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1628 11:51:20.474407 GPIO: 0
1629 11:51:20.474455 PCI: 00:00.0
1630 11:51:20.474503 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1631 11:51:20.474552 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1632 11:51:20.474601 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1633 11:51:20.474649 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1634 11:51:20.474698 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1635 11:51:20.474747 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1636 11:51:20.474796 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1637 11:51:20.474844 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1638 11:51:20.474897 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1639 11:51:20.474948 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1640 11:51:20.474997 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1641 11:51:20.475046 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1642 11:51:20.475096 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1643 11:51:20.475145 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1644 11:51:20.475193 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1645 11:51:20.475242 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1646 11:51:20.475290 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1647 11:51:20.475339 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1648 11:51:20.475387 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1649 11:51:20.475440 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1650 11:51:20.475490 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1651 11:51:20.475538 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1652 11:51:20.475587 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1653 11:51:20.475826 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1654 11:51:20.475882 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1655 11:51:20.475932 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1656 11:51:20.475981 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1657 11:51:20.476033 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1658 11:51:20.476084 PCI: 00:02.0
1659 11:51:20.476133 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1660 11:51:20.476182 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1661 11:51:20.476231 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1662 11:51:20.476280 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1663 11:51:20.476327 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1664 11:51:20.476376 GENERIC: 0.0
1665 11:51:20.476423 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1666 11:51:20.476472 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1667 11:51:20.476521 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1668 11:51:20.476569 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1669 11:51:20.476621 PCI: 01:00.0
1670 11:51:20.476669 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1671 11:51:20.476718 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1672 11:51:20.476767 PCI: 00:08.0
1673 11:51:20.476814 PCI: 00:0a.0
1674 11:51:20.476861 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1675 11:51:20.476910 PCI: 00:0d.0 child on link 0 USB0 port 0
1676 11:51:20.476958 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1677 11:51:20.477006 USB0 port 0 child on link 0 USB3 port 0
1678 11:51:20.477066 USB3 port 0
1679 11:51:20.477114 USB3 port 1
1680 11:51:20.477164 USB3 port 2
1681 11:51:20.477213 USB3 port 3
1682 11:51:20.477263 PCI: 00:14.0 child on link 0 USB0 port 0
1683 11:51:20.477311 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1684 11:51:20.477361 USB0 port 0 child on link 0 USB2 port 0
1685 11:51:20.477409 USB2 port 0
1686 11:51:20.477457 USB2 port 1
1687 11:51:20.477505 USB2 port 2
1688 11:51:20.477552 USB2 port 3
1689 11:51:20.477600 USB2 port 4
1690 11:51:20.477648 USB2 port 5
1691 11:51:20.477698 USB2 port 6
1692 11:51:20.477746 USB2 port 7
1693 11:51:20.477793 USB2 port 8
1694 11:51:20.477840 USB2 port 9
1695 11:51:20.477888 USB3 port 0
1696 11:51:20.477935 USB3 port 1
1697 11:51:20.477983 USB3 port 2
1698 11:51:20.478031 USB3 port 3
1699 11:51:20.478078 PCI: 00:14.2
1700 11:51:20.478126 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1701 11:51:20.478176 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1702 11:51:20.478225 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1703 11:51:20.478277 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1704 11:51:20.478328 GENERIC: 0.0
1705 11:51:20.478376 PCI: 00:15.0 child on link 0 I2C: 00:1a
1706 11:51:20.478424 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1707 11:51:20.478473 I2C: 00:1a
1708 11:51:20.478521 I2C: 00:31
1709 11:51:20.478568 I2C: 00:32
1710 11:51:20.478616 PCI: 00:15.1 child on link 0 I2C: 00:50
1711 11:51:20.478664 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1712 11:51:20.478713 I2C: 00:50
1713 11:51:20.478760 PCI: 00:15.2
1714 11:51:20.478810 PCI: 00:15.3 child on link 0 I2C: 00:10
1715 11:51:20.478858 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1716 11:51:20.478906 I2C: 00:10
1717 11:51:20.478953 PCI: 00:16.0
1718 11:51:20.479001 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1719 11:51:20.479049 PCI: 00:19.0
1720 11:51:20.479097 PCI: 00:19.1 child on link 0 I2C: 00:15
1721 11:51:20.479144 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1722 11:51:20.479194 I2C: 00:15
1723 11:51:20.479241 I2C: 00:2c
1724 11:51:20.479288 PCI: 00:1e.0
1725 11:51:20.479339 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1726 11:51:20.479390 PCI: 00:1e.3 child on link 0 SPI: 00
1727 11:51:20.479438 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1728 11:51:20.479486 SPI: 00
1729 11:51:20.479535 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1730 11:51:20.479583 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1731 11:51:20.479632 PNP: 0c09.0
1732 11:51:20.479873 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1733 11:51:20.479986 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1734 11:51:20.480097 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1735 11:51:20.480207 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1736 11:51:20.480316 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1737 11:51:20.480428 GENERIC: 0.0
1738 11:51:20.480538 GENERIC: 1.0
1739 11:51:20.480645 PCI: 00:1f.3
1740 11:51:20.480755 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1741 11:51:20.480866 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1742 11:51:20.480978 PCI: 00:1f.5
1743 11:51:20.481096 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1744 11:51:20.481205 Done allocating resources.
1745 11:51:20.481273 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1746 11:51:20.481325 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1747 11:51:20.481375 Configure audio over I2S with MAX98373 NAU88L25B.
1748 11:51:20.481423 Enabling BT offload
1749 11:51:20.481471 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1750 11:51:20.481523 Enabling resources...
1751 11:51:20.481573 PCI: 00:00.0 subsystem <- 8086/4609
1752 11:51:20.481622 PCI: 00:00.0 cmd <- 06
1753 11:51:20.481670 PCI: 00:02.0 subsystem <- 8086/46b3
1754 11:51:20.481717 PCI: 00:02.0 cmd <- 03
1755 11:51:20.481765 PCI: 00:04.0 subsystem <- 8086/461d
1756 11:51:20.481813 PCI: 00:04.0 cmd <- 02
1757 11:51:20.481860 PCI: 00:06.0 bridge ctrl <- 0013
1758 11:51:20.481908 PCI: 00:06.0 subsystem <- 8086/464d
1759 11:51:20.481956 PCI: 00:06.0 cmd <- 106
1760 11:51:20.482003 PCI: 00:0a.0 subsystem <- 8086/467d
1761 11:51:20.482052 PCI: 00:0a.0 cmd <- 02
1762 11:51:20.482103 PCI: 00:0d.0 subsystem <- 8086/461e
1763 11:51:20.482150 PCI: 00:0d.0 cmd <- 02
1764 11:51:20.482198 PCI: 00:14.0 subsystem <- 8086/51ed
1765 11:51:20.482247 PCI: 00:14.0 cmd <- 02
1766 11:51:20.482295 PCI: 00:14.2 subsystem <- 8086/51ef
1767 11:51:20.482342 PCI: 00:14.2 cmd <- 02
1768 11:51:20.482389 PCI: 00:14.3 subsystem <- 8086/51f0
1769 11:51:20.482436 PCI: 00:14.3 cmd <- 02
1770 11:51:20.639797 PCI: 00:15.0 subsystem <- 8086/51e8
1771 11:51:20.640321 PCI: 00:15.0 cmd <- 02
1772 11:51:20.640806 PCI: 00:15.1 subsystem <- 8086/51e9
1773 11:51:20.641307 PCI: 00:15.1 cmd <- 06
1774 11:51:20.641605 PCI: 00:15.3 subsystem <- 8086/51eb
1775 11:51:20.641898 PCI: 00:15.3 cmd <- 02
1776 11:51:20.642173 PCI: 00:16.0 subsystem <- 8086/51e0
1777 11:51:20.642483 PCI: 00:16.0 cmd <- 02
1778 11:51:20.642742 PCI: 00:19.1 subsystem <- 8086/51c6
1779 11:51:20.643015 PCI: 00:19.1 cmd <- 02
1780 11:51:20.643366 PCI: 00:1e.0 subsystem <- 8086/51a8
1781 11:51:20.643678 PCI: 00:1e.0 cmd <- 06
1782 11:51:20.643940 PCI: 00:1e.3 subsystem <- 8086/51ab
1783 11:51:20.644192 PCI: 00:1e.3 cmd <- 02
1784 11:51:20.644460 PCI: 00:1f.0 subsystem <- 8086/5182
1785 11:51:20.644727 PCI: 00:1f.0 cmd <- 407
1786 11:51:20.645056 PCI: 00:1f.3 subsystem <- 8086/51c8
1787 11:51:20.645352 PCI: 00:1f.3 cmd <- 02
1788 11:51:20.645629 PCI: 00:1f.5 subsystem <- 8086/51a4
1789 11:51:20.645883 PCI: 00:1f.5 cmd <- 406
1790 11:51:20.646129 PCI: 01:00.0 cmd <- 02
1791 11:51:20.646395 done.
1792 11:51:20.646643 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1793 11:51:20.646999 ME: Version: Unavailable
1794 11:51:20.647291 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1795 11:51:20.647556 Initializing devices...
1796 11:51:20.647905 Root Device init
1797 11:51:20.648166 mainboard: EC init
1798 11:51:20.648432 Chrome EC: Set SMI mask to 0x0000000000000000
1799 11:51:20.648684 Chrome EC: clear events_b mask to 0x0000000000000000
1800 11:51:20.648937 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1801 11:51:20.649266 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1802 11:51:20.649523 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1803 11:51:20.649794 Chrome EC: Set WAKE mask to 0x0000000000000000
1804 11:51:20.650045 Root Device init finished in 35 msecs
1805 11:51:20.650296 PCI: 00:00.0 init
1806 11:51:20.650566 CPU TDP = 15 Watts
1807 11:51:20.650845 CPU PL1 = 15 Watts
1808 11:51:20.651119 CPU PL2 = 55 Watts
1809 11:51:20.651371 CPU PL4 = 123 Watts
1810 11:51:20.651714 PCI: 00:00.0 init finished in 8 msecs
1811 11:51:20.651981 PCI: 00:02.0 init
1812 11:51:20.652228 GMA: Found VBT in CBFS
1813 11:51:20.652491 GMA: Found valid VBT in CBFS
1814 11:51:20.652743 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1815 11:51:20.652995 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1816 11:51:20.653310 PCI: 00:02.0 init finished in 18 msecs
1817 11:51:20.653565 PCI: 00:06.0 init
1818 11:51:20.653855 Initializing PCH PCIe bridge.
1819 11:51:20.654122 PCI: 00:06.0 init finished in 3 msecs
1820 11:51:20.654369 PCI: 00:0a.0 init
1821 11:51:20.654642 PCI: 00:0a.0 init finished in 0 msecs
1822 11:51:20.654892 PCI: 00:14.0 init
1823 11:51:20.655161 PCI: 00:14.0 init finished in 0 msecs
1824 11:51:20.655407 PCI: 00:14.2 init
1825 11:51:20.655652 PCI: 00:14.2 init finished in 0 msecs
1826 11:51:20.655921 PCI: 00:15.0 init
1827 11:51:20.656168 I2C bus 0 version 0x3230302a
1828 11:51:20.656414 DW I2C bus 0 at 0x80655000 (400 KHz)
1829 11:51:20.656678 PCI: 00:15.0 init finished in 6 msecs
1830 11:51:20.656954 PCI: 00:15.1 init
1831 11:51:20.657278 I2C bus 1 version 0x3230302a
1832 11:51:20.657532 DW I2C bus 1 at 0x80656000 (400 KHz)
1833 11:51:20.657776 PCI: 00:15.1 init finished in 6 msecs
1834 11:51:20.658035 PCI: 00:15.3 init
1835 11:51:20.658284 I2C bus 3 version 0x3230302a
1836 11:51:20.658544 DW I2C bus 3 at 0x80657000 (400 KHz)
1837 11:51:20.658802 PCI: 00:15.3 init finished in 6 msecs
1838 11:51:20.659052 PCI: 00:16.0 init
1839 11:51:20.659311 PCI: 00:16.0 init finished in 0 msecs
1840 11:51:20.659557 PCI: 00:19.1 init
1841 11:51:20.659807 I2C bus 5 version 0x3230302a
1842 11:51:20.660077 DW I2C bus 5 at 0x80659000 (400 KHz)
1843 11:51:20.660325 PCI: 00:19.1 init finished in 6 msecs
1844 11:51:20.660630 PCI: 00:1f.0 init
1845 11:51:20.661262 IOAPIC: Initializing IOAPIC at 0xfec00000
1846 11:51:20.661908 IOAPIC: ID = 0x02
1847 11:51:20.662484 IOAPIC: Dumping registers
1848 11:51:20.663077 reg 0x0000: 0x02000000
1849 11:51:20.663677 reg 0x0001: 0x00770020
1850 11:51:20.664274 reg 0x0002: 0x00000000
1851 11:51:20.664815 IOAPIC: 120 interrupts
1852 11:51:20.665179 IOAPIC: Clearing IOAPIC at 0xfec00000
1853 11:51:20.665463 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1854 11:51:20.665744 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1855 11:51:20.666000 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1856 11:51:20.666278 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1857 11:51:20.666538 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1858 11:51:20.666806 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1859 11:51:20.666998 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1860 11:51:20.667176 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1861 11:51:20.667354 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1862 11:51:20.667541 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1863 11:51:20.667728 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1864 11:51:20.667906 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1865 11:51:20.668085 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1866 11:51:20.668276 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1867 11:51:20.668455 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1868 11:51:20.668634 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1869 11:51:20.668823 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1870 11:51:20.669010 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1871 11:51:20.669214 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1872 11:51:20.669395 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1873 11:51:20.669586 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1874 11:51:20.669767 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1875 11:51:20.669946 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1876 11:51:20.670136 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1877 11:51:20.670323 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1878 11:51:20.670608 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1879 11:51:20.670916 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1880 11:51:20.671108 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1881 11:51:20.671289 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1882 11:51:20.671489 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1883 11:51:20.671668 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1884 11:51:20.671846 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1885 11:51:20.671981 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1886 11:51:20.672126 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1887 11:51:20.672263 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1888 11:51:20.672397 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1889 11:51:20.672531 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1890 11:51:20.672675 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1891 11:51:20.672816 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1892 11:51:20.672951 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1893 11:51:20.673108 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1894 11:51:20.673246 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1895 11:51:20.673391 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1896 11:51:20.673527 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1897 11:51:20.673662 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1898 11:51:20.673798 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1899 11:51:20.673943 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1900 11:51:20.674083 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1901 11:51:20.674218 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1902 11:51:20.674355 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1903 11:51:20.674489 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1904 11:51:20.674633 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1905 11:51:20.674770 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1906 11:51:20.674905 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1907 11:51:20.675040 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1908 11:51:20.675180 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1909 11:51:20.675320 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1910 11:51:20.675455 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1911 11:51:20.675590 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1912 11:51:20.675725 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1913 11:51:20.675875 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1914 11:51:20.676011 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1915 11:51:20.676145 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1916 11:51:20.676280 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1917 11:51:20.676413 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1918 11:51:20.676559 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1919 11:51:20.676696 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1920 11:51:20.676842 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1921 11:51:20.676950 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1922 11:51:20.677088 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1923 11:51:20.677201 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1924 11:51:20.677310 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1925 11:51:20.677419 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1926 11:51:20.677527 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1927 11:51:20.677636 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1928 11:51:20.677753 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1929 11:51:20.677862 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1930 11:51:20.677971 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1931 11:51:20.678078 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1932 11:51:20.678436 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1933 11:51:20.678564 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1934 11:51:20.678674 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1935 11:51:20.678785 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1936 11:51:20.678899 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1937 11:51:20.679013 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1938 11:51:20.679123 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1939 11:51:20.679233 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1940 11:51:20.679342 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1941 11:51:20.679449 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1942 11:51:20.679565 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1943 11:51:20.679673 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1944 11:51:20.679781 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1945 11:51:20.679889 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1946 11:51:20.679997 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1947 11:51:20.680111 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1948 11:51:20.680224 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1949 11:51:20.680332 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1950 11:51:20.680439 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1951 11:51:20.680547 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1952 11:51:20.680655 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1953 11:51:20.680770 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1954 11:51:20.680881 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1955 11:51:20.680990 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1956 11:51:20.681123 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1957 11:51:20.681234 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1958 11:51:20.681343 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1959 11:51:20.681461 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1960 11:51:20.681570 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1961 11:51:20.681679 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1962 11:51:20.681815 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1963 11:51:20.681912 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1964 11:51:20.682009 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1965 11:51:20.682100 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1966 11:51:20.682191 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1967 11:51:20.682281 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1968 11:51:20.682371 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1969 11:51:20.682463 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1970 11:51:20.682555 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1971 11:51:20.682655 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1972 11:51:20.682747 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1973 11:51:20.682837 IOAPIC: Bootstrap Processor Local APIC = 0x00
1974 11:51:20.682928 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1975 11:51:20.683020 PCI: 00:1f.0 init finished in 607 msecs
1976 11:51:20.683111 PCI: 00:1f.2 init
1977 11:51:20.683207 apm_control: Disabling ACPI.
1978 11:51:20.683299 APMC done.
1979 11:51:20.683391 PCI: 00:1f.2 init finished in 7 msecs
1980 11:51:20.683481 PCI: 00:1f.3 init
1981 11:51:20.683572 PCI: 00:1f.3 init finished in 0 msecs
1982 11:51:20.683663 PCI: 01:00.0 init
1983 11:51:20.683753 PCI: 01:00.0 init finished in 0 msecs
1984 11:51:20.683906 PNP: 0c09.0 init
1985 11:51:20.684028 Google Chrome EC uptime: 10.932 seconds
1986 11:51:20.684122 Google Chrome AP resets since EC boot: 0
1987 11:51:20.684213 Google Chrome most recent AP reset causes:
1988 11:51:20.684305 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1989 11:51:20.684403 PNP: 0c09.0 init finished in 19 msecs
1990 11:51:20.684495 GENERIC: 0.0 init
1991 11:51:20.684585 GENERIC: 0.0 init finished in 0 msecs
1992 11:51:20.684676 GENERIC: 1.0 init
1993 11:51:20.684767 GENERIC: 1.0 init finished in 0 msecs
1994 11:51:20.684858 Devices initialized
1995 11:51:20.684949 Show all devs... After init.
1996 11:51:20.685070 Root Device: enabled 1
1997 11:51:20.685166 CPU_CLUSTER: 0: enabled 1
1998 11:51:20.685258 DOMAIN: 0000: enabled 1
1999 11:51:20.685349 GPIO: 0: enabled 1
2000 11:51:20.685439 PCI: 00:00.0: enabled 1
2001 11:51:20.685528 PCI: 00:01.0: enabled 0
2002 11:51:20.685622 PCI: 00:01.1: enabled 0
2003 11:51:20.685715 PCI: 00:02.0: enabled 1
2004 11:51:20.685805 PCI: 00:04.0: enabled 1
2005 11:51:20.685895 PCI: 00:05.0: enabled 0
2006 11:51:20.685984 PCI: 00:06.0: enabled 1
2007 11:51:20.686074 PCI: 00:06.2: enabled 0
2008 11:51:20.686164 PCI: 00:07.0: enabled 0
2009 11:51:20.686261 PCI: 00:07.1: enabled 0
2010 11:51:20.686354 PCI: 00:07.2: enabled 0
2011 11:51:20.686444 PCI: 00:07.3: enabled 0
2012 11:51:20.686533 PCI: 00:08.0: enabled 0
2013 11:51:20.686624 PCI: 00:09.0: enabled 0
2014 11:51:20.686714 PCI: 00:0a.0: enabled 1
2015 11:51:20.686804 PCI: 00:0d.0: enabled 1
2016 11:51:20.686905 PCI: 00:0d.1: enabled 0
2017 11:51:20.686984 PCI: 00:0d.2: enabled 0
2018 11:51:20.687061 PCI: 00:0d.3: enabled 0
2019 11:51:20.687139 PCI: 00:0e.0: enabled 0
2020 11:51:20.687215 PCI: 00:10.0: enabled 0
2021 11:51:20.687291 PCI: 00:10.1: enabled 0
2022 11:51:20.687369 PCI: 00:10.6: enabled 0
2023 11:51:20.687451 PCI: 00:10.7: enabled 0
2024 11:51:20.687533 PCI: 00:12.0: enabled 0
2025 11:51:20.687611 PCI: 00:12.6: enabled 0
2026 11:51:20.687688 PCI: 00:12.7: enabled 0
2027 11:51:20.687765 PCI: 00:13.0: enabled 0
2028 11:51:20.687842 PCI: 00:14.0: enabled 1
2029 11:51:20.687920 PCI: 00:14.1: enabled 0
2030 11:51:20.687996 PCI: 00:14.2: enabled 1
2031 11:51:20.688097 PCI: 00:14.3: enabled 1
2032 11:51:20.688176 PCI: 00:15.0: enabled 1
2033 11:51:20.688254 PCI: 00:15.1: enabled 1
2034 11:51:20.688333 PCI: 00:15.2: enabled 0
2035 11:51:20.688411 PCI: 00:15.3: enabled 1
2036 11:51:20.688488 PCI: 00:16.0: enabled 1
2037 11:51:20.688566 PCI: 00:16.1: enabled 0
2038 11:51:20.688648 PCI: 00:16.2: enabled 0
2039 11:51:20.688730 PCI: 00:16.3: enabled 0
2040 11:51:20.688806 PCI: 00:16.4: enabled 0
2041 11:51:20.688882 PCI: 00:16.5: enabled 0
2042 11:51:20.688959 PCI: 00:17.0: enabled 0
2043 11:51:20.689045 PCI: 00:19.0: enabled 0
2044 11:51:20.689125 PCI: 00:19.1: enabled 1
2045 11:51:20.689208 PCI: 00:19.2: enabled 0
2046 11:51:20.689292 PCI: 00:1a.0: enabled 0
2047 11:51:20.689370 PCI: 00:1c.0: enabled 0
2048 11:51:20.689447 PCI: 00:1c.1: enabled 0
2049 11:51:20.689738 PCI: 00:1c.2: enabled 0
2050 11:51:20.689924 PCI: 00:1c.3: enabled 0
2051 11:51:20.690101 PCI: 00:1c.4: enabled 0
2052 11:51:20.690242 PCI: 00:1c.5: enabled 0
2053 11:51:20.690325 PCI: 00:1c.6: enabled 0
2054 11:51:20.690411 PCI: 00:1c.7: enabled 0
2055 11:51:20.690490 PCI: 00:1d.0: enabled 0
2056 11:51:20.690567 PCI: 00:1d.1: enabled 0
2057 11:51:20.690644 PCI: 00:1d.2: enabled 0
2058 11:51:20.690721 PCI: 00:1d.3: enabled 0
2059 11:51:20.690799 PCI: 00:1e.0: enabled 1
2060 11:51:20.690881 PCI: 00:1e.1: enabled 0
2061 11:51:20.690962 PCI: 00:1e.2: enabled 0
2062 11:51:20.691040 PCI: 00:1e.3: enabled 1
2063 11:51:20.691116 PCI: 00:1f.0: enabled 1
2064 11:51:20.691192 PCI: 00:1f.1: enabled 0
2065 11:51:20.691269 PCI: 00:1f.2: enabled 1
2066 11:51:20.691346 PCI: 00:1f.3: enabled 1
2067 11:51:20.691428 PCI: 00:1f.4: enabled 0
2068 11:51:20.691504 PCI: 00:1f.5: enabled 1
2069 11:51:20.691580 PCI: 00:1f.6: enabled 0
2070 11:51:20.691657 PCI: 00:1f.7: enabled 0
2071 11:51:20.691735 GENERIC: 0.0: enabled 1
2072 11:51:20.691817 GENERIC: 0.0: enabled 1
2073 11:51:20.691884 GENERIC: 1.0: enabled 1
2074 11:51:20.691956 GENERIC: 0.0: enabled 1
2075 11:51:20.692025 GENERIC: 1.0: enabled 1
2076 11:51:20.692092 USB0 port 0: enabled 1
2077 11:51:20.692160 USB0 port 0: enabled 1
2078 11:51:20.692226 GENERIC: 0.0: enabled 1
2079 11:51:20.692293 I2C: 00:1a: enabled 1
2080 11:51:20.692361 I2C: 00:31: enabled 1
2081 11:51:20.692428 I2C: 00:32: enabled 1
2082 11:51:20.692499 I2C: 00:50: enabled 1
2083 11:51:20.692565 I2C: 00:10: enabled 1
2084 11:51:20.692632 I2C: 00:15: enabled 1
2085 11:51:20.692698 I2C: 00:2c: enabled 1
2086 11:51:20.692763 GENERIC: 0.0: enabled 1
2087 11:51:20.692831 SPI: 00: enabled 1
2088 11:51:20.692897 PNP: 0c09.0: enabled 1
2089 11:51:20.692964 GENERIC: 0.0: enabled 1
2090 11:51:20.693052 USB3 port 0: enabled 1
2091 11:51:20.693123 USB3 port 1: enabled 0
2092 11:51:20.693190 USB3 port 2: enabled 1
2093 11:51:20.693258 USB3 port 3: enabled 0
2094 11:51:20.693326 USB2 port 0: enabled 1
2095 11:51:20.693423 USB2 port 1: enabled 0
2096 11:51:20.693493 USB2 port 2: enabled 1
2097 11:51:20.693561 USB2 port 3: enabled 0
2098 11:51:20.693634 USB2 port 4: enabled 0
2099 11:51:20.693702 USB2 port 5: enabled 1
2100 11:51:20.693769 USB2 port 6: enabled 0
2101 11:51:20.693839 USB2 port 7: enabled 0
2102 11:51:20.693907 USB2 port 8: enabled 1
2103 11:51:20.693974 USB2 port 9: enabled 1
2104 11:51:20.694042 USB3 port 0: enabled 1
2105 11:51:20.694110 USB3 port 1: enabled 0
2106 11:51:20.694177 USB3 port 2: enabled 0
2107 11:51:20.694248 USB3 port 3: enabled 0
2108 11:51:20.694318 GENERIC: 0.0: enabled 1
2109 11:51:20.694386 GENERIC: 1.0: enabled 1
2110 11:51:20.694454 APIC: 00: enabled 1
2111 11:51:20.694522 APIC: 12: enabled 1
2112 11:51:20.694589 APIC: 14: enabled 1
2113 11:51:20.694655 APIC: 10: enabled 1
2114 11:51:20.694723 APIC: 16: enabled 1
2115 11:51:20.694797 APIC: 09: enabled 1
2116 11:51:20.694866 APIC: 01: enabled 1
2117 11:51:20.694931 APIC: 08: enabled 1
2118 11:51:20.694998 PCI: 01:00.0: enabled 1
2119 11:51:20.695065 BS: BS_DEV_INIT run times (exec / console): 9 / 1126 ms
2120 11:51:20.695134 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2121 11:51:20.695203 ELOG: NV offset 0xf20000 size 0x4000
2122 11:51:20.695271 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2123 11:51:20.695340 ELOG: Event(17) added with size 13 at 2024-06-06 11:51:19 UTC
2124 11:51:20.695412 ELOG: Event(92) added with size 9 at 2024-06-06 11:51:19 UTC
2125 11:51:20.695484 ELOG: Event(93) added with size 9 at 2024-06-06 11:51:19 UTC
2126 11:51:20.695553 ELOG: Event(9E) added with size 10 at 2024-06-06 11:51:19 UTC
2127 11:51:20.695620 ELOG: Event(9F) added with size 14 at 2024-06-06 11:51:19 UTC
2128 11:51:20.695688 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2129 11:51:20.695758 ELOG: Event(A1) added with size 10 at 2024-06-06 11:51:19 UTC
2130 11:51:20.695827 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2131 11:51:20.695896 ELOG: Event(A0) added with size 9 at 2024-06-06 11:51:19 UTC
2132 11:51:20.695969 elog_add_boot_reason: Logged dev mode boot
2133 11:51:20.696037 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2134 11:51:20.696105 Finalize devices...
2135 11:51:20.696172 PCI: 00:16.0 final
2136 11:51:20.696239 PCI: 00:1f.2 final
2137 11:51:20.696308 GENERIC: 0.0 final
2138 11:51:20.696377 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2139 11:51:20.696446 GENERIC: 1.0 final
2140 11:51:20.696514 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2141 11:51:20.696586 Devices finalized
2142 11:51:20.696657 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2143 11:51:20.696725 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2144 11:51:20.696794 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2145 11:51:20.696870 ME: HFSTS1 : 0x80030045
2146 11:51:20.696932 ME: HFSTS2 : 0x30280116
2147 11:51:20.696992 ME: HFSTS3 : 0x00000050
2148 11:51:20.697075 ME: HFSTS4 : 0x00004000
2149 11:51:20.697142 ME: HFSTS5 : 0x00000000
2150 11:51:20.697203 ME: HFSTS6 : 0x40400006
2151 11:51:20.697264 ME: Manufacturing Mode : YES
2152 11:51:20.697325 ME: SPI Protection Mode Enabled : YES
2153 11:51:20.697385 ME: FPFs Committed : YES
2154 11:51:20.697446 ME: Manufacturing Vars Locked : NO
2155 11:51:20.697506 ME: FW Partition Table : OK
2156 11:51:20.697566 ME: Bringup Loader Failure : NO
2157 11:51:20.697627 ME: Firmware Init Complete : NO
2158 11:51:20.697687 ME: Boot Options Present : NO
2159 11:51:20.697750 ME: Update In Progress : NO
2160 11:51:20.697814 ME: D0i3 Support : YES
2161 11:51:20.697873 ME: Low Power State Enabled : NO
2162 11:51:20.697932 ME: CPU Replaced : YES
2163 11:51:20.697992 ME: CPU Replacement Valid : YES
2164 11:51:20.698051 ME: Current Working State : 5
2165 11:51:20.698112 ME: Current Operation State : 1
2166 11:51:20.698173 ME: Current Operation Mode : 3
2167 11:51:20.698232 ME: Error Code : 0
2168 11:51:20.698292 ME: Enhanced Debug Mode : NO
2169 11:51:20.698356 ME: CPU Debug Disabled : YES
2170 11:51:20.698416 ME: TXT Support : NO
2171 11:51:20.698476 ME: WP for RO is enabled : YES
2172 11:51:20.698752 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2173 11:51:20.698844 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2174 11:51:20.698917 ELOG: Event(91) added with size 10 at 2024-06-06 11:51:19 UTC
2175 11:51:20.698980 Chrome EC: clear events_b mask to 0x0000000020004000
2176 11:51:20.699041 Ramoops buffer: 0x100000@0x7689a000.
2177 11:51:20.699103 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2178 11:51:20.699166 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2179 11:51:20.699228 CBFS: 'fallback/slic' not found.
2180 11:51:20.699289 ACPI: Writing ACPI tables at 7686e000.
2181 11:51:20.699350 ACPI: * FACS
2182 11:51:20.699416 ACPI: * DSDT
2183 11:51:20.699476 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2184 11:51:20.699536 ACPI: * FADT
2185 11:51:20.699598 SCI is IRQ9
2186 11:51:20.699659 ACPI: added table 1/32, length now 40
2187 11:51:20.699720 ACPI: * SSDT
2188 11:51:20.699780 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2189 11:51:20.699842 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2190 11:51:20.699903 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2191 11:51:20.699967 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2192 11:51:20.700031 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2193 11:51:20.700093 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2194 11:51:20.700153 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2195 11:51:20.700215 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2196 11:51:20.700276 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2197 11:51:20.700337 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2198 11:51:20.700398 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2199 11:51:20.700459 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2200 11:51:20.700524 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2201 11:51:20.700585 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2202 11:51:20.700645 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2203 11:51:20.700705 PS2K: Passing 80 keymaps to kernel
2204 11:51:20.700765 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2205 11:51:20.700826 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2206 11:51:20.700887 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2207 11:51:20.700948 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2208 11:51:20.701008 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2209 11:51:20.701095 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2210 11:51:20.701158 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2211 11:51:20.701219 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2212 11:51:20.701281 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2213 11:51:20.701342 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2214 11:51:20.701404 ACPI: added table 2/32, length now 44
2215 11:51:20.701465 ACPI: * MCFG
2216 11:51:20.701525 ACPI: added table 3/32, length now 48
2217 11:51:20.701588 ACPI: * TPM2
2218 11:51:20.701651 TPM2 log created at 0x7685e000
2219 11:51:20.701713 ACPI: added table 4/32, length now 52
2220 11:51:20.701785 ACPI: * LPIT
2221 11:51:20.701840 ACPI: added table 5/32, length now 56
2222 11:51:20.701894 ACPI: * MADT
2223 11:51:20.701949 SCI is IRQ9
2224 11:51:20.702003 ACPI: added table 6/32, length now 60
2225 11:51:20.702058 cmd_reg from pmc_make_ipc_cmd 1052838
2226 11:51:20.702116 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2227 11:51:20.702174 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2228 11:51:20.702230 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2229 11:51:20.702285 PMC CrashLog size in discovery mode: 0xC00
2230 11:51:20.702340 cpu crashlog bar addr: 0x80640000
2231 11:51:20.702394 cpu discovery table offset: 0x6030
2232 11:51:20.702449 cpu_crashlog_discovery_table buffer count: 0x3
2233 11:51:20.702504 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2234 11:51:20.702559 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2235 11:51:20.702614 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2236 11:51:20.702672 PMC crashLog size in discovery mode : 0xC00
2237 11:51:20.702728 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2238 11:51:20.702783 discover mode PMC crashlog size adjusted to: 0x200
2239 11:51:20.702838 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2240 11:51:20.702893 discover mode PMC crashlog size adjusted to: 0x0
2241 11:51:20.702948 m_cpu_crashLog_size : 0x3480 bytes
2242 11:51:20.703002 CPU crashLog present.
2243 11:51:20.703056 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2244 11:51:20.703111 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2245 11:51:20.703165 current = 76877550
2246 11:51:20.703223 ACPI: * DMAR
2247 11:51:20.703280 ACPI: added table 7/32, length now 64
2248 11:51:20.703335 ACPI: added table 8/32, length now 68
2249 11:51:20.703390 ACPI: * HPET
2250 11:51:20.703445 ACPI: added table 9/32, length now 72
2251 11:51:20.703499 ACPI: done.
2252 11:51:20.703554 ACPI tables: 38528 bytes.
2253 11:51:20.703608 smbios_write_tables: 76858000
2254 11:51:20.703662 EC returned error result code 3
2255 11:51:20.703718 Couldn't obtain OEM name from CBI
2256 11:51:20.703776 Create SMBIOS type 16
2257 11:51:20.703831 Create SMBIOS type 17
2258 11:51:20.703885 Create SMBIOS type 20
2259 11:51:20.703938 GENERIC: 0.0 (WIFI Device)
2260 11:51:20.703993 SMBIOS tables: 2156 bytes.
2261 11:51:20.704048 Writing table forward entry at 0x00000500
2262 11:51:20.704102 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2263 11:51:20.704157 Writing coreboot table at 0x76892000
2264 11:51:20.704211 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2265 11:51:20.704461 1. 0000000000001000-000000000009ffff: RAM
2266 11:51:20.704524 2. 00000000000a0000-00000000000fffff: RESERVED
2267 11:51:20.704580 3. 0000000000100000-0000000076857fff: RAM
2268 11:51:20.704634 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2269 11:51:20.704690 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2270 11:51:20.704745 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2271 11:51:20.704798 7. 0000000077000000-00000000803fffff: RESERVED
2272 11:51:20.704857 8. 00000000c0000000-00000000cfffffff: RESERVED
2273 11:51:20.704911 9. 00000000f8000000-00000000f9ffffff: RESERVED
2274 11:51:20.704965 10. 00000000fb000000-00000000fb000fff: RESERVED
2275 11:51:20.705028 11. 00000000fc800000-00000000fe7fffff: RESERVED
2276 11:51:20.705086 12. 00000000feb00000-00000000feb7ffff: RESERVED
2277 11:51:20.705142 13. 00000000fec00000-00000000fecfffff: RESERVED
2278 11:51:20.705198 14. 00000000fed40000-00000000fed6ffff: RESERVED
2279 11:51:20.705253 15. 00000000fed80000-00000000fed87fff: RESERVED
2280 11:51:20.705309 16. 00000000fed90000-00000000fed92fff: RESERVED
2281 11:51:20.705364 17. 00000000feda0000-00000000feda1fff: RESERVED
2282 11:51:20.705422 18. 00000000fedc0000-00000000feddffff: RESERVED
2283 11:51:20.705480 19. 0000000100000000-000000027fbfffff: RAM
2284 11:51:20.705536 Passing 4 GPIOs to payload:
2285 11:51:20.705589 NAME | PORT | POLARITY | VALUE
2286 11:51:20.705644 lid | undefined | high | high
2287 11:51:20.705698 power | undefined | high | low
2288 11:51:20.705753 oprom | undefined | high | low
2289 11:51:20.705807 EC in RW | 0x00000151 | high | low
2290 11:51:20.705861 Board ID: 3
2291 11:51:20.705918 FW config: 0x131
2292 11:51:20.705973 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 7a07
2293 11:51:20.706027 coreboot table: 1764 bytes.
2294 11:51:20.706081 IMD ROOT 0. 0x76fff000 0x00001000
2295 11:51:20.706135 IMD SMALL 1. 0x76ffe000 0x00001000
2296 11:51:20.706188 FSP MEMORY 2. 0x76afe000 0x00500000
2297 11:51:20.706243 CONSOLE 3. 0x76ade000 0x00020000
2298 11:51:20.706297 RO MCACHE 4. 0x76add000 0x00000fd8
2299 11:51:20.706350 FMAP 5. 0x76adc000 0x0000064a
2300 11:51:20.706405 TIME STAMP 6. 0x76adb000 0x00000910
2301 11:51:20.706462 VBOOT WORK 7. 0x76ac7000 0x00014000
2302 11:51:20.706518 MEM INFO 8. 0x76ac6000 0x000003b8
2303 11:51:20.706574 ROMSTG STCK 9. 0x76ac5000 0x00001000
2304 11:51:20.706628 AFTER CAR 10. 0x76ab9000 0x0000c000
2305 11:51:20.706682 RAMSTAGE 11. 0x76a2f000 0x0008a000
2306 11:51:20.706737 ACPI BERT 12. 0x76a1f000 0x00010000
2307 11:51:20.706790 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2308 11:51:20.706853 REFCODE 14. 0x769af000 0x0006f000
2309 11:51:20.706902 SMM BACKUP 15. 0x7699f000 0x00010000
2310 11:51:20.706951 IGD OPREGION16. 0x7699a000 0x00004203
2311 11:51:20.707003 RAMOOPS 17. 0x7689a000 0x00100000
2312 11:51:20.707052 COREBOOT 18. 0x76892000 0x00008000
2313 11:51:20.707101 ACPI 19. 0x7686e000 0x00024000
2314 11:51:20.707150 TPM2 TCGLOG20. 0x7685e000 0x00010000
2315 11:51:20.707200 PMC CRASHLOG21. 0x7685d000 0x00000c00
2316 11:51:20.707249 CPU CRASHLOG22. 0x76859000 0x00003480
2317 11:51:20.707298 SMBIOS 23. 0x76858000 0x00001000
2318 11:51:20.707348 IMD small region:
2319 11:51:20.707397 IMD ROOT 0. 0x76ffec00 0x00000400
2320 11:51:20.707447 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2321 11:51:20.707496 VPD 2. 0x76ffeb60 0x0000006c
2322 11:51:20.707545 POWER STATE 3. 0x76ffeb00 0x00000044
2323 11:51:20.707597 ROMSTAGE 4. 0x76ffeae0 0x00000004
2324 11:51:20.707648 ACPI GNVS 5. 0x76ffea80 0x00000048
2325 11:51:20.707697 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2326 11:51:20.707747 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2327 11:51:20.707797 MTRR: Physical address space:
2328 11:51:20.707845 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2329 11:51:20.707897 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2330 11:51:20.707947 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2331 11:51:20.707999 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2332 11:51:20.708049 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2333 11:51:20.708102 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2334 11:51:20.708154 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2335 11:51:20.708204 MTRR: Fixed MSR 0x250 0x0606060606060606
2336 11:51:20.708254 MTRR: Fixed MSR 0x258 0x0606060606060606
2337 11:51:20.708303 MTRR: Fixed MSR 0x259 0x0000000000000000
2338 11:51:20.708353 MTRR: Fixed MSR 0x268 0x0606060606060606
2339 11:51:20.708403 MTRR: Fixed MSR 0x269 0x0606060606060606
2340 11:51:20.708452 MTRR: Fixed MSR 0x26a 0x0606060606060606
2341 11:51:20.708501 MTRR: Fixed MSR 0x26b 0x0606060606060606
2342 11:51:20.708549 MTRR: Fixed MSR 0x26c 0x0606060606060606
2343 11:51:20.708598 MTRR: Fixed MSR 0x26d 0x0606060606060606
2344 11:51:20.708650 MTRR: Fixed MSR 0x26e 0x0606060606060606
2345 11:51:20.708701 MTRR: Fixed MSR 0x26f 0x0606060606060606
2346 11:51:20.708750 call enable_fixed_mtrr()
2347 11:51:20.708799 CPU physical address size: 39 bits
2348 11:51:20.708849 MTRR: default type WB/UC MTRR counts: 6/6.
2349 11:51:20.708897 MTRR: UC selected as default type.
2350 11:51:20.708946 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2351 11:51:20.708995 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2352 11:51:20.709056 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2353 11:51:20.709107 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2354 11:51:20.709156 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2355 11:51:20.709398 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2356 11:51:20.709454 MTRR: Fixed MSR 0x250 0x0606060606060606
2357 11:51:20.709504 MTRR: Fixed MSR 0x258 0x0606060606060606
2358 11:51:20.709554 MTRR: Fixed MSR 0x259 0x0000000000000000
2359 11:51:20.709603 MTRR: Fixed MSR 0x268 0x0606060606060606
2360 11:51:20.709652 MTRR: Fixed MSR 0x269 0x0606060606060606
2361 11:51:20.709702 MTRR: Fixed MSR 0x26a 0x0606060606060606
2362 11:51:20.709755 MTRR: Fixed MSR 0x26b 0x0606060606060606
2363 11:51:20.709806 MTRR: Fixed MSR 0x26c 0x0606060606060606
2364 11:51:20.709855 MTRR: Fixed MSR 0x26d 0x0606060606060606
2365 11:51:20.709904 MTRR: Fixed MSR 0x26e 0x0606060606060606
2366 11:51:20.709953 MTRR: Fixed MSR 0x26f 0x0606060606060606
2367 11:51:20.710003 MTRR: Fixed MSR 0x250 0x0606060606060606
2368 11:51:20.710053 call enable_fixed_mtrr()
2369 11:51:20.710102 MTRR: Fixed MSR 0x258 0x0606060606060606
2370 11:51:20.710151 MTRR: Fixed MSR 0x259 0x0000000000000000
2371 11:51:20.710200 MTRR: Fixed MSR 0x268 0x0606060606060606
2372 11:51:20.710249 MTRR: Fixed MSR 0x269 0x0606060606060606
2373 11:51:20.710302 MTRR: Fixed MSR 0x250 0x0606060606060606
2374 11:51:20.710352 MTRR: Fixed MSR 0x26a 0x0606060606060606
2375 11:51:20.710401 MTRR: Fixed MSR 0x26b 0x0606060606060606
2376 11:51:20.710449 MTRR: Fixed MSR 0x26c 0x0606060606060606
2377 11:51:20.710498 MTRR: Fixed MSR 0x26d 0x0606060606060606
2378 11:51:20.710547 MTRR: Fixed MSR 0x26e 0x0606060606060606
2379 11:51:20.710595 MTRR: Fixed MSR 0x26f 0x0606060606060606
2380 11:51:20.710644 CPU physical address size: 39 bits
2381 11:51:20.710693 call enable_fixed_mtrr()
2382 11:51:20.710742 MTRR: Fixed MSR 0x250 0x0606060606060606
2383 11:51:20.710791 MTRR: Fixed MSR 0x258 0x0606060606060606
2384 11:51:20.710839 CPU physical address size: 39 bits
2385 11:51:20.710889 MTRR: Fixed MSR 0x258 0x0606060606060606
2386 11:51:20.710937 MTRR: Fixed MSR 0x250 0x0606060606060606
2387 11:51:20.710989 MTRR: Fixed MSR 0x259 0x0000000000000000
2388 11:51:20.711040 MTRR: Fixed MSR 0x250 0x0606060606060606
2389 11:51:20.711088 MTRR: Fixed MSR 0x258 0x0606060606060606
2390 11:51:20.711137 MTRR: Fixed MSR 0x259 0x0000000000000000
2391 11:51:20.711186 MTRR: Fixed MSR 0x268 0x0606060606060606
2392 11:51:20.711236 MTRR: Fixed MSR 0x269 0x0606060606060606
2393 11:51:20.711284 MTRR: Fixed MSR 0x26a 0x0606060606060606
2394 11:51:20.711333 MTRR: Fixed MSR 0x26b 0x0606060606060606
2395 11:51:20.711383 MTRR: Fixed MSR 0x26c 0x0606060606060606
2396 11:51:20.711431 MTRR: Fixed MSR 0x26d 0x0606060606060606
2397 11:51:20.711479 MTRR: Fixed MSR 0x26e 0x0606060606060606
2398 11:51:20.711528 MTRR: Fixed MSR 0x26f 0x0606060606060606
2399 11:51:20.711580 MTRR: Fixed MSR 0x268 0x0606060606060606
2400 11:51:20.711629 call enable_fixed_mtrr()
2401 11:51:20.711678 MTRR: Fixed MSR 0x269 0x0606060606060606
2402 11:51:20.711726 CPU physical address size: 39 bits
2403 11:51:20.711788 MTRR: Fixed MSR 0x259 0x0000000000000000
2404 11:51:20.711836 MTRR: Fixed MSR 0x258 0x0606060606060606
2405 11:51:20.711883 MTRR: Fixed MSR 0x250 0x0606060606060606
2406 11:51:20.711931 MTRR: Fixed MSR 0x26a 0x0606060606060606
2407 11:51:20.711978 MTRR: Fixed MSR 0x259 0x0000000000000000
2408 11:51:20.712025 MTRR: Fixed MSR 0x268 0x0606060606060606
2409 11:51:20.712073 MTRR: Fixed MSR 0x269 0x0606060606060606
2410 11:51:20.712132 MTRR: Fixed MSR 0x26a 0x0606060606060606
2411 11:51:20.712181 MTRR: Fixed MSR 0x26b 0x0606060606060606
2412 11:51:20.712229 MTRR: Fixed MSR 0x26c 0x0606060606060606
2413 11:51:20.712277 MTRR: Fixed MSR 0x26d 0x0606060606060606
2414 11:51:20.712328 MTRR: Fixed MSR 0x26e 0x0606060606060606
2415 11:51:20.712378 MTRR: Fixed MSR 0x26f 0x0606060606060606
2416 11:51:20.712426 MTRR: Fixed MSR 0x268 0x0606060606060606
2417 11:51:20.712474 call enable_fixed_mtrr()
2418 11:51:20.712522 MTRR: Fixed MSR 0x26b 0x0606060606060606
2419 11:51:20.712570 MTRR: Fixed MSR 0x26c 0x0606060606060606
2420 11:51:20.712618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2421 11:51:20.712666 MTRR: Fixed MSR 0x26e 0x0606060606060606
2422 11:51:20.712714 MTRR: Fixed MSR 0x26f 0x0606060606060606
2423 11:51:20.712762 CPU physical address size: 39 bits
2424 11:51:20.712810 call enable_fixed_mtrr()
2425 11:51:20.712862 MTRR: Fixed MSR 0x269 0x0606060606060606
2426 11:51:20.712911 CPU physical address size: 39 bits
2427 11:51:20.712958 MTRR: Fixed MSR 0x26a 0x0606060606060606
2428 11:51:20.713007 MTRR: Fixed MSR 0x26b 0x0606060606060606
2429 11:51:20.713104 MTRR: Fixed MSR 0x26c 0x0606060606060606
2430 11:51:20.713152 MTRR: Fixed MSR 0x26d 0x0606060606060606
2431 11:51:20.713200 MTRR: Fixed MSR 0x26e 0x0606060606060606
2432 11:51:20.713248 MTRR: Fixed MSR 0x26f 0x0606060606060606
2433 11:51:20.713295 MTRR: Fixed MSR 0x258 0x0606060606060606
2434 11:51:20.713343 call enable_fixed_mtrr()
2435 11:51:20.713394 MTRR: Fixed MSR 0x259 0x0000000000000000
2436 11:51:20.713443 MTRR: Fixed MSR 0x268 0x0606060606060606
2437 11:51:20.713492 MTRR: Fixed MSR 0x269 0x0606060606060606
2438 11:51:20.713541 CPU physical address size: 39 bits
2439 11:51:20.713588 MTRR: Fixed MSR 0x26a 0x0606060606060606
2440 11:51:20.713636 MTRR: Fixed MSR 0x26b 0x0606060606060606
2441 11:51:20.713684 MTRR: Fixed MSR 0x26c 0x0606060606060606
2442 11:51:20.713733 MTRR: Fixed MSR 0x26d 0x0606060606060606
2443 11:51:20.713781 MTRR: Fixed MSR 0x26e 0x0606060606060606
2444 11:51:20.713829 MTRR: Fixed MSR 0x26f 0x0606060606060606
2445 11:51:20.713877 call enable_fixed_mtrr()
2446 11:51:20.713928 CPU physical address size: 39 bits
2447 11:51:20.713976
2448 11:51:20.714024 MTRR check
2449 11:51:20.714072 Fixed MTRRs : Enabled
2450 11:51:20.714120 Variable MTRRs: Enabled
2451 11:51:20.714168
2452 11:51:20.714215 BS: BS_WRITE_TABLES exit times (exec / console): 255 / 150 ms
2453 11:51:20.714263 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2454 11:51:20.714312 Checking segment from ROM address 0xffc26dac
2455 11:51:20.714361 Checking segment from ROM address 0xffc26dc8
2456 11:51:20.714410 Loading segment from ROM address 0xffc26dac
2457 11:51:20.714461 code (compression=1)
2458 11:51:20.714696 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2459 11:51:20.714752 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2460 11:51:20.714801 using LZMA
2461 11:51:20.714850 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2462 11:51:20.714898 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2463 11:51:20.714947 Loading segment from ROM address 0xffc26dc8
2464 11:51:20.714998 Entry Point 0x30000000
2465 11:51:20.715046 Loaded segments
2466 11:51:20.715094 BS: BS_PAYLOAD_LOAD run times (exec / console): 86 / 62 ms
2467 11:51:20.715143 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2468 11:51:20.715190 Finalizing chipset.
2469 11:51:20.715238 apm_control: Finalizing SMM.
2470 11:51:20.715286 APMC done.
2471 11:51:20.715335 HECI: CSE device 16.0 is hidden
2472 11:51:20.715383 HECI: CSE device 16.1 is disabled
2473 11:51:20.715430 HECI: CSE device 16.2 is disabled
2474 11:51:20.715478 HECI: CSE device 16.3 is disabled
2475 11:51:20.715525 HECI: CSE device 16.4 is disabled
2476 11:51:20.715576 HECI: CSE device 16.5 is disabled
2477 11:51:20.715625 HECI: CSE device 16.0 is hidden
2478 11:51:20.715672 CSE is disabled, cannot send End-of-Post (EOP) message
2479 11:51:20.715721 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2480 11:51:20.715769 mp_park_aps done after 0 msecs.
2481 11:51:20.715817 Jumping to boot code at 0x30000000(0x76892000)
2482 11:51:20.715865 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2483 11:51:20.715915
2484 11:51:20.715963
2485 11:51:20.716010
2486 11:51:20.716057 Starting depthcharge on Volmar...
2487 11:51:20.716108
2488 11:51:20.716155 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2489 11:51:20.716203
2490 11:51:20.716251 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2491 11:51:20.716299
2492 11:51:20.716346 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2493 11:51:20.716394
2494 11:51:20.716441 configure_storage: Failed to remap 1C:2
2495 11:51:20.716488
2496 11:51:20.716535 Wipe memory regions:
2497 11:51:20.716582
2498 11:51:20.716632 [0x00000000001000, 0x000000000a0000)
2499 11:51:20.716679
2500 11:51:20.716729 [0x00000000100000, 0x00000030000000)
2501 11:51:20.717069 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2502 11:51:20.717171 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2503 11:51:20.717245 Setting prompt string to ['brya:']
2504 11:51:20.717315 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2505 11:51:20.795909
2506 11:51:20.799567 [0x00000032668e60, 0x00000076858000)
2507 11:51:20.943864
2508 11:51:20.947093 [0x00000100000000, 0x0000027fc00000)
2509 11:51:21.757621
2510 11:51:21.760772 ec_init: CrosEC protocol v3 supported (256, 256)
2511 11:51:22.368516
2512 11:51:22.368850 R8152: Initializing
2513 11:51:22.369124
2514 11:51:22.371632 Version 9 (ocp_data = 6010)
2515 11:51:22.371874
2516 11:51:22.374943 R8152: Done initializing
2517 11:51:22.375206
2518 11:51:22.378338 Adding net device
2519 11:51:22.678870
2520 11:51:22.682305 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2521 11:51:22.682401
2522 11:51:22.682462
2523 11:51:22.682730 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2525 11:51:22.783319 brya: tftpboot 192.168.201.1 14202291/tftp-deploy-zzmq52ss/kernel/bzImage 14202291/tftp-deploy-zzmq52ss/kernel/cmdline 14202291/tftp-deploy-zzmq52ss/ramdisk/ramdisk.cpio.gz
2526 11:51:22.783976 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2527 11:51:22.784369 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2528 11:51:22.788616 tftpboot 192.168.201.1 14202291/tftp-deploy-zzmq52ss/kernel/bzImploy-zzmq52ss/kernel/cmdline 14202291/tftp-deploy-zzmq52ss/ramdisk/ramdisk.cpio.gz
2529 11:51:22.789120
2530 11:51:22.789464 Waiting for link
2531 11:51:22.992605
2532 11:51:22.992723 done.
2533 11:51:22.992822
2534 11:51:22.992936 MAC: 00:e0:4c:68:01:22
2535 11:51:22.993030
2536 11:51:22.995981 Sending DHCP discover... done.
2537 11:51:22.996080
2538 11:51:22.999237 Waiting for reply... done.
2539 11:51:22.999334
2540 11:51:23.002258 Sending DHCP request... done.
2541 11:51:23.002354
2542 11:51:23.009182 Waiting for reply... done.
2543 11:51:23.009256
2544 11:51:23.009313 My ip is 192.168.201.15
2545 11:51:23.009366
2546 11:51:23.012396 The DHCP server ip is 192.168.201.1
2547 11:51:23.012478
2548 11:51:23.018915 TFTP server IP predefined by user: 192.168.201.1
2549 11:51:23.019000
2550 11:51:23.025389 Bootfile predefined by user: 14202291/tftp-deploy-zzmq52ss/kernel/bzImage
2551 11:51:23.025466
2552 11:51:23.028571 Sending tftp read request... done.
2553 11:51:23.028647
2554 11:51:23.032060 Waiting for the transfer...
2555 11:51:23.032136
2556 11:51:23.290741 00000000 ################################################################
2557 11:51:23.290856
2558 11:51:23.548394 00080000 ################################################################
2559 11:51:23.548538
2560 11:51:23.813234 00100000 ################################################################
2561 11:51:23.813372
2562 11:51:24.087842 00180000 ################################################################
2563 11:51:24.087958
2564 11:51:24.337212 00200000 ################################################################
2565 11:51:24.337349
2566 11:51:24.586021 00280000 ################################################################
2567 11:51:24.586136
2568 11:51:24.835288 00300000 ################################################################
2569 11:51:24.835436
2570 11:51:25.086391 00380000 ################################################################
2571 11:51:25.086531
2572 11:51:25.335579 00400000 ################################################################
2573 11:51:25.335759
2574 11:51:25.583854 00480000 ################################################################
2575 11:51:25.583971
2576 11:51:25.832888 00500000 ################################################################
2577 11:51:25.833005
2578 11:51:26.087277 00580000 ################################################################
2579 11:51:26.087423
2580 11:51:26.340461 00600000 ################################################################
2581 11:51:26.340577
2582 11:51:26.595253 00680000 ################################################################
2583 11:51:26.595367
2584 11:51:26.849388 00700000 ################################################################
2585 11:51:26.849535
2586 11:51:27.102314 00780000 ################################################################
2587 11:51:27.102430
2588 11:51:27.360917 00800000 ################################################################
2589 11:51:27.361065
2590 11:51:27.622120 00880000 ################################################################
2591 11:51:27.622260
2592 11:51:27.889097 00900000 ################################################################
2593 11:51:27.889219
2594 11:51:28.164224 00980000 ################################################################
2595 11:51:28.164335
2596 11:51:28.430841 00a00000 ################################################################
2597 11:51:28.430983
2598 11:51:28.686555 00a80000 ################################################################
2599 11:51:28.686695
2600 11:51:28.961775 00b00000 ################################################################
2601 11:51:28.961921
2602 11:51:29.223341 00b80000 ################################################################
2603 11:51:29.223484
2604 11:51:29.474995 00c00000 ################################################################
2605 11:51:29.475130
2606 11:51:29.729297 00c80000 ################################################################
2607 11:51:29.729443
2608 11:51:29.988855 00d00000 ################################################################
2609 11:51:29.989005
2610 11:51:30.243584 00d80000 ################################################################
2611 11:51:30.243723
2612 11:51:30.502096 00e00000 ################################################################
2613 11:51:30.502235
2614 11:51:30.758947 00e80000 ################################################################
2615 11:51:30.759059
2616 11:51:31.014688 00f00000 ################################################################
2617 11:51:31.014821
2618 11:51:31.269363 00f80000 ################################################################
2619 11:51:31.269499
2620 11:51:31.541303 01000000 ################################################################
2621 11:51:31.541434
2622 11:51:31.821782 01080000 ################################################################
2623 11:51:31.821919
2624 11:51:32.093019 01100000 ################################################################
2625 11:51:32.093152
2626 11:51:32.370519 01180000 ################################################################
2627 11:51:32.370653
2628 11:51:32.643036 01200000 ################################################################
2629 11:51:32.643185
2630 11:51:32.801771 01280000 #################################### done.
2631 11:51:32.801910
2632 11:51:32.804546 The bootfile was 19692576 bytes long.
2633 11:51:32.804642
2634 11:51:32.808316 Sending tftp read request... done.
2635 11:51:32.808412
2636 11:51:32.811563 Waiting for the transfer...
2637 11:51:32.811656
2638 11:51:33.068356 00000000 ################################################################
2639 11:51:33.068474
2640 11:51:33.324954 00080000 ################################################################
2641 11:51:33.325118
2642 11:51:33.580919 00100000 ################################################################
2643 11:51:33.581060
2644 11:51:33.836981 00180000 ################################################################
2645 11:51:33.837110
2646 11:51:34.092546 00200000 ################################################################
2647 11:51:34.092706
2648 11:51:34.346000 00280000 ################################################################
2649 11:51:34.346161
2650 11:51:34.584642 00300000 ################################################################
2651 11:51:34.584808
2652 11:51:34.835890 00380000 ################################################################
2653 11:51:34.836020
2654 11:51:35.096642 00400000 ################################################################
2655 11:51:35.096797
2656 11:51:35.375173 00480000 ################################################################
2657 11:51:35.375324
2658 11:51:35.659807 00500000 ################################################################
2659 11:51:35.659930
2660 11:51:35.936086 00580000 ################################################################
2661 11:51:35.936211
2662 11:51:36.207204 00600000 ################################################################
2663 11:51:36.207327
2664 11:51:36.487921 00680000 ################################################################
2665 11:51:36.488050
2666 11:51:36.742346 00700000 ################################################################
2667 11:51:36.742471
2668 11:51:36.994088 00780000 ################################################################
2669 11:51:36.994216
2670 11:51:37.065907 00800000 ################### done.
2671 11:51:37.066012
2672 11:51:37.069227 Sending tftp read request... done.
2673 11:51:37.069322
2674 11:51:37.072453 Waiting for the transfer...
2675 11:51:37.072546
2676 11:51:37.075788 00000000 # done.
2677 11:51:37.075856
2678 11:51:37.082532 Command line loaded dynamically from TFTP file: 14202291/tftp-deploy-zzmq52ss/kernel/cmdline
2679 11:51:37.082633
2680 11:51:37.108786 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14202291/extract-nfsrootfs-rva3sb2t,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2681 11:51:37.116365
2682 11:51:37.119038 Shutting down all USB controllers.
2683 11:51:37.119113
2684 11:51:37.119184 Removing current net device
2685 11:51:37.119239
2686 11:51:37.122568 Finalizing coreboot
2687 11:51:37.122643
2688 11:51:37.128819 Exiting depthcharge with code 4 at timestamp: 26331369
2689 11:51:37.128896
2690 11:51:37.128954
2691 11:51:37.129053 Starting kernel ...
2692 11:51:37.129105
2693 11:51:37.129182
2694 11:51:37.129583 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2695 11:51:37.129671 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2696 11:51:37.129742 Setting prompt string to ['Linux version [0-9]']
2697 11:51:37.129804 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2698 11:51:37.129866 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2700 11:56:07.130778 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2702 11:56:07.131896 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2704 11:56:07.132718 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2707 11:56:07.134117 end: 2 depthcharge-action (duration 00:05:00) [common]
2709 11:56:07.135234 Cleaning after the job
2710 11:56:07.135624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/ramdisk
2711 11:56:07.140909 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/kernel
2712 11:56:07.151946 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/nfsrootfs
2713 11:56:07.198597 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202291/tftp-deploy-zzmq52ss/modules
2714 11:56:07.199961 start: 4.1 power-off (timeout 00:00:30) [common]
2715 11:56:07.200102 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-4', '--port=1', '--command=off']
2716 11:56:08.122329 >> Command sent successfully.
2717 11:56:08.135886 Returned 0 in 0 seconds
2718 11:56:08.237332 end: 4.1 power-off (duration 00:00:01) [common]
2720 11:56:08.239103 start: 4.2 read-feedback (timeout 00:09:59) [common]
2721 11:56:08.240690 Listened to connection for namespace 'common' for up to 1s
2723 11:56:08.242030 Listened to connection for namespace 'common' for up to 1s
2724 11:56:09.240230 Finalising connection for namespace 'common'
2725 11:56:09.240879 Disconnecting from shell: Finalise
2726 11:56:09.241345
2727 11:56:09.342340 end: 4.2 read-feedback (duration 00:00:01) [common]
2728 11:56:09.342982 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14202291
2729 11:56:09.506308 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14202291
2730 11:56:09.506498 JobError: Your job cannot terminate cleanly.