Boot log: qemu_arm64-virt-gicv3
- Errors: 0
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
1 22:23:00.145461 lava-dispatcher, installed at version: 2023.01
2 22:23:00.145660 start: 0 validate
3 22:23:00.145780 Start time: 2023-06-05 22:23:00.145772+00:00 (UTC)
4 22:23:00.146897 Validating that http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image exists
5 22:23:00.506139 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz exists
6 22:23:00.686002 cmd: ['docker', 'pull', 'kernelci/qemu']
7 22:23:00.686263 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 22:23:00.850148 >> Using default tag: latest
9 22:23:01.988939 >> latest: Pulling from kernelci/qemu
10 22:23:02.020737 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
11 22:23:02.020987 >> Status: Image is up to date for kernelci/qemu:latest
12 22:23:02.054022 >> docker.io/kernelci/qemu:latest
13 22:23:02.057107 Returned 0 in 1 seconds
14 22:23:02.194552 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 22:23:02.194933 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 22:23:04.254822 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 22:23:04.255210 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 22:23:05.333664 Returned 0 in 3 seconds
19 22:23:05.434862 validate duration: 5.29
21 22:23:05.435351 start: 1 deployimages (timeout 00:03:00) [common]
22 22:23:05.435495 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 22:23:05.435890 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw
24 22:23:05.436084 makedir: /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin
25 22:23:05.436245 makedir: /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/tests
26 22:23:05.436399 makedir: /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/results
27 22:23:05.436561 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-add-keys
28 22:23:05.436776 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-add-sources
29 22:23:05.436958 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-background-process-start
30 22:23:05.437145 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-background-process-stop
31 22:23:05.437328 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-common-functions
32 22:23:05.437509 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-echo-ipv4
33 22:23:05.437707 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-install-packages
34 22:23:05.437894 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-installed-packages
35 22:23:05.438077 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-os-build
36 22:23:05.438255 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-probe-channel
37 22:23:05.438429 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-probe-ip
38 22:23:05.438602 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-target-ip
39 22:23:05.438779 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-target-mac
40 22:23:05.438952 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-target-storage
41 22:23:05.439132 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-case
42 22:23:05.439306 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-event
43 22:23:05.439491 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-feedback
44 22:23:05.439670 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-raise
45 22:23:05.439848 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-reference
46 22:23:05.440026 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-runner
47 22:23:05.440207 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-set
48 22:23:05.440383 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-test-shell
49 22:23:05.440564 Updating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-install-packages (oe)
50 22:23:05.440802 Updating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/bin/lava-installed-packages (oe)
51 22:23:05.440981 Creating /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/environment
52 22:23:05.441125 LAVA metadata
53 22:23:05.441229 - LAVA_JOB_ID=566130
54 22:23:05.441330 - LAVA_DISPATCHER_IP=172.27.0.2
55 22:23:05.441476 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 22:23:05.441577 skipped lava-vland-overlay
57 22:23:05.441697 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 22:23:05.441819 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 22:23:05.441917 skipped lava-multinode-overlay
60 22:23:05.442026 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 22:23:05.442148 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 22:23:05.442262 Loading test definitions
63 22:23:05.442400 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 22:23:05.442508 Using /lava-566130 at stage 0
65 22:23:05.442952 uuid=566130_1.1.3.1 testdef=None
66 22:23:05.443086 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 22:23:05.443208 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 22:23:05.443882 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 22:23:05.444238 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 22:23:05.445032 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 22:23:05.445382 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 22:23:05.446146 runner path: /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/0/tests/0_timesync-off test_uuid 566130_1.1.3.1
75 22:23:05.446346 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 22:23:05.446695 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 22:23:05.446801 Using /lava-566130 at stage 0
79 22:23:05.446943 Fetching tests from https://github.com/kernelci/test-definitions.git
80 22:23:05.447055 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/0/tests/1_kselftest-arm64_qemu'
81 22:23:09.651741 Running '/usr/bin/git checkout kernelci.org
82 22:23:09.820741 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 22:23:09.821676 uuid=566130_1.1.3.5 testdef=None
84 22:23:09.821861 end: 1.1.3.5 git-repo-action (duration 00:00:04) [common]
86 22:23:09.822236 start: 1.1.3.6 test-overlay (timeout 00:02:56) [common]
87 22:23:09.823457 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 22:23:09.823826 start: 1.1.3.7 test-install-overlay (timeout 00:02:56) [common]
90 22:23:09.825431 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 22:23:09.825814 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:56) [common]
93 22:23:09.827365 runner path: /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/0/tests/1_kselftest-arm64_qemu test_uuid 566130_1.1.3.5
94 22:23:09.827497 BOARD='qemu_arm64-virt-gicv3'
95 22:23:09.827598 BRANCH='cip-gitlab'
96 22:23:09.827693 SKIPFILE='/dev/null'
97 22:23:09.827785 SKIP_INSTALL='True'
98 22:23:09.827875 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
99 22:23:09.827969 TST_CASENAME=''
100 22:23:09.828059 TST_CMDFILES='arm64'
101 22:23:09.828259 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 22:23:09.828604 Creating lava-test-runner.conf files
104 22:23:09.828704 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/566130/lava-overlay-ku8260cw/lava-566130/0 for stage 0
105 22:23:09.828842 - 0_timesync-off
106 22:23:09.828949 - 1_kselftest-arm64_qemu
107 22:23:09.829088 end: 1.1.3 test-definition (duration 00:00:04) [common]
108 22:23:09.829218 start: 1.1.4 compress-overlay (timeout 00:02:56) [common]
109 22:23:18.537860 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 22:23:18.538050 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:47) [common]
111 22:23:18.538144 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 22:23:18.538246 end: 1.1 lava-overlay (duration 00:00:13) [common]
113 22:23:18.538341 start: 1.2 apply-overlay-guest (timeout 00:02:47) [common]
114 22:23:18.538419 Overlay: /var/lib/lava/dispatcher/tmp/566130/compress-overlay-sjpnkzt4/overlay-1.1.4.tar.gz
115 22:23:33.490236 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 22:23:33.490707 start: 1.3 deploy-device-env (timeout 00:02:32) [common]
118 22:23:33.490796 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 22:23:33.490885 start: 1.4 download-retry (timeout 00:02:32) [common]
120 22:23:33.490977 start: 1.4.1 http-download (timeout 00:02:32) [common]
121 22:23:33.491174 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
122 22:23:33.491250 saving as /var/lib/lava/dispatcher/tmp/566130/deployimages-zscwmunz/kernel/Image
123 22:23:33.491315 total size: 45746688 (43MB)
124 22:23:33.491377 No compression specified
125 22:23:33.848290 progress 0% (0MB)
126 22:23:34.919282 progress 5% (2MB)
127 22:23:35.277966 progress 10% (4MB)
128 22:23:35.464313 progress 15% (6MB)
129 22:23:35.828090 progress 20% (8MB)
130 22:23:36.005886 progress 25% (10MB)
131 22:23:36.189513 progress 30% (13MB)
132 22:23:36.536827 progress 35% (15MB)
133 22:23:36.720371 progress 40% (17MB)
134 22:23:37.065944 progress 45% (19MB)
135 22:23:37.249442 progress 50% (21MB)
136 22:23:37.432421 progress 55% (24MB)
137 22:23:37.614844 progress 60% (26MB)
138 22:23:37.958993 progress 65% (28MB)
139 22:23:38.141658 progress 70% (30MB)
140 22:23:38.324055 progress 75% (32MB)
141 22:23:38.506068 progress 80% (34MB)
142 22:23:38.848300 progress 85% (37MB)
143 22:23:39.030823 progress 90% (39MB)
144 22:23:39.212898 progress 95% (41MB)
145 22:23:39.394419 progress 100% (43MB)
146 22:23:39.394754 43MB downloaded in 5.90s (7.39MB/s)
147 22:23:39.395057 end: 1.4.1 http-download (duration 00:00:06) [common]
149 22:23:39.395569 end: 1.4 download-retry (duration 00:00:06) [common]
150 22:23:39.395742 start: 1.5 download-retry (timeout 00:02:26) [common]
151 22:23:39.395907 start: 1.5.1 http-download (timeout 00:02:26) [common]
152 22:23:39.396150 Not decompressing ramdisk as can be used compressed.
153 22:23:39.396327 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz
154 22:23:39.396458 saving as /var/lib/lava/dispatcher/tmp/566130/deployimages-zscwmunz/ramdisk/rootfs.cpio.gz
155 22:23:39.396587 total size: 88976554 (84MB)
156 22:23:39.396714 No compression specified
157 22:23:39.576334 progress 0% (0MB)
158 22:23:39.943781 progress 5% (4MB)
159 22:23:40.480673 progress 10% (8MB)
160 22:23:41.178556 progress 15% (12MB)
161 22:23:41.713126 progress 20% (17MB)
162 22:23:42.245613 progress 25% (21MB)
163 22:23:42.616091 progress 30% (25MB)
164 22:23:43.323952 progress 35% (29MB)
165 22:23:43.855440 progress 40% (33MB)
166 22:23:44.564668 progress 45% (38MB)
167 22:23:45.270377 progress 50% (42MB)
168 22:23:45.814019 progress 55% (46MB)
169 22:23:46.518330 progress 60% (50MB)
170 22:23:47.061800 progress 65% (55MB)
171 22:23:47.783633 progress 70% (59MB)
172 22:23:48.659598 progress 75% (63MB)
173 22:23:49.381838 progress 80% (67MB)
174 22:23:50.252636 progress 85% (72MB)
175 22:23:50.966135 progress 90% (76MB)
176 22:23:51.678620 progress 95% (80MB)
177 22:23:52.390733 progress 100% (84MB)
178 22:23:52.391048 84MB downloaded in 12.99s (6.53MB/s)
179 22:23:52.391254 end: 1.5.1 http-download (duration 00:00:13) [common]
181 22:23:52.391624 end: 1.5 download-retry (duration 00:00:13) [common]
182 22:23:52.391745 end: 1 deployimages (duration 00:00:47) [common]
183 22:23:52.391867 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 22:23:52.391986 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 22:23:52.392099 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 22:23:52.392386 Extending command line for qcow2 test overlay
187 22:23:52.392849 Pulling docker image
188 22:23:52.392972 cmd: ['docker', 'pull', 'kernelci/qemu']
189 22:23:52.393067 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 22:23:52.556239 >> Using default tag: latest
191 22:23:53.651126 >> latest: Pulling from kernelci/qemu
192 22:23:53.683282 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
193 22:23:53.683578 >> Status: Image is up to date for kernelci/qemu:latest
194 22:23:53.716567 >> docker.io/kernelci/qemu:latest
195 22:23:53.720098 Returned 0 in 1 seconds
196 22:23:53.857393 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-566130-2.1.1-ihg0yju15w --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/566130/deployimages-zscwmunz/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/566130/deployimages-zscwmunz/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/566130/apply-overlay-guest-4w9yrezb/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 22:23:53.993505 started a shell command
198 22:23:53.994162 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 22:23:53.994361 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 22:23:53.994541 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 22:23:53.994718 Setting prompt string to ['Linux version [0-9]']
202 22:23:53.994858 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 22:23:56.222943 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 22:23:56.223548 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1612341-arm64-gcc-10-defconfig-arm64-chromebook-n674v) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 5 22:04:07 UTC 2023
205 22:23:56.223817 [ 0.000000] random: crng init done
206 22:23:56.223988 [ 0.000000] Machine model: linux,dummy-virt
207 22:23:56.224148 [ 0.000000] efi: UEFI not found.
208 22:23:56.224291 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
209 22:23:56.224723 start: 2.2.1 login-action (timeout 00:04:56) [common]
210 22:23:56.224907 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
211 22:23:56.225103 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
212 22:23:56.225281 Using line separator: #'\n'#
213 22:23:56.225413 No login prompt set.
214 22:23:56.225551 Parsing kernel messages
215 22:23:56.225691 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
216 22:23:56.225936 [login-action] Waiting for messages, (timeout 00:04:56)
217 22:23:56.226964 [ 0.000000] printk: bootconsole [pl11] enabled
218 22:23:56.228901 [ 0.000000] NUMA: No NUMA configuration found
219 22:23:56.229068 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 22:23:56.229168 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf3a00-0x7fdf5fff]
221 22:23:56.231055 [ 0.000000] Zone ranges:
222 22:23:56.231693 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 22:23:56.231807 [ 0.000000] DMA32 empty
224 22:23:56.231901 [ 0.000000] Normal empty
225 22:23:56.232200 [ 0.000000] Movable zone start for each node
226 22:23:56.232313 [ 0.000000] Early memory node ranges
227 22:23:56.232406 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 22:23:56.232511 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 22:23:56.247131 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 22:23:56.247993 [ 0.000000] psci: probing for conduit method from DT.
231 22:23:56.248347 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 22:23:56.248473 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 22:23:56.248585 [ 0.000000] psci: Trusted OS migration not required
234 22:23:56.248696 [ 0.000000] psci: SMC Calling Convention v1.0
235 22:23:56.251104 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
236 22:23:56.251506 [ 0.000000] pcpu-alloc: s45224 r8192 d32600 u86016 alloc=21*4096
237 22:23:56.251835 [ 0.000000] pcpu-alloc: [0] 0
238 22:23:56.253344 [ 0.000000] Detected PIPT I-cache on CPU0
239 22:23:56.258673 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 22:23:56.259094 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 22:23:56.259422 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 22:23:56.259800 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 22:23:56.259995 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 22:23:56.260187 [ 0.000000] CPU features: detected: Spectre-v4
245 22:23:56.264081 [ 0.000000] alternatives: applying boot alternatives
246 22:23:56.266869 [ 0.000000] Fallback order for Node 0: 0
247 22:23:56.267315 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 22:23:56.267472 [ 0.000000] Policy zone: DMA
249 22:23:56.267671 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 22:23:56.270246 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 22:23:56.273127 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 22:23:56.273523 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 22:23:56.273976 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 22:23:56.283614 <6>[ 0.000000] Memory: 862480K/1048576K available (17984K kernel code, 4098K rwdata, 14068K rodata, 8384K init, 615K bss, 153328K reserved, 32768K cma-reserved)
255 22:23:56.289449 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 22:23:56.296187 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 22:23:56.296325 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 22:23:56.296436 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 22:23:56.296761 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 22:23:56.296889 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 22:23:56.297201 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 22:23:56.297609 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 22:23:56.298530 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 22:23:56.305633 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 22:23:56.305902 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 22:23:56.307406 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 22:23:56.307547 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 22:23:56.308321 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 22:23:56.312976 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 22:23:56.313736 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @43030000 (indirect, esz 8, psz 64K, shr 1)
271 22:23:56.314100 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @43040000 (flat, esz 8, psz 64K, shr 1)
272 22:23:56.314803 <6>[ 0.000000] GICv3: using LPI property table @0x0000000043050000
273 22:23:56.315498 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000043060000
274 22:23:56.316842 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 22:23:56.325163 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 22:23:56.325734 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 22:23:56.326339 <6>[ 0.000076] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 22:23:56.343597 <6>[ 0.014909] Console: colour dummy device 80x25
279 22:23:56.347640 <6>[ 0.020926] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 22:23:56.348022 <6>[ 0.021894] pid_max: default: 32768 minimum: 301
281 22:23:56.349610 <6>[ 0.023411] LSM: Security Framework initializing
282 22:23:56.354048 <6>[ 0.027775] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 22:23:56.354264 <6>[ 0.028006] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 22:23:56.386752 <4>[ 0.060697] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 22:23:56.392787 <6>[ 0.066715] cblist_init_generic: Setting adjustable number of callback queues.
286 22:23:56.393414 <6>[ 0.067042] cblist_init_generic: Setting shift to 0 and lim to 1.
287 22:23:56.393642 <6>[ 0.067599] cblist_init_generic: Setting shift to 0 and lim to 1.
288 22:23:56.395715 <6>[ 0.069446] rcu: Hierarchical SRCU implementation.
289 22:23:56.395906 <6>[ 0.069639] rcu: Max phase no-delay instances is 1000.
290 22:23:56.400463 <6>[ 0.074533] Platform MSI: its@8080000 domain created
291 22:23:56.401238 <6>[ 0.075111] PCI/MSI: /intc@8000000/its@8080000 domain created
292 22:23:56.401657 <6>[ 0.075648] fsl-mc MSI: its@8080000 domain created
293 22:23:56.405162 <6>[ 0.079019] EFI services will not be available.
294 22:23:56.406071 <6>[ 0.079845] smp: Bringing up secondary CPUs ...
295 22:23:56.406237 <6>[ 0.080056] smp: Brought up 1 node, 1 CPU
296 22:23:56.406729 <6>[ 0.080173] SMP: Total of 1 processors activated.
297 22:23:56.406926 <6>[ 0.080469] CPU features: detected: Branch Target Identification
298 22:23:56.407096 <6>[ 0.080637] CPU features: detected: 32-bit EL0 Support
299 22:23:56.407292 <6>[ 0.080755] CPU features: detected: 32-bit EL1 Support
300 22:23:56.407465 <6>[ 0.080857] CPU features: detected: ARMv8.4 Translation Table Level
301 22:23:56.407619 <6>[ 0.081014] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 22:23:56.407751 <6>[ 0.081209] CPU features: detected: Common not Private translations
303 22:23:56.407904 <6>[ 0.081335] CPU features: detected: CRC32 instructions
304 22:23:56.408090 <6>[ 0.081440] CPU features: detected: E0PD
305 22:23:56.408307 <6>[ 0.081578] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 22:23:56.408585 <6>[ 0.082116] CPU features: detected: RCpc load-acquire (LDAPR)
307 22:23:56.408791 <6>[ 0.082239] CPU features: detected: LSE atomic instructions
308 22:23:56.409033 <6>[ 0.082360] CPU features: detected: Privileged Access Never
309 22:23:56.409270 <6>[ 0.082472] CPU features: detected: RAS Extension Support
310 22:23:56.409584 <6>[ 0.082581] CPU features: detected: Random Number Generator
311 22:23:56.409771 <6>[ 0.082708] CPU features: detected: Speculation barrier (SB)
312 22:23:56.409926 <6>[ 0.082833] CPU features: detected: Stage-2 Force Write-Back
313 22:23:56.410073 <6>[ 0.082949] CPU features: detected: TLB range maintenance instructions
314 22:23:56.410219 <6>[ 0.083117] CPU features: detected: Scalable Matrix Extension
315 22:23:56.410364 <6>[ 0.083236] CPU features: detected: FA64
316 22:23:56.410509 <6>[ 0.083321] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 22:23:56.410658 <6>[ 0.083480] CPU features: detected: Scalable Vector Extension
318 22:23:56.421673 <6>[ 0.093110] SVE: maximum available vector length 256 bytes per vector
319 22:23:56.422215 <6>[ 0.096142] SVE: default vector length 64 bytes per vector
320 22:23:56.424199 <6>[ 0.098028] SME: minimum available vector length 16 bytes per vector
321 22:23:56.424335 <6>[ 0.098222] SME: maximum available vector length 256 bytes per vector
322 22:23:56.424687 <6>[ 0.098428] SME: default vector length 32 bytes per vector
323 22:23:56.425060 <6>[ 0.098933] CPU: All CPU(s) started at EL1
324 22:23:56.425478 <6>[ 0.099332] alternatives: applying system-wide alternatives
325 22:23:56.479665 <6>[ 0.153458] devtmpfs: initialized
326 22:23:56.499381 <6>[ 0.172995] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 22:23:56.499848 <6>[ 0.173749] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 22:23:56.505683 <6>[ 0.179521] pinctrl core: initialized pinctrl subsystem
329 22:23:56.516372 <6>[ 0.190410] DMI not present or invalid.
330 22:23:56.525715 <6>[ 0.199482] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 22:23:56.537599 <6>[ 0.211185] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 22:23:56.538327 <6>[ 0.212062] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 22:23:56.538579 <6>[ 0.212548] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 22:23:56.539019 <6>[ 0.212977] audit: initializing netlink subsys (disabled)
335 22:23:56.545957 <6>[ 0.219767] thermal_sys: Registered thermal governor 'step_wise'
336 22:23:56.546689 <6>[ 0.219840] thermal_sys: Registered thermal governor 'power_allocator'
337 22:23:56.546802 <5>[ 0.220522] audit: type=2000 audit(0.176:1): state=initialized audit_enabled=0 res=1
338 22:23:56.547679 <6>[ 0.221556] cpuidle: using governor menu
339 22:23:56.548481 <6>[ 0.222317] NET: Registered PF_QIPCRTR protocol family
340 22:23:56.551381 <6>[ 0.225280] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
341 22:23:56.551987 <6>[ 0.225907] ASID allocator initialised with 65536 entries
342 22:23:56.558021 <6>[ 0.231888] Serial: AMBA PL011 UART driver
343 22:23:56.608138 <6>[ 0.281861] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
344 22:23:56.609820 <6>[ 0.283528] printk: console [ttyAMA0] enabled
345 22:23:56.610063 <6>[ 0.283528] printk: console [ttyAMA0] enabled
346 22:23:56.610286 <6>[ 0.284098] printk: bootconsole [pl11] disabled
347 22:23:56.610471 <6>[ 0.284098] printk: bootconsole [pl11] disabled
348 22:23:56.621125 <6>[ 0.294994] KASLR enabled
349 22:23:56.657420 <6>[ 0.331070] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
350 22:23:56.657655 <6>[ 0.331342] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
351 22:23:56.657772 <6>[ 0.331546] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
352 22:23:56.657878 <6>[ 0.331706] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
353 22:23:56.657993 <6>[ 0.331870] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
354 22:23:56.658103 <6>[ 0.332097] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
355 22:23:56.658434 <6>[ 0.332325] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
356 22:23:56.658545 <6>[ 0.332528] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
357 22:23:56.668299 <6>[ 0.342197] ACPI: Interpreter disabled.
358 22:23:56.676776 <6>[ 0.350611] iommu: Default domain type: Translated
359 22:23:56.676916 <6>[ 0.350827] iommu: DMA domain TLB invalidation policy: strict mode
360 22:23:56.678561 <5>[ 0.352628] SCSI subsystem initialized
361 22:23:56.679574 <7>[ 0.353488] libata version 3.00 loaded.
362 22:23:56.681312 <6>[ 0.355181] usbcore: registered new interface driver usbfs
363 22:23:56.681705 <6>[ 0.355619] usbcore: registered new interface driver hub
364 22:23:56.682227 <6>[ 0.355991] usbcore: registered new device driver usb
365 22:23:56.685711 <6>[ 0.359498] pps_core: LinuxPPS API ver. 1 registered
366 22:23:56.685935 <6>[ 0.359678] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
367 22:23:56.686271 <6>[ 0.360024] PTP clock support registered
368 22:23:56.686618 <6>[ 0.360647] EDAC MC: Ver: 3.0.0
369 22:23:56.692613 <6>[ 0.366470] FPGA manager framework
370 22:23:56.693474 <6>[ 0.367351] Advanced Linux Sound Architecture Driver Initialized.
371 22:23:56.702604 <6>[ 0.376621] vgaarb: loaded
372 22:23:56.706841 <6>[ 0.380642] clocksource: Switched to clocksource arch_sys_counter
373 22:23:56.708125 <5>[ 0.381970] VFS: Disk quotas dquot_6.6.0
374 22:23:56.708525 <6>[ 0.382286] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
375 22:23:56.712003 <6>[ 0.386035] pnp: PnP ACPI: disabled
376 22:23:56.730198 <6>[ 0.404220] NET: Registered PF_INET protocol family
377 22:23:56.732707 <6>[ 0.406547] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
378 22:23:56.737708 <6>[ 0.411557] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
379 22:23:56.737901 <6>[ 0.411844] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
380 22:23:56.738466 <6>[ 0.412192] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
381 22:23:56.738822 <6>[ 0.412773] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
382 22:23:56.739548 <6>[ 0.413450] TCP: Hash tables configured (established 8192 bind 8192)
383 22:23:56.740741 <6>[ 0.414624] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
384 22:23:56.741096 <6>[ 0.415090] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
385 22:23:56.742606 <6>[ 0.416490] NET: Registered PF_UNIX/PF_LOCAL protocol family
386 22:23:56.745120 <6>[ 0.418846] RPC: Registered named UNIX socket transport module.
387 22:23:56.745333 <6>[ 0.419071] RPC: Registered udp transport module.
388 22:23:56.745510 <6>[ 0.419229] RPC: Registered tcp transport module.
389 22:23:56.745674 <6>[ 0.419387] RPC: Registered tcp NFSv4.1 backchannel transport module.
390 22:23:56.745826 <6>[ 0.419695] PCI: CLS 0 bytes, default 64
391 22:23:56.750185 <6>[ 0.424051] Unpacking initramfs...
392 22:23:56.760522 <6>[ 0.434337] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
393 22:23:56.761345 <6>[ 0.435216] kvm [1]: HYP mode not available
394 22:23:56.768862 <5>[ 0.442873] Initialise system trusted keyrings
395 22:23:56.775066 <6>[ 0.448880] workingset: timestamp_bits=42 max_order=18 bucket_order=0
396 22:23:56.811235 <6>[ 0.485190] squashfs: version 4.0 (2009/01/31) Phillip Lougher
397 22:23:56.815995 <5>[ 0.489782] NFS: Registering the id_resolver key type
398 22:23:56.816442 <5>[ 0.490310] Key type id_resolver registered
399 22:23:56.816551 <5>[ 0.490505] Key type id_legacy registered
400 22:23:56.817222 <6>[ 0.491127] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
401 22:23:56.817581 <6>[ 0.491376] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
402 22:23:56.822701 <6>[ 0.496547] 9p: Installing v9fs 9p2000 file system support
403 22:23:56.887144 <5>[ 0.561123] Key type asymmetric registered
404 22:23:56.887591 <5>[ 0.561309] Asymmetric key parser 'x509' registered
405 22:23:56.887939 <6>[ 0.561815] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
406 22:23:56.888287 <6>[ 0.562185] io scheduler mq-deadline registered
407 22:23:56.888639 <6>[ 0.562435] io scheduler kyber registered
408 22:23:56.963379 <6>[ 0.637105] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
409 22:23:56.979493 <6>[ 0.653415] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
410 22:23:56.980608 <6>[ 0.654321] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
411 22:23:56.981326 <6>[ 0.655151] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
412 22:23:56.981832 <6>[ 0.655545] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
413 22:23:56.982264 <4>[ 0.656223] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
414 22:23:56.987401 <6>[ 0.660957] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
415 22:23:56.988683 <6>[ 0.662514] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
416 22:23:56.988867 <6>[ 0.662927] pci_bus 0000:00: root bus resource [bus 00-ff]
417 22:23:56.989266 <6>[ 0.663141] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
418 22:23:56.989420 <6>[ 0.663350] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
419 22:23:56.989566 <6>[ 0.663528] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
420 22:23:56.995085 <6>[ 0.669126] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
421 22:23:57.002814 <6>[ 0.676641] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
422 22:23:57.003011 <6>[ 0.677016] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
423 22:23:57.003230 <6>[ 0.677208] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
424 22:23:57.003681 <6>[ 0.677458] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
425 22:23:57.003882 <6>[ 0.677770] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
426 22:23:57.004395 <6>[ 0.678423] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
427 22:23:57.004782 <6>[ 0.678618] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
428 22:23:57.004912 <6>[ 0.678796] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
429 22:23:57.005059 <6>[ 0.679023] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
430 22:23:57.012037 <6>[ 0.685914] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
431 22:23:57.012438 <6>[ 0.686406] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
432 22:23:57.012827 <6>[ 0.686740] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
433 22:23:57.013001 <6>[ 0.687009] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
434 22:23:57.013420 <6>[ 0.687271] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
435 22:23:57.013567 <6>[ 0.687507] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
436 22:23:57.013728 <6>[ 0.687728] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
437 22:23:57.031488 <6>[ 0.705540] EINJ: ACPI disabled.
438 22:23:57.127985 <6>[ 0.801770] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
439 22:23:57.135453 <6>[ 0.809351] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
440 22:23:57.183924 <6>[ 0.857773] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
441 22:23:57.200499 <6>[ 0.874540] SuperH (H)SCI(F) driver initialized
442 22:23:57.201994 <6>[ 0.876047] msm_serial: driver initialized
443 22:23:57.239792 <4>[ 0.913762] cacheinfo: Unable to detect cache hierarchy for CPU 0
444 22:23:57.268262 <6>[ 0.942241] loop: module loaded
445 22:23:57.269256 <6>[ 0.943084] virtio_blk virtio1: 1/0/0 default/read/poll queues
446 22:23:57.286174 <5>[ 0.959911] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
447 22:23:57.316981 <6>[ 0.990902] megasas: 07.719.03.00-rc1
448 22:23:57.335771 <5>[ 1.009412] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
449 22:23:57.337295 <6>[ 1.011008] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
450 22:23:57.337702 <6>[ 1.011694] Intel/Sharp Extended Query Table at 0x0031
451 22:23:57.342542 <6>[ 1.016525] Using buffer write method
452 22:23:57.343210 <7>[ 1.016945] erase region 0: offset=0x0,size=0x40000,blocks=256
453 22:23:57.343565 <5>[ 1.017337] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
454 22:23:57.344324 <6>[ 1.018016] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
455 22:23:57.344447 <6>[ 1.018304] Intel/Sharp Extended Query Table at 0x0031
456 22:23:57.345020 <6>[ 1.018892] Using buffer write method
457 22:23:57.345121 <7>[ 1.019037] erase region 0: offset=0x0,size=0x40000,blocks=256
458 22:23:57.345248 <5>[ 1.019250] Concatenating MTD devices:
459 22:23:57.345368 <5>[ 1.019370] (0): \"0.flash\"
460 22:23:57.345482 <5>[ 1.019470] (1): \"0.flash\"
461 22:23:57.345584 <5>[ 1.019576] into device \"0.flash\"
462 22:24:02.080387 <6>[ 5.754231] Freeing initrd memory: 86888K
463 22:24:02.195141 <6>[ 5.869049] tun: Universal TUN/TAP device driver, 1.6
464 22:24:02.204805 <6>[ 5.878853] thunder_xcv, ver 1.0
465 22:24:02.205182 <6>[ 5.879080] thunder_bgx, ver 1.0
466 22:24:02.205285 <6>[ 5.879285] nicpf, ver 1.0
467 22:24:02.208845 <6>[ 5.882670] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
468 22:24:02.208973 <6>[ 5.882877] hns3: Copyright (c) 2017 Huawei Corporation.
469 22:24:02.209313 <6>[ 5.883311] hclge is initializing
470 22:24:02.209689 <6>[ 5.883560] e1000: Intel(R) PRO/1000 Network Driver
471 22:24:02.209812 <6>[ 5.883730] e1000: Copyright (c) 1999-2006 Intel Corporation.
472 22:24:02.210144 <6>[ 5.884063] e1000e: Intel(R) PRO/1000 Network Driver
473 22:24:02.210259 <6>[ 5.884202] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
474 22:24:02.210964 <6>[ 5.884857] igb: Intel(R) Gigabit Ethernet Network Driver
475 22:24:02.211317 <6>[ 5.885122] igb: Copyright (c) 2007-2014 Intel Corporation.
476 22:24:02.211679 <6>[ 5.885495] igbvf: Intel(R) Gigabit Virtual Function Network Driver
477 22:24:02.212031 <6>[ 5.885805] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
478 22:24:02.213080 <6>[ 5.887137] sky2: driver version 1.30
479 22:24:02.216732 <6>[ 5.890568] VFIO - User Level meta-driver version: 0.3
480 22:24:02.227765 <6>[ 5.901539] usbcore: registered new interface driver usb-storage
481 22:24:02.228944 <6>[ 5.902735] usbcore: registered new device driver onboard-usb-hub
482 22:24:02.239745 <6>[ 5.913528] rtc-pl031 9010000.pl031: registered as rtc0
483 22:24:02.240836 <6>[ 5.914396] rtc-pl031 9010000.pl031: setting system clock to 2023-06-05T22:24:02 UTC (1686003842)
484 22:24:02.243320 <6>[ 5.917123] i2c_dev: i2c /dev entries driver
485 22:24:02.261468 <6>[ 5.935425] sdhci: Secure Digital Host Controller Interface driver
486 22:24:02.262063 <6>[ 5.935581] sdhci: Copyright(c) Pierre Ossman
487 22:24:02.263836 <6>[ 5.937634] Synopsys Designware Multimedia Card Interface Driver
488 22:24:02.266350 <6>[ 5.940193] sdhci-pltfm: SDHCI platform and OF driver helper
489 22:24:02.272077 <6>[ 5.945863] ledtrig-cpu: registered to indicate activity on CPUs
490 22:24:02.277823 <6>[ 5.951679] usbcore: registered new interface driver usbhid
491 22:24:02.277985 <6>[ 5.951846] usbhid: USB HID core driver
492 22:24:02.303609 <6>[ 5.977507] NET: Registered PF_PACKET protocol family
493 22:24:02.304884 <6>[ 5.978720] 9pnet: Installing 9P2000 support
494 22:24:02.305274 <5>[ 5.979126] Key type dns_resolver registered
495 22:24:02.306810 <6>[ 5.980621] registered taskstats version 1
496 22:24:02.307034 <5>[ 5.981011] Loading compiled-in X.509 certificates
497 22:24:02.328884 <6>[ 6.002511] input: gpio-keys as /devices/platform/gpio-keys/input/input0
498 22:24:02.335849 <6>[ 6.009868] ALSA device list:
499 22:24:02.336349 <6>[ 6.010089] No soundcards found.
500 22:24:02.338829 <6>[ 6.012862] uart-pl011 9000000.pl011: no DMA platform data
501 22:24:02.398922 <6>[ 6.072836] Freeing unused kernel memory: 8384K
502 22:24:02.399787 <6>[ 6.073859] Run /init as init process
503 22:24:02.400187 <7>[ 6.074008] with arguments:
504 22:24:02.400324 <7>[ 6.074137] /init
505 22:24:02.400423 <7>[ 6.074240] verbose
506 22:24:02.400532 <7>[ 6.074339] with environment:
507 22:24:02.400627 <7>[ 6.074451] HOME=/
508 22:24:02.400717 <7>[ 6.074526] TERM=linux
509 22:24:02.535254 <30>[ 6.208531] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
510 22:24:02.536161 <31>[ 6.209960] systemd[1]: No virtualization found in DMI
511 22:24:02.537201 <31>[ 6.210992] systemd[1]: UML virtualization not found in /proc/cpuinfo.
512 22:24:02.537415 <31>[ 6.211321] systemd[1]: No virtualization found in CPUID
513 22:24:02.537869 <31>[ 6.211631] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
514 22:24:02.539362 <31>[ 6.213080] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
515 22:24:02.539563 <31>[ 6.213460] systemd[1]: Found VM virtualization qemu
516 22:24:02.539746 <30>[ 6.213703] systemd[1]: Detected virtualization qemu.
517 22:24:02.540148 <30>[ 6.214053] systemd[1]: Detected architecture arm64.
518 22:24:02.540579 <31>[ 6.214426] systemd[1]: Detected initialized system, this is not the first boot.
519 22:24:02.544607
520 22:24:02.545051 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
521 22:24:02.545194
522 22:24:02.547113 <30>[ 6.220883] systemd[1]: Set hostname to <debian-bullseye-arm64>.
523 22:24:02.565867 <31>[ 6.239590] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
524 22:24:02.567189 <31>[ 6.241024] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
525 22:24:02.567543 <31>[ 6.241562] systemd[1]: Successfully brought loopback interface up
526 22:24:02.572172 <31>[ 6.246217] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
527 22:24:02.584304 <31>[ 6.258281] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
528 22:24:02.584683 <31>[ 6.258543] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
529 22:24:02.629244 <31>[ 6.303117] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
530 22:24:02.630979 <31>[ 6.304841] systemd[1]: Controller 'cpu' supported: yes
531 22:24:02.631112 <31>[ 6.305061] systemd[1]: Controller 'cpuacct' supported: no
532 22:24:02.631455 <31>[ 6.305262] systemd[1]: Controller 'cpuset' supported: yes
533 22:24:02.631574 <31>[ 6.305505] systemd[1]: Controller 'io' supported: yes
534 22:24:02.631693 <31>[ 6.305692] systemd[1]: Controller 'blkio' supported: no
535 22:24:02.632026 <31>[ 6.305921] systemd[1]: Controller 'memory' supported: yes
536 22:24:02.632380 <31>[ 6.306160] systemd[1]: Controller 'devices' supported: no
537 22:24:02.632482 <31>[ 6.306401] systemd[1]: Controller 'pids' supported: yes
538 22:24:02.632837 <31>[ 6.306586] systemd[1]: Controller 'bpf-firewall' supported: yes
539 22:24:02.632958 <31>[ 6.306872] systemd[1]: Controller 'bpf-devices' supported: yes
540 22:24:02.634377 <31>[ 6.308172] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
541 22:24:02.635105 <31>[ 6.308870] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
542 22:24:02.635703 <31>[ 6.309525] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
543 22:24:02.643324 <31>[ 6.317276] systemd[1]: Enabling (yes) showing of status (commandline).
544 22:24:02.651242 <31>[ 6.325199] systemd[1]: Successfully forked off '(sd-executor)' as PID 98.
545 22:24:02.661365 <31>[ 6.335071] systemd[98]: Successfully forked off '(direxec)' as PID 99.
546 22:24:02.663525 <31>[ 6.337342] systemd[98]: Successfully forked off '(direxec)' as PID 100.
547 22:24:02.665406 <31>[ 6.339224] systemd[98]: Successfully forked off '(direxec)' as PID 101.
548 22:24:02.674595 <31>[ 6.348400] systemd[98]: Successfully forked off '(direxec)' as PID 102.
549 22:24:02.676549 <31>[ 6.350360] systemd[98]: Successfully forked off '(direxec)' as PID 103.
550 22:24:02.841519 <31>[ 6.515370] systemd-bless-boot-generator[99]: Skipping generator, not an EFI boot.
551 22:24:02.847089 <31>[ 6.520834] systemd-getty-generator[101]: Automatically adding serial getty for /dev/ttyAMA0.
552 22:24:02.848650 <31>[ 6.522424] systemd-getty-generator[101]: SELinux enabled state cached to: disabled
553 22:24:02.856039 <31>[ 6.529836] systemd-fstab-generator[100]: Parsing /etc/fstab...
554 22:24:02.858237 <31>[ 6.531848] systemd-fstab-generator[100]: Found entry what=/dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
555 22:24:02.873175 <31>[ 6.546830] systemd-fstab-generator[100]: Checking was requested for /dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76, but fsck.ext4 does not exist.
556 22:24:02.876008 <31>[ 6.549653] systemd[98]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
557 22:24:02.880427 <31>[ 6.554209] systemd-fstab-generator[100]: SELinux enabled state cached to: disabled
558 22:24:02.883026 <31>[ 6.556849] systemd[98]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
559 22:24:02.886412 <31>[ 6.560198] systemd[98]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
560 22:24:02.887601 <31>[ 6.561375] systemd[98]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
561 22:24:02.887855 <31>[ 6.561780] systemd[98]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
562 22:24:02.891320 <31>[ 6.565068] systemd[1]: (sd-executor) succeeded.
563 22:24:02.893034 <31>[ 6.566716] systemd[1]: Looking for unit files in (higher priority first):
564 22:24:02.893276 <31>[ 6.566975] systemd[1]: /etc/systemd/system.control
565 22:24:02.893499 <31>[ 6.567150] systemd[1]: /run/systemd/system.control
566 22:24:02.893689 <31>[ 6.567316] systemd[1]: /run/systemd/transient
567 22:24:02.893918 <31>[ 6.567510] systemd[1]: /run/systemd/generator.early
568 22:24:02.894164 <31>[ 6.567684] systemd[1]: /etc/systemd/system
569 22:24:02.894367 <31>[ 6.567824] systemd[1]: /etc/systemd/system.attached
570 22:24:02.894526 <31>[ 6.567985] systemd[1]: /run/systemd/system
571 22:24:02.894673 <31>[ 6.568151] systemd[1]: /run/systemd/system.attached
572 22:24:02.894830 <31>[ 6.568317] systemd[1]: /run/systemd/generator
573 22:24:02.895074 <31>[ 6.569088] systemd[1]: /usr/local/lib/systemd/system
574 22:24:02.895271 <31>[ 6.569324] systemd[1]: /lib/systemd/system
575 22:24:02.895495 <31>[ 6.569510] systemd[1]: /usr/lib/systemd/system
576 22:24:02.895720 <31>[ 6.569718] systemd[1]: /run/systemd/generator.late
577 22:24:02.940447 <31>[ 6.614344] systemd[1]: Modification times have changed, need to update cache.
578 22:24:02.942426 <31>[ 6.615995] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
579 22:24:02.943995 <31>[ 6.617805] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
580 22:24:02.944952 <31>[ 6.618636] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
581 22:24:02.945703 <31>[ 6.619581] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
582 22:24:02.946953 <31>[ 6.620785] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
583 22:24:02.947411 <31>[ 6.621167] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
584 22:24:02.947752 <31>[ 6.621549] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
585 22:24:02.948087 <31>[ 6.621926] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
586 22:24:02.948470 <31>[ 6.622189] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
587 22:24:02.948583 <31>[ 6.622476] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
588 22:24:02.949148 <31>[ 6.622927] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
589 22:24:02.949830 <31>[ 6.623672] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
590 22:24:02.950156 <31>[ 6.624044] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
591 22:24:02.950938 <31>[ 6.624800] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
592 22:24:02.951600 <31>[ 6.625486] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
593 22:24:02.951928 <31>[ 6.625815] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
594 22:24:02.952276 <31>[ 6.626151] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
595 22:24:02.952648 <31>[ 6.626482] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
596 22:24:02.953044 <31>[ 6.626835] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
597 22:24:02.953690 <31>[ 6.627425] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
598 22:24:02.954025 <31>[ 6.627785] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp.service
599 22:24:02.954865 <31>[ 6.628747] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
600 22:24:02.955222 <31>[ 6.629115] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
601 22:24:02.955562 <31>[ 6.629451] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
602 22:24:02.955906 <31>[ 6.629761] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
603 22:24:02.956260 <31>[ 6.630104] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
604 22:24:02.956617 <31>[ 6.630429] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
605 22:24:02.957210 <31>[ 6.631107] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
606 22:24:02.958150 <31>[ 6.631734] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
607 22:24:02.958285 <31>[ 6.632145] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
608 22:24:02.958904 <31>[ 6.632688] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
609 22:24:02.959496 <31>[ 6.633211] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
610 22:24:02.959611 <31>[ 6.633548] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
611 22:24:02.959946 <31>[ 6.633865] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
612 22:24:02.960274 <31>[ 6.634174] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
613 22:24:02.960632 <31>[ 6.634517] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
614 22:24:02.960981 <31>[ 6.634853] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
615 22:24:02.961296 <31>[ 6.635196] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-parse-etc.service
616 22:24:02.961611 <31>[ 6.635490] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
617 22:24:02.961940 <31>[ 6.635742] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
618 22:24:02.962045 <31>[ 6.636021] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
619 22:24:02.962358 <31>[ 6.636275] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
620 22:24:02.963132 <31>[ 6.636901] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
621 22:24:02.963264 <31>[ 6.637185] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
622 22:24:02.963620 <31>[ 6.637507] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
623 22:24:02.964538 <31>[ 6.638271] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
624 22:24:02.964670 <31>[ 6.638572] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
625 22:24:02.965536 <31>[ 6.639369] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel2.target → multi-user.target
626 22:24:02.965926 <31>[ 6.639669] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
627 22:24:02.966315 <31>[ 6.640129] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
628 22:24:02.966952 <31>[ 6.640814] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
629 22:24:02.967322 <31>[ 6.641141] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
630 22:24:02.968058 <31>[ 6.641920] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
631 22:24:02.968427 <31>[ 6.642193] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
632 22:24:02.968791 <31>[ 6.642523] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
633 22:24:02.969127 <31>[ 6.642886] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
634 22:24:02.969666 <31>[ 6.643464] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
635 22:24:02.970012 <31>[ 6.643754] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
636 22:24:02.970112 <31>[ 6.644076] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
637 22:24:02.971106 <31>[ 6.644941] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
638 22:24:02.971444 <31>[ 6.645299] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
639 22:24:02.972189 <31>[ 6.645634] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
640 22:24:02.972274 <31>[ 6.645909] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
641 22:24:02.972616 <31>[ 6.646199] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
642 22:24:02.972734 <31>[ 6.646496] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
643 22:24:02.972876 <31>[ 6.646825] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
644 22:24:02.973228 <31>[ 6.647121] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
645 22:24:02.973617 <31>[ 6.647473] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
646 22:24:02.974009 <31>[ 6.647817] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
647 22:24:02.974436 <31>[ 6.648229] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
648 22:24:02.975166 <31>[ 6.649032] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
649 22:24:02.975524 <31>[ 6.649428] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
650 22:24:02.975846 <31>[ 6.649815] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
651 22:24:02.976175 <31>[ 6.650132] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
652 22:24:02.976834 <31>[ 6.650745] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
653 22:24:02.977173 <31>[ 6.651058] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
654 22:24:02.977511 <31>[ 6.651386] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
655 22:24:02.978253 <31>[ 6.652061] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
656 22:24:02.978862 <31>[ 6.652739] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
657 22:24:02.979215 <31>[ 6.653104] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
658 22:24:02.979598 <31>[ 6.653434] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
659 22:24:02.980102 <31>[ 6.654035] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
660 22:24:02.981084 <31>[ 6.654689] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.locale1.service → systemd-localed.service
661 22:24:02.981211 <31>[ 6.655099] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
662 22:24:02.981591 <31>[ 6.655394] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
663 22:24:02.982013 <31>[ 6.655731] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
664 22:24:02.982139 <31>[ 6.656048] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
665 22:24:02.982747 <31>[ 6.656586] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
666 22:24:02.983216 <31>[ 6.656917] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
667 22:24:02.983345 <31>[ 6.657232] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
668 22:24:02.983723 <31>[ 6.657522] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
669 22:24:02.984109 <31>[ 6.657864] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
670 22:24:02.984232 <31>[ 6.658193] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
671 22:24:02.984599 <31>[ 6.658497] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
672 22:24:02.985056 <31>[ 6.658813] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
673 22:24:02.985258 <31>[ 6.659082] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
674 22:24:02.985471 <31>[ 6.659403] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
675 22:24:02.986146 <31>[ 6.659871] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-varlink@.socket
676 22:24:02.986531 <31>[ 6.660182] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
677 22:24:02.987150 <31>[ 6.660943] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
678 22:24:02.988061 <31>[ 6.661874] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.hostname1.service → systemd-hostnamed.service
679 22:24:02.988451 <31>[ 6.662234] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
680 22:24:02.988847 <31>[ 6.662545] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
681 22:24:02.988973 <31>[ 6.662861] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
682 22:24:02.989380 <31>[ 6.663208] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
683 22:24:02.989863 <31>[ 6.663598] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
684 22:24:02.990095 <31>[ 6.663917] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
685 22:24:02.990356 <31>[ 6.664251] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
686 22:24:02.991548 <31>[ 6.664913] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-bless-boot.service
687 22:24:02.991750 <31>[ 6.665299] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
688 22:24:02.992005 <31>[ 6.665630] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
689 22:24:02.992202 <31>[ 6.665941] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
690 22:24:02.992691 <31>[ 6.666415] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
691 22:24:02.992898 <31>[ 6.666723] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
692 22:24:02.993186 <31>[ 6.667025] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
693 22:24:02.993438 <31>[ 6.667344] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
694 22:24:02.993923 <31>[ 6.667697] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
695 22:24:02.994482 <31>[ 6.668072] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.service
696 22:24:02.995054 <31>[ 6.668683] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-cleanup.service
697 22:24:02.995288 <31>[ 6.669146] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
698 22:24:02.995883 <31>[ 6.669455] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
699 22:24:02.996104 <31>[ 6.669807] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
700 22:24:02.996314 <31>[ 6.670178] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
701 22:24:02.997069 <31>[ 6.670572] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
702 22:24:02.997268 <31>[ 6.670962] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
703 22:24:02.997453 <31>[ 6.671325] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
704 22:24:02.998008 <31>[ 6.671636] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
705 22:24:02.998235 <31>[ 6.671958] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
706 22:24:02.998412 <31>[ 6.672295] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
707 22:24:02.998860 <31>[ 6.672724] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
708 22:24:02.999352 <31>[ 6.673198] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
709 22:24:02.999575 <31>[ 6.673537] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
710 22:24:03.000511 <31>[ 6.674205] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
711 22:24:03.000743 <31>[ 6.674579] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
712 22:24:03.001028 <31>[ 6.674881] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate.service
713 22:24:03.001539 <31>[ 6.675200] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
714 22:24:03.001658 <31>[ 6.675494] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
715 22:24:03.002030 <31>[ 6.675756] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
716 22:24:03.002154 <31>[ 6.676053] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
717 22:24:03.002601 <31>[ 6.676542] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
718 22:24:03.002969 <31>[ 6.676870] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
719 22:24:03.003423 <31>[ 6.677127] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
720 22:24:03.003585 <31>[ 6.677410] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
721 22:24:03.004083 <31>[ 6.677850] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
722 22:24:03.004688 <31>[ 6.678319] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
723 22:24:03.004888 <31>[ 6.678641] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
724 22:24:03.005114 <31>[ 6.678941] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
725 22:24:03.005355 <31>[ 6.679298] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
726 22:24:03.005779 <31>[ 6.679619] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
727 22:24:03.005986 <31>[ 6.679922] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
728 22:24:03.006507 <31>[ 6.680217] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
729 22:24:03.436997 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
730 22:24:03.442732 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
731 22:24:03.447446 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
732 22:24:03.452486 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
733 22:24:03.456612 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
734 22:24:03.458159 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
735 22:24:03.460882 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
736 22:24:03.462006 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
737 22:24:03.463217 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
738 22:24:03.464080 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
739 22:24:03.464970 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
740 22:24:03.468885 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
741 22:24:03.473250 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
742 22:24:03.476535 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
743 22:24:03.479521 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
744 22:24:03.482375 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
745 22:24:03.485628 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
746 22:24:03.487995 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
747 22:24:03.516703 Mounting [0;1;39mHuge Pages File System[0m...
748 22:24:03.552184 Mounting [0;1;39mPOSIX Message Queue File System[0m...
749 22:24:03.594086 Mounting [0;1;39mKernel Debug File System[0m...
750 22:24:03.649378 Starting [0;1;39mLoad Kernel Module configfs[0m...
751 22:24:03.684396 Starting [0;1;39mLoad Kernel Module drm[0m...
752 22:24:03.752352 Starting [0;1;39mJournal Service[0m...
753 22:24:03.800500 Starting [0;1;39mLoad Kernel Modules[0m...
754 22:24:03.840667 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
755 22:24:03.904258 Starting [0;1;39mColdplug All udev Devices[0m...
756 22:24:04.015567 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
757 22:24:04.021199 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
758 22:24:04.037276 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
759 22:24:04.089682 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
760 22:24:04.147490 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
761 22:24:04.167410 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
762 22:24:04.248021 Mounting [0;1;39mKernel Configuration File System[0m...
763 22:24:04.368071 Starting [0;1;39mApply Kernel Variables[0m...
764 22:24:04.441156 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
765 22:24:04.493335 <47>[ 8.166923] systemd-journald[109]: SELinux enabled state cached to: disabled
766 22:24:04.503295 <47>[ 8.176963] systemd-journald[109]: Auditing in kernel turned off.
767 22:24:04.523458 <47>[ 8.197041] systemd-journald[109]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
768 22:24:04.592820 <47>[ 8.266342] systemd-journald[109]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
769 22:24:04.599831 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
770 22:24:04.603274 See 'systemctl status systemd-remount-fs.service' for details.
771 22:24:04.607931 <47>[ 8.281717] systemd-journald[109]: Fixed min_use=3.8M max_use=19.3M max_size=2.4M min_size=512.0K keep_free=9.6M n_max_files=100
772 22:24:04.609798 <47>[ 8.283606] systemd-journald[109]: Reserving 333 entries in field hash table.
773 22:24:04.645989 <47>[ 8.319579] systemd-journald[109]: Reserving 4408 entries in data hash table.
774 22:24:04.649044 Starting [0;1;39mLoad/Save Random Seed[0m...
775 22:24:04.656235 <47>[ 8.329959] systemd-journald[109]: Vacuuming...
776 22:24:04.657046 <47>[ 8.330832] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
777 22:24:04.657644 <47>[ 8.331540] systemd-journald[109]: Flushing /dev/kmsg...
778 22:24:04.716644 Starting [0;1;39mCreate System Users[0m...
779 22:24:04.764536 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
780 22:24:04.896569 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
781 22:24:05.087342 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
782 22:24:05.124676 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
783 22:24:05.293048 <47>[ 8.966623] systemd-journald[109]: systemd-journald running as PID 109 for the system.
784 22:24:05.307594 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
785 22:24:05.311062 <47>[ 8.984755] systemd-journald[109]: Sent READY=1 notification.
786 22:24:05.311344 <47>[ 8.985271] systemd-journald[109]: Sent WATCHDOG=1 notification.
787 22:24:05.346254 <47>[ 9.019762] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
788 22:24:05.364179 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
789 22:24:05.374220 <47>[ 9.047880] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
790 22:24:05.393801 <47>[ 9.067645] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
791 22:24:05.416826 <47>[ 9.090505] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
792 22:24:05.433988 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
793 22:24:05.436585 <47>[ 9.110352] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
794 22:24:05.441437 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
795 22:24:05.452639 <47>[ 9.126325] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
796 22:24:05.455989 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
797 22:24:05.472229 <47>[ 9.145883] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
798 22:24:05.499507 <47>[ 9.173380] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
799 22:24:05.502025 <47>[ 9.175834] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
800 22:24:05.517195 <47>[ 9.190842] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
801 22:24:05.531597 <47>[ 9.205469] systemd-journald[109]: n/a: New incoming connection.
802 22:24:05.532114 <47>[ 9.206080] systemd-journald[109]: varlink-18: varlink: setting state idle-server
803 22:24:05.533557 <47>[ 9.207366] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
804 22:24:05.548000 <47>[ 9.221633] systemd-journald[109]: varlink-18: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
805 22:24:05.549934 <47>[ 9.223700] systemd-journald[109]: varlink-18: varlink: changing state idle-server → processing-method
806 22:24:05.550104 <46>[ 9.224118] systemd-journald[109]: Received client request to flush runtime journal.
807 22:24:05.557074 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
808 22:24:05.575401 <47>[ 9.248997] systemd-journald[109]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
809 22:24:05.575931 <47>[ 9.249968] systemd-journald[109]: Vacuuming...
810 22:24:05.576911 <47>[ 9.250567] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
811 22:24:05.578344 <47>[ 9.252165] systemd-journald[109]: varlink-18: Sending message: {\"parameters\":{}}
812 22:24:05.588231 <47>[ 9.262075] systemd-journald[109]: varlink-18: varlink: changing state processing-method → processed-method
813 22:24:05.588759 <47>[ 9.262579] systemd-journald[109]: varlink-18: varlink: changing state processed-method → idle-server
814 22:24:05.595580 <47>[ 9.269263] systemd-journald[109]: varlink-18: varlink: changing state idle-server → pending-disconnect
815 22:24:05.596073 <47>[ 9.269750] systemd-journald[109]: varlink-18: varlink: changing state pending-disconnect → processing-disconnect
816 22:24:05.596441 <47>[ 9.270143] systemd-journald[109]: varlink-18: varlink: changing state processing-disconnect → disconnected
817 22:24:05.622145 <47>[ 9.295972] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
818 22:24:05.636137 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
819 22:24:05.641030 <47>[ 9.314811] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
820 22:24:05.657072 <47>[ 9.330680] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
821 22:24:05.672626 <47>[ 9.346263] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
822 22:24:05.696274 Starting [0;1;39mCreate Volatile Files and Directories[0m...
823 22:24:05.709762 <47>[ 9.383345] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
824 22:24:06.186484 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
825 22:24:06.276988 Starting [0;1;39mNetwork Service[0m...
826 22:24:06.312909 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
827 22:24:06.317005 <47>[ 9.990751] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
828 22:24:06.420366 Starting [0;1;39mNetwork Time Synchronization[0m...
829 22:24:06.433459 <47>[ 10.107070] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
830 22:24:06.492516 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
831 22:24:06.501151 <47>[ 10.175062] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
832 22:24:06.947255 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
833 22:24:08.071694 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
834 22:24:08.140108 <47>[ 11.813716] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3308 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
835 22:24:08.140642 <47>[ 11.814339] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
836 22:24:08.140772 <47>[ 11.814783] systemd-journald[109]: Rotating...
837 22:24:08.142015 <47>[ 11.815848] systemd-journald[109]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
838 22:24:08.155796 <47>[ 11.829502] systemd-journald[109]: Reserving 333 entries in field hash table.
839 22:24:08.188948 Starting [0;1;39mNetwork Name Resolution[0m...
840 22:24:08.213130 <47>[ 11.887052] systemd-journald[109]: Reserving 4408 entries in data hash table.
841 22:24:08.232378 <47>[ 11.906270] systemd-journald[109]: Vacuuming...
842 22:24:08.234397 <47>[ 11.908157] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
843 22:24:08.277607 <47>[ 11.951462] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
844 22:24:08.709949 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
845 22:24:08.712623 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
846 22:24:08.723687 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
847 22:24:09.158900 <47>[ 12.832722] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
848 22:24:10.413796 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
849 22:24:10.427283 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
850 22:24:10.453097 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
851 22:24:10.469506 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
852 22:24:10.476789 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
853 22:24:10.483363 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
854 22:24:10.512728 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
855 22:24:10.513759 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
856 22:24:10.520286 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
857 22:24:10.597531 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
858 22:24:10.609196 <47>[ 14.283108] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
859 22:24:10.759913 <47>[ 14.433744] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
860 22:24:10.761169 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
861 22:24:10.952283 Starting [0;1;39mUser Login Management[0m...
862 22:24:10.966306 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
863 22:24:10.969516 <47>[ 14.643187] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
864 22:24:10.990038 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
865 22:24:11.007461 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
866 22:24:11.087976 Starting [0;1;39mPermit User Sessions[0m...
867 22:24:11.093180 <47>[ 14.766938] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
868 22:24:11.379967 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
869 22:24:11.473420 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
870 22:24:11.709228 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
871 22:24:12.117382 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
872 22:24:14.165401 [[0m[0;31m* [0m] A start job is running for /dev/ttyAMA0 (10s / 1min 30s)
873 22:24:14.491527 M[K[[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
874 22:24:14.581294 [K[[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
875 22:24:14.603389 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
876 22:24:14.615861 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
877 22:24:14.629628 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
878 22:24:14.677269 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
879 22:24:14.682198 <47>[ 18.355937] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
880 22:24:14.890929 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
881 22:24:14.941006 <47>[ 18.614873] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
882 22:24:14.942000 <47>[ 18.615750] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
883 22:24:15.015343
884 22:24:15.015871 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
885 22:24:15.015981
886 22:24:15.016085 debian-bullseye-arm64 login: root (automatic login)
887 22:24:15.016423
888 22:24:15.098793 <6>[ 18.772673] virtio_net virtio0 enp0s1: renamed from eth0
889 22:24:15.269168 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Mon Jun 5 22:04:07 UTC 2023 aarch64
890 22:24:15.269810
891 22:24:15.270220 The programs included with the Debian GNU/Linux system are free software;
892 22:24:15.270394 the exact distribution terms for each program are described in the
893 22:24:15.274911 individual files in /usr/share/doc/*/copyright.
894 22:24:15.275214
895 22:24:15.275708 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
896 22:24:15.275859 permitted by applicable law.
897 22:24:15.886339 <47>[ 19.560144] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
898 22:24:15.943416 <47>[ 19.616965] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3307 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
899 22:24:15.943753 <47>[ 19.617525] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
900 22:24:15.943929 <47>[ 19.617851] systemd-journald[109]: Rotating...
901 22:24:15.945305 <47>[ 19.619306] systemd-journald[109]: Reserving 333 entries in field hash table.
902 22:24:15.974403 <47>[ 19.648236] systemd-journald[109]: Reserving 4408 entries in data hash table.
903 22:24:15.984338 <47>[ 19.658326] systemd-journald[109]: Vacuuming...
904 22:24:15.985817 <47>[ 19.659437] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
905 22:24:16.230158 <47>[ 19.903789] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
906 22:24:18.059168 <47>[ 21.732735] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
907 22:24:18.461183 Matched prompt #10: / #
909 22:24:18.461879 Setting prompt string to ['/ #']
910 22:24:18.462104 end: 2.2.1 login-action (duration 00:00:22) [common]
912 22:24:18.462580 end: 2.2 auto-login-action (duration 00:00:24) [common]
913 22:24:18.462785 start: 2.3 expect-shell-connection (timeout 00:04:34) [common]
914 22:24:18.462939 Setting prompt string to ['/ #']
915 22:24:18.463089 Forcing a shell prompt, looking for ['/ #']
917 22:24:18.513729 / #
918 22:24:18.514074 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
919 22:24:18.514300 Waiting using forced prompt support (timeout 00:02:30)
920 22:24:18.517244
921 22:24:18.527240 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
922 22:24:18.527491 start: 2.4 export-device-env (timeout 00:04:34) [common]
923 22:24:18.527677 end: 2.4 export-device-env (duration 00:00:00) [common]
924 22:24:18.527847 end: 2 boot-image-retry (duration 00:00:26) [common]
925 22:24:18.528016 start: 3 lava-test-retry (timeout 00:08:47) [common]
926 22:24:18.528178 start: 3.1 lava-test-shell (timeout 00:08:47) [common]
927 22:24:18.528319 Using namespace: common
929 22:24:18.629221 / # #
930 22:24:18.629548 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
931 22:24:18.630453 #
933 22:24:18.739728 / # mkdir /lava-566130
934 22:24:18.740514 mkdir /lava-566130
936 22:24:18.872670 / # mount /dev/disk/by-uuid/2a81c40c-dd54-4095-96dc-bb3f2ce960ec -t ext2 /lava-566130
937 22:24:18.873631 mount /dev/disk/by-uuid/2a81c40c-dd54-4095-96dc-bb3f2ce960ec -t ext2 /lava-566130
938 22:24:18.914503 <4>[ 22.588136] ext2 filesystem being mounted at /lava-566130 supports timestamps until 2038 (0x7fffffff)
940 22:24:19.058819 / # ls -la /lava-566130/bin/lava-test-runner
941 22:24:19.059713 ls -la /lava-566130/bin/lava-test-runner
942 22:24:19.100333 -rwxr-xr-x 1 root root 1039 Jun 5 22:23 /lava-566130/bin/lava-test-runner
943 22:24:19.113324 Using /lava-566130
945 22:24:19.214286 / # export SHELL=/bin/sh
946 22:24:19.215242 export SHELL=/bin/sh
948 22:24:19.328010 / # . /lava-566130/environment
949 22:24:19.328994 . /lava-566130/environment
951 22:24:19.441740 / # /lava-566130/bin/lava-test-runner /lava-566130/0
952 22:24:19.442044 Test shell timeout: 10s (minimum of the action and connection timeout)
953 22:24:19.442626 /lava-566130/bin/lava-test-runner /lava-566130/0
954 22:24:19.610236 + export TESTRUN_ID=0_timesync-off
955 22:24:19.611369 + cd /lava-566130/0/tests/0_timesync-off
956 22:24:19.614031 + cat uuid
957 22:24:19.622254 + UUID=566130_1.1.3.1
958 22:24:19.622528 + set +x
959 22:24:19.622709 <LAVA_SIGNAL_STARTRUN 0_timesync-off 566130_1.1.3.1>
960 22:24:19.623051 Received signal: <STARTRUN> 0_timesync-off 566130_1.1.3.1
961 22:24:19.623177 Starting test lava.0_timesync-off (566130_1.1.3.1)
962 22:24:19.623299 Skipping test definition patterns.
963 22:24:19.623435 + systemctl stop systemd-timesyncd
964 22:24:19.879248 + set +x
965 22:24:19.879779 <LAVA_SIGNAL_ENDRUN 0_timesync-off 566130_1.1.3.1>
966 22:24:19.880148 Received signal: <ENDRUN> 0_timesync-off 566130_1.1.3.1
967 22:24:19.880333 Ending use of test pattern.
968 22:24:19.880480 Ending test lava.0_timesync-off (566130_1.1.3.1), duration 0.26
970 22:24:19.927515 + export TESTRUN_ID=1_kselftest-arm64_qemu
971 22:24:19.927785 + cd /lava-566130/0/tests/1_kselftest-arm64_qemu
972 22:24:19.930394 + cat uuid
973 22:24:19.938781 + UUID=566130_1.1.3.5
974 22:24:19.939047 + set +x
975 22:24:19.939255 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 566130_1.1.3.5>
976 22:24:19.939398 + cd ./automated/linux/kselftest/
977 22:24:19.939764 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 566130_1.1.3.5
978 22:24:19.939927 Starting test lava.1_kselftest-arm64_qemu (566130_1.1.3.5)
979 22:24:19.940095 Skipping test definition patterns.
980 22:24:19.945941 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip-gitlab -e -p /opt/kselftests/mainline/ -n 1 -i 1
981 22:24:20.041804 INFO: install_deps skipped
982 22:24:20.074546 --2023-06-05 22:24:20-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
983 22:24:20.174387 Resolving storage.kernelci.org (storage.kernelci.org)... 52.250.1.28
984 22:24:20.386779 Connecting to storage.kernelci.org (storage.kernelci.org)|52.250.1.28|:80... connected.
985 22:24:20.575905 HTTP request sent, awaiting response... 200 OK
986 22:24:20.577613 Length: 2860080 (2.7M) [application/octet-stream]
987 22:24:20.578726 Saving to: 'kselftest.tar.xz'
988 22:24:20.579367
989 22:24:21.850281 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 148KB/s kselftest.tar.xz 7%[> ] 219.84K 320KB/s kselftest.tar.xz 32%[=====> ] 898.59K 865KB/s kselftest.tar.xz 100%[===================>] 2.73M 2.21MB/s in 1.2s
990 22:24:21.850529
991 22:24:21.855307 2023-06-05 22:24:22 (2.21 MB/s) - 'kselftest.tar.xz' saved [2860080/2860080]
992 22:24:21.855647
993 22:24:25.281165 skiplist:
994 22:24:25.281697 ========================================
995 22:24:25.281950 ========================================
996 22:24:25.343371 arm64:tags_test
997 22:24:25.343720 arm64:run_tags_test.sh
998 22:24:25.344108 arm64:fake_sigreturn_bad_magic
999 22:24:25.344308 arm64:fake_sigreturn_bad_size
1000 22:24:25.344489 arm64:fake_sigreturn_bad_size_for_magic0
1001 22:24:25.344662 arm64:fake_sigreturn_duplicated_fpsimd
1002 22:24:25.344819 arm64:fake_sigreturn_misaligned_sp
1003 22:24:25.345007 arm64:fake_sigreturn_missing_fpsimd
1004 22:24:25.345173 arm64:fake_sigreturn_sme_change_vl
1005 22:24:25.345343 arm64:fake_sigreturn_sve_change_vl
1006 22:24:25.345511 arm64:mangle_pstate_invalid_compat_toggle
1007 22:24:25.345767 arm64:mangle_pstate_invalid_daif_bits
1008 22:24:25.345979 arm64:mangle_pstate_invalid_mode_el1h
1009 22:24:25.346184 arm64:mangle_pstate_invalid_mode_el1t
1010 22:24:25.346392 arm64:mangle_pstate_invalid_mode_el2h
1011 22:24:25.346568 arm64:mangle_pstate_invalid_mode_el2t
1012 22:24:25.346736 arm64:mangle_pstate_invalid_mode_el3h
1013 22:24:25.346888 arm64:mangle_pstate_invalid_mode_el3t
1014 22:24:25.347012 arm64:sme_trap_no_sm
1015 22:24:25.347129 arm64:sme_trap_non_streaming
1016 22:24:25.347246 arm64:sme_trap_za
1017 22:24:25.347363 arm64:sme_vl
1018 22:24:25.347479 arm64:ssve_regs
1019 22:24:25.347596 arm64:sve_regs
1020 22:24:25.347712 arm64:sve_vl
1021 22:24:25.347830 arm64:za_no_regs
1022 22:24:25.347947 arm64:za_regs
1023 22:24:25.348062 arm64:pac
1024 22:24:25.348178 arm64:fp-stress
1025 22:24:25.348307 arm64:sve-ptrace
1026 22:24:25.348510 arm64:sve-probe-vls
1027 22:24:25.348666 arm64:vec-syscfg
1028 22:24:25.348786 arm64:za-fork
1029 22:24:25.348903 arm64:za-ptrace
1030 22:24:25.349018 arm64:check_buffer_fill
1031 22:24:25.349133 arm64:check_child_memory
1032 22:24:25.349249 arm64:check_gcr_el1_cswitch
1033 22:24:25.349365 arm64:check_ksm_options
1034 22:24:25.349480 arm64:check_mmap_options
1035 22:24:25.349596 arm64:check_prctl
1036 22:24:25.349785 arm64:check_tags_inclusion
1037 22:24:25.349982 arm64:check_user_mem
1038 22:24:25.350166 arm64:btitest
1039 22:24:25.350350 arm64:nobtitest
1040 22:24:25.350532 arm64:hwcap
1041 22:24:25.350714 arm64:ptrace
1042 22:24:25.350896 arm64:syscall-abi
1043 22:24:25.351082 arm64:tpidr2
1044 22:24:25.364542 ============== Tests to run ===============
1045 22:24:25.371518 arm64:tags_test
1046 22:24:25.371793 arm64:run_tags_test.sh
1047 22:24:25.371964 arm64:fake_sigreturn_bad_magic
1048 22:24:25.372153 arm64:fake_sigreturn_bad_size
1049 22:24:25.372383 arm64:fake_sigreturn_bad_size_for_magic0
1050 22:24:25.372591 arm64:fake_sigreturn_duplicated_fpsimd
1051 22:24:25.372793 arm64:fake_sigreturn_misaligned_sp
1052 22:24:25.372985 arm64:fake_sigreturn_missing_fpsimd
1053 22:24:25.373142 arm64:fake_sigreturn_sme_change_vl
1054 22:24:25.373287 arm64:fake_sigreturn_sve_change_vl
1055 22:24:25.373447 arm64:mangle_pstate_invalid_compat_toggle
1056 22:24:25.373633 arm64:mangle_pstate_invalid_daif_bits
1057 22:24:25.373853 arm64:mangle_pstate_invalid_mode_el1h
1058 22:24:25.374068 arm64:mangle_pstate_invalid_mode_el1t
1059 22:24:25.374228 arm64:mangle_pstate_invalid_mode_el2h
1060 22:24:25.374405 arm64:mangle_pstate_invalid_mode_el2t
1061 22:24:25.374554 arm64:mangle_pstate_invalid_mode_el3h
1062 22:24:25.374707 arm64:mangle_pstate_invalid_mode_el3t
1063 22:24:25.374892 arm64:sme_trap_no_sm
1064 22:24:25.375051 arm64:sme_trap_non_streaming
1065 22:24:25.375175 arm64:sme_trap_za
1066 22:24:25.375293 arm64:sme_vl
1067 22:24:25.375410 arm64:ssve_regs
1068 22:24:25.375528 arm64:sve_regs
1069 22:24:25.375644 arm64:sve_vl
1070 22:24:25.375800 arm64:za_no_regs
1071 22:24:25.375937 arm64:za_regs
1072 22:24:25.376056 arm64:pac
1073 22:24:25.376207 arm64:fp-stress
1074 22:24:25.376334 arm64:sve-ptrace
1075 22:24:25.376454 arm64:sve-probe-vls
1076 22:24:25.376575 arm64:vec-syscfg
1077 22:24:25.376695 arm64:za-fork
1078 22:24:25.376813 arm64:za-ptrace
1079 22:24:25.376930 arm64:check_buffer_fill
1080 22:24:25.377048 arm64:check_child_memory
1081 22:24:25.377166 arm64:check_gcr_el1_cswitch
1082 22:24:25.377285 arm64:check_ksm_options
1083 22:24:25.377404 arm64:check_mmap_options
1084 22:24:25.377552 arm64:check_prctl
1085 22:24:25.377725 arm64:check_tags_inclusion
1086 22:24:25.377850 arm64:check_user_mem
1087 22:24:25.377969 arm64:btitest
1088 22:24:25.378088 arm64:nobtitest
1089 22:24:25.378206 arm64:hwcap
1090 22:24:25.378325 arm64:ptrace
1091 22:24:25.378445 arm64:syscall-abi
1092 22:24:25.378564 arm64:tpidr2
1093 22:24:25.378750 ===========End Tests to run ===============
1094 22:24:26.466479 <12>[ 30.140350] kselftest: Running tests in arm64
1095 22:24:26.498523 TAP version 13
1096 22:24:26.517083 1..48
1097 22:24:26.573103 # selftests: arm64: tags_test
1098 22:24:26.633684 ok 1 selftests: arm64: tags_test
1099 22:24:26.687241 # selftests: arm64: run_tags_test.sh
1100 22:24:26.747375 # --------------------
1101 22:24:26.747654 # running tags test
1102 22:24:26.748064 # --------------------
1103 22:24:26.749736 # [PASS]
1104 22:24:26.756375 ok 2 selftests: arm64: run_tags_test.sh
1105 22:24:26.812247 # selftests: arm64: fake_sigreturn_bad_magic
1106 22:24:26.867446 # Registered handlers for all signals.
1107 22:24:26.867760 # Detected MINSTKSIGSZ:10000
1108 22:24:26.867913 # Testcase initialized.
1109 22:24:26.868264 # uc context validated.
1110 22:24:26.868441 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1111 22:24:26.868580 # Handled SIG_COPYCTX
1112 22:24:26.868708 # Available space:3536
1113 22:24:26.868827 # Using badly built context - ERR: BAD MAGIC !
1114 22:24:26.868945 # SIG_OK -- SP:0xFFFFDC022330 si_addr@:0xffffdc022330 si_code:2 token@:0xffffdc0210d0 offset:-4704
1115 22:24:26.869064 # ==>> completed. PASS(1)
1116 22:24:26.869209 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1117 22:24:26.869334 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDC0210D0
1118 22:24:26.878089 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1119 22:24:26.930580 # selftests: arm64: fake_sigreturn_bad_size
1120 22:24:26.984898 # Registered handlers for all signals.
1121 22:24:26.985065 # Detected MINSTKSIGSZ:10000
1122 22:24:26.985398 # Testcase initialized.
1123 22:24:26.985526 # uc context validated.
1124 22:24:26.985645 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1125 22:24:26.985783 # Handled SIG_COPYCTX
1126 22:24:26.985897 # Available space:3536
1127 22:24:26.986036 # uc context validated.
1128 22:24:26.986159 # Using badly built context - ERR: Bad size for esr_context
1129 22:24:26.986275 # SIG_OK -- SP:0xFFFFEBBDDE60 si_addr@:0xffffebbdde60 si_code:2 token@:0xffffebbdcc00 offset:-4704
1130 22:24:26.986391 # ==>> completed. PASS(1)
1131 22:24:26.986508 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1132 22:24:26.986646 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFEBBDCC00
1133 22:24:26.994164 ok 4 selftests: arm64: fake_sigreturn_bad_size
1134 22:24:27.046109 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1135 22:24:27.099603 # Registered handlers for all signals.
1136 22:24:27.101893 # Detected MINSTKSIGSZ:10000
1137 22:24:27.102102 # Testcase initialized.
1138 22:24:27.102290 # uc context validated.
1139 22:24:27.102906 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1140 22:24:27.103092 # Handled SIG_COPYCTX
1141 22:24:27.103250 # Available space:3536
1142 22:24:27.103400 # Using badly built context - ERR: Bad size for terminator
1143 22:24:27.103520 # SIG_OK -- SP:0xFFFFD93D5110 si_addr@:0xffffd93d5110 si_code:2 token@:0xffffd93d3eb0 offset:-4704
1144 22:24:27.103639 # ==>> completed. PASS(1)
1145 22:24:27.103765 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1146 22:24:27.103885 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD93D3EB0
1147 22:24:27.110234 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1148 22:24:27.161126 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1149 22:24:27.217380 # Registered handlers for all signals.
1150 22:24:27.217777 # Detected MINSTKSIGSZ:10000
1151 22:24:27.217891 # Testcase initialized.
1152 22:24:27.217984 # uc context validated.
1153 22:24:27.218062 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1154 22:24:27.218157 # Handled SIG_COPYCTX
1155 22:24:27.218237 # Available space:3536
1156 22:24:27.218314 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1157 22:24:27.218404 # SIG_OK -- SP:0xFFFFD3DEF080 si_addr@:0xffffd3def080 si_code:2 token@:0xffffd3dede20 offset:-4704
1158 22:24:27.218486 # ==>> completed. PASS(1)
1159 22:24:27.218575 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1160 22:24:27.218668 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD3DEDE20
1161 22:24:27.227694 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1162 22:24:27.280317 # selftests: arm64: fake_sigreturn_misaligned_sp
1163 22:24:27.333599 # Registered handlers for all signals.
1164 22:24:27.333965 # Detected MINSTKSIGSZ:10000
1165 22:24:27.334170 # Testcase initialized.
1166 22:24:27.334301 # uc context validated.
1167 22:24:27.334423 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1168 22:24:27.334541 # Handled SIG_COPYCTX
1169 22:24:27.334680 # SIG_OK -- SP:0xFFFFC5569903 si_addr@:0xffffc5569903 si_code:2 token@:0xffffc5569903 offset:0
1170 22:24:27.335868 # ==>> completed. PASS(1)
1171 22:24:27.336170 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1172 22:24:27.336273 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC5569903
1173 22:24:27.343319 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1174 22:24:27.393767 # selftests: arm64: fake_sigreturn_missing_fpsimd
1175 22:24:27.448421 # Registered handlers for all signals.
1176 22:24:27.448592 # Detected MINSTKSIGSZ:10000
1177 22:24:27.448679 # Testcase initialized.
1178 22:24:27.448983 # uc context validated.
1179 22:24:27.449077 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1180 22:24:27.449160 # Handled SIG_COPYCTX
1181 22:24:27.449240 # Mangling template header. Spare space:4096
1182 22:24:27.449321 # Using badly built context - ERR: Missing FPSIMD
1183 22:24:27.449417 # SIG_OK -- SP:0xFFFFEA53E210 si_addr@:0xffffea53e210 si_code:2 token@:0xffffea53cfb0 offset:-4704
1184 22:24:27.449505 # ==>> completed. PASS(1)
1185 22:24:27.449584 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1186 22:24:27.449686 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFEA53CFB0
1187 22:24:27.458636 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1188 22:24:27.510956 # selftests: arm64: fake_sigreturn_sme_change_vl
1189 22:24:27.565776 # Registered handlers for all signals.
1190 22:24:27.566113 # Detected MINSTKSIGSZ:10000
1191 22:24:27.566284 # Required Features: [ SME ] supported
1192 22:24:27.566450 # Incompatible Features: [] absent
1193 22:24:27.566600 # Testcase initialized.
1194 22:24:27.566772 # uc context validated.
1195 22:24:27.566899 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1196 22:24:27.567019 # Handled SIG_COPYCTX
1197 22:24:27.567135 # Attempting to change VL from 16 to 256
1198 22:24:27.567249 # SIG_OK -- SP:0xFFFFF5A3F790 si_addr@:0xfffff5a3f790 si_code:2 token@:0xfffff5a3e530 offset:-4704
1199 22:24:27.567365 # ==>> completed. PASS(1)
1200 22:24:27.567479 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1201 22:24:27.567594 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF5A3E530
1202 22:24:27.576955 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1203 22:24:27.628028 # selftests: arm64: fake_sigreturn_sve_change_vl
1204 22:24:27.682759 # Registered handlers for all signals.
1205 22:24:27.683324 # Detected MINSTKSIGSZ:10000
1206 22:24:27.683480 # Required Features: [ SVE ] supported
1207 22:24:27.683631 # Incompatible Features: [] absent
1208 22:24:27.683776 # Testcase initialized.
1209 22:24:27.683922 # uc context validated.
1210 22:24:27.684066 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1211 22:24:27.684210 # Handled SIG_COPYCTX
1212 22:24:27.684353 # Attempting to change VL from 16 to 256
1213 22:24:27.684531 # SIG_OK -- SP:0xFFFFCCCC2B70 si_addr@:0xffffcccc2b70 si_code:2 token@:0xffffcccc1910 offset:-4704
1214 22:24:27.684672 # ==>> completed. PASS(1)
1215 22:24:27.684816 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1216 22:24:27.684960 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCCCC1910
1217 22:24:27.693301 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1218 22:24:27.743587 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1219 22:24:27.799049 # Registered handlers for all signals.
1220 22:24:27.799571 # Detected MINSTKSIGSZ:10000
1221 22:24:27.799719 # Testcase initialized.
1222 22:24:27.799840 # uc context validated.
1223 22:24:27.799956 # Handled SIG_TRIG
1224 22:24:27.800072 # SIG_OK -- SP:0xFFFFC01A9F90 si_addr@:0xffffc01a9f90 si_code:2 token@:(nil) offset:-281473904713616
1225 22:24:27.801762 # ==>> completed. PASS(1)
1226 22:24:27.802170 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1227 22:24:27.809397 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1228 22:24:27.862065 # selftests: arm64: mangle_pstate_invalid_daif_bits
1229 22:24:27.913286 # Registered handlers for all signals.
1230 22:24:27.913558 # Detected MINSTKSIGSZ:10000
1231 22:24:27.913720 # Testcase initialized.
1232 22:24:27.914117 # uc context validated.
1233 22:24:27.914257 # Handled SIG_TRIG
1234 22:24:27.914376 # SIG_OK -- SP:0xFFFFDC3FCAA0 si_addr@:0xffffdc3fcaa0 si_code:2 token@:(nil) offset:-281474376911520
1235 22:24:27.914495 # ==>> completed. PASS(1)
1236 22:24:27.914611 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1237 22:24:27.923589 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1238 22:24:27.974245 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1239 22:24:28.026302 # Registered handlers for all signals.
1240 22:24:28.026522 # Detected MINSTKSIGSZ:10000
1241 22:24:28.026954 # Testcase initialized.
1242 22:24:28.027106 # uc context validated.
1243 22:24:28.027229 # Handled SIG_TRIG
1244 22:24:28.027346 # SIG_OK -- SP:0xFFFFF72B78E0 si_addr@:0xfffff72b78e0 si_code:2 token@:(nil) offset:-281474828564704
1245 22:24:28.027464 # ==>> completed. PASS(1)
1246 22:24:28.027580 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1247 22:24:28.036538 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1248 22:24:28.087081 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1249 22:24:28.139378 # Registered handlers for all signals.
1250 22:24:28.139731 # Detected MINSTKSIGSZ:10000
1251 22:24:28.139945 # Testcase initialized.
1252 22:24:28.140126 # uc context validated.
1253 22:24:28.140260 # Handled SIG_TRIG
1254 22:24:28.140406 # SIG_OK -- SP:0xFFFFE0A8F400 si_addr@:0xffffe0a8f400 si_code:2 token@:(nil) offset:-281474450912256
1255 22:24:28.140529 # ==>> completed. PASS(1)
1256 22:24:28.140644 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1257 22:24:28.149707 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1258 22:24:28.200460 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1259 22:24:28.252514 # Registered handlers for all signals.
1260 22:24:28.252687 # Detected MINSTKSIGSZ:10000
1261 22:24:28.252861 # Testcase initialized.
1262 22:24:28.253237 # uc context validated.
1263 22:24:28.253396 # Handled SIG_TRIG
1264 22:24:28.253547 # SIG_OK -- SP:0xFFFFD1C0DA40 si_addr@:0xffffd1c0da40 si_code:2 token@:(nil) offset:-281474200820288
1265 22:24:28.253705 # ==>> completed. PASS(1)
1266 22:24:28.253850 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1267 22:24:28.263007 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1268 22:24:28.313388 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1269 22:24:28.367407 # Registered handlers for all signals.
1270 22:24:28.367606 # Detected MINSTKSIGSZ:10000
1271 22:24:28.367772 # Testcase initialized.
1272 22:24:28.367919 # uc context validated.
1273 22:24:28.368053 # Handled SIG_TRIG
1274 22:24:28.368175 # SIG_OK -- SP:0xFFFFCD888E00 si_addr@:0xffffcd888e00 si_code:2 token@:(nil) offset:-281474130021888
1275 22:24:28.368321 # ==>> completed. PASS(1)
1276 22:24:28.368446 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1277 22:24:28.376872 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1278 22:24:28.429207 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1279 22:24:28.480909 # Registered handlers for all signals.
1280 22:24:28.481264 # Detected MINSTKSIGSZ:10000
1281 22:24:28.481369 # Testcase initialized.
1282 22:24:28.481511 # uc context validated.
1283 22:24:28.481592 # Handled SIG_TRIG
1284 22:24:28.481693 # SIG_OK -- SP:0xFFFFDD4F1A00 si_addr@:0xffffdd4f1a00 si_code:2 token@:(nil) offset:-281474394692096
1285 22:24:28.481778 # ==>> completed. PASS(1)
1286 22:24:28.481866 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1287 22:24:28.489996 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1288 22:24:28.541238 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1289 22:24:28.594409 # Registered handlers for all signals.
1290 22:24:28.595009 # Detected MINSTKSIGSZ:10000
1291 22:24:28.595208 # Testcase initialized.
1292 22:24:28.595383 # uc context validated.
1293 22:24:28.595534 # Handled SIG_TRIG
1294 22:24:28.595679 # SIG_OK -- SP:0xFFFFFD649370 si_addr@:0xfffffd649370 si_code:2 token@:(nil) offset:-281474932970352
1295 22:24:28.595858 # ==>> completed. PASS(1)
1296 22:24:28.595998 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1297 22:24:28.603427 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1298 22:24:28.654210 # selftests: arm64: sme_trap_no_sm
1299 22:24:28.767297 # Registered handlers for all signals.
1300 22:24:28.767785 # Detected MINSTKSIGSZ:10000
1301 22:24:28.767971 # Required Features: [ SME ] supported
1302 22:24:28.768155 # Incompatible Features: [] absent
1303 22:24:28.768309 # Testcase initialized.
1304 22:24:28.768461 # SIG_OK -- SP:0xFFFFF0286980 si_addr@:0xaaaac74c2514 si_code:1 token@:(nil) offset:-187650464818452
1305 22:24:28.768588 # ==>> completed. PASS(1)
1306 22:24:28.768706 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1307 22:24:28.784942 ok 19 selftests: arm64: sme_trap_no_sm
1308 22:24:28.894281 # selftests: arm64: sme_trap_non_streaming
1309 22:24:28.963664 # Registered handlers for all signals.
1310 22:24:28.963877 # Detected MINSTKSIGSZ:10000
1311 22:24:28.964096 # Required Features: [] NOT supported
1312 22:24:28.964268 # Incompatible Features: [] supported
1313 22:24:28.964398 # ==>> completed. SKIP.
1314 22:24:28.964519 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1315 22:24:28.974961 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1316 22:24:29.032568 # selftests: arm64: sme_trap_za
1317 22:24:29.088181 # Registered handlers for all signals.
1318 22:24:29.090225 # Detected MINSTKSIGSZ:10000
1319 22:24:29.090414 # Testcase initialized.
1320 22:24:29.090548 # SIG_OK -- SP:0xFFFFC784BA80 si_addr@:0xaaaac85a2510 si_code:1 token@:(nil) offset:-187650482513168
1321 22:24:29.090877 # ==>> completed. PASS(1)
1322 22:24:29.091044 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1323 22:24:29.098282 ok 21 selftests: arm64: sme_trap_za
1324 22:24:29.153103 # selftests: arm64: sme_vl
1325 22:24:29.209605 # Registered handlers for all signals.
1326 22:24:29.209857 # Detected MINSTKSIGSZ:10000
1327 22:24:29.210192 # Required Features: [ SME ] supported
1328 22:24:29.210290 # Incompatible Features: [] absent
1329 22:24:29.210368 # Testcase initialized.
1330 22:24:29.210444 # uc context validated.
1331 22:24:29.210516 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1332 22:24:29.210589 # Handled SIG_COPYCTX
1333 22:24:29.210661 # got expected VL 32
1334 22:24:29.210732 # ==>> completed. PASS(1)
1335 22:24:29.211007 # # SME VL :: Check that we get the right SME VL reported
1336 22:24:29.219546 ok 22 selftests: arm64: sme_vl
1337 22:24:29.274269 # selftests: arm64: ssve_regs
1338 22:24:29.471803 # Registered handlers for all signals.
1339 22:24:29.472269 # Detected MINSTKSIGSZ:10000
1340 22:24:29.472377 # Required Features: [ SME FA64 ] supported
1341 22:24:29.472472 # Incompatible Features: [] absent
1342 22:24:29.472561 # Testcase initialized.
1343 22:24:29.472645 # Testing VL 256
1344 22:24:29.472726 # Validating EXTRA...
1345 22:24:29.472824 # uc context validated.
1346 22:24:29.472907 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1347 22:24:29.472985 # Handled SIG_COPYCTX
1348 22:24:29.473061 # Got expected size 8752 and VL 256
1349 22:24:29.473136 # Testing VL 128
1350 22:24:29.473211 # Validating EXTRA...
1351 22:24:29.473285 # uc context validated.
1352 22:24:29.473355 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1353 22:24:29.473425 # Handled SIG_COPYCTX
1354 22:24:29.473516 # Got expected size 4384 and VL 128
1355 22:24:29.473591 # Testing VL 64
1356 22:24:29.473674 # uc context validated.
1357 22:24:29.473749 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1358 22:24:29.473821 # Handled SIG_COPYCTX
1359 22:24:29.473894 # Got expected size 2208 and VL 64
1360 22:24:29.473965 # Testing VL 32
1361 22:24:29.474039 # uc context validated.
1362 22:24:29.474116 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1363 22:24:29.474215 # Handled SIG_COPYCTX
1364 22:24:29.474293 # Got expected size 1120 and VL 32
1365 22:24:29.474366 # Testing VL 16
1366 22:24:29.474437 # uc context validated.
1367 22:24:29.474507 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1368 22:24:29.474578 # Handled SIG_COPYCTX
1369 22:24:29.474661 # Got expected size 576 and VL 16
1370 22:24:29.474734 # ==>> completed. PASS(1)
1371 22:24:29.474805 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1372 22:24:29.483301 ok 23 selftests: arm64: ssve_regs
1373 22:24:29.535295 # selftests: arm64: sve_regs
1374 22:24:30.096333 # Registered handlers for all signals.
1375 22:24:30.096627 # Detected MINSTKSIGSZ:10000
1376 22:24:30.096770 # Required Features: [ SVE ] supported
1377 22:24:30.097124 # Incompatible Features: [] absent
1378 22:24:30.097265 # Testcase initialized.
1379 22:24:30.097395 # Testing VL 256
1380 22:24:30.097522 # Validating EXTRA...
1381 22:24:30.098361 # uc context validated.
1382 22:24:30.098757 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1383 22:24:30.098867 # Handled SIG_COPYCTX
1384 22:24:30.098960 # Got expected size 8752 and VL 256
1385 22:24:30.099049 # Testing VL 240
1386 22:24:30.099136 # Validating EXTRA...
1387 22:24:30.099221 # uc context validated.
1388 22:24:30.099326 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1389 22:24:30.099417 # Handled SIG_COPYCTX
1390 22:24:30.099504 # Got expected size 8208 and VL 240
1391 22:24:30.099590 # Testing VL 224
1392 22:24:30.099676 # Validating EXTRA...
1393 22:24:30.099759 # uc context validated.
1394 22:24:30.099845 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1395 22:24:30.099951 # Handled SIG_COPYCTX
1396 22:24:30.100040 # Got expected size 7664 and VL 224
1397 22:24:30.100128 # Testing VL 208
1398 22:24:30.100214 # Validating EXTRA...
1399 22:24:30.100294 # uc context validated.
1400 22:24:30.100377 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1401 22:24:30.100460 # Handled SIG_COPYCTX
1402 22:24:30.100560 # Got expected size 7120 and VL 208
1403 22:24:30.100647 # Testing VL 192
1404 22:24:30.100730 # Validating EXTRA...
1405 22:24:30.100812 # uc context validated.
1406 22:24:30.100897 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1407 22:24:30.100980 # Handled SIG_COPYCTX
1408 22:24:30.108123 # Got expected size 6576 and VL 192
1409 22:24:30.108616 # Testing VL 176
1410 22:24:30.108778 # Validating EXTRA...
1411 22:24:30.108906 # uc context validated.
1412 22:24:30.109070 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1413 22:24:30.109244 # Handled SIG_COPYCTX
1414 22:24:30.109421 # Got expected size 6032 and VL 176
1415 22:24:30.109572 # Testing VL 160
1416 22:24:30.109786 # Validating EXTRA...
1417 22:24:30.110015 # uc context validated.
1418 22:24:30.110187 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1419 22:24:30.110376 # Handled SIG_COPYCTX
1420 22:24:30.110569 # Got expected size 5488 and VL 160
1421 22:24:30.110722 # Testing VL 144
1422 22:24:30.110887 # Validating EXTRA...
1423 22:24:30.111052 # uc context validated.
1424 22:24:30.111221 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1425 22:24:30.111390 # Handled SIG_COPYCTX
1426 22:24:30.111598 # Got expected size 4944 and VL 144
1427 22:24:30.111776 # Testing VL 128
1428 22:24:30.111943 # Validating EXTRA...
1429 22:24:30.112108 # uc context validated.
1430 22:24:30.112277 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1431 22:24:30.112443 # Handled SIG_COPYCTX
1432 22:24:30.112657 # Got expected size 4384 and VL 128
1433 22:24:30.112784 # Testing VL 112
1434 22:24:30.112900 # Validating EXTRA...
1435 22:24:30.113016 # uc context validated.
1436 22:24:30.113131 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1437 22:24:30.113247 # Handled SIG_COPYCTX
1438 22:24:30.113363 # Got expected size 3840 and VL 112
1439 22:24:30.113480 # Testing VL 96
1440 22:24:30.113596 # uc context validated.
1441 22:24:30.113806 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1442 22:24:30.114006 # Handled SIG_COPYCTX
1443 22:24:30.114191 # Got expected size 3296 and VL 96
1444 22:24:30.114377 # Testing VL 80
1445 22:24:30.114564 # uc context validated.
1446 22:24:30.114747 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1447 22:24:30.114893 # Handled SIG_COPYCTX
1448 22:24:30.115034 # Got expected size 2752 and VL 80
1449 22:24:30.115175 # Testing VL 64
1450 22:24:30.115317 # uc context validated.
1451 22:24:30.115560 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1452 22:24:30.115800 # Handled SIG_COPYCTX
1453 22:24:30.115948 # Got expected size 2208 and VL 64
1454 22:24:30.116091 # Testing VL 48
1455 22:24:30.116303 # uc context validated.
1456 22:24:30.116528 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1457 22:24:30.116704 # Handled SIG_COPYCTX
1458 22:24:30.116914 # Got expected size 1664 and VL 48
1459 22:24:30.117090 # Testing VL 32
1460 22:24:30.117265 # uc context validated.
1461 22:24:30.117430 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1462 22:24:30.117607 # Handled SIG_COPYCTX
1463 22:24:30.117759 # Got expected size 1120 and VL 32
1464 22:24:30.117998 # Testing VL 16
1465 22:24:30.118144 # uc context validated.
1466 22:24:30.118266 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1467 22:24:30.118385 # Handled SIG_COPYCTX
1468 22:24:30.118509 # Got expected size 576 and VL 16
1469 22:24:30.118626 # ==>> completed. PASS(1)
1470 22:24:30.118968 # # SVE registers :: Check that we get the right SVE registers reported
1471 22:24:30.119101 ok 24 selftests: arm64: sve_regs
1472 22:24:30.169035 # selftests: arm64: sve_vl
1473 22:24:30.226062 # Registered handlers for all signals.
1474 22:24:30.226529 # Detected MINSTKSIGSZ:10000
1475 22:24:30.226632 # Required Features: [ SVE ] supported
1476 22:24:30.226721 # Incompatible Features: [] absent
1477 22:24:30.226808 # Testcase initialized.
1478 22:24:30.226911 # uc context validated.
1479 22:24:30.227000 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1480 22:24:30.227084 # Handled SIG_COPYCTX
1481 22:24:30.227167 # got expected VL 64
1482 22:24:30.227252 # ==>> completed. PASS(1)
1483 22:24:30.227334 # # SVE VL :: Check that we get the right SVE VL reported
1484 22:24:30.234635 ok 25 selftests: arm64: sve_vl
1485 22:24:30.288060 # selftests: arm64: za_no_regs
1486 22:24:30.356217 # Registered handlers for all signals.
1487 22:24:30.356551 # Detected MINSTKSIGSZ:10000
1488 22:24:30.356986 # Required Features: [ SME ] supported
1489 22:24:30.357191 # Incompatible Features: [] absent
1490 22:24:30.357371 # Testcase initialized.
1491 22:24:30.357538 # Testing VL 256
1492 22:24:30.357718 # uc context validated.
1493 22:24:30.357921 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1494 22:24:30.358141 # Handled SIG_COPYCTX
1495 22:24:30.358366 # Got expected size 16 and VL 256
1496 22:24:30.358575 # Testing VL 128
1497 22:24:30.358767 # uc context validated.
1498 22:24:30.359217 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1499 22:24:30.359382 # Handled SIG_COPYCTX
1500 22:24:30.359514 # Got expected size 16 and VL 128
1501 22:24:30.359638 # Testing VL 64
1502 22:24:30.359760 # uc context validated.
1503 22:24:30.359880 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1504 22:24:30.360007 # Handled SIG_COPYCTX
1505 22:24:30.360126 # Got expected size 16 and VL 64
1506 22:24:30.360244 # Testing VL 32
1507 22:24:30.360362 # uc context validated.
1508 22:24:30.360479 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1509 22:24:30.360602 # Handled SIG_COPYCTX
1510 22:24:30.360721 # Got expected size 16 and VL 32
1511 22:24:30.360839 # Testing VL 16
1512 22:24:30.360958 # uc context validated.
1513 22:24:30.361077 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1514 22:24:30.361194 # Handled SIG_COPYCTX
1515 22:24:30.361312 # Got expected size 16 and VL 16
1516 22:24:30.361429 # ==>> completed. PASS(1)
1517 22:24:30.361546 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1518 22:24:30.366350 ok 26 selftests: arm64: za_no_regs
1519 22:24:30.416946 # selftests: arm64: za_regs
1520 22:24:30.589082 # Registered handlers for all signals.
1521 22:24:30.589410 # Detected MINSTKSIGSZ:10000
1522 22:24:30.589582 # Required Features: [ SME ] supported
1523 22:24:30.589778 # Incompatible Features: [] absent
1524 22:24:30.589986 # Testcase initialized.
1525 22:24:30.590161 # Testing VL 256
1526 22:24:30.590334 # Validating EXTRA...
1527 22:24:30.590500 # uc context validated.
1528 22:24:30.590664 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1529 22:24:30.590828 # Handled SIG_COPYCTX
1530 22:24:30.590991 # Got expected size 65552 and VL 256
1531 22:24:30.591156 # Testing VL 128
1532 22:24:30.591319 # Validating EXTRA...
1533 22:24:30.591482 # uc context validated.
1534 22:24:30.591709 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1535 22:24:30.591845 # Handled SIG_COPYCTX
1536 22:24:30.591963 # Got expected size 16400 and VL 128
1537 22:24:30.592080 # Testing VL 64
1538 22:24:30.592250 # Validating EXTRA...
1539 22:24:30.592393 # uc context validated.
1540 22:24:30.592512 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1541 22:24:30.592627 # Handled SIG_COPYCTX
1542 22:24:30.592745 # Got expected size 4112 and VL 64
1543 22:24:30.592861 # Testing VL 32
1544 22:24:30.592978 # uc context validated.
1545 22:24:30.593094 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1546 22:24:30.593209 # Handled SIG_COPYCTX
1547 22:24:30.593324 # Got expected size 1040 and VL 32
1548 22:24:30.593438 # Testing VL 16
1549 22:24:30.593550 # uc context validated.
1550 22:24:30.593715 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1551 22:24:30.593927 # Handled SIG_COPYCTX
1552 22:24:30.594112 # Got expected size 272 and VL 16
1553 22:24:30.594295 # ==>> completed. PASS(1)
1554 22:24:30.594478 # # ZA register :: Check that we get the right ZA registers reported
1555 22:24:30.602959 ok 27 selftests: arm64: za_regs
1556 22:24:30.656664 # selftests: arm64: pac
1557 22:24:30.831006 # TAP version 13
1558 22:24:30.831250 # 1..7
1559 22:24:30.831542 # # Starting 7 tests from 1 test cases.
1560 22:24:30.831636 # # RUN global.corrupt_pac ...
1561 22:24:30.831718 # # OK global.corrupt_pac
1562 22:24:30.831801 # ok 1 global.corrupt_pac
1563 22:24:30.831895 # # RUN global.pac_instructions_not_nop ...
1564 22:24:30.831974 # # OK global.pac_instructions_not_nop
1565 22:24:30.832051 # ok 2 global.pac_instructions_not_nop
1566 22:24:30.832125 # # RUN global.pac_instructions_not_nop_generic ...
1567 22:24:30.832202 # # OK global.pac_instructions_not_nop_generic
1568 22:24:30.832291 # ok 3 global.pac_instructions_not_nop_generic
1569 22:24:30.832368 # # RUN global.single_thread_different_keys ...
1570 22:24:30.832456 # # OK global.single_thread_different_keys
1571 22:24:30.832545 # ok 4 global.single_thread_different_keys
1572 22:24:30.832627 # # RUN global.exec_changed_keys ...
1573 22:24:30.832719 # # OK global.exec_changed_keys
1574 22:24:30.832800 # ok 5 global.exec_changed_keys
1575 22:24:30.832886 # # RUN global.context_switch_keep_keys ...
1576 22:24:30.832961 # # OK global.context_switch_keep_keys
1577 22:24:30.833046 # ok 6 global.context_switch_keep_keys
1578 22:24:30.833134 # # RUN global.context_switch_keep_keys_generic ...
1579 22:24:30.833474 # # OK global.context_switch_keep_keys_generic
1580 22:24:30.833691 # ok 7 global.context_switch_keep_keys_generic
1581 22:24:30.833877 # # PASSED: 7 / 7 tests passed.
1582 22:24:30.834087 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1583 22:24:30.843055 ok 28 selftests: arm64: pac
1584 22:24:30.895316 # selftests: arm64: fp-stress
1585 22:24:48.781405 # TAP version 13
1586 22:24:48.781750 # 1..27
1587 22:24:48.782143 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1588 22:24:48.782249 # # Will run for 10s
1589 22:24:48.782334 # # Started FPSIMD-0-0
1590 22:24:48.782412 # # Started SVE-VL-256-0
1591 22:24:48.782490 # # Started SVE-VL-240-0
1592 22:24:48.782567 # # Started SVE-VL-224-0
1593 22:24:48.782643 # # Started SVE-VL-208-0
1594 22:24:48.782720 # # Started SVE-VL-192-0
1595 22:24:48.782798 # # Started SVE-VL-176-0
1596 22:24:48.782878 # # Started SVE-VL-160-0
1597 22:24:48.782971 # # Started SVE-VL-144-0
1598 22:24:48.783050 # # Started SVE-VL-128-0
1599 22:24:48.783126 # # Started SVE-VL-112-0
1600 22:24:48.783203 # # Started SVE-VL-96-0
1601 22:24:48.783279 # # Started SVE-VL-80-0
1602 22:24:48.783355 # # Started SVE-VL-64-0
1603 22:24:48.783430 # # Started SVE-VL-48-0
1604 22:24:48.783506 # # Started SVE-VL-32-0
1605 22:24:48.788691 # # Started SVE-VL-16-0
1606 22:24:48.789157 # # Started SSVE-VL-256-0
1607 22:24:48.789256 # # Started ZA-VL-256-0
1608 22:24:48.789336 # # Started SSVE-VL-128-0
1609 22:24:48.789413 # # Started ZA-VL-128-0
1610 22:24:48.789490 # # Started SSVE-VL-64-0
1611 22:24:48.789566 # # Started ZA-VL-64-0
1612 22:24:48.789642 # # Started SSVE-VL-32-0
1613 22:24:48.789735 # # Started ZA-VL-32-0
1614 22:24:48.789812 # # Started SSVE-VL-16-0
1615 22:24:48.789888 # # Started ZA-VL-16-0
1616 22:24:48.790174 # # SVE-VL-256-0: Vector length: 2048 bits
1617 22:24:48.790273 # # SVE-VL-256-0: PID: 912
1618 22:24:48.790354 # # SVE-VL-240-0: Vector length: 1920 bits
1619 22:24:48.790431 # # SVE-VL-240-0: PID: 913
1620 22:24:48.790508 # # SVE-VL-208-0: Vector length: 1664 bits
1621 22:24:48.790585 # # SVE-VL-208-0: PID: 915
1622 22:24:48.790662 # # SVE-VL-192-0: Vector length: 1536 bits
1623 22:24:48.790739 # # SVE-VL-192-0: PID: 916
1624 22:24:48.790814 # # FPSIMD-0-0: Vector length: 128 bits
1625 22:24:48.790891 # # FPSIMD-0-0: PID: 911
1626 22:24:48.790967 # # SVE-VL-176-0: Vector length: 1408 bits
1627 22:24:48.791230 # # SVE-VL-160-0: Vector length: 1280 bits
1628 22:24:48.791329 # # SVE-VL-176-0: PID: 917
1629 22:24:48.791411 # # SVE-VL-160-0: PID: 918
1630 22:24:48.791488 # # SVE-VL-48-0: Vector length: 384 bits
1631 22:24:48.791564 # # SVE-VL-48-0: PID: 925
1632 22:24:48.791641 # # SVE-VL-144-0: Vector length: 1152 bits
1633 22:24:48.791718 # # SVE-VL-144-0: PID: 919
1634 22:24:48.797926 # # SVE-VL-224-0: Vector length: 1792 bits
1635 22:24:48.798150 # # SVE-VL-224-0: PID: 914
1636 22:24:48.798465 # # SVE-VL-96-0: Vector length: 768 bits
1637 22:24:48.798578 # # SVE-VL-96-0: PID: 922
1638 22:24:48.798676 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1639 22:24:48.798766 # # ZA-VL-256-0: PID: 929
1640 22:24:48.798854 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1641 22:24:48.798939 # # SSVE-VL-128-0: PID: 930
1642 22:24:48.799042 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1643 22:24:48.799128 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1644 22:24:48.800564 # # SVE-VL-112-0: Vector length: 896 bits
1645 22:24:48.801042 # # SVE-VL-112-0: PID: 921
1646 22:24:48.801248 # # SVE-VL-64-0: Vector length: 512 bits
1647 22:24:48.801473 # # SVE-VL-64-0: PID: 924
1648 22:24:48.801696 # # SVE-VL-128-0: Vector length: 1024 bits
1649 22:24:48.801881 # # SVE-VL-128-0: PID: 920
1650 22:24:48.802081 # # SVE-VL-80-0: Vector length: 640 bits
1651 22:24:48.802323 # # SVE-VL-80-0: PID: 923
1652 22:24:48.802515 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1653 22:24:48.802705 # # SSVE-VL-32-0: PID: 934
1654 22:24:48.802922 # # ZA-VL-128-0: PID: 931
1655 22:24:48.803133 # # ZA-VL-32-0: PID: 935
1656 22:24:48.803303 # # SVE-VL-16-0: Vector length: 128 bits
1657 22:24:48.803466 # # SVE-VL-16-0: PID: 927
1658 22:24:48.803666 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1659 22:24:48.803860 # # SSVE-VL-256-0: PID: 928
1660 22:24:48.804120 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1661 22:24:48.804320 # # SVE-VL-32-0: Vector length: 256 bits
1662 22:24:48.804509 # # SVE-VL-32-0: PID: 926
1663 22:24:48.804683 # # ZA-VL-64-0: PID: 933
1664 22:24:48.804885 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1665 22:24:48.805115 # # SSVE-VL-16-0: PID: 936
1666 22:24:48.805334 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1667 22:24:48.805544 # # SSVE-VL-64-0: PID: 932
1668 22:24:48.807103 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1669 22:24:48.807248 # # ZA-VL-16-0: PID: 937
1670 22:24:48.807369 # # Finishing up...
1671 22:24:48.807485 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3511, signals=9
1672 22:24:48.807651 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=11973, signals=9
1673 22:24:48.807848 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=955, signals=9
1674 22:24:48.808031 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=7894, signals=9
1675 22:24:48.808173 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=10091, signals=9
1676 22:24:48.808328 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=909, signals=9
1677 22:24:48.808553 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=2190, signals=9
1678 22:24:48.808738 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=4689, signals=9
1679 22:24:48.808916 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=5871, signals=9
1680 22:24:48.809098 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2642, signals=9
1681 22:24:48.809284 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=2899, signals=9
1682 22:24:48.809467 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=971, signals=9
1683 22:24:48.809927 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=689, signals=9
1684 22:24:48.810121 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=5240, signals=9
1685 22:24:48.825057 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2405, signals=9
1686 22:24:48.825272 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3326, signals=9
1687 22:24:48.985194 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=248, signals=9
1688 22:24:48.985636 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=9788, signals=9
1689 22:24:48.985757 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=3739, signals=9
1690 22:24:48.985868 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=4247, signals=9
1691 22:24:48.986200 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=2847, signals=9
1692 22:24:48.986439 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=4156, signals=9
1693 22:24:48.986622 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=2539, signals=9
1694 22:24:48.986823 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=5701, signals=9
1695 22:24:48.986996 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=3830, signals=9
1696 22:24:49.009506 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2766, signals=9
1697 22:24:49.009946 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=6902, signals=9
1698 22:24:49.010074 # ok 1 FPSIMD-0-0
1699 22:24:49.010173 # ok 2 SVE-VL-256-0
1700 22:24:49.010266 # ok 3 SVE-VL-240-0
1701 22:24:49.010374 # ok 4 SVE-VL-224-0
1702 22:24:49.010467 # ok 5 SVE-VL-208-0
1703 22:24:49.011096 # ok 6 SVE-VL-192-0
1704 22:24:49.011190 # ok 7 SVE-VL-176-0
1705 22:24:49.011268 # ok 8 SVE-VL-160-0
1706 22:24:49.011342 # ok 9 SVE-VL-144-0
1707 22:24:49.011415 # ok 10 SVE-VL-128-0
1708 22:24:49.011490 # ok 11 SVE-VL-112-0
1709 22:24:49.011561 # ok 12 SVE-VL-96-0
1710 22:24:49.011633 # ok 13 SVE-VL-80-0
1711 22:24:49.011705 # ok 14 SVE-VL-64-0
1712 22:24:49.011778 # ok 15 SVE-VL-48-0
1713 22:24:49.011852 # ok 16 SVE-VL-32-0
1714 22:24:49.011926 # ok 17 SVE-VL-16-0
1715 22:24:49.034838 # ok 18 SSVE-VL-256-0
1716 22:24:49.035301 # ok 19 ZA-VL-256-0
1717 22:24:49.035394 # ok 20 SSVE-VL-128-0
1718 22:24:49.035487 # ok 21 ZA-VL-128-0
1719 22:24:49.042691 # ok 22 SSVE-VL-64-0
1720 22:24:49.043126 # ok 23 ZA-VL-64-0
1721 22:24:49.043299 # ok 24 SSVE-VL-32-0
1722 22:24:49.043490 # ok 25 ZA-VL-32-0
1723 22:24:49.043669 # ok 26 SSVE-VL-16-0
1724 22:24:49.043859 # ok 27 ZA-VL-16-0
1725 22:24:49.044048 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1726 22:24:49.130026 ok 29 selftests: arm64: fp-stress
1727 22:24:49.630856 # selftests: arm64: sve-ptrace
1728 22:24:49.870424 # TAP version 13
1729 22:24:49.870666 # 1..4104
1730 22:24:49.870970 # # Parent is 954, child is 955
1731 22:24:49.871049 # ok 1 SVE FPSIMD set via SVE: 0
1732 22:24:49.871129 # ok 2 SVE get_fpsimd() gave same state
1733 22:24:49.871205 # ok 3 SVE SVE_PT_VL_INHERIT set
1734 22:24:49.871280 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1735 22:24:49.871354 # ok 5 Set SVE VL 16
1736 22:24:49.871460 # ok 6 Set and get SVE data for VL 16
1737 22:24:49.871548 # ok 7 Set and get FPSIMD data for SVE VL 16
1738 22:24:49.871612 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1739 22:24:49.871673 # ok 9 Set SVE VL 32
1740 22:24:49.871733 # ok 10 Set and get SVE data for VL 32
1741 22:24:49.871793 # ok 11 Set and get FPSIMD data for SVE VL 32
1742 22:24:49.871853 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1743 22:24:49.871914 # ok 13 Set SVE VL 48
1744 22:24:49.871973 # ok 14 Set and get SVE data for VL 48
1745 22:24:49.873213 # ok 15 Set and get FPSIMD data for SVE VL 48
1746 22:24:49.873529 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1747 22:24:49.873632 # ok 17 Set SVE VL 64
1748 22:24:49.873734 # ok 18 Set and get SVE data for VL 64
1749 22:24:49.874605 # ok 19 Set and get FPSIMD data for SVE VL 64
1750 22:24:49.874713 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1751 22:24:49.874811 # ok 21 Set SVE VL 80
1752 22:24:49.874914 # ok 22 Set and get SVE data for VL 80
1753 22:24:49.875009 # ok 23 Set and get FPSIMD data for SVE VL 80
1754 22:24:49.875098 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1755 22:24:49.875187 # ok 25 Set SVE VL 96
1756 22:24:49.875272 # ok 26 Set and get SVE data for VL 96
1757 22:24:49.875357 # ok 27 Set and get FPSIMD data for SVE VL 96
1758 22:24:49.875647 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1759 22:24:49.875754 # ok 29 Set SVE VL 112
1760 22:24:49.875842 # ok 30 Set and get SVE data for VL 112
1761 22:24:49.875929 # ok 31 Set and get FPSIMD data for SVE VL 112
1762 22:24:49.876018 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1763 22:24:49.876107 # ok 33 Set SVE VL 128
1764 22:24:49.876193 # ok 34 Set and get SVE data for VL 128
1765 22:24:49.876279 # ok 35 Set and get FPSIMD data for SVE VL 128
1766 22:24:49.876365 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1767 22:24:49.876450 # ok 37 Set SVE VL 144
1768 22:24:49.876819 # ok 38 Set and get SVE data for VL 144
1769 22:24:49.876922 # ok 39 Set and get FPSIMD data for SVE VL 144
1770 22:24:49.877212 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1771 22:24:49.877318 # ok 41 Set SVE VL 160
1772 22:24:49.877407 # ok 42 Set and get SVE data for VL 160
1773 22:24:49.877494 # ok 43 Set and get FPSIMD data for SVE VL 160
1774 22:24:49.877597 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1775 22:24:49.877696 # ok 45 Set SVE VL 176
1776 22:24:49.877782 # ok 46 Set and get SVE data for VL 176
1777 22:24:49.877872 # ok 47 Set and get FPSIMD data for SVE VL 176
1778 22:24:49.877995 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1779 22:24:49.878088 # ok 49 Set SVE VL 192
1780 22:24:49.878174 # ok 50 Set and get SVE data for VL 192
1781 22:24:49.878258 # ok 51 Set and get FPSIMD data for SVE VL 192
1782 22:24:49.878359 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1783 22:24:49.878447 # ok 53 Set SVE VL 208
1784 22:24:49.878533 # ok 54 Set and get SVE data for VL 208
1785 22:24:49.878652 # ok 55 Set and get FPSIMD data for SVE VL 208
1786 22:24:49.878743 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1787 22:24:49.878855 # ok 57 Set SVE VL 224
1788 22:24:49.878962 # ok 58 Set and get SVE data for VL 224
1789 22:24:49.879065 # ok 59 Set and get FPSIMD data for SVE VL 224
1790 22:24:49.879168 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1791 22:24:49.879257 # ok 61 Set SVE VL 240
1792 22:24:49.879355 # ok 62 Set and get SVE data for VL 240
1793 22:24:49.879442 # ok 63 Set and get FPSIMD data for SVE VL 240
1794 22:24:49.891039 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1795 22:24:49.891299 # ok 65 Set SVE VL 256
1796 22:24:49.891614 # ok 66 Set and get SVE data for VL 256
1797 22:24:49.891721 # ok 67 Set and get FPSIMD data for SVE VL 256
1798 22:24:49.891811 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1799 22:24:49.891898 # ok 69 Set SVE VL 272
1800 22:24:49.891984 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1801 22:24:49.892087 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1802 22:24:49.892700 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1803 22:24:49.892810 # ok 73 Set SVE VL 288
1804 22:24:49.893095 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1805 22:24:49.893193 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1806 22:24:49.893280 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1807 22:24:49.893382 # ok 77 Set SVE VL 304
1808 22:24:49.893471 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1809 22:24:49.893557 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1810 22:24:49.893668 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1811 22:24:49.893757 # ok 81 Set SVE VL 320
1812 22:24:49.894084 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1813 22:24:49.894189 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1814 22:24:49.894293 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1815 22:24:49.894414 # ok 85 Set SVE VL 336
1816 22:24:49.894528 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1817 22:24:49.894618 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1818 22:24:49.894706 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1819 22:24:49.894813 # ok 89 Set SVE VL 352
1820 22:24:49.894901 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1821 22:24:49.894989 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1822 22:24:49.895091 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1823 22:24:49.895179 # ok 93 Set SVE VL 368
1824 22:24:49.895277 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1825 22:24:49.895364 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1826 22:24:49.895470 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1827 22:24:49.904676 # ok 97 Set SVE VL 384
1828 22:24:49.904913 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1829 22:24:49.905023 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1830 22:24:49.905112 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1831 22:24:49.905195 # ok 101 Set SVE VL 400
1832 22:24:49.906184 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1833 22:24:49.906290 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1834 22:24:49.906382 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1835 22:24:49.906461 # ok 105 Set SVE VL 416
1836 22:24:49.906555 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1837 22:24:49.906646 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1838 22:24:49.906932 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1839 22:24:49.907030 # ok 109 Set SVE VL 432
1840 22:24:49.907123 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1841 22:24:49.907218 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1842 22:24:49.907307 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1843 22:24:49.907384 # ok 113 Set SVE VL 448
1844 22:24:49.916907 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1845 22:24:49.917163 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1846 22:24:49.917471 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1847 22:24:49.917568 # ok 117 Set SVE VL 464
1848 22:24:49.917672 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1849 22:24:49.917768 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1850 22:24:49.917878 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1851 22:24:49.917968 # ok 121 Set SVE VL 480
1852 22:24:49.918066 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1853 22:24:49.918151 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1854 22:24:49.918235 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1855 22:24:49.918338 # ok 125 Set SVE VL 496
1856 22:24:49.918428 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1857 22:24:49.918544 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1858 22:24:49.918662 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1859 22:24:49.918753 # ok 129 Set SVE VL 512
1860 22:24:49.919049 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1861 22:24:49.919173 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1862 22:24:49.919263 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1863 22:24:49.919349 # ok 133 Set SVE VL 528
1864 22:24:49.919448 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1865 22:24:49.932959 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1866 22:24:49.933214 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1867 22:24:49.933522 # ok 137 Set SVE VL 544
1868 22:24:49.933622 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1869 22:24:49.933724 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1870 22:24:49.933820 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1871 22:24:49.933907 # ok 141 Set SVE VL 560
1872 22:24:49.933993 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1873 22:24:49.934100 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1874 22:24:49.934189 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1875 22:24:49.934274 # ok 145 Set SVE VL 576
1876 22:24:49.934359 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1877 22:24:49.934444 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1878 22:24:49.934545 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1879 22:24:49.934632 # ok 149 Set SVE VL 592
1880 22:24:49.934733 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1881 22:24:49.934819 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1882 22:24:49.934916 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1883 22:24:49.935017 # ok 153 Set SVE VL 608
1884 22:24:49.937803 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1885 22:24:49.938046 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1886 22:24:49.941519 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1887 22:24:49.942015 # ok 157 Set SVE VL 624
1888 22:24:49.942180 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1889 22:24:49.942313 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1890 22:24:49.942427 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1891 22:24:49.942528 # ok 161 Set SVE VL 640
1892 22:24:49.942675 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1893 22:24:49.942812 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1894 22:24:49.942975 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1895 22:24:49.943107 # ok 165 Set SVE VL 656
1896 22:24:49.943230 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1897 22:24:49.943383 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1898 22:24:49.943508 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1899 22:24:49.943602 # ok 169 Set SVE VL 672
1900 22:24:49.943691 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1901 22:24:49.943778 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1902 22:24:49.943866 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1903 22:24:49.943954 # ok 173 Set SVE VL 688
1904 22:24:49.944041 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1905 22:24:49.953526 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1906 22:24:49.953954 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1907 22:24:49.954069 # ok 177 Set SVE VL 704
1908 22:24:49.954176 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1909 22:24:49.954271 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1910 22:24:49.954396 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1911 22:24:49.954490 # ok 181 Set SVE VL 720
1912 22:24:49.954576 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1913 22:24:49.954660 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1914 22:24:49.954760 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1915 22:24:49.954833 # ok 185 Set SVE VL 736
1916 22:24:49.954924 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1917 22:24:49.955031 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1918 22:24:49.955117 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1919 22:24:49.955245 # ok 189 Set SVE VL 752
1920 22:24:49.955350 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1921 22:24:49.955436 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1922 22:24:49.965833 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1923 22:24:49.966003 # ok 193 Set SVE VL 768
1924 22:24:49.966201 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1925 22:24:49.966810 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1926 22:24:49.967039 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1927 22:24:49.967252 # ok 197 Set SVE VL 784
1928 22:24:49.967480 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1929 22:24:49.967692 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1930 22:24:49.967930 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1931 22:24:49.968109 # ok 201 Set SVE VL 800
1932 22:24:49.968301 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1933 22:24:49.968491 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1934 22:24:49.968681 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1935 22:24:49.968883 # ok 205 Set SVE VL 816
1936 22:24:49.969067 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1937 22:24:49.969661 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1938 22:24:49.969961 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1939 22:24:49.970312 # ok 209 Set SVE VL 832
1940 22:24:49.970512 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1941 22:24:49.970719 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1942 22:24:49.970910 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1943 22:24:49.971102 # ok 213 Set SVE VL 848
1944 22:24:49.971519 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1945 22:24:49.971603 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1946 22:24:49.971668 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1947 22:24:49.971730 # ok 217 Set SVE VL 864
1948 22:24:49.971789 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1949 22:24:49.971849 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1950 22:24:49.971908 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1951 22:24:49.971967 # ok 221 Set SVE VL 880
1952 22:24:49.972026 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1953 22:24:49.972090 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1954 22:24:49.972150 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1955 22:24:49.972209 # ok 225 Set SVE VL 896
1956 22:24:49.972268 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1957 22:24:49.972330 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1958 22:24:49.972390 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1959 22:24:49.986076 # ok 229 Set SVE VL 912
1960 22:24:49.986420 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1961 22:24:49.986630 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1962 22:24:49.987119 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1963 22:24:49.987340 # ok 233 Set SVE VL 928
1964 22:24:49.987552 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1965 22:24:49.987771 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1966 22:24:49.987968 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1967 22:24:49.988142 # ok 237 Set SVE VL 944
1968 22:24:49.988330 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1969 22:24:49.988539 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1970 22:24:49.988754 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1971 22:24:49.988956 # ok 241 Set SVE VL 960
1972 22:24:49.989129 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1973 22:24:49.989265 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1974 22:24:49.989420 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1975 22:24:49.994015 # ok 245 Set SVE VL 976
1976 22:24:49.994473 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1977 22:24:49.994590 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1978 22:24:49.994694 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1979 22:24:49.994790 # ok 249 Set SVE VL 992
1980 22:24:49.994878 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1981 22:24:49.994965 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1982 22:24:49.995069 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1983 22:24:49.995163 # ok 253 Set SVE VL 1008
1984 22:24:49.995250 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1985 22:24:49.995341 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1986 22:24:49.995449 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1987 22:24:49.995561 # ok 257 Set SVE VL 1024
1988 22:24:49.995650 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1989 22:24:49.995736 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1990 22:24:49.995824 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1991 22:24:49.995909 # ok 261 Set SVE VL 1040
1992 22:24:49.995993 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1993 22:24:49.996080 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1994 22:24:49.996651 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1995 22:24:49.996764 # ok 265 Set SVE VL 1056
1996 22:24:49.996855 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1997 22:24:49.997141 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1998 22:24:49.997255 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1999 22:24:49.997706 # ok 269 Set SVE VL 1072
2000 22:24:49.998021 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
2001 22:24:49.998131 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
2002 22:24:49.998223 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2003 22:24:49.998309 # ok 273 Set SVE VL 1088
2004 22:24:49.998393 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2005 22:24:49.998611 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2006 22:24:49.998715 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2007 22:24:49.998820 # ok 277 Set SVE VL 1104
2008 22:24:49.998927 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2009 22:24:49.999033 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2010 22:24:49.999141 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2011 22:24:49.999246 # ok 281 Set SVE VL 1120
2012 22:24:49.999354 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2013 22:24:49.999477 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2014 22:24:49.999565 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2015 22:24:49.999635 # ok 285 Set SVE VL 1136
2016 22:24:49.999696 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2017 22:24:49.999756 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2018 22:24:49.999816 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2019 22:24:50.011459 # ok 289 Set SVE VL 1152
2020 22:24:50.012443 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2021 22:24:50.012767 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2022 22:24:50.012856 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2023 22:24:50.020636 # ok 293 Set SVE VL 1168
2024 22:24:50.020998 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2025 22:24:50.021110 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2026 22:24:50.021220 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2027 22:24:50.021307 # ok 297 Set SVE VL 1184
2028 22:24:50.021421 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2029 22:24:50.021518 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2030 22:24:50.021666 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2031 22:24:50.021770 # ok 301 Set SVE VL 1200
2032 22:24:50.021862 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2033 22:24:50.021959 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2034 22:24:50.022278 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2035 22:24:50.022829 # ok 305 Set SVE VL 1216
2036 22:24:50.022932 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2037 22:24:50.023043 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2038 22:24:50.023138 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2039 22:24:50.023232 # ok 309 Set SVE VL 1232
2040 22:24:50.023318 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2041 22:24:50.023402 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2042 22:24:50.023488 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2043 22:24:50.023591 # ok 313 Set SVE VL 1248
2044 22:24:50.023680 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2045 22:24:50.023767 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2046 22:24:50.023852 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2047 22:24:50.023938 # ok 317 Set SVE VL 1264
2048 22:24:50.024039 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2049 22:24:50.024127 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2050 22:24:50.024215 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2051 22:24:50.024325 # ok 321 Set SVE VL 1280
2052 22:24:50.024412 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2053 22:24:50.024513 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2054 22:24:50.024616 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2055 22:24:50.024720 # ok 325 Set SVE VL 1296
2056 22:24:50.032213 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2057 22:24:50.032613 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2058 22:24:50.032723 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2059 22:24:50.032812 # ok 329 Set SVE VL 1312
2060 22:24:50.032913 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2061 22:24:50.033016 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2062 22:24:50.033105 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2063 22:24:50.033208 # ok 333 Set SVE VL 1328
2064 22:24:50.033315 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2065 22:24:50.033416 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2066 22:24:50.033711 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2067 22:24:50.033823 # ok 337 Set SVE VL 1344
2068 22:24:50.033930 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2069 22:24:50.034018 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2070 22:24:50.034313 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2071 22:24:50.034420 # ok 341 Set SVE VL 1360
2072 22:24:50.034521 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2073 22:24:50.034810 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2074 22:24:50.034933 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2075 22:24:50.035025 # ok 345 Set SVE VL 1376
2076 22:24:50.035113 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2077 22:24:50.035213 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2078 22:24:50.035300 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2079 22:24:50.035398 # ok 349 Set SVE VL 1392
2080 22:24:50.035499 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2081 22:24:50.035585 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2082 22:24:50.041459 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2083 22:24:50.041638 # ok 353 Set SVE VL 1408
2084 22:24:50.041939 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2085 22:24:50.042052 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2086 22:24:50.042145 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2087 22:24:50.045824 # ok 357 Set SVE VL 1424
2088 22:24:50.045949 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2089 22:24:50.046038 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2090 22:24:50.046118 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2091 22:24:50.046198 # ok 361 Set SVE VL 1440
2092 22:24:50.046276 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2093 22:24:50.046363 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2094 22:24:50.046442 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2095 22:24:50.046521 # ok 365 Set SVE VL 1456
2096 22:24:50.046600 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2097 22:24:50.046680 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2098 22:24:50.046759 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2099 22:24:50.052663 # ok 369 Set SVE VL 1472
2100 22:24:50.052822 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2101 22:24:50.052915 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2102 22:24:50.053021 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2103 22:24:50.053112 # ok 373 Set SVE VL 1488
2104 22:24:50.053216 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2105 22:24:50.053321 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2106 22:24:50.053424 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2107 22:24:50.053529 # ok 377 Set SVE VL 1504
2108 22:24:50.053829 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2109 22:24:50.053950 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2110 22:24:50.054040 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2111 22:24:50.054140 # ok 381 Set SVE VL 1520
2112 22:24:50.054228 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2113 22:24:50.054326 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2114 22:24:50.054426 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2115 22:24:50.054528 # ok 385 Set SVE VL 1536
2116 22:24:50.054628 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2117 22:24:50.054929 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2118 22:24:50.055048 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2119 22:24:50.055135 # ok 389 Set SVE VL 1552
2120 22:24:50.055229 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2121 22:24:50.055305 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2122 22:24:50.055608 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2123 22:24:50.064841 # ok 393 Set SVE VL 1568
2124 22:24:50.064955 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2125 22:24:50.065078 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2126 22:24:50.065189 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2127 22:24:50.065282 # ok 397 Set SVE VL 1584
2128 22:24:50.065402 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2129 22:24:50.065515 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2130 22:24:50.065824 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2131 22:24:50.065911 # ok 401 Set SVE VL 1600
2132 22:24:50.066012 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2133 22:24:50.066147 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2134 22:24:50.066251 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2135 22:24:50.066365 # ok 405 Set SVE VL 1616
2136 22:24:50.066478 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2137 22:24:50.066582 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2138 22:24:50.066687 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2139 22:24:50.066791 # ok 409 Set SVE VL 1632
2140 22:24:50.066896 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2141 22:24:50.066999 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2142 22:24:50.067105 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2143 22:24:50.067208 # ok 413 Set SVE VL 1648
2144 22:24:50.067505 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2145 22:24:50.076383 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2146 22:24:50.076718 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2147 22:24:50.076830 # ok 417 Set SVE VL 1664
2148 22:24:50.076939 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2149 22:24:50.077030 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2150 22:24:50.077132 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2151 22:24:50.077222 # ok 421 Set SVE VL 1680
2152 22:24:50.077326 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2153 22:24:50.077438 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2154 22:24:50.077526 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2155 22:24:50.077628 # ok 425 Set SVE VL 1696
2156 22:24:50.077741 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2157 22:24:50.077844 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2158 22:24:50.078291 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2159 22:24:50.078403 # ok 429 Set SVE VL 1712
2160 22:24:50.078492 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2161 22:24:50.078577 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2162 22:24:50.078676 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2163 22:24:50.078778 # ok 433 Set SVE VL 1728
2164 22:24:50.078881 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2165 22:24:50.078984 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2166 22:24:50.079089 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2167 22:24:50.079193 # ok 437 Set SVE VL 1744
2168 22:24:50.079301 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2169 22:24:50.081030 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2170 22:24:50.081338 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2171 22:24:50.081441 # ok 441 Set SVE VL 1760
2172 22:24:50.081689 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2173 22:24:50.081788 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2174 22:24:50.082053 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2175 22:24:50.082150 # ok 445 Set SVE VL 1776
2176 22:24:50.082240 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2177 22:24:50.082350 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2178 22:24:50.082440 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2179 22:24:50.082528 # ok 449 Set SVE VL 1792
2180 22:24:50.082632 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2181 22:24:50.082722 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2182 22:24:50.082825 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2183 22:24:50.082915 # ok 453 Set SVE VL 1808
2184 22:24:50.083018 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2185 22:24:50.083109 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2186 22:24:50.083211 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2187 22:24:50.083301 # ok 457 Set SVE VL 1824
2188 22:24:50.083608 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2189 22:24:50.083715 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2190 22:24:50.089593 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2191 22:24:50.089761 # ok 461 Set SVE VL 1840
2192 22:24:50.089871 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2193 22:24:50.089960 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2194 22:24:50.090064 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2195 22:24:50.090177 # ok 465 Set SVE VL 1856
2196 22:24:50.090291 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2197 22:24:50.090886 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2198 22:24:50.091197 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2199 22:24:50.091303 # ok 469 Set SVE VL 1872
2200 22:24:50.091400 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2201 22:24:50.091501 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2202 22:24:50.100547 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2203 22:24:50.100719 # ok 473 Set SVE VL 1888
2204 22:24:50.101020 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2205 22:24:50.101125 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2206 22:24:50.101213 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2207 22:24:50.101314 # ok 477 Set SVE VL 1904
2208 22:24:50.101401 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2209 22:24:50.101502 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2210 22:24:50.129749 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2211 22:24:50.129986 # ok 481 Set SVE VL 1920
2212 22:24:50.130103 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2213 22:24:50.130197 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2214 22:24:50.130287 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2215 22:24:50.130392 # ok 485 Set SVE VL 1936
2216 22:24:50.130482 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2217 22:24:50.130567 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2218 22:24:50.130675 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2219 22:24:50.130767 # ok 489 Set SVE VL 1952
2220 22:24:50.130855 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2221 22:24:50.130961 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2222 22:24:50.131053 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2223 22:24:50.131143 # ok 493 Set SVE VL 1968
2224 22:24:50.131247 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2225 22:24:50.131355 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2226 22:24:50.131463 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2227 22:24:50.131568 # ok 497 Set SVE VL 1984
2228 22:24:50.131858 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2229 22:24:50.137407 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2230 22:24:50.137770 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2231 22:24:50.137859 # ok 501 Set SVE VL 2000
2232 22:24:50.137977 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2233 22:24:50.138088 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2234 22:24:50.138199 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2235 22:24:50.138290 # ok 505 Set SVE VL 2016
2236 22:24:50.138397 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2237 22:24:50.138488 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2238 22:24:50.138589 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2239 22:24:50.138655 # ok 509 Set SVE VL 2032
2240 22:24:50.138726 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2241 22:24:50.138988 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2242 22:24:50.139095 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2243 22:24:50.139180 # ok 513 Set SVE VL 2048
2244 22:24:50.139274 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2245 22:24:50.139361 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2246 22:24:50.139611 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2247 22:24:50.139728 # ok 517 Set SVE VL 2064
2248 22:24:50.148575 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2249 22:24:50.148964 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2250 22:24:50.149053 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2251 22:24:50.149174 # ok 521 Set SVE VL 2080
2252 22:24:50.149277 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2253 22:24:50.149369 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2254 22:24:50.149675 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2255 22:24:50.149781 # ok 525 Set SVE VL 2096
2256 22:24:50.149882 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2257 22:24:50.149997 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2258 22:24:50.150108 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2259 22:24:50.150205 # ok 529 Set SVE VL 2112
2260 22:24:50.150304 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2261 22:24:50.150383 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2262 22:24:50.150704 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2263 22:24:50.150824 # ok 533 Set SVE VL 2128
2264 22:24:50.150919 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2265 22:24:50.151010 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2266 22:24:50.151114 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2267 22:24:50.151204 # ok 537 Set SVE VL 2144
2268 22:24:50.151293 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2269 22:24:50.151394 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2270 22:24:50.151481 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2271 22:24:50.151565 # ok 541 Set SVE VL 2160
2272 22:24:50.151662 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2273 22:24:50.161463 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2274 22:24:50.161832 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2275 22:24:50.161917 # ok 545 Set SVE VL 2176
2276 22:24:50.161996 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2277 22:24:50.162112 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2278 22:24:50.162222 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2279 22:24:50.162325 # ok 549 Set SVE VL 2192
2280 22:24:50.162615 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2281 22:24:50.162722 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2282 22:24:50.162811 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2283 22:24:50.162897 # ok 553 Set SVE VL 2208
2284 22:24:50.162998 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2285 22:24:50.163084 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2286 22:24:50.163168 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2287 22:24:50.163268 # ok 557 Set SVE VL 2224
2288 22:24:50.163353 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2289 22:24:50.163454 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2290 22:24:50.163558 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2291 22:24:50.163851 # ok 561 Set SVE VL 2240
2292 22:24:50.163974 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2293 22:24:50.164282 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2294 22:24:50.164388 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2295 22:24:50.164499 # ok 565 Set SVE VL 2256
2296 22:24:50.164589 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2297 22:24:50.164692 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2298 22:24:50.164797 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2299 22:24:50.164886 # ok 569 Set SVE VL 2272
2300 22:24:50.164988 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2301 22:24:50.165091 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2302 22:24:50.165196 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2303 22:24:50.165299 # ok 573 Set SVE VL 2288
2304 22:24:50.165589 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2305 22:24:50.165710 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2306 22:24:50.165826 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2307 22:24:50.166105 # ok 577 Set SVE VL 2304
2308 22:24:50.166215 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2309 22:24:50.166315 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2310 22:24:50.166420 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2311 22:24:50.166510 # ok 581 Set SVE VL 2320
2312 22:24:50.166594 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2313 22:24:50.166694 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2314 22:24:50.166783 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2315 22:24:50.166868 # ok 585 Set SVE VL 2336
2316 22:24:50.166965 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2317 22:24:50.167050 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2318 22:24:50.167148 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2319 22:24:50.167248 # ok 589 Set SVE VL 2352
2320 22:24:50.167347 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2321 22:24:50.167648 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2322 22:24:50.169851 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2323 22:24:50.169968 # ok 593 Set SVE VL 2368
2324 22:24:50.170060 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2325 22:24:50.170149 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2326 22:24:50.170236 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2327 22:24:50.170321 # ok 597 Set SVE VL 2384
2328 22:24:50.170405 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2329 22:24:50.170490 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2330 22:24:50.170578 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2331 22:24:50.170666 # ok 601 Set SVE VL 2400
2332 22:24:50.170750 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2333 22:24:50.170834 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2334 22:24:50.170917 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2335 22:24:50.171002 # ok 605 Set SVE VL 2416
2336 22:24:50.171086 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2337 22:24:50.171173 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2338 22:24:50.171261 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2339 22:24:50.171348 # ok 609 Set SVE VL 2432
2340 22:24:50.171435 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2341 22:24:50.171521 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2342 22:24:50.171605 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2343 22:24:50.171908 # ok 613 Set SVE VL 2448
2344 22:24:50.172016 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2345 22:24:50.172106 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2346 22:24:50.172193 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2347 22:24:50.172276 # ok 617 Set SVE VL 2464
2348 22:24:50.172361 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2349 22:24:50.172450 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2350 22:24:50.172535 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2351 22:24:50.172619 # ok 621 Set SVE VL 2480
2352 22:24:50.172705 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2353 22:24:50.172791 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2354 22:24:50.172875 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2355 22:24:50.172960 # ok 625 Set SVE VL 2496
2356 22:24:50.173044 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2357 22:24:50.173129 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2358 22:24:50.173213 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2359 22:24:50.173298 # ok 629 Set SVE VL 2512
2360 22:24:50.173382 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2361 22:24:50.173492 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2362 22:24:50.173581 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2363 22:24:50.173677 # ok 633 Set SVE VL 2528
2364 22:24:50.173765 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2365 22:24:50.173851 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2366 22:24:50.173936 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2367 22:24:50.174022 # ok 637 Set SVE VL 2544
2368 22:24:50.174107 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2369 22:24:50.174191 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2370 22:24:50.174259 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2371 22:24:50.174326 # ok 641 Set SVE VL 2560
2372 22:24:50.174409 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2373 22:24:50.174507 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2374 22:24:50.174631 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2375 22:24:50.174720 # ok 645 Set SVE VL 2576
2376 22:24:50.174803 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2377 22:24:50.174901 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2378 22:24:50.174989 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2379 22:24:50.175074 # ok 649 Set SVE VL 2592
2380 22:24:50.175158 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2381 22:24:50.175245 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2382 22:24:50.175330 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2383 22:24:50.175417 # ok 653 Set SVE VL 2608
2384 22:24:50.175519 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2385 22:24:50.175608 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2386 22:24:50.175694 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2387 22:24:50.175992 # ok 657 Set SVE VL 2624
2388 22:24:50.176096 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2389 22:24:50.176185 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2390 22:24:50.176270 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2391 22:24:50.176353 # ok 661 Set SVE VL 2640
2392 22:24:50.176436 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2393 22:24:50.176518 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2394 22:24:50.176603 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2395 22:24:50.176690 # ok 665 Set SVE VL 2656
2396 22:24:50.176988 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2397 22:24:50.193271 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2398 22:24:50.193491 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2399 22:24:50.193603 # ok 669 Set SVE VL 2672
2400 22:24:50.193703 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2401 22:24:50.193790 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2402 22:24:50.193891 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2403 22:24:50.193980 # ok 673 Set SVE VL 2688
2404 22:24:50.194087 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2405 22:24:50.194192 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2406 22:24:50.194281 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2407 22:24:50.194383 # ok 677 Set SVE VL 2704
2408 22:24:50.194486 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2409 22:24:50.194784 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2410 22:24:50.194888 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2411 22:24:50.194977 # ok 681 Set SVE VL 2720
2412 22:24:50.195080 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2413 22:24:50.195170 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2414 22:24:50.195273 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2415 22:24:50.195363 # ok 685 Set SVE VL 2736
2416 22:24:50.195465 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2417 22:24:50.195568 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2418 22:24:50.200927 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2419 22:24:50.201311 # ok 689 Set SVE VL 2752
2420 22:24:50.201417 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2421 22:24:50.201505 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2422 22:24:50.201613 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2423 22:24:50.201709 # ok 693 Set SVE VL 2768
2424 22:24:50.201792 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2425 22:24:50.201891 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2426 22:24:50.201991 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2427 22:24:50.202078 # ok 697 Set SVE VL 2784
2428 22:24:50.202396 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2429 22:24:50.202505 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2430 22:24:50.202595 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2431 22:24:50.202697 # ok 701 Set SVE VL 2800
2432 22:24:50.202786 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2433 22:24:50.202874 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2434 22:24:50.202975 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2435 22:24:50.203062 # ok 705 Set SVE VL 2816
2436 22:24:50.203146 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2437 22:24:50.203246 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2438 22:24:50.203346 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2439 22:24:50.203448 # ok 709 Set SVE VL 2832
2440 22:24:50.203539 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2441 22:24:50.203964 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2442 22:24:50.204280 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2443 22:24:50.204389 # ok 713 Set SVE VL 2848
2444 22:24:50.204493 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2445 22:24:50.204597 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2446 22:24:50.204706 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2447 22:24:50.205040 # ok 717 Set SVE VL 2864
2448 22:24:50.205145 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2449 22:24:50.205251 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2450 22:24:50.205339 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2451 22:24:50.205637 # ok 721 Set SVE VL 2880
2452 22:24:50.205779 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2453 22:24:50.205870 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2454 22:24:50.205974 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2455 22:24:50.206068 # ok 725 Set SVE VL 2896
2456 22:24:50.206154 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2457 22:24:50.206239 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2458 22:24:50.206341 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2459 22:24:50.206429 # ok 729 Set SVE VL 2912
2460 22:24:50.206513 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2461 22:24:50.206614 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2462 22:24:50.206702 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2463 22:24:50.206788 # ok 733 Set SVE VL 2928
2464 22:24:50.206888 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2465 22:24:50.206975 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2466 22:24:50.207076 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2467 22:24:50.207177 # ok 737 Set SVE VL 2944
2468 22:24:50.207278 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2469 22:24:50.207378 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2470 22:24:50.207479 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2471 22:24:50.207579 # ok 741 Set SVE VL 2960
2472 22:24:50.208060 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2473 22:24:50.208184 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2474 22:24:50.208289 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2475 22:24:50.208389 # ok 745 Set SVE VL 2976
2476 22:24:50.208489 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2477 22:24:50.208784 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2478 22:24:50.208891 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2479 22:24:50.208987 # ok 749 Set SVE VL 2992
2480 22:24:50.209068 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2481 22:24:50.209158 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2482 22:24:50.209250 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2483 22:24:50.209342 # ok 753 Set SVE VL 3008
2484 22:24:50.209422 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2485 22:24:50.209512 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2486 22:24:50.209603 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2487 22:24:50.209705 # ok 757 Set SVE VL 3024
2488 22:24:50.209797 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2489 22:24:50.210090 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2490 22:24:50.210196 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2491 22:24:50.210301 # ok 761 Set SVE VL 3040
2492 22:24:50.210391 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2493 22:24:50.210495 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2494 22:24:50.210601 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2495 22:24:50.210689 # ok 765 Set SVE VL 3056
2496 22:24:50.210788 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2497 22:24:50.210892 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2498 22:24:50.210995 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2499 22:24:50.211096 # ok 769 Set SVE VL 3072
2500 22:24:50.211397 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2501 22:24:50.211503 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2502 22:24:50.211606 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2503 22:24:50.211897 # ok 773 Set SVE VL 3088
2504 22:24:50.212216 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2505 22:24:50.213839 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2506 22:24:50.213948 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2507 22:24:50.214042 # ok 777 Set SVE VL 3104
2508 22:24:50.214125 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2509 22:24:50.214212 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2510 22:24:50.214299 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2511 22:24:50.214384 # ok 781 Set SVE VL 3120
2512 22:24:50.214469 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2513 22:24:50.214553 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2514 22:24:50.214637 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2515 22:24:50.214722 # ok 785 Set SVE VL 3136
2516 22:24:50.214807 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2517 22:24:50.215133 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2518 22:24:50.215239 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2519 22:24:50.215327 # ok 789 Set SVE VL 3152
2520 22:24:50.215413 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2521 22:24:50.215500 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2522 22:24:50.215587 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2523 22:24:50.215673 # ok 793 Set SVE VL 3168
2524 22:24:50.215758 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2525 22:24:50.215860 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2526 22:24:50.215948 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2527 22:24:50.216033 # ok 797 Set SVE VL 3184
2528 22:24:50.216134 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2529 22:24:50.216240 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2530 22:24:50.216328 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2531 22:24:50.216414 # ok 801 Set SVE VL 3200
2532 22:24:50.216516 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2533 22:24:50.216606 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2534 22:24:50.216706 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2535 22:24:50.216793 # ok 805 Set SVE VL 3216
2536 22:24:50.217207 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2537 22:24:50.217314 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2538 22:24:50.217404 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2539 22:24:50.217490 # ok 809 Set SVE VL 3232
2540 22:24:50.217592 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2541 22:24:50.217693 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2542 22:24:50.217779 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2543 22:24:50.217864 # ok 813 Set SVE VL 3248
2544 22:24:50.217966 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2545 22:24:50.218051 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2546 22:24:50.218151 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2547 22:24:50.218240 # ok 817 Set SVE VL 3264
2548 22:24:50.218593 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2549 22:24:50.218700 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2550 22:24:50.218803 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2551 22:24:50.218890 # ok 821 Set SVE VL 3280
2552 22:24:50.218990 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2553 22:24:50.219091 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2554 22:24:50.219192 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2555 22:24:50.219280 # ok 825 Set SVE VL 3296
2556 22:24:50.219364 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2557 22:24:50.219466 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2558 22:24:50.219568 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2559 22:24:50.219656 # ok 829 Set SVE VL 3312
2560 22:24:50.220193 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2561 22:24:50.220299 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2562 22:24:50.220405 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2563 22:24:50.220494 # ok 833 Set SVE VL 3328
2564 22:24:50.220595 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2565 22:24:50.221822 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2566 22:24:50.221938 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2567 22:24:50.222028 # ok 837 Set SVE VL 3344
2568 22:24:50.222115 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2569 22:24:50.222204 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2570 22:24:50.222291 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2571 22:24:50.222377 # ok 841 Set SVE VL 3360
2572 22:24:50.222462 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2573 22:24:50.222548 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2574 22:24:50.222639 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2575 22:24:50.222726 # ok 845 Set SVE VL 3376
2576 22:24:50.222812 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2577 22:24:50.223174 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2578 22:24:50.223281 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2579 22:24:50.223367 # ok 849 Set SVE VL 3392
2580 22:24:50.223453 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2581 22:24:50.223539 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2582 22:24:50.223629 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2583 22:24:50.223714 # ok 853 Set SVE VL 3408
2584 22:24:50.223799 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2585 22:24:50.235780 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2586 22:24:50.237129 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2587 22:24:50.237450 # ok 857 Set SVE VL 3424
2588 22:24:50.237554 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2589 22:24:50.237687 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2590 22:24:50.237803 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2591 22:24:50.237905 # ok 861 Set SVE VL 3440
2592 22:24:50.237990 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2593 22:24:50.238090 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2594 22:24:50.238187 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2595 22:24:50.238271 # ok 865 Set SVE VL 3456
2596 22:24:50.238365 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2597 22:24:50.238460 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2598 22:24:50.238589 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2599 22:24:50.238713 # ok 869 Set SVE VL 3472
2600 22:24:50.238811 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2601 22:24:50.238905 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2602 22:24:50.239208 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2603 22:24:50.239316 # ok 873 Set SVE VL 3488
2604 22:24:50.239399 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2605 22:24:50.239493 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2606 22:24:50.239588 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2607 22:24:50.242877 # ok 877 Set SVE VL 3504
2608 22:24:50.243241 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2609 22:24:50.243341 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2610 22:24:50.243419 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2611 22:24:50.243508 # ok 881 Set SVE VL 3520
2612 22:24:50.243596 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2613 22:24:50.244536 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2614 22:24:50.244845 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2615 22:24:50.244952 # ok 885 Set SVE VL 3536
2616 22:24:50.245053 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2617 22:24:50.247974 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2618 22:24:50.248172 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2619 22:24:50.248266 # ok 889 Set SVE VL 3552
2620 22:24:50.248353 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2621 22:24:50.248438 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2622 22:24:50.248524 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2623 22:24:50.248612 # ok 893 Set SVE VL 3568
2624 22:24:50.248697 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2625 22:24:50.248783 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2626 22:24:50.248868 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2627 22:24:50.248954 # ok 897 Set SVE VL 3584
2628 22:24:50.249038 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2629 22:24:50.249122 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2630 22:24:50.249207 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2631 22:24:50.249288 # ok 901 Set SVE VL 3600
2632 22:24:50.249367 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2633 22:24:50.249449 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2634 22:24:50.249528 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2635 22:24:50.249610 # ok 905 Set SVE VL 3616
2636 22:24:50.249704 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2637 22:24:50.249786 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2638 22:24:50.249869 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2639 22:24:50.249977 # ok 909 Set SVE VL 3632
2640 22:24:50.250064 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2641 22:24:50.250149 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2642 22:24:50.250233 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2643 22:24:50.250316 # ok 913 Set SVE VL 3648
2644 22:24:50.250401 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2645 22:24:50.250481 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2646 22:24:50.250563 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2647 22:24:50.250648 # ok 917 Set SVE VL 3664
2648 22:24:50.250731 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2649 22:24:50.250814 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2650 22:24:50.250896 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2651 22:24:50.250999 # ok 921 Set SVE VL 3680
2652 22:24:50.251082 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2653 22:24:50.251163 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2654 22:24:50.251244 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2655 22:24:50.251327 # ok 925 Set SVE VL 3696
2656 22:24:50.251409 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2657 22:24:50.251494 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2658 22:24:50.251579 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2659 22:24:50.251667 # ok 929 Set SVE VL 3712
2660 22:24:50.251759 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2661 22:24:50.252059 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2662 22:24:50.252167 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2663 22:24:50.252257 # ok 933 Set SVE VL 3728
2664 22:24:50.252344 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2665 22:24:50.252427 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2666 22:24:50.252529 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2667 22:24:50.252618 # ok 937 Set SVE VL 3744
2668 22:24:50.252702 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2669 22:24:50.252785 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2670 22:24:50.252883 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2671 22:24:50.253765 # ok 941 Set SVE VL 3760
2672 22:24:50.253873 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2673 22:24:50.253961 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2674 22:24:50.254045 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2675 22:24:50.254128 # ok 945 Set SVE VL 3776
2676 22:24:50.254789 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2677 22:24:50.254899 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2678 22:24:50.254985 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2679 22:24:50.255070 # ok 949 Set SVE VL 3792
2680 22:24:50.255154 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2681 22:24:50.255239 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2682 22:24:50.255323 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2683 22:24:50.255405 # ok 953 Set SVE VL 3808
2684 22:24:50.255506 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2685 22:24:50.255594 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2686 22:24:50.255677 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2687 22:24:50.255760 # ok 957 Set SVE VL 3824
2688 22:24:50.255842 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2689 22:24:50.255923 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2690 22:24:50.256003 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2691 22:24:50.256102 # ok 961 Set SVE VL 3840
2692 22:24:50.256206 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2693 22:24:50.256311 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2694 22:24:50.256422 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2695 22:24:50.256514 # ok 965 Set SVE VL 3856
2696 22:24:50.256613 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2697 22:24:50.256699 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2698 22:24:50.256798 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2699 22:24:50.256884 # ok 969 Set SVE VL 3872
2700 22:24:50.256967 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2701 22:24:50.257066 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2702 22:24:50.257152 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2703 22:24:50.257250 # ok 973 Set SVE VL 3888
2704 22:24:50.257335 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2705 22:24:50.257434 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2706 22:24:50.257520 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2707 22:24:50.257621 # ok 977 Set SVE VL 3904
2708 22:24:50.257719 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2709 22:24:50.257817 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2710 22:24:50.258423 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2711 22:24:50.258541 # ok 981 Set SVE VL 3920
2712 22:24:50.258636 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2713 22:24:50.258718 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2714 22:24:50.258797 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2715 22:24:50.259186 # ok 985 Set SVE VL 3936
2716 22:24:50.259478 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2717 22:24:50.259698 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2718 22:24:50.259785 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2719 22:24:50.259870 # ok 989 Set SVE VL 3952
2720 22:24:50.259952 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2721 22:24:50.260035 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2722 22:24:50.260117 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2723 22:24:50.260201 # ok 993 Set SVE VL 3968
2724 22:24:50.260300 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2725 22:24:50.260594 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2726 22:24:50.260697 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2727 22:24:50.260780 # ok 997 Set SVE VL 3984
2728 22:24:50.261942 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2729 22:24:50.262110 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2730 22:24:50.262379 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2731 22:24:50.262586 # ok 1001 Set SVE VL 4000
2732 22:24:50.262761 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2733 22:24:50.262914 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2734 22:24:50.263023 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2735 22:24:50.263114 # ok 1005 Set SVE VL 4016
2736 22:24:50.263205 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2737 22:24:50.263292 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2738 22:24:50.263384 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2739 22:24:50.263481 # ok 1009 Set SVE VL 4032
2740 22:24:50.263621 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2741 22:24:50.263750 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2742 22:24:50.263861 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2743 22:24:50.263991 # ok 1013 Set SVE VL 4048
2744 22:24:50.264113 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2745 22:24:50.264242 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2746 22:24:50.264386 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2747 22:24:50.264556 # ok 1017 Set SVE VL 4064
2748 22:24:50.264704 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2749 22:24:50.264830 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2750 22:24:50.264930 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2751 22:24:50.265020 # ok 1021 Set SVE VL 4080
2752 22:24:50.265107 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2753 22:24:50.265193 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2754 22:24:50.265283 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2755 22:24:50.265434 # ok 1025 Set SVE VL 4096
2756 22:24:50.265554 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2757 22:24:50.265668 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2758 22:24:50.265762 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2759 22:24:50.265849 # ok 1029 Set SVE VL 4112
2760 22:24:50.265935 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2761 22:24:50.266022 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2762 22:24:50.266108 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2763 22:24:50.266227 # ok 1033 Set SVE VL 4128
2764 22:24:50.266319 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2765 22:24:50.266407 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2766 22:24:50.266496 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2767 22:24:50.266606 # ok 1037 Set SVE VL 4144
2768 22:24:50.266872 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2769 22:24:50.266939 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2770 22:24:50.266999 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2771 22:24:50.281436 # ok 1041 Set SVE VL 4160
2772 22:24:50.281630 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2773 22:24:50.281931 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2774 22:24:50.282037 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2775 22:24:50.282147 # ok 1045 Set SVE VL 4176
2776 22:24:50.282248 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2777 22:24:50.282353 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2778 22:24:50.282646 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2779 22:24:50.282765 # ok 1049 Set SVE VL 4192
2780 22:24:50.282871 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2781 22:24:50.282976 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2782 22:24:50.283072 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2783 22:24:50.283174 # ok 1053 Set SVE VL 4208
2784 22:24:50.283297 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2785 22:24:50.283402 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2786 22:24:50.283505 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2787 22:24:50.283613 # ok 1057 Set SVE VL 4224
2788 22:24:50.283727 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2789 22:24:50.283828 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2790 22:24:50.283900 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2791 22:24:50.283960 # ok 1061 Set SVE VL 4240
2792 22:24:50.287534 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2793 22:24:50.288988 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2794 22:24:50.289386 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2795 22:24:50.289497 # ok 1065 Set SVE VL 4256
2796 22:24:50.289600 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2797 22:24:50.289746 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2798 22:24:50.289861 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2799 22:24:50.289977 # ok 1069 Set SVE VL 4272
2800 22:24:50.290088 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2801 22:24:50.290176 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2802 22:24:50.290276 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2803 22:24:50.290366 # ok 1073 Set SVE VL 4288
2804 22:24:50.290449 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2805 22:24:50.290581 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2806 22:24:50.290678 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2807 22:24:50.290781 # ok 1077 Set SVE VL 4304
2808 22:24:50.290869 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2809 22:24:50.290970 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2810 22:24:50.291057 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2811 22:24:50.291158 # ok 1081 Set SVE VL 4320
2812 22:24:50.291258 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2813 22:24:50.291581 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2814 22:24:50.291663 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2815 22:24:50.291728 # ok 1085 Set SVE VL 4336
2816 22:24:50.291789 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2817 22:24:50.292308 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2818 22:24:50.292428 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2819 22:24:50.292552 # ok 1089 Set SVE VL 4352
2820 22:24:50.292651 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2821 22:24:50.292775 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2822 22:24:50.292874 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2823 22:24:50.293002 # ok 1093 Set SVE VL 4368
2824 22:24:50.293102 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2825 22:24:50.293225 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2826 22:24:50.293324 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2827 22:24:50.293450 # ok 1097 Set SVE VL 4384
2828 22:24:50.293550 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2829 22:24:50.293680 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2830 22:24:50.293785 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2831 22:24:50.293888 # ok 1101 Set SVE VL 4400
2832 22:24:50.293992 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2833 22:24:50.294082 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2834 22:24:50.294183 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2835 22:24:50.294281 # ok 1105 Set SVE VL 4416
2836 22:24:50.294382 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2837 22:24:50.294482 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2838 22:24:50.294811 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2839 22:24:50.294938 # ok 1109 Set SVE VL 4432
2840 22:24:50.295062 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2841 22:24:50.295162 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2842 22:24:50.295265 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2843 22:24:50.295386 # ok 1113 Set SVE VL 4448
2844 22:24:50.295489 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2845 22:24:50.295591 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2846 22:24:50.295705 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2847 22:24:50.295779 # ok 1117 Set SVE VL 4464
2848 22:24:50.296268 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2849 22:24:50.296382 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2850 22:24:50.296641 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2851 22:24:50.296752 # ok 1121 Set SVE VL 4480
2852 22:24:50.296845 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2853 22:24:50.296949 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2854 22:24:50.297055 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2855 22:24:50.297147 # ok 1125 Set SVE VL 4496
2856 22:24:50.297252 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2857 22:24:50.297338 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2858 22:24:50.297434 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2859 22:24:50.297529 # ok 1129 Set SVE VL 4512
2860 22:24:50.297802 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2861 22:24:50.297898 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2862 22:24:50.298184 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2863 22:24:50.298277 # ok 1133 Set SVE VL 4528
2864 22:24:50.298351 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2865 22:24:50.298454 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2866 22:24:50.298529 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2867 22:24:50.298607 # ok 1137 Set SVE VL 4544
2868 22:24:50.298682 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2869 22:24:50.299022 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2870 22:24:50.299188 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2871 22:24:50.299343 # ok 1141 Set SVE VL 4560
2872 22:24:50.299505 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2873 22:24:50.299660 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2874 22:24:50.299772 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2875 22:24:50.299877 # ok 1145 Set SVE VL 4576
2876 22:24:50.299996 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2877 22:24:50.300135 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2878 22:24:50.300252 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2879 22:24:50.300402 # ok 1149 Set SVE VL 4592
2880 22:24:50.300545 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2881 22:24:50.300666 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2882 22:24:50.300779 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2883 22:24:50.300902 # ok 1153 Set SVE VL 4608
2884 22:24:50.301040 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2885 22:24:50.301135 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2886 22:24:50.301236 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2887 22:24:50.301330 # ok 1157 Set SVE VL 4624
2888 22:24:50.301420 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2889 22:24:50.301532 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2890 22:24:50.301628 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2891 22:24:50.301741 # ok 1161 Set SVE VL 4640
2892 22:24:50.301866 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2893 22:24:50.301959 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2894 22:24:50.302105 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2895 22:24:50.302261 # ok 1165 Set SVE VL 4656
2896 22:24:50.302446 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2897 22:24:50.302592 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2898 22:24:50.302718 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2899 22:24:50.302855 # ok 1169 Set SVE VL 4672
2900 22:24:50.302967 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2901 22:24:50.303088 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2902 22:24:50.303244 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2903 22:24:50.303389 # ok 1173 Set SVE VL 4688
2904 22:24:50.303542 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2905 22:24:50.303710 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2906 22:24:50.303859 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2907 22:24:50.303986 # ok 1177 Set SVE VL 4704
2908 22:24:50.304092 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2909 22:24:50.304261 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2910 22:24:50.304408 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2911 22:24:50.304544 # ok 1181 Set SVE VL 4720
2912 22:24:50.304927 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2913 22:24:50.305036 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2914 22:24:50.305128 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2915 22:24:50.305214 # ok 1185 Set SVE VL 4736
2916 22:24:50.305302 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2917 22:24:50.305390 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2918 22:24:50.305475 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2919 22:24:50.305555 # ok 1189 Set SVE VL 4752
2920 22:24:50.305655 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2921 22:24:50.305736 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2922 22:24:50.305816 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2923 22:24:50.305890 # ok 1193 Set SVE VL 4768
2924 22:24:50.305963 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2925 22:24:50.306053 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2926 22:24:50.306138 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2927 22:24:50.306238 # ok 1197 Set SVE VL 4784
2928 22:24:50.306324 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2929 22:24:50.306421 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2930 22:24:50.306553 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2931 22:24:50.306652 # ok 1201 Set SVE VL 4800
2932 22:24:50.306735 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2933 22:24:50.307024 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2934 22:24:50.307131 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2935 22:24:50.307221 # ok 1205 Set SVE VL 4816
2936 22:24:50.307322 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2937 22:24:50.307604 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2938 22:24:50.307711 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2939 22:24:50.307810 # ok 1209 Set SVE VL 4832
2940 22:24:50.307900 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2941 22:24:50.308004 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2942 22:24:50.308979 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2943 22:24:50.309089 # ok 1213 Set SVE VL 4848
2944 22:24:50.309752 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2945 22:24:50.309859 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2946 22:24:50.309938 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2947 22:24:50.310017 # ok 1217 Set SVE VL 4864
2948 22:24:50.310094 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2949 22:24:50.310167 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2950 22:24:50.310238 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2951 22:24:50.310310 # ok 1221 Set SVE VL 4880
2952 22:24:50.310381 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2953 22:24:50.310452 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2954 22:24:50.333578 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2955 22:24:50.333837 # ok 1225 Set SVE VL 4896
2956 22:24:50.333989 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2957 22:24:50.334071 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2958 22:24:50.334163 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2959 22:24:50.334239 # ok 1229 Set SVE VL 4912
2960 22:24:50.334312 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2961 22:24:50.334384 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2962 22:24:50.334455 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2963 22:24:50.334546 # ok 1233 Set SVE VL 4928
2964 22:24:50.334625 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2965 22:24:50.334699 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2966 22:24:50.334778 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2967 22:24:50.334850 # ok 1237 Set SVE VL 4944
2968 22:24:50.335192 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2969 22:24:50.335289 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2970 22:24:50.335365 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2971 22:24:50.335440 # ok 1241 Set SVE VL 4960
2972 22:24:50.335517 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2973 22:24:50.335596 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2974 22:24:50.335677 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2975 22:24:50.335777 # ok 1245 Set SVE VL 4976
2976 22:24:50.335860 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2977 22:24:50.335942 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2978 22:24:50.341358 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2979 22:24:50.341609 # ok 1249 Set SVE VL 4992
2980 22:24:50.341714 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2981 22:24:50.341801 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2982 22:24:50.341939 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2983 22:24:50.342026 # ok 1253 Set SVE VL 5008
2984 22:24:50.342099 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2985 22:24:50.342171 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2986 22:24:50.342243 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2987 22:24:50.342316 # ok 1257 Set SVE VL 5024
2988 22:24:50.342388 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2989 22:24:50.342459 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2990 22:24:50.342532 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2991 22:24:50.342604 # ok 1261 Set SVE VL 5040
2992 22:24:50.342676 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2993 22:24:50.342748 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2994 22:24:50.342821 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2995 22:24:50.343506 # ok 1265 Set SVE VL 5056
2996 22:24:50.343699 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2997 22:24:50.343989 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2998 22:24:50.344305 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2999 22:24:50.344427 # ok 1269 Set SVE VL 5072
3000 22:24:50.344796 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
3001 22:24:50.345111 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
3002 22:24:50.345261 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3003 22:24:50.345357 # ok 1273 Set SVE VL 5088
3004 22:24:50.349764 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3005 22:24:50.350002 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3006 22:24:50.350082 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3007 22:24:50.350156 # ok 1277 Set SVE VL 5104
3008 22:24:50.350232 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3009 22:24:50.350306 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3010 22:24:50.350379 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3011 22:24:50.350451 # ok 1281 Set SVE VL 5120
3012 22:24:50.350522 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3013 22:24:50.350593 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3014 22:24:50.350666 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3015 22:24:50.350740 # ok 1285 Set SVE VL 5136
3016 22:24:50.350815 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3017 22:24:50.350898 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3018 22:24:50.350978 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3019 22:24:50.351065 # ok 1289 Set SVE VL 5152
3020 22:24:50.351151 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3021 22:24:50.351236 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3022 22:24:50.351319 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3023 22:24:50.351398 # ok 1293 Set SVE VL 5168
3024 22:24:50.351473 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3025 22:24:50.351549 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3026 22:24:50.351624 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3027 22:24:50.351699 # ok 1297 Set SVE VL 5184
3028 22:24:50.351778 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3029 22:24:50.351859 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3030 22:24:50.351944 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3031 22:24:50.352027 # ok 1301 Set SVE VL 5200
3032 22:24:50.352111 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3033 22:24:50.352195 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3034 22:24:50.352276 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3035 22:24:50.352358 # ok 1305 Set SVE VL 5216
3036 22:24:50.352441 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3037 22:24:50.352526 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3038 22:24:50.352609 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3039 22:24:50.352692 # ok 1309 Set SVE VL 5232
3040 22:24:50.352777 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3041 22:24:50.352864 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3042 22:24:50.352949 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3043 22:24:50.353033 # ok 1313 Set SVE VL 5248
3044 22:24:50.353414 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3045 22:24:50.353522 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3046 22:24:50.353611 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3047 22:24:50.353709 # ok 1317 Set SVE VL 5264
3048 22:24:50.353794 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3049 22:24:50.353879 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3050 22:24:50.353953 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3051 22:24:50.354025 # ok 1321 Set SVE VL 5280
3052 22:24:50.354097 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3053 22:24:50.354171 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3054 22:24:50.354244 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3055 22:24:50.354318 # ok 1325 Set SVE VL 5296
3056 22:24:50.354391 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3057 22:24:50.354465 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3058 22:24:50.354538 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3059 22:24:50.354613 # ok 1329 Set SVE VL 5312
3060 22:24:50.354686 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3061 22:24:50.354764 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3062 22:24:50.354838 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3063 22:24:50.354917 # ok 1333 Set SVE VL 5328
3064 22:24:50.354998 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3065 22:24:50.355082 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3066 22:24:50.355191 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3067 22:24:50.355278 # ok 1337 Set SVE VL 5344
3068 22:24:50.355362 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3069 22:24:50.355447 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3070 22:24:50.355532 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3071 22:24:50.355616 # ok 1341 Set SVE VL 5360
3072 22:24:50.355699 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3073 22:24:50.355783 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3074 22:24:50.355869 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3075 22:24:50.355953 # ok 1345 Set SVE VL 5376
3076 22:24:50.356037 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3077 22:24:50.356120 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3078 22:24:50.356203 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3079 22:24:50.356287 # ok 1349 Set SVE VL 5392
3080 22:24:50.356372 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3081 22:24:50.356461 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3082 22:24:50.356571 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3083 22:24:50.356660 # ok 1353 Set SVE VL 5408
3084 22:24:50.356743 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3085 22:24:50.356827 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3086 22:24:50.362484 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3087 22:24:50.362851 # ok 1357 Set SVE VL 5424
3088 22:24:50.362998 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3089 22:24:50.363126 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3090 22:24:50.363249 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3091 22:24:50.363377 # ok 1361 Set SVE VL 5440
3092 22:24:50.363848 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3093 22:24:50.363955 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3094 22:24:50.364042 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3095 22:24:50.364128 # ok 1365 Set SVE VL 5456
3096 22:24:50.364214 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3097 22:24:50.372605 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3098 22:24:50.373044 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3099 22:24:50.373138 # ok 1369 Set SVE VL 5472
3100 22:24:50.373204 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3101 22:24:50.373278 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3102 22:24:50.373369 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3103 22:24:50.373456 # ok 1373 Set SVE VL 5488
3104 22:24:50.373547 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3105 22:24:50.373640 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3106 22:24:50.373757 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3107 22:24:50.373885 # ok 1377 Set SVE VL 5504
3108 22:24:50.373979 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3109 22:24:50.374073 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3110 22:24:50.374157 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3111 22:24:50.374273 # ok 1381 Set SVE VL 5520
3112 22:24:50.374376 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3113 22:24:50.374486 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3114 22:24:50.374574 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3115 22:24:50.374674 # ok 1385 Set SVE VL 5536
3116 22:24:50.374792 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3117 22:24:50.374913 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3118 22:24:50.375252 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3119 22:24:50.375365 # ok 1389 Set SVE VL 5552
3120 22:24:50.375471 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3121 22:24:50.375594 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3122 22:24:50.375694 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3123 22:24:50.375783 # ok 1393 Set SVE VL 5568
3124 22:24:50.375865 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3125 22:24:50.384951 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3126 22:24:50.385460 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3127 22:24:50.385569 # ok 1397 Set SVE VL 5584
3128 22:24:50.385690 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3129 22:24:50.385998 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3130 22:24:50.386113 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3131 22:24:50.386222 # ok 1401 Set SVE VL 5600
3132 22:24:50.386337 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3133 22:24:50.386662 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3134 22:24:50.386764 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3135 22:24:50.386849 # ok 1405 Set SVE VL 5616
3136 22:24:50.386936 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3137 22:24:50.459592 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3138 22:24:50.459834 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3139 22:24:50.459931 # ok 1409 Set SVE VL 5632
3140 22:24:50.460043 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3141 22:24:50.478841 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3142 22:24:50.479312 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3143 22:24:50.479421 # ok 1413 Set SVE VL 5648
3144 22:24:50.479516 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3145 22:24:50.479606 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3146 22:24:50.479709 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3147 22:24:50.479798 # ok 1417 Set SVE VL 5664
3148 22:24:50.479884 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3149 22:24:50.479976 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3150 22:24:50.502428 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3151 22:24:50.502882 # ok 1421 Set SVE VL 5680
3152 22:24:50.502976 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3153 22:24:50.503062 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3154 22:24:50.503143 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3155 22:24:50.503224 # ok 1425 Set SVE VL 5696
3156 22:24:50.503323 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3157 22:24:50.503409 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3158 22:24:50.503493 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3159 22:24:50.503574 # ok 1429 Set SVE VL 5712
3160 22:24:50.503675 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3161 22:24:50.503760 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3162 22:24:50.503844 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3163 22:24:50.503946 # ok 1433 Set SVE VL 5728
3164 22:24:50.527342 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3165 22:24:50.527579 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3166 22:24:50.527695 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3167 22:24:50.527787 # ok 1437 Set SVE VL 5744
3168 22:24:50.527874 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3169 22:24:50.527962 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3170 22:24:50.528067 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3171 22:24:50.528161 # ok 1441 Set SVE VL 5760
3172 22:24:50.528247 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3173 22:24:50.528348 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3174 22:24:50.528434 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3175 22:24:50.528517 # ok 1445 Set SVE VL 5776
3176 22:24:50.528616 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3177 22:24:50.529015 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3178 22:24:50.529124 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3179 22:24:50.529216 # ok 1449 Set SVE VL 5792
3180 22:24:50.529301 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3181 22:24:50.529385 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3182 22:24:50.529486 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3183 22:24:50.529574 # ok 1453 Set SVE VL 5808
3184 22:24:50.529671 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3185 22:24:50.529758 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3186 22:24:50.530240 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3187 22:24:50.530351 # ok 1457 Set SVE VL 5824
3188 22:24:50.530436 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3189 22:24:50.530518 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3190 22:24:50.530601 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3191 22:24:50.561938 # ok 1461 Set SVE VL 5840
3192 22:24:50.562424 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3193 22:24:50.562540 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3194 22:24:50.562645 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3195 22:24:50.562748 # ok 1465 Set SVE VL 5856
3196 22:24:50.562852 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3197 22:24:50.562972 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3198 22:24:50.563073 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3199 22:24:50.563699 # ok 1469 Set SVE VL 5872
3200 22:24:50.563793 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3201 22:24:50.563885 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3202 22:24:50.563981 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3203 22:24:50.564054 # ok 1473 Set SVE VL 5888
3204 22:24:50.564128 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3205 22:24:50.564203 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3206 22:24:50.582844 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3207 22:24:50.583164 # ok 1477 Set SVE VL 5904
3208 22:24:50.583374 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3209 22:24:50.583548 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3210 22:24:50.583740 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3211 22:24:50.583930 # ok 1481 Set SVE VL 5920
3212 22:24:50.584059 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3213 22:24:50.584178 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3214 22:24:50.584297 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3215 22:24:50.584412 # ok 1485 Set SVE VL 5936
3216 22:24:50.584527 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3217 22:24:50.584642 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3218 22:24:50.584756 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3219 22:24:50.584896 # ok 1489 Set SVE VL 5952
3220 22:24:50.594557 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3221 22:24:50.595202 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3222 22:24:50.595430 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3223 22:24:50.595680 # ok 1493 Set SVE VL 5968
3224 22:24:50.595918 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3225 22:24:50.596065 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3226 22:24:50.596210 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3227 22:24:50.596353 # ok 1497 Set SVE VL 5984
3228 22:24:50.596495 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3229 22:24:50.596637 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3230 22:24:50.596778 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3231 22:24:50.611805 # ok 1501 Set SVE VL 6000
3232 22:24:50.612335 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3233 22:24:50.619068 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3234 22:24:50.619727 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3235 22:24:50.619929 # ok 1505 Set SVE VL 6016
3236 22:24:50.621188 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3237 22:24:50.621316 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3238 22:24:50.621409 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3239 22:24:50.621499 # ok 1509 Set SVE VL 6032
3240 22:24:50.621585 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3241 22:24:50.621681 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3242 22:24:50.623838 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3243 22:24:50.626691 # ok 1513 Set SVE VL 6048
3244 22:24:50.626904 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3245 22:24:50.627201 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3246 22:24:50.627313 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3247 22:24:50.627408 # ok 1517 Set SVE VL 6064
3248 22:24:50.627497 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3249 22:24:50.627603 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3250 22:24:50.627909 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3251 22:24:50.628017 # ok 1521 Set SVE VL 6080
3252 22:24:50.628105 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3253 22:24:50.628190 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3254 22:24:50.628274 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3255 22:24:50.638189 # ok 1525 Set SVE VL 6096
3256 22:24:50.638717 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3257 22:24:50.638918 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3258 22:24:50.639088 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3259 22:24:50.639253 # ok 1529 Set SVE VL 6112
3260 22:24:50.639416 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3261 22:24:50.639604 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3262 22:24:50.639795 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3263 22:24:50.640023 # ok 1533 Set SVE VL 6128
3264 22:24:50.640165 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3265 22:24:50.640287 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3266 22:24:50.640406 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3267 22:24:50.640524 # ok 1537 Set SVE VL 6144
3268 22:24:50.640642 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3269 22:24:50.640760 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3270 22:24:50.640878 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3271 22:24:50.641011 # ok 1541 Set SVE VL 6160
3272 22:24:50.643015 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3273 22:24:50.645211 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3274 22:24:50.645424 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3275 22:24:50.645605 # ok 1545 Set SVE VL 6176
3276 22:24:50.645836 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3277 22:24:50.646033 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3278 22:24:50.646169 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3279 22:24:50.646288 # ok 1549 Set SVE VL 6192
3280 22:24:50.646405 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3281 22:24:50.646520 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3282 22:24:50.646634 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3283 22:24:50.646750 # ok 1553 Set SVE VL 6208
3284 22:24:50.646864 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3285 22:24:50.647019 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3286 22:24:50.647151 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3287 22:24:50.647269 # ok 1557 Set SVE VL 6224
3288 22:24:50.647382 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3289 22:24:50.647508 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3290 22:24:50.647624 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3291 22:24:50.647754 # ok 1561 Set SVE VL 6240
3292 22:24:50.647871 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3293 22:24:50.647985 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3294 22:24:50.648141 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3295 22:24:50.648265 # ok 1565 Set SVE VL 6256
3296 22:24:50.648384 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3297 22:24:50.648500 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3298 22:24:50.648615 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3299 22:24:50.648743 # ok 1569 Set SVE VL 6272
3300 22:24:50.649433 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3301 22:24:50.649757 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3302 22:24:50.649876 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3303 22:24:50.649955 # ok 1573 Set SVE VL 6288
3304 22:24:50.650046 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3305 22:24:50.650130 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3306 22:24:50.650334 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3307 22:24:50.650441 # ok 1577 Set SVE VL 6304
3308 22:24:50.650736 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3309 22:24:50.651050 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3310 22:24:50.651148 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3311 22:24:50.651232 # ok 1581 Set SVE VL 6320
3312 22:24:50.651318 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3313 22:24:50.651409 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3314 22:24:50.651491 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3315 22:24:50.651577 # ok 1585 Set SVE VL 6336
3316 22:24:50.651679 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3317 22:24:50.651767 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3318 22:24:50.651858 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3319 22:24:50.651947 # ok 1589 Set SVE VL 6352
3320 22:24:50.661517 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3321 22:24:50.662059 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3322 22:24:50.662178 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3323 22:24:50.662290 # ok 1593 Set SVE VL 6368
3324 22:24:50.662400 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3325 22:24:50.662514 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3326 22:24:50.662645 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3327 22:24:50.662754 # ok 1597 Set SVE VL 6384
3328 22:24:50.662852 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3329 22:24:50.662961 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3330 22:24:50.663076 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3331 22:24:50.663189 # ok 1601 Set SVE VL 6400
3332 22:24:50.663307 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3333 22:24:50.663415 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3334 22:24:50.663524 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3335 22:24:50.663636 # ok 1605 Set SVE VL 6416
3336 22:24:50.663771 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3337 22:24:50.663881 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3338 22:24:50.663980 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3339 22:24:50.664067 # ok 1609 Set SVE VL 6432
3340 22:24:50.664151 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3341 22:24:50.664236 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3342 22:24:50.664745 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3343 22:24:50.664859 # ok 1613 Set SVE VL 6448
3344 22:24:50.664943 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3345 22:24:50.665030 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3346 22:24:50.665113 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3347 22:24:50.665202 # ok 1617 Set SVE VL 6464
3348 22:24:50.665308 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3349 22:24:50.665401 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3350 22:24:50.665940 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3351 22:24:50.666038 # ok 1621 Set SVE VL 6480
3352 22:24:50.666128 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3353 22:24:50.666219 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3354 22:24:50.666310 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3355 22:24:50.666405 # ok 1625 Set SVE VL 6496
3356 22:24:50.666495 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3357 22:24:50.666586 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3358 22:24:50.666879 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3359 22:24:50.666991 # ok 1629 Set SVE VL 6512
3360 22:24:50.667083 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3361 22:24:50.667174 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3362 22:24:50.667263 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3363 22:24:50.667354 # ok 1633 Set SVE VL 6528
3364 22:24:50.667448 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3365 22:24:50.667556 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3366 22:24:50.667650 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3367 22:24:50.667741 # ok 1637 Set SVE VL 6544
3368 22:24:50.667831 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3369 22:24:50.667938 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3370 22:24:50.668032 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3371 22:24:50.668120 # ok 1641 Set SVE VL 6560
3372 22:24:50.668219 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3373 22:24:50.668601 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3374 22:24:50.668708 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3375 22:24:50.668794 # ok 1645 Set SVE VL 6576
3376 22:24:50.668877 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3377 22:24:50.669339 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3378 22:24:50.669445 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3379 22:24:50.669532 # ok 1649 Set SVE VL 6592
3380 22:24:50.669615 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3381 22:24:50.669710 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3382 22:24:50.670140 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3383 22:24:50.670247 # ok 1653 Set SVE VL 6608
3384 22:24:50.670334 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3385 22:24:50.670422 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3386 22:24:50.670504 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3387 22:24:50.670588 # ok 1657 Set SVE VL 6624
3388 22:24:50.670673 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3389 22:24:50.670775 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3390 22:24:50.670865 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3391 22:24:50.670949 # ok 1661 Set SVE VL 6640
3392 22:24:50.671665 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3393 22:24:50.671777 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3394 22:24:50.671869 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3395 22:24:50.671958 # ok 1665 Set SVE VL 6656
3396 22:24:50.672046 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3397 22:24:50.672135 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3398 22:24:50.672225 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3399 22:24:50.672315 # ok 1669 Set SVE VL 6672
3400 22:24:50.672403 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3401 22:24:50.672499 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3402 22:24:50.672606 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3403 22:24:50.672698 # ok 1673 Set SVE VL 6688
3404 22:24:50.672786 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3405 22:24:50.673792 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3406 22:24:50.673902 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3407 22:24:50.673980 # ok 1677 Set SVE VL 6704
3408 22:24:50.674056 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3409 22:24:50.674157 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3410 22:24:50.674271 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3411 22:24:50.674379 # ok 1681 Set SVE VL 6720
3412 22:24:50.674494 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3413 22:24:50.674608 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3414 22:24:50.674718 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3415 22:24:50.674829 # ok 1685 Set SVE VL 6736
3416 22:24:50.675280 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3417 22:24:50.675401 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3418 22:24:50.675525 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3419 22:24:50.675638 # ok 1689 Set SVE VL 6752
3420 22:24:50.675751 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3421 22:24:50.675867 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3422 22:24:50.675977 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3423 22:24:50.676085 # ok 1693 Set SVE VL 6768
3424 22:24:50.676197 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3425 22:24:50.676311 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3426 22:24:50.676429 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3427 22:24:50.676545 # ok 1697 Set SVE VL 6784
3428 22:24:50.676680 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3429 22:24:50.676785 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3430 22:24:50.676890 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3431 22:24:50.676995 # ok 1701 Set SVE VL 6800
3432 22:24:50.677103 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3433 22:24:50.677216 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3434 22:24:50.677329 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3435 22:24:50.677442 # ok 1705 Set SVE VL 6816
3436 22:24:50.677557 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3437 22:24:50.677680 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3438 22:24:50.677819 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3439 22:24:50.677923 # ok 1709 Set SVE VL 6832
3440 22:24:50.678024 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3441 22:24:50.678128 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3442 22:24:50.678241 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3443 22:24:50.678357 # ok 1713 Set SVE VL 6848
3444 22:24:50.678473 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3445 22:24:50.678583 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3446 22:24:50.678695 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3447 22:24:50.678804 # ok 1717 Set SVE VL 6864
3448 22:24:50.678912 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3449 22:24:50.679051 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3450 22:24:50.679162 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3451 22:24:50.679275 # ok 1721 Set SVE VL 6880
3452 22:24:50.679385 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3453 22:24:50.679500 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3454 22:24:50.679611 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3455 22:24:50.679721 # ok 1725 Set SVE VL 6896
3456 22:24:50.679830 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3457 22:24:50.679931 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3458 22:24:50.680880 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3459 22:24:50.681009 # ok 1729 Set SVE VL 6912
3460 22:24:50.681122 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3461 22:24:50.681235 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3462 22:24:50.681349 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3463 22:24:50.681459 # ok 1733 Set SVE VL 6928
3464 22:24:50.681570 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3465 22:24:50.681693 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3466 22:24:50.681799 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3467 22:24:50.681900 # ok 1737 Set SVE VL 6944
3468 22:24:50.682001 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3469 22:24:50.682110 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3470 22:24:50.682224 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3471 22:24:50.682336 # ok 1741 Set SVE VL 6960
3472 22:24:50.682450 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3473 22:24:50.682562 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3474 22:24:50.682704 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3475 22:24:50.682816 # ok 1745 Set SVE VL 6976
3476 22:24:50.682927 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3477 22:24:50.683037 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3478 22:24:50.683153 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3479 22:24:50.683269 # ok 1749 Set SVE VL 6992
3480 22:24:50.683381 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3481 22:24:50.683491 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3482 22:24:50.683594 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3483 22:24:50.683704 # ok 1753 Set SVE VL 7008
3484 22:24:50.683815 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3485 22:24:50.683925 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3486 22:24:50.684026 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3487 22:24:50.684133 # ok 1757 Set SVE VL 7024
3488 22:24:50.684271 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3489 22:24:50.684383 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3490 22:24:50.684503 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3491 22:24:50.684619 # ok 1761 Set SVE VL 7040
3492 22:24:50.684725 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3493 22:24:50.684818 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3494 22:24:50.684909 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3495 22:24:50.684998 # ok 1765 Set SVE VL 7056
3496 22:24:50.685086 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3497 22:24:50.685175 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3498 22:24:50.685263 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3499 22:24:50.685373 # ok 1769 Set SVE VL 7072
3500 22:24:50.685468 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3501 22:24:50.685774 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3502 22:24:50.685875 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3503 22:24:50.687956 # ok 1773 Set SVE VL 7088
3504 22:24:50.688127 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3505 22:24:50.688966 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3506 22:24:50.689287 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3507 22:24:50.689394 # ok 1777 Set SVE VL 7104
3508 22:24:50.689488 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3509 22:24:50.689800 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3510 22:24:50.689906 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3511 22:24:50.689995 # ok 1781 Set SVE VL 7120
3512 22:24:50.690085 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3513 22:24:50.690191 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3514 22:24:50.690280 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3515 22:24:50.690367 # ok 1785 Set SVE VL 7136
3516 22:24:50.690466 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3517 22:24:50.690554 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3518 22:24:50.690852 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3519 22:24:50.690957 # ok 1789 Set SVE VL 7152
3520 22:24:50.691043 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3521 22:24:50.691142 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3522 22:24:50.691242 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3523 22:24:50.691329 # ok 1793 Set SVE VL 7168
3524 22:24:50.691428 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3525 22:24:50.691745 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3526 22:24:50.691849 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3527 22:24:50.691951 # ok 1797 Set SVE VL 7184
3528 22:24:50.692052 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3529 22:24:50.692153 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3530 22:24:50.692453 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3531 22:24:50.692548 # ok 1801 Set SVE VL 7200
3532 22:24:50.692846 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3533 22:24:50.692965 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3534 22:24:50.693070 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3535 22:24:50.693172 # ok 1805 Set SVE VL 7216
3536 22:24:50.693495 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3537 22:24:50.693600 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3538 22:24:50.693713 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3539 22:24:50.698002 # ok 1809 Set SVE VL 7232
3540 22:24:50.698202 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3541 22:24:50.698297 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3542 22:24:50.698385 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3543 22:24:50.698474 # ok 1813 Set SVE VL 7248
3544 22:24:50.698568 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3545 22:24:50.698656 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3546 22:24:50.698743 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3547 22:24:50.698825 # ok 1817 Set SVE VL 7264
3548 22:24:50.698911 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3549 22:24:50.698998 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3550 22:24:50.699085 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3551 22:24:50.699172 # ok 1821 Set SVE VL 7280
3552 22:24:50.699256 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3553 22:24:50.699342 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3554 22:24:50.699429 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3555 22:24:50.699519 # ok 1825 Set SVE VL 7296
3556 22:24:50.699607 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3557 22:24:50.699696 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3558 22:24:50.699785 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3559 22:24:50.699874 # ok 1829 Set SVE VL 7312
3560 22:24:50.699953 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3561 22:24:50.700030 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3562 22:24:50.700118 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3563 22:24:50.700202 # ok 1833 Set SVE VL 7328
3564 22:24:50.700289 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3565 22:24:50.700376 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3566 22:24:50.700467 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3567 22:24:50.700551 # ok 1837 Set SVE VL 7344
3568 22:24:50.700644 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3569 22:24:50.700730 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3570 22:24:50.700812 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3571 22:24:50.700905 # ok 1841 Set SVE VL 7360
3572 22:24:50.700989 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3573 22:24:50.701071 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3574 22:24:50.701156 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3575 22:24:50.701243 # ok 1845 Set SVE VL 7376
3576 22:24:50.701348 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3577 22:24:50.701439 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3578 22:24:50.701531 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3579 22:24:50.701615 # ok 1849 Set SVE VL 7392
3580 22:24:50.701706 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3581 22:24:50.701791 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3582 22:24:50.710012 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3583 22:24:50.710241 # ok 1853 Set SVE VL 7408
3584 22:24:50.710330 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3585 22:24:50.710416 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3586 22:24:50.710508 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3587 22:24:50.710596 # ok 1857 Set SVE VL 7424
3588 22:24:50.710678 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3589 22:24:50.710763 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3590 22:24:50.710847 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3591 22:24:50.710931 # ok 1861 Set SVE VL 7440
3592 22:24:50.711013 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3593 22:24:50.711096 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3594 22:24:50.711178 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3595 22:24:50.711262 # ok 1865 Set SVE VL 7456
3596 22:24:50.711345 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3597 22:24:50.711429 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3598 22:24:50.711513 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3599 22:24:50.711595 # ok 1869 Set SVE VL 7472
3600 22:24:50.711678 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3601 22:24:50.711757 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3602 22:24:50.711833 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3603 22:24:50.711905 # ok 1873 Set SVE VL 7488
3604 22:24:50.711975 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3605 22:24:50.712045 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3606 22:24:50.712115 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3607 22:24:50.712184 # ok 1877 Set SVE VL 7504
3608 22:24:50.712252 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3609 22:24:50.712322 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3610 22:24:50.712391 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3611 22:24:50.712461 # ok 1881 Set SVE VL 7520
3612 22:24:50.712531 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3613 22:24:50.712600 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3614 22:24:50.712670 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3615 22:24:50.712739 # ok 1885 Set SVE VL 7536
3616 22:24:50.712809 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3617 22:24:50.712879 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3618 22:24:50.712947 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3619 22:24:50.713029 # ok 1889 Set SVE VL 7552
3620 22:24:50.713112 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3621 22:24:50.713193 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3622 22:24:50.713275 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3623 22:24:50.713359 # ok 1893 Set SVE VL 7568
3624 22:24:50.713441 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3625 22:24:50.717785 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3626 22:24:50.717985 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3627 22:24:50.718076 # ok 1897 Set SVE VL 7584
3628 22:24:50.718166 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3629 22:24:50.718254 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3630 22:24:50.718337 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3631 22:24:50.718420 # ok 1901 Set SVE VL 7600
3632 22:24:50.718506 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3633 22:24:50.718595 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3634 22:24:50.718681 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3635 22:24:50.718765 # ok 1905 Set SVE VL 7616
3636 22:24:50.718849 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3637 22:24:50.718935 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3638 22:24:50.719020 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3639 22:24:50.719107 # ok 1909 Set SVE VL 7632
3640 22:24:50.719193 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3641 22:24:50.719278 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3642 22:24:50.719362 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3643 22:24:50.719447 # ok 1913 Set SVE VL 7648
3644 22:24:50.719530 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3645 22:24:50.719611 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3646 22:24:50.719694 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3647 22:24:50.719777 # ok 1917 Set SVE VL 7664
3648 22:24:50.719861 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3649 22:24:50.719942 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3650 22:24:50.720024 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3651 22:24:50.720106 # ok 1921 Set SVE VL 7680
3652 22:24:50.720188 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3653 22:24:50.720272 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3654 22:24:50.720357 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3655 22:24:50.720442 # ok 1925 Set SVE VL 7696
3656 22:24:50.720526 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3657 22:24:50.720611 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3658 22:24:50.720698 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3659 22:24:50.720787 # ok 1929 Set SVE VL 7712
3660 22:24:50.720872 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3661 22:24:50.720955 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3662 22:24:50.721039 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3663 22:24:50.721122 # ok 1933 Set SVE VL 7728
3664 22:24:50.721203 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3665 22:24:50.721285 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3666 22:24:50.721369 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3667 22:24:50.721453 # ok 1937 Set SVE VL 7744
3668 22:24:50.721725 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3669 22:24:50.721829 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3670 22:24:50.721918 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3671 22:24:50.722005 # ok 1941 Set SVE VL 7760
3672 22:24:50.722089 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3673 22:24:50.722175 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3674 22:24:50.722261 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3675 22:24:50.722346 # ok 1945 Set SVE VL 7776
3676 22:24:50.722430 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3677 22:24:50.722517 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3678 22:24:50.722604 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3679 22:24:50.722689 # ok 1949 Set SVE VL 7792
3680 22:24:50.722774 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3681 22:24:50.722858 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3682 22:24:50.722943 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3683 22:24:50.723027 # ok 1953 Set SVE VL 7808
3684 22:24:50.723111 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3685 22:24:50.723196 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3686 22:24:50.725527 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3687 22:24:50.725636 # ok 1957 Set SVE VL 7824
3688 22:24:50.725735 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3689 22:24:50.725821 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3690 22:24:50.726111 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3691 22:24:50.726213 # ok 1961 Set SVE VL 7840
3692 22:24:50.726301 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3693 22:24:50.726386 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3694 22:24:50.726502 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3695 22:24:50.726605 # ok 1965 Set SVE VL 7856
3696 22:24:50.726702 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3697 22:24:50.726800 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3698 22:24:50.726892 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3699 22:24:50.727050 # ok 1969 Set SVE VL 7872
3700 22:24:50.727156 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3701 22:24:50.727281 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3702 22:24:50.727388 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3703 22:24:50.727495 # ok 1973 Set SVE VL 7888
3704 22:24:50.727622 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3705 22:24:50.727723 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3706 22:24:50.727813 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3707 22:24:50.727916 # ok 1977 Set SVE VL 7904
3708 22:24:50.728036 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3709 22:24:50.728132 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3710 22:24:50.728425 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3711 22:24:50.728550 # ok 1981 Set SVE VL 7920
3712 22:24:50.728666 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3713 22:24:50.728785 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3714 22:24:50.729145 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3715 22:24:50.729969 # ok 1985 Set SVE VL 7936
3716 22:24:50.730078 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3717 22:24:50.730177 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3718 22:24:50.730294 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3719 22:24:50.730397 # ok 1989 Set SVE VL 7952
3720 22:24:50.730479 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3721 22:24:50.730583 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3722 22:24:50.730685 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3723 22:24:50.730804 # ok 1993 Set SVE VL 7968
3724 22:24:50.730885 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3725 22:24:50.730957 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3726 22:24:50.731021 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3727 22:24:50.731113 # ok 1997 Set SVE VL 7984
3728 22:24:50.731234 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3729 22:24:50.731340 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3730 22:24:50.731424 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3731 22:24:50.731496 # ok 2001 Set SVE VL 8000
3732 22:24:50.731569 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3733 22:24:50.731646 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3734 22:24:50.731720 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3735 22:24:50.731788 # ok 2005 Set SVE VL 8016
3736 22:24:50.731855 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3737 22:24:50.731934 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3738 22:24:50.732030 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3739 22:24:50.732125 # ok 2009 Set SVE VL 8032
3740 22:24:50.732201 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3741 22:24:50.732262 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3742 22:24:50.732321 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3743 22:24:50.732381 # ok 2013 Set SVE VL 8048
3744 22:24:50.732461 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3745 22:24:50.732548 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3746 22:24:50.732645 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3747 22:24:50.732729 # ok 2017 Set SVE VL 8064
3748 22:24:50.732810 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3749 22:24:50.732900 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3750 22:24:50.732978 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3751 22:24:50.733053 # ok 2021 Set SVE VL 8080
3752 22:24:50.733139 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3753 22:24:50.733232 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3754 22:24:50.733327 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3755 22:24:50.733408 # ok 2025 Set SVE VL 8096
3756 22:24:50.733485 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3757 22:24:50.733574 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3758 22:24:50.733923 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3759 22:24:50.734036 # ok 2029 Set SVE VL 8112
3760 22:24:50.734135 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3761 22:24:50.734219 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3762 22:24:50.734322 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3763 22:24:50.734412 # ok 2033 Set SVE VL 8128
3764 22:24:50.734507 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3765 22:24:50.734624 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3766 22:24:50.734713 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3767 22:24:50.734813 # ok 2037 Set SVE VL 8144
3768 22:24:50.734911 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3769 22:24:50.735021 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3770 22:24:50.735116 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3771 22:24:50.735927 # ok 2041 Set SVE VL 8160
3772 22:24:50.736043 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3773 22:24:50.736145 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3774 22:24:50.736245 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3775 22:24:50.736346 # ok 2045 Set SVE VL 8176
3776 22:24:50.736444 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3777 22:24:50.736552 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3778 22:24:50.736654 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3779 22:24:50.736754 # ok 2049 Set SVE VL 8192
3780 22:24:50.737054 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3781 22:24:50.737163 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3782 22:24:50.738070 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3783 22:24:50.738193 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3784 22:24:50.738293 # ok 2054 Streaming SVE get_fpsimd() gave same state
3785 22:24:50.738389 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3786 22:24:50.738484 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3787 22:24:50.738584 # ok 2057 Set Streaming SVE VL 16
3788 22:24:50.738680 # ok 2058 Set and get Streaming SVE data for VL 16
3789 22:24:50.738776 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3790 22:24:50.738884 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3791 22:24:50.738975 # ok 2061 Set Streaming SVE VL 32
3792 22:24:50.739039 # ok 2062 Set and get Streaming SVE data for VL 32
3793 22:24:50.739099 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3794 22:24:50.739158 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3795 22:24:50.739218 # ok 2065 Set Streaming SVE VL 48
3796 22:24:50.739277 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3797 22:24:50.739534 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3798 22:24:50.739638 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3799 22:24:50.739735 # ok 2069 Set Streaming SVE VL 64
3800 22:24:50.739816 # ok 2070 Set and get Streaming SVE data for VL 64
3801 22:24:50.739886 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3802 22:24:50.739950 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3803 22:24:50.740009 # ok 2073 Set Streaming SVE VL 80
3804 22:24:50.740070 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3805 22:24:50.740140 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3806 22:24:50.740202 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3807 22:24:50.740265 # ok 2077 Set Streaming SVE VL 96
3808 22:24:50.740326 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3809 22:24:50.740402 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3810 22:24:50.740469 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3811 22:24:50.740727 # ok 2081 Set Streaming SVE VL 112
3812 22:24:50.740808 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3813 22:24:50.740881 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3814 22:24:50.740942 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3815 22:24:50.741016 # ok 2085 Set Streaming SVE VL 128
3816 22:24:50.741082 # ok 2086 Set and get Streaming SVE data for VL 128
3817 22:24:50.741148 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3818 22:24:50.741233 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3819 22:24:50.741588 # ok 2089 Set Streaming SVE VL 144
3820 22:24:50.741871 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3821 22:24:50.741951 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3822 22:24:50.742030 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3823 22:24:50.742127 # ok 2093 Set Streaming SVE VL 160
3824 22:24:50.742210 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3825 22:24:50.742312 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3826 22:24:50.742412 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3827 22:24:50.742489 # ok 2097 Set Streaming SVE VL 176
3828 22:24:50.742566 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3829 22:24:50.742662 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3830 22:24:50.742958 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3831 22:24:50.743045 # ok 2101 Set Streaming SVE VL 192
3832 22:24:50.743132 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3833 22:24:50.743214 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3834 22:24:50.743526 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3835 22:24:50.743616 # ok 2105 Set Streaming SVE VL 208
3836 22:24:50.743681 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3837 22:24:50.743903 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3838 22:24:50.743983 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3839 22:24:50.744252 # ok 2109 Set Streaming SVE VL 224
3840 22:24:50.744588 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3841 22:24:50.744727 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3842 22:24:50.744859 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3843 22:24:50.744967 # ok 2113 Set Streaming SVE VL 240
3844 22:24:50.745058 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3845 22:24:50.745161 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3846 22:24:50.745259 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3847 22:24:50.745358 # ok 2117 Set Streaming SVE VL 256
3848 22:24:50.745457 # ok 2118 Set and get Streaming SVE data for VL 256
3849 22:24:50.745546 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3850 22:24:50.745655 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3851 22:24:50.745780 # ok 2121 Set Streaming SVE VL 272
3852 22:24:50.745922 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3853 22:24:50.746056 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3854 22:24:50.746183 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3855 22:24:50.746291 # ok 2125 Set Streaming SVE VL 288
3856 22:24:50.753428 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3857 22:24:50.753637 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3858 22:24:50.753729 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3859 22:24:50.753801 # ok 2129 Set Streaming SVE VL 304
3860 22:24:50.754082 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3861 22:24:50.754188 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3862 22:24:50.754269 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3863 22:24:50.754358 # ok 2133 Set Streaming SVE VL 320
3864 22:24:50.754440 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3865 22:24:50.754515 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3866 22:24:50.754598 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3867 22:24:50.754662 # ok 2137 Set Streaming SVE VL 336
3868 22:24:50.754927 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3869 22:24:50.755031 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3870 22:24:50.755119 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3871 22:24:50.755205 # ok 2141 Set Streaming SVE VL 352
3872 22:24:50.755295 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3873 22:24:50.755374 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3874 22:24:50.755450 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3875 22:24:50.757363 # ok 2145 Set Streaming SVE VL 368
3876 22:24:50.757485 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3877 22:24:50.757571 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3878 22:24:50.757638 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3879 22:24:50.757720 # ok 2149 Set Streaming SVE VL 384
3880 22:24:50.757789 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3881 22:24:50.757858 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3882 22:24:50.757929 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3883 22:24:50.757997 # ok 2153 Set Streaming SVE VL 400
3884 22:24:50.758066 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3885 22:24:50.758141 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3886 22:24:50.758212 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3887 22:24:50.758480 # ok 2157 Set Streaming SVE VL 416
3888 22:24:50.759915 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3889 22:24:50.760018 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3890 22:24:50.760089 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3891 22:24:50.760337 # ok 2161 Set Streaming SVE VL 432
3892 22:24:50.760404 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3893 22:24:50.760467 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3894 22:24:50.760528 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3895 22:24:50.760589 # ok 2165 Set Streaming SVE VL 448
3896 22:24:50.760649 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3897 22:24:50.760710 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3898 22:24:50.760770 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3899 22:24:50.760829 # ok 2169 Set Streaming SVE VL 464
3900 22:24:50.760889 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3901 22:24:50.760949 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3902 22:24:50.761011 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3903 22:24:50.761072 # ok 2173 Set Streaming SVE VL 480
3904 22:24:50.761132 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3905 22:24:50.764016 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3906 22:24:50.764097 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3907 22:24:50.764160 # ok 2177 Set Streaming SVE VL 496
3908 22:24:50.764220 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3909 22:24:50.764279 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3910 22:24:50.764338 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3911 22:24:50.764396 # ok 2181 Set Streaming SVE VL 512
3912 22:24:50.764454 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3913 22:24:50.764514 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3914 22:24:50.764573 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3915 22:24:50.764631 # ok 2185 Set Streaming SVE VL 528
3916 22:24:50.764690 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3917 22:24:50.764748 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3918 22:24:50.764807 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3919 22:24:50.764866 # ok 2189 Set Streaming SVE VL 544
3920 22:24:50.764924 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3921 22:24:50.764982 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3922 22:24:50.765040 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3923 22:24:50.765099 # ok 2193 Set Streaming SVE VL 560
3924 22:24:50.765157 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3925 22:24:50.765215 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3926 22:24:50.765460 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3927 22:24:50.765525 # ok 2197 Set Streaming SVE VL 576
3928 22:24:50.765584 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3929 22:24:50.765643 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3930 22:24:50.765711 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3931 22:24:50.765770 # ok 2201 Set Streaming SVE VL 592
3932 22:24:50.765840 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3933 22:24:50.765911 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3934 22:24:50.766748 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3935 22:24:50.766829 # ok 2205 Set Streaming SVE VL 608
3936 22:24:50.766891 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3937 22:24:50.767127 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3938 22:24:50.767367 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3939 22:24:50.767431 # ok 2209 Set Streaming SVE VL 624
3940 22:24:50.767490 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3941 22:24:50.767728 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3942 22:24:50.768352 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3943 22:24:50.768602 # ok 2213 Set Streaming SVE VL 640
3944 22:24:50.768884 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3945 22:24:50.769123 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3946 22:24:50.769196 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3947 22:24:50.769433 # ok 2217 Set Streaming SVE VL 656
3948 22:24:50.769787 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3949 22:24:50.770032 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3950 22:24:50.770149 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3951 22:24:50.770460 # ok 2221 Set Streaming SVE VL 672
3952 22:24:50.770540 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3953 22:24:50.770636 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3954 22:24:50.770753 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3955 22:24:50.771040 # ok 2225 Set Streaming SVE VL 688
3956 22:24:50.771128 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3957 22:24:50.771226 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3958 22:24:50.771325 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3959 22:24:50.771422 # ok 2229 Set Streaming SVE VL 704
3960 22:24:50.771699 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3961 22:24:50.771791 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3962 22:24:50.772080 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3963 22:24:50.772176 # ok 2233 Set Streaming SVE VL 720
3964 22:24:50.772448 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3965 22:24:50.772792 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3966 22:24:50.772893 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3967 22:24:50.772992 # ok 2237 Set Streaming SVE VL 736
3968 22:24:50.773076 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3969 22:24:50.773174 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3970 22:24:50.773454 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3971 22:24:50.773564 # ok 2241 Set Streaming SVE VL 752
3972 22:24:50.773668 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3973 22:24:50.773971 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3974 22:24:50.774096 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3975 22:24:50.774185 # ok 2245 Set Streaming SVE VL 768
3976 22:24:50.774282 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3977 22:24:50.774383 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3978 22:24:50.774482 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3979 22:24:50.774581 # ok 2249 Set Streaming SVE VL 784
3980 22:24:50.774956 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3981 22:24:50.775100 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3982 22:24:50.775262 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3983 22:24:50.775417 # ok 2253 Set Streaming SVE VL 800
3984 22:24:50.775642 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3985 22:24:50.775807 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3986 22:24:50.775966 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3987 22:24:50.776147 # ok 2257 Set Streaming SVE VL 816
3988 22:24:50.776241 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3989 22:24:50.776408 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3990 22:24:50.777174 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3991 22:24:50.778485 # ok 2261 Set Streaming SVE VL 832
3992 22:24:50.778591 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3993 22:24:50.778678 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3994 22:24:50.778764 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3995 22:24:50.778846 # ok 2265 Set Streaming SVE VL 848
3996 22:24:50.778955 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3997 22:24:50.779043 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3998 22:24:50.779128 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3999 22:24:50.779213 # ok 2269 Set Streaming SVE VL 864
4000 22:24:50.779296 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
4001 22:24:50.779380 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
4002 22:24:50.779467 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4003 22:24:50.779552 # ok 2273 Set Streaming SVE VL 880
4004 22:24:50.779638 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4005 22:24:50.779722 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4006 22:24:50.779806 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4007 22:24:50.779889 # ok 2277 Set Streaming SVE VL 896
4008 22:24:50.779974 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4009 22:24:50.785609 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4010 22:24:50.785809 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4011 22:24:50.785917 # ok 2281 Set Streaming SVE VL 912
4012 22:24:50.786006 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4013 22:24:50.786478 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4014 22:24:50.786635 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4015 22:24:50.786753 # ok 2285 Set Streaming SVE VL 928
4016 22:24:50.786870 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4017 22:24:50.787008 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4018 22:24:50.787119 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4019 22:24:50.787228 # ok 2289 Set Streaming SVE VL 944
4020 22:24:50.787336 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4021 22:24:50.787457 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4022 22:24:50.787556 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4023 22:24:50.787658 # ok 2293 Set Streaming SVE VL 960
4024 22:24:50.787762 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4025 22:24:50.787871 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4026 22:24:50.787995 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4027 22:24:50.788102 # ok 2297 Set Streaming SVE VL 976
4028 22:24:50.788220 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4029 22:24:50.788348 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4030 22:24:50.790190 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4031 22:24:50.790339 # ok 2301 Set Streaming SVE VL 992
4032 22:24:50.790447 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4033 22:24:50.790557 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4034 22:24:50.790667 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4035 22:24:50.790775 # ok 2305 Set Streaming SVE VL 1008
4036 22:24:50.790864 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4037 22:24:50.790947 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4038 22:24:50.791032 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4039 22:24:50.791117 # ok 2309 Set Streaming SVE VL 1024
4040 22:24:50.791198 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4041 22:24:50.791281 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4042 22:24:50.791364 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4043 22:24:50.791446 # ok 2313 Set Streaming SVE VL 1040
4044 22:24:50.791548 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4045 22:24:50.791637 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4046 22:24:50.791719 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4047 22:24:50.797702 # ok 2317 Set Streaming SVE VL 1056
4048 22:24:50.797854 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4049 22:24:50.797947 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4050 22:24:50.798033 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4051 22:24:50.798119 # ok 2321 Set Streaming SVE VL 1072
4052 22:24:50.798203 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4053 22:24:50.798288 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4054 22:24:50.798369 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4055 22:24:50.798453 # ok 2325 Set Streaming SVE VL 1088
4056 22:24:50.798538 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4057 22:24:50.798624 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4058 22:24:50.798711 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4059 22:24:50.798798 # ok 2329 Set Streaming SVE VL 1104
4060 22:24:50.798884 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4061 22:24:50.798969 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4062 22:24:50.799054 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4063 22:24:50.799139 # ok 2333 Set Streaming SVE VL 1120
4064 22:24:50.799222 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4065 22:24:50.799303 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4066 22:24:50.799387 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4067 22:24:50.799471 # ok 2337 Set Streaming SVE VL 1136
4068 22:24:50.799556 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4069 22:24:50.799638 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4070 22:24:50.799723 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4071 22:24:50.799804 # ok 2341 Set Streaming SVE VL 1152
4072 22:24:50.800114 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4073 22:24:50.800222 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4074 22:24:50.800310 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4075 22:24:50.800400 # ok 2345 Set Streaming SVE VL 1168
4076 22:24:50.800488 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4077 22:24:50.800574 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4078 22:24:50.800663 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4079 22:24:50.800754 # ok 2349 Set Streaming SVE VL 1184
4080 22:24:50.800842 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4081 22:24:50.800930 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4082 22:24:50.801015 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4083 22:24:50.801102 # ok 2353 Set Streaming SVE VL 1200
4084 22:24:50.801191 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4085 22:24:50.801280 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4086 22:24:50.801365 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4087 22:24:50.801450 # ok 2357 Set Streaming SVE VL 1216
4088 22:24:50.801533 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4089 22:24:50.801618 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4090 22:24:50.801715 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4091 22:24:50.801802 # ok 2361 Set Streaming SVE VL 1232
4092 22:24:50.801885 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4093 22:24:50.801968 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4094 22:24:50.802051 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4095 22:24:50.802135 # ok 2365 Set Streaming SVE VL 1248
4096 22:24:50.802219 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4097 22:24:50.802299 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4098 22:24:50.802379 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4099 22:24:50.802462 # ok 2369 Set Streaming SVE VL 1264
4100 22:24:50.802543 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4101 22:24:50.802624 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4102 22:24:50.802708 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4103 22:24:50.802799 # ok 2373 Set Streaming SVE VL 1280
4104 22:24:50.802882 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4105 22:24:50.802965 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4106 22:24:50.803048 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4107 22:24:50.803130 # ok 2377 Set Streaming SVE VL 1296
4108 22:24:50.803759 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4109 22:24:50.803868 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4110 22:24:50.803957 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4111 22:24:50.804041 # ok 2381 Set Streaming SVE VL 1312
4112 22:24:50.804123 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4113 22:24:50.804208 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4114 22:24:50.804290 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4115 22:24:50.804374 # ok 2385 Set Streaming SVE VL 1328
4116 22:24:50.804458 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4117 22:24:50.804543 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4118 22:24:50.804629 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4119 22:24:50.804718 # ok 2389 Set Streaming SVE VL 1344
4120 22:24:50.804801 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4121 22:24:50.804885 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4122 22:24:50.804968 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4123 22:24:50.805052 # ok 2393 Set Streaming SVE VL 1360
4124 22:24:50.805134 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4125 22:24:50.805218 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4126 22:24:50.805301 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4127 22:24:50.805384 # ok 2397 Set Streaming SVE VL 1376
4128 22:24:50.805465 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4129 22:24:50.805547 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4130 22:24:50.805630 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4131 22:24:50.806110 # ok 2401 Set Streaming SVE VL 1392
4132 22:24:50.806204 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4133 22:24:50.806289 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4134 22:24:50.806371 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4135 22:24:50.806455 # ok 2405 Set Streaming SVE VL 1408
4136 22:24:50.806537 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4137 22:24:50.806645 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4138 22:24:50.806734 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4139 22:24:50.806812 # ok 2409 Set Streaming SVE VL 1424
4140 22:24:50.806889 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4141 22:24:50.806965 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4142 22:24:50.807041 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4143 22:24:50.807317 # ok 2413 Set Streaming SVE VL 1440
4144 22:24:50.807402 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4145 22:24:50.807468 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4146 22:24:50.807531 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4147 22:24:50.807593 # ok 2417 Set Streaming SVE VL 1456
4148 22:24:50.807659 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4149 22:24:50.807720 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4150 22:24:50.807781 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4151 22:24:50.807843 # ok 2421 Set Streaming SVE VL 1472
4152 22:24:50.807903 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4153 22:24:50.807965 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4154 22:24:50.808027 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4155 22:24:50.808088 # ok 2425 Set Streaming SVE VL 1488
4156 22:24:50.808149 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4157 22:24:50.808211 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4158 22:24:50.808271 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4159 22:24:50.812529 # ok 2429 Set Streaming SVE VL 1504
4160 22:24:50.813017 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4161 22:24:50.813273 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4162 22:24:50.813365 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4163 22:24:50.813897 # ok 2433 Set Streaming SVE VL 1520
4164 22:24:50.814079 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4165 22:24:50.814191 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4166 22:24:50.814307 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4167 22:24:50.814419 # ok 2437 Set Streaming SVE VL 1536
4168 22:24:50.814749 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4169 22:24:50.814876 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4170 22:24:50.814988 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4171 22:24:50.815102 # ok 2441 Set Streaming SVE VL 1552
4172 22:24:50.815215 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4173 22:24:50.815328 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4174 22:24:50.815460 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4175 22:24:50.815574 # ok 2445 Set Streaming SVE VL 1568
4176 22:24:50.815684 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4177 22:24:50.815801 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4178 22:24:50.815889 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4179 22:24:50.815999 # ok 2449 Set Streaming SVE VL 1584
4180 22:24:50.816096 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4181 22:24:50.816165 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4182 22:24:50.816240 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4183 22:24:50.816567 # ok 2453 Set Streaming SVE VL 1600
4184 22:24:50.817385 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4185 22:24:50.817698 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4186 22:24:50.817797 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4187 22:24:50.817901 # ok 2457 Set Streaming SVE VL 1616
4188 22:24:50.818009 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4189 22:24:50.818110 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4190 22:24:50.818184 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4191 22:24:50.818249 # ok 2461 Set Streaming SVE VL 1632
4192 22:24:50.818312 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4193 22:24:50.818388 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4194 22:24:50.818456 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4195 22:24:50.818519 # ok 2465 Set Streaming SVE VL 1648
4196 22:24:50.818582 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4197 22:24:50.818655 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4198 22:24:50.818721 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4199 22:24:50.818795 # ok 2469 Set Streaming SVE VL 1664
4200 22:24:50.818877 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4201 22:24:50.819144 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4202 22:24:50.819258 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4203 22:24:50.819555 # ok 2473 Set Streaming SVE VL 1680
4204 22:24:50.819663 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4205 22:24:50.819777 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4206 22:24:50.820211 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4207 22:24:50.820492 # ok 2477 Set Streaming SVE VL 1696
4208 22:24:50.820598 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4209 22:24:50.820898 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4210 22:24:50.820986 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4211 22:24:50.821106 # ok 2481 Set Streaming SVE VL 1712
4212 22:24:50.821197 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4213 22:24:50.821465 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4214 22:24:50.821572 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4215 22:24:50.821684 # ok 2485 Set Streaming SVE VL 1728
4216 22:24:50.821810 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4217 22:24:50.822265 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4218 22:24:50.823544 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4219 22:24:50.824620 # ok 2489 Set Streaming SVE VL 1744
4220 22:24:50.824807 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4221 22:24:50.824986 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4222 22:24:50.825159 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4223 22:24:50.825330 # ok 2493 Set Streaming SVE VL 1760
4224 22:24:50.825544 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4225 22:24:50.825819 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4226 22:24:50.826073 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4227 22:24:50.826248 # ok 2497 Set Streaming SVE VL 1776
4228 22:24:50.826351 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4229 22:24:50.826692 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4230 22:24:50.826793 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4231 22:24:50.826898 # ok 2501 Set Streaming SVE VL 1792
4232 22:24:50.827882 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4233 22:24:50.827972 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4234 22:24:50.828064 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4235 22:24:50.828142 # ok 2505 Set Streaming SVE VL 1808
4236 22:24:50.828217 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4237 22:24:50.828292 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4238 22:24:50.828367 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4239 22:24:50.828442 # ok 2509 Set Streaming SVE VL 1824
4240 22:24:50.828516 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4241 22:24:50.828591 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4242 22:24:50.828666 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4243 22:24:50.828739 # ok 2513 Set Streaming SVE VL 1840
4244 22:24:50.828814 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4245 22:24:50.828889 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4246 22:24:50.828962 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4247 22:24:50.829036 # ok 2517 Set Streaming SVE VL 1856
4248 22:24:50.829111 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4249 22:24:50.829948 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4250 22:24:50.830147 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4251 22:24:50.830254 # ok 2521 Set Streaming SVE VL 1872
4252 22:24:50.830367 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4253 22:24:50.830482 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4254 22:24:50.830583 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4255 22:24:50.830683 # ok 2525 Set Streaming SVE VL 1888
4256 22:24:50.830778 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4257 22:24:50.830874 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4258 22:24:50.830967 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4259 22:24:50.831055 # ok 2529 Set Streaming SVE VL 1904
4260 22:24:50.831145 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4261 22:24:50.831232 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4262 22:24:50.831323 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4263 22:24:50.831414 # ok 2533 Set Streaming SVE VL 1920
4264 22:24:50.831501 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4265 22:24:50.831588 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4266 22:24:50.831681 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4267 22:24:50.831751 # ok 2537 Set Streaming SVE VL 1936
4268 22:24:50.831833 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4269 22:24:50.831926 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4270 22:24:50.832015 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4271 22:24:50.832110 # ok 2541 Set Streaming SVE VL 1952
4272 22:24:50.832180 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4273 22:24:50.832245 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4274 22:24:50.832333 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4275 22:24:50.832421 # ok 2545 Set Streaming SVE VL 1968
4276 22:24:50.832507 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4277 22:24:50.833087 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4278 22:24:50.833183 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4279 22:24:50.833293 # ok 2549 Set Streaming SVE VL 1984
4280 22:24:50.833399 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4281 22:24:50.833507 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4282 22:24:50.833614 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4283 22:24:50.833730 # ok 2553 Set Streaming SVE VL 2000
4284 22:24:50.833838 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4285 22:24:50.833943 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4286 22:24:50.834046 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4287 22:24:50.834129 # ok 2557 Set Streaming SVE VL 2016
4288 22:24:50.834205 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4289 22:24:50.834280 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4290 22:24:50.834355 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4291 22:24:50.834429 # ok 2561 Set Streaming SVE VL 2032
4292 22:24:50.834502 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4293 22:24:50.834577 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4294 22:24:50.834650 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4295 22:24:50.834725 # ok 2565 Set Streaming SVE VL 2048
4296 22:24:50.834820 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4297 22:24:50.834891 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4298 22:24:50.834966 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4299 22:24:50.835042 # ok 2569 Set Streaming SVE VL 2064
4300 22:24:50.835117 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4301 22:24:50.835191 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4302 22:24:50.837889 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4303 22:24:50.838023 # ok 2573 Set Streaming SVE VL 2080
4304 22:24:50.838134 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4305 22:24:50.838229 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4306 22:24:50.838323 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4307 22:24:50.838414 # ok 2577 Set Streaming SVE VL 2096
4308 22:24:50.838506 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4309 22:24:50.838833 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4310 22:24:50.839127 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4311 22:24:50.839223 # ok 2581 Set Streaming SVE VL 2112
4312 22:24:50.839341 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4313 22:24:50.839444 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4314 22:24:50.839543 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4315 22:24:50.839820 # ok 2585 Set Streaming SVE VL 2128
4316 22:24:50.839927 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4317 22:24:50.840986 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4318 22:24:50.841265 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4319 22:24:50.841355 # ok 2589 Set Streaming SVE VL 2144
4320 22:24:50.841456 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4321 22:24:50.841572 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4322 22:24:50.841885 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4323 22:24:50.841976 # ok 2593 Set Streaming SVE VL 2160
4324 22:24:50.842082 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4325 22:24:50.842208 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4326 22:24:50.842324 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4327 22:24:50.842426 # ok 2597 Set Streaming SVE VL 2176
4328 22:24:50.842531 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4329 22:24:50.842643 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4330 22:24:50.842983 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4331 22:24:50.843089 # ok 2601 Set Streaming SVE VL 2192
4332 22:24:50.843192 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4333 22:24:50.843303 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4334 22:24:50.843610 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4335 22:24:50.843729 # ok 2605 Set Streaming SVE VL 2208
4336 22:24:50.843833 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4337 22:24:50.844322 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4338 22:24:50.844644 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4339 22:24:50.844752 # ok 2609 Set Streaming SVE VL 2224
4340 22:24:50.844846 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4341 22:24:50.844946 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4342 22:24:50.845048 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4343 22:24:50.845150 # ok 2613 Set Streaming SVE VL 2240
4344 22:24:50.845251 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4345 22:24:50.845548 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4346 22:24:50.845700 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4347 22:24:50.845823 # ok 2617 Set Streaming SVE VL 2256
4348 22:24:50.845948 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4349 22:24:50.846075 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4350 22:24:50.846200 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4351 22:24:50.846327 # ok 2621 Set Streaming SVE VL 2272
4352 22:24:50.846628 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4353 22:24:50.846763 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4354 22:24:50.846881 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4355 22:24:50.847010 # ok 2625 Set Streaming SVE VL 2288
4356 22:24:50.847135 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4357 22:24:50.847262 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4358 22:24:50.850001 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4359 22:24:50.850193 # ok 2629 Set Streaming SVE VL 2304
4360 22:24:50.850418 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4361 22:24:50.850641 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4362 22:24:50.850895 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4363 22:24:50.851104 # ok 2633 Set Streaming SVE VL 2320
4364 22:24:50.851322 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4365 22:24:50.851542 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4366 22:24:50.851760 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4367 22:24:50.852006 # ok 2637 Set Streaming SVE VL 2336
4368 22:24:50.852102 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4369 22:24:50.852303 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4370 22:24:50.852514 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4371 22:24:50.852731 # ok 2641 Set Streaming SVE VL 2352
4372 22:24:50.852950 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4373 22:24:50.853146 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4374 22:24:50.853374 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4375 22:24:50.854377 # ok 2645 Set Streaming SVE VL 2368
4376 22:24:50.854681 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4377 22:24:50.854956 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4378 22:24:50.855343 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4379 22:24:50.855661 # ok 2649 Set Streaming SVE VL 2384
4380 22:24:50.855918 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4381 22:24:50.856044 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4382 22:24:50.856137 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4383 22:24:50.856364 # ok 2653 Set Streaming SVE VL 2400
4384 22:24:50.856454 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4385 22:24:50.856539 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4386 22:24:50.856624 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4387 22:24:50.856710 # ok 2657 Set Streaming SVE VL 2416
4388 22:24:50.856794 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4389 22:24:50.856879 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4390 22:24:50.856965 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4391 22:24:50.857051 # ok 2661 Set Streaming SVE VL 2432
4392 22:24:50.857137 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4393 22:24:50.857224 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4394 22:24:50.857308 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4395 22:24:50.857394 # ok 2665 Set Streaming SVE VL 2448
4396 22:24:50.857477 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4397 22:24:50.857561 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4398 22:24:50.857655 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4399 22:24:50.857740 # ok 2669 Set Streaming SVE VL 2464
4400 22:24:50.857822 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4401 22:24:50.857932 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4402 22:24:50.858022 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4403 22:24:50.858104 # ok 2673 Set Streaming SVE VL 2480
4404 22:24:50.858187 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4405 22:24:50.858276 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4406 22:24:50.858377 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4407 22:24:50.858465 # ok 2677 Set Streaming SVE VL 2496
4408 22:24:50.858550 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4409 22:24:50.858636 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4410 22:24:50.859216 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4411 22:24:50.859324 # ok 2681 Set Streaming SVE VL 2512
4412 22:24:50.859412 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4413 22:24:50.859496 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4414 22:24:50.859577 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4415 22:24:50.859660 # ok 2685 Set Streaming SVE VL 2528
4416 22:24:50.859743 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4417 22:24:50.859826 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4418 22:24:50.859915 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4419 22:24:50.859999 # ok 2689 Set Streaming SVE VL 2544
4420 22:24:50.860084 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4421 22:24:50.860169 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4422 22:24:50.860255 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4423 22:24:50.860340 # ok 2693 Set Streaming SVE VL 2560
4424 22:24:50.860426 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4425 22:24:50.860513 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4426 22:24:50.860601 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4427 22:24:50.860687 # ok 2697 Set Streaming SVE VL 2576
4428 22:24:50.860771 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4429 22:24:50.860856 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4430 22:24:50.860940 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4431 22:24:50.861023 # ok 2701 Set Streaming SVE VL 2592
4432 22:24:50.861127 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4433 22:24:50.861215 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4434 22:24:50.861300 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4435 22:24:50.861382 # ok 2705 Set Streaming SVE VL 2608
4436 22:24:50.861467 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4437 22:24:50.861551 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4438 22:24:50.861637 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4439 22:24:50.861731 # ok 2709 Set Streaming SVE VL 2624
4440 22:24:50.861815 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4441 22:24:50.861902 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4442 22:24:50.861989 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4443 22:24:50.862091 # ok 2713 Set Streaming SVE VL 2640
4444 22:24:50.862183 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4445 22:24:50.862480 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4446 22:24:50.862597 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4447 22:24:50.862696 # ok 2717 Set Streaming SVE VL 2656
4448 22:24:50.862793 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4449 22:24:50.862888 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4450 22:24:50.862984 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4451 22:24:50.863059 # ok 2721 Set Streaming SVE VL 2672
4452 22:24:50.863133 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4453 22:24:50.863230 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4454 22:24:50.863325 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4455 22:24:50.863409 # ok 2725 Set Streaming SVE VL 2688
4456 22:24:50.863491 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4457 22:24:50.863573 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4458 22:24:50.869208 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4459 22:24:50.869813 # ok 2729 Set Streaming SVE VL 2704
4460 22:24:50.869926 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4461 22:24:50.870014 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4462 22:24:50.870118 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4463 22:24:50.870257 # ok 2733 Set Streaming SVE VL 2720
4464 22:24:50.870367 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4465 22:24:50.870480 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4466 22:24:50.870606 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4467 22:24:50.870751 # ok 2737 Set Streaming SVE VL 2736
4468 22:24:50.870860 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4469 22:24:50.870986 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4470 22:24:50.871315 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4471 22:24:50.871418 # ok 2741 Set Streaming SVE VL 2752
4472 22:24:50.871523 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4473 22:24:50.871666 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4474 22:24:50.871833 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4475 22:24:50.871971 # ok 2745 Set Streaming SVE VL 2768
4476 22:24:50.872075 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4477 22:24:50.872180 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4478 22:24:50.872367 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4479 22:24:50.872726 # ok 2749 Set Streaming SVE VL 2784
4480 22:24:50.872923 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4481 22:24:50.873031 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4482 22:24:50.873319 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4483 22:24:50.873474 # ok 2753 Set Streaming SVE VL 2800
4484 22:24:50.873722 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4485 22:24:50.873886 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4486 22:24:50.874129 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4487 22:24:50.874379 # ok 2757 Set Streaming SVE VL 2816
4488 22:24:50.874534 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4489 22:24:50.874637 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4490 22:24:50.874770 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4491 22:24:50.874882 # ok 2761 Set Streaming SVE VL 2832
4492 22:24:50.874990 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4493 22:24:50.875089 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4494 22:24:50.875187 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4495 22:24:50.875297 # ok 2765 Set Streaming SVE VL 2848
4496 22:24:50.875403 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4497 22:24:50.875503 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4498 22:24:50.875606 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4499 22:24:50.875694 # ok 2769 Set Streaming SVE VL 2864
4500 22:24:50.875785 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4501 22:24:50.875886 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4502 22:24:50.876000 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4503 22:24:50.876075 # ok 2773 Set Streaming SVE VL 2880
4504 22:24:50.876136 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4505 22:24:50.876203 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4506 22:24:50.876692 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4507 22:24:50.876799 # ok 2777 Set Streaming SVE VL 2896
4508 22:24:50.876904 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4509 22:24:50.877011 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4510 22:24:50.877329 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4511 22:24:50.877433 # ok 2781 Set Streaming SVE VL 2912
4512 22:24:50.877511 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4513 22:24:50.877786 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4514 22:24:50.877880 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4515 22:24:50.877960 # ok 2785 Set Streaming SVE VL 2928
4516 22:24:50.878038 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4517 22:24:50.878363 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4518 22:24:50.878466 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4519 22:24:50.878558 # ok 2789 Set Streaming SVE VL 2944
4520 22:24:50.878664 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4521 22:24:50.878775 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4522 22:24:50.878903 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4523 22:24:50.879006 # ok 2793 Set Streaming SVE VL 2960
4524 22:24:50.879110 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4525 22:24:50.879182 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4526 22:24:50.879243 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4527 22:24:50.879316 # ok 2797 Set Streaming SVE VL 2976
4528 22:24:50.879379 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4529 22:24:50.879452 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4530 22:24:50.879940 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4531 22:24:50.880054 # ok 2801 Set Streaming SVE VL 2992
4532 22:24:50.880145 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4533 22:24:50.880450 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4534 22:24:50.880572 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4535 22:24:50.880678 # ok 2805 Set Streaming SVE VL 3008
4536 22:24:50.880780 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4537 22:24:50.881075 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4538 22:24:50.881172 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4539 22:24:50.881275 # ok 2809 Set Streaming SVE VL 3024
4540 22:24:50.881381 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4541 22:24:50.881486 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4542 22:24:50.881768 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4543 22:24:50.881877 # ok 2813 Set Streaming SVE VL 3040
4544 22:24:50.881992 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4545 22:24:50.882114 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4546 22:24:50.882202 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4547 22:24:50.882309 # ok 2817 Set Streaming SVE VL 3056
4548 22:24:50.882386 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4549 22:24:50.882476 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4550 22:24:50.882746 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4551 22:24:50.882849 # ok 2821 Set Streaming SVE VL 3072
4552 22:24:50.882956 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4553 22:24:50.883078 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4554 22:24:50.883198 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4555 22:24:50.883311 # ok 2825 Set Streaming SVE VL 3088
4556 22:24:50.883416 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4557 22:24:50.883715 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4558 22:24:50.883818 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4559 22:24:50.884221 # ok 2829 Set Streaming SVE VL 3104
4560 22:24:50.884496 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4561 22:24:50.884578 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4562 22:24:50.884695 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4563 22:24:50.884809 # ok 2833 Set Streaming SVE VL 3120
4564 22:24:50.885101 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4565 22:24:50.885202 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4566 22:24:50.885316 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4567 22:24:50.885427 # ok 2837 Set Streaming SVE VL 3136
4568 22:24:50.885742 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4569 22:24:50.885847 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4570 22:24:50.885965 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4571 22:24:50.886084 # ok 2841 Set Streaming SVE VL 3152
4572 22:24:50.886219 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4573 22:24:50.886334 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4574 22:24:50.886592 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4575 22:24:50.886660 # ok 2845 Set Streaming SVE VL 3168
4576 22:24:50.886745 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4577 22:24:50.887026 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4578 22:24:50.887100 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4579 22:24:50.887191 # ok 2849 Set Streaming SVE VL 3184
4580 22:24:50.887456 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4581 22:24:50.887561 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4582 22:24:50.887678 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4583 22:24:50.887776 # ok 2853 Set Streaming SVE VL 3200
4584 22:24:50.887902 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4585 22:24:50.888216 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4586 22:24:50.888850 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4587 22:24:50.888950 # ok 2857 Set Streaming SVE VL 3216
4588 22:24:50.889030 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4589 22:24:50.889098 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4590 22:24:50.889311 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4591 22:24:50.889418 # ok 2861 Set Streaming SVE VL 3232
4592 22:24:50.889537 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4593 22:24:50.889617 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4594 22:24:50.889695 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4595 22:24:50.889778 # ok 2865 Set Streaming SVE VL 3248
4596 22:24:50.889865 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4597 22:24:50.889941 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4598 22:24:50.890206 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4599 22:24:50.890287 # ok 2869 Set Streaming SVE VL 3264
4600 22:24:50.890361 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4601 22:24:50.890434 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4602 22:24:50.890683 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4603 22:24:50.890748 # ok 2873 Set Streaming SVE VL 3280
4604 22:24:50.890820 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4605 22:24:50.891067 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4606 22:24:50.891132 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4607 22:24:50.891375 # ok 2877 Set Streaming SVE VL 3296
4608 22:24:50.898489 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4609 22:24:50.898628 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4610 22:24:50.898708 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4611 22:24:50.898785 # ok 2881 Set Streaming SVE VL 3312
4612 22:24:50.899055 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4613 22:24:50.899137 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4614 22:24:50.899393 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4615 22:24:50.899464 # ok 2885 Set Streaming SVE VL 3328
4616 22:24:50.899541 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4617 22:24:50.899795 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4618 22:24:50.899881 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4619 22:24:50.915404 # ok 2889 Set Streaming SVE VL 3344
4620 22:24:50.915840 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4621 22:24:50.915931 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4622 22:24:50.916029 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4623 22:24:50.921637 # ok 2893 Set Streaming SVE VL 3360
4624 22:24:50.921878 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4625 22:24:50.922183 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4626 22:24:50.922287 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4627 22:24:50.922374 # ok 2897 Set Streaming SVE VL 3376
4628 22:24:50.922456 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4629 22:24:50.922555 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4630 22:24:50.922644 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4631 22:24:50.922745 # ok 2901 Set Streaming SVE VL 3392
4632 22:24:50.922843 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4633 22:24:50.923142 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4634 22:24:50.923257 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4635 22:24:50.923356 # ok 2905 Set Streaming SVE VL 3408
4636 22:24:50.923651 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4637 22:24:50.923768 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4638 22:24:50.923872 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4639 22:24:50.927308 # ok 2909 Set Streaming SVE VL 3424
4640 22:24:50.927643 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4641 22:24:50.927750 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4642 22:24:50.927836 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4643 22:24:50.927940 # ok 2913 Set Streaming SVE VL 3440
4644 22:24:50.928026 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4645 22:24:50.940063 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4646 22:24:50.943541 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4647 22:24:50.943929 # ok 2917 Set Streaming SVE VL 3456
4648 22:24:50.944038 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4649 22:24:50.944131 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4650 22:24:50.954067 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4651 22:24:50.954524 # ok 2921 Set Streaming SVE VL 3472
4652 22:24:50.954634 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4653 22:24:50.954727 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4654 22:24:50.954831 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4655 22:24:50.954922 # ok 2925 Set Streaming SVE VL 3488
4656 22:24:50.955023 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4657 22:24:50.955324 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4658 22:24:50.955513 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4659 22:24:50.955653 # ok 2929 Set Streaming SVE VL 3504
4660 22:24:50.955826 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4661 22:24:50.955980 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4662 22:24:50.956100 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4663 22:24:50.959480 # ok 2933 Set Streaming SVE VL 3520
4664 22:24:50.959687 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4665 22:24:50.959801 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4666 22:24:50.959907 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4667 22:24:50.960009 # ok 2937 Set Streaming SVE VL 3536
4668 22:24:50.969737 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4669 22:24:50.970167 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4670 22:24:50.970288 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4671 22:24:50.970384 # ok 2941 Set Streaming SVE VL 3552
4672 22:24:50.970475 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4673 22:24:50.970580 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4674 22:24:50.970671 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4675 22:24:50.970784 # ok 2945 Set Streaming SVE VL 3568
4676 22:24:50.970860 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4677 22:24:50.970954 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4678 22:24:50.971043 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4679 22:24:50.971327 # ok 2949 Set Streaming SVE VL 3584
4680 22:24:50.971434 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4681 22:24:50.971559 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4682 22:24:50.971853 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4683 22:24:50.972131 # ok 2953 Set Streaming SVE VL 3600
4684 22:24:50.981885 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4685 22:24:50.982336 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4686 22:24:50.985866 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4687 22:24:50.986010 # ok 2957 Set Streaming SVE VL 3616
4688 22:24:50.986106 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4689 22:24:50.986195 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4690 22:24:50.986281 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4691 22:24:50.986365 # ok 2961 Set Streaming SVE VL 3632
4692 22:24:50.986450 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4693 22:24:50.986536 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4694 22:24:50.986620 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4695 22:24:50.986704 # ok 2965 Set Streaming SVE VL 3648
4696 22:24:50.986789 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4697 22:24:50.986874 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4698 22:24:50.986960 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4699 22:24:50.987048 # ok 2969 Set Streaming SVE VL 3664
4700 22:24:50.987131 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4701 22:24:50.987216 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4702 22:24:50.987301 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4703 22:24:50.988048 # ok 2973 Set Streaming SVE VL 3680
4704 22:24:50.989901 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4705 22:24:50.990043 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4706 22:24:50.990169 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4707 22:24:50.990286 # ok 2977 Set Streaming SVE VL 3696
4708 22:24:50.990581 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4709 22:24:50.990686 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4710 22:24:50.990776 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4711 22:24:50.990881 # ok 2981 Set Streaming SVE VL 3712
4712 22:24:50.990968 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4713 22:24:50.991069 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4714 22:24:50.991380 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4715 22:24:50.991502 # ok 2985 Set Streaming SVE VL 3728
4716 22:24:50.991800 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4717 22:24:50.992121 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4718 22:24:50.992208 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4719 22:24:50.992300 # ok 2989 Set Streaming SVE VL 3744
4720 22:24:50.997904 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4721 22:24:50.998275 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4722 22:24:50.998373 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4723 22:24:50.998479 # ok 2993 Set Streaming SVE VL 3760
4724 22:24:50.998602 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4725 22:24:50.998715 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4726 22:24:50.998828 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4727 22:24:50.998949 # ok 2997 Set Streaming SVE VL 3776
4728 22:24:50.999071 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4729 22:24:50.999386 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4730 22:24:50.999504 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4731 22:24:50.999617 # ok 3001 Set Streaming SVE VL 3792
4732 22:24:50.999733 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4733 22:24:50.999854 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4734 22:24:50.999974 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4735 22:24:51.005891 # ok 3005 Set Streaming SVE VL 3808
4736 22:24:51.006242 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4737 22:24:51.006343 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4738 22:24:51.006472 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4739 22:24:51.006575 # ok 3009 Set Streaming SVE VL 3824
4740 22:24:51.006699 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4741 22:24:51.006809 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4742 22:24:51.006919 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4743 22:24:51.007032 # ok 3013 Set Streaming SVE VL 3840
4744 22:24:51.007124 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4745 22:24:51.007235 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4746 22:24:51.007344 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4747 22:24:51.007432 # ok 3017 Set Streaming SVE VL 3856
4748 22:24:51.007541 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4749 22:24:51.007631 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4750 22:24:51.007743 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4751 22:24:51.007830 # ok 3021 Set Streaming SVE VL 3872
4752 22:24:51.007931 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4753 22:24:51.008221 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4754 22:24:51.018002 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4755 22:24:51.018190 # ok 3025 Set Streaming SVE VL 3888
4756 22:24:51.018299 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4757 22:24:51.019375 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4758 22:24:51.019672 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4759 22:24:51.019769 # ok 3029 Set Streaming SVE VL 3904
4760 22:24:51.019888 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4761 22:24:51.019982 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4762 22:24:51.025944 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4763 22:24:51.026353 # ok 3033 Set Streaming SVE VL 3920
4764 22:24:51.026455 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4765 22:24:51.026554 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4766 22:24:51.026672 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4767 22:24:51.026766 # ok 3037 Set Streaming SVE VL 3936
4768 22:24:51.026883 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4769 22:24:51.026976 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4770 22:24:51.027094 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4771 22:24:51.027205 # ok 3041 Set Streaming SVE VL 3952
4772 22:24:51.027297 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4773 22:24:51.027425 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4774 22:24:51.030043 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4775 22:24:51.030149 # ok 3045 Set Streaming SVE VL 3968
4776 22:24:51.030241 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4777 22:24:51.030319 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4778 22:24:51.030395 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4779 22:24:51.033947 # ok 3049 Set Streaming SVE VL 3984
4780 22:24:51.034252 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4781 22:24:51.034373 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4782 22:24:51.034501 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4783 22:24:51.034613 # ok 3053 Set Streaming SVE VL 4000
4784 22:24:51.034743 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4785 22:24:51.034853 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4786 22:24:51.034980 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4787 22:24:51.035074 # ok 3057 Set Streaming SVE VL 4016
4788 22:24:51.035197 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4789 22:24:51.035296 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4790 22:24:51.035423 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4791 22:24:51.035518 # ok 3061 Set Streaming SVE VL 4032
4792 22:24:51.035645 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4793 22:24:51.035739 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4794 22:24:51.035862 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4795 22:24:51.035977 # ok 3065 Set Streaming SVE VL 4048
4796 22:24:51.046313 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4797 22:24:51.046743 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4798 22:24:51.046858 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4799 22:24:51.046958 # ok 3069 Set Streaming SVE VL 4064
4800 22:24:51.047063 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4801 22:24:51.047164 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4802 22:24:51.047290 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4803 22:24:51.047392 # ok 3073 Set Streaming SVE VL 4080
4804 22:24:51.047692 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4805 22:24:51.047802 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4806 22:24:51.047909 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4807 22:24:51.048013 # ok 3077 Set Streaming SVE VL 4096
4808 22:24:51.048088 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4809 22:24:51.048153 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4810 22:24:51.050503 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4811 22:24:51.050871 # ok 3081 Set Streaming SVE VL 4112
4812 22:24:51.050981 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4813 22:24:51.051103 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4814 22:24:51.051199 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4815 22:24:51.051304 # ok 3085 Set Streaming SVE VL 4128
4816 22:24:51.051466 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4817 22:24:51.051563 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4818 22:24:51.051680 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4819 22:24:51.051779 # ok 3089 Set Streaming SVE VL 4144
4820 22:24:51.051891 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4821 22:24:51.052002 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4822 22:24:51.053816 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4823 22:24:51.054132 # ok 3093 Set Streaming SVE VL 4160
4824 22:24:51.054243 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4825 22:24:51.054367 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4826 22:24:51.054456 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4827 22:24:51.054634 # ok 3097 Set Streaming SVE VL 4176
4828 22:24:51.054737 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4829 22:24:51.054824 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4830 22:24:51.054921 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4831 22:24:51.055019 # ok 3101 Set Streaming SVE VL 4192
4832 22:24:51.055114 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4833 22:24:51.055758 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4834 22:24:51.055865 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4835 22:24:51.055949 # ok 3105 Set Streaming SVE VL 4208
4836 22:24:51.056024 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4837 22:24:51.056102 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4838 22:24:51.056169 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4839 22:24:51.068079 # ok 3109 Set Streaming SVE VL 4224
4840 22:24:51.068451 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4841 22:24:51.075121 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4842 22:24:51.075277 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4843 22:24:51.075408 # ok 3113 Set Streaming SVE VL 4240
4844 22:24:51.075503 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4845 22:24:51.075636 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4846 22:24:51.075747 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4847 22:24:51.075854 # ok 3117 Set Streaming SVE VL 4256
4848 22:24:51.076157 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4849 22:24:51.082734 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4850 22:24:51.083146 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4851 22:24:51.083263 # ok 3121 Set Streaming SVE VL 4272
4852 22:24:51.083354 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4853 22:24:51.083642 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4854 22:24:51.083750 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4855 22:24:51.083839 # ok 3125 Set Streaming SVE VL 4288
4856 22:24:51.083930 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4857 22:24:51.084033 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4858 22:24:51.084121 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4859 22:24:51.084211 # ok 3129 Set Streaming SVE VL 4304
4860 22:24:51.088122 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4861 22:24:51.099155 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4862 22:24:51.099378 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4863 22:24:51.099477 # ok 3133 Set Streaming SVE VL 4320
4864 22:24:51.099583 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4865 22:24:51.099675 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4866 22:24:51.099764 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4867 22:24:51.099869 # ok 3137 Set Streaming SVE VL 4336
4868 22:24:51.099963 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4869 22:24:51.100048 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4870 22:24:51.105784 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4871 22:24:51.106130 # ok 3141 Set Streaming SVE VL 4352
4872 22:24:51.106260 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4873 22:24:51.106372 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4874 22:24:51.106501 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4875 22:24:51.106613 # ok 3145 Set Streaming SVE VL 4368
4876 22:24:51.106747 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4877 22:24:51.106855 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4878 22:24:51.106989 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4879 22:24:51.107325 # ok 3149 Set Streaming SVE VL 4384
4880 22:24:51.107440 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4881 22:24:51.107547 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4882 22:24:51.107864 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4883 22:24:51.107988 # ok 3153 Set Streaming SVE VL 4400
4884 22:24:51.114643 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4885 22:24:51.114977 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4886 22:24:51.115099 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4887 22:24:51.115193 # ok 3157 Set Streaming SVE VL 4416
4888 22:24:51.115299 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4889 22:24:51.115404 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4890 22:24:51.115506 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4891 22:24:51.115797 # ok 3161 Set Streaming SVE VL 4432
4892 22:24:51.115902 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4893 22:24:51.116008 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4894 22:24:51.116114 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4895 22:24:51.117803 # ok 3165 Set Streaming SVE VL 4448
4896 22:24:51.117909 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4897 22:24:51.117999 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4898 22:24:51.118243 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4899 22:24:51.118358 # ok 3169 Set Streaming SVE VL 4464
4900 22:24:51.118467 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4901 22:24:51.118558 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4902 22:24:51.118648 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4903 22:24:51.118752 # ok 3173 Set Streaming SVE VL 4480
4904 22:24:51.118841 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4905 22:24:51.118943 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4906 22:24:51.119034 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4907 22:24:51.133840 # ok 3177 Set Streaming SVE VL 4496
4908 22:24:51.134225 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4909 22:24:51.134338 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4910 22:24:51.134431 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4911 22:24:51.134534 # ok 3181 Set Streaming SVE VL 4512
4912 22:24:51.134832 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4913 22:24:51.134942 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4914 22:24:51.135036 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4915 22:24:51.135141 # ok 3185 Set Streaming SVE VL 4528
4916 22:24:51.135233 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4917 22:24:51.135338 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4918 22:24:51.135443 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4919 22:24:51.135539 # ok 3189 Set Streaming SVE VL 4544
4920 22:24:51.135645 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4921 22:24:51.135737 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4922 22:24:51.135840 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4923 22:24:51.135950 # ok 3193 Set Streaming SVE VL 4560
4924 22:24:51.136050 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4925 22:24:51.142698 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4926 22:24:51.143050 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4927 22:24:51.143151 # ok 3197 Set Streaming SVE VL 4576
4928 22:24:51.143254 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4929 22:24:51.143342 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4930 22:24:51.143445 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4931 22:24:51.143759 # ok 3201 Set Streaming SVE VL 4592
4932 22:24:51.143865 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4933 22:24:51.144155 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4934 22:24:51.144261 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4935 22:24:51.144351 # ok 3205 Set Streaming SVE VL 4608
4936 22:24:51.145767 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4937 22:24:51.145879 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4938 22:24:51.146170 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4939 22:24:51.146290 # ok 3209 Set Streaming SVE VL 4624
4940 22:24:51.146420 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4941 22:24:51.146531 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4942 22:24:51.146659 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4943 22:24:51.146768 # ok 3213 Set Streaming SVE VL 4640
4944 22:24:51.146898 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4945 22:24:51.147202 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4946 22:24:51.147308 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4947 22:24:51.147420 # ok 3217 Set Streaming SVE VL 4656
4948 22:24:51.147548 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4949 22:24:51.147657 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4950 22:24:51.147799 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4951 22:24:51.147932 # ok 3221 Set Streaming SVE VL 4672
4952 22:24:51.148048 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4953 22:24:51.148157 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4954 22:24:51.148275 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4955 22:24:51.158130 # ok 3225 Set Streaming SVE VL 4688
4956 22:24:51.159360 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4957 22:24:51.159480 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4958 22:24:51.159574 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4959 22:24:51.159661 # ok 3229 Set Streaming SVE VL 4704
4960 22:24:51.159747 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4961 22:24:51.159830 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4962 22:24:51.159916 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4963 22:24:51.160001 # ok 3233 Set Streaming SVE VL 4720
4964 22:24:51.160088 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4965 22:24:51.160175 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4966 22:24:51.160466 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4967 22:24:51.160575 # ok 3237 Set Streaming SVE VL 4736
4968 22:24:51.160666 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4969 22:24:51.160755 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4970 22:24:51.160844 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4971 22:24:51.161874 # ok 3241 Set Streaming SVE VL 4752
4972 22:24:51.162199 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4973 22:24:51.162307 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4974 22:24:51.162606 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4975 22:24:51.162708 # ok 3245 Set Streaming SVE VL 4768
4976 22:24:51.162795 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4977 22:24:51.163085 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4978 22:24:51.163195 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4979 22:24:51.163282 # ok 3249 Set Streaming SVE VL 4784
4980 22:24:51.163368 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4981 22:24:51.163671 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4982 22:24:51.163775 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4983 22:24:51.163862 # ok 3253 Set Streaming SVE VL 4800
4984 22:24:51.163965 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4985 22:24:51.164052 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4986 22:24:51.164149 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4987 22:24:51.170988 # ok 3257 Set Streaming SVE VL 4816
4988 22:24:51.171377 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4989 22:24:51.171493 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4990 22:24:51.171600 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4991 22:24:51.171690 # ok 3261 Set Streaming SVE VL 4832
4992 22:24:51.171793 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4993 22:24:51.171896 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4994 22:24:51.171988 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4995 22:24:51.172096 # ok 3265 Set Streaming SVE VL 4848
4996 22:24:51.172184 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4997 22:24:51.179104 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4998 22:24:51.179486 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4999 22:24:51.179597 # ok 3269 Set Streaming SVE VL 4864
5000 22:24:51.179689 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
5001 22:24:51.179796 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
5002 22:24:51.179889 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5003 22:24:51.179978 # ok 3273 Set Streaming SVE VL 4880
5004 22:24:51.180081 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5005 22:24:51.180189 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5006 22:24:51.190181 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5007 22:24:51.190372 # ok 3277 Set Streaming SVE VL 4896
5008 22:24:51.190679 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5009 22:24:51.190787 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5010 22:24:51.190892 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5011 22:24:51.190984 # ok 3281 Set Streaming SVE VL 4912
5012 22:24:51.191088 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5013 22:24:51.191392 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5014 22:24:51.191504 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5015 22:24:51.191597 # ok 3285 Set Streaming SVE VL 4928
5016 22:24:51.191702 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5017 22:24:51.191791 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5018 22:24:51.191893 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5019 22:24:51.191995 # ok 3289 Set Streaming SVE VL 4944
5020 22:24:51.192281 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5021 22:24:51.198881 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5022 22:24:51.199532 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5023 22:24:51.199650 # ok 3293 Set Streaming SVE VL 4960
5024 22:24:51.199744 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5025 22:24:51.199833 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5026 22:24:51.199942 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5027 22:24:51.200033 # ok 3297 Set Streaming SVE VL 4976
5028 22:24:51.200121 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5029 22:24:51.200224 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5030 22:24:51.201513 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5031 22:24:51.201826 # ok 3301 Set Streaming SVE VL 4992
5032 22:24:51.202168 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5033 22:24:51.202277 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5034 22:24:51.202365 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5035 22:24:51.202466 # ok 3305 Set Streaming SVE VL 5008
5036 22:24:51.202554 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5037 22:24:51.202655 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5038 22:24:51.202758 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5039 22:24:51.203050 # ok 3309 Set Streaming SVE VL 5024
5040 22:24:51.203162 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5041 22:24:51.203267 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5042 22:24:51.203358 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5043 22:24:51.203646 # ok 3313 Set Streaming SVE VL 5040
5044 22:24:51.203752 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5045 22:24:51.204097 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5046 22:24:51.204203 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5047 22:24:51.204296 # ok 3317 Set Streaming SVE VL 5056
5048 22:24:51.204387 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5049 22:24:51.210846 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5050 22:24:51.211290 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5051 22:24:51.211402 # ok 3321 Set Streaming SVE VL 5072
5052 22:24:51.211498 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5053 22:24:51.211589 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5054 22:24:51.211694 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5055 22:24:51.211785 # ok 3325 Set Streaming SVE VL 5088
5056 22:24:51.211888 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5057 22:24:51.234900 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5058 22:24:51.235421 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5059 22:24:51.235532 # ok 3329 Set Streaming SVE VL 5104
5060 22:24:51.235622 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5061 22:24:51.235727 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5062 22:24:51.235818 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5063 22:24:51.236231 # ok 3333 Set Streaming SVE VL 5120
5064 22:24:51.236342 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5065 22:24:51.236431 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5066 22:24:51.236518 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5067 22:24:51.236605 # ok 3337 Set Streaming SVE VL 5136
5068 22:24:51.236687 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5069 22:24:51.238124 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5070 22:24:51.238244 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5071 22:24:51.238542 # ok 3341 Set Streaming SVE VL 5152
5072 22:24:51.238671 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5073 22:24:51.238772 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5074 22:24:51.238847 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5075 22:24:51.238925 # ok 3345 Set Streaming SVE VL 5168
5076 22:24:51.239260 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5077 22:24:51.239345 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5078 22:24:51.239607 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5079 22:24:51.239695 # ok 3349 Set Streaming SVE VL 5184
5080 22:24:51.239811 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5081 22:24:51.239922 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5082 22:24:51.240025 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5083 22:24:51.240119 # ok 3353 Set Streaming SVE VL 5200
5084 22:24:51.242547 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5085 22:24:51.242871 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5086 22:24:51.242985 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5087 22:24:51.243105 # ok 3357 Set Streaming SVE VL 5216
5088 22:24:51.243201 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5089 22:24:51.243325 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5090 22:24:51.243446 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5091 22:24:51.243543 # ok 3361 Set Streaming SVE VL 5232
5092 22:24:51.243855 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5093 22:24:51.243948 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5094 22:24:51.244074 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5095 22:24:51.252204 # ok 3365 Set Streaming SVE VL 5248
5096 22:24:51.254402 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5097 22:24:51.254802 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5098 22:24:51.254895 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5099 22:24:51.254992 # ok 3369 Set Streaming SVE VL 5264
5100 22:24:51.255283 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5101 22:24:51.255395 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5102 22:24:51.255490 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5103 22:24:51.255590 # ok 3373 Set Streaming SVE VL 5280
5104 22:24:51.255686 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5105 22:24:51.255800 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5106 22:24:51.255905 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5107 22:24:51.256008 # ok 3377 Set Streaming SVE VL 5296
5108 22:24:51.256118 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5109 22:24:51.261899 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5110 22:24:51.262226 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5111 22:24:51.262340 # ok 3381 Set Streaming SVE VL 5312
5112 22:24:51.262637 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5113 22:24:51.262734 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5114 22:24:51.262823 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5115 22:24:51.262922 # ok 3385 Set Streaming SVE VL 5328
5116 22:24:51.263010 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5117 22:24:51.263112 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5118 22:24:51.263216 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5119 22:24:51.263500 # ok 3389 Set Streaming SVE VL 5344
5120 22:24:51.263597 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5121 22:24:51.263887 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5122 22:24:51.263997 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5123 22:24:51.264088 # ok 3393 Set Streaming SVE VL 5360
5124 22:24:51.264187 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5125 22:24:51.269273 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5126 22:24:51.269609 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5127 22:24:51.269729 # ok 3397 Set Streaming SVE VL 5376
5128 22:24:51.269818 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5129 22:24:51.269917 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5130 22:24:51.270004 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5131 22:24:51.270104 # ok 3401 Set Streaming SVE VL 5392
5132 22:24:51.270207 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5133 22:24:51.270310 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5134 22:24:51.270409 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5135 22:24:51.270510 # ok 3405 Set Streaming SVE VL 5408
5136 22:24:51.270610 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5137 22:24:51.270918 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5138 22:24:51.271045 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5139 22:24:51.271170 # ok 3409 Set Streaming SVE VL 5424
5140 22:24:51.271490 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5141 22:24:51.271598 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5142 22:24:51.271675 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5143 22:24:51.271768 # ok 3413 Set Streaming SVE VL 5440
5144 22:24:51.271862 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5145 22:24:51.271982 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5146 22:24:51.272105 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5147 22:24:51.285323 # ok 3417 Set Streaming SVE VL 5456
5148 22:24:51.285777 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5149 22:24:51.285889 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5150 22:24:51.285982 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5151 22:24:51.286084 # ok 3421 Set Streaming SVE VL 5472
5152 22:24:51.286171 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5153 22:24:51.286258 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5154 22:24:51.286359 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5155 22:24:51.286449 # ok 3425 Set Streaming SVE VL 5488
5156 22:24:51.286548 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5157 22:24:51.286886 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5158 22:24:51.287176 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5159 22:24:51.287284 # ok 3429 Set Streaming SVE VL 5504
5160 22:24:51.287384 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5161 22:24:51.287675 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5162 22:24:51.287783 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5163 22:24:51.287873 # ok 3433 Set Streaming SVE VL 5520
5164 22:24:51.287979 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5165 22:24:51.288067 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5166 22:24:51.288167 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5167 22:24:51.288269 # ok 3437 Set Streaming SVE VL 5536
5168 22:24:51.288605 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5169 22:24:51.288725 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5170 22:24:51.306032 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5171 22:24:51.306248 # ok 3441 Set Streaming SVE VL 5552
5172 22:24:51.306365 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5173 22:24:51.306457 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5174 22:24:51.306559 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5175 22:24:51.306652 # ok 3445 Set Streaming SVE VL 5568
5176 22:24:51.306752 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5177 22:24:51.306850 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5178 22:24:51.306951 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5179 22:24:51.307038 # ok 3449 Set Streaming SVE VL 5584
5180 22:24:51.307352 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5181 22:24:51.307465 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5182 22:24:51.307553 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5183 22:24:51.307654 # ok 3453 Set Streaming SVE VL 5600
5184 22:24:51.307758 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5185 22:24:51.307845 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5186 22:24:51.307943 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5187 22:24:51.308044 # ok 3457 Set Streaming SVE VL 5616
5188 22:24:51.308131 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5189 22:24:51.321945 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5190 22:24:51.322423 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5191 22:24:51.322530 # ok 3461 Set Streaming SVE VL 5632
5192 22:24:51.322618 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5193 22:24:51.322716 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5194 22:24:51.322812 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5195 22:24:51.322916 # ok 3465 Set Streaming SVE VL 5648
5196 22:24:51.323003 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5197 22:24:51.323105 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5198 22:24:51.323405 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5199 22:24:51.323515 # ok 3469 Set Streaming SVE VL 5664
5200 22:24:51.323622 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5201 22:24:51.323724 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5202 22:24:51.323938 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5203 22:24:51.324068 # ok 3473 Set Streaming SVE VL 5680
5204 22:24:51.324170 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5205 22:24:51.324268 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5206 22:24:51.347300 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5207 22:24:51.347674 # ok 3477 Set Streaming SVE VL 5696
5208 22:24:51.347776 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5209 22:24:51.347886 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5210 22:24:51.347976 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5211 22:24:51.348083 # ok 3481 Set Streaming SVE VL 5712
5212 22:24:51.362895 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5213 22:24:51.363323 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5214 22:24:51.363441 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5215 22:24:51.363533 # ok 3485 Set Streaming SVE VL 5728
5216 22:24:51.363640 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5217 22:24:51.363736 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5218 22:24:51.364041 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5219 22:24:51.364148 # ok 3489 Set Streaming SVE VL 5744
5220 22:24:51.364239 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5221 22:24:51.364327 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5222 22:24:51.373819 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5223 22:24:51.374168 # ok 3493 Set Streaming SVE VL 5760
5224 22:24:51.374272 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5225 22:24:51.374385 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5226 22:24:51.374704 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5227 22:24:51.374832 # ok 3497 Set Streaming SVE VL 5776
5228 22:24:51.374941 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5229 22:24:51.375068 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5230 22:24:51.375175 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5231 22:24:51.375285 # ok 3501 Set Streaming SVE VL 5792
5232 22:24:51.375388 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5233 22:24:51.375520 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5234 22:24:51.375628 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5235 22:24:51.375731 # ok 3505 Set Streaming SVE VL 5808
5236 22:24:51.375855 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5237 22:24:51.375961 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5238 22:24:51.376067 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5239 22:24:51.376181 # ok 3509 Set Streaming SVE VL 5824
5240 22:24:51.376271 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5241 22:24:51.376376 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5242 22:24:51.394935 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5243 22:24:51.395425 # ok 3513 Set Streaming SVE VL 5840
5244 22:24:51.395521 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5245 22:24:51.395602 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5246 22:24:51.395685 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5247 22:24:51.395972 # ok 3517 Set Streaming SVE VL 5856
5248 22:24:51.396061 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5249 22:24:51.396148 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5250 22:24:51.396225 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5251 22:24:51.396318 # ok 3521 Set Streaming SVE VL 5872
5252 22:24:51.396389 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5253 22:24:51.414967 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5254 22:24:51.415554 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5255 22:24:51.415665 # ok 3525 Set Streaming SVE VL 5888
5256 22:24:51.415758 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5257 22:24:51.415846 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5258 22:24:51.416399 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5259 22:24:51.416568 # ok 3529 Set Streaming SVE VL 5904
5260 22:24:51.416662 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5261 22:24:51.416749 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5262 22:24:51.416837 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5263 22:24:51.416925 # ok 3533 Set Streaming SVE VL 5920
5264 22:24:51.417211 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5265 22:24:51.417315 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5266 22:24:51.417402 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5267 22:24:51.417488 # ok 3537 Set Streaming SVE VL 5936
5268 22:24:51.417576 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5269 22:24:51.435461 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5270 22:24:51.435793 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5271 22:24:51.436295 # ok 3541 Set Streaming SVE VL 5952
5272 22:24:51.436704 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5273 22:24:51.436863 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5274 22:24:51.436996 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5275 22:24:51.437127 # ok 3545 Set Streaming SVE VL 5968
5276 22:24:51.437251 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5277 22:24:51.437374 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5278 22:24:51.437502 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5279 22:24:51.455164 # ok 3549 Set Streaming SVE VL 5984
5280 22:24:51.455547 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5281 22:24:51.455657 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5282 22:24:51.455746 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5283 22:24:51.455859 # ok 3553 Set Streaming SVE VL 6000
5284 22:24:51.456168 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5285 22:24:51.456269 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5286 22:24:51.456362 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5287 22:24:51.456449 # ok 3557 Set Streaming SVE VL 6016
5288 22:24:51.463565 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5289 22:24:51.463955 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5290 22:24:51.464270 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5291 22:24:51.464376 # ok 3561 Set Streaming SVE VL 6032
5292 22:24:51.464467 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5293 22:24:51.479350 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5294 22:24:51.479766 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5295 22:24:51.479876 # ok 3565 Set Streaming SVE VL 6048
5296 22:24:51.480175 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5297 22:24:51.480282 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5298 22:24:51.480372 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5299 22:24:51.480458 # ok 3569 Set Streaming SVE VL 6064
5300 22:24:51.487769 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5301 22:24:51.488192 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5302 22:24:51.502382 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5303 22:24:51.502830 # ok 3573 Set Streaming SVE VL 6080
5304 22:24:51.502940 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5305 22:24:51.503032 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5306 22:24:51.503127 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5307 22:24:51.503230 # ok 3577 Set Streaming SVE VL 6096
5308 22:24:51.503319 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5309 22:24:51.503421 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5310 22:24:51.503506 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5311 22:24:51.503607 # ok 3581 Set Streaming SVE VL 6112
5312 22:24:51.503694 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5313 22:24:51.504001 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5314 22:24:51.504116 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5315 22:24:51.504220 # ok 3585 Set Streaming SVE VL 6128
5316 22:24:51.504308 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5317 22:24:51.513811 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5318 22:24:51.514034 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5319 22:24:51.514128 # ok 3589 Set Streaming SVE VL 6144
5320 22:24:51.514230 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5321 22:24:51.514333 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5322 22:24:51.514645 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5323 22:24:51.514766 # ok 3593 Set Streaming SVE VL 6160
5324 22:24:51.514878 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5325 22:24:51.515186 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5326 22:24:51.515306 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5327 22:24:51.515397 # ok 3597 Set Streaming SVE VL 6176
5328 22:24:51.515499 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5329 22:24:51.515740 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5330 22:24:51.516070 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5331 22:24:51.516182 # ok 3601 Set Streaming SVE VL 6192
5332 22:24:51.516285 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5333 22:24:51.516400 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5334 22:24:51.516727 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5335 22:24:51.516839 # ok 3605 Set Streaming SVE VL 6208
5336 22:24:51.526111 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5337 22:24:51.526516 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5338 22:24:51.526626 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5339 22:24:51.526716 # ok 3609 Set Streaming SVE VL 6224
5340 22:24:51.526816 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5341 22:24:51.526904 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5342 22:24:51.527006 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5343 22:24:51.527116 # ok 3613 Set Streaming SVE VL 6240
5344 22:24:51.527426 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5345 22:24:51.527532 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5346 22:24:51.527634 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5347 22:24:51.527739 # ok 3617 Set Streaming SVE VL 6256
5348 22:24:51.527852 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5349 22:24:51.528136 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5350 22:24:51.528245 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5351 22:24:51.540092 # ok 3621 Set Streaming SVE VL 6272
5352 22:24:51.540549 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5353 22:24:51.555600 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5354 22:24:51.556038 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5355 22:24:51.556152 # ok 3625 Set Streaming SVE VL 6288
5356 22:24:51.559452 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5357 22:24:51.559593 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5358 22:24:51.559705 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5359 22:24:51.559797 # ok 3629 Set Streaming SVE VL 6304
5360 22:24:51.559900 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5361 22:24:51.560005 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5362 22:24:51.560310 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5363 22:24:51.567338 # ok 3633 Set Streaming SVE VL 6320
5364 22:24:51.567698 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5365 22:24:51.567807 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5366 22:24:51.567934 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5367 22:24:51.568034 # ok 3637 Set Streaming SVE VL 6336
5368 22:24:51.568168 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5369 22:24:51.568257 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5370 22:24:51.579202 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5371 22:24:51.579575 # ok 3641 Set Streaming SVE VL 6352
5372 22:24:51.579670 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5373 22:24:51.579789 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5374 22:24:51.579876 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5375 22:24:51.579955 # ok 3645 Set Streaming SVE VL 6368
5376 22:24:51.580048 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5377 22:24:51.580126 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5378 22:24:51.580230 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5379 22:24:51.591400 # ok 3649 Set Streaming SVE VL 6384
5380 22:24:51.591793 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5381 22:24:51.591891 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5382 22:24:51.591997 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5383 22:24:51.592123 # ok 3653 Set Streaming SVE VL 6400
5384 22:24:51.592220 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5385 22:24:51.592303 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5386 22:24:51.599340 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5387 22:24:51.599846 # ok 3657 Set Streaming SVE VL 6416
5388 22:24:51.600007 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5389 22:24:51.600173 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5390 22:24:51.600289 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5391 22:24:51.600385 # ok 3661 Set Streaming SVE VL 6432
5392 22:24:51.600454 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5393 22:24:51.600517 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5394 22:24:51.600578 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5395 22:24:51.600639 # ok 3665 Set Streaming SVE VL 6448
5396 22:24:51.604263 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5397 22:24:51.615315 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5398 22:24:51.615771 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5399 22:24:51.615881 # ok 3669 Set Streaming SVE VL 6464
5400 22:24:51.615974 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5401 22:24:51.616062 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5402 22:24:51.616170 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5403 22:24:51.616263 # ok 3673 Set Streaming SVE VL 6480
5404 22:24:51.616349 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5405 22:24:51.616452 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5406 22:24:51.616539 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5407 22:24:51.616633 # ok 3677 Set Streaming SVE VL 6496
5408 22:24:51.616726 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5409 22:24:51.617037 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5410 22:24:51.617141 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5411 22:24:51.617236 # ok 3681 Set Streaming SVE VL 6512
5412 22:24:51.617328 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5413 22:24:51.617421 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5414 22:24:51.617697 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5415 22:24:51.617800 # ok 3685 Set Streaming SVE VL 6528
5416 22:24:51.634115 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5417 22:24:51.636417 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5418 22:24:51.636560 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5419 22:24:51.636646 # ok 3689 Set Streaming SVE VL 6544
5420 22:24:51.636728 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5421 22:24:51.636809 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5422 22:24:51.636895 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5423 22:24:51.636982 # ok 3693 Set Streaming SVE VL 6560
5424 22:24:51.637066 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5425 22:24:51.637150 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5426 22:24:51.637238 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5427 22:24:51.637326 # ok 3697 Set Streaming SVE VL 6576
5428 22:24:51.637413 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5429 22:24:51.637496 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5430 22:24:51.637581 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5431 22:24:51.637676 # ok 3701 Set Streaming SVE VL 6592
5432 22:24:51.637765 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5433 22:24:51.637847 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5434 22:24:51.637935 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5435 22:24:51.642117 # ok 3705 Set Streaming SVE VL 6608
5436 22:24:51.642482 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5437 22:24:51.642592 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5438 22:24:51.642696 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5439 22:24:51.642783 # ok 3709 Set Streaming SVE VL 6624
5440 22:24:51.642883 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5441 22:24:51.643173 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5442 22:24:51.643279 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5443 22:24:51.643388 # ok 3713 Set Streaming SVE VL 6640
5444 22:24:51.643489 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5445 22:24:51.643592 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5446 22:24:51.643892 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5447 22:24:51.644014 # ok 3717 Set Streaming SVE VL 6656
5448 22:24:51.644117 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5449 22:24:51.644422 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5450 22:24:51.654118 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5451 22:24:51.654508 # ok 3721 Set Streaming SVE VL 6672
5452 22:24:51.654620 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5453 22:24:51.654714 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5454 22:24:51.654819 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5455 22:24:51.654910 # ok 3725 Set Streaming SVE VL 6688
5456 22:24:51.655012 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5457 22:24:51.655119 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5458 22:24:51.655441 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5459 22:24:51.655550 # ok 3729 Set Streaming SVE VL 6704
5460 22:24:51.655656 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5461 22:24:51.655748 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5462 22:24:51.655858 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5463 22:24:51.655969 # ok 3733 Set Streaming SVE VL 6720
5464 22:24:51.656293 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5465 22:24:51.658220 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5466 22:24:51.658574 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5467 22:24:51.658683 # ok 3737 Set Streaming SVE VL 6736
5468 22:24:51.658786 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5469 22:24:51.658888 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5470 22:24:51.659193 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5471 22:24:51.659314 # ok 3741 Set Streaming SVE VL 6752
5472 22:24:51.659596 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5473 22:24:51.659707 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5474 22:24:51.659809 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5475 22:24:51.659910 # ok 3745 Set Streaming SVE VL 6768
5476 22:24:51.660238 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5477 22:24:51.660349 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5478 22:24:51.661872 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5479 22:24:51.662164 # ok 3749 Set Streaming SVE VL 6784
5480 22:24:51.662275 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5481 22:24:51.662381 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5482 22:24:51.662471 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5483 22:24:51.662746 # ok 3753 Set Streaming SVE VL 6800
5484 22:24:51.662834 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5485 22:24:51.662957 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5486 22:24:51.663270 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5487 22:24:51.663372 # ok 3757 Set Streaming SVE VL 6816
5488 22:24:51.663488 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5489 22:24:51.663610 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5490 22:24:51.663908 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5491 22:24:51.663992 # ok 3761 Set Streaming SVE VL 6832
5492 22:24:51.664105 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5493 22:24:51.664217 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5494 22:24:51.674410 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5495 22:24:51.674829 # ok 3765 Set Streaming SVE VL 6848
5496 22:24:51.677878 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5497 22:24:51.678018 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5498 22:24:51.678111 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5499 22:24:51.678198 # ok 3769 Set Streaming SVE VL 6864
5500 22:24:51.678288 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5501 22:24:51.678381 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5502 22:24:51.678468 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5503 22:24:51.678549 # ok 3773 Set Streaming SVE VL 6880
5504 22:24:51.678625 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5505 22:24:51.683744 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5506 22:24:51.684177 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5507 22:24:51.684287 # ok 3777 Set Streaming SVE VL 6896
5508 22:24:51.684399 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5509 22:24:51.684511 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5510 22:24:51.684643 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5511 22:24:51.684751 # ok 3781 Set Streaming SVE VL 6912
5512 22:24:51.684863 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5513 22:24:51.684996 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5514 22:24:51.685106 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5515 22:24:51.685239 # ok 3785 Set Streaming SVE VL 6928
5516 22:24:51.685347 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5517 22:24:51.685480 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5518 22:24:51.685608 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5519 22:24:51.685732 # ok 3789 Set Streaming SVE VL 6944
5520 22:24:51.685862 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5521 22:24:51.685990 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5522 22:24:51.686122 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5523 22:24:51.686251 # ok 3793 Set Streaming SVE VL 6960
5524 22:24:51.686378 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5525 22:24:51.686707 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5526 22:24:51.699042 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5527 22:24:51.699501 # ok 3797 Set Streaming SVE VL 6976
5528 22:24:51.699615 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5529 22:24:51.699706 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5530 22:24:51.699808 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5531 22:24:51.699896 # ok 3801 Set Streaming SVE VL 6992
5532 22:24:51.699981 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5533 22:24:51.700082 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5534 22:24:51.700174 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5535 22:24:51.700276 # ok 3805 Set Streaming SVE VL 7008
5536 22:24:51.700381 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5537 22:24:51.700494 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5538 22:24:51.700842 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5539 22:24:51.700953 # ok 3809 Set Streaming SVE VL 7024
5540 22:24:51.701055 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5541 22:24:51.701154 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5542 22:24:51.701264 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5543 22:24:51.701498 # ok 3813 Set Streaming SVE VL 7040
5544 22:24:51.701805 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5545 22:24:51.701928 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5546 22:24:51.719910 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5547 22:24:51.720141 # ok 3817 Set Streaming SVE VL 7056
5548 22:24:51.720461 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5549 22:24:51.720570 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5550 22:24:51.720665 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5551 22:24:51.722297 # ok 3821 Set Streaming SVE VL 7072
5552 22:24:51.722619 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5553 22:24:51.722727 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5554 22:24:51.722833 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5555 22:24:51.722921 # ok 3825 Set Streaming SVE VL 7088
5556 22:24:51.723205 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5557 22:24:51.723311 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5558 22:24:51.723413 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5559 22:24:51.723501 # ok 3829 Set Streaming SVE VL 7104
5560 22:24:51.723606 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5561 22:24:51.723892 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5562 22:24:51.723989 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5563 22:24:51.724076 # ok 3833 Set Streaming SVE VL 7120
5564 22:24:51.724184 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5565 22:24:51.724276 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5566 22:24:51.724366 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5567 22:24:51.731551 # ok 3837 Set Streaming SVE VL 7136
5568 22:24:51.731922 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5569 22:24:51.732381 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5570 22:24:51.732503 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5571 22:24:51.732593 # ok 3841 Set Streaming SVE VL 7152
5572 22:24:51.732682 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5573 22:24:51.732772 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5574 22:24:51.742160 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5575 22:24:51.742304 # ok 3845 Set Streaming SVE VL 7168
5576 22:24:51.742612 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5577 22:24:51.742717 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5578 22:24:51.742823 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5579 22:24:51.742914 # ok 3849 Set Streaming SVE VL 7184
5580 22:24:51.743392 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5581 22:24:51.743498 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5582 22:24:51.743587 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5583 22:24:51.743673 # ok 3853 Set Streaming SVE VL 7200
5584 22:24:51.743774 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5585 22:24:51.743861 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5586 22:24:51.743948 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5587 22:24:51.744310 # ok 3857 Set Streaming SVE VL 7216
5588 22:24:51.744417 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5589 22:24:51.744506 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5590 22:24:51.744588 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5591 22:24:51.744672 # ok 3861 Set Streaming SVE VL 7232
5592 22:24:51.744985 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5593 22:24:51.745092 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5594 22:24:51.745178 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5595 22:24:51.745261 # ok 3865 Set Streaming SVE VL 7248
5596 22:24:51.745345 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5597 22:24:51.745429 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5598 22:24:51.751528 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5599 22:24:51.751913 # ok 3869 Set Streaming SVE VL 7264
5600 22:24:51.752019 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5601 22:24:51.752108 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5602 22:24:51.752416 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5603 22:24:51.752527 # ok 3873 Set Streaming SVE VL 7280
5604 22:24:51.752615 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5605 22:24:51.752701 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5606 22:24:51.753879 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5607 22:24:51.754190 # ok 3877 Set Streaming SVE VL 7296
5608 22:24:51.754293 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5609 22:24:51.754381 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5610 22:24:51.754483 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5611 22:24:51.754572 # ok 3881 Set Streaming SVE VL 7312
5612 22:24:51.754675 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5613 22:24:51.754763 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5614 22:24:51.754865 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5615 22:24:51.754970 # ok 3885 Set Streaming SVE VL 7328
5616 22:24:51.755072 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5617 22:24:51.755206 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5618 22:24:51.755518 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5619 22:24:51.755622 # ok 3889 Set Streaming SVE VL 7344
5620 22:24:51.755729 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5621 22:24:51.756032 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5622 22:24:51.756141 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5623 22:24:51.756260 # ok 3893 Set Streaming SVE VL 7360
5624 22:24:51.756364 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5625 22:24:51.756462 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5626 22:24:51.763902 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5627 22:24:51.764151 # ok 3897 Set Streaming SVE VL 7376
5628 22:24:51.764441 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5629 22:24:51.764546 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5630 22:24:51.764636 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5631 22:24:51.765809 # ok 3901 Set Streaming SVE VL 7392
5632 22:24:51.766122 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5633 22:24:51.766231 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5634 22:24:51.766334 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5635 22:24:51.766424 # ok 3905 Set Streaming SVE VL 7408
5636 22:24:51.766526 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5637 22:24:51.766657 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5638 22:24:51.766998 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5639 22:24:51.767105 # ok 3909 Set Streaming SVE VL 7424
5640 22:24:51.767206 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5641 22:24:51.767307 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5642 22:24:51.767614 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5643 22:24:51.767725 # ok 3913 Set Streaming SVE VL 7440
5644 22:24:51.767826 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5645 22:24:51.767927 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5646 22:24:51.768249 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5647 22:24:51.768357 # ok 3917 Set Streaming SVE VL 7456
5648 22:24:51.768458 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5649 22:24:51.774434 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5650 22:24:51.774912 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5651 22:24:51.775016 # ok 3921 Set Streaming SVE VL 7472
5652 22:24:51.775102 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5653 22:24:51.775192 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5654 22:24:51.775290 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5655 22:24:51.778659 # ok 3925 Set Streaming SVE VL 7488
5656 22:24:51.779186 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5657 22:24:51.779281 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5658 22:24:51.779362 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5659 22:24:51.779435 # ok 3929 Set Streaming SVE VL 7504
5660 22:24:51.779525 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5661 22:24:51.779877 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5662 22:24:51.779970 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5663 22:24:51.780050 # ok 3933 Set Streaming SVE VL 7520
5664 22:24:51.780124 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5665 22:24:51.780212 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5666 22:24:51.780289 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5667 22:24:51.780363 # ok 3937 Set Streaming SVE VL 7536
5668 22:24:51.780455 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5669 22:24:51.789676 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5670 22:24:51.790292 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5671 22:24:51.790386 # ok 3941 Set Streaming SVE VL 7552
5672 22:24:51.790462 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5673 22:24:51.790535 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5674 22:24:51.790619 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5675 22:24:51.790695 # ok 3945 Set Streaming SVE VL 7568
5676 22:24:51.790965 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5677 22:24:51.791057 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5678 22:24:51.791132 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5679 22:24:51.791486 # ok 3949 Set Streaming SVE VL 7584
5680 22:24:51.791939 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5681 22:24:51.792391 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5682 22:24:51.792663 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5683 22:24:51.792757 # ok 3953 Set Streaming SVE VL 7600
5684 22:24:51.792868 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5685 22:24:51.792957 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5686 22:24:51.793047 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5687 22:24:51.793134 # ok 3957 Set Streaming SVE VL 7616
5688 22:24:51.793220 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5689 22:24:51.793305 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5690 22:24:51.793390 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5691 22:24:51.793476 # ok 3961 Set Streaming SVE VL 7632
5692 22:24:51.793561 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5693 22:24:51.807341 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5694 22:24:51.807977 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5695 22:24:51.808382 # ok 3965 Set Streaming SVE VL 7648
5696 22:24:51.808690 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5697 22:24:51.808783 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5698 22:24:51.808860 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5699 22:24:51.808935 # ok 3969 Set Streaming SVE VL 7664
5700 22:24:51.809008 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5701 22:24:51.809082 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5702 22:24:51.809153 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5703 22:24:51.809226 # ok 3973 Set Streaming SVE VL 7680
5704 22:24:51.809300 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5705 22:24:51.823091 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5706 22:24:51.823395 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5707 22:24:51.823521 # ok 3977 Set Streaming SVE VL 7696
5708 22:24:51.823639 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5709 22:24:51.823787 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5710 22:24:51.824596 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5711 22:24:51.824708 # ok 3981 Set Streaming SVE VL 7712
5712 22:24:51.824798 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5713 22:24:51.824887 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5714 22:24:51.824973 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5715 22:24:51.825060 # ok 3985 Set Streaming SVE VL 7728
5716 22:24:51.825145 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5717 22:24:51.825230 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5718 22:24:51.825313 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5719 22:24:51.825402 # ok 3989 Set Streaming SVE VL 7744
5720 22:24:51.825489 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5721 22:24:51.830613 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5722 22:24:51.831599 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5723 22:24:51.831710 # ok 3993 Set Streaming SVE VL 7760
5724 22:24:51.831801 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5725 22:24:51.831889 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5726 22:24:51.831974 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5727 22:24:51.832066 # ok 3997 Set Streaming SVE VL 7776
5728 22:24:51.832154 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5729 22:24:51.832245 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5730 22:24:51.832552 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5731 22:24:51.832661 # ok 4001 Set Streaming SVE VL 7792
5732 22:24:51.832752 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5733 22:24:51.832840 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5734 22:24:51.832926 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5735 22:24:51.842627 # ok 4005 Set Streaming SVE VL 7808
5736 22:24:51.843105 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5737 22:24:51.843217 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5738 22:24:51.843308 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5739 22:24:51.843414 # ok 4009 Set Streaming SVE VL 7824
5740 22:24:51.843502 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5741 22:24:51.843586 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5742 22:24:51.843695 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5743 22:24:51.843802 # ok 4013 Set Streaming SVE VL 7840
5744 22:24:51.843892 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5745 22:24:51.843993 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5746 22:24:51.844307 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5747 22:24:51.844436 # ok 4017 Set Streaming SVE VL 7856
5748 22:24:51.852535 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5749 22:24:51.853931 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5750 22:24:51.854316 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5751 22:24:51.854424 # ok 4021 Set Streaming SVE VL 7872
5752 22:24:51.854523 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5753 22:24:51.854817 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5754 22:24:51.854926 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5755 22:24:51.855017 # ok 4025 Set Streaming SVE VL 7888
5756 22:24:51.855103 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5757 22:24:51.855790 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5758 22:24:51.855898 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5759 22:24:51.855988 # ok 4029 Set Streaming SVE VL 7904
5760 22:24:51.856075 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5761 22:24:51.856163 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5762 22:24:51.856465 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5763 22:24:51.856570 # ok 4033 Set Streaming SVE VL 7920
5764 22:24:51.856658 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5765 22:24:51.856745 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5766 22:24:51.856831 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5767 22:24:51.856916 # ok 4037 Set Streaming SVE VL 7936
5768 22:24:51.857001 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5769 22:24:51.857083 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5770 22:24:51.870049 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5771 22:24:51.870301 # ok 4041 Set Streaming SVE VL 7952
5772 22:24:51.870397 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5773 22:24:51.870497 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5774 22:24:51.870583 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5775 22:24:51.870869 # ok 4045 Set Streaming SVE VL 7968
5776 22:24:51.870959 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5777 22:24:51.871028 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5778 22:24:51.871123 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5779 22:24:51.871229 # ok 4049 Set Streaming SVE VL 7984
5780 22:24:51.871315 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5781 22:24:51.871414 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5782 22:24:51.871515 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5783 22:24:51.871653 # ok 4053 Set Streaming SVE VL 8000
5784 22:24:51.871771 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5785 22:24:51.871876 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5786 22:24:51.871977 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5787 22:24:51.872505 # ok 4057 Set Streaming SVE VL 8016
5788 22:24:51.872616 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5789 22:24:51.872686 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5790 22:24:51.887549 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5791 22:24:51.887981 # ok 4061 Set Streaming SVE VL 8032
5792 22:24:51.888080 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5793 22:24:51.888167 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5794 22:24:51.888275 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5795 22:24:51.888363 # ok 4065 Set Streaming SVE VL 8048
5796 22:24:51.888463 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5797 22:24:51.888549 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5798 22:24:51.888801 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5799 22:24:51.888907 # ok 4069 Set Streaming SVE VL 8064
5800 22:24:51.889009 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5801 22:24:51.889110 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5802 22:24:51.889210 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5803 22:24:51.889499 # ok 4073 Set Streaming SVE VL 8080
5804 22:24:51.889588 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5805 22:24:51.919970 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5806 22:24:51.920453 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5807 22:24:51.920560 # ok 4077 Set Streaming SVE VL 8096
5808 22:24:51.920648 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5809 22:24:51.930740 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5810 22:24:51.931208 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5811 22:24:51.931314 # ok 4081 Set Streaming SVE VL 8112
5812 22:24:51.931400 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5813 22:24:51.931497 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5814 22:24:51.931584 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5815 22:24:51.931683 # ok 4085 Set Streaming SVE VL 8128
5816 22:24:51.931785 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5817 22:24:51.931892 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5818 22:24:51.932151 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5819 22:24:51.932257 # ok 4089 Set Streaming SVE VL 8144
5820 22:24:51.932374 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5821 22:24:51.932483 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5822 22:24:51.947372 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5823 22:24:51.947844 # ok 4093 Set Streaming SVE VL 8160
5824 22:24:51.947955 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5825 22:24:51.948045 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5826 22:24:51.948130 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5827 22:24:51.948231 # ok 4097 Set Streaming SVE VL 8176
5828 22:24:51.948324 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5829 22:24:51.948408 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5830 22:24:51.948511 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5831 22:24:51.948601 # ok 4101 Set Streaming SVE VL 8192
5832 22:24:51.948702 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5833 22:24:51.948811 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5834 22:24:51.949140 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5835 22:24:51.949246 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5836 22:24:51.949345 ok 30 selftests: arm64: sve-ptrace
5837 22:24:51.949429 # selftests: arm64: sve-probe-vls
5838 22:24:52.159551 # TAP version 13
5839 22:24:52.159807 # 1..2
5840 22:24:52.159898 # ok 1 Enumerated 16 vector lengths
5841 22:24:52.160216 # ok 2 All vector lengths valid
5842 22:24:52.160324 # # 16
5843 22:24:52.160411 # # 32
5844 22:24:52.160496 # # 48
5845 22:24:52.160583 # # 64
5846 22:24:52.160669 # # 80
5847 22:24:52.160753 # # 96
5848 22:24:52.160837 # # 112
5849 22:24:52.160921 # # 128
5850 22:24:52.161004 # # 144
5851 22:24:52.161088 # # 160
5852 22:24:52.161171 # # 176
5853 22:24:52.161255 # # 192
5854 22:24:52.161338 # # 208
5855 22:24:52.161423 # # 224
5856 22:24:52.161508 # # 240
5857 22:24:52.161592 # # 256
5858 22:24:52.161690 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5859 22:24:52.175115 ok 31 selftests: arm64: sve-probe-vls
5860 22:24:52.323132 # selftests: arm64: vec-syscfg
5861 22:24:53.283487 # TAP version 13
5862 22:24:53.283728 # 1..20
5863 22:24:53.283825 # ok 1 SVE default vector length 64
5864 22:24:53.284158 # ok 2 SVE minimum vector length 16
5865 22:24:53.284363 # ok 3 SVE maximum vector length 256
5866 22:24:53.284533 # ok 4 SVE current VL is 64
5867 22:24:53.284694 # ok 5 SVE set VL 64 and have VL 64
5868 22:24:53.284850 # ok 6 SVE prctl() set min/max
5869 22:24:53.284979 # ok 7 SVE vector length used default
5870 22:24:53.285113 # ok 8 SVE vector length was inherited
5871 22:24:53.285235 # ok 9 SVE vector length set on exec
5872 22:24:53.285383 # ok 10 SVE prctl() set all VLs, 0 errors
5873 22:24:53.285508 # ok 11 SME default vector length 32
5874 22:24:53.285628 # ok 12 SME minimum vector length 16
5875 22:24:53.285775 # ok 13 SME maximum vector length 256
5876 22:24:53.285895 # ok 14 SME current VL is 32
5877 22:24:53.286015 # ok 15 SME set VL 32 and have VL 32
5878 22:24:53.286133 # ok 16 SME prctl() set min/max
5879 22:24:53.286253 # ok 17 SME vector length used default
5880 22:24:53.286372 # ok 18 SME vector length was inherited
5881 22:24:53.286491 # ok 19 SME vector length set on exec
5882 22:24:53.286609 # ok 20 SME prctl() set all VLs, 0 errors
5883 22:24:53.286980 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5884 22:24:53.306484 ok 32 selftests: arm64: vec-syscfg
5885 22:24:53.455238 # selftests: arm64: za-fork
5886 22:24:53.696386 # TAP version 13
5887 22:24:53.696622 # 1..1
5888 22:24:53.696709 # # PID: 1018
5889 22:24:53.696789 # ok 1 fork_test
5890 22:24:53.697068 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5891 22:24:53.723137 ok 33 selftests: arm64: za-fork
5892 22:24:54.011208 # selftests: arm64: za-ptrace
5893 22:24:54.280626 # TAP version 13
5894 22:24:54.280893 # 1..1536
5895 22:24:54.281212 # # Parent is 1036, child is 1037
5896 22:24:54.281330 # ok 1 Set VL 16
5897 22:24:54.281420 # ok 2 Disabled ZA for VL 16
5898 22:24:54.281505 # ok 3 Data match for VL 16
5899 22:24:54.281590 # ok 4 Set VL 32
5900 22:24:54.281690 # ok 5 Disabled ZA for VL 32
5901 22:24:54.281773 # ok 6 Data match for VL 32
5902 22:24:54.281854 # ok 7 Set VL 48
5903 22:24:54.281953 # ok 8 # SKIP Disabled ZA for VL 48
5904 22:24:54.282044 # ok 9 # SKIP Get and set data for VL 48
5905 22:24:54.282151 # ok 10 Set VL 64
5906 22:24:54.282518 # ok 11 Disabled ZA for VL 64
5907 22:24:54.282631 # ok 12 Data match for VL 64
5908 22:24:54.282723 # ok 13 Set VL 80
5909 22:24:54.282806 # ok 14 # SKIP Disabled ZA for VL 80
5910 22:24:54.282896 # ok 15 # SKIP Get and set data for VL 80
5911 22:24:54.282987 # ok 16 Set VL 96
5912 22:24:54.283095 # ok 17 # SKIP Disabled ZA for VL 96
5913 22:24:54.283187 # ok 18 # SKIP Get and set data for VL 96
5914 22:24:54.283280 # ok 19 Set VL 112
5915 22:24:54.283368 # ok 20 # SKIP Disabled ZA for VL 112
5916 22:24:54.283457 # ok 21 # SKIP Get and set data for VL 112
5917 22:24:54.283565 # ok 22 Set VL 128
5918 22:24:54.283657 # ok 23 Disabled ZA for VL 128
5919 22:24:54.283747 # ok 24 Data match for VL 128
5920 22:24:54.283834 # ok 25 Set VL 144
5921 22:24:54.283924 # ok 26 # SKIP Disabled ZA for VL 144
5922 22:24:54.284031 # ok 27 # SKIP Get and set data for VL 144
5923 22:24:54.284123 # ok 28 Set VL 160
5924 22:24:54.284213 # ok 29 # SKIP Disabled ZA for VL 160
5925 22:24:54.284305 # ok 30 # SKIP Get and set data for VL 160
5926 22:24:54.284411 # ok 31 Set VL 176
5927 22:24:54.284502 # ok 32 # SKIP Disabled ZA for VL 176
5928 22:24:54.284591 # ok 33 # SKIP Get and set data for VL 176
5929 22:24:54.284696 # ok 34 Set VL 192
5930 22:24:54.284786 # ok 35 # SKIP Disabled ZA for VL 192
5931 22:24:54.284873 # ok 36 # SKIP Get and set data for VL 192
5932 22:24:54.284984 # ok 37 Set VL 208
5933 22:24:54.285079 # ok 38 # SKIP Disabled ZA for VL 208
5934 22:24:54.285172 # ok 39 # SKIP Get and set data for VL 208
5935 22:24:54.285282 # ok 40 Set VL 224
5936 22:24:54.285377 # ok 41 # SKIP Disabled ZA for VL 224
5937 22:24:54.290385 # ok 42 # SKIP Get and set data for VL 224
5938 22:24:54.290910 # ok 43 Set VL 240
5939 22:24:54.291022 # ok 44 # SKIP Disabled ZA for VL 240
5940 22:24:54.291117 # ok 45 # SKIP Get and set data for VL 240
5941 22:24:54.291207 # ok 46 Set VL 256
5942 22:24:54.291303 # ok 47 Disabled ZA for VL 256
5943 22:24:54.291391 # ok 48 Data match for VL 256
5944 22:24:54.291478 # ok 49 Set VL 272
5945 22:24:54.291566 # ok 50 # SKIP Disabled ZA for VL 272
5946 22:24:54.291914 # ok 51 # SKIP Get and set data for VL 272
5947 22:24:54.292042 # ok 52 Set VL 288
5948 22:24:54.292149 # ok 53 # SKIP Disabled ZA for VL 288
5949 22:24:54.292254 # ok 54 # SKIP Get and set data for VL 288
5950 22:24:54.292345 # ok 55 Set VL 304
5951 22:24:54.292448 # ok 56 # SKIP Disabled ZA for VL 304
5952 22:24:54.292557 # ok 57 # SKIP Get and set data for VL 304
5953 22:24:54.292648 # ok 58 Set VL 320
5954 22:24:54.292741 # ok 59 # SKIP Disabled ZA for VL 320
5955 22:24:54.293012 # ok 60 # SKIP Get and set data for VL 320
5956 22:24:54.293125 # ok 61 Set VL 336
5957 22:24:54.293220 # ok 62 # SKIP Disabled ZA for VL 336
5958 22:24:54.293312 # ok 63 # SKIP Get and set data for VL 336
5959 22:24:54.293400 # ok 64 Set VL 352
5960 22:24:54.293487 # ok 65 # SKIP Disabled ZA for VL 352
5961 22:24:54.293574 # ok 66 # SKIP Get and set data for VL 352
5962 22:24:54.293672 # ok 67 Set VL 368
5963 22:24:54.293766 # ok 68 # SKIP Disabled ZA for VL 368
5964 22:24:54.293872 # ok 69 # SKIP Get and set data for VL 368
5965 22:24:54.293954 # ok 70 Set VL 384
5966 22:24:54.294026 # ok 71 # SKIP Disabled ZA for VL 384
5967 22:24:54.303142 # ok 72 # SKIP Get and set data for VL 384
5968 22:24:54.303625 # ok 73 Set VL 400
5969 22:24:54.303720 # ok 74 # SKIP Disabled ZA for VL 400
5970 22:24:54.303798 # ok 75 # SKIP Get and set data for VL 400
5971 22:24:54.303873 # ok 76 Set VL 416
5972 22:24:54.303959 # ok 77 # SKIP Disabled ZA for VL 416
5973 22:24:54.304035 # ok 78 # SKIP Get and set data for VL 416
5974 22:24:54.304108 # ok 79 Set VL 432
5975 22:24:54.304179 # ok 80 # SKIP Disabled ZA for VL 432
5976 22:24:54.304260 # ok 81 # SKIP Get and set data for VL 432
5977 22:24:54.304367 # ok 82 Set VL 448
5978 22:24:54.304454 # ok 83 # SKIP Disabled ZA for VL 448
5979 22:24:54.304540 # ok 84 # SKIP Get and set data for VL 448
5980 22:24:54.304625 # ok 85 Set VL 464
5981 22:24:54.304725 # ok 86 # SKIP Disabled ZA for VL 464
5982 22:24:54.304812 # ok 87 # SKIP Get and set data for VL 464
5983 22:24:54.304896 # ok 88 Set VL 480
5984 22:24:54.304996 # ok 89 # SKIP Disabled ZA for VL 480
5985 22:24:54.305083 # ok 90 # SKIP Get and set data for VL 480
5986 22:24:54.305169 # ok 91 Set VL 496
5987 22:24:54.305253 # ok 92 # SKIP Disabled ZA for VL 496
5988 22:24:54.305358 # ok 93 # SKIP Get and set data for VL 496
5989 22:24:54.305452 # ok 94 Set VL 512
5990 22:24:54.306081 # ok 95 # SKIP Disabled ZA for VL 512
5991 22:24:54.306406 # ok 96 # SKIP Get and set data for VL 512
5992 22:24:54.306513 # ok 97 Set VL 528
5993 22:24:54.306830 # ok 98 # SKIP Disabled ZA for VL 528
5994 22:24:54.306935 # ok 99 # SKIP Get and set data for VL 528
5995 22:24:54.307024 # ok 100 Set VL 544
5996 22:24:54.307108 # ok 101 # SKIP Disabled ZA for VL 544
5997 22:24:54.307413 # ok 102 # SKIP Get and set data for VL 544
5998 22:24:54.307524 # ok 103 Set VL 560
5999 22:24:54.307639 # ok 104 # SKIP Disabled ZA for VL 560
6000 22:24:54.307748 # ok 105 # SKIP Get and set data for VL 560
6001 22:24:54.307853 # ok 106 Set VL 576
6002 22:24:54.307956 # ok 107 # SKIP Disabled ZA for VL 576
6003 22:24:54.308073 # ok 108 # SKIP Get and set data for VL 576
6004 22:24:54.308165 # ok 109 Set VL 592
6005 22:24:54.308251 # ok 110 # SKIP Disabled ZA for VL 592
6006 22:24:54.308336 # ok 111 # SKIP Get and set data for VL 592
6007 22:24:54.308422 # ok 112 Set VL 608
6008 22:24:54.308508 # ok 113 # SKIP Disabled ZA for VL 608
6009 22:24:54.308624 # ok 114 # SKIP Get and set data for VL 608
6010 22:24:54.308739 # ok 115 Set VL 624
6011 22:24:54.308844 # ok 116 # SKIP Disabled ZA for VL 624
6012 22:24:54.308945 # ok 117 # SKIP Get and set data for VL 624
6013 22:24:54.309034 # ok 118 Set VL 640
6014 22:24:54.309110 # ok 119 # SKIP Disabled ZA for VL 640
6015 22:24:54.309216 # ok 120 # SKIP Get and set data for VL 640
6016 22:24:54.309297 # ok 121 Set VL 656
6017 22:24:54.309361 # ok 122 # SKIP Disabled ZA for VL 656
6018 22:24:54.309457 # ok 123 # SKIP Get and set data for VL 656
6019 22:24:54.309527 # ok 124 Set VL 672
6020 22:24:54.327835 # ok 125 # SKIP Disabled ZA for VL 672
6021 22:24:54.328097 # ok 126 # SKIP Get and set data for VL 672
6022 22:24:54.328205 # ok 127 Set VL 688
6023 22:24:54.328336 # ok 128 # SKIP Disabled ZA for VL 688
6024 22:24:54.328443 # ok 129 # SKIP Get and set data for VL 688
6025 22:24:54.328542 # ok 130 Set VL 704
6026 22:24:54.328644 # ok 131 # SKIP Disabled ZA for VL 704
6027 22:24:54.328743 # ok 132 # SKIP Get and set data for VL 704
6028 22:24:54.328870 # ok 133 Set VL 720
6029 22:24:54.328970 # ok 134 # SKIP Disabled ZA for VL 720
6030 22:24:54.329070 # ok 135 # SKIP Get and set data for VL 720
6031 22:24:54.329174 # ok 136 Set VL 736
6032 22:24:54.329303 # ok 137 # SKIP Disabled ZA for VL 736
6033 22:24:54.329410 # ok 138 # SKIP Get and set data for VL 736
6034 22:24:54.329509 # ok 139 Set VL 752
6035 22:24:54.329604 # ok 140 # SKIP Disabled ZA for VL 752
6036 22:24:54.338126 # ok 141 # SKIP Get and set data for VL 752
6037 22:24:54.338390 # ok 142 Set VL 768
6038 22:24:54.338841 # ok 143 # SKIP Disabled ZA for VL 768
6039 22:24:54.338953 # ok 144 # SKIP Get and set data for VL 768
6040 22:24:54.339049 # ok 145 Set VL 784
6041 22:24:54.339141 # ok 146 # SKIP Disabled ZA for VL 784
6042 22:24:54.339234 # ok 147 # SKIP Get and set data for VL 784
6043 22:24:54.339327 # ok 148 Set VL 800
6044 22:24:54.339422 # ok 149 # SKIP Disabled ZA for VL 800
6045 22:24:54.339829 # ok 150 # SKIP Get and set data for VL 800
6046 22:24:54.339935 # ok 151 Set VL 816
6047 22:24:54.340025 # ok 152 # SKIP Disabled ZA for VL 816
6048 22:24:54.340114 # ok 153 # SKIP Get and set data for VL 816
6049 22:24:54.340201 # ok 154 Set VL 832
6050 22:24:54.340289 # ok 155 # SKIP Disabled ZA for VL 832
6051 22:24:54.340382 # ok 156 # SKIP Get and set data for VL 832
6052 22:24:54.340470 # ok 157 Set VL 848
6053 22:24:54.340560 # ok 158 # SKIP Disabled ZA for VL 848
6054 22:24:54.340646 # ok 159 # SKIP Get and set data for VL 848
6055 22:24:54.340945 # ok 160 Set VL 864
6056 22:24:54.341052 # ok 161 # SKIP Disabled ZA for VL 864
6057 22:24:54.341143 # ok 162 # SKIP Get and set data for VL 864
6058 22:24:54.341229 # ok 163 Set VL 880
6059 22:24:54.341307 # ok 164 # SKIP Disabled ZA for VL 880
6060 22:24:54.341382 # ok 165 # SKIP Get and set data for VL 880
6061 22:24:54.341456 # ok 166 Set VL 896
6062 22:24:54.341529 # ok 167 # SKIP Disabled ZA for VL 896
6063 22:24:54.341602 # ok 168 # SKIP Get and set data for VL 896
6064 22:24:54.341685 # ok 169 Set VL 912
6065 22:24:54.341773 # ok 170 # SKIP Disabled ZA for VL 912
6066 22:24:54.341848 # ok 171 # SKIP Get and set data for VL 912
6067 22:24:54.341929 # ok 172 Set VL 928
6068 22:24:54.347788 # ok 173 # SKIP Disabled ZA for VL 928
6069 22:24:54.348043 # ok 174 # SKIP Get and set data for VL 928
6070 22:24:54.348137 # ok 175 Set VL 944
6071 22:24:54.348225 # ok 176 # SKIP Disabled ZA for VL 944
6072 22:24:54.348312 # ok 177 # SKIP Get and set data for VL 944
6073 22:24:54.348404 # ok 178 Set VL 960
6074 22:24:54.348488 # ok 179 # SKIP Disabled ZA for VL 960
6075 22:24:54.348794 # ok 180 # SKIP Get and set data for VL 960
6076 22:24:54.348898 # ok 181 Set VL 976
6077 22:24:54.348986 # ok 182 # SKIP Disabled ZA for VL 976
6078 22:24:54.349073 # ok 183 # SKIP Get and set data for VL 976
6079 22:24:54.349160 # ok 184 Set VL 992
6080 22:24:54.349245 # ok 185 # SKIP Disabled ZA for VL 992
6081 22:24:54.349332 # ok 186 # SKIP Get and set data for VL 992
6082 22:24:54.349414 # ok 187 Set VL 1008
6083 22:24:54.349488 # ok 188 # SKIP Disabled ZA for VL 1008
6084 22:24:54.349562 # ok 189 # SKIP Get and set data for VL 1008
6085 22:24:54.349635 # ok 190 Set VL 1024
6086 22:24:54.349738 # ok 191 # SKIP Disabled ZA for VL 1024
6087 22:24:54.349815 # ok 192 # SKIP Get and set data for VL 1024
6088 22:24:54.349892 # ok 193 Set VL 1040
6089 22:24:54.349965 # ok 194 # SKIP Disabled ZA for VL 1040
6090 22:24:54.350037 # ok 195 # SKIP Get and set data for VL 1040
6091 22:24:54.350111 # ok 196 Set VL 1056
6092 22:24:54.358337 # ok 197 # SKIP Disabled ZA for VL 1056
6093 22:24:54.358586 # ok 198 # SKIP Get and set data for VL 1056
6094 22:24:54.358669 # ok 199 Set VL 1072
6095 22:24:54.358746 # ok 200 # SKIP Disabled ZA for VL 1072
6096 22:24:54.358828 # ok 201 # SKIP Get and set data for VL 1072
6097 22:24:54.359126 # ok 202 Set VL 1088
6098 22:24:54.359225 # ok 203 # SKIP Disabled ZA for VL 1088
6099 22:24:54.359309 # ok 204 # SKIP Get and set data for VL 1088
6100 22:24:54.359392 # ok 205 Set VL 1104
6101 22:24:54.359479 # ok 206 # SKIP Disabled ZA for VL 1104
6102 22:24:54.359556 # ok 207 # SKIP Get and set data for VL 1104
6103 22:24:54.359638 # ok 208 Set VL 1120
6104 22:24:54.359718 # ok 209 # SKIP Disabled ZA for VL 1120
6105 22:24:54.359814 # ok 210 # SKIP Get and set data for VL 1120
6106 22:24:54.359895 # ok 211 Set VL 1136
6107 22:24:54.359974 # ok 212 # SKIP Disabled ZA for VL 1136
6108 22:24:54.360052 # ok 213 # SKIP Get and set data for VL 1136
6109 22:24:54.360129 # ok 214 Set VL 1152
6110 22:24:54.360205 # ok 215 # SKIP Disabled ZA for VL 1152
6111 22:24:54.360284 # ok 216 # SKIP Get and set data for VL 1152
6112 22:24:54.360364 # ok 217 Set VL 1168
6113 22:24:54.360448 # ok 218 # SKIP Disabled ZA for VL 1168
6114 22:24:54.360556 # ok 219 # SKIP Get and set data for VL 1168
6115 22:24:54.360648 # ok 220 Set VL 1184
6116 22:24:54.360737 # ok 221 # SKIP Disabled ZA for VL 1184
6117 22:24:54.360825 # ok 222 # SKIP Get and set data for VL 1184
6118 22:24:54.360915 # ok 223 Set VL 1200
6119 22:24:54.361001 # ok 224 # SKIP Disabled ZA for VL 1200
6120 22:24:54.361107 # ok 225 # SKIP Get and set data for VL 1200
6121 22:24:54.361196 # ok 226 Set VL 1216
6122 22:24:54.361284 # ok 227 # SKIP Disabled ZA for VL 1216
6123 22:24:54.361362 # ok 228 # SKIP Get and set data for VL 1216
6124 22:24:54.361454 # ok 229 Set VL 1232
6125 22:24:54.370671 # ok 230 # SKIP Disabled ZA for VL 1232
6126 22:24:54.370924 # ok 231 # SKIP Get and set data for VL 1232
6127 22:24:54.371247 # ok 232 Set VL 1248
6128 22:24:54.371382 # ok 233 # SKIP Disabled ZA for VL 1248
6129 22:24:54.371517 # ok 234 # SKIP Get and set data for VL 1248
6130 22:24:54.371634 # ok 235 Set VL 1264
6131 22:24:54.371745 # ok 236 # SKIP Disabled ZA for VL 1264
6132 22:24:54.372087 # ok 237 # SKIP Get and set data for VL 1264
6133 22:24:54.372218 # ok 238 Set VL 1280
6134 22:24:54.372361 # ok 239 # SKIP Disabled ZA for VL 1280
6135 22:24:54.372510 # ok 240 # SKIP Get and set data for VL 1280
6136 22:24:54.372659 # ok 241 Set VL 1296
6137 22:24:54.372804 # ok 242 # SKIP Disabled ZA for VL 1296
6138 22:24:54.372951 # ok 243 # SKIP Get and set data for VL 1296
6139 22:24:54.373126 # ok 244 Set VL 1312
6140 22:24:54.373300 # ok 245 # SKIP Disabled ZA for VL 1312
6141 22:24:54.373501 # ok 246 # SKIP Get and set data for VL 1312
6142 22:24:54.373657 # ok 247 Set VL 1328
6143 22:24:54.373786 # ok 248 # SKIP Disabled ZA for VL 1328
6144 22:24:54.373909 # ok 249 # SKIP Get and set data for VL 1328
6145 22:24:54.374032 # ok 250 Set VL 1344
6146 22:24:54.374153 # ok 251 # SKIP Disabled ZA for VL 1344
6147 22:24:54.374276 # ok 252 # SKIP Get and set data for VL 1344
6148 22:24:54.374400 # ok 253 Set VL 1360
6149 22:24:54.374519 # ok 254 # SKIP Disabled ZA for VL 1360
6150 22:24:54.374642 # ok 255 # SKIP Get and set data for VL 1360
6151 22:24:54.374765 # ok 256 Set VL 1376
6152 22:24:54.374885 # ok 257 # SKIP Disabled ZA for VL 1376
6153 22:24:54.375009 # ok 258 # SKIP Get and set data for VL 1376
6154 22:24:54.379059 # ok 259 Set VL 1392
6155 22:24:54.379277 # ok 260 # SKIP Disabled ZA for VL 1392
6156 22:24:54.379365 # ok 261 # SKIP Get and set data for VL 1392
6157 22:24:54.379465 # ok 262 Set VL 1408
6158 22:24:54.379547 # ok 263 # SKIP Disabled ZA for VL 1408
6159 22:24:54.379628 # ok 264 # SKIP Get and set data for VL 1408
6160 22:24:54.379712 # ok 265 Set VL 1424
6161 22:24:54.379811 # ok 266 # SKIP Disabled ZA for VL 1424
6162 22:24:54.379897 # ok 267 # SKIP Get and set data for VL 1424
6163 22:24:54.379979 # ok 268 Set VL 1440
6164 22:24:54.380063 # ok 269 # SKIP Disabled ZA for VL 1440
6165 22:24:54.380163 # ok 270 # SKIP Get and set data for VL 1440
6166 22:24:54.380251 # ok 271 Set VL 1456
6167 22:24:54.380336 # ok 272 # SKIP Disabled ZA for VL 1456
6168 22:24:54.380437 # ok 273 # SKIP Get and set data for VL 1456
6169 22:24:54.380526 # ok 274 Set VL 1472
6170 22:24:54.380629 # ok 275 # SKIP Disabled ZA for VL 1472
6171 22:24:54.380717 # ok 276 # SKIP Get and set data for VL 1472
6172 22:24:54.380802 # ok 277 Set VL 1488
6173 22:24:54.380905 # ok 278 # SKIP Disabled ZA for VL 1488
6174 22:24:54.380992 # ok 279 # SKIP Get and set data for VL 1488
6175 22:24:54.381077 # ok 280 Set VL 1504
6176 22:24:54.381178 # ok 281 # SKIP Disabled ZA for VL 1504
6177 22:24:54.381266 # ok 282 # SKIP Get and set data for VL 1504
6178 22:24:54.381366 # ok 283 Set VL 1520
6179 22:24:54.434966 # ok 284 # SKIP Disabled ZA for VL 1520
6180 22:24:54.435444 # ok 285 # SKIP Get and set data for VL 1520
6181 22:24:54.435550 # ok 286 Set VL 1536
6182 22:24:54.435649 # ok 287 # SKIP Disabled ZA for VL 1536
6183 22:24:54.435740 # ok 288 # SKIP Get and set data for VL 1536
6184 22:24:54.435830 # ok 289 Set VL 1552
6185 22:24:54.435935 # ok 290 # SKIP Disabled ZA for VL 1552
6186 22:24:54.436023 # ok 291 # SKIP Get and set data for VL 1552
6187 22:24:54.436108 # ok 292 Set VL 1568
6188 22:24:54.436193 # ok 293 # SKIP Disabled ZA for VL 1568
6189 22:24:54.436278 # ok 294 # SKIP Get and set data for VL 1568
6190 22:24:54.436362 # ok 295 Set VL 1584
6191 22:24:54.436446 # ok 296 # SKIP Disabled ZA for VL 1584
6192 22:24:54.436549 # ok 297 # SKIP Get and set data for VL 1584
6193 22:24:54.436637 # ok 298 Set VL 1600
6194 22:24:54.436723 # ok 299 # SKIP Disabled ZA for VL 1600
6195 22:24:54.436805 # ok 300 # SKIP Get and set data for VL 1600
6196 22:24:54.436890 # ok 301 Set VL 1616
6197 22:24:54.436994 # ok 302 # SKIP Disabled ZA for VL 1616
6198 22:24:54.437084 # ok 303 # SKIP Get and set data for VL 1616
6199 22:24:54.437170 # ok 304 Set VL 1632
6200 22:24:54.437257 # ok 305 # SKIP Disabled ZA for VL 1632
6201 22:24:54.437361 # ok 306 # SKIP Get and set data for VL 1632
6202 22:24:54.437451 # ok 307 Set VL 1648
6203 22:24:54.437540 # ok 308 # SKIP Disabled ZA for VL 1648
6204 22:24:54.450814 # ok 309 # SKIP Get and set data for VL 1648
6205 22:24:54.451047 # ok 310 Set VL 1664
6206 22:24:54.451365 # ok 311 # SKIP Disabled ZA for VL 1664
6207 22:24:54.451451 # ok 312 # SKIP Get and set data for VL 1664
6208 22:24:54.451555 # ok 313 Set VL 1680
6209 22:24:54.451658 # ok 314 # SKIP Disabled ZA for VL 1680
6210 22:24:54.451777 # ok 315 # SKIP Get and set data for VL 1680
6211 22:24:54.451870 # ok 316 Set VL 1696
6212 22:24:54.451966 # ok 317 # SKIP Disabled ZA for VL 1696
6213 22:24:54.452066 # ok 318 # SKIP Get and set data for VL 1696
6214 22:24:54.452165 # ok 319 Set VL 1712
6215 22:24:54.452288 # ok 320 # SKIP Disabled ZA for VL 1712
6216 22:24:54.452382 # ok 321 # SKIP Get and set data for VL 1712
6217 22:24:54.452482 # ok 322 Set VL 1728
6218 22:24:54.452584 # ok 323 # SKIP Disabled ZA for VL 1728
6219 22:24:54.452680 # ok 324 # SKIP Get and set data for VL 1728
6220 22:24:54.452802 # ok 325 Set VL 1744
6221 22:24:54.452896 # ok 326 # SKIP Disabled ZA for VL 1744
6222 22:24:54.452997 # ok 327 # SKIP Get and set data for VL 1744
6223 22:24:54.453095 # ok 328 Set VL 1760
6224 22:24:54.453192 # ok 329 # SKIP Disabled ZA for VL 1760
6225 22:24:54.453312 # ok 330 # SKIP Get and set data for VL 1760
6226 22:24:54.453405 # ok 331 Set VL 1776
6227 22:24:54.453503 # ok 332 # SKIP Disabled ZA for VL 1776
6228 22:24:54.453593 # ok 333 # SKIP Get and set data for VL 1776
6229 22:24:54.453685 # ok 334 Set VL 1792
6230 22:24:54.468852 # ok 335 # SKIP Disabled ZA for VL 1792
6231 22:24:54.469104 # ok 336 # SKIP Get and set data for VL 1792
6232 22:24:54.469416 # ok 337 Set VL 1808
6233 22:24:54.469517 # ok 338 # SKIP Disabled ZA for VL 1808
6234 22:24:54.469609 # ok 339 # SKIP Get and set data for VL 1808
6235 22:24:54.469710 # ok 340 Set VL 1824
6236 22:24:54.469798 # ok 341 # SKIP Disabled ZA for VL 1824
6237 22:24:54.471222 # ok 342 # SKIP Get and set data for VL 1824
6238 22:24:54.471388 # ok 343 Set VL 1840
6239 22:24:54.471480 # ok 344 # SKIP Disabled ZA for VL 1840
6240 22:24:54.471794 # ok 345 # SKIP Get and set data for VL 1840
6241 22:24:54.471903 # ok 346 Set VL 1856
6242 22:24:54.471994 # ok 347 # SKIP Disabled ZA for VL 1856
6243 22:24:54.472081 # ok 348 # SKIP Get and set data for VL 1856
6244 22:24:54.472183 # ok 349 Set VL 1872
6245 22:24:54.472482 # ok 350 # SKIP Disabled ZA for VL 1872
6246 22:24:54.472588 # ok 351 # SKIP Get and set data for VL 1872
6247 22:24:54.472679 # ok 352 Set VL 1888
6248 22:24:54.472765 # ok 353 # SKIP Disabled ZA for VL 1888
6249 22:24:54.472850 # ok 354 # SKIP Get and set data for VL 1888
6250 22:24:54.472935 # ok 355 Set VL 1904
6251 22:24:54.473019 # ok 356 # SKIP Disabled ZA for VL 1904
6252 22:24:54.473104 # ok 357 # SKIP Get and set data for VL 1904
6253 22:24:54.473190 # ok 358 Set VL 1920
6254 22:24:54.487301 # ok 359 # SKIP Disabled ZA for VL 1920
6255 22:24:54.487804 # ok 360 # SKIP Get and set data for VL 1920
6256 22:24:54.487914 # ok 361 Set VL 1936
6257 22:24:54.488002 # ok 362 # SKIP Disabled ZA for VL 1936
6258 22:24:54.488089 # ok 363 # SKIP Get and set data for VL 1936
6259 22:24:54.488176 # ok 364 Set VL 1952
6260 22:24:54.488263 # ok 365 # SKIP Disabled ZA for VL 1952
6261 22:24:54.488561 # ok 366 # SKIP Get and set data for VL 1952
6262 22:24:54.488669 # ok 367 Set VL 1968
6263 22:24:54.488758 # ok 368 # SKIP Disabled ZA for VL 1968
6264 22:24:54.488842 # ok 369 # SKIP Get and set data for VL 1968
6265 22:24:54.488926 # ok 370 Set VL 1984
6266 22:24:54.489011 # ok 371 # SKIP Disabled ZA for VL 1984
6267 22:24:54.489096 # ok 372 # SKIP Get and set data for VL 1984
6268 22:24:54.489182 # ok 373 Set VL 2000
6269 22:24:54.489268 # ok 374 # SKIP Disabled ZA for VL 2000
6270 22:24:54.489559 # ok 375 # SKIP Get and set data for VL 2000
6271 22:24:54.489677 # ok 376 Set VL 2016
6272 22:24:54.489762 # ok 377 # SKIP Disabled ZA for VL 2016
6273 22:24:54.489845 # ok 378 # SKIP Get and set data for VL 2016
6274 22:24:54.489928 # ok 379 Set VL 2032
6275 22:24:54.490013 # ok 380 # SKIP Disabled ZA for VL 2032
6276 22:24:54.490091 # ok 381 # SKIP Get and set data for VL 2032
6277 22:24:54.490172 # ok 382 Set VL 2048
6278 22:24:54.491681 # ok 383 # SKIP Disabled ZA for VL 2048
6279 22:24:54.492052 # ok 384 # SKIP Get and set data for VL 2048
6280 22:24:54.492154 # ok 385 Set VL 2064
6281 22:24:54.492257 # ok 386 # SKIP Disabled ZA for VL 2064
6282 22:24:54.492343 # ok 387 # SKIP Get and set data for VL 2064
6283 22:24:54.492427 # ok 388 Set VL 2080
6284 22:24:54.492528 # ok 389 # SKIP Disabled ZA for VL 2080
6285 22:24:54.492614 # ok 390 # SKIP Get and set data for VL 2080
6286 22:24:54.492703 # ok 391 Set VL 2096
6287 22:24:54.492804 # ok 392 # SKIP Disabled ZA for VL 2096
6288 22:24:54.492891 # ok 393 # SKIP Get and set data for VL 2096
6289 22:24:54.492976 # ok 394 Set VL 2112
6290 22:24:54.493076 # ok 395 # SKIP Disabled ZA for VL 2112
6291 22:24:54.493376 # ok 396 # SKIP Get and set data for VL 2112
6292 22:24:54.493486 # ok 397 Set VL 2128
6293 22:24:54.493578 # ok 398 # SKIP Disabled ZA for VL 2128
6294 22:24:54.493678 # ok 399 # SKIP Get and set data for VL 2128
6295 22:24:54.493765 # ok 400 Set VL 2144
6296 22:24:54.500884 # ok 401 # SKIP Disabled ZA for VL 2144
6297 22:24:54.501329 # ok 402 # SKIP Get and set data for VL 2144
6298 22:24:54.501441 # ok 403 Set VL 2160
6299 22:24:54.501527 # ok 404 # SKIP Disabled ZA for VL 2160
6300 22:24:54.501610 # ok 405 # SKIP Get and set data for VL 2160
6301 22:24:54.501705 # ok 406 Set VL 2176
6302 22:24:54.502584 # ok 407 # SKIP Disabled ZA for VL 2176
6303 22:24:54.502914 # ok 408 # SKIP Get and set data for VL 2176
6304 22:24:54.503023 # ok 409 Set VL 2192
6305 22:24:54.503109 # ok 410 # SKIP Disabled ZA for VL 2192
6306 22:24:54.503208 # ok 411 # SKIP Get and set data for VL 2192
6307 22:24:54.503294 # ok 412 Set VL 2208
6308 22:24:54.503393 # ok 413 # SKIP Disabled ZA for VL 2208
6309 22:24:54.503477 # ok 414 # SKIP Get and set data for VL 2208
6310 22:24:54.503577 # ok 415 Set VL 2224
6311 22:24:54.503661 # ok 416 # SKIP Disabled ZA for VL 2224
6312 22:24:54.503757 # ok 417 # SKIP Get and set data for VL 2224
6313 22:24:54.503857 # ok 418 Set VL 2240
6314 22:24:54.504205 # ok 419 # SKIP Disabled ZA for VL 2240
6315 22:24:54.504318 # ok 420 # SKIP Get and set data for VL 2240
6316 22:24:54.504407 # ok 421 Set VL 2256
6317 22:24:54.504509 # ok 422 # SKIP Disabled ZA for VL 2256
6318 22:24:54.504595 # ok 423 # SKIP Get and set data for VL 2256
6319 22:24:54.504683 # ok 424 Set VL 2272
6320 22:24:54.504783 # ok 425 # SKIP Disabled ZA for VL 2272
6321 22:24:54.504867 # ok 426 # SKIP Get and set data for VL 2272
6322 22:24:54.504951 # ok 427 Set VL 2288
6323 22:24:54.505050 # ok 428 # SKIP Disabled ZA for VL 2288
6324 22:24:54.505135 # ok 429 # SKIP Get and set data for VL 2288
6325 22:24:54.505220 # ok 430 Set VL 2304
6326 22:24:54.505316 # ok 431 # SKIP Disabled ZA for VL 2304
6327 22:24:54.505401 # ok 432 # SKIP Get and set data for VL 2304
6328 22:24:54.505484 # ok 433 Set VL 2320
6329 22:24:54.510697 # ok 434 # SKIP Disabled ZA for VL 2320
6330 22:24:54.511236 # ok 435 # SKIP Get and set data for VL 2320
6331 22:24:54.511347 # ok 436 Set VL 2336
6332 22:24:54.511436 # ok 437 # SKIP Disabled ZA for VL 2336
6333 22:24:54.511523 # ok 438 # SKIP Get and set data for VL 2336
6334 22:24:54.511609 # ok 439 Set VL 2352
6335 22:24:54.511977 # ok 440 # SKIP Disabled ZA for VL 2352
6336 22:24:54.512094 # ok 441 # SKIP Get and set data for VL 2352
6337 22:24:54.512182 # ok 442 Set VL 2368
6338 22:24:54.512271 # ok 443 # SKIP Disabled ZA for VL 2368
6339 22:24:54.512357 # ok 444 # SKIP Get and set data for VL 2368
6340 22:24:54.512437 # ok 445 Set VL 2384
6341 22:24:54.512514 # ok 446 # SKIP Disabled ZA for VL 2384
6342 22:24:54.512591 # ok 447 # SKIP Get and set data for VL 2384
6343 22:24:54.512668 # ok 448 Set VL 2400
6344 22:24:54.512749 # ok 449 # SKIP Disabled ZA for VL 2400
6345 22:24:54.513022 # ok 450 # SKIP Get and set data for VL 2400
6346 22:24:54.513126 # ok 451 Set VL 2416
6347 22:24:54.513210 # ok 452 # SKIP Disabled ZA for VL 2416
6348 22:24:54.513294 # ok 453 # SKIP Get and set data for VL 2416
6349 22:24:54.513377 # ok 454 Set VL 2432
6350 22:24:54.513458 # ok 455 # SKIP Disabled ZA for VL 2432
6351 22:24:54.513540 # ok 456 # SKIP Get and set data for VL 2432
6352 22:24:54.513621 # ok 457 Set VL 2448
6353 22:24:54.513719 # ok 458 # SKIP Disabled ZA for VL 2448
6354 22:24:54.513800 # ok 459 # SKIP Get and set data for VL 2448
6355 22:24:54.513875 # ok 460 Set VL 2464
6356 22:24:54.513948 # ok 461 # SKIP Disabled ZA for VL 2464
6357 22:24:54.514038 # ok 462 # SKIP Get and set data for VL 2464
6358 22:24:54.514113 # ok 463 Set VL 2480
6359 22:24:54.514185 # ok 464 # SKIP Disabled ZA for VL 2480
6360 22:24:54.514256 # ok 465 # SKIP Get and set data for VL 2480
6361 22:24:54.514329 # ok 466 Set VL 2496
6362 22:24:54.514401 # ok 467 # SKIP Disabled ZA for VL 2496
6363 22:24:54.514474 # ok 468 # SKIP Get and set data for VL 2496
6364 22:24:54.514547 # ok 469 Set VL 2512
6365 22:24:54.518859 # ok 470 # SKIP Disabled ZA for VL 2512
6366 22:24:54.519105 # ok 471 # SKIP Get and set data for VL 2512
6367 22:24:54.519415 # ok 472 Set VL 2528
6368 22:24:54.519519 # ok 473 # SKIP Disabled ZA for VL 2528
6369 22:24:54.519599 # ok 474 # SKIP Get and set data for VL 2528
6370 22:24:54.519678 # ok 475 Set VL 2544
6371 22:24:54.519758 # ok 476 # SKIP Disabled ZA for VL 2544
6372 22:24:54.519834 # ok 477 # SKIP Get and set data for VL 2544
6373 22:24:54.519929 # ok 478 Set VL 2560
6374 22:24:54.520019 # ok 479 # SKIP Disabled ZA for VL 2560
6375 22:24:54.520106 # ok 480 # SKIP Get and set data for VL 2560
6376 22:24:54.520193 # ok 481 Set VL 2576
6377 22:24:54.520279 # ok 482 # SKIP Disabled ZA for VL 2576
6378 22:24:54.520384 # ok 483 # SKIP Get and set data for VL 2576
6379 22:24:54.520474 # ok 484 Set VL 2592
6380 22:24:54.520560 # ok 485 # SKIP Disabled ZA for VL 2592
6381 22:24:54.520646 # ok 486 # SKIP Get and set data for VL 2592
6382 22:24:54.520737 # ok 487 Set VL 2608
6383 22:24:54.520842 # ok 488 # SKIP Disabled ZA for VL 2608
6384 22:24:54.520931 # ok 489 # SKIP Get and set data for VL 2608
6385 22:24:54.521017 # ok 490 Set VL 2624
6386 22:24:54.521103 # ok 491 # SKIP Disabled ZA for VL 2624
6387 22:24:54.521205 # ok 492 # SKIP Get and set data for VL 2624
6388 22:24:54.521295 # ok 493 Set VL 2640
6389 22:24:54.521381 # ok 494 # SKIP Disabled ZA for VL 2640
6390 22:24:54.521482 # ok 495 # SKIP Get and set data for VL 2640
6391 22:24:54.521570 # ok 496 Set VL 2656
6392 22:24:54.527140 # ok 497 # SKIP Disabled ZA for VL 2656
6393 22:24:54.527383 # ok 498 # SKIP Get and set data for VL 2656
6394 22:24:54.527682 # ok 499 Set VL 2672
6395 22:24:54.527779 # ok 500 # SKIP Disabled ZA for VL 2672
6396 22:24:54.527860 # ok 501 # SKIP Get and set data for VL 2672
6397 22:24:54.527936 # ok 502 Set VL 2688
6398 22:24:54.528010 # ok 503 # SKIP Disabled ZA for VL 2688
6399 22:24:54.528085 # ok 504 # SKIP Get and set data for VL 2688
6400 22:24:54.528159 # ok 505 Set VL 2704
6401 22:24:54.528249 # ok 506 # SKIP Disabled ZA for VL 2704
6402 22:24:54.528326 # ok 507 # SKIP Get and set data for VL 2704
6403 22:24:54.528400 # ok 508 Set VL 2720
6404 22:24:54.528475 # ok 509 # SKIP Disabled ZA for VL 2720
6405 22:24:54.528552 # ok 510 # SKIP Get and set data for VL 2720
6406 22:24:54.528648 # ok 511 Set VL 2736
6407 22:24:54.528732 # ok 512 # SKIP Disabled ZA for VL 2736
6408 22:24:54.528814 # ok 513 # SKIP Get and set data for VL 2736
6409 22:24:54.528898 # ok 514 Set VL 2752
6410 22:24:54.528982 # ok 515 # SKIP Disabled ZA for VL 2752
6411 22:24:54.529067 # ok 516 # SKIP Get and set data for VL 2752
6412 22:24:54.529151 # ok 517 Set VL 2768
6413 22:24:54.529256 # ok 518 # SKIP Disabled ZA for VL 2768
6414 22:24:54.529343 # ok 519 # SKIP Get and set data for VL 2768
6415 22:24:54.529428 # ok 520 Set VL 2784
6416 22:24:54.529529 # ok 521 # SKIP Disabled ZA for VL 2784
6417 22:24:54.529615 # ok 522 # SKIP Get and set data for VL 2784
6418 22:24:54.529716 # ok 523 Set VL 2800
6419 22:24:54.529803 # ok 524 # SKIP Disabled ZA for VL 2800
6420 22:24:54.529887 # ok 525 # SKIP Get and set data for VL 2800
6421 22:24:54.529963 # ok 526 Set VL 2816
6422 22:24:54.530389 # ok 527 # SKIP Disabled ZA for VL 2816
6423 22:24:54.530669 # ok 528 # SKIP Get and set data for VL 2816
6424 22:24:54.530749 # ok 529 Set VL 2832
6425 22:24:54.530822 # ok 530 # SKIP Disabled ZA for VL 2832
6426 22:24:54.530893 # ok 531 # SKIP Get and set data for VL 2832
6427 22:24:54.530966 # ok 532 Set VL 2848
6428 22:24:54.531051 # ok 533 # SKIP Disabled ZA for VL 2848
6429 22:24:54.531124 # ok 534 # SKIP Get and set data for VL 2848
6430 22:24:54.531196 # ok 535 Set VL 2864
6431 22:24:54.531267 # ok 536 # SKIP Disabled ZA for VL 2864
6432 22:24:54.531353 # ok 537 # SKIP Get and set data for VL 2864
6433 22:24:54.531427 # ok 538 Set VL 2880
6434 22:24:54.531498 # ok 539 # SKIP Disabled ZA for VL 2880
6435 22:24:54.531583 # ok 540 # SKIP Get and set data for VL 2880
6436 22:24:54.531657 # ok 541 Set VL 2896
6437 22:24:54.531732 # ok 542 # SKIP Disabled ZA for VL 2896
6438 22:24:54.531818 # ok 543 # SKIP Get and set data for VL 2896
6439 22:24:54.531890 # ok 544 Set VL 2912
6440 22:24:54.531959 # ok 545 # SKIP Disabled ZA for VL 2912
6441 22:24:54.532044 # ok 546 # SKIP Get and set data for VL 2912
6442 22:24:54.532118 # ok 547 Set VL 2928
6443 22:24:54.532202 # ok 548 # SKIP Disabled ZA for VL 2928
6444 22:24:54.532278 # ok 549 # SKIP Get and set data for VL 2928
6445 22:24:54.532366 # ok 550 Set VL 2944
6446 22:24:54.532441 # ok 551 # SKIP Disabled ZA for VL 2944
6447 22:24:54.532525 # ok 552 # SKIP Get and set data for VL 2944
6448 22:24:54.532601 # ok 553 Set VL 2960
6449 22:24:54.532688 # ok 554 # SKIP Disabled ZA for VL 2960
6450 22:24:54.532763 # ok 555 # SKIP Get and set data for VL 2960
6451 22:24:54.532853 # ok 556 Set VL 2976
6452 22:24:54.532943 # ok 557 # SKIP Disabled ZA for VL 2976
6453 22:24:54.533031 # ok 558 # SKIP Get and set data for VL 2976
6454 22:24:54.533106 # ok 559 Set VL 2992
6455 22:24:54.533192 # ok 560 # SKIP Disabled ZA for VL 2992
6456 22:24:54.533280 # ok 561 # SKIP Get and set data for VL 2992
6457 22:24:54.533355 # ok 562 Set VL 3008
6458 22:24:54.542965 # ok 563 # SKIP Disabled ZA for VL 3008
6459 22:24:54.543188 # ok 564 # SKIP Get and set data for VL 3008
6460 22:24:54.543263 # ok 565 Set VL 3024
6461 22:24:54.543331 # ok 566 # SKIP Disabled ZA for VL 3024
6462 22:24:54.543598 # ok 567 # SKIP Get and set data for VL 3024
6463 22:24:54.543671 # ok 568 Set VL 3040
6464 22:24:54.543736 # ok 569 # SKIP Disabled ZA for VL 3040
6465 22:24:54.543807 # ok 570 # SKIP Get and set data for VL 3040
6466 22:24:54.543873 # ok 571 Set VL 3056
6467 22:24:54.543936 # ok 572 # SKIP Disabled ZA for VL 3056
6468 22:24:54.544000 # ok 573 # SKIP Get and set data for VL 3056
6469 22:24:54.544065 # ok 574 Set VL 3072
6470 22:24:54.544144 # ok 575 # SKIP Disabled ZA for VL 3072
6471 22:24:54.544261 # ok 576 # SKIP Get and set data for VL 3072
6472 22:24:54.544346 # ok 577 Set VL 3088
6473 22:24:54.544431 # ok 578 # SKIP Disabled ZA for VL 3088
6474 22:24:54.544514 # ok 579 # SKIP Get and set data for VL 3088
6475 22:24:54.544599 # ok 580 Set VL 3104
6476 22:24:54.544682 # ok 581 # SKIP Disabled ZA for VL 3104
6477 22:24:54.544766 # ok 582 # SKIP Get and set data for VL 3104
6478 22:24:54.544853 # ok 583 Set VL 3120
6479 22:24:54.544955 # ok 584 # SKIP Disabled ZA for VL 3120
6480 22:24:54.545043 # ok 585 # SKIP Get and set data for VL 3120
6481 22:24:54.545126 # ok 586 Set VL 3136
6482 22:24:54.545214 # ok 587 # SKIP Disabled ZA for VL 3136
6483 22:24:54.545303 # ok 588 # SKIP Get and set data for VL 3136
6484 22:24:54.545391 # ok 589 Set VL 3152
6485 22:24:54.549273 # ok 590 # SKIP Disabled ZA for VL 3152
6486 22:24:54.549509 # ok 591 # SKIP Get and set data for VL 3152
6487 22:24:54.549605 # ok 592 Set VL 3168
6488 22:24:54.549708 # ok 593 # SKIP Disabled ZA for VL 3168
6489 22:24:54.556823 # ok 594 # SKIP Get and set data for VL 3168
6490 22:24:54.557066 # ok 595 Set VL 3184
6491 22:24:54.557375 # ok 596 # SKIP Disabled ZA for VL 3184
6492 22:24:54.557502 # ok 597 # SKIP Get and set data for VL 3184
6493 22:24:54.557596 # ok 598 Set VL 3200
6494 22:24:54.557692 # ok 599 # SKIP Disabled ZA for VL 3200
6495 22:24:54.557782 # ok 600 # SKIP Get and set data for VL 3200
6496 22:24:54.557868 # ok 601 Set VL 3216
6497 22:24:54.557942 # ok 602 # SKIP Disabled ZA for VL 3216
6498 22:24:54.559448 # ok 603 # SKIP Get and set data for VL 3216
6499 22:24:54.559966 # ok 604 Set VL 3232
6500 22:24:54.560096 # ok 605 # SKIP Disabled ZA for VL 3232
6501 22:24:54.560275 # ok 606 # SKIP Get and set data for VL 3232
6502 22:24:54.560441 # ok 607 Set VL 3248
6503 22:24:54.560536 # ok 608 # SKIP Disabled ZA for VL 3248
6504 22:24:54.560629 # ok 609 # SKIP Get and set data for VL 3248
6505 22:24:54.560707 # ok 610 Set VL 3264
6506 22:24:54.560785 # ok 611 # SKIP Disabled ZA for VL 3264
6507 22:24:54.560857 # ok 612 # SKIP Get and set data for VL 3264
6508 22:24:54.560931 # ok 613 Set VL 3280
6509 22:24:54.561009 # ok 614 # SKIP Disabled ZA for VL 3280
6510 22:24:54.561101 # ok 615 # SKIP Get and set data for VL 3280
6511 22:24:54.561179 # ok 616 Set VL 3296
6512 22:24:54.561254 # ok 617 # SKIP Disabled ZA for VL 3296
6513 22:24:54.561329 # ok 618 # SKIP Get and set data for VL 3296
6514 22:24:54.561404 # ok 619 Set VL 3312
6515 22:24:54.561479 # ok 620 # SKIP Disabled ZA for VL 3312
6516 22:24:54.561566 # ok 621 # SKIP Get and set data for VL 3312
6517 22:24:54.561641 # ok 622 Set VL 3328
6518 22:24:54.561729 # ok 623 # SKIP Disabled ZA for VL 3328
6519 22:24:54.567019 # ok 624 # SKIP Get and set data for VL 3328
6520 22:24:54.567282 # ok 625 Set VL 3344
6521 22:24:54.567586 # ok 626 # SKIP Disabled ZA for VL 3344
6522 22:24:54.567683 # ok 627 # SKIP Get and set data for VL 3344
6523 22:24:54.567774 # ok 628 Set VL 3360
6524 22:24:54.567861 # ok 629 # SKIP Disabled ZA for VL 3360
6525 22:24:54.567948 # ok 630 # SKIP Get and set data for VL 3360
6526 22:24:54.568035 # ok 631 Set VL 3376
6527 22:24:54.568139 # ok 632 # SKIP Disabled ZA for VL 3376
6528 22:24:54.568229 # ok 633 # SKIP Get and set data for VL 3376
6529 22:24:54.568317 # ok 634 Set VL 3392
6530 22:24:54.568404 # ok 635 # SKIP Disabled ZA for VL 3392
6531 22:24:54.568488 # ok 636 # SKIP Get and set data for VL 3392
6532 22:24:54.568593 # ok 637 Set VL 3408
6533 22:24:54.568682 # ok 638 # SKIP Disabled ZA for VL 3408
6534 22:24:54.568770 # ok 639 # SKIP Get and set data for VL 3408
6535 22:24:54.568859 # ok 640 Set VL 3424
6536 22:24:54.568944 # ok 641 # SKIP Disabled ZA for VL 3424
6537 22:24:54.569046 # ok 642 # SKIP Get and set data for VL 3424
6538 22:24:54.569133 # ok 643 Set VL 3440
6539 22:24:54.569220 # ok 644 # SKIP Disabled ZA for VL 3440
6540 22:24:54.569307 # ok 645 # SKIP Get and set data for VL 3440
6541 22:24:54.569401 # ok 646 Set VL 3456
6542 22:24:54.569478 # ok 647 # SKIP Disabled ZA for VL 3456
6543 22:24:54.574992 # ok 648 # SKIP Get and set data for VL 3456
6544 22:24:54.575233 # ok 649 Set VL 3472
6545 22:24:54.575324 # ok 650 # SKIP Disabled ZA for VL 3472
6546 22:24:54.575412 # ok 651 # SKIP Get and set data for VL 3472
6547 22:24:54.575499 # ok 652 Set VL 3488
6548 22:24:54.575604 # ok 653 # SKIP Disabled ZA for VL 3488
6549 22:24:54.575693 # ok 654 # SKIP Get and set data for VL 3488
6550 22:24:54.575783 # ok 655 Set VL 3504
6551 22:24:54.575870 # ok 656 # SKIP Disabled ZA for VL 3504
6552 22:24:54.575956 # ok 657 # SKIP Get and set data for VL 3504
6553 22:24:54.576041 # ok 658 Set VL 3520
6554 22:24:54.576126 # ok 659 # SKIP Disabled ZA for VL 3520
6555 22:24:54.576230 # ok 660 # SKIP Get and set data for VL 3520
6556 22:24:54.576318 # ok 661 Set VL 3536
6557 22:24:54.576404 # ok 662 # SKIP Disabled ZA for VL 3536
6558 22:24:54.576491 # ok 663 # SKIP Get and set data for VL 3536
6559 22:24:54.576577 # ok 664 Set VL 3552
6560 22:24:54.576677 # ok 665 # SKIP Disabled ZA for VL 3552
6561 22:24:54.576766 # ok 666 # SKIP Get and set data for VL 3552
6562 22:24:54.576857 # ok 667 Set VL 3568
6563 22:24:54.576943 # ok 668 # SKIP Disabled ZA for VL 3568
6564 22:24:54.577044 # ok 669 # SKIP Get and set data for VL 3568
6565 22:24:54.577133 # ok 670 Set VL 3584
6566 22:24:54.577218 # ok 671 # SKIP Disabled ZA for VL 3584
6567 22:24:54.577318 # ok 672 # SKIP Get and set data for VL 3584
6568 22:24:54.577404 # ok 673 Set VL 3600
6569 22:24:54.577481 # ok 674 # SKIP Disabled ZA for VL 3600
6570 22:24:54.582861 # ok 675 # SKIP Get and set data for VL 3600
6571 22:24:54.583337 # ok 676 Set VL 3616
6572 22:24:54.583544 # ok 677 # SKIP Disabled ZA for VL 3616
6573 22:24:54.583720 # ok 678 # SKIP Get and set data for VL 3616
6574 22:24:54.583891 # ok 679 Set VL 3632
6575 22:24:54.584057 # ok 680 # SKIP Disabled ZA for VL 3632
6576 22:24:54.584221 # ok 681 # SKIP Get and set data for VL 3632
6577 22:24:54.584422 # ok 682 Set VL 3648
6578 22:24:54.584594 # ok 683 # SKIP Disabled ZA for VL 3648
6579 22:24:54.584756 # ok 684 # SKIP Get and set data for VL 3648
6580 22:24:54.584922 # ok 685 Set VL 3664
6581 22:24:54.585087 # ok 686 # SKIP Disabled ZA for VL 3664
6582 22:24:54.585253 # ok 687 # SKIP Get and set data for VL 3664
6583 22:24:54.585416 # ok 688 Set VL 3680
6584 22:24:54.585582 # ok 689 # SKIP Disabled ZA for VL 3680
6585 22:24:54.585769 # ok 690 # SKIP Get and set data for VL 3680
6586 22:24:54.585942 # ok 691 Set VL 3696
6587 22:24:54.586101 # ok 692 # SKIP Disabled ZA for VL 3696
6588 22:24:54.586262 # ok 693 # SKIP Get and set data for VL 3696
6589 22:24:54.586426 # ok 694 Set VL 3712
6590 22:24:54.586589 # ok 695 # SKIP Disabled ZA for VL 3712
6591 22:24:54.586800 # ok 696 # SKIP Get and set data for VL 3712
6592 22:24:54.586970 # ok 697 Set VL 3728
6593 22:24:54.587135 # ok 698 # SKIP Disabled ZA for VL 3728
6594 22:24:54.587299 # ok 699 # SKIP Get and set data for VL 3728
6595 22:24:54.587461 # ok 700 Set VL 3744
6596 22:24:54.587622 # ok 701 # SKIP Disabled ZA for VL 3744
6597 22:24:54.587785 # ok 702 # SKIP Get and set data for VL 3744
6598 22:24:54.587948 # ok 703 Set VL 3760
6599 22:24:54.588111 # ok 704 # SKIP Disabled ZA for VL 3760
6600 22:24:54.588274 # ok 705 # SKIP Get and set data for VL 3760
6601 22:24:54.588437 # ok 706 Set VL 3776
6602 22:24:54.588599 # ok 707 # SKIP Disabled ZA for VL 3776
6603 22:24:54.588762 # ok 708 # SKIP Get and set data for VL 3776
6604 22:24:54.595332 # ok 709 Set VL 3792
6605 22:24:54.595554 # ok 710 # SKIP Disabled ZA for VL 3792
6606 22:24:54.595640 # ok 711 # SKIP Get and set data for VL 3792
6607 22:24:54.595745 # ok 712 Set VL 3808
6608 22:24:54.595821 # ok 713 # SKIP Disabled ZA for VL 3808
6609 22:24:54.596087 # ok 714 # SKIP Get and set data for VL 3808
6610 22:24:54.596187 # ok 715 Set VL 3824
6611 22:24:54.596283 # ok 716 # SKIP Disabled ZA for VL 3824
6612 22:24:54.596375 # ok 717 # SKIP Get and set data for VL 3824
6613 22:24:54.596477 # ok 718 Set VL 3840
6614 22:24:54.596560 # ok 719 # SKIP Disabled ZA for VL 3840
6615 22:24:54.596651 # ok 720 # SKIP Get and set data for VL 3840
6616 22:24:54.596720 # ok 721 Set VL 3856
6617 22:24:54.596785 # ok 722 # SKIP Disabled ZA for VL 3856
6618 22:24:54.596856 # ok 723 # SKIP Get and set data for VL 3856
6619 22:24:54.596920 # ok 724 Set VL 3872
6620 22:24:54.596994 # ok 725 # SKIP Disabled ZA for VL 3872
6621 22:24:54.597062 # ok 726 # SKIP Get and set data for VL 3872
6622 22:24:54.597170 # ok 727 Set VL 3888
6623 22:24:54.597264 # ok 728 # SKIP Disabled ZA for VL 3888
6624 22:24:54.597360 # ok 729 # SKIP Get and set data for VL 3888
6625 22:24:54.597425 # ok 730 Set VL 3904
6626 22:24:54.597485 # ok 731 # SKIP Disabled ZA for VL 3904
6627 22:24:54.597561 # ok 732 # SKIP Get and set data for VL 3904
6628 22:24:54.597669 # ok 733 Set VL 3920
6629 22:24:54.597761 # ok 734 # SKIP Disabled ZA for VL 3920
6630 22:24:54.597844 # ok 735 # SKIP Get and set data for VL 3920
6631 22:24:54.597933 # ok 736 Set VL 3936
6632 22:24:54.598015 # ok 737 # SKIP Disabled ZA for VL 3936
6633 22:24:54.598078 # ok 738 # SKIP Get and set data for VL 3936
6634 22:24:54.602677 # ok 739 Set VL 3952
6635 22:24:54.604676 # ok 740 # SKIP Disabled ZA for VL 3952
6636 22:24:54.604812 # ok 741 # SKIP Get and set data for VL 3952
6637 22:24:54.604910 # ok 742 Set VL 3968
6638 22:24:54.604998 # ok 743 # SKIP Disabled ZA for VL 3968
6639 22:24:54.605085 # ok 744 # SKIP Get and set data for VL 3968
6640 22:24:54.605170 # ok 745 Set VL 3984
6641 22:24:54.605255 # ok 746 # SKIP Disabled ZA for VL 3984
6642 22:24:54.605340 # ok 747 # SKIP Get and set data for VL 3984
6643 22:24:54.605425 # ok 748 Set VL 4000
6644 22:24:54.605515 # ok 749 # SKIP Disabled ZA for VL 4000
6645 22:24:54.605599 # ok 750 # SKIP Get and set data for VL 4000
6646 22:24:54.605697 # ok 751 Set VL 4016
6647 22:24:54.605782 # ok 752 # SKIP Disabled ZA for VL 4016
6648 22:24:54.605867 # ok 753 # SKIP Get and set data for VL 4016
6649 22:24:54.605944 # ok 754 Set VL 4032
6650 22:24:54.606014 # ok 755 # SKIP Disabled ZA for VL 4032
6651 22:24:54.606084 # ok 756 # SKIP Get and set data for VL 4032
6652 22:24:54.606154 # ok 757 Set VL 4048
6653 22:24:54.606224 # ok 758 # SKIP Disabled ZA for VL 4048
6654 22:24:54.606293 # ok 759 # SKIP Get and set data for VL 4048
6655 22:24:54.606362 # ok 760 Set VL 4064
6656 22:24:54.606432 # ok 761 # SKIP Disabled ZA for VL 4064
6657 22:24:54.606709 # ok 762 # SKIP Get and set data for VL 4064
6658 22:24:54.606787 # ok 763 Set VL 4080
6659 22:24:54.606858 # ok 764 # SKIP Disabled ZA for VL 4080
6660 22:24:54.606929 # ok 765 # SKIP Get and set data for VL 4080
6661 22:24:54.606998 # ok 766 Set VL 4096
6662 22:24:54.607067 # ok 767 # SKIP Disabled ZA for VL 4096
6663 22:24:54.607137 # ok 768 # SKIP Get and set data for VL 4096
6664 22:24:54.608299 # ok 769 Set VL 4112
6665 22:24:54.608678 # ok 770 # SKIP Disabled ZA for VL 4112
6666 22:24:54.608795 # ok 771 # SKIP Get and set data for VL 4112
6667 22:24:54.608874 # ok 772 Set VL 4128
6668 22:24:54.608946 # ok 773 # SKIP Disabled ZA for VL 4128
6669 22:24:54.609034 # ok 774 # SKIP Get and set data for VL 4128
6670 22:24:54.609113 # ok 775 Set VL 4144
6671 22:24:54.609185 # ok 776 # SKIP Disabled ZA for VL 4144
6672 22:24:54.609269 # ok 777 # SKIP Get and set data for VL 4144
6673 22:24:54.609345 # ok 778 Set VL 4160
6674 22:24:54.609434 # ok 779 # SKIP Disabled ZA for VL 4160
6675 22:24:54.619455 # ok 780 # SKIP Get and set data for VL 4160
6676 22:24:54.619693 # ok 781 Set VL 4176
6677 22:24:54.619965 # ok 782 # SKIP Disabled ZA for VL 4176
6678 22:24:54.620071 # ok 783 # SKIP Get and set data for VL 4176
6679 22:24:54.620159 # ok 784 Set VL 4192
6680 22:24:54.620244 # ok 785 # SKIP Disabled ZA for VL 4192
6681 22:24:54.620346 # ok 786 # SKIP Get and set data for VL 4192
6682 22:24:54.620434 # ok 787 Set VL 4208
6683 22:24:54.620520 # ok 788 # SKIP Disabled ZA for VL 4208
6684 22:24:54.620605 # ok 789 # SKIP Get and set data for VL 4208
6685 22:24:54.620705 # ok 790 Set VL 4224
6686 22:24:54.620792 # ok 791 # SKIP Disabled ZA for VL 4224
6687 22:24:54.620877 # ok 792 # SKIP Get and set data for VL 4224
6688 22:24:54.620985 # ok 793 Set VL 4240
6689 22:24:54.621073 # ok 794 # SKIP Disabled ZA for VL 4240
6690 22:24:54.621173 # ok 795 # SKIP Get and set data for VL 4240
6691 22:24:54.621261 # ok 796 Set VL 4256
6692 22:24:54.621362 # ok 797 # SKIP Disabled ZA for VL 4256
6693 22:24:54.621450 # ok 798 # SKIP Get and set data for VL 4256
6694 22:24:54.627320 # ok 799 Set VL 4272
6695 22:24:54.627805 # ok 800 # SKIP Disabled ZA for VL 4272
6696 22:24:54.627967 # ok 801 # SKIP Get and set data for VL 4272
6697 22:24:54.628083 # ok 802 Set VL 4288
6698 22:24:54.628172 # ok 803 # SKIP Disabled ZA for VL 4288
6699 22:24:54.628259 # ok 804 # SKIP Get and set data for VL 4288
6700 22:24:54.628364 # ok 805 Set VL 4304
6701 22:24:54.628454 # ok 806 # SKIP Disabled ZA for VL 4304
6702 22:24:54.628540 # ok 807 # SKIP Get and set data for VL 4304
6703 22:24:54.628627 # ok 808 Set VL 4320
6704 22:24:54.628712 # ok 809 # SKIP Disabled ZA for VL 4320
6705 22:24:54.628817 # ok 810 # SKIP Get and set data for VL 4320
6706 22:24:54.628904 # ok 811 Set VL 4336
6707 22:24:54.628989 # ok 812 # SKIP Disabled ZA for VL 4336
6708 22:24:54.629073 # ok 813 # SKIP Get and set data for VL 4336
6709 22:24:54.629158 # ok 814 Set VL 4352
6710 22:24:54.629258 # ok 815 # SKIP Disabled ZA for VL 4352
6711 22:24:54.629345 # ok 816 # SKIP Get and set data for VL 4352
6712 22:24:54.629430 # ok 817 Set VL 4368
6713 22:24:54.629515 # ok 818 # SKIP Disabled ZA for VL 4368
6714 22:24:54.638373 # ok 819 # SKIP Get and set data for VL 4368
6715 22:24:54.638693 # ok 820 Set VL 4384
6716 22:24:54.639027 # ok 821 # SKIP Disabled ZA for VL 4384
6717 22:24:54.639678 # ok 822 # SKIP Get and set data for VL 4384
6718 22:24:54.639828 # ok 823 Set VL 4400
6719 22:24:54.640125 # ok 824 # SKIP Disabled ZA for VL 4400
6720 22:24:54.640284 # ok 825 # SKIP Get and set data for VL 4400
6721 22:24:54.640425 # ok 826 Set VL 4416
6722 22:24:54.640580 # ok 827 # SKIP Disabled ZA for VL 4416
6723 22:24:54.640727 # ok 828 # SKIP Get and set data for VL 4416
6724 22:24:54.640866 # ok 829 Set VL 4432
6725 22:24:54.640991 # ok 830 # SKIP Disabled ZA for VL 4432
6726 22:24:54.641206 # ok 831 # SKIP Get and set data for VL 4432
6727 22:24:54.641349 # ok 832 Set VL 4448
6728 22:24:54.641478 # ok 833 # SKIP Disabled ZA for VL 4448
6729 22:24:54.641571 # ok 834 # SKIP Get and set data for VL 4448
6730 22:24:54.641681 # ok 835 Set VL 4464
6731 22:24:54.641786 # ok 836 # SKIP Disabled ZA for VL 4464
6732 22:24:54.641874 # ok 837 # SKIP Get and set data for VL 4464
6733 22:24:54.645506 # ok 838 Set VL 4480
6734 22:24:54.645766 # ok 839 # SKIP Disabled ZA for VL 4480
6735 22:24:54.647117 # ok 840 # SKIP Get and set data for VL 4480
6736 22:24:54.647460 # ok 841 Set VL 4496
6737 22:24:54.647591 # ok 842 # SKIP Disabled ZA for VL 4496
6738 22:24:54.647704 # ok 843 # SKIP Get and set data for VL 4496
6739 22:24:54.647829 # ok 844 Set VL 4512
6740 22:24:54.647942 # ok 845 # SKIP Disabled ZA for VL 4512
6741 22:24:54.648275 # ok 846 # SKIP Get and set data for VL 4512
6742 22:24:54.648382 # ok 847 Set VL 4528
6743 22:24:54.648482 # ok 848 # SKIP Disabled ZA for VL 4528
6744 22:24:54.648587 # ok 849 # SKIP Get and set data for VL 4528
6745 22:24:54.648694 # ok 850 Set VL 4544
6746 22:24:54.648795 # ok 851 # SKIP Disabled ZA for VL 4544
6747 22:24:54.648899 # ok 852 # SKIP Get and set data for VL 4544
6748 22:24:54.649010 # ok 853 Set VL 4560
6749 22:24:54.649136 # ok 854 # SKIP Disabled ZA for VL 4560
6750 22:24:54.649251 # ok 855 # SKIP Get and set data for VL 4560
6751 22:24:54.649358 # ok 856 Set VL 4576
6752 22:24:54.649460 # ok 857 # SKIP Disabled ZA for VL 4576
6753 22:24:54.649535 # ok 858 # SKIP Get and set data for VL 4576
6754 22:24:54.649598 # ok 859 Set VL 4592
6755 22:24:54.649667 # ok 860 # SKIP Disabled ZA for VL 4592
6756 22:24:54.649728 # ok 861 # SKIP Get and set data for VL 4592
6757 22:24:54.649802 # ok 862 Set VL 4608
6758 22:24:54.649865 # ok 863 # SKIP Disabled ZA for VL 4608
6759 22:24:54.649925 # ok 864 # SKIP Get and set data for VL 4608
6760 22:24:54.649985 # ok 865 Set VL 4624
6761 22:24:54.658176 # ok 866 # SKIP Disabled ZA for VL 4624
6762 22:24:54.658679 # ok 867 # SKIP Get and set data for VL 4624
6763 22:24:54.658816 # ok 868 Set VL 4640
6764 22:24:54.658922 # ok 869 # SKIP Disabled ZA for VL 4640
6765 22:24:54.659018 # ok 870 # SKIP Get and set data for VL 4640
6766 22:24:54.659107 # ok 871 Set VL 4656
6767 22:24:54.659214 # ok 872 # SKIP Disabled ZA for VL 4656
6768 22:24:54.659324 # ok 873 # SKIP Get and set data for VL 4656
6769 22:24:54.659430 # ok 874 Set VL 4672
6770 22:24:54.659538 # ok 875 # SKIP Disabled ZA for VL 4672
6771 22:24:54.659641 # ok 876 # SKIP Get and set data for VL 4672
6772 22:24:54.659757 # ok 877 Set VL 4688
6773 22:24:54.659867 # ok 878 # SKIP Disabled ZA for VL 4688
6774 22:24:54.660001 # ok 879 # SKIP Get and set data for VL 4688
6775 22:24:54.660112 # ok 880 Set VL 4704
6776 22:24:54.660219 # ok 881 # SKIP Disabled ZA for VL 4704
6777 22:24:54.660333 # ok 882 # SKIP Get and set data for VL 4704
6778 22:24:54.660438 # ok 883 Set VL 4720
6779 22:24:54.660551 # ok 884 # SKIP Disabled ZA for VL 4720
6780 22:24:54.660662 # ok 885 # SKIP Get and set data for VL 4720
6781 22:24:54.660775 # ok 886 Set VL 4736
6782 22:24:54.660907 # ok 887 # SKIP Disabled ZA for VL 4736
6783 22:24:54.661013 # ok 888 # SKIP Get and set data for VL 4736
6784 22:24:54.661103 # ok 889 Set VL 4752
6785 22:24:54.661192 # ok 890 # SKIP Disabled ZA for VL 4752
6786 22:24:54.661279 # ok 891 # SKIP Get and set data for VL 4752
6787 22:24:54.661382 # ok 892 Set VL 4768
6788 22:24:54.661450 # ok 893 # SKIP Disabled ZA for VL 4768
6789 22:24:54.661511 # ok 894 # SKIP Get and set data for VL 4768
6790 22:24:54.661571 # ok 895 Set VL 4784
6791 22:24:54.661630 # ok 896 # SKIP Disabled ZA for VL 4784
6792 22:24:54.661759 # ok 897 # SKIP Get and set data for VL 4784
6793 22:24:54.661862 # ok 898 Set VL 4800
6794 22:24:54.661959 # ok 899 # SKIP Disabled ZA for VL 4800
6795 22:24:54.662057 # ok 900 # SKIP Get and set data for VL 4800
6796 22:24:54.662152 # ok 901 Set VL 4816
6797 22:24:54.670425 # ok 902 # SKIP Disabled ZA for VL 4816
6798 22:24:54.670976 # ok 903 # SKIP Get and set data for VL 4816
6799 22:24:54.671140 # ok 904 Set VL 4832
6800 22:24:54.671340 # ok 905 # SKIP Disabled ZA for VL 4832
6801 22:24:54.671543 # ok 906 # SKIP Get and set data for VL 4832
6802 22:24:54.671731 # ok 907 Set VL 4848
6803 22:24:54.671915 # ok 908 # SKIP Disabled ZA for VL 4848
6804 22:24:54.672134 # ok 909 # SKIP Get and set data for VL 4848
6805 22:24:54.672329 # ok 910 Set VL 4864
6806 22:24:54.672436 # ok 911 # SKIP Disabled ZA for VL 4864
6807 22:24:54.672544 # ok 912 # SKIP Get and set data for VL 4864
6808 22:24:54.672641 # ok 913 Set VL 4880
6809 22:24:54.672746 # ok 914 # SKIP Disabled ZA for VL 4880
6810 22:24:54.672855 # ok 915 # SKIP Get and set data for VL 4880
6811 22:24:54.672976 # ok 916 Set VL 4896
6812 22:24:54.673090 # ok 917 # SKIP Disabled ZA for VL 4896
6813 22:24:54.673201 # ok 918 # SKIP Get and set data for VL 4896
6814 22:24:54.673306 # ok 919 Set VL 4912
6815 22:24:54.673417 # ok 920 # SKIP Disabled ZA for VL 4912
6816 22:24:54.673511 # ok 921 # SKIP Get and set data for VL 4912
6817 22:24:54.673593 # ok 922 Set VL 4928
6818 22:24:54.673688 # ok 923 # SKIP Disabled ZA for VL 4928
6819 22:24:54.673795 # ok 924 # SKIP Get and set data for VL 4928
6820 22:24:54.673890 # ok 925 Set VL 4944
6821 22:24:54.673979 # ok 926 # SKIP Disabled ZA for VL 4944
6822 22:24:54.674058 # ok 927 # SKIP Get and set data for VL 4944
6823 22:24:54.674141 # ok 928 Set VL 4960
6824 22:24:54.674219 # ok 929 # SKIP Disabled ZA for VL 4960
6825 22:24:54.674283 # ok 930 # SKIP Get and set data for VL 4960
6826 22:24:54.674344 # ok 931 Set VL 4976
6827 22:24:54.674404 # ok 932 # SKIP Disabled ZA for VL 4976
6828 22:24:54.674464 # ok 933 # SKIP Get and set data for VL 4976
6829 22:24:54.674525 # ok 934 Set VL 4992
6830 22:24:54.674584 # ok 935 # SKIP Disabled ZA for VL 4992
6831 22:24:54.686591 # ok 936 # SKIP Get and set data for VL 4992
6832 22:24:54.687193 # ok 937 Set VL 5008
6833 22:24:54.687307 # ok 938 # SKIP Disabled ZA for VL 5008
6834 22:24:54.687402 # ok 939 # SKIP Get and set data for VL 5008
6835 22:24:54.687492 # ok 940 Set VL 5024
6836 22:24:54.687583 # ok 941 # SKIP Disabled ZA for VL 5024
6837 22:24:54.687671 # ok 942 # SKIP Get and set data for VL 5024
6838 22:24:54.687758 # ok 943 Set VL 5040
6839 22:24:54.687860 # ok 944 # SKIP Disabled ZA for VL 5040
6840 22:24:54.688560 # ok 945 # SKIP Get and set data for VL 5040
6841 22:24:54.688695 # ok 946 Set VL 5056
6842 22:24:54.688784 # ok 947 # SKIP Disabled ZA for VL 5056
6843 22:24:54.688872 # ok 948 # SKIP Get and set data for VL 5056
6844 22:24:54.688958 # ok 949 Set VL 5072
6845 22:24:54.689051 # ok 950 # SKIP Disabled ZA for VL 5072
6846 22:24:54.689269 # ok 951 # SKIP Get and set data for VL 5072
6847 22:24:54.689369 # ok 952 Set VL 5088
6848 22:24:54.689449 # ok 953 # SKIP Disabled ZA for VL 5088
6849 22:24:54.689523 # ok 954 # SKIP Get and set data for VL 5088
6850 22:24:54.689596 # ok 955 Set VL 5104
6851 22:24:54.689677 # ok 956 # SKIP Disabled ZA for VL 5104
6852 22:24:54.689749 # ok 957 # SKIP Get and set data for VL 5104
6853 22:24:54.689821 # ok 958 Set VL 5120
6854 22:24:54.690095 # ok 959 # SKIP Disabled ZA for VL 5120
6855 22:24:54.690189 # ok 960 # SKIP Get and set data for VL 5120
6856 22:24:54.690266 # ok 961 Set VL 5136
6857 22:24:54.690339 # ok 962 # SKIP Disabled ZA for VL 5136
6858 22:24:54.690412 # ok 963 # SKIP Get and set data for VL 5136
6859 22:24:54.690486 # ok 964 Set VL 5152
6860 22:24:54.690558 # ok 965 # SKIP Disabled ZA for VL 5152
6861 22:24:54.690633 # ok 966 # SKIP Get and set data for VL 5152
6862 22:24:54.706989 # ok 967 Set VL 5168
6863 22:24:54.707466 # ok 968 # SKIP Disabled ZA for VL 5168
6864 22:24:54.707694 # ok 969 # SKIP Get and set data for VL 5168
6865 22:24:54.707894 # ok 970 Set VL 5184
6866 22:24:54.708072 # ok 971 # SKIP Disabled ZA for VL 5184
6867 22:24:54.708241 # ok 972 # SKIP Get and set data for VL 5184
6868 22:24:54.708417 # ok 973 Set VL 5200
6869 22:24:54.708625 # ok 974 # SKIP Disabled ZA for VL 5200
6870 22:24:54.708835 # ok 975 # SKIP Get and set data for VL 5200
6871 22:24:54.709045 # ok 976 Set VL 5216
6872 22:24:54.709272 # ok 977 # SKIP Disabled ZA for VL 5216
6873 22:24:54.709452 # ok 978 # SKIP Get and set data for VL 5216
6874 22:24:54.709580 # ok 979 Set VL 5232
6875 22:24:54.709755 # ok 980 # SKIP Disabled ZA for VL 5232
6876 22:24:54.709954 # ok 981 # SKIP Get and set data for VL 5232
6877 22:24:54.710145 # ok 982 Set VL 5248
6878 22:24:54.710291 # ok 983 # SKIP Disabled ZA for VL 5248
6879 22:24:54.710474 # ok 984 # SKIP Get and set data for VL 5248
6880 22:24:54.710611 # ok 985 Set VL 5264
6881 22:24:54.710753 # ok 986 # SKIP Disabled ZA for VL 5264
6882 22:24:54.710895 # ok 987 # SKIP Get and set data for VL 5264
6883 22:24:54.711038 # ok 988 Set VL 5280
6884 22:24:54.711179 # ok 989 # SKIP Disabled ZA for VL 5280
6885 22:24:54.711320 # ok 990 # SKIP Get and set data for VL 5280
6886 22:24:54.711462 # ok 991 Set VL 5296
6887 22:24:54.723044 # ok 992 # SKIP Disabled ZA for VL 5296
6888 22:24:54.723652 # ok 993 # SKIP Get and set data for VL 5296
6889 22:24:54.723751 # ok 994 Set VL 5312
6890 22:24:54.723829 # ok 995 # SKIP Disabled ZA for VL 5312
6891 22:24:54.723904 # ok 996 # SKIP Get and set data for VL 5312
6892 22:24:54.723977 # ok 997 Set VL 5328
6893 22:24:54.724051 # ok 998 # SKIP Disabled ZA for VL 5328
6894 22:24:54.724147 # ok 999 # SKIP Get and set data for VL 5328
6895 22:24:54.724224 # ok 1000 Set VL 5344
6896 22:24:54.724297 # ok 1001 # SKIP Disabled ZA for VL 5344
6897 22:24:54.724370 # ok 1002 # SKIP Get and set data for VL 5344
6898 22:24:54.724443 # ok 1003 Set VL 5360
6899 22:24:54.724530 # ok 1004 # SKIP Disabled ZA for VL 5360
6900 22:24:54.724606 # ok 1005 # SKIP Get and set data for VL 5360
6901 22:24:54.724682 # ok 1006 Set VL 5376
6902 22:24:54.724762 # ok 1007 # SKIP Disabled ZA for VL 5376
6903 22:24:54.724855 # ok 1008 # SKIP Get and set data for VL 5376
6904 22:24:54.724943 # ok 1009 Set VL 5392
6905 22:24:54.725027 # ok 1010 # SKIP Disabled ZA for VL 5392
6906 22:24:54.725132 # ok 1011 # SKIP Get and set data for VL 5392
6907 22:24:54.725222 # ok 1012 Set VL 5408
6908 22:24:54.725329 # ok 1013 # SKIP Disabled ZA for VL 5408
6909 22:24:54.725417 # ok 1014 # SKIP Get and set data for VL 5408
6910 22:24:54.725517 # ok 1015 Set VL 5424
6911 22:24:54.726037 # ok 1016 # SKIP Disabled ZA for VL 5424
6912 22:24:54.726136 # ok 1017 # SKIP Get and set data for VL 5424
6913 22:24:54.726214 # ok 1018 Set VL 5440
6914 22:24:54.726287 # ok 1019 # SKIP Disabled ZA for VL 5440
6915 22:24:54.726360 # ok 1020 # SKIP Get and set data for VL 5440
6916 22:24:54.726432 # ok 1021 Set VL 5456
6917 22:24:54.726503 # ok 1022 # SKIP Disabled ZA for VL 5456
6918 22:24:54.726574 # ok 1023 # SKIP Get and set data for VL 5456
6919 22:24:54.742843 # ok 1024 Set VL 5472
6920 22:24:54.743347 # ok 1025 # SKIP Disabled ZA for VL 5472
6921 22:24:54.743442 # ok 1026 # SKIP Get and set data for VL 5472
6922 22:24:54.743516 # ok 1027 Set VL 5488
6923 22:24:54.743587 # ok 1028 # SKIP Disabled ZA for VL 5488
6924 22:24:54.743657 # ok 1029 # SKIP Get and set data for VL 5488
6925 22:24:54.743728 # ok 1030 Set VL 5504
6926 22:24:54.743813 # ok 1031 # SKIP Disabled ZA for VL 5504
6927 22:24:54.743887 # ok 1032 # SKIP Get and set data for VL 5504
6928 22:24:54.743957 # ok 1033 Set VL 5520
6929 22:24:54.744026 # ok 1034 # SKIP Disabled ZA for VL 5520
6930 22:24:54.744113 # ok 1035 # SKIP Get and set data for VL 5520
6931 22:24:54.744187 # ok 1036 Set VL 5536
6932 22:24:54.744256 # ok 1037 # SKIP Disabled ZA for VL 5536
6933 22:24:54.744341 # ok 1038 # SKIP Get and set data for VL 5536
6934 22:24:54.744416 # ok 1039 Set VL 5552
6935 22:24:54.744499 # ok 1040 # SKIP Disabled ZA for VL 5552
6936 22:24:54.744827 # ok 1041 # SKIP Get and set data for VL 5552
6937 22:24:54.744925 # ok 1042 Set VL 5568
6938 22:24:54.745003 # ok 1043 # SKIP Disabled ZA for VL 5568
6939 22:24:54.745078 # ok 1044 # SKIP Get and set data for VL 5568
6940 22:24:54.745165 # ok 1045 Set VL 5584
6941 22:24:54.745243 # ok 1046 # SKIP Disabled ZA for VL 5584
6942 22:24:54.745485 # ok 1047 # SKIP Get and set data for VL 5584
6943 22:24:54.745574 # ok 1048 Set VL 5600
6944 22:24:54.745663 # ok 1049 # SKIP Disabled ZA for VL 5600
6945 22:24:54.745739 # ok 1050 # SKIP Get and set data for VL 5600
6946 22:24:54.758748 # ok 1051 Set VL 5616
6947 22:24:54.758990 # ok 1052 # SKIP Disabled ZA for VL 5616
6948 22:24:54.760450 # ok 1053 # SKIP Get and set data for VL 5616
6949 22:24:54.760585 # ok 1054 Set VL 5632
6950 22:24:54.760678 # ok 1055 # SKIP Disabled ZA for VL 5632
6951 22:24:54.760782 # ok 1056 # SKIP Get and set data for VL 5632
6952 22:24:54.761081 # ok 1057 Set VL 5648
6953 22:24:54.761193 # ok 1058 # SKIP Disabled ZA for VL 5648
6954 22:24:54.761350 # ok 1059 # SKIP Get and set data for VL 5648
6955 22:24:54.761442 # ok 1060 Set VL 5664
6956 22:24:54.761516 # ok 1061 # SKIP Disabled ZA for VL 5664
6957 22:24:54.761602 # ok 1062 # SKIP Get and set data for VL 5664
6958 22:24:54.766765 # ok 1063 Set VL 5680
6959 22:24:54.767275 # ok 1064 # SKIP Disabled ZA for VL 5680
6960 22:24:54.767492 # ok 1065 # SKIP Get and set data for VL 5680
6961 22:24:54.767682 # ok 1066 Set VL 5696
6962 22:24:54.767861 # ok 1067 # SKIP Disabled ZA for VL 5696
6963 22:24:54.768049 # ok 1068 # SKIP Get and set data for VL 5696
6964 22:24:54.768307 # ok 1069 Set VL 5712
6965 22:24:54.768526 # ok 1070 # SKIP Disabled ZA for VL 5712
6966 22:24:54.768749 # ok 1071 # SKIP Get and set data for VL 5712
6967 22:24:54.768952 # ok 1072 Set VL 5728
6968 22:24:54.769150 # ok 1073 # SKIP Disabled ZA for VL 5728
6969 22:24:54.769358 # ok 1074 # SKIP Get and set data for VL 5728
6970 22:24:54.769555 # ok 1075 Set VL 5744
6971 22:24:54.769720 # ok 1076 # SKIP Disabled ZA for VL 5744
6972 22:24:54.769849 # ok 1077 # SKIP Get and set data for VL 5744
6973 22:24:54.769966 # ok 1078 Set VL 5760
6974 22:24:54.770116 # ok 1079 # SKIP Disabled ZA for VL 5760
6975 22:24:54.770243 # ok 1080 # SKIP Get and set data for VL 5760
6976 22:24:54.770361 # ok 1081 Set VL 5776
6977 22:24:54.770478 # ok 1082 # SKIP Disabled ZA for VL 5776
6978 22:24:54.770596 # ok 1083 # SKIP Get and set data for VL 5776
6979 22:24:54.770712 # ok 1084 Set VL 5792
6980 22:24:54.770828 # ok 1085 # SKIP Disabled ZA for VL 5792
6981 22:24:54.770945 # ok 1086 # SKIP Get and set data for VL 5792
6982 22:24:54.771061 # ok 1087 Set VL 5808
6983 22:24:54.771652 # ok 1088 # SKIP Disabled ZA for VL 5808
6984 22:24:54.772097 # ok 1089 # SKIP Get and set data for VL 5808
6985 22:24:54.772199 # ok 1090 Set VL 5824
6986 22:24:54.772276 # ok 1091 # SKIP Disabled ZA for VL 5824
6987 22:24:54.772349 # ok 1092 # SKIP Get and set data for VL 5824
6988 22:24:54.772434 # ok 1093 Set VL 5840
6989 22:24:54.772510 # ok 1094 # SKIP Disabled ZA for VL 5840
6990 22:24:54.772596 # ok 1095 # SKIP Get and set data for VL 5840
6991 22:24:54.772686 # ok 1096 Set VL 5856
6992 22:24:54.772777 # ok 1097 # SKIP Disabled ZA for VL 5856
6993 22:24:54.772859 # ok 1098 # SKIP Get and set data for VL 5856
6994 22:24:54.773175 # ok 1099 Set VL 5872
6995 22:24:54.773271 # ok 1100 # SKIP Disabled ZA for VL 5872
6996 22:24:54.773552 # ok 1101 # SKIP Get and set data for VL 5872
6997 22:24:54.773670 # ok 1102 Set VL 5888
6998 22:24:54.773761 # ok 1103 # SKIP Disabled ZA for VL 5888
6999 22:24:54.779477 # ok 1104 # SKIP Get and set data for VL 5888
7000 22:24:54.779699 # ok 1105 Set VL 5904
7001 22:24:54.779794 # ok 1106 # SKIP Disabled ZA for VL 5904
7002 22:24:54.779874 # ok 1107 # SKIP Get and set data for VL 5904
7003 22:24:54.779949 # ok 1108 Set VL 5920
7004 22:24:54.780035 # ok 1109 # SKIP Disabled ZA for VL 5920
7005 22:24:54.780113 # ok 1110 # SKIP Get and set data for VL 5920
7006 22:24:54.780401 # ok 1111 Set VL 5936
7007 22:24:54.780501 # ok 1112 # SKIP Disabled ZA for VL 5936
7008 22:24:54.780580 # ok 1113 # SKIP Get and set data for VL 5936
7009 22:24:54.780667 # ok 1114 Set VL 5952
7010 22:24:54.780742 # ok 1115 # SKIP Disabled ZA for VL 5952
7011 22:24:54.780828 # ok 1116 # SKIP Get and set data for VL 5952
7012 22:24:54.780902 # ok 1117 Set VL 5968
7013 22:24:54.780975 # ok 1118 # SKIP Disabled ZA for VL 5968
7014 22:24:54.781048 # ok 1119 # SKIP Get and set data for VL 5968
7015 22:24:54.781133 # ok 1120 Set VL 5984
7016 22:24:54.781205 # ok 1121 # SKIP Disabled ZA for VL 5984
7017 22:24:54.781290 # ok 1122 # SKIP Get and set data for VL 5984
7018 22:24:54.781365 # ok 1123 Set VL 6000
7019 22:24:54.781451 # ok 1124 # SKIP Disabled ZA for VL 6000
7020 22:24:54.781524 # ok 1125 # SKIP Get and set data for VL 6000
7021 22:24:54.781597 # ok 1126 Set VL 6016
7022 22:24:54.788532 # ok 1127 # SKIP Disabled ZA for VL 6016
7023 22:24:54.788765 # ok 1128 # SKIP Get and set data for VL 6016
7024 22:24:54.788872 # ok 1129 Set VL 6032
7025 22:24:54.788961 # ok 1130 # SKIP Disabled ZA for VL 6032
7026 22:24:54.789048 # ok 1131 # SKIP Get and set data for VL 6032
7027 22:24:54.789135 # ok 1132 Set VL 6048
7028 22:24:54.789241 # ok 1133 # SKIP Disabled ZA for VL 6048
7029 22:24:54.789330 # ok 1134 # SKIP Get and set data for VL 6048
7030 22:24:54.789679 # ok 1135 Set VL 6064
7031 22:24:54.789841 # ok 1136 # SKIP Disabled ZA for VL 6064
7032 22:24:54.790014 # ok 1137 # SKIP Get and set data for VL 6064
7033 22:24:54.794976 # ok 1138 Set VL 6080
7034 22:24:54.795569 # ok 1139 # SKIP Disabled ZA for VL 6080
7035 22:24:54.795804 # ok 1140 # SKIP Get and set data for VL 6080
7036 22:24:54.795995 # ok 1141 Set VL 6096
7037 22:24:54.796171 # ok 1142 # SKIP Disabled ZA for VL 6096
7038 22:24:54.796348 # ok 1143 # SKIP Get and set data for VL 6096
7039 22:24:54.796519 # ok 1144 Set VL 6112
7040 22:24:54.796691 # ok 1145 # SKIP Disabled ZA for VL 6112
7041 22:24:54.796903 # ok 1146 # SKIP Get and set data for VL 6112
7042 22:24:54.797112 # ok 1147 Set VL 6128
7043 22:24:54.797295 # ok 1148 # SKIP Disabled ZA for VL 6128
7044 22:24:54.797463 # ok 1149 # SKIP Get and set data for VL 6128
7045 22:24:54.797637 # ok 1150 Set VL 6144
7046 22:24:54.797797 # ok 1151 # SKIP Disabled ZA for VL 6144
7047 22:24:54.797944 # ok 1152 # SKIP Get and set data for VL 6144
7048 22:24:54.798087 # ok 1153 Set VL 6160
7049 22:24:54.798229 # ok 1154 # SKIP Disabled ZA for VL 6160
7050 22:24:54.798374 # ok 1155 # SKIP Get and set data for VL 6160
7051 22:24:54.798515 # ok 1156 Set VL 6176
7052 22:24:54.798697 # ok 1157 # SKIP Disabled ZA for VL 6176
7053 22:24:54.798831 # ok 1158 # SKIP Get and set data for VL 6176
7054 22:24:54.798973 # ok 1159 Set VL 6192
7055 22:24:54.799115 # ok 1160 # SKIP Disabled ZA for VL 6192
7056 22:24:54.802792 # ok 1161 # SKIP Get and set data for VL 6192
7057 22:24:54.803113 # ok 1162 Set VL 6208
7058 22:24:54.803293 # ok 1163 # SKIP Disabled ZA for VL 6208
7059 22:24:54.803844 # ok 1164 # SKIP Get and set data for VL 6208
7060 22:24:54.804089 # ok 1165 Set VL 6224
7061 22:24:54.804288 # ok 1166 # SKIP Disabled ZA for VL 6224
7062 22:24:54.804462 # ok 1167 # SKIP Get and set data for VL 6224
7063 22:24:54.804636 # ok 1168 Set VL 6240
7064 22:24:54.804811 # ok 1169 # SKIP Disabled ZA for VL 6240
7065 22:24:54.805020 # ok 1170 # SKIP Get and set data for VL 6240
7066 22:24:54.805207 # ok 1171 Set VL 6256
7067 22:24:54.805378 # ok 1172 # SKIP Disabled ZA for VL 6256
7068 22:24:54.805551 # ok 1173 # SKIP Get and set data for VL 6256
7069 22:24:54.805772 # ok 1174 Set VL 6272
7070 22:24:54.805940 # ok 1175 # SKIP Disabled ZA for VL 6272
7071 22:24:54.806074 # ok 1176 # SKIP Get and set data for VL 6272
7072 22:24:54.806192 # ok 1177 Set VL 6288
7073 22:24:54.806307 # ok 1178 # SKIP Disabled ZA for VL 6288
7074 22:24:54.806422 # ok 1179 # SKIP Get and set data for VL 6288
7075 22:24:54.806539 # ok 1180 Set VL 6304
7076 22:24:54.806654 # ok 1181 # SKIP Disabled ZA for VL 6304
7077 22:24:54.806768 # ok 1182 # SKIP Get and set data for VL 6304
7078 22:24:54.806882 # ok 1183 Set VL 6320
7079 22:24:54.806997 # ok 1184 # SKIP Disabled ZA for VL 6320
7080 22:24:54.807112 # ok 1185 # SKIP Get and set data for VL 6320
7081 22:24:54.807227 # ok 1186 Set VL 6336
7082 22:24:54.810880 # ok 1187 # SKIP Disabled ZA for VL 6336
7083 22:24:54.811324 # ok 1188 # SKIP Get and set data for VL 6336
7084 22:24:54.811425 # ok 1189 Set VL 6352
7085 22:24:54.811503 # ok 1190 # SKIP Disabled ZA for VL 6352
7086 22:24:54.811578 # ok 1191 # SKIP Get and set data for VL 6352
7087 22:24:54.811653 # ok 1192 Set VL 6368
7088 22:24:54.811739 # ok 1193 # SKIP Disabled ZA for VL 6368
7089 22:24:54.811813 # ok 1194 # SKIP Get and set data for VL 6368
7090 22:24:54.811888 # ok 1195 Set VL 6384
7091 22:24:54.811961 # ok 1196 # SKIP Disabled ZA for VL 6384
7092 22:24:54.812054 # ok 1197 # SKIP Get and set data for VL 6384
7093 22:24:54.812142 # ok 1198 Set VL 6400
7094 22:24:54.812227 # ok 1199 # SKIP Disabled ZA for VL 6400
7095 22:24:54.812312 # ok 1200 # SKIP Get and set data for VL 6400
7096 22:24:54.812412 # ok 1201 Set VL 6416
7097 22:24:54.812498 # ok 1202 # SKIP Disabled ZA for VL 6416
7098 22:24:54.812792 # ok 1203 # SKIP Get and set data for VL 6416
7099 22:24:54.812900 # ok 1204 Set VL 6432
7100 22:24:54.812992 # ok 1205 # SKIP Disabled ZA for VL 6432
7101 22:24:54.813079 # ok 1206 # SKIP Get and set data for VL 6432
7102 22:24:54.813165 # ok 1207 Set VL 6448
7103 22:24:54.813252 # ok 1208 # SKIP Disabled ZA for VL 6448
7104 22:24:54.813465 # ok 1209 # SKIP Get and set data for VL 6448
7105 22:24:54.813550 # ok 1210 Set VL 6464
7106 22:24:54.813624 # ok 1211 # SKIP Disabled ZA for VL 6464
7107 22:24:54.813710 # ok 1212 # SKIP Get and set data for VL 6464
7108 22:24:54.813784 # ok 1213 Set VL 6480
7109 22:24:54.813859 # ok 1214 # SKIP Disabled ZA for VL 6480
7110 22:24:54.819063 # ok 1215 # SKIP Get and set data for VL 6480
7111 22:24:54.819335 # ok 1216 Set VL 6496
7112 22:24:54.819427 # ok 1217 # SKIP Disabled ZA for VL 6496
7113 22:24:54.819514 # ok 1218 # SKIP Get and set data for VL 6496
7114 22:24:54.819617 # ok 1219 Set VL 6512
7115 22:24:54.820043 # ok 1220 # SKIP Disabled ZA for VL 6512
7116 22:24:54.820138 # ok 1221 # SKIP Get and set data for VL 6512
7117 22:24:54.820226 # ok 1222 Set VL 6528
7118 22:24:54.820350 # ok 1223 # SKIP Disabled ZA for VL 6528
7119 22:24:54.820454 # ok 1224 # SKIP Get and set data for VL 6528
7120 22:24:54.820550 # ok 1225 Set VL 6544
7121 22:24:54.820642 # ok 1226 # SKIP Disabled ZA for VL 6544
7122 22:24:54.820750 # ok 1227 # SKIP Get and set data for VL 6544
7123 22:24:54.821063 # ok 1228 Set VL 6560
7124 22:24:54.821346 # ok 1229 # SKIP Disabled ZA for VL 6560
7125 22:24:54.821452 # ok 1230 # SKIP Get and set data for VL 6560
7126 22:24:54.821549 # ok 1231 Set VL 6576
7127 22:24:54.821641 # ok 1232 # SKIP Disabled ZA for VL 6576
7128 22:24:54.827239 # ok 1233 # SKIP Get and set data for VL 6576
7129 22:24:54.827505 # ok 1234 Set VL 6592
7130 22:24:54.827834 # ok 1235 # SKIP Disabled ZA for VL 6592
7131 22:24:54.827938 # ok 1236 # SKIP Get and set data for VL 6592
7132 22:24:54.828030 # ok 1237 Set VL 6608
7133 22:24:54.828116 # ok 1238 # SKIP Disabled ZA for VL 6608
7134 22:24:54.828202 # ok 1239 # SKIP Get and set data for VL 6608
7135 22:24:54.828288 # ok 1240 Set VL 6624
7136 22:24:54.828393 # ok 1241 # SKIP Disabled ZA for VL 6624
7137 22:24:54.828480 # ok 1242 # SKIP Get and set data for VL 6624
7138 22:24:54.828567 # ok 1243 Set VL 6640
7139 22:24:54.828651 # ok 1244 # SKIP Disabled ZA for VL 6640
7140 22:24:54.828737 # ok 1245 # SKIP Get and set data for VL 6640
7141 22:24:54.828838 # ok 1246 Set VL 6656
7142 22:24:54.828924 # ok 1247 # SKIP Disabled ZA for VL 6656
7143 22:24:54.829010 # ok 1248 # SKIP Get and set data for VL 6656
7144 22:24:54.829098 # ok 1249 Set VL 6672
7145 22:24:54.829201 # ok 1250 # SKIP Disabled ZA for VL 6672
7146 22:24:54.829293 # ok 1251 # SKIP Get and set data for VL 6672
7147 22:24:54.829381 # ok 1252 Set VL 6688
7148 22:24:54.829475 # ok 1253 # SKIP Disabled ZA for VL 6688
7149 22:24:54.829551 # ok 1254 # SKIP Get and set data for VL 6688
7150 22:24:54.833588 # ok 1255 Set VL 6704
7151 22:24:54.839342 # ok 1256 # SKIP Disabled ZA for VL 6704
7152 22:24:54.839819 # ok 1257 # SKIP Get and set data for VL 6704
7153 22:24:54.839926 # ok 1258 Set VL 6720
7154 22:24:54.840015 # ok 1259 # SKIP Disabled ZA for VL 6720
7155 22:24:54.840099 # ok 1260 # SKIP Get and set data for VL 6720
7156 22:24:54.840189 # ok 1261 Set VL 6736
7157 22:24:54.840291 # ok 1262 # SKIP Disabled ZA for VL 6736
7158 22:24:54.840378 # ok 1263 # SKIP Get and set data for VL 6736
7159 22:24:54.840462 # ok 1264 Set VL 6752
7160 22:24:54.840546 # ok 1265 # SKIP Disabled ZA for VL 6752
7161 22:24:54.840646 # ok 1266 # SKIP Get and set data for VL 6752
7162 22:24:54.840732 # ok 1267 Set VL 6768
7163 22:24:54.840815 # ok 1268 # SKIP Disabled ZA for VL 6768
7164 22:24:54.840916 # ok 1269 # SKIP Get and set data for VL 6768
7165 22:24:54.841004 # ok 1270 Set VL 6784
7166 22:24:54.841090 # ok 1271 # SKIP Disabled ZA for VL 6784
7167 22:24:54.841191 # ok 1272 # SKIP Get and set data for VL 6784
7168 22:24:54.841279 # ok 1273 Set VL 6800
7169 22:24:54.841384 # ok 1274 # SKIP Disabled ZA for VL 6800
7170 22:24:54.846767 # ok 1275 # SKIP Get and set data for VL 6800
7171 22:24:54.847307 # ok 1276 Set VL 6816
7172 22:24:54.847459 # ok 1277 # SKIP Disabled ZA for VL 6816
7173 22:24:54.848147 # ok 1278 # SKIP Get and set data for VL 6816
7174 22:24:54.848347 # ok 1279 Set VL 6832
7175 22:24:54.848512 # ok 1280 # SKIP Disabled ZA for VL 6832
7176 22:24:54.848693 # ok 1281 # SKIP Get and set data for VL 6832
7177 22:24:54.848835 # ok 1282 Set VL 6848
7178 22:24:54.848966 # ok 1283 # SKIP Disabled ZA for VL 6848
7179 22:24:54.849082 # ok 1284 # SKIP Get and set data for VL 6848
7180 22:24:54.849200 # ok 1285 Set VL 6864
7181 22:24:54.849319 # ok 1286 # SKIP Disabled ZA for VL 6864
7182 22:24:54.849472 # ok 1287 # SKIP Get and set data for VL 6864
7183 22:24:54.849595 # ok 1288 Set VL 6880
7184 22:24:54.849781 # ok 1289 # SKIP Disabled ZA for VL 6880
7185 22:24:54.849989 # ok 1290 # SKIP Get and set data for VL 6880
7186 22:24:54.850134 # ok 1291 Set VL 6896
7187 22:24:54.850277 # ok 1292 # SKIP Disabled ZA for VL 6896
7188 22:24:54.850422 # ok 1293 # SKIP Get and set data for VL 6896
7189 22:24:54.850566 # ok 1294 Set VL 6912
7190 22:24:54.850707 # ok 1295 # SKIP Disabled ZA for VL 6912
7191 22:24:54.855092 # ok 1296 # SKIP Get and set data for VL 6912
7192 22:24:54.855361 # ok 1297 Set VL 6928
7193 22:24:54.855827 # ok 1298 # SKIP Disabled ZA for VL 6928
7194 22:24:54.856012 # ok 1299 # SKIP Get and set data for VL 6928
7195 22:24:54.856182 # ok 1300 Set VL 6944
7196 22:24:54.856348 # ok 1301 # SKIP Disabled ZA for VL 6944
7197 22:24:54.856480 # ok 1302 # SKIP Get and set data for VL 6944
7198 22:24:54.856599 # ok 1303 Set VL 6960
7199 22:24:54.856716 # ok 1304 # SKIP Disabled ZA for VL 6960
7200 22:24:54.856833 # ok 1305 # SKIP Get and set data for VL 6960
7201 22:24:54.856950 # ok 1306 Set VL 6976
7202 22:24:54.857095 # ok 1307 # SKIP Disabled ZA for VL 6976
7203 22:24:54.857219 # ok 1308 # SKIP Get and set data for VL 6976
7204 22:24:54.857345 # ok 1309 Set VL 6992
7205 22:24:54.857544 # ok 1310 # SKIP Disabled ZA for VL 6992
7206 22:24:54.857730 # ok 1311 # SKIP Get and set data for VL 6992
7207 22:24:54.857879 # ok 1312 Set VL 7008
7208 22:24:54.858023 # ok 1313 # SKIP Disabled ZA for VL 7008
7209 22:24:54.858166 # ok 1314 # SKIP Get and set data for VL 7008
7210 22:24:54.858309 # ok 1315 Set VL 7024
7211 22:24:54.858490 # ok 1316 # SKIP Disabled ZA for VL 7024
7212 22:24:54.858625 # ok 1317 # SKIP Get and set data for VL 7024
7213 22:24:54.858768 # ok 1318 Set VL 7040
7214 22:24:54.858911 # ok 1319 # SKIP Disabled ZA for VL 7040
7215 22:24:54.859055 # ok 1320 # SKIP Get and set data for VL 7040
7216 22:24:54.859199 # ok 1321 Set VL 7056
7217 22:24:54.859340 # ok 1322 # SKIP Disabled ZA for VL 7056
7218 22:24:54.859484 # ok 1323 # SKIP Get and set data for VL 7056
7219 22:24:54.859626 # ok 1324 Set VL 7072
7220 22:24:54.859769 # ok 1325 # SKIP Disabled ZA for VL 7072
7221 22:24:54.862325 # ok 1326 # SKIP Get and set data for VL 7072
7222 22:24:54.862529 # ok 1327 Set VL 7088
7223 22:24:54.862818 # ok 1328 # SKIP Disabled ZA for VL 7088
7224 22:24:54.862909 # ok 1329 # SKIP Get and set data for VL 7088
7225 22:24:54.862997 # ok 1330 Set VL 7104
7226 22:24:54.863085 # ok 1331 # SKIP Disabled ZA for VL 7104
7227 22:24:54.863172 # ok 1332 # SKIP Get and set data for VL 7104
7228 22:24:54.863259 # ok 1333 Set VL 7120
7229 22:24:54.863365 # ok 1334 # SKIP Disabled ZA for VL 7120
7230 22:24:54.863456 # ok 1335 # SKIP Get and set data for VL 7120
7231 22:24:54.863544 # ok 1336 Set VL 7136
7232 22:24:54.863632 # ok 1337 # SKIP Disabled ZA for VL 7136
7233 22:24:54.863733 # ok 1338 # SKIP Get and set data for VL 7136
7234 22:24:54.863821 # ok 1339 Set VL 7152
7235 22:24:54.863906 # ok 1340 # SKIP Disabled ZA for VL 7152
7236 22:24:54.864008 # ok 1341 # SKIP Get and set data for VL 7152
7237 22:24:54.864095 # ok 1342 Set VL 7168
7238 22:24:54.864182 # ok 1343 # SKIP Disabled ZA for VL 7168
7239 22:24:54.864283 # ok 1344 # SKIP Get and set data for VL 7168
7240 22:24:54.864376 # ok 1345 Set VL 7184
7241 22:24:54.864479 # ok 1346 # SKIP Disabled ZA for VL 7184
7242 22:24:54.864566 # ok 1347 # SKIP Get and set data for VL 7184
7243 22:24:54.864666 # ok 1348 Set VL 7200
7244 22:24:54.864754 # ok 1349 # SKIP Disabled ZA for VL 7200
7245 22:24:54.864854 # ok 1350 # SKIP Get and set data for VL 7200
7246 22:24:54.864941 # ok 1351 Set VL 7216
7247 22:24:54.865037 # ok 1352 # SKIP Disabled ZA for VL 7216
7248 22:24:54.865139 # ok 1353 # SKIP Get and set data for VL 7216
7249 22:24:54.865238 # ok 1354 Set VL 7232
7250 22:24:54.865641 # ok 1355 # SKIP Disabled ZA for VL 7232
7251 22:24:54.874187 # ok 1356 # SKIP Get and set data for VL 7232
7252 22:24:54.874444 # ok 1357 Set VL 7248
7253 22:24:54.874753 # ok 1358 # SKIP Disabled ZA for VL 7248
7254 22:24:54.874859 # ok 1359 # SKIP Get and set data for VL 7248
7255 22:24:54.874950 # ok 1360 Set VL 7264
7256 22:24:54.875039 # ok 1361 # SKIP Disabled ZA for VL 7264
7257 22:24:54.875126 # ok 1362 # SKIP Get and set data for VL 7264
7258 22:24:54.875229 # ok 1363 Set VL 7280
7259 22:24:54.875318 # ok 1364 # SKIP Disabled ZA for VL 7280
7260 22:24:54.875405 # ok 1365 # SKIP Get and set data for VL 7280
7261 22:24:54.875491 # ok 1366 Set VL 7296
7262 22:24:54.875577 # ok 1367 # SKIP Disabled ZA for VL 7296
7263 22:24:54.875680 # ok 1368 # SKIP Get and set data for VL 7296
7264 22:24:54.875769 # ok 1369 Set VL 7312
7265 22:24:54.875855 # ok 1370 # SKIP Disabled ZA for VL 7312
7266 22:24:54.875940 # ok 1371 # SKIP Get and set data for VL 7312
7267 22:24:54.876042 # ok 1372 Set VL 7328
7268 22:24:54.876129 # ok 1373 # SKIP Disabled ZA for VL 7328
7269 22:24:54.876232 # ok 1374 # SKIP Get and set data for VL 7328
7270 22:24:54.876322 # ok 1375 Set VL 7344
7271 22:24:54.876429 # ok 1376 # SKIP Disabled ZA for VL 7344
7272 22:24:54.876517 # ok 1377 # SKIP Get and set data for VL 7344
7273 22:24:54.876619 # ok 1378 Set VL 7360
7274 22:24:54.876722 # ok 1379 # SKIP Disabled ZA for VL 7360
7275 22:24:54.877191 # ok 1380 # SKIP Get and set data for VL 7360
7276 22:24:54.877311 # ok 1381 Set VL 7376
7277 22:24:54.877404 # ok 1382 # SKIP Disabled ZA for VL 7376
7278 22:24:54.877480 # ok 1383 # SKIP Get and set data for VL 7376
7279 22:24:54.877555 # ok 1384 Set VL 7392
7280 22:24:54.877641 # ok 1385 # SKIP Disabled ZA for VL 7392
7281 22:24:54.877726 # ok 1386 # SKIP Get and set data for VL 7392
7282 22:24:54.882988 # ok 1387 Set VL 7408
7283 22:24:54.883475 # ok 1388 # SKIP Disabled ZA for VL 7408
7284 22:24:54.883573 # ok 1389 # SKIP Get and set data for VL 7408
7285 22:24:54.883661 # ok 1390 Set VL 7424
7286 22:24:54.883752 # ok 1391 # SKIP Disabled ZA for VL 7424
7287 22:24:54.883828 # ok 1392 # SKIP Get and set data for VL 7424
7288 22:24:54.883899 # ok 1393 Set VL 7440
7289 22:24:54.884165 # ok 1394 # SKIP Disabled ZA for VL 7440
7290 22:24:54.884250 # ok 1395 # SKIP Get and set data for VL 7440
7291 22:24:54.884314 # ok 1396 Set VL 7456
7292 22:24:54.884375 # ok 1397 # SKIP Disabled ZA for VL 7456
7293 22:24:54.884435 # ok 1398 # SKIP Get and set data for VL 7456
7294 22:24:54.884495 # ok 1399 Set VL 7472
7295 22:24:54.884555 # ok 1400 # SKIP Disabled ZA for VL 7472
7296 22:24:54.884627 # ok 1401 # SKIP Get and set data for VL 7472
7297 22:24:54.884689 # ok 1402 Set VL 7488
7298 22:24:54.884749 # ok 1403 # SKIP Disabled ZA for VL 7488
7299 22:24:54.884834 # ok 1404 # SKIP Get and set data for VL 7488
7300 22:24:54.884918 # ok 1405 Set VL 7504
7301 22:24:54.885010 # ok 1406 # SKIP Disabled ZA for VL 7504
7302 22:24:54.885096 # ok 1407 # SKIP Get and set data for VL 7504
7303 22:24:54.885169 # ok 1408 Set VL 7520
7304 22:24:54.885258 # ok 1409 # SKIP Disabled ZA for VL 7520
7305 22:24:54.885541 # ok 1410 # SKIP Get and set data for VL 7520
7306 22:24:54.885625 # ok 1411 Set VL 7536
7307 22:24:54.894728 # ok 1412 # SKIP Disabled ZA for VL 7536
7308 22:24:54.895198 # ok 1413 # SKIP Get and set data for VL 7536
7309 22:24:54.895297 # ok 1414 Set VL 7552
7310 22:24:54.895376 # ok 1415 # SKIP Disabled ZA for VL 7552
7311 22:24:54.895449 # ok 1416 # SKIP Get and set data for VL 7552
7312 22:24:54.895521 # ok 1417 Set VL 7568
7313 22:24:54.895608 # ok 1418 # SKIP Disabled ZA for VL 7568
7314 22:24:54.895684 # ok 1419 # SKIP Get and set data for VL 7568
7315 22:24:54.896137 # ok 1420 Set VL 7584
7316 22:24:54.896234 # ok 1421 # SKIP Disabled ZA for VL 7584
7317 22:24:54.896312 # ok 1422 # SKIP Get and set data for VL 7584
7318 22:24:54.896392 # ok 1423 Set VL 7600
7319 22:24:54.896472 # ok 1424 # SKIP Disabled ZA for VL 7600
7320 22:24:54.896552 # ok 1425 # SKIP Get and set data for VL 7600
7321 22:24:54.896861 # ok 1426 Set VL 7616
7322 22:24:54.896956 # ok 1427 # SKIP Disabled ZA for VL 7616
7323 22:24:54.897031 # ok 1428 # SKIP Get and set data for VL 7616
7324 22:24:54.897102 # ok 1429 Set VL 7632
7325 22:24:54.897176 # ok 1430 # SKIP Disabled ZA for VL 7632
7326 22:24:54.897250 # ok 1431 # SKIP Get and set data for VL 7632
7327 22:24:54.897323 # ok 1432 Set VL 7648
7328 22:24:54.897398 # ok 1433 # SKIP Disabled ZA for VL 7648
7329 22:24:54.897472 # ok 1434 # SKIP Get and set data for VL 7648
7330 22:24:54.897544 # ok 1435 Set VL 7664
7331 22:24:54.897617 # ok 1436 # SKIP Disabled ZA for VL 7664
7332 22:24:54.897701 # ok 1437 # SKIP Get and set data for VL 7664
7333 22:24:54.897777 # ok 1438 Set VL 7680
7334 22:24:54.897849 # ok 1439 # SKIP Disabled ZA for VL 7680
7335 22:24:54.897943 # ok 1440 # SKIP Get and set data for VL 7680
7336 22:24:54.898017 # ok 1441 Set VL 7696
7337 22:24:54.898089 # ok 1442 # SKIP Disabled ZA for VL 7696
7338 22:24:54.898160 # ok 1443 # SKIP Get and set data for VL 7696
7339 22:24:54.898230 # ok 1444 Set VL 7712
7340 22:24:54.910494 # ok 1445 # SKIP Disabled ZA for VL 7712
7341 22:24:54.910954 # ok 1446 # SKIP Get and set data for VL 7712
7342 22:24:54.913827 # ok 1447 Set VL 7728
7343 22:24:54.913969 # ok 1448 # SKIP Disabled ZA for VL 7728
7344 22:24:54.914049 # ok 1449 # SKIP Get and set data for VL 7728
7345 22:24:54.914124 # ok 1450 Set VL 7744
7346 22:24:54.914197 # ok 1451 # SKIP Disabled ZA for VL 7744
7347 22:24:54.914269 # ok 1452 # SKIP Get and set data for VL 7744
7348 22:24:54.914343 # ok 1453 Set VL 7760
7349 22:24:54.914419 # ok 1454 # SKIP Disabled ZA for VL 7760
7350 22:24:54.914493 # ok 1455 # SKIP Get and set data for VL 7760
7351 22:24:54.914568 # ok 1456 Set VL 7776
7352 22:24:54.914644 # ok 1457 # SKIP Disabled ZA for VL 7776
7353 22:24:54.914720 # ok 1458 # SKIP Get and set data for VL 7776
7354 22:24:54.914793 # ok 1459 Set VL 7792
7355 22:24:54.914871 # ok 1460 # SKIP Disabled ZA for VL 7792
7356 22:24:54.914947 # ok 1461 # SKIP Get and set data for VL 7792
7357 22:24:54.915023 # ok 1462 Set VL 7808
7358 22:24:54.915095 # ok 1463 # SKIP Disabled ZA for VL 7808
7359 22:24:54.915172 # ok 1464 # SKIP Get and set data for VL 7808
7360 22:24:54.915246 # ok 1465 Set VL 7824
7361 22:24:54.915321 # ok 1466 # SKIP Disabled ZA for VL 7824
7362 22:24:54.915394 # ok 1467 # SKIP Get and set data for VL 7824
7363 22:24:54.915472 # ok 1468 Set VL 7840
7364 22:24:54.915549 # ok 1469 # SKIP Disabled ZA for VL 7840
7365 22:24:54.915625 # ok 1470 # SKIP Get and set data for VL 7840
7366 22:24:54.915699 # ok 1471 Set VL 7856
7367 22:24:54.915793 # ok 1472 # SKIP Disabled ZA for VL 7856
7368 22:24:54.915879 # ok 1473 # SKIP Get and set data for VL 7856
7369 22:24:54.915964 # ok 1474 Set VL 7872
7370 22:24:54.916058 # ok 1475 # SKIP Disabled ZA for VL 7872
7371 22:24:54.916135 # ok 1476 # SKIP Get and set data for VL 7872
7372 22:24:54.916239 # ok 1477 Set VL 7888
7373 22:24:54.916334 # ok 1478 # SKIP Disabled ZA for VL 7888
7374 22:24:54.916428 # ok 1479 # SKIP Get and set data for VL 7888
7375 22:24:54.916520 # ok 1480 Set VL 7904
7376 22:24:54.916612 # ok 1481 # SKIP Disabled ZA for VL 7904
7377 22:24:54.916693 # ok 1482 # SKIP Get and set data for VL 7904
7378 22:24:54.916765 # ok 1483 Set VL 7920
7379 22:24:54.916837 # ok 1484 # SKIP Disabled ZA for VL 7920
7380 22:24:54.916911 # ok 1485 # SKIP Get and set data for VL 7920
7381 22:24:54.916983 # ok 1486 Set VL 7936
7382 22:24:54.923288 # ok 1487 # SKIP Disabled ZA for VL 7936
7383 22:24:54.923534 # ok 1488 # SKIP Get and set data for VL 7936
7384 22:24:54.923825 # ok 1489 Set VL 7952
7385 22:24:54.923920 # ok 1490 # SKIP Disabled ZA for VL 7952
7386 22:24:54.923998 # ok 1491 # SKIP Get and set data for VL 7952
7387 22:24:54.924073 # ok 1492 Set VL 7968
7388 22:24:54.924149 # ok 1493 # SKIP Disabled ZA for VL 7968
7389 22:24:54.924229 # ok 1494 # SKIP Get and set data for VL 7968
7390 22:24:54.924319 # ok 1495 Set VL 7984
7391 22:24:54.924396 # ok 1496 # SKIP Disabled ZA for VL 7984
7392 22:24:54.924471 # ok 1497 # SKIP Get and set data for VL 7984
7393 22:24:54.924559 # ok 1498 Set VL 8000
7394 22:24:54.924632 # ok 1499 # SKIP Disabled ZA for VL 8000
7395 22:24:54.924706 # ok 1500 # SKIP Get and set data for VL 8000
7396 22:24:54.924787 # ok 1501 Set VL 8016
7397 22:24:54.924888 # ok 1502 # SKIP Disabled ZA for VL 8016
7398 22:24:54.936596 # ok 1503 # SKIP Get and set data for VL 8016
7399 22:24:54.937075 # ok 1504 Set VL 8032
7400 22:24:54.937205 # ok 1505 # SKIP Disabled ZA for VL 8032
7401 22:24:54.937373 # ok 1506 # SKIP Get and set data for VL 8032
7402 22:24:54.937543 # ok 1507 Set VL 8048
7403 22:24:54.937781 # ok 1508 # SKIP Disabled ZA for VL 8048
7404 22:24:54.937882 # ok 1509 # SKIP Get and set data for VL 8048
7405 22:24:54.937958 # ok 1510 Set VL 8064
7406 22:24:54.938031 # ok 1511 # SKIP Disabled ZA for VL 8064
7407 22:24:54.938103 # ok 1512 # SKIP Get and set data for VL 8064
7408 22:24:54.938175 # ok 1513 Set VL 8080
7409 22:24:54.938246 # ok 1514 # SKIP Disabled ZA for VL 8080
7410 22:24:54.948396 # ok 1515 # SKIP Get and set data for VL 8080
7411 22:24:54.948921 # ok 1516 Set VL 8096
7412 22:24:54.949029 # ok 1517 # SKIP Disabled ZA for VL 8096
7413 22:24:54.949122 # ok 1518 # SKIP Get and set data for VL 8096
7414 22:24:54.949211 # ok 1519 Set VL 8112
7415 22:24:54.949299 # ok 1520 # SKIP Disabled ZA for VL 8112
7416 22:24:54.949406 # ok 1521 # SKIP Get and set data for VL 8112
7417 22:24:54.949500 # ok 1522 Set VL 8128
7418 22:24:54.949589 # ok 1523 # SKIP Disabled ZA for VL 8128
7419 22:24:54.949701 # ok 1524 # SKIP Get and set data for VL 8128
7420 22:24:54.954910 # ok 1525 Set VL 8144
7421 22:24:54.955644 # ok 1526 # SKIP Disabled ZA for VL 8144
7422 22:24:54.955852 # ok 1527 # SKIP Get and set data for VL 8144
7423 22:24:54.955928 # ok 1528 Set VL 8160
7424 22:24:54.955999 # ok 1529 # SKIP Disabled ZA for VL 8160
7425 22:24:54.956070 # ok 1530 # SKIP Get and set data for VL 8160
7426 22:24:54.956139 # ok 1531 Set VL 8176
7427 22:24:54.956209 # ok 1532 # SKIP Disabled ZA for VL 8176
7428 22:24:54.956297 # ok 1533 # SKIP Get and set data for VL 8176
7429 22:24:54.956372 # ok 1534 Set VL 8192
7430 22:24:54.956445 # ok 1535 # SKIP Disabled ZA for VL 8192
7431 22:24:54.956520 # ok 1536 # SKIP Get and set data for VL 8192
7432 22:24:54.956593 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7433 22:24:54.956665 ok 34 selftests: arm64: za-ptrace
7434 22:24:54.956741 # selftests: arm64: check_buffer_fill
7435 22:24:55.935803 # 1..20
7436 22:24:55.936268 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7437 22:24:55.936397 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7438 22:24:55.936494 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7439 22:24:55.936602 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7440 22:24:55.936710 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7441 22:24:55.937003 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7442 22:24:55.937118 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7443 22:24:55.937414 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7444 22:24:55.937709 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7445 22:24:55.937813 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7446 22:24:55.941445 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7447 22:24:55.941858 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7448 22:24:55.949125 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7449 22:24:55.949637 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7450 22:24:55.949756 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7451 22:24:55.949859 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7452 22:24:55.949977 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7453 22:24:55.956945 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7454 22:24:55.957414 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7455 22:24:55.957528 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7456 22:24:55.957626 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7457 22:24:55.977175 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7458 22:24:56.211824 # selftests: arm64: check_child_memory
7459 22:24:56.941117 # 1..12
7460 22:24:56.941371 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7461 22:24:56.941471 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7462 22:24:56.941560 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7463 22:24:56.941656 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7464 22:24:56.941743 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7465 22:24:56.941833 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7466 22:24:56.941921 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7467 22:24:56.942004 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7468 22:24:56.942314 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7469 22:24:56.942423 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7470 22:24:56.942512 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7471 22:24:56.942597 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7472 22:24:56.942683 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7473 22:24:56.969698 not ok 36 selftests: arm64: check_child_memory # exit=1
7474 22:24:57.139664 # selftests: arm64: check_gcr_el1_cswitch
7475 22:25:42.465695 <47>[ 106.129267] systemd-journald[109]: Sent WATCHDOG=1 notification.
7476 22:25:43.215405 <47>[ 106.888421] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3308 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
7477 22:25:43.216061 <47>[ 106.889594] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
7478 22:25:43.222502 <47>[ 106.896368] systemd-journald[109]: Rotating...
7479 22:25:43.278505 <47>[ 106.952197] systemd-journald[109]: Reserving 333 entries in field hash table.
7480 22:25:43.323288 <47>[ 106.996980] systemd-journald[109]: Reserving 4408 entries in data hash table.
7481 22:25:43.358989 <47>[ 107.032675] systemd-journald[109]: Vacuuming...
7482 22:25:43.383210 <47>[ 107.056785] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
7483 22:25:44.466765 # 1..1
7484 22:25:44.467030 # 1..1
7485 22:25:44.467375 # 1..1
7486 22:25:44.467496 # 1..1
7487 22:25:44.467594 # 1..1
7488 22:25:44.467688 # 1..1
7489 22:25:44.467780 # 1..1
7490 22:25:44.467871 # 1..1
7491 22:25:44.467962 # 1..1
7492 22:25:44.468053 # 1..1
7493 22:25:44.468144 # 1..1
7494 22:25:44.468232 # 1..1
7495 22:25:44.468318 # 1..1
7496 22:25:44.468402 # 1..1
7497 22:25:44.468488 # 1..1
7498 22:25:44.468575 # 1..1
7499 22:25:44.468660 # 1..1
7500 22:25:44.468747 # 1..1
7501 22:25:44.468834 # 1..1
7502 22:25:44.468920 # 1..1
7503 22:25:44.469006 # 1..1
7504 22:25:44.469093 # 1..1
7505 22:25:44.469180 # 1..1
7506 22:25:44.469264 # 1..1
7507 22:25:44.469349 # 1..1
7508 22:25:44.469435 # 1..1
7509 22:25:44.469537 # 1..1
7510 22:25:44.469625 # 1..1
7511 22:25:44.469720 # 1..1
7512 22:25:44.469808 # 1..1
7513 22:25:44.469894 # 1..1
7514 22:25:44.469984 # 1..1
7515 22:25:44.470072 # 1..1
7516 22:25:44.470160 # 1..1
7517 22:25:44.470244 # 1..1
7518 22:25:44.474218 # 1..1
7519 22:25:44.474626 # 1..1
7520 22:25:44.474749 # 1..1
7521 22:25:44.474865 # 1..1
7522 22:25:44.474980 # 1..1
7523 22:25:44.475090 # 1..1
7524 22:25:44.475198 # 1..1
7525 22:25:44.475308 # 1..1
7526 22:25:44.475399 # 1..1
7527 22:25:44.475519 # 1..1
7528 22:25:44.475618 # 1..1
7529 22:25:44.475691 # 1..1
7530 22:25:44.475755 # 1..1
7531 22:25:44.475815 # 1..1
7532 22:25:44.475876 # 1..1
7533 22:25:44.475936 # 1..1
7534 22:25:44.475996 # 1..1
7535 22:25:44.476056 # 1..1
7536 22:25:44.476115 # 1..1
7537 22:25:44.476194 # 1..1
7538 22:25:44.476258 # 1..1
7539 22:25:44.476319 # 1..1
7540 22:25:44.476380 # 1..1
7541 22:25:44.476439 # 1..1
7542 22:25:44.476504 # 1..1
7543 22:25:44.476563 # 1..1
7544 22:25:44.476623 # 1..1
7545 22:25:44.476683 # 1..1
7546 22:25:44.476742 # 1..1
7547 22:25:44.476802 # 1..1
7548 22:25:44.476862 # 1..1
7549 22:25:44.476922 # 1..1
7550 22:25:44.476981 # 1..1
7551 22:25:44.477040 # 1..1
7552 22:25:44.477100 # 1..1
7553 22:25:44.477161 # 1..1
7554 22:25:44.477220 # 1..1
7555 22:25:44.477280 # 1..1
7556 22:25:44.477340 # 1..1
7557 22:25:44.477399 # 1..1
7558 22:25:44.477459 # 1..1
7559 22:25:44.477518 # 1..1
7560 22:25:44.477577 # 1..1
7561 22:25:44.477637 # 1..1
7562 22:25:44.477749 # 1..1
7563 22:25:44.477851 # 1..1
7564 22:25:44.477949 # 1..1
7565 22:25:44.478045 # 1..1
7566 22:25:44.478141 # 1..1
7567 22:25:44.478236 # 1..1
7568 22:25:44.478332 # 1..1
7569 22:25:44.478429 # 1..1
7570 22:25:44.478528 # 1..1
7571 22:25:44.478611 # 1..1
7572 22:25:44.478686 # 1..1
7573 22:25:44.519706 # 1..1
7574 22:25:44.519951 # 1..1
7575 22:25:44.520042 # 1..1
7576 22:25:44.520125 # 1..1
7577 22:25:44.520211 # 1..1
7578 22:25:44.520301 # 1..1
7579 22:25:44.520389 # 1..1
7580 22:25:44.520685 # 1..1
7581 22:25:44.520788 # 1..1
7582 22:25:44.520872 # 1..1
7583 22:25:44.520954 # 1..1
7584 22:25:44.579237 # 1..1
7585 22:25:44.579505 # 1..1
7586 22:25:44.579603 # 1..1
7587 22:25:44.579694 # 1..1
7588 22:25:44.579785 # 1..1
7589 22:25:44.579869 # 1..1
7590 22:25:44.579954 # 1..1
7591 22:25:44.580037 # 1..1
7592 22:25:44.580118 # 1..1
7593 22:25:44.580203 # 1..1
7594 22:25:44.580288 # 1..1
7595 22:25:44.580373 # 1..1
7596 22:25:44.580458 # 1..1
7597 22:25:44.580543 # 1..1
7598 22:25:44.580853 # 1..1
7599 22:25:44.580960 # 1..1
7600 22:25:44.581047 # 1..1
7601 22:25:44.581133 # 1..1
7602 22:25:44.581222 # 1..1
7603 22:25:44.581308 # 1..1
7604 22:25:44.581394 # 1..1
7605 22:25:44.581478 # 1..1
7606 22:25:44.581561 # 1..1
7607 22:25:44.581654 # 1..1
7608 22:25:44.581739 # 1..1
7609 22:25:44.581822 # 1..1
7610 22:25:44.581906 # 1..1
7611 22:25:44.581987 # 1..1
7612 22:25:44.582070 # 1..1
7613 22:25:44.582155 # 1..1
7614 22:25:44.582243 # 1..1
7615 22:25:44.582326 # 1..1
7616 22:25:44.582406 # 1..1
7617 22:25:44.582488 # 1..1
7618 22:25:44.582568 # 1..1
7619 22:25:44.582651 # 1..1
7620 22:25:44.582734 # 1..1
7621 22:25:44.582816 # 1..1
7622 22:25:44.582899 # 1..1
7623 22:25:44.582982 # 1..1
7624 22:25:44.583065 # 1..1
7625 22:25:44.583147 # 1..1
7626 22:25:44.583230 # 1..1
7627 22:25:44.583313 # 1..1
7628 22:25:44.583394 # 1..1
7629 22:25:44.583476 # 1..1
7630 22:25:44.583560 # 1..1
7631 22:25:44.583644 # 1..1
7632 22:25:44.583728 # 1..1
7633 22:25:44.583811 # 1..1
7634 22:25:44.583894 # 1..1
7635 22:25:44.583975 # 1..1
7636 22:25:44.584057 # 1..1
7637 22:25:44.584141 # 1..1
7638 22:25:44.584223 # 1..1
7639 22:25:44.584305 # 1..1
7640 22:25:44.584386 # 1..1
7641 22:25:44.584468 # 1..1
7642 22:25:44.584548 # 1..1
7643 22:25:44.584631 # 1..1
7644 22:25:44.584714 # 1..1
7645 22:25:44.584799 # 1..1
7646 22:25:44.584883 # 1..1
7647 22:25:44.584968 # 1..1
7648 22:25:44.585051 # 1..1
7649 22:25:44.585136 # 1..1
7650 22:25:44.585218 # 1..1
7651 22:25:44.585301 # 1..1
7652 22:25:44.585384 # 1..1
7653 22:25:44.585467 # 1..1
7654 22:25:44.601640 # 1..1
7655 22:25:44.601895 # 1..1
7656 22:25:44.601989 # 1..1
7657 22:25:44.602071 # 1..1
7658 22:25:44.602155 # 1..1
7659 22:25:44.602450 # 1..1
7660 22:25:44.602538 # 1..1
7661 22:25:44.602606 # 1..1
7662 22:25:44.602670 # 1..1
7663 22:25:44.602742 # 1..1
7664 22:25:44.602838 # 1..1
7665 22:25:44.602934 # 1..1
7666 22:25:44.603026 # 1..1
7667 22:25:44.603105 # 1..1
7668 22:25:44.603181 # 1..1
7669 22:25:44.603266 # 1..1
7670 22:25:44.603358 # 1..1
7671 22:25:44.603434 # 1..1
7672 22:25:44.603515 # 1..1
7673 22:25:44.603590 # 1..1
7674 22:25:44.603666 # 1..1
7675 22:25:44.603740 # 1..1
7676 22:25:44.603817 # 1..1
7677 22:25:44.603891 # 1..1
7678 22:25:44.603967 # 1..1
7679 22:25:44.604043 # 1..1
7680 22:25:44.604118 # 1..1
7681 22:25:44.604193 # 1..1
7682 22:25:44.604268 # 1..1
7683 22:25:44.604343 # 1..1
7684 22:25:44.604936 # 1..1
7685 22:25:44.605026 # 1..1
7686 22:25:44.605124 # 1..1
7687 22:25:44.605215 # 1..1
7688 22:25:44.605293 # 1..1
7689 22:25:44.605368 # 1..1
7690 22:25:44.605444 # 1..1
7691 22:25:44.605518 # 1..1
7692 22:25:44.605592 # 1..1
7693 22:25:44.605688 # 1..1
7694 22:25:44.605780 # 1..1
7695 22:25:44.605872 # 1..1
7696 22:25:44.605963 # 1..1
7697 22:25:44.606057 # 1..1
7698 22:25:44.606158 # 1..1
7699 22:25:44.606249 # 1..1
7700 22:25:44.606337 # 1..1
7701 22:25:44.606424 # 1..1
7702 22:25:44.606510 # 1..1
7703 22:25:44.606615 # 1..1
7704 22:25:44.606708 # 1..1
7705 22:25:44.606794 # 1..1
7706 22:25:44.606877 # 1..1
7707 22:25:44.606941 # 1..1
7708 22:25:44.607002 # 1..1
7709 22:25:44.607064 # 1..1
7710 22:25:44.607125 # 1..1
7711 22:25:44.607187 # 1..1
7712 22:25:44.607266 # 1..1
7713 22:25:44.607353 # 1..1
7714 22:25:44.607441 # 1..1
7715 22:25:44.607534 # 1..1
7716 22:25:44.607617 # 1..1
7717 22:25:44.607717 # 1..1
7718 22:25:44.607809 # 1..1
7719 22:25:44.607874 # 1..1
7720 22:25:44.607935 # 1..1
7721 22:25:44.607994 # 1..1
7722 22:25:44.608052 # 1..1
7723 22:25:44.608112 # 1..1
7724 22:25:44.608171 # 1..1
7725 22:25:44.608230 # 1..1
7726 22:25:44.619091 # 1..1
7727 22:25:44.619707 # 1..1
7728 22:25:44.619879 # 1..1
7729 22:25:44.620011 # 1..1
7730 22:25:44.620131 # 1..1
7731 22:25:44.620250 # 1..1
7732 22:25:44.620463 # 1..1
7733 22:25:44.620688 # 1..1
7734 22:25:44.620849 # 1..1
7735 22:25:44.621023 # 1..1
7736 22:25:44.621193 # 1..1
7737 22:25:44.621365 # 1..1
7738 22:25:44.621532 # 1..1
7739 22:25:44.621701 # 1..1
7740 22:25:44.621881 # 1..1
7741 22:25:44.622044 # 1..1
7742 22:25:44.622204 # 1..1
7743 22:25:44.622406 # 1..1
7744 22:25:44.622569 # 1..1
7745 22:25:44.622722 # 1..1
7746 22:25:44.622838 # 1..1
7747 22:25:44.622944 # 1..1
7748 22:25:44.623039 # 1..1
7749 22:25:44.623143 # 1..1
7750 22:25:44.623240 # 1..1
7751 22:25:44.623340 # 1..1
7752 22:25:44.623437 # 1..1
7753 22:25:44.623536 # 1..1
7754 22:25:44.623634 # 1..1
7755 22:25:44.623722 # 1..1
7756 22:25:44.623796 # 1..1
7757 22:25:44.623867 # 1..1
7758 22:25:44.623937 # 1..1
7759 22:25:44.624007 # 1..1
7760 22:25:44.624076 # 1..1
7761 22:25:44.624146 # 1..1
7762 22:25:44.624215 # 1..1
7763 22:25:44.624285 # 1..1
7764 22:25:44.624354 # 1..1
7765 22:25:44.624424 # 1..1
7766 22:25:44.624493 # 1..1
7767 22:25:44.624563 # 1..1
7768 22:25:44.624632 # 1..1
7769 22:25:44.624703 # 1..1
7770 22:25:44.624778 # 1..1
7771 22:25:44.624848 # 1..1
7772 22:25:44.624918 # 1..1
7773 22:25:44.624994 # 1..1
7774 22:25:44.625073 # 1..1
7775 22:25:44.625153 # 1..1
7776 22:25:44.625233 # 1..1
7777 22:25:44.625315 # 1..1
7778 22:25:44.625395 # 1..1
7779 22:25:44.625476 # 1..1
7780 22:25:44.625556 # 1..1
7781 22:25:44.625636 # 1..1
7782 22:25:44.625749 # 1..1
7783 22:25:44.625830 # 1..1
7784 22:25:44.625949 # 1..1
7785 22:25:44.626034 # 1..1
7786 22:25:44.626113 # 1..1
7787 22:25:44.626192 # 1..1
7788 22:25:44.626272 # 1..1
7789 22:25:44.626336 # 1..1
7790 22:25:44.626414 # 1..1
7791 22:25:44.626498 # 1..1
7792 22:25:44.626582 # 1..1
7793 22:25:44.626664 # 1..1
7794 22:25:44.626753 # 1..1
7795 22:25:44.626838 # 1..1
7796 22:25:44.626922 # 1..1
7797 22:25:44.627009 # 1..1
7798 22:25:44.627073 # 1..1
7799 22:25:44.627147 # 1..1
7800 22:25:44.627237 # 1..1
7801 22:25:44.627326 # 1..1
7802 22:25:44.627412 # 1..1
7803 22:25:44.627476 # 1..1
7804 22:25:44.627538 # 1..1
7805 22:25:44.627625 # 1..1
7806 22:25:44.627717 # 1..1
7807 22:25:44.627804 # 1..1
7808 22:25:44.627879 # 1..1
7809 22:25:44.627950 # 1..1
7810 22:25:44.628020 # 1..1
7811 22:25:44.628090 # 1..1
7812 22:25:44.628161 # 1..1
7813 22:25:44.628231 # 1..1
7814 22:25:44.628301 # 1..1
7815 22:25:44.628372 # 1..1
7816 22:25:44.628443 # 1..1
7817 22:25:44.628513 # 1..1
7818 22:25:44.661417 # 1..1
7819 22:25:44.661657 # 1..1
7820 22:25:44.661763 # 1..1
7821 22:25:44.661872 # 1..1
7822 22:25:44.661980 # 1..1
7823 22:25:44.662089 # 1..1
7824 22:25:44.662197 # 1..1
7825 22:25:44.662308 # 1..1
7826 22:25:44.662420 # 1..1
7827 22:25:44.662530 # 1..1
7828 22:25:44.662656 # 1..1
7829 22:25:44.662766 # 1..1
7830 22:25:44.662880 # 1..1
7831 22:25:44.662992 # 1..1
7832 22:25:44.663107 # 1..1
7833 22:25:44.663217 # 1..1
7834 22:25:44.663326 # 1..1
7835 22:25:44.663423 # 1..1
7836 22:25:44.663503 # 1..1
7837 22:25:44.663580 # 1..1
7838 22:25:44.663657 # 1..1
7839 22:25:44.663733 # 1..1
7840 22:25:44.663814 # 1..1
7841 22:25:44.663897 # 1..1
7842 22:25:44.663981 # 1..1
7843 22:25:44.664067 # 1..1
7844 22:25:44.664160 # 1..1
7845 22:25:44.664250 # 1..1
7846 22:25:44.664318 # 1..1
7847 22:25:44.664379 # 1..1
7848 22:25:44.664438 # 1..1
7849 22:25:44.664498 # 1..1
7850 22:25:44.664557 # 1..1
7851 22:25:44.664616 # 1..1
7852 22:25:44.664676 # 1..1
7853 22:25:44.664734 # 1..1
7854 22:25:44.664793 # 1..1
7855 22:25:44.664852 # 1..1
7856 22:25:44.664911 # 1..1
7857 22:25:44.664970 # 1..1
7858 22:25:44.665029 # 1..1
7859 22:25:44.665088 # 1..1
7860 22:25:44.665147 # 1..1
7861 22:25:44.665230 # 1..1
7862 22:25:44.665293 # 1..1
7863 22:25:44.665353 # 1..1
7864 22:25:44.665413 # 1..1
7865 22:25:44.665471 # 1..1
7866 22:25:44.665531 # 1..1
7867 22:25:44.665590 # 1..1
7868 22:25:44.665679 # 1..1
7869 22:25:44.665798 # 1..1
7870 22:25:44.665900 # 1..1
7871 22:25:44.665997 # 1..1
7872 22:25:44.666092 # 1..1
7873 22:25:44.666188 # 1..1
7874 22:25:44.666267 # 1..1
7875 22:25:44.666342 # 1..1
7876 22:25:44.685521 #
7877 22:25:44.685992 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
7878 22:25:45.286132 # selftests: arm64: check_ksm_options
7879 22:25:45.953577 # 1..4
7880 22:25:45.953835 # # Invalid MTE synchronous exception caught!
7881 22:25:46.052825 not ok 38 selftests: arm64: check_ksm_options # exit=1
7882 22:25:46.639628 # selftests: arm64: check_mmap_options
7883 22:25:48.270430 # 1..22
7884 22:25:48.274362 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
7885 22:25:48.274577 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
7886 22:25:48.274662 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
7887 22:25:48.274740 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
7888 22:25:48.278541 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
7889 22:25:48.278765 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7890 22:25:48.278858 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
7891 22:25:48.279156 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7892 22:25:48.279256 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
7893 22:25:48.279547 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7894 22:25:48.279665 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
7895 22:25:48.350742 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7896 22:25:48.351256 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
7897 22:25:48.351369 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7898 22:25:48.351466 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
7899 22:25:48.351765 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7900 22:25:48.377554 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
7901 22:25:48.378080 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7902 22:25:48.378191 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
7903 22:25:48.378299 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7904 22:25:48.378717 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
7905 22:25:48.379033 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
7906 22:25:48.379131 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
7907 22:25:48.411554 not ok 39 selftests: arm64: check_mmap_options # exit=1
7908 22:25:49.075246 # selftests: arm64: check_prctl
7909 22:25:49.662484 # TAP version 13
7910 22:25:49.662674 # 1..5
7911 22:25:49.662742 # ok 1 check_basic_read
7912 22:25:49.662807 # ok 2 NONE
7913 22:25:49.662869 # ok 3 SYNC
7914 22:25:49.662931 # ok 4 ASYNC
7915 22:25:49.662992 # ok 5 SYNC+ASYNC
7916 22:25:49.663066 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
7917 22:25:49.722194 ok 40 selftests: arm64: check_prctl
7918 22:25:50.355181 # selftests: arm64: check_tags_inclusion
7919 22:25:50.849731 # 1..4
7920 22:25:50.850226 # # Unexpected fault recorded for 0x400ffff8295f000-0x400ffff8295f050 in mode 1
7921 22:25:50.850347 # not ok 1 Check an included tag value with sync mode
7922 22:25:50.850448 # # Unexpected fault recorded for 0xe00ffff8295f000-0xe00ffff8295f050 in mode 1
7923 22:25:50.850771 # not ok 2 Check different included tags value with sync mode
7924 22:25:50.850883 # ok 3 Check none included tags value with sync mode
7925 22:25:50.850980 # # Unexpected fault recorded for 0xf00ffff8295f000-0xf00ffff8295f050 in mode 1
7926 22:25:50.851094 # not ok 4 Check all included tags value with sync mode
7927 22:25:50.851206 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
7928 22:25:50.894480 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
7929 22:25:51.087330 # selftests: arm64: check_user_mem
7930 22:26:00.811540 # 1..64
7931 22:26:00.813261 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7932 22:26:00.813816 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7933 22:26:00.814023 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7934 22:26:00.814213 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7935 22:26:00.815656 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7936 22:26:00.815855 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7937 22:26:00.816037 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7938 22:26:00.816193 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7939 22:26:00.816344 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7940 22:26:00.816490 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7941 22:26:00.816636 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7942 22:26:00.816781 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7943 22:26:00.824947 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7944 22:26:00.825675 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7945 22:26:00.825930 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7946 22:26:00.826140 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7947 22:26:00.826373 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7948 22:26:00.826589 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7949 22:26:00.826839 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7950 22:26:00.827067 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7951 22:26:00.827300 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7952 22:26:00.827563 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7953 22:26:00.827826 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7954 22:26:00.827994 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7955 22:26:00.828146 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7956 22:26:00.834366 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7957 22:26:00.834629 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7958 22:26:00.834724 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7959 22:26:00.834996 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7960 22:26:00.835105 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7961 22:26:00.835204 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7962 22:26:00.835315 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7963 22:26:00.835411 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7964 22:26:00.835715 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7965 22:26:00.836303 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7966 22:26:00.836609 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7967 22:26:00.836731 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7968 22:26:00.837035 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7969 22:26:00.837160 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7970 22:26:00.837469 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7971 22:26:00.837820 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7972 22:26:00.837927 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7973 22:26:00.838253 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7974 22:26:00.838590 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7975 22:26:00.838697 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7976 22:26:00.839020 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7977 22:26:00.839144 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7978 22:26:00.839488 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7979 22:26:00.839610 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7980 22:26:00.845230 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7981 22:26:00.845680 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7982 22:26:02.673731 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7983 22:26:02.673974 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7984 22:26:02.675874 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7985 22:26:02.675992 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7986 22:26:02.676060 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7987 22:26:02.676122 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7988 22:26:02.676184 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7989 22:26:02.676246 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7990 22:26:02.676307 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7991 22:26:02.676390 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7992 22:26:02.690021 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7993 22:26:02.690233 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7994 22:26:02.690333 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7995 22:26:02.690414 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
7996 22:26:02.704229 ok 42 selftests: arm64: check_user_mem
7997 22:26:02.843434 # selftests: arm64: btitest
7998 22:26:03.021864 # TAP version 13
7999 22:26:03.022123 # 1..18
8000 22:26:03.022426 # # HWCAP_PACA present
8001 22:26:03.022533 # # HWCAP2_BTI present
8002 22:26:03.022621 # # Test binary built for BTI
8003 22:26:03.022919 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8004 22:26:03.023032 # ok 1 nohint_func/call_using_br_x0
8005 22:26:03.023128 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8006 22:26:03.023217 # ok 2 nohint_func/call_using_br_x16
8007 22:26:03.023324 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8008 22:26:03.023417 # ok 3 nohint_func/call_using_blr
8009 22:26:03.023518 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8010 22:26:03.023606 # ok 4 bti_none_func/call_using_br_x0
8011 22:26:03.029384 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8012 22:26:03.029859 # ok 5 bti_none_func/call_using_br_x16
8013 22:26:03.029968 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8014 22:26:03.030062 # ok 6 bti_none_func/call_using_blr
8015 22:26:03.030166 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8016 22:26:03.030260 # ok 7 bti_c_func/call_using_br_x0
8017 22:26:03.030348 # ok 8 bti_c_func/call_using_br_x16
8018 22:26:03.030434 # ok 9 bti_c_func/call_using_blr
8019 22:26:03.030521 # ok 10 bti_j_func/call_using_br_x0
8020 22:26:03.030627 # ok 11 bti_j_func/call_using_br_x16
8021 22:26:03.030712 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8022 22:26:03.030797 # ok 12 bti_j_func/call_using_blr
8023 22:26:03.030898 # ok 13 bti_jc_func/call_using_br_x0
8024 22:26:03.030985 # ok 14 bti_jc_func/call_using_br_x16
8025 22:26:03.031069 # ok 15 bti_jc_func/call_using_blr
8026 22:26:03.031169 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8027 22:26:03.031256 # ok 16 paciasp_func/call_using_br_x0
8028 22:26:03.031566 # ok 17 paciasp_func/call_using_br_x16
8029 22:26:03.031680 # ok 18 paciasp_func/call_using_blr
8030 22:26:03.038414 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8031 22:26:03.053595 ok 43 selftests: arm64: btitest
8032 22:26:03.211305 # selftests: arm64: nobtitest
8033 22:26:03.357618 # TAP version 13
8034 22:26:03.357890 # 1..18
8035 22:26:03.357985 # # HWCAP_PACA present
8036 22:26:03.358070 # # HWCAP2_BTI present
8037 22:26:03.358374 # # Test binary not built for BTI
8038 22:26:03.358479 # ok 1 nohint_func/call_using_br_x0
8039 22:26:03.358569 # ok 2 nohint_func/call_using_br_x16
8040 22:26:03.358656 # ok 3 nohint_func/call_using_blr
8041 22:26:03.358741 # ok 4 bti_none_func/call_using_br_x0
8042 22:26:03.358831 # ok 5 bti_none_func/call_using_br_x16
8043 22:26:03.358917 # ok 6 bti_none_func/call_using_blr
8044 22:26:03.359026 # ok 7 bti_c_func/call_using_br_x0
8045 22:26:03.359117 # ok 8 bti_c_func/call_using_br_x16
8046 22:26:03.359205 # ok 9 bti_c_func/call_using_blr
8047 22:26:03.359302 # ok 10 bti_j_func/call_using_br_x0
8048 22:26:03.359393 # ok 11 bti_j_func/call_using_br_x16
8049 22:26:03.359489 # ok 12 bti_j_func/call_using_blr
8050 22:26:03.359596 # ok 13 bti_jc_func/call_using_br_x0
8051 22:26:03.359687 # ok 14 bti_jc_func/call_using_br_x16
8052 22:26:03.359775 # ok 15 bti_jc_func/call_using_blr
8053 22:26:03.359859 # ok 16 paciasp_func/call_using_br_x0
8054 22:26:03.359947 # ok 17 paciasp_func/call_using_br_x16
8055 22:26:03.360031 # ok 18 paciasp_func/call_using_blr
8056 22:26:03.360115 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8057 22:26:03.383579 ok 44 selftests: arm64: nobtitest
8058 22:26:03.566800 # selftests: arm64: hwcap
8059 22:26:03.843411 # TAP version 13
8060 22:26:03.843857 # 1..28
8061 22:26:03.843943 # # RNG present
8062 22:26:03.844018 # ok 1 cpuinfo_match_RNG
8063 22:26:03.844092 # ok 2 sigill_RNG
8064 22:26:03.845053 # # SME present
8065 22:26:03.845362 # ok 3 cpuinfo_match_SME
8066 22:26:03.845476 # ok 4 sigill_SME
8067 22:26:03.845587 # # SVE present
8068 22:26:03.845765 # ok 5 cpuinfo_match_SVE
8069 22:26:03.845872 # ok 6 sigill_SVE
8070 22:26:03.845976 # # SVE 2 present
8071 22:26:03.846082 # ok 7 cpuinfo_match_SVE 2
8072 22:26:03.846211 # ok 8 sigill_SVE 2
8073 22:26:03.846306 # # SVE AES present
8074 22:26:03.846422 # ok 9 cpuinfo_match_SVE AES
8075 22:26:03.846520 # ok 10 sigill_SVE AES
8076 22:26:03.846617 # # SVE2 PMULL present
8077 22:26:03.846700 # ok 11 cpuinfo_match_SVE2 PMULL
8078 22:26:03.846773 # ok 12 sigill_SVE2 PMULL
8079 22:26:03.846854 # # SVE2 BITPERM present
8080 22:26:03.846938 # ok 13 cpuinfo_match_SVE2 BITPERM
8081 22:26:03.847024 # ok 14 sigill_SVE2 BITPERM
8082 22:26:03.847122 # # SVE2 SHA3 present
8083 22:26:03.847198 # ok 15 cpuinfo_match_SVE2 SHA3
8084 22:26:03.847274 # ok 16 sigill_SVE2 SHA3
8085 22:26:03.847355 # # SVE2 SM4 present
8086 22:26:03.847461 # ok 17 cpuinfo_match_SVE2 SM4
8087 22:26:03.847565 # ok 18 sigill_SVE2 SM4
8088 22:26:03.847651 # # SVE2 I8MM present
8089 22:26:03.847718 # ok 19 cpuinfo_match_SVE2 I8MM
8090 22:26:03.847778 # ok 20 sigill_SVE2 I8MM
8091 22:26:03.847838 # # SVE2 F32MM present
8092 22:26:03.847897 # ok 21 cpuinfo_match_SVE2 F32MM
8093 22:26:03.847973 # ok 22 sigill_SVE2 F32MM
8094 22:26:03.848035 # # SVE2 F64MM present
8095 22:26:03.848096 # ok 23 cpuinfo_match_SVE2 F64MM
8096 22:26:03.848181 # ok 24 sigill_SVE2 F64MM
8097 22:26:03.848247 # # SVE2 BF16 present
8098 22:26:03.848307 # ok 25 cpuinfo_match_SVE2 BF16
8099 22:26:03.857548 # ok 26 sigill_SVE2 BF16
8100 22:26:03.857767 # ok 27 cpuinfo_match_SVE2 EBF16
8101 22:26:03.857859 # ok 28 # SKIP sigill_SVE2 EBF16
8102 22:26:03.857962 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8103 22:26:03.894136 ok 45 selftests: arm64: hwcap
8104 22:26:04.239076 # selftests: arm64: ptrace
8105 22:26:04.497498 # TAP version 13
8106 22:26:04.497749 # 1..7
8107 22:26:04.498056 # # Parent is 3631, child is 3632
8108 22:26:04.498173 # ok 1 read_tpidr_one
8109 22:26:04.498269 # ok 2 write_tpidr_one
8110 22:26:04.498361 # ok 3 verify_tpidr_one
8111 22:26:04.498450 # ok 4 count_tpidrs
8112 22:26:04.498540 # ok 5 tpidr2_write
8113 22:26:04.498611 # ok 6 tpidr2_read
8114 22:26:04.498694 # ok 7 write_tpidr_only
8115 22:26:04.498804 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8116 22:26:04.535003 ok 46 selftests: arm64: ptrace
8117 22:26:04.707225 # selftests: arm64: syscall-abi
8118 22:26:07.851642 # TAP version 13
8119 22:26:07.851876 # 1..514
8120 22:26:07.851957 # # SME with FA64
8121 22:26:07.852034 # ok 1 getpid() FPSIMD
8122 22:26:07.852106 # ok 2 getpid() SVE VL 256
8123 22:26:07.853738 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8124 22:26:07.853851 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8125 22:26:07.853929 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8126 22:26:07.854001 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8127 22:26:07.854281 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8128 22:26:07.855849 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8129 22:26:07.855968 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8130 22:26:07.856044 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8131 22:26:07.856115 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8132 22:26:07.856187 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8133 22:26:07.856257 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8134 22:26:07.856328 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8135 22:26:07.856398 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8136 22:26:07.856470 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8137 22:26:07.856540 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8138 22:26:07.856610 # ok 18 getpid() SVE VL 240
8139 22:26:07.856680 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8140 22:26:07.856750 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8141 22:26:07.856824 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8142 22:26:07.861550 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8143 22:26:07.861739 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8144 22:26:07.861822 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8145 22:26:07.861925 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8146 22:26:07.862020 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8147 22:26:07.862139 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8148 22:26:07.862250 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8149 22:26:07.862558 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8150 22:26:07.862639 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8151 22:26:07.862710 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8152 22:26:07.862789 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8153 22:26:07.862857 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8154 22:26:07.863505 # ok 34 getpid() SVE VL 224
8155 22:26:07.863600 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8156 22:26:07.863670 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8157 22:26:07.863919 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8158 22:26:07.863991 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8159 22:26:07.864053 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8160 22:26:07.864114 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8161 22:26:07.864198 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8162 22:26:07.864265 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8163 22:26:07.864326 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8164 22:26:07.864386 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8165 22:26:07.869067 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8166 22:26:07.869421 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8167 22:26:07.869502 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8168 22:26:07.869569 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8169 22:26:07.869861 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8170 22:26:07.869954 # ok 50 getpid() SVE VL 208
8171 22:26:07.870039 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8172 22:26:07.870337 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8173 22:26:07.870445 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8174 22:26:07.870735 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8175 22:26:07.871022 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8176 22:26:07.871126 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8177 22:26:07.871215 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8178 22:26:07.871319 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8179 22:26:07.871406 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8180 22:26:07.871498 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8181 22:26:07.871604 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8182 22:26:07.871712 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8183 22:26:07.871801 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8184 22:26:07.877069 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8185 22:26:07.877213 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8186 22:26:07.877318 # ok 66 getpid() SVE VL 192
8187 22:26:07.877418 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8188 22:26:07.877516 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8189 22:26:07.877606 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8190 22:26:07.877940 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8191 22:26:07.878047 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8192 22:26:07.878725 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8193 22:26:07.878841 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8194 22:26:07.878933 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8195 22:26:07.879018 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8196 22:26:07.879105 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8197 22:26:07.879190 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8198 22:26:07.879279 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8199 22:26:07.879366 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8200 22:26:07.879452 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8201 22:26:07.879539 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8202 22:26:07.879627 # ok 82 getpid() SVE VL 176
8203 22:26:07.879715 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8204 22:26:07.880010 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8205 22:26:07.880115 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8206 22:26:07.880203 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8207 22:26:07.880289 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8208 22:26:07.880375 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8209 22:26:07.880461 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8210 22:26:07.880546 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8211 22:26:07.880631 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8212 22:26:07.885380 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8213 22:26:07.885553 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8214 22:26:07.885743 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8215 22:26:07.885848 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8216 22:26:07.885937 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8217 22:26:07.886022 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8218 22:26:07.886107 # ok 98 getpid() SVE VL 160
8219 22:26:10.833754 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8220 22:26:10.834008 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8221 22:26:10.834376 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8222 22:26:10.834500 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8223 22:26:10.834613 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8224 22:26:10.834723 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8225 22:26:10.834832 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8226 22:26:10.835200 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8227 22:26:10.835308 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8228 22:26:10.835403 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8229 22:26:10.835499 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8230 22:26:10.835607 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8231 22:26:10.835691 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8232 22:26:10.835767 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8233 22:26:10.836047 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8234 22:26:10.836145 # ok 114 getpid() SVE VL 144
8235 22:26:10.836247 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8236 22:26:10.840912 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8237 22:26:10.841354 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8238 22:26:10.841454 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8239 22:26:10.841557 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8240 22:26:10.841657 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8241 22:26:10.841903 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8242 22:26:10.842014 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8243 22:26:10.842103 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8244 22:26:10.842185 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8245 22:26:10.842281 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8246 22:26:10.842365 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8247 22:26:10.842444 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8248 22:26:10.842547 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8249 22:26:10.842630 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8250 22:26:10.842724 # ok 130 getpid() SVE VL 128
8251 22:26:10.842806 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8252 22:26:10.842900 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8253 22:26:10.843197 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8254 22:26:10.843319 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8255 22:26:10.843464 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8256 22:26:10.843574 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8257 22:26:10.843665 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8258 22:26:10.844338 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8259 22:26:10.844589 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8260 22:26:10.844692 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8261 22:26:10.845029 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8262 22:26:10.845134 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8263 22:26:10.845212 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8264 22:26:10.845285 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8265 22:26:10.845575 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8266 22:26:10.845698 # ok 146 getpid() SVE VL 112
8267 22:26:10.845794 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8268 22:26:10.845884 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8269 22:26:10.845973 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8270 22:26:10.846079 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8271 22:26:10.846170 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8272 22:26:10.846259 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8273 22:26:10.846364 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8274 22:26:10.846456 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8275 22:26:10.846544 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8276 22:26:10.846646 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8277 22:26:10.846736 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8278 22:26:10.846840 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8279 22:26:10.846944 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8280 22:26:10.847356 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8281 22:26:10.847463 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8282 22:26:10.847565 # ok 162 getpid() SVE VL 96
8283 22:26:10.847670 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8284 22:26:10.847771 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8285 22:26:10.852264 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8286 22:26:10.852729 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8287 22:26:10.853079 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8288 22:26:10.853447 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8289 22:26:10.853608 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8290 22:26:10.853866 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8291 22:26:10.854011 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8292 22:26:10.854192 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8293 22:26:10.854399 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8294 22:26:10.854598 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8295 22:26:10.854732 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8296 22:26:10.854878 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8297 22:26:10.854989 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8298 22:26:10.855090 # ok 178 getpid() SVE VL 80
8299 22:26:10.855176 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8300 22:26:10.855267 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8301 22:26:10.855604 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8302 22:26:10.855727 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8303 22:26:10.855826 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8304 22:26:10.855919 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8305 22:26:10.855998 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8306 22:26:10.856073 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8307 22:26:10.856148 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8308 22:26:10.856222 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8309 22:26:10.856297 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8310 22:26:10.860268 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8311 22:26:10.860671 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8312 22:26:10.860779 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8313 22:26:10.860871 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8314 22:26:10.860966 # ok 194 getpid() SVE VL 64
8315 22:26:10.861053 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8316 22:26:13.831800 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8317 22:26:13.832041 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8318 22:26:13.832140 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8319 22:26:13.832235 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8320 22:26:13.832329 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8321 22:26:13.834053 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8322 22:26:13.834468 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8323 22:26:13.834624 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8324 22:26:13.834760 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8325 22:26:13.834931 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8326 22:26:13.835101 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8327 22:26:13.835257 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8328 22:26:13.835391 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8329 22:26:13.835513 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8330 22:26:13.835637 # ok 210 getpid() SVE VL 48
8331 22:26:13.835759 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8332 22:26:13.835882 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8333 22:26:13.836000 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8334 22:26:13.836125 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8335 22:26:13.836245 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8336 22:26:13.836412 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8337 22:26:13.836539 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8338 22:26:13.836658 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8339 22:26:13.836776 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8340 22:26:13.836868 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8341 22:26:13.836956 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8342 22:26:13.837044 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8343 22:26:13.837117 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8344 22:26:13.837177 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8345 22:26:13.837237 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8346 22:26:13.837296 # ok 226 getpid() SVE VL 32
8347 22:26:13.844173 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8348 22:26:13.844648 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8349 22:26:13.844758 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8350 22:26:13.844867 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8351 22:26:13.844955 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8352 22:26:13.845056 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8353 22:26:13.845145 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8354 22:26:13.845247 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8355 22:26:13.845336 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8356 22:26:13.845422 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8357 22:26:13.845507 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8358 22:26:13.846066 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8359 22:26:13.846295 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8360 22:26:13.846396 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8361 22:26:13.846485 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8362 22:26:13.846793 # ok 242 getpid() SVE VL 16
8363 22:26:13.846899 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8364 22:26:13.846989 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8365 22:26:13.847077 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8366 22:26:13.847181 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8367 22:26:13.847499 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8368 22:26:13.847611 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8369 22:26:13.847717 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8370 22:26:13.852405 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8371 22:26:13.852933 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8372 22:26:13.853241 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8373 22:26:13.853344 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8374 22:26:13.853429 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8375 22:26:13.853513 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8376 22:26:13.853599 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8377 22:26:13.853917 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8378 22:26:13.854020 # ok 258 sched_yield() FPSIMD
8379 22:26:13.854107 # ok 259 sched_yield() SVE VL 256
8380 22:26:13.854191 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8381 22:26:13.854288 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8382 22:26:13.854416 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8383 22:26:13.854525 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8384 22:26:13.854633 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8385 22:26:13.854757 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8386 22:26:13.854866 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8387 22:26:13.854971 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8388 22:26:13.855096 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8389 22:26:13.855408 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8390 22:26:13.855517 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8391 22:26:13.855624 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8392 22:26:13.855730 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8393 22:26:13.855837 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8394 22:26:13.855926 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8395 22:26:13.860781 # ok 275 sched_yield() SVE VL 240
8396 22:26:13.861232 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8397 22:26:13.861355 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8398 22:26:13.861484 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8399 22:26:13.861628 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8400 22:26:13.861776 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8401 22:26:13.862105 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8402 22:26:13.862209 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8403 22:26:13.862306 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8404 22:26:13.862412 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8405 22:26:13.862498 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8406 22:26:13.862621 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8407 22:26:13.862714 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8408 22:26:13.862819 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8409 22:26:13.862919 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8410 22:26:16.341662 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8411 22:26:16.341961 # ok 291 sched_yield() SVE VL 224
8412 22:26:16.342320 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8413 22:26:16.342478 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8414 22:26:16.342613 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8415 22:26:16.342744 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8416 22:26:16.342876 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8417 22:26:16.342943 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8418 22:26:16.343008 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8419 22:26:16.343095 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8420 22:26:16.343180 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8421 22:26:16.343301 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8422 22:26:16.343396 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8423 22:26:16.343498 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8424 22:26:16.343566 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8425 22:26:16.344281 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8426 22:26:16.344574 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8427 22:26:16.344671 # ok 307 sched_yield() SVE VL 208
8428 22:26:16.344758 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8429 22:26:16.344842 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8430 22:26:16.344966 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8431 22:26:16.345088 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8432 22:26:16.345212 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8433 22:26:16.345334 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8434 22:26:16.345873 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8435 22:26:16.345970 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8436 22:26:16.346061 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8437 22:26:16.346142 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8438 22:26:16.346241 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8439 22:26:16.346327 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8440 22:26:16.346410 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8441 22:26:16.346689 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8442 22:26:16.346791 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8443 22:26:16.346892 # ok 323 sched_yield() SVE VL 192
8444 22:26:16.346978 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8445 22:26:16.347077 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8446 22:26:16.347175 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8447 22:26:16.347474 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8448 22:26:16.347613 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8449 22:26:16.356051 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8450 22:26:16.356520 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8451 22:26:16.356631 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8452 22:26:16.356723 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8453 22:26:16.357021 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8454 22:26:16.357127 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8455 22:26:16.357235 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8456 22:26:16.357339 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8457 22:26:16.357428 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8458 22:26:16.357528 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8459 22:26:16.357614 # ok 339 sched_yield() SVE VL 176
8460 22:26:16.357919 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8461 22:26:16.358236 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8462 22:26:16.358348 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8463 22:26:16.358445 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8464 22:26:16.358797 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8465 22:26:16.358900 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8466 22:26:16.358995 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8467 22:26:16.359086 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8468 22:26:16.359171 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8469 22:26:16.359430 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8470 22:26:16.359537 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8471 22:26:16.359627 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8472 22:26:16.359716 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8473 22:26:16.359804 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8474 22:26:16.359906 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8475 22:26:16.359993 # ok 355 sched_yield() SVE VL 160
8476 22:26:16.364611 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8477 22:26:16.365029 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8478 22:26:16.365134 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8479 22:26:16.365225 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8480 22:26:16.365333 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8481 22:26:16.365440 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8482 22:26:16.365531 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8483 22:26:16.365633 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8484 22:26:16.365746 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8485 22:26:16.365839 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8486 22:26:16.365942 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8487 22:26:16.366045 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8488 22:26:16.366358 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8489 22:26:16.366473 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8490 22:26:16.366584 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8491 22:26:16.366691 # ok 371 sched_yield() SVE VL 144
8492 22:26:16.366783 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8493 22:26:16.366885 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8494 22:26:16.366963 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8495 22:26:16.367207 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8496 22:26:16.367327 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8497 22:26:19.083574 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8498 22:26:19.083779 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8499 22:26:19.083874 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8500 22:26:19.084171 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8501 22:26:19.084284 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8502 22:26:19.084377 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8503 22:26:19.084465 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8504 22:26:19.092278 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8505 22:26:19.092730 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8506 22:26:19.092837 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8507 22:26:19.092933 # ok 387 sched_yield() SVE VL 128
8508 22:26:19.093008 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8509 22:26:19.093083 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8510 22:26:19.093152 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8511 22:26:19.093237 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8512 22:26:19.093311 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8513 22:26:19.093393 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8514 22:26:19.094405 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8515 22:26:19.094606 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8516 22:26:19.094743 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8517 22:26:19.094866 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8518 22:26:19.094982 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8519 22:26:19.095100 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8520 22:26:19.095222 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8521 22:26:19.095339 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8522 22:26:19.095457 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8523 22:26:19.095605 # ok 403 sched_yield() SVE VL 112
8524 22:26:19.095972 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8525 22:26:19.096064 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8526 22:26:19.096145 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8527 22:26:19.096220 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8528 22:26:19.096294 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8529 22:26:19.096372 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8530 22:26:19.096464 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8531 22:26:19.096558 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8532 22:26:19.096642 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8533 22:26:19.096726 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8534 22:26:19.096837 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8535 22:26:19.096914 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8536 22:26:19.096976 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8537 22:26:19.097037 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8538 22:26:19.097097 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8539 22:26:19.097162 # ok 419 sched_yield() SVE VL 96
8540 22:26:19.104954 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8541 22:26:19.105154 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8542 22:26:19.105267 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8543 22:26:19.105604 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8544 22:26:19.105717 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8545 22:26:19.105809 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8546 22:26:19.105898 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8547 22:26:19.106002 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8548 22:26:19.106317 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8549 22:26:19.106421 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8550 22:26:19.106512 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8551 22:26:19.106598 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8552 22:26:19.106701 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8553 22:26:19.106993 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8554 22:26:19.107102 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8555 22:26:19.107191 # ok 435 sched_yield() SVE VL 80
8556 22:26:19.107277 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8557 22:26:19.107362 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8558 22:26:19.107448 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8559 22:26:19.107551 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8560 22:26:19.107639 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8561 22:26:19.107725 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8562 22:26:19.107810 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8563 22:26:19.107911 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8564 22:26:19.116552 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8565 22:26:19.116990 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8566 22:26:19.117095 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8567 22:26:19.117184 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8568 22:26:19.117255 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8569 22:26:19.117349 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8570 22:26:19.117434 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8571 22:26:19.117517 # ok 451 sched_yield() SVE VL 64
8572 22:26:19.117632 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8573 22:26:19.117748 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8574 22:26:19.117845 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8575 22:26:19.117971 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8576 22:26:19.118077 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8577 22:26:19.118195 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8578 22:26:19.118296 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8579 22:26:19.118418 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8580 22:26:19.118517 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8581 22:26:19.118624 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8582 22:26:19.118751 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8583 22:26:19.118861 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8584 22:26:19.856371 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8585 22:26:19.856736 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8586 22:26:19.857232 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8587 22:26:19.857451 # ok 467 sched_yield() SVE VL 48
8588 22:26:19.857632 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8589 22:26:19.857817 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8590 22:26:19.857995 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8591 22:26:19.858165 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8592 22:26:19.858947 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8593 22:26:19.859173 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8594 22:26:19.859390 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8595 22:26:19.859614 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8596 22:26:19.859806 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8597 22:26:19.859947 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8598 22:26:19.860101 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8599 22:26:19.860233 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8600 22:26:19.860353 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8601 22:26:19.860471 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8602 22:26:19.860590 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8603 22:26:19.860708 # ok 483 sched_yield() SVE VL 32
8604 22:26:19.860827 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8605 22:26:19.860946 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8606 22:26:19.861064 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8607 22:26:19.861182 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8608 22:26:19.861543 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8609 22:26:19.861762 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8610 22:26:19.861937 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8611 22:26:19.862153 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8612 22:26:19.862354 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8613 22:26:19.862543 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8614 22:26:19.864651 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8615 22:26:19.865125 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8616 22:26:19.865437 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8617 22:26:19.865686 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8618 22:26:19.865963 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8619 22:26:19.866190 # ok 499 sched_yield() SVE VL 16
8620 22:26:19.866406 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8621 22:26:19.866615 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8622 22:26:19.866835 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8623 22:26:19.867059 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8624 22:26:19.867282 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8625 22:26:19.867465 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8626 22:26:19.867597 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8627 22:26:19.867717 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8628 22:26:19.867835 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8629 22:26:19.867952 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8630 22:26:19.868069 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8631 22:26:19.868187 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8632 22:26:19.868303 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8633 22:26:19.868420 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8634 22:26:19.868537 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8635 22:26:19.868653 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8636 22:26:19.874016 ok 47 selftests: arm64: syscall-abi
8637 22:26:19.939679 # selftests: arm64: tpidr2
8638 22:26:20.108429 # TAP version 13
8639 22:26:20.108794 # 1..5
8640 22:26:20.109019 # # PID: 3666
8641 22:26:20.109432 # ok 1 default_value
8642 22:26:20.109584 # ok 2 write_read
8643 22:26:20.109751 # ok 3 write_sleep_read
8644 22:26:20.109899 # ok 4 write_fork_read
8645 22:26:20.110060 # ok 5 write_clone_read
8646 22:26:20.110226 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8647 22:26:20.120805 ok 48 selftests: arm64: tpidr2
8648 22:26:20.713024 arm64_tags_test pass
8649 22:26:20.713245 arm64_run_tags_test_sh pass
8650 22:26:20.713572 arm64_fake_sigreturn_bad_magic pass
8651 22:26:20.713682 arm64_fake_sigreturn_bad_size pass
8652 22:26:20.713771 arm64_fake_sigreturn_bad_size_for_magic0 pass
8653 22:26:20.713859 arm64_fake_sigreturn_duplicated_fpsimd pass
8654 22:26:20.713964 arm64_fake_sigreturn_misaligned_sp pass
8655 22:26:20.714286 arm64_fake_sigreturn_missing_fpsimd pass
8656 22:26:20.714408 arm64_fake_sigreturn_sme_change_vl pass
8657 22:26:20.714543 arm64_fake_sigreturn_sve_change_vl pass
8658 22:26:20.714646 arm64_mangle_pstate_invalid_compat_toggle pass
8659 22:26:20.714753 arm64_mangle_pstate_invalid_daif_bits pass
8660 22:26:20.714857 arm64_mangle_pstate_invalid_mode_el1h pass
8661 22:26:20.714959 arm64_mangle_pstate_invalid_mode_el1t pass
8662 22:26:20.715083 arm64_mangle_pstate_invalid_mode_el2h pass
8663 22:26:20.715193 arm64_mangle_pstate_invalid_mode_el2t pass
8664 22:26:20.715299 arm64_mangle_pstate_invalid_mode_el3h pass
8665 22:26:20.715416 arm64_mangle_pstate_invalid_mode_el3t pass
8666 22:26:20.715523 arm64_sme_trap_no_sm pass
8667 22:26:20.715606 arm64_sme_trap_non_streaming skip
8668 22:26:20.715706 arm64_sme_trap_za pass
8669 22:26:20.715779 arm64_sme_vl pass
8670 22:26:20.715842 arm64_ssve_regs pass
8671 22:26:20.715902 arm64_sve_regs pass
8672 22:26:20.719803 arm64_sve_vl pass
8673 22:26:20.720131 arm64_za_no_regs pass
8674 22:26:20.720242 arm64_za_regs pass
8675 22:26:20.720339 arm64_pac_global_corrupt_pac pass
8676 22:26:20.720445 arm64_pac_global_pac_instructions_not_nop pass
8677 22:26:20.720537 arm64_pac_global_pac_instructions_not_nop_generic pass
8678 22:26:20.720642 arm64_pac_global_single_thread_different_keys pass
8679 22:26:20.720749 arm64_pac_global_exec_changed_keys pass
8680 22:26:20.720855 arm64_pac_global_context_switch_keep_keys pass
8681 22:26:20.721176 arm64_pac_global_context_switch_keep_keys_generic pass
8682 22:26:20.721285 arm64_pac pass
8683 22:26:20.721380 arm64_fp-stress_FPSIMD-0-0 pass
8684 22:26:20.721679 arm64_fp-stress_SVE-VL-256-0 pass
8685 22:26:20.721788 arm64_fp-stress_SVE-VL-240-0 pass
8686 22:26:20.721884 arm64_fp-stress_SVE-VL-224-0 pass
8687 22:26:20.721976 arm64_fp-stress_SVE-VL-208-0 pass
8688 22:26:20.722068 arm64_fp-stress_SVE-VL-192-0 pass
8689 22:26:20.722361 arm64_fp-stress_SVE-VL-176-0 pass
8690 22:26:20.722469 arm64_fp-stress_SVE-VL-160-0 pass
8691 22:26:20.722563 arm64_fp-stress_SVE-VL-144-0 pass
8692 22:26:20.722650 arm64_fp-stress_SVE-VL-128-0 pass
8693 22:26:20.722739 arm64_fp-stress_SVE-VL-112-0 pass
8694 22:26:20.722827 arm64_fp-stress_SVE-VL-96-0 pass
8695 22:26:20.722932 arm64_fp-stress_SVE-VL-80-0 pass
8696 22:26:20.723022 arm64_fp-stress_SVE-VL-64-0 pass
8697 22:26:20.723109 arm64_fp-stress_SVE-VL-48-0 pass
8698 22:26:20.723196 arm64_fp-stress_SVE-VL-32-0 pass
8699 22:26:20.723283 arm64_fp-stress_SVE-VL-16-0 pass
8700 22:26:20.723386 arm64_fp-stress_SSVE-VL-256-0 pass
8701 22:26:20.723477 arm64_fp-stress_ZA-VL-256-0 pass
8702 22:26:20.723566 arm64_fp-stress_SSVE-VL-128-0 pass
8703 22:26:20.723654 arm64_fp-stress_ZA-VL-128-0 pass
8704 22:26:20.723759 arm64_fp-stress_SSVE-VL-64-0 pass
8705 22:26:20.723849 arm64_fp-stress_ZA-VL-64-0 pass
8706 22:26:20.727789 arm64_fp-stress_SSVE-VL-32-0 pass
8707 22:26:20.728128 arm64_fp-stress_ZA-VL-32-0 pass
8708 22:26:20.728231 arm64_fp-stress_SSVE-VL-16-0 pass
8709 22:26:20.728342 arm64_fp-stress_ZA-VL-16-0 pass
8710 22:26:20.728471 arm64_fp-stress pass
8711 22:26:20.728568 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8712 22:26:20.728653 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8713 22:26:20.728773 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8714 22:26:20.728893 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8715 22:26:20.728991 arm64_sve-ptrace_Set_SVE_VL_16 pass
8716 22:26:20.729117 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8717 22:26:20.729527 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8718 22:26:20.729791 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8719 22:26:20.729987 arm64_sve-ptrace_Set_SVE_VL_32 pass
8720 22:26:20.730168 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8721 22:26:20.730379 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8722 22:26:20.730561 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8723 22:26:20.730754 arm64_sve-ptrace_Set_SVE_VL_48 pass
8724 22:26:20.731006 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8725 22:26:20.731206 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8726 22:26:20.731384 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8727 22:26:20.731552 arm64_sve-ptrace_Set_SVE_VL_64 pass
8728 22:26:20.731677 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8729 22:26:20.731820 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8730 22:26:20.731941 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8731 22:26:20.732055 arm64_sve-ptrace_Set_SVE_VL_80 pass
8732 22:26:20.735837 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8733 22:26:20.736161 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8734 22:26:20.736267 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8735 22:26:20.736373 arm64_sve-ptrace_Set_SVE_VL_96 pass
8736 22:26:20.736476 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8737 22:26:20.736796 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8738 22:26:20.736904 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8739 22:26:20.737027 arm64_sve-ptrace_Set_SVE_VL_112 pass
8740 22:26:20.737138 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8741 22:26:20.737439 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8742 22:26:20.737558 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8743 22:26:20.737686 arm64_sve-ptrace_Set_SVE_VL_128 pass
8744 22:26:20.738015 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8745 22:26:20.738129 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8746 22:26:20.738219 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8747 22:26:20.738827 arm64_sve-ptrace_Set_SVE_VL_144 pass
8748 22:26:20.739223 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8749 22:26:20.739348 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8750 22:26:20.739439 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8751 22:26:20.739525 arm64_sve-ptrace_Set_SVE_VL_160 pass
8752 22:26:20.739812 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8753 22:26:20.739916 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8754 22:26:20.740007 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8755 22:26:20.740099 arm64_sve-ptrace_Set_SVE_VL_176 pass
8756 22:26:20.740194 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8757 22:26:20.744000 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8758 22:26:20.744131 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8759 22:26:20.744489 arm64_sve-ptrace_Set_SVE_VL_192 pass
8760 22:26:20.744596 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8761 22:26:20.744703 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8762 22:26:20.744792 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8763 22:26:20.744892 arm64_sve-ptrace_Set_SVE_VL_208 pass
8764 22:26:20.744993 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8765 22:26:20.745289 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8766 22:26:20.745407 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8767 22:26:20.745511 arm64_sve-ptrace_Set_SVE_VL_224 pass
8768 22:26:20.745610 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8769 22:26:20.745943 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8770 22:26:20.746063 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8771 22:26:20.746168 arm64_sve-ptrace_Set_SVE_VL_240 pass
8772 22:26:20.746365 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8773 22:26:20.746738 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8774 22:26:20.747462 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8775 22:26:20.747590 arm64_sve-ptrace_Set_SVE_VL_256 pass
8776 22:26:20.747682 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8777 22:26:20.747769 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8778 22:26:20.747857 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8779 22:26:20.747942 arm64_sve-ptrace_Set_SVE_VL_272 pass
8780 22:26:20.748026 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8781 22:26:20.748130 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8782 22:26:20.751938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8783 22:26:20.752467 arm64_sve-ptrace_Set_SVE_VL_288 pass
8784 22:26:20.752671 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8785 22:26:20.752845 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8786 22:26:20.753012 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8787 22:26:20.753178 arm64_sve-ptrace_Set_SVE_VL_304 pass
8788 22:26:20.754042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8789 22:26:20.754275 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8790 22:26:20.754476 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8791 22:26:20.754671 arm64_sve-ptrace_Set_SVE_VL_320 pass
8792 22:26:20.754818 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8793 22:26:20.754939 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8794 22:26:20.755054 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8795 22:26:20.755169 arm64_sve-ptrace_Set_SVE_VL_336 pass
8796 22:26:20.755259 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8797 22:26:20.755346 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8798 22:26:20.755434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8799 22:26:20.755521 arm64_sve-ptrace_Set_SVE_VL_352 pass
8800 22:26:20.756066 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8801 22:26:20.756200 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8802 22:26:20.756339 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8803 22:26:20.756452 arm64_sve-ptrace_Set_SVE_VL_368 pass
8804 22:26:20.756562 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8805 22:26:20.756672 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8806 22:26:20.756781 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8807 22:26:20.756888 arm64_sve-ptrace_Set_SVE_VL_384 pass
8808 22:26:20.756997 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8809 22:26:20.757105 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8810 22:26:20.757215 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8811 22:26:20.757326 arm64_sve-ptrace_Set_SVE_VL_400 pass
8812 22:26:20.757434 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8813 22:26:20.759885 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8814 22:26:20.760211 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8815 22:26:20.760329 arm64_sve-ptrace_Set_SVE_VL_416 pass
8816 22:26:20.760431 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8817 22:26:20.760721 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8818 22:26:20.760820 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8819 22:26:20.760932 arm64_sve-ptrace_Set_SVE_VL_432 pass
8820 22:26:20.761027 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8821 22:26:20.761136 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8822 22:26:20.761229 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8823 22:26:20.761316 arm64_sve-ptrace_Set_SVE_VL_448 pass
8824 22:26:20.761404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8825 22:26:20.761485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8826 22:26:20.773243 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8827 22:26:20.773465 arm64_sve-ptrace_Set_SVE_VL_464 pass
8828 22:26:20.773759 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8829 22:26:20.773861 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8830 22:26:20.773938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8831 22:26:20.774012 arm64_sve-ptrace_Set_SVE_VL_480 pass
8832 22:26:20.774100 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8833 22:26:20.774181 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8834 22:26:20.774266 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8835 22:26:20.774355 arm64_sve-ptrace_Set_SVE_VL_496 pass
8836 22:26:20.774429 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8837 22:26:20.774687 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8838 22:26:20.774780 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8839 22:26:20.774855 arm64_sve-ptrace_Set_SVE_VL_512 pass
8840 22:26:20.774940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8841 22:26:20.775014 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8842 22:26:20.775099 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8843 22:26:20.775175 arm64_sve-ptrace_Set_SVE_VL_528 pass
8844 22:26:20.775265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8845 22:26:20.775339 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8846 22:26:20.775423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8847 22:26:20.775705 arm64_sve-ptrace_Set_SVE_VL_544 pass
8848 22:26:20.780012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8849 22:26:20.780360 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8850 22:26:20.780470 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8851 22:26:20.780559 arm64_sve-ptrace_Set_SVE_VL_560 pass
8852 22:26:20.780663 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8853 22:26:20.780753 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8854 22:26:20.780823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8855 22:26:20.780899 arm64_sve-ptrace_Set_SVE_VL_576 pass
8856 22:26:20.780963 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8857 22:26:20.781038 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8858 22:26:20.781106 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8859 22:26:20.781219 arm64_sve-ptrace_Set_SVE_VL_592 pass
8860 22:26:20.781345 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
8861 22:26:20.781473 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
8862 22:26:20.781767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
8863 22:26:20.781866 arm64_sve-ptrace_Set_SVE_VL_608 pass
8864 22:26:20.781984 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
8865 22:26:20.782094 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
8866 22:26:20.782217 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
8867 22:26:20.782348 arm64_sve-ptrace_Set_SVE_VL_624 pass
8868 22:26:20.782454 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
8869 22:26:20.782584 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
8870 22:26:20.782691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
8871 22:26:20.782810 arm64_sve-ptrace_Set_SVE_VL_640 pass
8872 22:26:20.782936 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
8873 22:26:20.783046 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
8874 22:26:20.783171 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
8875 22:26:20.783286 arm64_sve-ptrace_Set_SVE_VL_656 pass
8876 22:26:20.783417 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
8877 22:26:20.783532 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
8878 22:26:20.783663 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
8879 22:26:20.787897 arm64_sve-ptrace_Set_SVE_VL_672 pass
8880 22:26:20.788256 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
8881 22:26:20.788366 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
8882 22:26:20.788471 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
8883 22:26:20.788560 arm64_sve-ptrace_Set_SVE_VL_688 pass
8884 22:26:20.788645 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
8885 22:26:20.788748 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
8886 22:26:20.788836 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
8887 22:26:20.788937 arm64_sve-ptrace_Set_SVE_VL_704 pass
8888 22:26:20.789038 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
8889 22:26:20.789137 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
8890 22:26:20.789464 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
8891 22:26:20.789570 arm64_sve-ptrace_Set_SVE_VL_720 pass
8892 22:26:20.789684 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
8893 22:26:20.789774 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
8894 22:26:20.789876 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
8895 22:26:20.789979 arm64_sve-ptrace_Set_SVE_VL_736 pass
8896 22:26:20.790084 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
8897 22:26:20.790187 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
8898 22:26:20.790496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
8899 22:26:20.790603 arm64_sve-ptrace_Set_SVE_VL_752 pass
8900 22:26:20.790705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
8901 22:26:20.790790 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
8902 22:26:20.790897 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
8903 22:26:20.791190 arm64_sve-ptrace_Set_SVE_VL_768 pass
8904 22:26:20.791301 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
8905 22:26:20.791403 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
8906 22:26:20.791502 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
8907 22:26:20.795999 arm64_sve-ptrace_Set_SVE_VL_784 pass
8908 22:26:20.796347 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
8909 22:26:20.796454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
8910 22:26:20.796543 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
8911 22:26:20.796629 arm64_sve-ptrace_Set_SVE_VL_800 pass
8912 22:26:20.796922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
8913 22:26:20.797028 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
8914 22:26:20.797132 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
8915 22:26:20.797222 arm64_sve-ptrace_Set_SVE_VL_816 pass
8916 22:26:20.797323 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
8917 22:26:20.797414 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
8918 22:26:20.797704 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
8919 22:26:20.797805 arm64_sve-ptrace_Set_SVE_VL_832 pass
8920 22:26:20.797920 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
8921 22:26:20.798237 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
8922 22:26:20.798342 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
8923 22:26:20.798427 arm64_sve-ptrace_Set_SVE_VL_848 pass
8924 22:26:20.798528 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
8925 22:26:20.798619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
8926 22:26:20.798722 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
8927 22:26:20.798793 arm64_sve-ptrace_Set_SVE_VL_864 pass
8928 22:26:20.799126 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
8929 22:26:20.799236 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
8930 22:26:20.799324 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
8931 22:26:20.799607 arm64_sve-ptrace_Set_SVE_VL_880 pass
8932 22:26:20.799717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
8933 22:26:20.799820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
8934 22:26:20.799911 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
8935 22:26:20.803951 arm64_sve-ptrace_Set_SVE_VL_896 pass
8936 22:26:20.804313 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
8937 22:26:20.804419 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
8938 22:26:20.804507 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
8939 22:26:20.804609 arm64_sve-ptrace_Set_SVE_VL_912 pass
8940 22:26:20.804697 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
8941 22:26:20.804783 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
8942 22:26:20.804884 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
8943 22:26:20.804970 arm64_sve-ptrace_Set_SVE_VL_928 pass
8944 22:26:20.805070 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
8945 22:26:20.805177 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
8946 22:26:20.805281 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
8947 22:26:20.805380 arm64_sve-ptrace_Set_SVE_VL_944 pass
8948 22:26:20.805680 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
8949 22:26:20.805786 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
8950 22:26:20.805876 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
8951 22:26:20.805980 arm64_sve-ptrace_Set_SVE_VL_960 pass
8952 22:26:20.806069 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
8953 22:26:20.806153 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
8954 22:26:20.806239 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
8955 22:26:20.806329 arm64_sve-ptrace_Set_SVE_VL_976 pass
8956 22:26:20.806412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
8957 22:26:20.806511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
8958 22:26:20.806597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
8959 22:26:20.806696 arm64_sve-ptrace_Set_SVE_VL_992 pass
8960 22:26:20.806797 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
8961 22:26:20.806899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
8962 22:26:20.807203 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
8963 22:26:20.807320 arm64_sve-ptrace_Set_SVE_VL_1008 pass
8964 22:26:20.807429 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
8965 22:26:20.807519 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
8966 22:26:20.811884 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
8967 22:26:20.812076 arm64_sve-ptrace_Set_SVE_VL_1024 pass
8968 22:26:20.812368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
8969 22:26:20.812462 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
8970 22:26:20.812549 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
8971 22:26:20.812633 arm64_sve-ptrace_Set_SVE_VL_1040 pass
8972 22:26:20.812735 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
8973 22:26:20.812837 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
8974 22:26:20.812941 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
8975 22:26:20.813042 arm64_sve-ptrace_Set_SVE_VL_1056 pass
8976 22:26:20.813330 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
8977 22:26:20.813423 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
8978 22:26:20.813523 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
8979 22:26:20.813624 arm64_sve-ptrace_Set_SVE_VL_1072 pass
8980 22:26:20.813919 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
8981 22:26:20.814025 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
8982 22:26:20.814114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
8983 22:26:20.814214 arm64_sve-ptrace_Set_SVE_VL_1088 pass
8984 22:26:20.814620 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
8985 22:26:20.814846 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
8986 22:26:20.814934 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
8987 22:26:20.815033 arm64_sve-ptrace_Set_SVE_VL_1104 pass
8988 22:26:20.833724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
8989 22:26:20.834336 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
8990 22:26:20.834565 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
8991 22:26:20.834853 arm64_sve-ptrace_Set_SVE_VL_1120 pass
8992 22:26:20.835071 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
8993 22:26:20.835266 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
8994 22:26:20.835722 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
8995 22:26:20.835908 arm64_sve-ptrace_Set_SVE_VL_1136 pass
8996 22:26:20.836099 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
8997 22:26:20.836326 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
8998 22:26:20.836543 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
8999 22:26:20.836751 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9000 22:26:20.836932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9001 22:26:20.837101 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9002 22:26:20.837257 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9003 22:26:20.837430 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9004 22:26:20.837594 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9005 22:26:20.837825 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9006 22:26:20.837995 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9007 22:26:20.838193 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9008 22:26:20.838377 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9009 22:26:20.838546 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9010 22:26:20.838714 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9011 22:26:20.838879 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9012 22:26:20.839079 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9013 22:26:20.839257 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9014 22:26:20.839423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9015 22:26:20.839571 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9016 22:26:20.839707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9017 22:26:20.839826 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9018 22:26:20.839942 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9019 22:26:20.840057 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9020 22:26:20.840172 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9021 22:26:20.840286 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9022 22:26:20.840433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9023 22:26:20.840556 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9024 22:26:20.840674 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9025 22:26:20.840789 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9026 22:26:20.840905 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9027 22:26:20.841020 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9028 22:26:20.841135 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9029 22:26:20.841252 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9030 22:26:20.841366 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9031 22:26:20.841751 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9032 22:26:20.841972 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9033 22:26:20.842163 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9034 22:26:20.842352 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9035 22:26:20.842537 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9036 22:26:20.842721 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9037 22:26:20.844207 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9038 22:26:20.844438 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9039 22:26:20.844651 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9040 22:26:20.844824 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9041 22:26:20.845250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9042 22:26:20.845483 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9043 22:26:20.845688 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9044 22:26:20.845862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9045 22:26:20.846027 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9046 22:26:20.846189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9047 22:26:20.846364 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9048 22:26:20.846578 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9049 22:26:20.846773 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9050 22:26:20.847008 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9051 22:26:20.847220 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9052 22:26:20.847402 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9053 22:26:20.847603 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9054 22:26:20.847786 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9055 22:26:20.847917 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9056 22:26:20.848034 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9057 22:26:20.848150 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9058 22:26:20.848296 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9059 22:26:20.848419 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9060 22:26:20.848535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9061 22:26:20.848650 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9062 22:26:20.848765 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9063 22:26:20.848879 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9064 22:26:20.848994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9065 22:26:20.849117 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9066 22:26:20.852067 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9067 22:26:20.852371 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9068 22:26:20.853182 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9069 22:26:20.853282 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9070 22:26:20.853362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9071 22:26:20.853439 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9072 22:26:20.853532 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9073 22:26:20.853613 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9074 22:26:20.853705 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9075 22:26:20.853807 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9076 22:26:20.853894 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9077 22:26:20.853977 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9078 22:26:20.854065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9079 22:26:20.854176 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9080 22:26:20.854319 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9081 22:26:20.854434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9082 22:26:20.854539 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9083 22:26:20.854652 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9084 22:26:20.854767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9085 22:26:20.854899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9086 22:26:20.855011 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9087 22:26:20.855153 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9088 22:26:20.855255 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9089 22:26:20.855385 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9090 22:26:20.855560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9091 22:26:20.855695 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9092 22:26:20.855828 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9093 22:26:20.855936 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9094 22:26:20.856058 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9095 22:26:20.856213 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9096 22:26:20.856321 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9097 22:26:20.856455 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9098 22:26:20.856551 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9099 22:26:20.856652 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9100 22:26:20.856752 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9101 22:26:20.856851 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9102 22:26:20.856959 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9103 22:26:20.857062 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9104 22:26:20.857162 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9105 22:26:20.857846 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9106 22:26:20.857949 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9107 22:26:20.858033 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9108 22:26:20.858118 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9109 22:26:20.858223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9110 22:26:20.858309 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9111 22:26:20.858410 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9112 22:26:20.858495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9113 22:26:20.858596 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9114 22:26:20.858896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9115 22:26:20.859216 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9116 22:26:20.867869 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9117 22:26:20.868295 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9118 22:26:20.868394 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9119 22:26:20.868473 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9120 22:26:20.868560 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9121 22:26:20.868637 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9122 22:26:20.868709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9123 22:26:20.868779 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9124 22:26:20.868862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9125 22:26:20.868947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9126 22:26:20.869031 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9127 22:26:20.869116 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9128 22:26:20.869201 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9129 22:26:20.869286 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9130 22:26:20.869370 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9131 22:26:20.869666 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9132 22:26:20.869773 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9133 22:26:20.869848 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9134 22:26:20.869931 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9135 22:26:20.870014 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9136 22:26:20.870309 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9137 22:26:20.870403 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9138 22:26:20.870504 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9139 22:26:20.870593 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9140 22:26:20.870691 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9141 22:26:20.870777 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9142 22:26:20.870879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9143 22:26:20.870984 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9144 22:26:20.871092 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9145 22:26:20.871372 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9146 22:26:20.871485 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9147 22:26:20.871586 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9148 22:26:20.890613 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9149 22:26:20.890760 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9150 22:26:20.891068 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9151 22:26:20.891177 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9152 22:26:20.891269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9153 22:26:20.891372 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9154 22:26:20.891665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9155 22:26:20.891770 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9156 22:26:20.891861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9157 22:26:20.891964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9158 22:26:20.892053 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9159 22:26:20.892153 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9160 22:26:20.892254 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9161 22:26:20.892354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9162 22:26:20.892653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9163 22:26:20.892776 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9164 22:26:20.892880 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9165 22:26:20.893168 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9166 22:26:20.893287 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9167 22:26:20.893389 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9168 22:26:20.893488 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9169 22:26:20.893588 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9170 22:26:20.893896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9171 22:26:20.894019 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9172 22:26:20.894125 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9173 22:26:20.894224 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9174 22:26:20.894513 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9175 22:26:20.894608 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9176 22:26:20.894698 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9177 22:26:20.894833 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9178 22:26:20.895109 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9179 22:26:20.895207 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9180 22:26:20.895297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9181 22:26:20.895595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9182 22:26:20.899850 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9183 22:26:20.900215 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9184 22:26:20.900325 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9185 22:26:20.900437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9186 22:26:20.900573 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9187 22:26:20.900669 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9188 22:26:20.900772 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9189 22:26:20.900860 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9190 22:26:20.900964 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9191 22:26:20.901065 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9192 22:26:20.901166 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9193 22:26:20.901271 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9194 22:26:20.901377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9195 22:26:20.901482 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9196 22:26:20.901590 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9197 22:26:20.901895 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9198 22:26:20.902003 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9199 22:26:20.902127 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9200 22:26:20.902230 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9201 22:26:20.902497 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9202 22:26:20.902602 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9203 22:26:20.902687 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9204 22:26:20.902977 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9205 22:26:20.903084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9206 22:26:20.903193 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9207 22:26:20.903268 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9208 22:26:20.903358 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9209 22:26:20.903671 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9210 22:26:20.907968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9211 22:26:20.908380 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9212 22:26:20.908478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9213 22:26:20.908565 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9214 22:26:20.908654 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9215 22:26:20.908754 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9216 22:26:20.908842 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9217 22:26:20.908943 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9218 22:26:20.909046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9219 22:26:20.909148 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9220 22:26:20.909441 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9221 22:26:20.909534 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9222 22:26:20.909636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9223 22:26:20.909750 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9224 22:26:20.910050 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9225 22:26:20.910155 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9226 22:26:20.910258 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9227 22:26:20.910345 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9228 22:26:20.910444 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9229 22:26:20.910743 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9230 22:26:20.910862 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9231 22:26:20.910951 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9232 22:26:20.911050 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9233 22:26:20.911344 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9234 22:26:20.911437 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9235 22:26:20.911540 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9236 22:26:20.911641 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9237 22:26:20.915842 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9238 22:26:20.916214 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9239 22:26:20.916318 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9240 22:26:20.916405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9241 22:26:20.916504 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9242 22:26:20.916590 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9243 22:26:20.916690 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9244 22:26:20.916775 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9245 22:26:20.916873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9246 22:26:20.917131 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9247 22:26:20.917251 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9248 22:26:20.917353 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9249 22:26:20.917659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9250 22:26:20.917764 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9251 22:26:20.917867 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9252 22:26:20.917967 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9253 22:26:20.918268 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9254 22:26:20.918372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9255 22:26:20.918461 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9256 22:26:20.918563 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9257 22:26:20.918669 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9258 22:26:20.918772 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9259 22:26:20.918874 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9260 22:26:20.919150 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9261 22:26:20.919242 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9262 22:26:20.919342 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9263 22:26:20.919639 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9264 22:26:20.919758 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9265 22:26:20.923958 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9266 22:26:20.924310 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9267 22:26:20.924394 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9268 22:26:20.924474 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9269 22:26:20.924576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9270 22:26:20.924665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9271 22:26:20.924755 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9272 22:26:20.924858 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9273 22:26:20.924983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9274 22:26:20.925308 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9275 22:26:20.925963 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9276 22:26:20.926082 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9277 22:26:20.926187 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9278 22:26:20.926292 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9279 22:26:20.926401 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9280 22:26:20.926526 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9281 22:26:20.926638 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9282 22:26:20.926751 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9283 22:26:20.926863 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9284 22:26:20.926994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9285 22:26:20.927108 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9286 22:26:20.927222 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9287 22:26:20.927343 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9288 22:26:20.927440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9289 22:26:20.927566 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9290 22:26:20.927670 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9291 22:26:20.927773 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9292 22:26:20.931996 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9293 22:26:20.932402 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9294 22:26:20.932509 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9295 22:26:20.932618 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9296 22:26:20.932707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9297 22:26:20.932807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9298 22:26:20.932896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9299 22:26:20.932982 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9300 22:26:20.933083 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9301 22:26:20.933392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9302 22:26:20.933497 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9303 22:26:20.933625 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9304 22:26:20.933938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9305 22:26:20.934047 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9306 22:26:20.934149 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9307 22:26:20.934243 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9308 22:26:20.952933 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9309 22:26:20.953362 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9310 22:26:20.953459 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9311 22:26:20.953535 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9312 22:26:20.953622 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9313 22:26:20.953707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9314 22:26:20.953780 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9315 22:26:20.953865 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9316 22:26:20.953939 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9317 22:26:20.954021 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9318 22:26:20.954319 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9319 22:26:20.954418 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9320 22:26:20.954544 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9321 22:26:20.954649 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9322 22:26:20.954758 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9323 22:26:20.954858 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9324 22:26:20.954949 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9325 22:26:20.955041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9326 22:26:20.955134 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9327 22:26:20.955412 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9328 22:26:20.955524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9329 22:26:20.955632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9330 22:26:20.955895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9331 22:26:20.955983 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9332 22:26:20.959743 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9333 22:26:20.960041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9334 22:26:20.960217 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9335 22:26:20.960442 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9336 22:26:20.960588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9337 22:26:20.960694 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9338 22:26:20.960794 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9339 22:26:20.960879 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9340 22:26:20.960979 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9341 22:26:20.961079 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9342 22:26:20.961185 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9343 22:26:20.961494 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9344 22:26:20.961612 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9345 22:26:20.961738 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9346 22:26:20.961832 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9347 22:26:20.961930 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9348 22:26:20.962033 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9349 22:26:20.962133 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9350 22:26:20.962444 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9351 22:26:20.962547 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9352 22:26:20.962666 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9353 22:26:20.962983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9354 22:26:20.963083 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9355 22:26:20.963167 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9356 22:26:20.963272 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9357 22:26:20.963368 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9358 22:26:20.963490 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9359 22:26:20.963584 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9360 22:26:20.963689 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9361 22:26:20.963994 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9362 22:26:20.964119 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9363 22:26:20.964193 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9364 22:26:20.967810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9365 22:26:20.968362 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9366 22:26:20.968567 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9367 22:26:20.968754 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9368 22:26:20.968923 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9369 22:26:20.969117 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9370 22:26:20.969292 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9371 22:26:20.969480 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9372 22:26:20.969696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9373 22:26:20.969875 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9374 22:26:20.970083 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9375 22:26:20.970256 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9376 22:26:20.970428 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9377 22:26:20.970597 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9378 22:26:20.970767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9379 22:26:20.970935 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9380 22:26:20.971104 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9381 22:26:20.971311 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9382 22:26:20.971490 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9383 22:26:20.971703 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9384 22:26:20.971839 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9385 22:26:20.971954 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9386 22:26:20.972067 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9387 22:26:20.972180 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9388 22:26:20.972294 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9389 22:26:20.972407 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9390 22:26:20.972547 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9391 22:26:20.972669 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9392 22:26:20.976061 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9393 22:26:20.976547 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9394 22:26:20.976773 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9395 22:26:20.976954 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9396 22:26:20.977160 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9397 22:26:20.977339 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9398 22:26:20.977527 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9399 22:26:20.977774 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9400 22:26:20.978027 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9401 22:26:20.978213 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9402 22:26:20.978375 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9403 22:26:20.978538 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9404 22:26:20.978707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9405 22:26:20.978948 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9406 22:26:20.979133 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9407 22:26:20.979304 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9408 22:26:20.979484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9409 22:26:20.979652 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9410 22:26:20.979823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9411 22:26:20.979995 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9412 22:26:20.980166 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9413 22:26:20.980372 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9414 22:26:20.980543 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9415 22:26:20.980723 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9416 22:26:20.980921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9417 22:26:20.981127 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9418 22:26:20.981347 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9419 22:26:20.981560 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9420 22:26:20.981807 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9421 22:26:20.981995 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9422 22:26:20.982212 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9423 22:26:20.982396 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9424 22:26:20.982569 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9425 22:26:20.982768 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9426 22:26:20.982977 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9427 22:26:20.983187 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9428 22:26:20.983398 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9429 22:26:20.983580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9430 22:26:20.983750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9431 22:26:20.984133 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9432 22:26:20.984240 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9433 22:26:20.984335 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9434 22:26:20.984428 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9435 22:26:20.984520 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9436 22:26:20.984611 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9437 22:26:20.984703 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9438 22:26:20.984796 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9439 22:26:20.984889 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9440 22:26:20.984982 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9441 22:26:20.985076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9442 22:26:20.985169 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9443 22:26:20.985263 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9444 22:26:20.985355 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9445 22:26:20.985447 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9446 22:26:20.985539 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9447 22:26:20.985634 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9448 22:26:20.991804 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9449 22:26:20.992291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9450 22:26:20.992496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9451 22:26:20.992673 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9452 22:26:20.992848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9453 22:26:20.993064 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9454 22:26:20.993276 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9455 22:26:20.993466 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9456 22:26:20.993694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9457 22:26:20.993923 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9458 22:26:20.994149 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9459 22:26:20.994377 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9460 22:26:20.994530 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9461 22:26:20.994657 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9462 22:26:20.994775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9463 22:26:20.994985 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9464 22:26:20.995119 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9465 22:26:20.995239 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9466 22:26:20.995358 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9467 22:26:20.995476 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9468 22:26:21.008918 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9469 22:26:21.009328 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9470 22:26:21.009459 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9471 22:26:21.009560 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9472 22:26:21.009676 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9473 22:26:21.009771 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9474 22:26:21.009878 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9475 22:26:21.009985 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9476 22:26:21.010088 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9477 22:26:21.010441 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9478 22:26:21.010774 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9479 22:26:21.010885 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9480 22:26:21.010980 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9481 22:26:21.011086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9482 22:26:21.011192 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9483 22:26:21.011282 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9484 22:26:21.011389 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9485 22:26:21.011496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9486 22:26:21.015779 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9487 22:26:21.016110 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9488 22:26:21.016226 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9489 22:26:21.016331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9490 22:26:21.016436 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9491 22:26:21.016538 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9492 22:26:21.016843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9493 22:26:21.016962 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9494 22:26:21.017268 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9495 22:26:21.017375 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9496 22:26:21.017679 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9497 22:26:21.017802 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9498 22:26:21.017895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9499 22:26:21.017999 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9500 22:26:21.018104 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9501 22:26:21.018208 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9502 22:26:21.018312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9503 22:26:21.021715 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9504 22:26:21.021855 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9505 22:26:21.021951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9506 22:26:21.022042 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9507 22:26:21.022133 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9508 22:26:21.022224 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9509 22:26:21.022314 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9510 22:26:21.022402 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9511 22:26:21.022494 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9512 22:26:21.023955 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9513 22:26:21.024422 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9514 22:26:21.024630 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9515 22:26:21.024874 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9516 22:26:21.025090 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9517 22:26:21.025279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9518 22:26:21.025488 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9519 22:26:21.025716 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9520 22:26:21.025984 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9521 22:26:21.026211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9522 22:26:21.026454 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9523 22:26:21.026676 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9524 22:26:21.026928 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9525 22:26:21.027151 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9526 22:26:21.027392 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9527 22:26:21.027614 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9528 22:26:21.027761 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9529 22:26:21.027881 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9530 22:26:21.027994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9531 22:26:21.028106 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9532 22:26:21.028221 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9533 22:26:21.028365 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9534 22:26:21.028487 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9535 22:26:21.028602 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9536 22:26:21.028715 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9537 22:26:21.028873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9538 22:26:21.029006 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9539 22:26:21.032140 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9540 22:26:21.032654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9541 22:26:21.032755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9542 22:26:21.032840 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9543 22:26:21.032922 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9544 22:26:21.033225 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9545 22:26:21.033339 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9546 22:26:21.033447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9547 22:26:21.033555 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9548 22:26:21.033697 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9549 22:26:21.033807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9550 22:26:21.033928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9551 22:26:21.034056 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9552 22:26:21.034169 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9553 22:26:21.034341 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9554 22:26:21.034503 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9555 22:26:21.034641 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9556 22:26:21.034765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9557 22:26:21.034855 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9558 22:26:21.034950 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9559 22:26:21.035513 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9560 22:26:21.035618 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9561 22:26:21.035704 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9562 22:26:21.035805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9563 22:26:21.040781 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9564 22:26:21.041074 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9565 22:26:21.041172 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9566 22:26:21.041264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9567 22:26:21.041351 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9568 22:26:21.041439 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9569 22:26:21.041780 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9570 22:26:21.041896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9571 22:26:21.041999 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9572 22:26:21.042103 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9573 22:26:21.042198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9574 22:26:21.042282 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9575 22:26:21.042499 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9576 22:26:21.042591 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9577 22:26:21.042723 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9578 22:26:21.042830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9579 22:26:21.042938 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9580 22:26:21.043028 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9581 22:26:21.043111 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9582 22:26:21.043189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9583 22:26:21.043269 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9584 22:26:21.043368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9585 22:26:21.045777 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9586 22:26:21.045928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9587 22:26:21.046008 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9588 22:26:21.046084 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9589 22:26:21.046161 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9590 22:26:21.046236 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9591 22:26:21.047981 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9592 22:26:21.048531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9593 22:26:21.048648 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9594 22:26:21.048747 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9595 22:26:21.048865 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9596 22:26:21.049184 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9597 22:26:21.049298 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9598 22:26:21.049395 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9599 22:26:21.049486 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9600 22:26:21.049579 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9601 22:26:21.049697 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9602 22:26:21.049793 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9603 22:26:21.049882 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9604 22:26:21.049973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9605 22:26:21.050081 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9606 22:26:21.050175 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9607 22:26:21.050266 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9608 22:26:21.050368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9609 22:26:21.050452 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9610 22:26:21.050534 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9611 22:26:21.050630 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9612 22:26:21.050706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9613 22:26:21.050809 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9614 22:26:21.050915 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9615 22:26:21.051022 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9616 22:26:21.051129 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9617 22:26:21.051458 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9618 22:26:21.051582 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9619 22:26:21.051673 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9620 22:26:21.055875 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9621 22:26:21.056225 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9622 22:26:21.056334 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9623 22:26:21.056426 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9624 22:26:21.056533 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9625 22:26:21.056627 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9626 22:26:21.056733 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9627 22:26:21.056825 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9628 22:26:21.069299 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9629 22:26:21.069528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9630 22:26:21.069940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9631 22:26:21.070187 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9632 22:26:21.070297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9633 22:26:21.070393 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9634 22:26:21.070510 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9635 22:26:21.070607 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9636 22:26:21.070701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9637 22:26:21.070795 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9638 22:26:21.071190 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9639 22:26:21.071301 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9640 22:26:21.071395 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9641 22:26:21.071484 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9642 22:26:21.071571 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9643 22:26:21.071657 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9644 22:26:21.071747 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9645 22:26:21.071839 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9646 22:26:21.071946 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9647 22:26:21.072037 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9648 22:26:21.072368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9649 22:26:21.072472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9650 22:26:21.072562 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9651 22:26:21.072665 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9652 22:26:21.072755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9653 22:26:21.073063 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9654 22:26:21.073157 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9655 22:26:21.073245 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9656 22:26:21.073347 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9657 22:26:21.073458 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9658 22:26:21.073557 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9659 22:26:21.073693 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9660 22:26:21.073800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9661 22:26:21.073909 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9662 22:26:21.074224 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9663 22:26:21.074327 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9664 22:26:21.074432 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9665 22:26:21.074536 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9666 22:26:21.074640 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9667 22:26:21.074939 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9668 22:26:21.075252 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9669 22:26:21.075356 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9670 22:26:21.075460 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9671 22:26:21.075577 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9672 22:26:21.075669 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9673 22:26:21.083832 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9674 22:26:21.084224 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9675 22:26:21.084345 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9676 22:26:21.084467 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9677 22:26:21.084593 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9678 22:26:21.084697 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9679 22:26:21.084827 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9680 22:26:21.084939 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9681 22:26:21.085070 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9682 22:26:21.085181 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9683 22:26:21.085314 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9684 22:26:21.085420 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9685 22:26:21.085550 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9686 22:26:21.085691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9687 22:26:21.085828 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9688 22:26:21.086180 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9689 22:26:21.086281 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9690 22:26:21.086384 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9691 22:26:21.086489 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9692 22:26:21.086594 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9693 22:26:21.086937 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9694 22:26:21.087049 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9695 22:26:21.087191 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9696 22:26:21.087329 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9697 22:26:21.087469 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9698 22:26:21.087611 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9699 22:26:21.087706 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9700 22:26:21.091792 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9701 22:26:21.092145 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9702 22:26:21.092265 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9703 22:26:21.092355 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9704 22:26:21.092454 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9705 22:26:21.092741 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9706 22:26:21.092868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9707 22:26:21.093073 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9708 22:26:21.093180 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9709 22:26:21.093282 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9710 22:26:21.093625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9711 22:26:21.093752 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9712 22:26:21.093856 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9713 22:26:21.093941 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9714 22:26:21.094272 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9715 22:26:21.094376 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9716 22:26:21.094478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9717 22:26:21.094562 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9718 22:26:21.094659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9719 22:26:21.094743 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9720 22:26:21.095038 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9721 22:26:21.095227 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9722 22:26:21.095335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9723 22:26:21.095649 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9724 22:26:21.095735 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9725 22:26:21.099735 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9726 22:26:21.100059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9727 22:26:21.100185 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9728 22:26:21.100304 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9729 22:26:21.100439 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9730 22:26:21.100563 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9731 22:26:21.100674 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9732 22:26:21.100778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9733 22:26:21.101089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9734 22:26:21.101262 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9735 22:26:21.101379 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9736 22:26:21.101485 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9737 22:26:21.101787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9738 22:26:21.101899 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9739 22:26:21.102005 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9740 22:26:21.102095 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9741 22:26:21.102197 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9742 22:26:21.102528 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9743 22:26:21.102636 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9744 22:26:21.102741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9745 22:26:21.103047 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9746 22:26:21.103153 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9747 22:26:21.103242 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9748 22:26:21.103384 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9749 22:26:21.103488 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9750 22:26:21.107750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9751 22:26:21.108082 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9752 22:26:21.108190 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9753 22:26:21.108498 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9754 22:26:21.108605 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9755 22:26:21.108696 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9756 22:26:21.109046 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9757 22:26:21.109160 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9758 22:26:21.109253 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9759 22:26:21.109355 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9760 22:26:21.109460 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9761 22:26:21.109565 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9762 22:26:21.109678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9763 22:26:21.109787 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9764 22:26:21.110114 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9765 22:26:21.110223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9766 22:26:21.110333 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9767 22:26:21.110439 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9768 22:26:21.110542 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9769 22:26:21.110841 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9770 22:26:21.110968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9771 22:26:21.111061 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9772 22:26:21.112167 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9773 22:26:21.112258 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9774 22:26:21.112344 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9775 22:26:21.112418 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9776 22:26:21.115780 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9777 22:26:21.116075 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9778 22:26:21.116190 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9779 22:26:21.116298 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9780 22:26:21.116392 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9781 22:26:21.116493 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9782 22:26:21.116580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9783 22:26:21.116680 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9784 22:26:21.116985 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9785 22:26:21.117086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9786 22:26:21.117218 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9787 22:26:21.117303 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9788 22:26:21.127038 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9789 22:26:21.127545 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9790 22:26:21.127653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9791 22:26:21.127748 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9792 22:26:21.127838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9793 22:26:21.128273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9794 22:26:21.128381 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9795 22:26:21.128488 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9796 22:26:21.128577 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9797 22:26:21.128665 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9798 22:26:21.128769 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9799 22:26:21.129128 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9800 22:26:21.129493 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9801 22:26:21.129606 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9802 22:26:21.129721 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9803 22:26:21.129811 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9804 22:26:21.129913 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9805 22:26:21.130001 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9806 22:26:21.130085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9807 22:26:21.130270 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9808 22:26:21.130388 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9809 22:26:21.130492 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9810 22:26:21.130850 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9811 22:26:21.131035 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9812 22:26:21.131160 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9813 22:26:21.131254 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9814 22:26:21.131358 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9815 22:26:21.131670 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9816 22:26:21.131773 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9817 22:26:21.131859 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9818 22:26:21.135963 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9819 22:26:21.136316 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9820 22:26:21.136423 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9821 22:26:21.136528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9822 22:26:21.136618 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9823 22:26:21.136714 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9824 22:26:21.136813 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9825 22:26:21.136913 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9826 22:26:21.137212 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9827 22:26:21.137319 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9828 22:26:21.137616 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9829 22:26:21.137769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9830 22:26:21.137876 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9831 22:26:21.137986 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9832 22:26:21.138089 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9833 22:26:21.138191 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9834 22:26:21.138490 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9835 22:26:21.138596 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9836 22:26:21.138918 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9837 22:26:21.139025 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9838 22:26:21.139131 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9839 22:26:21.139235 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9840 22:26:21.139325 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9841 22:26:21.139673 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9842 22:26:21.139779 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9843 22:26:21.139881 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9844 22:26:21.139971 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9845 22:26:21.143766 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9846 22:26:21.144085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9847 22:26:21.144190 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9848 22:26:21.144293 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9849 22:26:21.144396 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9850 22:26:21.144500 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9851 22:26:21.144602 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9852 22:26:21.144915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9853 22:26:21.145036 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9854 22:26:21.145142 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9855 22:26:21.145245 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9856 22:26:21.145542 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9857 22:26:21.145667 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9858 22:26:21.145790 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9859 22:26:21.145940 arm64_sve-ptrace_Set_SVE_VL_4592 pass
9860 22:26:21.146065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
9861 22:26:21.146364 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
9862 22:26:21.146489 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
9863 22:26:21.146614 arm64_sve-ptrace_Set_SVE_VL_4608 pass
9864 22:26:21.146724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
9865 22:26:21.147026 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
9866 22:26:21.147157 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
9867 22:26:21.147273 arm64_sve-ptrace_Set_SVE_VL_4624 pass
9868 22:26:21.147590 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
9869 22:26:21.151756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
9870 22:26:21.152065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
9871 22:26:21.152168 arm64_sve-ptrace_Set_SVE_VL_4640 pass
9872 22:26:21.152296 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
9873 22:26:21.152604 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
9874 22:26:21.152705 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
9875 22:26:21.152782 arm64_sve-ptrace_Set_SVE_VL_4656 pass
9876 22:26:21.153130 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
9877 22:26:21.153335 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
9878 22:26:21.153522 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
9879 22:26:21.153783 arm64_sve-ptrace_Set_SVE_VL_4672 pass
9880 22:26:21.154015 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
9881 22:26:21.154218 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
9882 22:26:21.154442 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
9883 22:26:21.154626 arm64_sve-ptrace_Set_SVE_VL_4688 pass
9884 22:26:21.154797 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
9885 22:26:21.154965 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
9886 22:26:21.155135 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
9887 22:26:21.155305 arm64_sve-ptrace_Set_SVE_VL_4704 pass
9888 22:26:21.155506 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
9889 22:26:21.155711 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
9890 22:26:21.155865 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
9891 22:26:21.155988 arm64_sve-ptrace_Set_SVE_VL_4720 pass
9892 22:26:21.156106 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
9893 22:26:21.156247 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
9894 22:26:21.156372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
9895 22:26:21.159921 arm64_sve-ptrace_Set_SVE_VL_4736 pass
9896 22:26:21.160041 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
9897 22:26:21.160341 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
9898 22:26:21.160443 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
9899 22:26:21.160560 arm64_sve-ptrace_Set_SVE_VL_4752 pass
9900 22:26:21.160654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
9901 22:26:21.160981 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
9902 22:26:21.161085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
9903 22:26:21.161203 arm64_sve-ptrace_Set_SVE_VL_4768 pass
9904 22:26:21.161296 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
9905 22:26:21.161398 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
9906 22:26:21.161507 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
9907 22:26:21.161793 arm64_sve-ptrace_Set_SVE_VL_4784 pass
9908 22:26:21.161915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
9909 22:26:21.162248 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
9910 22:26:21.162338 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
9911 22:26:21.162463 arm64_sve-ptrace_Set_SVE_VL_4800 pass
9912 22:26:21.162566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
9913 22:26:21.162665 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
9914 22:26:21.162960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
9915 22:26:21.163066 arm64_sve-ptrace_Set_SVE_VL_4816 pass
9916 22:26:21.163384 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
9917 22:26:21.163484 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
9918 22:26:21.163578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
9919 22:26:21.163848 arm64_sve-ptrace_Set_SVE_VL_4832 pass
9920 22:26:21.163929 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
9921 22:26:21.167760 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
9922 22:26:21.168108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
9923 22:26:21.168213 arm64_sve-ptrace_Set_SVE_VL_4848 pass
9924 22:26:21.168317 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
9925 22:26:21.168419 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
9926 22:26:21.168708 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
9927 22:26:21.168813 arm64_sve-ptrace_Set_SVE_VL_4864 pass
9928 22:26:21.168913 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
9929 22:26:21.169016 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
9930 22:26:21.169337 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
9931 22:26:21.169456 arm64_sve-ptrace_Set_SVE_VL_4880 pass
9932 22:26:21.169560 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
9933 22:26:21.169883 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
9934 22:26:21.170007 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
9935 22:26:21.170111 arm64_sve-ptrace_Set_SVE_VL_4896 pass
9936 22:26:21.170399 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
9937 22:26:21.170505 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
9938 22:26:21.170608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
9939 22:26:21.170709 arm64_sve-ptrace_Set_SVE_VL_4912 pass
9940 22:26:21.170809 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
9941 22:26:21.171106 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
9942 22:26:21.171233 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
9943 22:26:21.171336 arm64_sve-ptrace_Set_SVE_VL_4928 pass
9944 22:26:21.171638 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
9945 22:26:21.179809 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
9946 22:26:21.180168 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
9947 22:26:21.180250 arm64_sve-ptrace_Set_SVE_VL_4944 pass
9948 22:26:21.187000 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
9949 22:26:21.187182 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
9950 22:26:21.187496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
9951 22:26:21.187607 arm64_sve-ptrace_Set_SVE_VL_4960 pass
9952 22:26:21.187682 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
9953 22:26:21.187772 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
9954 22:26:21.188071 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
9955 22:26:21.188195 arm64_sve-ptrace_Set_SVE_VL_4976 pass
9956 22:26:21.188293 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
9957 22:26:21.188398 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
9958 22:26:21.188508 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
9959 22:26:21.188602 arm64_sve-ptrace_Set_SVE_VL_4992 pass
9960 22:26:21.188727 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
9961 22:26:21.188866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
9962 22:26:21.188994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
9963 22:26:21.189328 arm64_sve-ptrace_Set_SVE_VL_5008 pass
9964 22:26:21.189428 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
9965 22:26:21.189791 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
9966 22:26:21.189896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
9967 22:26:21.189986 arm64_sve-ptrace_Set_SVE_VL_5024 pass
9968 22:26:21.190715 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
9969 22:26:21.190816 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
9970 22:26:21.190896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
9971 22:26:21.190974 arm64_sve-ptrace_Set_SVE_VL_5040 pass
9972 22:26:21.191055 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
9973 22:26:21.191131 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
9974 22:26:21.191643 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
9975 22:26:21.191749 arm64_sve-ptrace_Set_SVE_VL_5056 pass
9976 22:26:21.191837 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
9977 22:26:21.191924 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
9978 22:26:21.192015 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
9979 22:26:21.192102 arm64_sve-ptrace_Set_SVE_VL_5072 pass
9980 22:26:21.192188 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
9981 22:26:21.195912 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
9982 22:26:21.196248 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
9983 22:26:21.196352 arm64_sve-ptrace_Set_SVE_VL_5088 pass
9984 22:26:21.196475 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
9985 22:26:21.196606 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
9986 22:26:21.196736 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
9987 22:26:21.196872 arm64_sve-ptrace_Set_SVE_VL_5104 pass
9988 22:26:21.197001 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
9989 22:26:21.197132 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
9990 22:26:21.197275 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
9991 22:26:21.197407 arm64_sve-ptrace_Set_SVE_VL_5120 pass
9992 22:26:21.197776 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
9993 22:26:21.197873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
9994 22:26:21.198166 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
9995 22:26:21.198269 arm64_sve-ptrace_Set_SVE_VL_5136 pass
9996 22:26:21.198377 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
9997 22:26:21.198478 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
9998 22:26:21.198578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
9999 22:26:21.198861 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10000 22:26:21.198966 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10001 22:26:21.199346 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10002 22:26:21.199450 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10003 22:26:21.199536 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10004 22:26:21.199635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10005 22:26:21.199716 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10006 22:26:21.203870 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10007 22:26:21.204205 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10008 22:26:21.204328 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10009 22:26:21.204424 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10010 22:26:21.204734 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10011 22:26:21.204838 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10012 22:26:21.204915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10013 22:26:21.205261 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10014 22:26:21.205382 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10015 22:26:21.205487 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10016 22:26:21.205588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10017 22:26:21.205693 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10018 22:26:21.205823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10019 22:26:21.205933 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10020 22:26:21.206040 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10021 22:26:21.206144 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10022 22:26:21.206261 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10023 22:26:21.206365 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10024 22:26:21.206472 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10025 22:26:21.206579 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10026 22:26:21.206671 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10027 22:26:21.206755 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10028 22:26:21.206859 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10029 22:26:21.206955 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10030 22:26:21.207055 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10031 22:26:21.207152 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10032 22:26:21.207478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10033 22:26:21.207633 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10034 22:26:21.211827 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10035 22:26:21.212155 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10036 22:26:21.212275 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10037 22:26:21.212364 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10038 22:26:21.212693 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10039 22:26:21.212796 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10040 22:26:21.212883 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10041 22:26:21.213188 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10042 22:26:21.213294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10043 22:26:21.213404 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10044 22:26:21.213521 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10045 22:26:21.213654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10046 22:26:21.213765 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10047 22:26:21.213860 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10048 22:26:21.213963 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10049 22:26:21.214050 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10050 22:26:21.214152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10051 22:26:21.214240 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10052 22:26:21.214530 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10053 22:26:21.214657 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10054 22:26:21.214778 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10055 22:26:21.214907 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10056 22:26:21.215002 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10057 22:26:21.215105 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10058 22:26:21.215203 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10059 22:26:21.215302 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10060 22:26:21.215404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10061 22:26:21.215707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10062 22:26:21.219724 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10063 22:26:21.220042 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10064 22:26:21.220146 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10065 22:26:21.220255 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10066 22:26:21.220609 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10067 22:26:21.220720 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10068 22:26:21.220830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10069 22:26:21.221020 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10070 22:26:21.221136 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10071 22:26:21.221226 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10072 22:26:21.221328 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10073 22:26:21.221433 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10074 22:26:21.221750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10075 22:26:21.222021 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10076 22:26:21.222232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10077 22:26:21.222416 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10078 22:26:21.222628 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10079 22:26:21.222808 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10080 22:26:21.223001 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10081 22:26:21.223175 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10082 22:26:21.223333 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10083 22:26:21.223469 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10084 22:26:21.223582 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10085 22:26:21.223671 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10086 22:26:21.223757 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10087 22:26:21.223859 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10088 22:26:21.223949 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10089 22:26:21.227956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10090 22:26:21.228301 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10091 22:26:21.228410 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10092 22:26:21.228524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10093 22:26:21.228634 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10094 22:26:21.228743 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10095 22:26:21.228849 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10096 22:26:21.229166 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10097 22:26:21.229279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10098 22:26:21.229591 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10099 22:26:21.229707 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10100 22:26:21.229851 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10101 22:26:21.229961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10102 22:26:21.230047 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10103 22:26:21.230137 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10104 22:26:21.230247 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10105 22:26:21.230352 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10106 22:26:21.230440 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10107 22:26:21.230524 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10108 22:26:21.246365 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10109 22:26:21.246728 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10110 22:26:21.246837 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10111 22:26:21.247099 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10112 22:26:21.247199 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10113 22:26:21.247288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10114 22:26:21.247385 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10115 22:26:21.247475 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10116 22:26:21.247797 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10117 22:26:21.247901 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10118 22:26:21.248032 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10119 22:26:21.248137 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10120 22:26:21.248252 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10121 22:26:21.248355 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10122 22:26:21.248465 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10123 22:26:21.248562 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10124 22:26:21.248673 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10125 22:26:21.248998 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10126 22:26:21.249111 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10127 22:26:21.249198 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10128 22:26:21.249492 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10129 22:26:21.249595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10130 22:26:21.249709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10131 22:26:21.249826 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10132 22:26:21.249957 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10133 22:26:21.250075 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10134 22:26:21.250195 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10135 22:26:21.250301 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10136 22:26:21.250608 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10137 22:26:21.250743 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10138 22:26:21.250891 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10139 22:26:21.250995 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10140 22:26:21.251105 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10141 22:26:21.251216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10142 22:26:21.251323 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10143 22:26:21.251424 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10144 22:26:21.255732 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10145 22:26:21.256015 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10146 22:26:21.256120 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10147 22:26:21.256223 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10148 22:26:21.256519 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10149 22:26:21.256624 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10150 22:26:21.256727 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10151 22:26:21.256828 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10152 22:26:21.257116 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10153 22:26:21.257232 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10154 22:26:21.257532 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10155 22:26:21.257642 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10156 22:26:21.257746 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10157 22:26:21.258120 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10158 22:26:21.258231 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10159 22:26:21.258321 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10160 22:26:21.258408 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10161 22:26:21.258715 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10162 22:26:21.258825 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10163 22:26:21.258917 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10164 22:26:21.259007 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10165 22:26:21.259112 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10166 22:26:21.259210 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10167 22:26:21.260119 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10168 22:26:21.260212 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10169 22:26:21.260279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10170 22:26:21.260351 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10171 22:26:21.264127 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10172 22:26:21.264310 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10173 22:26:21.265010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10174 22:26:21.265121 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10175 22:26:21.265221 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10176 22:26:21.265314 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10177 22:26:21.265406 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10178 22:26:21.265496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10179 22:26:21.265591 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10180 22:26:21.265714 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10181 22:26:21.265831 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10182 22:26:21.265931 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10183 22:26:21.266018 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10184 22:26:21.266212 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10185 22:26:21.266320 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10186 22:26:21.266405 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10187 22:26:21.266485 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10188 22:26:21.266573 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10189 22:26:21.266650 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10190 22:26:21.266716 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10191 22:26:21.266997 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10192 22:26:21.267089 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10193 22:26:21.267193 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10194 22:26:21.267285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10195 22:26:21.267380 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10196 22:26:21.267453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10197 22:26:21.267527 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10198 22:26:21.267602 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10199 22:26:21.267694 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10200 22:26:21.267767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10201 22:26:21.271859 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10202 22:26:21.272195 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10203 22:26:21.272307 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10204 22:26:21.272398 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10205 22:26:21.272507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10206 22:26:21.272611 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10207 22:26:21.272705 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10208 22:26:21.272804 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10209 22:26:21.272890 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10210 22:26:21.272990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10211 22:26:21.273077 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10212 22:26:21.273174 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10213 22:26:21.273283 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10214 22:26:21.273410 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10215 22:26:21.273518 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10216 22:26:21.273635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10217 22:26:21.273738 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10218 22:26:21.273840 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10219 22:26:21.274149 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10220 22:26:21.274242 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10221 22:26:21.274325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10222 22:26:21.274433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10223 22:26:21.274518 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10224 22:26:21.274617 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10225 22:26:21.274697 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10226 22:26:21.274772 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10227 22:26:21.274866 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10228 22:26:21.274966 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10229 22:26:21.275065 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10230 22:26:21.275377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10231 22:26:21.275478 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10232 22:26:21.275595 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10233 22:26:21.279755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10234 22:26:21.280053 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10235 22:26:21.280182 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10236 22:26:21.280285 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10237 22:26:21.280387 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10238 22:26:21.280492 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10239 22:26:21.280599 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10240 22:26:21.280712 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10241 22:26:21.281029 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10242 22:26:21.281128 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10243 22:26:21.281236 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10244 22:26:21.281344 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10245 22:26:21.281473 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10246 22:26:21.281805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10247 22:26:21.281898 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10248 22:26:21.281992 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10249 22:26:21.282092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10250 22:26:21.282190 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10251 22:26:21.282293 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10252 22:26:21.282395 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10253 22:26:21.282628 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10254 22:26:21.282749 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10255 22:26:21.282840 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10256 22:26:21.282927 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10257 22:26:21.283250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10258 22:26:21.283355 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10259 22:26:21.283461 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10260 22:26:21.283561 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10261 22:26:21.287701 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10262 22:26:21.288006 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10263 22:26:21.288113 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10264 22:26:21.288219 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10265 22:26:21.288347 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10266 22:26:21.288462 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10267 22:26:21.288562 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10268 22:26:21.304203 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10269 22:26:21.304408 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10270 22:26:21.304711 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10271 22:26:21.304819 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10272 22:26:21.304907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10273 22:26:21.304993 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10274 22:26:21.305077 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10275 22:26:21.305174 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10276 22:26:21.305274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10277 22:26:21.305360 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10278 22:26:21.305734 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10279 22:26:21.305948 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10280 22:26:21.306162 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10281 22:26:21.306612 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10282 22:26:21.306807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10283 22:26:21.306985 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10284 22:26:21.307159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10285 22:26:21.307343 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10286 22:26:21.307566 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10287 22:26:21.307783 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10288 22:26:21.307922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10289 22:26:21.308072 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10290 22:26:21.308195 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10291 22:26:21.308310 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10292 22:26:21.308426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10293 22:26:21.308541 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10294 22:26:21.308656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10295 22:26:21.308773 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10296 22:26:21.308886 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10297 22:26:21.309001 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10298 22:26:21.311849 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10299 22:26:21.312165 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10300 22:26:21.312300 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10301 22:26:21.312429 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10302 22:26:21.312784 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10303 22:26:21.312938 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10304 22:26:21.313070 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10305 22:26:21.313202 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10306 22:26:21.313400 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10307 22:26:21.313608 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10308 22:26:21.313826 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10309 22:26:21.314008 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10310 22:26:21.314230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10311 22:26:21.314447 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10312 22:26:21.314671 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10313 22:26:21.314886 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10314 22:26:21.315079 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10315 22:26:21.315289 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10316 22:26:21.315466 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10317 22:26:21.315654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10318 22:26:21.315821 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10319 22:26:21.315946 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10320 22:26:21.316062 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10321 22:26:21.316178 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10322 22:26:21.316324 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10323 22:26:21.316448 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10324 22:26:21.316567 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10325 22:26:21.316683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10326 22:26:21.319927 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10327 22:26:21.320159 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10328 22:26:21.320677 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10329 22:26:21.320878 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10330 22:26:21.321083 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10331 22:26:21.321319 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10332 22:26:21.321547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10333 22:26:21.321807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10334 22:26:21.322028 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10335 22:26:21.322241 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10336 22:26:21.322460 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10337 22:26:21.322662 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10338 22:26:21.322858 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10339 22:26:21.323029 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10340 22:26:21.323265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10341 22:26:21.323458 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10342 22:26:21.323656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10343 22:26:21.323842 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10344 22:26:21.324013 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10345 22:26:21.324186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10346 22:26:21.324340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10347 22:26:21.324468 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10348 22:26:21.324600 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10349 22:26:21.324732 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10350 22:26:21.324863 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10351 22:26:21.324993 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10352 22:26:21.325155 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10353 22:26:21.325299 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10354 22:26:21.327749 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10355 22:26:21.328176 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10356 22:26:21.328354 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10357 22:26:21.328478 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10358 22:26:21.328617 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10359 22:26:21.328738 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10360 22:26:21.329094 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10361 22:26:21.329253 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10362 22:26:21.329384 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10363 22:26:21.329507 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10364 22:26:21.329628 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10365 22:26:21.329808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10366 22:26:21.330022 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10367 22:26:21.330387 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10368 22:26:21.330699 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10369 22:26:21.330910 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10370 22:26:21.331094 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10371 22:26:21.331302 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10372 22:26:21.331723 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10373 22:26:21.331930 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10374 22:26:21.332124 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10375 22:26:21.332293 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10376 22:26:21.332396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10377 22:26:21.332485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10378 22:26:21.332573 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10379 22:26:21.332660 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10380 22:26:21.332747 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10381 22:26:21.332834 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10382 22:26:21.332920 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10383 22:26:21.333007 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10384 22:26:21.333094 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10385 22:26:21.333181 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10386 22:26:21.335865 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10387 22:26:21.336251 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10388 22:26:21.336444 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10389 22:26:21.336627 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10390 22:26:21.336869 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10391 22:26:21.337061 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10392 22:26:21.337241 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10393 22:26:21.337450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10394 22:26:21.337724 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10395 22:26:21.337926 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10396 22:26:21.338126 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10397 22:26:21.338344 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10398 22:26:21.338544 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10399 22:26:21.338758 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10400 22:26:21.338934 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10401 22:26:21.339105 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10402 22:26:21.339274 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10403 22:26:21.339489 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10404 22:26:21.339701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10405 22:26:21.339847 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10406 22:26:21.339964 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10407 22:26:21.340076 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10408 22:26:21.340218 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10409 22:26:21.340338 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10410 22:26:21.340453 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10411 22:26:21.340567 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10412 22:26:21.340681 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10413 22:26:21.340794 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10414 22:26:21.343936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10415 22:26:21.344060 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10416 22:26:21.344379 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10417 22:26:21.344497 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10418 22:26:21.344884 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10419 22:26:21.345094 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10420 22:26:21.345270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10421 22:26:21.345477 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10422 22:26:21.345671 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10423 22:26:21.345888 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10424 22:26:21.346055 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10425 22:26:21.346237 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10426 22:26:21.346441 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10427 22:26:21.346616 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10428 22:26:21.362034 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10429 22:26:21.362451 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10430 22:26:21.362673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10431 22:26:21.362814 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10432 22:26:21.362971 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10433 22:26:21.363108 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10434 22:26:21.363234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10435 22:26:21.363365 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10436 22:26:21.363513 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10437 22:26:21.363621 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10438 22:26:21.363714 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10439 22:26:21.363857 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10440 22:26:21.364317 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10441 22:26:21.364472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10442 22:26:21.364677 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10443 22:26:21.364848 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10444 22:26:21.364981 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10445 22:26:21.365103 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10446 22:26:21.365244 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10447 22:26:21.365373 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10448 22:26:21.365571 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10449 22:26:21.365763 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10450 22:26:21.365967 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10451 22:26:21.366137 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10452 22:26:21.366292 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10453 22:26:21.366477 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10454 22:26:21.366618 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10455 22:26:21.366740 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10456 22:26:21.366862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10457 22:26:21.367011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10458 22:26:21.367141 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10459 22:26:21.367264 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10460 22:26:21.367413 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10461 22:26:21.367537 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10462 22:26:21.367676 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10463 22:26:21.367777 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10464 22:26:21.371732 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10465 22:26:21.372040 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10466 22:26:21.372157 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10467 22:26:21.372256 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10468 22:26:21.372411 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10469 22:26:21.372578 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10470 22:26:21.372769 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10471 22:26:21.372939 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10472 22:26:21.373135 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10473 22:26:21.373291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10474 22:26:21.373426 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10475 22:26:21.373581 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10476 22:26:21.373727 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10477 22:26:21.373866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10478 22:26:21.374025 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10479 22:26:21.374159 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10480 22:26:21.374291 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10481 22:26:21.374442 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10482 22:26:21.374597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10483 22:26:21.374747 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10484 22:26:21.374907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10485 22:26:21.375041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10486 22:26:21.375170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10487 22:26:21.375352 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10488 22:26:21.375503 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10489 22:26:21.375631 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10490 22:26:21.375729 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10491 22:26:21.375838 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10492 22:26:21.379896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10493 22:26:21.380366 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10494 22:26:21.380528 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10495 22:26:21.380663 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10496 22:26:21.380818 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10497 22:26:21.380961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10498 22:26:21.381133 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10499 22:26:21.381346 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10500 22:26:21.381531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10501 22:26:21.381697 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10502 22:26:21.381923 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10503 22:26:21.382080 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10504 22:26:21.382240 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10505 22:26:21.382378 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10506 22:26:21.382511 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10507 22:26:21.382664 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10508 22:26:21.382799 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10509 22:26:21.382972 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10510 22:26:21.383146 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10511 22:26:21.383335 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10512 22:26:21.385739 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10513 22:26:21.385899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10514 22:26:21.386024 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10515 22:26:21.386180 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10516 22:26:21.386307 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10517 22:26:21.386429 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10518 22:26:21.387930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10519 22:26:21.388088 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10520 22:26:21.388464 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10521 22:26:21.388616 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10522 22:26:21.388741 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10523 22:26:21.388884 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10524 22:26:21.389007 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10525 22:26:21.389128 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10526 22:26:21.389268 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10527 22:26:21.389391 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10528 22:26:21.389533 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10529 22:26:21.389687 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10530 22:26:21.389832 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10531 22:26:21.389955 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10532 22:26:21.390095 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10533 22:26:21.390238 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10534 22:26:21.390379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10535 22:26:21.390521 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10536 22:26:21.390662 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10537 22:26:21.390802 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10538 22:26:21.391257 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10539 22:26:21.391419 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10540 22:26:21.391545 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10541 22:26:21.391689 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10542 22:26:21.391814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10543 22:26:21.391935 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10544 22:26:21.392074 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10545 22:26:21.392197 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10546 22:26:21.401981 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10547 22:26:21.402221 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10548 22:26:21.402313 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10549 22:26:21.402390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10550 22:26:21.402487 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10551 22:26:21.402582 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10552 22:26:21.403860 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10553 22:26:21.403955 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10554 22:26:21.404032 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10555 22:26:21.404105 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10556 22:26:21.404179 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10557 22:26:21.404253 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10558 22:26:21.404327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10559 22:26:21.404400 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10560 22:26:21.404478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10561 22:26:21.404772 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10562 22:26:21.404871 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10563 22:26:21.404952 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10564 22:26:21.405015 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10565 22:26:21.405093 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10566 22:26:21.405157 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10567 22:26:21.405217 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10568 22:26:21.405278 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10569 22:26:21.405337 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10570 22:26:21.405397 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10571 22:26:21.405457 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10572 22:26:21.405518 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10573 22:26:21.413828 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10574 22:26:21.414004 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10575 22:26:21.414068 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10576 22:26:21.414129 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10577 22:26:21.414189 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10578 22:26:21.414249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10579 22:26:21.414308 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10580 22:26:21.414368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10581 22:26:21.414426 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10582 22:26:21.414485 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10583 22:26:21.414543 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10584 22:26:21.414602 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10585 22:26:21.414660 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10586 22:26:21.414719 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10587 22:26:21.414778 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10588 22:26:21.421491 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10589 22:26:21.422076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10590 22:26:21.422297 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10591 22:26:21.422398 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10592 22:26:21.422832 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10593 22:26:21.423273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10594 22:26:21.423383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10595 22:26:21.423505 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10596 22:26:21.423628 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10597 22:26:21.423707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10598 22:26:21.423847 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10599 22:26:21.423999 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10600 22:26:21.424167 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10601 22:26:21.424474 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10602 22:26:21.424731 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10603 22:26:21.424946 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10604 22:26:21.425171 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10605 22:26:21.425464 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10606 22:26:21.425765 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10607 22:26:21.426022 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10608 22:26:21.426147 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10609 22:26:21.426269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10610 22:26:21.426378 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10611 22:26:21.426494 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10612 22:26:21.426606 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10613 22:26:21.426721 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10614 22:26:21.426837 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10615 22:26:21.426952 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10616 22:26:21.427079 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10617 22:26:21.427184 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10618 22:26:21.427296 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10619 22:26:21.427398 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10620 22:26:21.427490 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10621 22:26:21.427595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10622 22:26:21.427691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10623 22:26:21.427775 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10624 22:26:21.427856 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10625 22:26:21.427938 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10626 22:26:21.428018 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10627 22:26:21.428307 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10628 22:26:21.428396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10629 22:26:21.428483 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10630 22:26:21.428577 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10631 22:26:21.428665 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10632 22:26:21.432020 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10633 22:26:21.432452 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10634 22:26:21.432580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10635 22:26:21.432677 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10636 22:26:21.432784 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10637 22:26:21.433129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10638 22:26:21.433293 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10639 22:26:21.433451 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10640 22:26:21.433564 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10641 22:26:21.433711 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10642 22:26:21.433825 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10643 22:26:21.433925 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10644 22:26:21.434026 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10645 22:26:21.434154 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10646 22:26:21.434268 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10647 22:26:21.434385 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10648 22:26:21.434528 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10649 22:26:21.434640 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10650 22:26:21.434753 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10651 22:26:21.434865 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10652 22:26:21.435010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10653 22:26:21.435098 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10654 22:26:21.435213 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10655 22:26:21.435328 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10656 22:26:21.435425 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10657 22:26:21.435560 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10658 22:26:21.435674 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10659 22:26:21.444076 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10660 22:26:21.444634 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10661 22:26:21.444786 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10662 22:26:21.444913 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10663 22:26:21.445261 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10664 22:26:21.445414 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10665 22:26:21.445538 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10666 22:26:21.445621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10667 22:26:21.445715 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10668 22:26:21.445814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10669 22:26:21.445900 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10670 22:26:21.445982 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10671 22:26:21.446062 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10672 22:26:21.446180 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10673 22:26:21.446270 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10674 22:26:21.446574 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10675 22:26:21.446683 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10676 22:26:21.446785 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10677 22:26:21.446871 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10678 22:26:21.446972 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10679 22:26:21.447076 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10680 22:26:21.447498 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10681 22:26:21.447596 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10682 22:26:21.447869 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10683 22:26:21.452113 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10684 22:26:21.452347 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10685 22:26:21.452708 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10686 22:26:21.452819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10687 22:26:21.452920 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10688 22:26:21.453036 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10689 22:26:21.453162 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10690 22:26:21.453275 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10691 22:26:21.453394 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10692 22:26:21.453528 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10693 22:26:21.453637 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10694 22:26:21.453798 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10695 22:26:21.453928 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10696 22:26:21.454032 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10697 22:26:21.454155 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10698 22:26:21.454254 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10699 22:26:21.454358 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10700 22:26:21.454447 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10701 22:26:21.454580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10702 22:26:21.454906 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10703 22:26:21.455059 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10704 22:26:21.455156 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10705 22:26:21.455265 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10706 22:26:21.455371 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10707 22:26:21.455476 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10708 22:26:21.460038 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10709 22:26:21.460518 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10710 22:26:21.460633 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10711 22:26:21.460726 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10712 22:26:21.460814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10713 22:26:21.460916 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10714 22:26:21.461004 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10715 22:26:21.461108 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10716 22:26:21.461412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10717 22:26:21.461513 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10718 22:26:21.461623 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10719 22:26:21.461941 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10720 22:26:21.462063 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10721 22:26:21.462175 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10722 22:26:21.462284 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10723 22:26:21.462392 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10724 22:26:21.462495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10725 22:26:21.462599 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10726 22:26:21.462709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10727 22:26:21.462815 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10728 22:26:21.462933 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10729 22:26:21.463226 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10730 22:26:21.463361 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10731 22:26:21.463475 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10732 22:26:21.463588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10733 22:26:21.468312 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10734 22:26:21.468567 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10735 22:26:21.468671 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10736 22:26:21.468986 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10737 22:26:21.469090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10738 22:26:21.469179 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10739 22:26:21.469271 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10740 22:26:21.469364 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10741 22:26:21.469463 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10742 22:26:21.469547 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10743 22:26:21.469644 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10744 22:26:21.469755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10745 22:26:21.470075 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10746 22:26:21.470175 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10747 22:26:21.470260 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10748 22:26:21.480405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10749 22:26:21.480887 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10750 22:26:21.480981 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10751 22:26:21.481056 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10752 22:26:21.481128 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10753 22:26:21.481199 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10754 22:26:21.481518 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10755 22:26:21.481610 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10756 22:26:21.481707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10757 22:26:21.481780 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10758 22:26:21.481865 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10759 22:26:21.481951 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10760 22:26:21.482237 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10761 22:26:21.482340 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10762 22:26:21.482448 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10763 22:26:21.482898 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10764 22:26:21.483217 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10765 22:26:21.483313 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10766 22:26:21.483415 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10767 22:26:21.483518 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10768 22:26:21.483622 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10769 22:26:21.487784 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10770 22:26:21.488222 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10771 22:26:21.488352 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10772 22:26:21.488485 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10773 22:26:21.488599 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10774 22:26:21.488705 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10775 22:26:21.489003 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10776 22:26:21.489106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10777 22:26:21.489212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10778 22:26:21.489510 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10779 22:26:21.489613 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10780 22:26:21.489925 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10781 22:26:21.490044 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10782 22:26:21.490359 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10783 22:26:21.490475 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10784 22:26:21.490786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10785 22:26:21.490912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10786 22:26:21.491011 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10787 22:26:21.491117 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10788 22:26:21.491209 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10789 22:26:21.491311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10790 22:26:21.491673 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10791 22:26:21.491777 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10792 22:26:21.495833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10793 22:26:21.496224 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10794 22:26:21.496327 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10795 22:26:21.496431 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10796 22:26:21.496534 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10797 22:26:21.496843 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10798 22:26:21.496966 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10799 22:26:21.497286 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10800 22:26:21.497410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10801 22:26:21.497517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10802 22:26:21.497846 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10803 22:26:21.497966 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10804 22:26:21.498073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10805 22:26:21.498178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10806 22:26:21.498517 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10807 22:26:21.498623 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10808 22:26:21.498732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10809 22:26:21.499034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10810 22:26:21.499345 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10811 22:26:21.499448 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10812 22:26:21.499552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10813 22:26:21.499843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10814 22:26:21.505712 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10815 22:26:21.505905 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10816 22:26:21.506000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10817 22:26:21.506089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10818 22:26:21.506178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10819 22:26:21.506266 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10820 22:26:21.506353 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10821 22:26:21.506441 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10822 22:26:21.506529 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10823 22:26:21.506616 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10824 22:26:21.506949 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10825 22:26:21.507056 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10826 22:26:21.507172 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10827 22:26:21.507291 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10828 22:26:21.507408 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10829 22:26:21.507545 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10830 22:26:21.507832 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10831 22:26:21.507913 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10832 22:26:21.507978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10833 22:26:21.508039 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10834 22:26:21.511728 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10835 22:26:21.512050 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10836 22:26:21.512139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10837 22:26:21.512444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10838 22:26:21.512550 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10839 22:26:21.512656 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10840 22:26:21.512734 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10841 22:26:21.513070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10842 22:26:21.513173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10843 22:26:21.513248 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10844 22:26:21.513510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10845 22:26:21.513612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10846 22:26:21.513702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10847 22:26:21.513804 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10848 22:26:21.514104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10849 22:26:21.514205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10850 22:26:21.514322 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10851 22:26:21.514441 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10852 22:26:21.514741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10853 22:26:21.515028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10854 22:26:21.515170 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10855 22:26:21.515303 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10856 22:26:21.515406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10857 22:26:21.515689 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10858 22:26:21.515772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10859 22:26:21.519935 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
10860 22:26:21.520057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
10861 22:26:21.520380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
10862 22:26:21.520552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
10863 22:26:21.520686 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
10864 22:26:21.520823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
10865 22:26:21.520966 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
10866 22:26:21.521072 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
10867 22:26:21.521217 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
10868 22:26:21.521335 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
10869 22:26:21.521677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
10870 22:26:21.521824 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
10871 22:26:21.521963 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
10872 22:26:21.522102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
10873 22:26:21.522228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
10874 22:26:21.522539 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
10875 22:26:21.522685 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
10876 22:26:21.522827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
10877 22:26:21.522939 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
10878 22:26:21.523269 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
10879 22:26:21.523369 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
10880 22:26:21.523475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
10881 22:26:21.523786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
10882 22:26:21.527720 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
10883 22:26:21.528093 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
10884 22:26:21.528203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
10885 22:26:21.536286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
10886 22:26:21.536636 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
10887 22:26:21.536750 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
10888 22:26:21.536857 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
10889 22:26:21.536952 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
10890 22:26:21.537052 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
10891 22:26:21.537350 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
10892 22:26:21.537462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
10893 22:26:21.537568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
10894 22:26:21.537917 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
10895 22:26:21.538038 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
10896 22:26:21.538176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
10897 22:26:21.538286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
10898 22:26:21.538413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
10899 22:26:21.538777 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
10900 22:26:21.538887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
10901 22:26:21.538996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
10902 22:26:21.539088 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
10903 22:26:21.539190 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
10904 22:26:21.539301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
10905 22:26:21.539625 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
10906 22:26:21.543739 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
10907 22:26:21.544119 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
10908 22:26:21.544274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
10909 22:26:21.544448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
10910 22:26:21.544574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
10911 22:26:21.544702 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
10912 22:26:21.544794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
10913 22:26:21.545075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
10914 22:26:21.545190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
10915 22:26:21.545301 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
10916 22:26:21.545592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
10917 22:26:21.545897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
10918 22:26:21.546000 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
10919 22:26:21.546114 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
10920 22:26:21.546241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
10921 22:26:21.546358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
10922 22:26:21.546662 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
10923 22:26:21.546770 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
10924 22:26:21.547079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
10925 22:26:21.547189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
10926 22:26:21.547285 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
10927 22:26:21.547573 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
10928 22:26:21.547661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
10929 22:26:21.551802 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
10930 22:26:21.552139 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
10931 22:26:21.552247 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
10932 22:26:21.552418 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
10933 22:26:21.552586 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
10934 22:26:21.552707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
10935 22:26:21.552889 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
10936 22:26:21.553068 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
10937 22:26:21.553391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
10938 22:26:21.553499 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
10939 22:26:21.553606 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
10940 22:26:21.553954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
10941 22:26:21.554266 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
10942 22:26:21.554371 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
10943 22:26:21.554465 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
10944 22:26:21.554568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
10945 22:26:21.554935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
10946 22:26:21.555042 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
10947 22:26:21.555315 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
10948 22:26:21.555419 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
10949 22:26:21.555541 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
10950 22:26:21.555643 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
10951 22:26:21.559764 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
10952 22:26:21.560082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
10953 22:26:21.560205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
10954 22:26:21.560314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
10955 22:26:21.560630 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
10956 22:26:21.560737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
10957 22:26:21.560844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
10958 22:26:21.561190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
10959 22:26:21.561288 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
10960 22:26:21.561393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
10961 22:26:21.561698 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
10962 22:26:21.561800 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
10963 22:26:21.561902 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
10964 22:26:21.562205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
10965 22:26:21.562333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
10966 22:26:21.562651 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
10967 22:26:21.562758 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
10968 22:26:21.562860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
10969 22:26:21.562983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
10970 22:26:21.563310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
10971 22:26:21.563414 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
10972 22:26:21.563548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
10973 22:26:21.563868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
10974 22:26:21.567720 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
10975 22:26:21.568047 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
10976 22:26:21.568169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
10977 22:26:21.568274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
10978 22:26:21.568577 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
10979 22:26:21.568700 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
10980 22:26:21.568812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
10981 22:26:21.569119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
10982 22:26:21.569240 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
10983 22:26:21.569346 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
10984 22:26:21.569668 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
10985 22:26:21.569778 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
10986 22:26:21.569884 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
10987 22:26:21.569988 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
10988 22:26:21.570282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
10989 22:26:21.570403 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
10990 22:26:21.570539 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
10991 22:26:21.570655 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
10992 22:26:21.570940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
10993 22:26:21.571026 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
10994 22:26:21.571315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
10995 22:26:21.571401 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
10996 22:26:21.571502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
10997 22:26:21.571786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
10998 22:26:21.571872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
10999 22:26:21.577856 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11000 22:26:21.578014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11001 22:26:21.578150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11002 22:26:21.578261 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11003 22:26:21.578377 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11004 22:26:21.578503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11005 22:26:21.578631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11006 22:26:21.578756 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11007 22:26:21.578885 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11008 22:26:21.579000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11009 22:26:21.579102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11010 22:26:21.579195 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11011 22:26:21.579285 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11012 22:26:21.579380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11013 22:26:21.579704 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11014 22:26:21.579809 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11015 22:26:21.579901 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11016 22:26:21.579992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11017 22:26:21.580083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11018 22:26:21.580173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11019 22:26:21.580263 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11020 22:26:21.580354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11021 22:26:21.589517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11022 22:26:21.589712 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11023 22:26:21.590063 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11024 22:26:21.590206 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11025 22:26:21.590348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11026 22:26:21.590501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11027 22:26:21.590609 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11028 22:26:21.590719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11029 22:26:21.590834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11030 22:26:21.590928 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11031 22:26:21.591251 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11032 22:26:21.591399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11033 22:26:21.591559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11034 22:26:21.591708 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11035 22:26:21.591860 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11036 22:26:21.591992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11037 22:26:21.592087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11038 22:26:21.592404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11039 22:26:21.592542 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11040 22:26:21.592692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11041 22:26:21.592827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11042 22:26:21.592926 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11043 22:26:21.593011 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11044 22:26:21.593092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11045 22:26:21.593172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11046 22:26:21.593259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11047 22:26:21.593340 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11048 22:26:21.593436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11049 22:26:21.593513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11050 22:26:21.593595 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11051 22:26:21.593707 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11052 22:26:21.593814 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11053 22:26:21.594294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11054 22:26:21.594410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11055 22:26:21.594523 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11056 22:26:21.594623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11057 22:26:21.594723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11058 22:26:21.594841 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11059 22:26:21.595128 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11060 22:26:21.595229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11061 22:26:21.595517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11062 22:26:21.595642 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11063 22:26:21.595738 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11064 22:26:21.599771 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11065 22:26:21.600119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11066 22:26:21.600255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11067 22:26:21.600367 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11068 22:26:21.600656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11069 22:26:21.600762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11070 22:26:21.601096 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11071 22:26:21.601203 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11072 22:26:21.601311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11073 22:26:21.601417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11074 22:26:21.601706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11075 22:26:21.601814 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11076 22:26:21.601927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11077 22:26:21.602252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11078 22:26:21.602374 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11079 22:26:21.602480 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11080 22:26:21.602792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11081 22:26:21.602913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11082 22:26:21.603081 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11083 22:26:21.603402 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11084 22:26:21.603508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11085 22:26:21.607754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11086 22:26:21.608075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11087 22:26:21.608200 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11088 22:26:21.608308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11089 22:26:21.608615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11090 22:26:21.608736 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11091 22:26:21.608843 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11092 22:26:21.609159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11093 22:26:21.609281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11094 22:26:21.609465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11095 22:26:21.609589 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11096 22:26:21.609964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11097 22:26:21.610071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11098 22:26:21.610177 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11099 22:26:21.610478 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11100 22:26:21.610600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11101 22:26:21.610895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11102 22:26:21.611219 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11103 22:26:21.611326 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11104 22:26:21.611430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11105 22:26:21.611532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11106 22:26:21.619802 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11107 22:26:21.620212 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11108 22:26:21.620364 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11109 22:26:21.620475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11110 22:26:21.620775 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11111 22:26:21.620880 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11112 22:26:21.620970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11113 22:26:21.621316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11114 22:26:21.621676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11115 22:26:21.621781 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11116 22:26:21.621868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11117 22:26:21.622164 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11118 22:26:21.622441 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11119 22:26:21.622545 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11120 22:26:21.622631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11121 22:26:21.623137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11122 22:26:21.623239 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11123 22:26:21.623541 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11124 22:26:21.623649 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11125 22:26:21.627754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11126 22:26:21.628099 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11127 22:26:21.628317 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11128 22:26:21.628465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11129 22:26:21.628624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11130 22:26:21.628799 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11131 22:26:21.628914 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11132 22:26:21.629033 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11133 22:26:21.629139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11134 22:26:21.629441 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11135 22:26:21.629564 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11136 22:26:21.629677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11137 22:26:21.629782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11138 22:26:21.630107 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11139 22:26:21.630218 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11140 22:26:21.630330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11141 22:26:21.630434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11142 22:26:21.630746 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11143 22:26:21.630867 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11144 22:26:21.630971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11145 22:26:21.631286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11146 22:26:21.631392 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11147 22:26:21.631498 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11148 22:26:21.635760 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11149 22:26:21.636065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11150 22:26:21.636366 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11151 22:26:21.636498 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11152 22:26:21.636604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11153 22:26:21.636713 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11154 22:26:21.636801 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11155 22:26:21.643804 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11156 22:26:21.644176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11157 22:26:21.644307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11158 22:26:21.644442 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11159 22:26:21.644574 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11160 22:26:21.644918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11161 22:26:21.645024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11162 22:26:21.645315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11163 22:26:21.645422 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11164 22:26:21.645519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11165 22:26:21.645629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11166 22:26:21.645935 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11167 22:26:21.646057 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11168 22:26:21.646229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11169 22:26:21.646342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11170 22:26:21.646676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11171 22:26:21.646819 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11172 22:26:21.646915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11173 22:26:21.647241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11174 22:26:21.647346 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11175 22:26:21.647454 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11176 22:26:21.647587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11177 22:26:21.651799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11178 22:26:21.652202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11179 22:26:21.652384 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11180 22:26:21.652553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11181 22:26:21.652751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11182 22:26:21.652900 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11183 22:26:21.653036 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11184 22:26:21.653189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11185 22:26:21.653323 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11186 22:26:21.653476 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11187 22:26:21.653611 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11188 22:26:21.653775 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11189 22:26:21.653918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11190 22:26:21.654248 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11191 22:26:21.654554 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11192 22:26:21.654657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11193 22:26:21.654761 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11194 22:26:21.655341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11195 22:26:21.655455 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11196 22:26:21.655562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11197 22:26:21.655664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11198 22:26:21.655927 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11199 22:26:21.659840 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11200 22:26:21.660243 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11201 22:26:21.660351 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11202 22:26:21.660443 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11203 22:26:21.660733 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11204 22:26:21.660843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11205 22:26:21.660936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11206 22:26:21.661045 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11207 22:26:21.661151 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11208 22:26:21.661477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11209 22:26:21.661584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11210 22:26:21.661893 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11211 22:26:21.662000 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11212 22:26:21.662106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11213 22:26:21.662448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11214 22:26:21.662721 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11215 22:26:21.662928 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11216 22:26:21.663106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11217 22:26:21.663311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11218 22:26:21.663486 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11219 22:26:21.663652 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11220 22:26:21.663776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11221 22:26:21.667800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11222 22:26:21.668104 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11223 22:26:21.668206 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11224 22:26:21.668310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11225 22:26:21.668601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11226 22:26:21.668722 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11227 22:26:21.668844 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11228 22:26:21.668947 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11229 22:26:21.669357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11230 22:26:21.669576 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11231 22:26:21.669813 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11232 22:26:21.670002 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11233 22:26:21.670212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11234 22:26:21.670390 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11235 22:26:21.670593 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11236 22:26:21.670795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11237 22:26:21.671041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11238 22:26:21.671262 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11239 22:26:21.671480 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11240 22:26:21.671687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11241 22:26:21.671822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11242 22:26:21.671943 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11243 22:26:21.675743 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11244 22:26:21.676106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11245 22:26:21.676228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11246 22:26:21.676335 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11247 22:26:21.676444 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11248 22:26:21.676751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11249 22:26:21.676872 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11250 22:26:21.676980 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11251 22:26:21.677290 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11252 22:26:21.677395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11253 22:26:21.677518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11254 22:26:21.677808 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11255 22:26:21.677929 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11256 22:26:21.678238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11257 22:26:21.678358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11258 22:26:21.678465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11259 22:26:21.678569 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11260 22:26:21.678928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11261 22:26:21.679050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11262 22:26:21.679357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11263 22:26:21.679464 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11264 22:26:21.679586 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11265 22:26:21.683798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11266 22:26:21.684168 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11267 22:26:21.684270 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11268 22:26:21.684556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11269 22:26:21.684646 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11270 22:26:21.684729 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11271 22:26:21.684853 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11272 22:26:21.684937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11273 22:26:21.685050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11274 22:26:21.685354 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11275 22:26:21.685456 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11276 22:26:21.685561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11277 22:26:21.685887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11278 22:26:21.686008 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11279 22:26:21.686136 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11280 22:26:21.686462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11281 22:26:21.686581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11282 22:26:21.686895 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11283 22:26:21.687241 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11284 22:26:21.687345 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11285 22:26:21.687440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11286 22:26:21.687547 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11287 22:26:21.691849 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11288 22:26:21.692299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11289 22:26:21.699104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11290 22:26:21.699554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11291 22:26:21.699664 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11292 22:26:21.699768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11293 22:26:21.699890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11294 22:26:21.700029 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11295 22:26:21.700133 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11296 22:26:21.700249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11297 22:26:21.700596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11298 22:26:21.700694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11299 22:26:21.700804 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11300 22:26:21.700931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11301 22:26:21.701319 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11302 22:26:21.702034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11303 22:26:21.702276 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11304 22:26:21.702372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11305 22:26:21.702460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11306 22:26:21.702548 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11307 22:26:21.702634 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11308 22:26:21.702719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11309 22:26:21.702825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11310 22:26:21.702916 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11311 22:26:21.703002 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11312 22:26:21.703086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11313 22:26:21.703190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11314 22:26:21.703279 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11315 22:26:21.703378 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11316 22:26:21.703473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11317 22:26:21.710019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11318 22:26:21.710423 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11319 22:26:21.710515 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11320 22:26:21.710632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11321 22:26:21.710764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11322 22:26:21.710881 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11323 22:26:21.711189 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11324 22:26:21.711296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11325 22:26:21.711399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11326 22:26:21.711886 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11327 22:26:21.712011 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11328 22:26:21.712774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11329 22:26:21.712864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11330 22:26:21.712954 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11331 22:26:21.713236 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11332 22:26:21.713343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11333 22:26:21.713431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11334 22:26:21.713533 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11335 22:26:21.713619 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11336 22:26:21.713731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11337 22:26:21.714027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11338 22:26:21.714161 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11339 22:26:21.714290 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11340 22:26:21.714416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11341 22:26:21.714553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11342 22:26:21.714681 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11343 22:26:21.714798 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11344 22:26:21.715103 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11345 22:26:21.715226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11346 22:26:21.715334 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11347 22:26:21.715447 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11348 22:26:21.719772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11349 22:26:21.720199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11350 22:26:21.720308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11351 22:26:21.720415 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11352 22:26:21.720522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11353 22:26:21.720635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11354 22:26:21.720950 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11355 22:26:21.721084 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11356 22:26:21.721506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11357 22:26:21.721691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11358 22:26:21.721887 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11359 22:26:21.722071 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11360 22:26:21.722316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11361 22:26:21.722513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11362 22:26:21.722694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11363 22:26:21.722899 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11364 22:26:21.723071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11365 22:26:21.723246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11366 22:26:21.723451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11367 22:26:21.723628 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11368 22:26:21.723760 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11369 22:26:21.723877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11370 22:26:21.724016 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11371 22:26:21.727761 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11372 22:26:21.728075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11373 22:26:21.728198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11374 22:26:21.728309 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11375 22:26:21.728613 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11376 22:26:21.728732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11377 22:26:21.728838 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11378 22:26:21.729137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11379 22:26:21.729259 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11380 22:26:21.729563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11381 22:26:21.729719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11382 22:26:21.729851 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11383 22:26:21.730033 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11384 22:26:21.730348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11385 22:26:21.730544 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11386 22:26:21.730861 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11387 22:26:21.730971 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11388 22:26:21.731110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11389 22:26:21.731230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11390 22:26:21.731575 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11391 22:26:21.731660 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11392 22:26:21.735774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11393 22:26:21.736102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11394 22:26:21.736463 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11395 22:26:21.736669 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11396 22:26:21.736843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11397 22:26:21.737287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11398 22:26:21.737497 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11399 22:26:21.737695 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11400 22:26:21.737879 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11401 22:26:21.738051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11402 22:26:21.738207 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11403 22:26:21.738344 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11404 22:26:21.738474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11405 22:26:21.738606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11406 22:26:21.738730 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11407 22:26:21.738853 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11408 22:26:21.739000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11409 22:26:21.739129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11410 22:26:21.739253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11411 22:26:21.739857 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11412 22:26:21.739942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11413 22:26:21.740010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11414 22:26:21.740074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11415 22:26:21.740137 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11416 22:26:21.740198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11417 22:26:21.743743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11418 22:26:21.744103 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11419 22:26:21.744327 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11420 22:26:21.744546 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11421 22:26:21.744680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11422 22:26:21.744822 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11423 22:26:21.752261 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11424 22:26:21.752595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11425 22:26:21.752718 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11426 22:26:21.752828 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11427 22:26:21.753147 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11428 22:26:21.753253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11429 22:26:21.753551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11430 22:26:21.753904 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11431 22:26:21.754031 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11432 22:26:21.754136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11433 22:26:21.754444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11434 22:26:21.754648 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11435 22:26:21.754769 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11436 22:26:21.754896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11437 22:26:21.755018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11438 22:26:21.755145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11439 22:26:21.755241 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11440 22:26:21.755342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11441 22:26:21.755431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11442 22:26:21.755537 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11443 22:26:21.759868 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11444 22:26:21.760282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11445 22:26:21.760384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11446 22:26:21.760535 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11447 22:26:21.760647 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11448 22:26:21.760973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11449 22:26:21.761285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11450 22:26:21.761411 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11451 22:26:21.761502 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11452 22:26:21.761794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11453 22:26:21.761906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11454 22:26:21.762041 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11455 22:26:21.762168 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11456 22:26:21.762296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11457 22:26:21.762399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11458 22:26:21.762532 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11459 22:26:21.762900 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11460 22:26:21.763015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11461 22:26:21.763153 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11462 22:26:21.763256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11463 22:26:21.763355 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11464 22:26:21.763466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11465 22:26:21.767764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11466 22:26:21.768106 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11467 22:26:21.768229 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11468 22:26:21.769042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11469 22:26:21.769177 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11470 22:26:21.769273 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11471 22:26:21.769360 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11472 22:26:21.769657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11473 22:26:21.769767 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11474 22:26:21.769858 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11475 22:26:21.769962 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11476 22:26:21.770050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11477 22:26:21.770260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11478 22:26:21.770370 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11479 22:26:21.770543 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11480 22:26:21.770654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11481 22:26:21.770760 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11482 22:26:21.771065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11483 22:26:21.771201 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11484 22:26:21.771518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11485 22:26:21.771900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11486 22:26:21.775877 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11487 22:26:21.776327 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11488 22:26:21.776470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11489 22:26:21.776599 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11490 22:26:21.777062 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11491 22:26:21.777178 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11492 22:26:21.777276 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11493 22:26:21.777383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11494 22:26:21.777486 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11495 22:26:21.777592 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11496 22:26:21.777891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11497 22:26:21.778226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11498 22:26:21.781831 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11499 22:26:21.781976 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11500 22:26:21.782043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11501 22:26:21.782103 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11502 22:26:21.782164 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11503 22:26:21.782224 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11504 22:26:21.782283 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11505 22:26:21.782342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11506 22:26:21.782402 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11507 22:26:21.782461 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11508 22:26:21.784009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11509 22:26:21.784118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11510 22:26:21.784428 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11511 22:26:21.784728 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11512 22:26:21.784834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11513 22:26:21.784944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11514 22:26:21.785582 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11515 22:26:21.785698 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11516 22:26:21.785784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11517 22:26:21.785866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11518 22:26:21.786170 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11519 22:26:21.786259 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11520 22:26:21.786346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11521 22:26:21.786620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11522 22:26:21.786721 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11523 22:26:21.786824 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11524 22:26:21.787396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11525 22:26:21.787601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11526 22:26:21.794204 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11527 22:26:21.795702 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11528 22:26:21.795800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11529 22:26:21.795883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11530 22:26:21.796197 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11531 22:26:21.796302 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11532 22:26:21.796391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11533 22:26:21.796482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11534 22:26:21.796574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11535 22:26:21.796665 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11536 22:26:21.796755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11537 22:26:21.796845 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11538 22:26:21.796937 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11539 22:26:21.797027 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11540 22:26:21.797120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11541 22:26:21.797210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11542 22:26:21.797301 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11543 22:26:21.797391 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11544 22:26:21.797483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11545 22:26:21.801445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11546 22:26:21.801824 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11547 22:26:21.801923 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11548 22:26:21.802016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11549 22:26:21.802105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11550 22:26:21.802199 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11551 22:26:21.802507 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11552 22:26:21.805892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11553 22:26:21.806128 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11554 22:26:21.806214 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11555 22:26:21.806292 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11556 22:26:21.806371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11557 22:26:21.813771 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11558 22:26:21.813990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11559 22:26:21.814070 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11560 22:26:21.814155 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11561 22:26:21.814251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11562 22:26:21.814336 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11563 22:26:21.814402 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11564 22:26:21.814464 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11565 22:26:21.814750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11566 22:26:21.814854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11567 22:26:21.814939 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11568 22:26:21.815027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11569 22:26:21.815120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11570 22:26:21.815218 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11571 22:26:21.815346 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11572 22:26:21.815444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11573 22:26:21.815534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11574 22:26:21.815644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11575 22:26:21.815768 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11576 22:26:21.822660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11577 22:26:21.822917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11578 22:26:21.823028 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11579 22:26:21.823135 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11580 22:26:21.823235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11581 22:26:21.823320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11582 22:26:21.823404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11583 22:26:21.823468 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11584 22:26:21.823530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11585 22:26:21.823590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11586 22:26:21.823649 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11587 22:26:21.823709 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11588 22:26:21.823770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11589 22:26:21.823830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11590 22:26:21.823889 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11591 22:26:21.823949 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11592 22:26:21.824013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11593 22:26:21.824106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11594 22:26:21.828812 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11595 22:26:21.829059 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11596 22:26:21.829171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11597 22:26:21.829272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11598 22:26:21.829372 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11599 22:26:21.829472 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11600 22:26:21.829571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11601 22:26:21.829677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11602 22:26:21.829774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11603 22:26:21.829878 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11604 22:26:21.829979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11605 22:26:21.830118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11606 22:26:21.830221 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11607 22:26:21.830320 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11608 22:26:21.830419 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11609 22:26:21.830517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11610 22:26:21.830614 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11611 22:26:21.830711 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11612 22:26:21.830814 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11613 22:26:21.830950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11614 22:26:21.831054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11615 22:26:21.831154 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11616 22:26:21.831253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11617 22:26:21.831373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11618 22:26:21.831475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11619 22:26:21.831573 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11620 22:26:21.831678 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11621 22:26:21.831800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11622 22:26:21.835966 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11623 22:26:21.836187 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11624 22:26:21.837992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11625 22:26:21.838201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11626 22:26:21.838312 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11627 22:26:21.838416 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11628 22:26:21.838517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11629 22:26:21.838618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11630 22:26:21.838729 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11631 22:26:21.838832 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11632 22:26:21.838937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11633 22:26:21.839042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11634 22:26:21.839150 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11635 22:26:21.839290 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11636 22:26:21.839401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11637 22:26:21.839515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11638 22:26:21.839624 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11639 22:26:21.839729 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11640 22:26:21.839819 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11641 22:26:21.839895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11642 22:26:21.839989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11643 22:26:21.840065 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11644 22:26:21.840138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11645 22:26:21.845816 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11646 22:26:21.846075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11647 22:26:21.846193 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11648 22:26:21.846307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11649 22:26:21.846411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11650 22:26:21.846517 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11651 22:26:21.846621 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11652 22:26:21.846720 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11653 22:26:21.846822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11654 22:26:21.846919 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11655 22:26:21.847022 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11656 22:26:21.847120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11657 22:26:21.847529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11658 22:26:21.847645 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11659 22:26:21.847754 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11660 22:26:21.847848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11661 22:26:21.847934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11662 22:26:21.848018 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11663 22:26:21.848103 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11664 22:26:21.848192 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11665 22:26:21.848285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11666 22:26:21.848370 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11667 22:26:21.848456 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11668 22:26:21.848544 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11669 22:26:21.851905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11670 22:26:21.852350 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11671 22:26:21.852622 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11672 22:26:21.852718 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11673 22:26:21.852796 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11674 22:26:21.852882 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11675 22:26:21.853161 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11676 22:26:21.853421 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11677 22:26:21.853553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11678 22:26:21.853759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11679 22:26:21.854038 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11680 22:26:21.854148 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11681 22:26:21.854248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11682 22:26:21.854340 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11683 22:26:21.854446 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11684 22:26:21.854534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11685 22:26:21.854617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11686 22:26:21.854717 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11687 22:26:21.854799 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11688 22:26:21.854883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11689 22:26:21.855246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11690 22:26:21.855352 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11691 22:26:21.872779 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11692 22:26:21.873255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11693 22:26:21.873378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11694 22:26:21.873477 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11695 22:26:21.873567 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11696 22:26:21.873686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11697 22:26:21.873779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11698 22:26:21.874263 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11699 22:26:21.874387 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11700 22:26:21.874484 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11701 22:26:21.874572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11702 22:26:21.874658 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11703 22:26:21.874927 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11704 22:26:21.875034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11705 22:26:21.875122 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11706 22:26:21.875205 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11707 22:26:21.875291 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11708 22:26:21.875398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11709 22:26:21.875487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11710 22:26:21.875594 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11711 22:26:21.875684 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11712 22:26:21.880108 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11713 22:26:21.880935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11714 22:26:21.881050 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11715 22:26:21.881170 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11716 22:26:21.881301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11717 22:26:21.881421 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11718 22:26:21.881704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11719 22:26:21.881811 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11720 22:26:21.881896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11721 22:26:21.881981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11722 22:26:21.882061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11723 22:26:21.882158 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11724 22:26:21.882248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11725 22:26:21.882594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11726 22:26:21.882708 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11727 22:26:21.882801 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11728 22:26:21.883123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11729 22:26:21.883226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11730 22:26:21.883310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11731 22:26:21.883392 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11732 22:26:21.883660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11733 22:26:21.883755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11734 22:26:21.883848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11735 22:26:21.888022 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11736 22:26:21.888152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11737 22:26:21.888458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11738 22:26:21.888562 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11739 22:26:21.889081 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11740 22:26:21.889189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11741 22:26:21.889293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11742 22:26:21.889378 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11743 22:26:21.889494 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11744 22:26:21.889601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11745 22:26:21.889716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11746 22:26:21.889845 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11747 22:26:21.889974 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11748 22:26:21.890082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11749 22:26:21.890214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11750 22:26:21.890640 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11751 22:26:21.890742 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11752 22:26:21.891052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11753 22:26:21.891156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11754 22:26:21.891246 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11755 22:26:21.891332 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11756 22:26:21.891433 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11757 22:26:21.891534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11758 22:26:21.891643 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11759 22:26:21.895859 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11760 22:26:21.896244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11761 22:26:21.896550 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11762 22:26:21.896741 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11763 22:26:21.896859 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11764 22:26:21.896953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11765 22:26:21.897065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11766 22:26:21.897164 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11767 22:26:21.897257 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11768 22:26:21.897368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11769 22:26:21.897482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11770 22:26:21.897594 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11771 22:26:21.897707 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11772 22:26:21.898029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11773 22:26:21.898135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11774 22:26:21.898317 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11775 22:26:21.901752 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11776 22:26:21.901848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11777 22:26:21.901918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11778 22:26:21.901983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11779 22:26:21.902046 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11780 22:26:21.902108 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11781 22:26:21.902172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11782 22:26:21.902233 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11783 22:26:21.902296 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11784 22:26:21.902359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11785 22:26:21.903777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11786 22:26:21.904109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11787 22:26:21.904304 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11788 22:26:21.904417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11789 22:26:21.904527 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11790 22:26:21.904637 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11791 22:26:21.904939 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11792 22:26:21.905068 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11793 22:26:21.905199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11794 22:26:21.905324 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11795 22:26:21.905440 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11796 22:26:21.905574 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11797 22:26:21.905707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11798 22:26:21.905841 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11799 22:26:21.905969 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11800 22:26:21.906092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11801 22:26:21.906466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11802 22:26:21.906581 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11803 22:26:21.906687 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11804 22:26:21.906820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11805 22:26:21.906947 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11806 22:26:21.907076 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11807 22:26:21.907451 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11808 22:26:21.907559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11809 22:26:21.907681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11810 22:26:21.911824 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11811 22:26:21.912187 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11812 22:26:21.912292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11813 22:26:21.912385 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11814 22:26:21.912659 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11815 22:26:21.912760 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11816 22:26:21.912845 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11817 22:26:21.913134 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11818 22:26:21.913235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11819 22:26:21.913321 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11820 22:26:21.913407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11821 22:26:21.913694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11822 22:26:21.913778 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11823 22:26:21.913845 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11824 22:26:21.913908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11825 22:26:21.930518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11826 22:26:21.931050 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11827 22:26:21.931157 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11828 22:26:21.931246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11829 22:26:21.931378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11830 22:26:21.931483 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11831 22:26:21.931703 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11832 22:26:21.931833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11833 22:26:21.931956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11834 22:26:21.932071 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11835 22:26:21.932187 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11836 22:26:21.932555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11837 22:26:21.932671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11838 22:26:21.932802 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11839 22:26:21.932933 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11840 22:26:21.933051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11841 22:26:21.933358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11842 22:26:21.933564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11843 22:26:21.933701 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11844 22:26:21.933810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11845 22:26:21.933939 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11846 22:26:21.934046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11847 22:26:21.934178 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11848 22:26:21.934283 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11849 22:26:21.934618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11850 22:26:21.934761 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11851 22:26:21.935008 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11852 22:26:21.935139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11853 22:26:21.935323 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11854 22:26:21.935515 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11855 22:26:21.935633 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11856 22:26:21.935707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11857 22:26:21.939961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11858 22:26:21.940267 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11859 22:26:21.940610 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
11860 22:26:21.940770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
11861 22:26:21.940871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
11862 22:26:21.940962 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
11863 22:26:21.941069 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
11864 22:26:21.941161 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
11865 22:26:21.941249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
11866 22:26:21.941351 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
11867 22:26:21.941441 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
11868 22:26:21.941561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
11869 22:26:21.941672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
11870 22:26:21.942013 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
11871 22:26:21.942113 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
11872 22:26:21.942247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
11873 22:26:21.942360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
11874 22:26:21.942471 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
11875 22:26:21.942576 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
11876 22:26:21.942897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
11877 22:26:21.943026 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
11878 22:26:21.943158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
11879 22:26:21.943286 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
11880 22:26:21.943411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
11881 22:26:21.943722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
11882 22:26:21.943817 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
11883 22:26:21.947831 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
11884 22:26:21.948237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
11885 22:26:21.948388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
11886 22:26:21.948543 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
11887 22:26:21.948641 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
11888 22:26:21.948755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
11889 22:26:21.948854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
11890 22:26:21.948976 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
11891 22:26:21.949340 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
11892 22:26:21.949450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
11893 22:26:21.949641 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
11894 22:26:21.949759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
11895 22:26:21.949852 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
11896 22:26:21.949935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
11897 22:26:21.950033 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
11898 22:26:21.950137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
11899 22:26:21.950227 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
11900 22:26:21.950337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
11901 22:26:21.950442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
11902 22:26:21.950760 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
11903 22:26:21.950932 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
11904 22:26:21.951071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
11905 22:26:21.951418 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
11906 22:26:21.951561 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
11907 22:26:21.951649 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
11908 22:26:21.955820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
11909 22:26:21.956182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
11910 22:26:21.956315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
11911 22:26:21.956537 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
11912 22:26:21.956632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
11913 22:26:21.956733 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
11914 22:26:21.956810 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
11915 22:26:21.956910 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
11916 22:26:21.957015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
11917 22:26:21.957321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
11918 22:26:21.957445 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
11919 22:26:21.957579 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
11920 22:26:21.957707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
11921 22:26:21.958024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
11922 22:26:21.958131 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
11923 22:26:21.958256 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
11924 22:26:21.958362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
11925 22:26:21.958492 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
11926 22:26:21.958628 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
11927 22:26:21.958952 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
11928 22:26:21.959060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
11929 22:26:21.959165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
11930 22:26:21.959270 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
11931 22:26:21.959376 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
11932 22:26:21.959672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
11933 22:26:21.963784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
11934 22:26:21.964190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
11935 22:26:21.964369 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
11936 22:26:21.964501 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
11937 22:26:21.964688 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
11938 22:26:21.964788 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
11939 22:26:21.964893 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
11940 22:26:21.965210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
11941 22:26:21.965359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
11942 22:26:21.965481 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
11943 22:26:21.965615 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
11944 22:26:21.966004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
11945 22:26:21.966116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
11946 22:26:21.966240 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
11947 22:26:21.966366 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
11948 22:26:21.966500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
11949 22:26:21.966623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
11950 22:26:21.966948 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
11951 22:26:21.967341 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
11952 22:26:21.967454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
11953 22:26:21.967571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
11954 22:26:21.967693 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
11955 22:26:21.971751 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
11956 22:26:21.972187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
11957 22:26:21.972340 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
11958 22:26:21.972452 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
11959 22:26:21.986194 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
11960 22:26:21.986427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
11961 22:26:21.986507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
11962 22:26:21.986807 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
11963 22:26:21.986921 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
11964 22:26:21.987017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
11965 22:26:21.987118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
11966 22:26:21.987237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
11967 22:26:21.987340 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
11968 22:26:21.987468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
11969 22:26:21.987584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
11970 22:26:21.987704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
11971 22:26:21.987820 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
11972 22:26:21.987922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
11973 22:26:21.988261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
11974 22:26:21.988400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
11975 22:26:21.988549 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
11976 22:26:21.988689 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
11977 22:26:21.989061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
11978 22:26:21.989206 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
11979 22:26:21.989332 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
11980 22:26:21.989475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
11981 22:26:21.989827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
11982 22:26:21.989964 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
11983 22:26:21.990106 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
11984 22:26:21.990221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
11985 22:26:21.990326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
11986 22:26:21.991709 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
11987 22:26:21.991842 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
11988 22:26:21.991943 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
11989 22:26:21.992034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
11990 22:26:21.992119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
11991 22:26:21.992200 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
11992 22:26:21.992269 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
11993 22:26:21.992355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
11994 22:26:21.992456 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
11995 22:26:21.992788 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
11996 22:26:21.992892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
11997 22:26:21.992979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
11998 22:26:21.993063 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
11999 22:26:21.993145 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12000 22:26:21.993246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12001 22:26:21.993330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12002 22:26:22.000210 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12003 22:26:22.000483 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12004 22:26:22.000809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12005 22:26:22.000918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12006 22:26:22.001038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12007 22:26:22.001140 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12008 22:26:22.001226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12009 22:26:22.001332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12010 22:26:22.001440 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12011 22:26:22.001566 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12012 22:26:22.001681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12013 22:26:22.001809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12014 22:26:22.001917 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12015 22:26:22.002041 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12016 22:26:22.002170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12017 22:26:22.002661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12018 22:26:22.002776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12019 22:26:22.002900 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12020 22:26:22.003345 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12021 22:26:22.003574 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12022 22:26:22.003694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12023 22:26:22.008580 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12024 22:26:22.008764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12025 22:26:22.008859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12026 22:26:22.008950 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12027 22:26:22.009037 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12028 22:26:22.009125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12029 22:26:22.009412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12030 22:26:22.009540 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12031 22:26:22.009640 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12032 22:26:22.009742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12033 22:26:22.009833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12034 22:26:22.009940 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12035 22:26:22.010029 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12036 22:26:22.010114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12037 22:26:22.010218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12038 22:26:22.010324 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12039 22:26:22.010426 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12040 22:26:22.010755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12041 22:26:22.010870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12042 22:26:22.010981 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12043 22:26:22.011102 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12044 22:26:22.011219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12045 22:26:22.011556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12046 22:26:22.011663 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12047 22:26:22.015982 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12048 22:26:22.016135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12049 22:26:22.016244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12050 22:26:22.016564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12051 22:26:22.016681 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12052 22:26:22.016817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12053 22:26:22.016942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12054 22:26:22.017272 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12055 22:26:22.017358 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12056 22:26:22.017681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12057 22:26:22.017801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12058 22:26:22.017922 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12059 22:26:22.018046 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12060 22:26:22.018160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12061 22:26:22.018490 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12062 22:26:22.018607 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12063 22:26:22.018740 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12064 22:26:22.018873 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12065 22:26:22.018991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12066 22:26:22.019300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12067 22:26:22.019401 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12068 22:26:22.019526 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12069 22:26:22.019633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12070 22:26:22.023972 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12071 22:26:22.024297 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12072 22:26:22.024406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12073 22:26:22.024710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12074 22:26:22.024816 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12075 22:26:22.024926 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12076 22:26:22.025058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12077 22:26:22.025171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12078 22:26:22.025470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12079 22:26:22.025577 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12080 22:26:22.025687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12081 22:26:22.025818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12082 22:26:22.026123 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12083 22:26:22.026232 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12084 22:26:22.026362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12085 22:26:22.026473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12086 22:26:22.026777 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12087 22:26:22.026914 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12088 22:26:22.027240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12089 22:26:22.027361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12090 22:26:22.027670 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12091 22:26:22.031790 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12092 22:26:22.032089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12093 22:26:22.040554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12094 22:26:22.041017 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12095 22:26:22.041134 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12096 22:26:22.041224 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12097 22:26:22.041328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12098 22:26:22.041416 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12099 22:26:22.041516 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12100 22:26:22.041618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12101 22:26:22.042013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12102 22:26:22.042141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12103 22:26:22.042251 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12104 22:26:22.042353 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12105 22:26:22.042708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12106 22:26:22.042804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12107 22:26:22.042913 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12108 22:26:22.043082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12109 22:26:22.043188 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12110 22:26:22.043481 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12111 22:26:22.043588 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12112 22:26:22.047779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12113 22:26:22.048304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12114 22:26:22.048410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12115 22:26:22.048530 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12116 22:26:22.048631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12117 22:26:22.048957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12118 22:26:22.049083 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12119 22:26:22.049191 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12120 22:26:22.049295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12121 22:26:22.049664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12122 22:26:22.049792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12123 22:26:22.050168 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12124 22:26:22.050275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12125 22:26:22.050432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12126 22:26:22.050724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12127 22:26:22.050836 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12128 22:26:22.050925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12129 22:26:22.051012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12130 22:26:22.051095 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12131 22:26:22.051178 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12132 22:26:22.051278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12133 22:26:22.051365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12134 22:26:22.051465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12135 22:26:22.051565 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12136 22:26:22.057361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12137 22:26:22.058032 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12138 22:26:22.058159 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12139 22:26:22.058260 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12140 22:26:22.058365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12141 22:26:22.058458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12142 22:26:22.058547 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12143 22:26:22.058632 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12144 22:26:22.058716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12145 22:26:22.058803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12146 22:26:22.059127 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12147 22:26:22.059234 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12148 22:26:22.059322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12149 22:26:22.059408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12150 22:26:22.059495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12151 22:26:22.059581 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12152 22:26:22.059665 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12153 22:26:22.059748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12154 22:26:22.059831 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12155 22:26:22.059915 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12156 22:26:22.060000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12157 22:26:22.060101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12158 22:26:22.060187 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12159 22:26:22.060273 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12160 22:26:22.063982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12161 22:26:22.064277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12162 22:26:22.064548 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12163 22:26:22.064748 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12164 22:26:22.064944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12165 22:26:22.065196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12166 22:26:22.065342 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12167 22:26:22.065529 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12168 22:26:22.065781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12169 22:26:22.066075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12170 22:26:22.066356 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12171 22:26:22.066531 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12172 22:26:22.066831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12173 22:26:22.066980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12174 22:26:22.067175 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12175 22:26:22.067371 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12176 22:26:22.067584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12177 22:26:22.067746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12178 22:26:22.067859 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12179 22:26:22.067947 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12180 22:26:22.068034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12181 22:26:22.068119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12182 22:26:22.071801 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12183 22:26:22.072225 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12184 22:26:22.072338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12185 22:26:22.072447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12186 22:26:22.072552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12187 22:26:22.072850 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12188 22:26:22.072961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12189 22:26:22.073067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12190 22:26:22.073365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12191 22:26:22.073462 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12192 22:26:22.073918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12193 22:26:22.074030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12194 22:26:22.074122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12195 22:26:22.074226 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12196 22:26:22.074328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12197 22:26:22.074428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12198 22:26:22.074734 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12199 22:26:22.074849 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12200 22:26:22.074957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12201 22:26:22.075767 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12202 22:26:22.075886 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12203 22:26:22.075977 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12204 22:26:22.076069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12205 22:26:22.076156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12206 22:26:22.076240 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12207 22:26:22.079767 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12208 22:26:22.080180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12209 22:26:22.080286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12210 22:26:22.080422 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12211 22:26:22.080542 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12212 22:26:22.080685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12213 22:26:22.080811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12214 22:26:22.080929 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12215 22:26:22.081215 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12216 22:26:22.081341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12217 22:26:22.081448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12218 22:26:22.081574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12219 22:26:22.081997 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12220 22:26:22.082144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12221 22:26:22.082324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12222 22:26:22.082770 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12223 22:26:22.082879 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12224 22:26:22.082967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12225 22:26:22.083051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12226 22:26:22.083152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12227 22:26:22.092768 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12228 22:26:22.093185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12229 22:26:22.093333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12230 22:26:22.093453 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12231 22:26:22.093570 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12232 22:26:22.093708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12233 22:26:22.093823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12234 22:26:22.093950 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12235 22:26:22.094066 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12236 22:26:22.094196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12237 22:26:22.094324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12238 22:26:22.094662 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12239 22:26:22.094797 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12240 22:26:22.094927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12241 22:26:22.095040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12242 22:26:22.095141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12243 22:26:22.095436 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12244 22:26:22.095544 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12245 22:26:22.095630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12246 22:26:22.100139 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12247 22:26:22.100344 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12248 22:26:22.100423 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12249 22:26:22.100509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12250 22:26:22.100760 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12251 22:26:22.101067 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12252 22:26:22.101168 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12253 22:26:22.101269 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12254 22:26:22.101377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12255 22:26:22.101683 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12256 22:26:22.101798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12257 22:26:22.101887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12258 22:26:22.102195 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12259 22:26:22.102291 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12260 22:26:22.102379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12261 22:26:22.102663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12262 22:26:22.102797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12263 22:26:22.102893 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12264 22:26:22.103002 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12265 22:26:22.103119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12266 22:26:22.103418 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12267 22:26:22.103524 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12268 22:26:22.107769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12269 22:26:22.108163 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12270 22:26:22.108458 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12271 22:26:22.108556 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12272 22:26:22.108648 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12273 22:26:22.108751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12274 22:26:22.109054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12275 22:26:22.109139 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12276 22:26:22.109405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12277 22:26:22.109520 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12278 22:26:22.109623 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12279 22:26:22.109867 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12280 22:26:22.110180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12281 22:26:22.110287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12282 22:26:22.110395 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12283 22:26:22.110500 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12284 22:26:22.110603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12285 22:26:22.112542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12286 22:26:22.112695 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12287 22:26:22.112788 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12288 22:26:22.112876 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12289 22:26:22.112961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12290 22:26:22.113048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12291 22:26:22.113134 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12292 22:26:22.115800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12293 22:26:22.116198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12294 22:26:22.116310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12295 22:26:22.116426 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12296 22:26:22.116517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12297 22:26:22.116620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12298 22:26:22.116729 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12299 22:26:22.117042 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12300 22:26:22.117167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12301 22:26:22.117273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12302 22:26:22.117576 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12303 22:26:22.117694 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12304 22:26:22.117794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12305 22:26:22.117893 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12306 22:26:22.118205 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12307 22:26:22.118326 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12308 22:26:22.118645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12309 22:26:22.118748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12310 22:26:22.119039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12311 22:26:22.119127 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12312 22:26:22.119228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12313 22:26:22.119338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12314 22:26:22.119429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12315 22:26:22.119528 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12316 22:26:22.123776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12317 22:26:22.124209 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12318 22:26:22.124321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12319 22:26:22.124429 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12320 22:26:22.124519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12321 22:26:22.124822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12322 22:26:22.124929 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12323 22:26:22.125041 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12324 22:26:22.125136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12325 22:26:22.125242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12326 22:26:22.125361 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12327 22:26:22.125767 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12328 22:26:22.125874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12329 22:26:22.125964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12330 22:26:22.126249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12331 22:26:22.126352 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12332 22:26:22.126439 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12333 22:26:22.126522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12334 22:26:22.126792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12335 22:26:22.126887 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12336 22:26:22.126972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12337 22:26:22.127251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12338 22:26:22.127552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12339 22:26:22.127644 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12340 22:26:22.131812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12341 22:26:22.132262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12342 22:26:22.132357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12343 22:26:22.132457 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12344 22:26:22.132576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12345 22:26:22.132687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12346 22:26:22.132803 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12347 22:26:22.132923 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12348 22:26:22.133223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12349 22:26:22.133309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12350 22:26:22.133429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12351 22:26:22.133539 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12352 22:26:22.133677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12353 22:26:22.134007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12354 22:26:22.134148 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12355 22:26:22.134255 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12356 22:26:22.134543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12357 22:26:22.134680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12358 22:26:22.135016 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12359 22:26:22.135141 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12360 22:26:22.135268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12361 22:26:22.147397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12362 22:26:22.147878 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12363 22:26:22.147992 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12364 22:26:22.148097 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12365 22:26:22.148184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12366 22:26:22.148285 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12367 22:26:22.148576 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12368 22:26:22.148685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12369 22:26:22.148987 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12370 22:26:22.149092 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12371 22:26:22.149194 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12372 22:26:22.149487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12373 22:26:22.149593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12374 22:26:22.149719 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12375 22:26:22.149831 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12376 22:26:22.150139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12377 22:26:22.150260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12378 22:26:22.150556 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12379 22:26:22.150644 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12380 22:26:22.150950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12381 22:26:22.151035 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12382 22:26:22.151155 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12383 22:26:22.151268 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12384 22:26:22.151381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12385 22:26:22.151680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12386 22:26:22.155805 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12387 22:26:22.156212 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12388 22:26:22.156321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12389 22:26:22.156411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12390 22:26:22.156516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12391 22:26:22.156606 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12392 22:26:22.156713 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12393 22:26:22.157107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12394 22:26:22.157216 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12395 22:26:22.157503 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12396 22:26:22.157600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12397 22:26:22.157921 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12398 22:26:22.158022 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12399 22:26:22.158098 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12400 22:26:22.158183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12401 22:26:22.158257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12402 22:26:22.158538 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12403 22:26:22.158641 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12404 22:26:22.158730 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12405 22:26:22.159007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12406 22:26:22.159113 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12407 22:26:22.159403 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12408 22:26:22.159525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12409 22:26:22.159805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12410 22:26:22.163960 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12411 22:26:22.164185 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12412 22:26:22.164514 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12413 22:26:22.164634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12414 22:26:22.164766 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12415 22:26:22.164881 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12416 22:26:22.164992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12417 22:26:22.165121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12418 22:26:22.165219 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12419 22:26:22.165520 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12420 22:26:22.165636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12421 22:26:22.165757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12422 22:26:22.166071 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12423 22:26:22.168583 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12424 22:26:22.168975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12425 22:26:22.169088 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12426 22:26:22.169181 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12427 22:26:22.169274 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12428 22:26:22.169366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12429 22:26:22.169454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12430 22:26:22.169541 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12431 22:26:22.169630 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12432 22:26:22.173949 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12433 22:26:22.174174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12434 22:26:22.174271 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12435 22:26:22.174361 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12436 22:26:22.174457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12437 22:26:22.174562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12438 22:26:22.174666 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12439 22:26:22.174784 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12440 22:26:22.174892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12441 22:26:22.174999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12442 22:26:22.175137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12443 22:26:22.175275 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12444 22:26:22.175377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12445 22:26:22.175801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12446 22:26:22.175910 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12447 22:26:22.175999 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12448 22:26:22.176088 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12449 22:26:22.176175 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12450 22:26:22.176260 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12451 22:26:22.176347 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12452 22:26:22.176434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12453 22:26:22.176522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12454 22:26:22.176611 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12455 22:26:22.179793 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12456 22:26:22.180209 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12457 22:26:22.180321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12458 22:26:22.180429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12459 22:26:22.180520 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12460 22:26:22.180623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12461 22:26:22.180932 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12462 22:26:22.181243 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12463 22:26:22.181336 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12464 22:26:22.181439 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12465 22:26:22.181541 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12466 22:26:22.181845 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12467 22:26:22.181969 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12468 22:26:22.182073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12469 22:26:22.182362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12470 22:26:22.182469 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12471 22:26:22.182572 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12472 22:26:22.182684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12473 22:26:22.182999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12474 22:26:22.183106 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12475 22:26:22.183208 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12476 22:26:22.183308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12477 22:26:22.183610 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12478 22:26:22.187805 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12479 22:26:22.188241 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12480 22:26:22.188358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12481 22:26:22.188452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12482 22:26:22.188545 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12483 22:26:22.188621 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12484 22:26:22.188693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12485 22:26:22.188777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12486 22:26:22.189061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12487 22:26:22.189158 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12488 22:26:22.189246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12489 22:26:22.189331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12490 22:26:22.189612 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12491 22:26:22.189719 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12492 22:26:22.189806 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12493 22:26:22.190090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12494 22:26:22.190195 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12495 22:26:22.201390 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12496 22:26:22.201864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12497 22:26:22.201968 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12498 22:26:22.202079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12499 22:26:22.202198 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12500 22:26:22.202286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12501 22:26:22.202392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12502 22:26:22.202707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12503 22:26:22.202819 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12504 22:26:22.202919 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12505 22:26:22.203018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12506 22:26:22.203283 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12507 22:26:22.203405 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12508 22:26:22.203491 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12509 22:26:22.203587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12510 22:26:22.203885 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12511 22:26:22.204008 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12512 22:26:22.204301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12513 22:26:22.204422 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12514 22:26:22.204521 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12515 22:26:22.204792 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12516 22:26:22.204891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12517 22:26:22.204995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12518 22:26:22.205091 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12519 22:26:22.205370 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12520 22:26:22.205469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12521 22:26:22.205565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12522 22:26:22.205845 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12523 22:26:22.205946 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12524 22:26:22.206233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12525 22:26:22.206338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12526 22:26:22.206436 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12527 22:26:22.206532 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12528 22:26:22.206636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12529 22:26:22.206937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12530 22:26:22.207061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12531 22:26:22.207357 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12532 22:26:22.207460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12533 22:26:22.207558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12534 22:26:22.207655 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12535 22:26:22.212027 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12536 22:26:22.212250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12537 22:26:22.212343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12538 22:26:22.212661 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12539 22:26:22.212771 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12540 22:26:22.212884 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12541 22:26:22.212977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12542 22:26:22.213084 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12543 22:26:22.213186 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12544 22:26:22.213298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12545 22:26:22.213605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12546 22:26:22.213740 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12547 22:26:22.213854 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12548 22:26:22.213962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12549 22:26:22.214226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12550 22:26:22.214348 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12551 22:26:22.214452 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12552 22:26:22.214718 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12553 22:26:22.214844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12554 22:26:22.215147 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12555 22:26:22.215254 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12556 22:26:22.215363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12557 22:26:22.215469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12558 22:26:22.215762 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12559 22:26:22.220076 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12560 22:26:22.220292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12561 22:26:22.220403 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12562 22:26:22.220719 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12563 22:26:22.220827 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12564 22:26:22.220938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12565 22:26:22.221229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12566 22:26:22.221359 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12567 22:26:22.221465 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12568 22:26:22.221552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12569 22:26:22.221861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12570 22:26:22.222163 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12571 22:26:22.222268 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12572 22:26:22.222357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12573 22:26:22.222461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12574 22:26:22.222549 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12575 22:26:22.222649 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12576 22:26:22.222750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12577 22:26:22.222854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12578 22:26:22.223167 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12579 22:26:22.223269 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12580 22:26:22.223372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12581 22:26:22.223654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12582 22:26:22.231808 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12583 22:26:22.232232 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12584 22:26:22.232342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12585 22:26:22.232409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12586 22:26:22.232511 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12587 22:26:22.232612 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12588 22:26:22.232907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12589 22:26:22.233001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12590 22:26:22.233284 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12591 22:26:22.233373 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12592 22:26:22.233459 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12593 22:26:22.233748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12594 22:26:22.234018 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12595 22:26:22.234139 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12596 22:26:22.234265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12597 22:26:22.234383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12598 22:26:22.234707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12599 22:26:22.234821 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12600 22:26:22.234940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12601 22:26:22.235044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12602 22:26:22.235357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12603 22:26:22.235468 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12604 22:26:22.235557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12605 22:26:22.240029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12606 22:26:22.240495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12607 22:26:22.240602 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12608 22:26:22.240692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12609 22:26:22.240797 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12610 22:26:22.240887 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12611 22:26:22.240991 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12612 22:26:22.241098 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12613 22:26:22.241385 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12614 22:26:22.241510 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12615 22:26:22.241614 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12616 22:26:22.241729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12617 22:26:22.242078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12618 22:26:22.242206 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12619 22:26:22.242337 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12620 22:26:22.242482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12621 22:26:22.242610 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12622 22:26:22.242744 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12623 22:26:22.243062 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12624 22:26:22.243171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12625 22:26:22.243275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12626 22:26:22.243580 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12627 22:26:22.243682 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12628 22:26:22.247970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12629 22:26:22.254751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12630 22:26:22.255175 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12631 22:26:22.255284 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12632 22:26:22.255388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12633 22:26:22.255492 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12634 22:26:22.255791 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12635 22:26:22.256120 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12636 22:26:22.256239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12637 22:26:22.256342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12638 22:26:22.256475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12639 22:26:22.256806 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12640 22:26:22.256925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12641 22:26:22.257030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12642 22:26:22.257339 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12643 22:26:22.257455 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12644 22:26:22.257558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12645 22:26:22.257875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12646 22:26:22.257997 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12647 22:26:22.258114 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12648 22:26:22.258434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12649 22:26:22.258559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12650 22:26:22.258866 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12651 22:26:22.258974 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12652 22:26:22.259077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12653 22:26:22.259381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12654 22:26:22.259506 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12655 22:26:22.264022 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12656 22:26:22.264440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12657 22:26:22.264547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12658 22:26:22.264638 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12659 22:26:22.264742 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12660 22:26:22.264831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12661 22:26:22.265128 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12662 22:26:22.265225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12663 22:26:22.265507 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12664 22:26:22.265602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12665 22:26:22.265908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12666 22:26:22.266003 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12667 22:26:22.266084 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12668 22:26:22.266582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12669 22:26:22.266675 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12670 22:26:22.266761 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12671 22:26:22.266848 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12672 22:26:22.266933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12673 22:26:22.267017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12674 22:26:22.267292 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12675 22:26:22.267368 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12676 22:26:22.267456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12677 22:26:22.267543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12678 22:26:22.267647 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12679 22:26:22.268387 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12680 22:26:22.272033 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12681 22:26:22.272464 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12682 22:26:22.272570 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12683 22:26:22.272660 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12684 22:26:22.272763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12685 22:26:22.272870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12686 22:26:22.272990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12687 22:26:22.273287 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12688 22:26:22.273384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12689 22:26:22.273486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12690 22:26:22.273785 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12691 22:26:22.273908 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12692 22:26:22.274041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12693 22:26:22.274179 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12694 22:26:22.274472 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12695 22:26:22.274771 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12696 22:26:22.274890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12697 22:26:22.275194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12698 22:26:22.275299 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12699 22:26:22.275403 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12700 22:26:22.275507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12701 22:26:22.280041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12702 22:26:22.280472 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12703 22:26:22.280576 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12704 22:26:22.280682 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12705 22:26:22.280786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12706 22:26:22.281068 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12707 22:26:22.281199 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12708 22:26:22.281304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12709 22:26:22.281617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12710 22:26:22.281952 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12711 22:26:22.282064 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12712 22:26:22.282179 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12713 22:26:22.282481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12714 22:26:22.282606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12715 22:26:22.282718 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12716 22:26:22.283024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12717 22:26:22.283146 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12718 22:26:22.283496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12719 22:26:22.283603 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12720 22:26:22.287770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12721 22:26:22.288211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12722 22:26:22.288319 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12723 22:26:22.288426 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12724 22:26:22.288532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12725 22:26:22.288837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12726 22:26:22.288990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12727 22:26:22.289108 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12728 22:26:22.289415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12729 22:26:22.289537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12730 22:26:22.289643 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12731 22:26:22.289763 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12732 22:26:22.289981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12733 22:26:22.290308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12734 22:26:22.290426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12735 22:26:22.290511 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12736 22:26:22.290782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12737 22:26:22.290906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12738 22:26:22.291214 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12739 22:26:22.291326 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12740 22:26:22.291432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12741 22:26:22.295788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12742 22:26:22.296253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12743 22:26:22.296368 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12744 22:26:22.296478 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12745 22:26:22.296568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12746 22:26:22.296673 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12747 22:26:22.296783 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12748 22:26:22.296887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12749 22:26:22.297199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12750 22:26:22.297323 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12751 22:26:22.297622 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12752 22:26:22.297741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12753 22:26:22.297847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12754 22:26:22.298021 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12755 22:26:22.298146 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12756 22:26:22.298449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12757 22:26:22.298570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12758 22:26:22.298875 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12759 22:26:22.298996 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12760 22:26:22.299101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12761 22:26:22.299411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12762 22:26:22.299531 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12763 22:26:22.315034 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12764 22:26:22.315416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12765 22:26:22.315510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12766 22:26:22.315628 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12767 22:26:22.315948 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12768 22:26:22.316073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12769 22:26:22.316182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12770 22:26:22.316486 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12771 22:26:22.316593 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12772 22:26:22.316693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12773 22:26:22.316991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12774 22:26:22.317110 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12775 22:26:22.317221 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12776 22:26:22.317515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12777 22:26:22.317625 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12778 22:26:22.317819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12779 22:26:22.317945 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12780 22:26:22.318262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12781 22:26:22.318366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12782 22:26:22.318470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12783 22:26:22.318572 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12784 22:26:22.318680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12785 22:26:22.318981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12786 22:26:22.319297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12787 22:26:22.319411 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12788 22:26:22.319515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12789 22:26:22.323756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12790 22:26:22.324189 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12791 22:26:22.324297 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12792 22:26:22.324387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12793 22:26:22.324489 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12794 22:26:22.324794 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12795 22:26:22.324900 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12796 22:26:22.325006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12797 22:26:22.325301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12798 22:26:22.325413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12799 22:26:22.325514 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12800 22:26:22.325815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12801 22:26:22.325942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12802 22:26:22.326048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12803 22:26:22.326151 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12804 22:26:22.326471 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12805 22:26:22.326593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12806 22:26:22.326698 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12807 22:26:22.326835 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12808 22:26:22.327128 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12809 22:26:22.327242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12810 22:26:22.327526 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12811 22:26:22.331793 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12812 22:26:22.332228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12813 22:26:22.332338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12814 22:26:22.332443 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12815 22:26:22.332533 arm64_sve-ptrace pass
12816 22:26:22.332634 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12817 22:26:22.332722 arm64_sve-probe-vls_All_vector_lengths_valid pass
12818 22:26:22.332824 arm64_sve-probe-vls pass
12819 22:26:22.332910 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12820 22:26:22.333011 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12821 22:26:22.333317 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12822 22:26:22.333413 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12823 22:26:22.333501 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12824 22:26:22.333786 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12825 22:26:22.333909 arm64_vec-syscfg_SVE_vector_length_used_default pass
12826 22:26:22.334219 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12827 22:26:22.334325 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12828 22:26:22.334415 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12829 22:26:22.334515 arm64_vec-syscfg_SME_default_vector_length_32 pass
12830 22:26:22.334607 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12831 22:26:22.334708 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12832 22:26:22.334806 arm64_vec-syscfg_SME_current_VL_is_32 pass
12833 22:26:22.335106 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12834 22:26:22.335208 arm64_vec-syscfg_SME_prctl_set_min_max pass
12835 22:26:22.335296 arm64_vec-syscfg_SME_vector_length_used_default pass
12836 22:26:22.335581 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12837 22:26:22.335679 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12838 22:26:22.339755 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12839 22:26:22.340162 arm64_vec-syscfg pass
12840 22:26:22.340276 arm64_za-fork_fork_test pass
12841 22:26:22.340363 arm64_za-fork pass
12842 22:26:22.340445 arm64_za-ptrace_Set_VL_16 pass
12843 22:26:22.340530 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12844 22:26:22.340626 arm64_za-ptrace_Data_match_for_VL_16 pass
12845 22:26:22.340704 arm64_za-ptrace_Set_VL_32 pass
12846 22:26:22.340779 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12847 22:26:22.340854 arm64_za-ptrace_Data_match_for_VL_32 pass
12848 22:26:22.340944 arm64_za-ptrace_Set_VL_48 pass
12849 22:26:22.341023 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12850 22:26:22.341106 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12851 22:26:22.341186 arm64_za-ptrace_Set_VL_64 pass
12852 22:26:22.341276 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12853 22:26:22.341375 arm64_za-ptrace_Data_match_for_VL_64 pass
12854 22:26:22.341461 arm64_za-ptrace_Set_VL_80 pass
12855 22:26:22.341558 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12856 22:26:22.341878 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12857 22:26:22.341981 arm64_za-ptrace_Set_VL_96 pass
12858 22:26:22.342083 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12859 22:26:22.342178 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
12860 22:26:22.342285 arm64_za-ptrace_Set_VL_112 pass
12861 22:26:22.342386 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
12862 22:26:22.342486 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
12863 22:26:22.342585 arm64_za-ptrace_Set_VL_128 pass
12864 22:26:22.342943 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
12865 22:26:22.343049 arm64_za-ptrace_Data_match_for_VL_128 pass
12866 22:26:22.343134 arm64_za-ptrace_Set_VL_144 pass
12867 22:26:22.343230 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
12868 22:26:22.343312 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
12869 22:26:22.343410 arm64_za-ptrace_Set_VL_160 pass
12870 22:26:22.343495 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
12871 22:26:22.343592 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
12872 22:26:22.349839 arm64_za-ptrace_Set_VL_176 pass
12873 22:26:22.350073 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
12874 22:26:22.350165 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
12875 22:26:22.350254 arm64_za-ptrace_Set_VL_192 pass
12876 22:26:22.350337 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
12877 22:26:22.350418 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
12878 22:26:22.350501 arm64_za-ptrace_Set_VL_208 pass
12879 22:26:22.350583 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
12880 22:26:22.350667 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
12881 22:26:22.350751 arm64_za-ptrace_Set_VL_224 pass
12882 22:26:22.350837 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
12883 22:26:22.350920 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
12884 22:26:22.351004 arm64_za-ptrace_Set_VL_240 pass
12885 22:26:22.351088 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
12886 22:26:22.351173 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
12887 22:26:22.351263 arm64_za-ptrace_Set_VL_256 pass
12888 22:26:22.351347 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
12889 22:26:22.351431 arm64_za-ptrace_Data_match_for_VL_256 pass
12890 22:26:22.351514 arm64_za-ptrace_Set_VL_272 pass
12891 22:26:22.351596 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
12892 22:26:22.352221 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
12893 22:26:22.352342 arm64_za-ptrace_Set_VL_288 pass
12894 22:26:22.352438 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
12895 22:26:22.352534 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
12896 22:26:22.352631 arm64_za-ptrace_Set_VL_304 pass
12897 22:26:22.352723 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
12898 22:26:22.352815 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
12899 22:26:22.352912 arm64_za-ptrace_Set_VL_320 pass
12900 22:26:22.353008 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
12901 22:26:22.353103 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
12902 22:26:22.353168 arm64_za-ptrace_Set_VL_336 pass
12903 22:26:22.353228 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
12904 22:26:22.353291 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
12905 22:26:22.353351 arm64_za-ptrace_Set_VL_352 pass
12906 22:26:22.353413 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
12907 22:26:22.353474 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
12908 22:26:22.353535 arm64_za-ptrace_Set_VL_368 pass
12909 22:26:22.353596 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
12910 22:26:22.355912 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
12911 22:26:22.356124 arm64_za-ptrace_Set_VL_384 pass
12912 22:26:22.356455 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
12913 22:26:22.356565 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
12914 22:26:22.356658 arm64_za-ptrace_Set_VL_400 pass
12915 22:26:22.356748 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
12916 22:26:22.357083 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
12917 22:26:22.357188 arm64_za-ptrace_Set_VL_416 pass
12918 22:26:22.357288 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
12919 22:26:22.357374 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
12920 22:26:22.357459 arm64_za-ptrace_Set_VL_432 pass
12921 22:26:22.357547 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
12922 22:26:22.357634 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
12923 22:26:22.358016 arm64_za-ptrace_Set_VL_448 pass
12924 22:26:22.358122 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
12925 22:26:22.358209 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
12926 22:26:22.358294 arm64_za-ptrace_Set_VL_464 pass
12927 22:26:22.358381 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
12928 22:26:22.358466 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
12929 22:26:22.358552 arm64_za-ptrace_Set_VL_480 pass
12930 22:26:22.358640 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
12931 22:26:22.358725 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
12932 22:26:22.358827 arm64_za-ptrace_Set_VL_496 pass
12933 22:26:22.358917 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
12934 22:26:22.375303 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
12935 22:26:22.375761 arm64_za-ptrace_Set_VL_512 pass
12936 22:26:22.375865 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
12937 22:26:22.375943 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
12938 22:26:22.376021 arm64_za-ptrace_Set_VL_528 pass
12939 22:26:22.376112 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
12940 22:26:22.376192 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
12941 22:26:22.376274 arm64_za-ptrace_Set_VL_544 pass
12942 22:26:22.376557 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
12943 22:26:22.376658 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
12944 22:26:22.376737 arm64_za-ptrace_Set_VL_560 pass
12945 22:26:22.376813 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
12946 22:26:22.376891 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
12947 22:26:22.377028 arm64_za-ptrace_Set_VL_576 pass
12948 22:26:22.377162 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
12949 22:26:22.377274 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
12950 22:26:22.377363 arm64_za-ptrace_Set_VL_592 pass
12951 22:26:22.377452 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
12952 22:26:22.377531 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
12953 22:26:22.377594 arm64_za-ptrace_Set_VL_608 pass
12954 22:26:22.377666 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
12955 22:26:22.377749 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
12956 22:26:22.377840 arm64_za-ptrace_Set_VL_624 pass
12957 22:26:22.377949 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
12958 22:26:22.378044 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
12959 22:26:22.378113 arm64_za-ptrace_Set_VL_640 pass
12960 22:26:22.378192 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
12961 22:26:22.378293 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
12962 22:26:22.378377 arm64_za-ptrace_Set_VL_656 pass
12963 22:26:22.378463 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
12964 22:26:22.378569 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
12965 22:26:22.378655 arm64_za-ptrace_Set_VL_672 pass
12966 22:26:22.378742 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
12967 22:26:22.378826 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
12968 22:26:22.379109 arm64_za-ptrace_Set_VL_688 pass
12969 22:26:22.379219 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
12970 22:26:22.379329 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
12971 22:26:22.379420 arm64_za-ptrace_Set_VL_704 pass
12972 22:26:22.379523 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
12973 22:26:22.379629 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
12974 22:26:22.384070 arm64_za-ptrace_Set_VL_720 pass
12975 22:26:22.384259 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
12976 22:26:22.384369 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
12977 22:26:22.384448 arm64_za-ptrace_Set_VL_736 pass
12978 22:26:22.384561 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
12979 22:26:22.384669 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
12980 22:26:22.384939 arm64_za-ptrace_Set_VL_752 pass
12981 22:26:22.385038 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
12982 22:26:22.385143 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
12983 22:26:22.385264 arm64_za-ptrace_Set_VL_768 pass
12984 22:26:22.385569 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
12985 22:26:22.385696 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
12986 22:26:22.385807 arm64_za-ptrace_Set_VL_784 pass
12987 22:26:22.385913 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
12988 22:26:22.386030 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
12989 22:26:22.386149 arm64_za-ptrace_Set_VL_800 pass
12990 22:26:22.386259 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
12991 22:26:22.386361 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
12992 22:26:22.386659 arm64_za-ptrace_Set_VL_816 pass
12993 22:26:22.386752 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
12994 22:26:22.386839 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
12995 22:26:22.386913 arm64_za-ptrace_Set_VL_832 pass
12996 22:26:22.386995 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
12997 22:26:22.387079 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
12998 22:26:22.387166 arm64_za-ptrace_Set_VL_848 pass
12999 22:26:22.387273 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13000 22:26:22.387568 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13001 22:26:22.387654 arm64_za-ptrace_Set_VL_864 pass
13002 22:26:22.391834 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13003 22:26:22.392239 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13004 22:26:22.392325 arm64_za-ptrace_Set_VL_880 pass
13005 22:26:22.392411 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13006 22:26:22.392513 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13007 22:26:22.392616 arm64_za-ptrace_Set_VL_896 pass
13008 22:26:22.392708 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13009 22:26:22.392814 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13010 22:26:22.393105 arm64_za-ptrace_Set_VL_912 pass
13011 22:26:22.393384 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13012 22:26:22.393482 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13013 22:26:22.393569 arm64_za-ptrace_Set_VL_928 pass
13014 22:26:22.393642 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13015 22:26:22.393742 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13016 22:26:22.393816 arm64_za-ptrace_Set_VL_944 pass
13017 22:26:22.393888 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13018 22:26:22.393962 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13019 22:26:22.394047 arm64_za-ptrace_Set_VL_960 pass
13020 22:26:22.394130 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13021 22:26:22.394230 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13022 22:26:22.394342 arm64_za-ptrace_Set_VL_976 pass
13023 22:26:22.394637 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13024 22:26:22.394742 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13025 22:26:22.394818 arm64_za-ptrace_Set_VL_992 pass
13026 22:26:22.394903 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13027 22:26:22.394990 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13028 22:26:22.395076 arm64_za-ptrace_Set_VL_1008 pass
13029 22:26:22.395161 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13030 22:26:22.395433 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13031 22:26:22.395510 arm64_za-ptrace_Set_VL_1024 pass
13032 22:26:22.395594 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13033 22:26:22.400012 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13034 22:26:22.400228 arm64_za-ptrace_Set_VL_1040 pass
13035 22:26:22.400339 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13036 22:26:22.400434 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13037 22:26:22.400512 arm64_za-ptrace_Set_VL_1056 pass
13038 22:26:22.400597 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13039 22:26:22.400680 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13040 22:26:22.400760 arm64_za-ptrace_Set_VL_1072 pass
13041 22:26:22.400838 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13042 22:26:22.400966 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13043 22:26:22.401085 arm64_za-ptrace_Set_VL_1088 pass
13044 22:26:22.401165 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13045 22:26:22.401444 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13046 22:26:22.401527 arm64_za-ptrace_Set_VL_1104 pass
13047 22:26:22.401602 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13048 22:26:22.401691 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13049 22:26:22.401790 arm64_za-ptrace_Set_VL_1120 pass
13050 22:26:22.401871 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13051 22:26:22.402150 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13052 22:26:22.402257 arm64_za-ptrace_Set_VL_1136 pass
13053 22:26:22.402366 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13054 22:26:22.402450 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13055 22:26:22.402548 arm64_za-ptrace_Set_VL_1152 pass
13056 22:26:22.402649 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13057 22:26:22.402750 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13058 22:26:22.402850 arm64_za-ptrace_Set_VL_1168 pass
13059 22:26:22.402951 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13060 22:26:22.403056 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13061 22:26:22.403158 arm64_za-ptrace_Set_VL_1184 pass
13062 22:26:22.403259 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13063 22:26:22.403562 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13064 22:26:22.403672 arm64_za-ptrace_Set_VL_1200 pass
13065 22:26:22.407795 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13066 22:26:22.408148 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13067 22:26:22.408222 arm64_za-ptrace_Set_VL_1216 pass
13068 22:26:22.408301 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13069 22:26:22.408380 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13070 22:26:22.408458 arm64_za-ptrace_Set_VL_1232 pass
13071 22:26:22.408714 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13072 22:26:22.408787 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13073 22:26:22.408865 arm64_za-ptrace_Set_VL_1248 pass
13074 22:26:22.409113 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13075 22:26:22.409186 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13076 22:26:22.409252 arm64_za-ptrace_Set_VL_1264 pass
13077 22:26:22.409330 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13078 22:26:22.409397 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13079 22:26:22.409677 arm64_za-ptrace_Set_VL_1280 pass
13080 22:26:22.409780 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13081 22:26:22.409884 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13082 22:26:22.409971 arm64_za-ptrace_Set_VL_1296 pass
13083 22:26:22.410077 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13084 22:26:22.410167 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13085 22:26:22.410269 arm64_za-ptrace_Set_VL_1312 pass
13086 22:26:22.410380 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13087 22:26:22.410484 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13088 22:26:22.410587 arm64_za-ptrace_Set_VL_1328 pass
13089 22:26:22.410879 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13090 22:26:22.410974 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13091 22:26:22.411048 arm64_za-ptrace_Set_VL_1344 pass
13092 22:26:22.411132 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13093 22:26:22.411206 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13094 22:26:22.411469 arm64_za-ptrace_Set_VL_1360 pass
13095 22:26:22.411545 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13096 22:26:22.411629 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13097 22:26:22.411702 arm64_za-ptrace_Set_VL_1376 pass
13098 22:26:22.416164 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13099 22:26:22.416320 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13100 22:26:22.416389 arm64_za-ptrace_Set_VL_1392 pass
13101 22:26:22.416635 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13102 22:26:22.416702 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13103 22:26:22.416788 arm64_za-ptrace_Set_VL_1408 pass
13104 22:26:22.416892 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13105 22:26:22.416998 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13106 22:26:22.417087 arm64_za-ptrace_Set_VL_1424 pass
13107 22:26:22.417191 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13108 22:26:22.417293 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13109 22:26:22.417374 arm64_za-ptrace_Set_VL_1440 pass
13110 22:26:22.417447 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13111 22:26:22.417606 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13112 22:26:22.417725 arm64_za-ptrace_Set_VL_1456 pass
13113 22:26:22.418024 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13114 22:26:22.418152 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13115 22:26:22.418267 arm64_za-ptrace_Set_VL_1472 pass
13116 22:26:22.418533 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13117 22:26:22.418632 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13118 22:26:22.418900 arm64_za-ptrace_Set_VL_1488 pass
13119 22:26:22.419011 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13120 22:26:22.419138 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13121 22:26:22.419245 arm64_za-ptrace_Set_VL_1504 pass
13122 22:26:22.419378 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13123 22:26:22.419488 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13124 22:26:22.419597 arm64_za-ptrace_Set_VL_1520 pass
13125 22:26:22.419724 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13126 22:26:22.423819 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13127 22:26:22.424213 arm64_za-ptrace_Set_VL_1536 pass
13128 22:26:22.424294 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13129 22:26:22.438867 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13130 22:26:22.439324 arm64_za-ptrace_Set_VL_1552 pass
13131 22:26:22.439453 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13132 22:26:22.439561 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13133 22:26:22.439640 arm64_za-ptrace_Set_VL_1568 pass
13134 22:26:22.439735 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13135 22:26:22.439829 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13136 22:26:22.439935 arm64_za-ptrace_Set_VL_1584 pass
13137 22:26:22.440053 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13138 22:26:22.440159 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13139 22:26:22.440279 arm64_za-ptrace_Set_VL_1600 pass
13140 22:26:22.440357 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13141 22:26:22.440463 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13142 22:26:22.440764 arm64_za-ptrace_Set_VL_1616 pass
13143 22:26:22.440873 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13144 22:26:22.440989 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13145 22:26:22.441078 arm64_za-ptrace_Set_VL_1632 pass
13146 22:26:22.441160 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13147 22:26:22.441470 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13148 22:26:22.441570 arm64_za-ptrace_Set_VL_1648 pass
13149 22:26:22.441665 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13150 22:26:22.441762 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13151 22:26:22.441847 arm64_za-ptrace_Set_VL_1664 pass
13152 22:26:22.441930 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13153 22:26:22.442026 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13154 22:26:22.442129 arm64_za-ptrace_Set_VL_1680 pass
13155 22:26:22.442257 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13156 22:26:22.442384 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13157 22:26:22.442496 arm64_za-ptrace_Set_VL_1696 pass
13158 22:26:22.442622 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13159 22:26:22.442750 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13160 22:26:22.442874 arm64_za-ptrace_Set_VL_1712 pass
13161 22:26:22.442999 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13162 22:26:22.443106 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13163 22:26:22.443213 arm64_za-ptrace_Set_VL_1728 pass
13164 22:26:22.443336 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13165 22:26:22.443670 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13166 22:26:22.443782 arm64_za-ptrace_Set_VL_1744 pass
13167 22:26:22.443878 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13168 22:26:22.448036 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13169 22:26:22.448261 arm64_za-ptrace_Set_VL_1760 pass
13170 22:26:22.448606 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13171 22:26:22.448715 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13172 22:26:22.448810 arm64_za-ptrace_Set_VL_1776 pass
13173 22:26:22.448903 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13174 22:26:22.448995 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13175 22:26:22.449100 arm64_za-ptrace_Set_VL_1792 pass
13176 22:26:22.449188 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13177 22:26:22.449273 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13178 22:26:22.449361 arm64_za-ptrace_Set_VL_1808 pass
13179 22:26:22.449469 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13180 22:26:22.449559 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13181 22:26:22.449673 arm64_za-ptrace_Set_VL_1824 pass
13182 22:26:22.449765 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13183 22:26:22.449875 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13184 22:26:22.449963 arm64_za-ptrace_Set_VL_1840 pass
13185 22:26:22.450067 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13186 22:26:22.450172 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13187 22:26:22.450277 arm64_za-ptrace_Set_VL_1856 pass
13188 22:26:22.450681 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13189 22:26:22.450791 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13190 22:26:22.450884 arm64_za-ptrace_Set_VL_1872 pass
13191 22:26:22.450991 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13192 22:26:22.451082 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13193 22:26:22.451170 arm64_za-ptrace_Set_VL_1888 pass
13194 22:26:22.451259 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13195 22:26:22.451346 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13196 22:26:22.451460 arm64_za-ptrace_Set_VL_1904 pass
13197 22:26:22.451773 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13198 22:26:22.451882 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13199 22:26:22.451976 arm64_za-ptrace_Set_VL_1920 pass
13200 22:26:22.452066 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13201 22:26:22.452157 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13202 22:26:22.452248 arm64_za-ptrace_Set_VL_1936 pass
13203 22:26:22.452338 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13204 22:26:22.456135 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13205 22:26:22.456365 arm64_za-ptrace_Set_VL_1952 pass
13206 22:26:22.456666 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13207 22:26:22.457291 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13208 22:26:22.457378 arm64_za-ptrace_Set_VL_1968 pass
13209 22:26:22.457471 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13210 22:26:22.457551 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13211 22:26:22.457628 arm64_za-ptrace_Set_VL_1984 pass
13212 22:26:22.457714 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13213 22:26:22.457791 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13214 22:26:22.457866 arm64_za-ptrace_Set_VL_2000 pass
13215 22:26:22.457941 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13216 22:26:22.458224 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13217 22:26:22.458330 arm64_za-ptrace_Set_VL_2016 pass
13218 22:26:22.458437 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13219 22:26:22.458533 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13220 22:26:22.458623 arm64_za-ptrace_Set_VL_2032 pass
13221 22:26:22.458710 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13222 22:26:22.458810 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13223 22:26:22.458901 arm64_za-ptrace_Set_VL_2048 pass
13224 22:26:22.459005 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13225 22:26:22.459113 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13226 22:26:22.459215 arm64_za-ptrace_Set_VL_2064 pass
13227 22:26:22.459323 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13228 22:26:22.459453 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13229 22:26:22.459559 arm64_za-ptrace_Set_VL_2080 pass
13230 22:26:22.459664 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13231 22:26:22.459744 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13232 22:26:22.459829 arm64_za-ptrace_Set_VL_2096 pass
13233 22:26:22.459899 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13234 22:26:22.459961 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13235 22:26:22.460020 arm64_za-ptrace_Set_VL_2112 pass
13236 22:26:22.460080 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13237 22:26:22.460140 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13238 22:26:22.460201 arm64_za-ptrace_Set_VL_2128 pass
13239 22:26:22.460260 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13240 22:26:22.460336 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13241 22:26:22.460399 arm64_za-ptrace_Set_VL_2144 pass
13242 22:26:22.463880 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13243 22:26:22.464011 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13244 22:26:22.464300 arm64_za-ptrace_Set_VL_2160 pass
13245 22:26:22.464399 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13246 22:26:22.464491 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13247 22:26:22.464597 arm64_za-ptrace_Set_VL_2176 pass
13248 22:26:22.464689 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13249 22:26:22.464780 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13250 22:26:22.464885 arm64_za-ptrace_Set_VL_2192 pass
13251 22:26:22.464976 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13252 22:26:22.465081 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13253 22:26:22.465170 arm64_za-ptrace_Set_VL_2208 pass
13254 22:26:22.465278 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13255 22:26:22.465381 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13256 22:26:22.465488 arm64_za-ptrace_Set_VL_2224 pass
13257 22:26:22.465593 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13258 22:26:22.465890 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13259 22:26:22.465991 arm64_za-ptrace_Set_VL_2240 pass
13260 22:26:22.466095 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13261 22:26:22.466201 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13262 22:26:22.466305 arm64_za-ptrace_Set_VL_2256 pass
13263 22:26:22.466429 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13264 22:26:22.466537 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13265 22:26:22.466640 arm64_za-ptrace_Set_VL_2272 pass
13266 22:26:22.466742 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13267 22:26:22.467032 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13268 22:26:22.467139 arm64_za-ptrace_Set_VL_2288 pass
13269 22:26:22.467228 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13270 22:26:22.467330 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13271 22:26:22.467419 arm64_za-ptrace_Set_VL_2304 pass
13272 22:26:22.467527 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13273 22:26:22.467635 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13274 22:26:22.472197 arm64_za-ptrace_Set_VL_2320 pass
13275 22:26:22.472317 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13276 22:26:22.472396 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13277 22:26:22.472474 arm64_za-ptrace_Set_VL_2336 pass
13278 22:26:22.472547 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13279 22:26:22.472632 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13280 22:26:22.472705 arm64_za-ptrace_Set_VL_2352 pass
13281 22:26:22.472777 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13282 22:26:22.472860 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13283 22:26:22.472932 arm64_za-ptrace_Set_VL_2368 pass
13284 22:26:22.473014 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13285 22:26:22.473098 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13286 22:26:22.473416 arm64_za-ptrace_Set_VL_2384 pass
13287 22:26:22.473511 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13288 22:26:22.473604 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13289 22:26:22.473687 arm64_za-ptrace_Set_VL_2400 pass
13290 22:26:22.473771 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13291 22:26:22.473856 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13292 22:26:22.473942 arm64_za-ptrace_Set_VL_2416 pass
13293 22:26:22.474027 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13294 22:26:22.474138 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13295 22:26:22.474443 arm64_za-ptrace_Set_VL_2432 pass
13296 22:26:22.474712 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13297 22:26:22.474787 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13298 22:26:22.474891 arm64_za-ptrace_Set_VL_2448 pass
13299 22:26:22.474971 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13300 22:26:22.475048 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13301 22:26:22.475117 arm64_za-ptrace_Set_VL_2464 pass
13302 22:26:22.475193 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13303 22:26:22.475271 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13304 22:26:22.475337 arm64_za-ptrace_Set_VL_2480 pass
13305 22:26:22.475418 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13306 22:26:22.475487 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13307 22:26:22.475563 arm64_za-ptrace_Set_VL_2496 pass
13308 22:26:22.479928 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13309 22:26:22.480258 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13310 22:26:22.480367 arm64_za-ptrace_Set_VL_2512 pass
13311 22:26:22.480461 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13312 22:26:22.480552 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13313 22:26:22.480641 arm64_za-ptrace_Set_VL_2528 pass
13314 22:26:22.480751 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13315 22:26:22.480838 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13316 22:26:22.480923 arm64_za-ptrace_Set_VL_2544 pass
13317 22:26:22.481008 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13318 22:26:22.481093 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13319 22:26:22.481195 arm64_za-ptrace_Set_VL_2560 pass
13320 22:26:22.481281 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13321 22:26:22.481380 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13322 22:26:22.500380 arm64_za-ptrace_Set_VL_2576 pass
13323 22:26:22.500639 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13324 22:26:22.500748 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13325 22:26:22.501059 arm64_za-ptrace_Set_VL_2592 pass
13326 22:26:22.501171 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13327 22:26:22.501279 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13328 22:26:22.501393 arm64_za-ptrace_Set_VL_2608 pass
13329 22:26:22.501504 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13330 22:26:22.501621 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13331 22:26:22.501761 arm64_za-ptrace_Set_VL_2624 pass
13332 22:26:22.501911 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13333 22:26:22.502015 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13334 22:26:22.502108 arm64_za-ptrace_Set_VL_2640 pass
13335 22:26:22.502198 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13336 22:26:22.502284 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13337 22:26:22.502369 arm64_za-ptrace_Set_VL_2656 pass
13338 22:26:22.502452 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13339 22:26:22.502537 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13340 22:26:22.502650 arm64_za-ptrace_Set_VL_2672 pass
13341 22:26:22.502737 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13342 22:26:22.502821 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13343 22:26:22.502910 arm64_za-ptrace_Set_VL_2688 pass
13344 22:26:22.502994 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13345 22:26:22.503080 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13346 22:26:22.503186 arm64_za-ptrace_Set_VL_2704 pass
13347 22:26:22.503275 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13348 22:26:22.503361 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13349 22:26:22.503449 arm64_za-ptrace_Set_VL_2720 pass
13350 22:26:22.503539 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13351 22:26:22.503623 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13352 22:26:22.503726 arm64_za-ptrace_Set_VL_2736 pass
13353 22:26:22.503814 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13354 22:26:22.503897 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13355 22:26:22.503980 arm64_za-ptrace_Set_VL_2752 pass
13356 22:26:22.507805 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13357 22:26:22.508103 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13358 22:26:22.508206 arm64_za-ptrace_Set_VL_2768 pass
13359 22:26:22.508294 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13360 22:26:22.508396 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13361 22:26:22.508485 arm64_za-ptrace_Set_VL_2784 pass
13362 22:26:22.508573 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13363 22:26:22.508676 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13364 22:26:22.508768 arm64_za-ptrace_Set_VL_2800 pass
13365 22:26:22.508869 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13366 22:26:22.508957 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13367 22:26:22.509044 arm64_za-ptrace_Set_VL_2816 pass
13368 22:26:22.509146 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13369 22:26:22.509233 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13370 22:26:22.509333 arm64_za-ptrace_Set_VL_2832 pass
13371 22:26:22.509420 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13372 22:26:22.509526 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13373 22:26:22.509618 arm64_za-ptrace_Set_VL_2848 pass
13374 22:26:22.509730 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13375 22:26:22.509816 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13376 22:26:22.509920 arm64_za-ptrace_Set_VL_2864 pass
13377 22:26:22.510009 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13378 22:26:22.510105 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13379 22:26:22.510199 arm64_za-ptrace_Set_VL_2880 pass
13380 22:26:22.510291 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13381 22:26:22.510374 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13382 22:26:22.510449 arm64_za-ptrace_Set_VL_2896 pass
13383 22:26:22.510533 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13384 22:26:22.510613 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13385 22:26:22.510704 arm64_za-ptrace_Set_VL_2912 pass
13386 22:26:22.510796 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13387 22:26:22.510890 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13388 22:26:22.510996 arm64_za-ptrace_Set_VL_2928 pass
13389 22:26:22.511077 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13390 22:26:22.511167 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13391 22:26:22.511241 arm64_za-ptrace_Set_VL_2944 pass
13392 22:26:22.511335 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13393 22:26:22.511416 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13394 22:26:22.511493 arm64_za-ptrace_Set_VL_2960 pass
13395 22:26:22.511589 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13396 22:26:22.511699 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13397 22:26:22.511777 arm64_za-ptrace_Set_VL_2976 pass
13398 22:26:22.515877 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13399 22:26:22.516212 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13400 22:26:22.516304 arm64_za-ptrace_Set_VL_2992 pass
13401 22:26:22.516403 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13402 22:26:22.516503 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13403 22:26:22.516611 arm64_za-ptrace_Set_VL_3008 pass
13404 22:26:22.516700 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13405 22:26:22.516775 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13406 22:26:22.516848 arm64_za-ptrace_Set_VL_3024 pass
13407 22:26:22.517132 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13408 22:26:22.517239 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13409 22:26:22.517331 arm64_za-ptrace_Set_VL_3040 pass
13410 22:26:22.517417 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13411 22:26:22.517518 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13412 22:26:22.517587 arm64_za-ptrace_Set_VL_3056 pass
13413 22:26:22.517669 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13414 22:26:22.517779 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13415 22:26:22.517879 arm64_za-ptrace_Set_VL_3072 pass
13416 22:26:22.517975 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13417 22:26:22.518067 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13418 22:26:22.518181 arm64_za-ptrace_Set_VL_3088 pass
13419 22:26:22.518265 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13420 22:26:22.518350 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13421 22:26:22.518422 arm64_za-ptrace_Set_VL_3104 pass
13422 22:26:22.518491 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13423 22:26:22.518576 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13424 22:26:22.518658 arm64_za-ptrace_Set_VL_3120 pass
13425 22:26:22.518755 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13426 22:26:22.518838 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13427 22:26:22.518936 arm64_za-ptrace_Set_VL_3136 pass
13428 22:26:22.519021 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13429 22:26:22.519315 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13430 22:26:22.519429 arm64_za-ptrace_Set_VL_3152 pass
13431 22:26:22.519520 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13432 22:26:22.519628 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13433 22:26:22.519717 arm64_za-ptrace_Set_VL_3168 pass
13434 22:26:22.519803 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13435 22:26:22.523844 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13436 22:26:22.523990 arm64_za-ptrace_Set_VL_3184 pass
13437 22:26:22.524260 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13438 22:26:22.524372 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13439 22:26:22.524463 arm64_za-ptrace_Set_VL_3200 pass
13440 22:26:22.524565 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13441 22:26:22.524653 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13442 22:26:22.524752 arm64_za-ptrace_Set_VL_3216 pass
13443 22:26:22.524839 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13444 22:26:22.524939 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13445 22:26:22.525026 arm64_za-ptrace_Set_VL_3232 pass
13446 22:26:22.525133 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13447 22:26:22.525437 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13448 22:26:22.525549 arm64_za-ptrace_Set_VL_3248 pass
13449 22:26:22.525868 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13450 22:26:22.525974 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13451 22:26:22.526061 arm64_za-ptrace_Set_VL_3264 pass
13452 22:26:22.526138 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13453 22:26:22.526400 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13454 22:26:22.526500 arm64_za-ptrace_Set_VL_3280 pass
13455 22:26:22.526583 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13456 22:26:22.526658 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13457 22:26:22.526758 arm64_za-ptrace_Set_VL_3296 pass
13458 22:26:22.526869 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13459 22:26:22.526992 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13460 22:26:22.527086 arm64_za-ptrace_Set_VL_3312 pass
13461 22:26:22.527169 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13462 22:26:22.527241 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13463 22:26:22.527336 arm64_za-ptrace_Set_VL_3328 pass
13464 22:26:22.527416 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13465 22:26:22.527507 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13466 22:26:22.531810 arm64_za-ptrace_Set_VL_3344 pass
13467 22:26:22.532162 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13468 22:26:22.532300 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13469 22:26:22.532413 arm64_za-ptrace_Set_VL_3360 pass
13470 22:26:22.532546 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13471 22:26:22.532637 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13472 22:26:22.532724 arm64_za-ptrace_Set_VL_3376 pass
13473 22:26:22.532827 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13474 22:26:22.532918 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13475 22:26:22.533020 arm64_za-ptrace_Set_VL_3392 pass
13476 22:26:22.533109 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13477 22:26:22.533204 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13478 22:26:22.533307 arm64_za-ptrace_Set_VL_3408 pass
13479 22:26:22.533405 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13480 22:26:22.533520 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13481 22:26:22.533805 arm64_za-ptrace_Set_VL_3424 pass
13482 22:26:22.533894 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13483 22:26:22.533966 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13484 22:26:22.534068 arm64_za-ptrace_Set_VL_3440 pass
13485 22:26:22.534169 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13486 22:26:22.534266 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13487 22:26:22.534372 arm64_za-ptrace_Set_VL_3456 pass
13488 22:26:22.534461 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13489 22:26:22.534555 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13490 22:26:22.534697 arm64_za-ptrace_Set_VL_3472 pass
13491 22:26:22.534809 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13492 22:26:22.534950 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13493 22:26:22.535053 arm64_za-ptrace_Set_VL_3488 pass
13494 22:26:22.535165 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13495 22:26:22.535289 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13496 22:26:22.535416 arm64_za-ptrace_Set_VL_3504 pass
13497 22:26:22.535537 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13498 22:26:22.539795 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13499 22:26:22.540147 arm64_za-ptrace_Set_VL_3520 pass
13500 22:26:22.540255 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13501 22:26:22.540544 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13502 22:26:22.540663 arm64_za-ptrace_Set_VL_3536 pass
13503 22:26:22.540775 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13504 22:26:22.540899 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13505 22:26:22.541020 arm64_za-ptrace_Set_VL_3552 pass
13506 22:26:22.541143 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13507 22:26:22.541263 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13508 22:26:22.541378 arm64_za-ptrace_Set_VL_3568 pass
13509 22:26:22.541469 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13510 22:26:22.541558 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13511 22:26:22.541624 arm64_za-ptrace_Set_VL_3584 pass
13512 22:26:22.541708 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13513 22:26:22.541774 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13514 22:26:22.559952 arm64_za-ptrace_Set_VL_3600 pass
13515 22:26:22.560200 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13516 22:26:22.560601 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13517 22:26:22.560717 arm64_za-ptrace_Set_VL_3616 pass
13518 22:26:22.560819 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13519 22:26:22.561089 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13520 22:26:22.561188 arm64_za-ptrace_Set_VL_3632 pass
13521 22:26:22.561264 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13522 22:26:22.561344 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13523 22:26:22.561422 arm64_za-ptrace_Set_VL_3648 pass
13524 22:26:22.561503 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13525 22:26:22.561784 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13526 22:26:22.561872 arm64_za-ptrace_Set_VL_3664 pass
13527 22:26:22.561948 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13528 22:26:22.562022 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13529 22:26:22.562111 arm64_za-ptrace_Set_VL_3680 pass
13530 22:26:22.562182 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13531 22:26:22.562594 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13532 22:26:22.562696 arm64_za-ptrace_Set_VL_3696 pass
13533 22:26:22.562780 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13534 22:26:22.562863 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13535 22:26:22.563131 arm64_za-ptrace_Set_VL_3712 pass
13536 22:26:22.563213 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13537 22:26:22.563278 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13538 22:26:22.563341 arm64_za-ptrace_Set_VL_3728 pass
13539 22:26:22.563404 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13540 22:26:22.563491 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13541 22:26:22.563577 arm64_za-ptrace_Set_VL_3744 pass
13542 22:26:22.563672 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13543 22:26:22.563741 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13544 22:26:22.563816 arm64_za-ptrace_Set_VL_3760 pass
13545 22:26:22.563879 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13546 22:26:22.567851 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13547 22:26:22.568171 arm64_za-ptrace_Set_VL_3776 pass
13548 22:26:22.568260 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13549 22:26:22.568338 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13550 22:26:22.568423 arm64_za-ptrace_Set_VL_3792 pass
13551 22:26:22.568491 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13552 22:26:22.568569 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13553 22:26:22.568661 arm64_za-ptrace_Set_VL_3808 pass
13554 22:26:22.568925 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13555 22:26:22.569028 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13556 22:26:22.569137 arm64_za-ptrace_Set_VL_3824 pass
13557 22:26:22.569233 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13558 22:26:22.569566 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13559 22:26:22.569696 arm64_za-ptrace_Set_VL_3840 pass
13560 22:26:22.569795 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13561 22:26:22.570111 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13562 22:26:22.570227 arm64_za-ptrace_Set_VL_3856 pass
13563 22:26:22.570319 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13564 22:26:22.570428 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13565 22:26:22.570522 arm64_za-ptrace_Set_VL_3872 pass
13566 22:26:22.570628 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13567 22:26:22.570722 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13568 22:26:22.570829 arm64_za-ptrace_Set_VL_3888 pass
13569 22:26:22.570923 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13570 22:26:22.571243 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13571 22:26:22.571350 arm64_za-ptrace_Set_VL_3904 pass
13572 22:26:22.571455 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13573 22:26:22.571552 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13574 22:26:22.571658 arm64_za-ptrace_Set_VL_3920 pass
13575 22:26:22.575763 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13576 22:26:22.576116 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13577 22:26:22.576229 arm64_za-ptrace_Set_VL_3936 pass
13578 22:26:22.576344 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13579 22:26:22.576442 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13580 22:26:22.576793 arm64_za-ptrace_Set_VL_3952 pass
13581 22:26:22.576958 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13582 22:26:22.577099 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13583 22:26:22.577207 arm64_za-ptrace_Set_VL_3968 pass
13584 22:26:22.577317 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13585 22:26:22.577411 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13586 22:26:22.577521 arm64_za-ptrace_Set_VL_3984 pass
13587 22:26:22.577626 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13588 22:26:22.577755 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13589 22:26:22.577847 arm64_za-ptrace_Set_VL_4000 pass
13590 22:26:22.577936 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13591 22:26:22.578033 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13592 22:26:22.578117 arm64_za-ptrace_Set_VL_4016 pass
13593 22:26:22.578215 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13594 22:26:22.578304 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13595 22:26:22.578392 arm64_za-ptrace_Set_VL_4032 pass
13596 22:26:22.578475 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13597 22:26:22.578744 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13598 22:26:22.578864 arm64_za-ptrace_Set_VL_4048 pass
13599 22:26:22.578963 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13600 22:26:22.579076 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13601 22:26:22.579174 arm64_za-ptrace_Set_VL_4064 pass
13602 22:26:22.579284 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13603 22:26:22.579381 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13604 22:26:22.579475 arm64_za-ptrace_Set_VL_4080 pass
13605 22:26:22.579586 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13606 22:26:22.579683 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13607 22:26:22.579778 arm64_za-ptrace_Set_VL_4096 pass
13608 22:26:22.583760 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13609 22:26:22.584101 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13610 22:26:22.584216 arm64_za-ptrace_Set_VL_4112 pass
13611 22:26:22.584329 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13612 22:26:22.584427 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13613 22:26:22.584538 arm64_za-ptrace_Set_VL_4128 pass
13614 22:26:22.584648 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13615 22:26:22.584759 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13616 22:26:22.584869 arm64_za-ptrace_Set_VL_4144 pass
13617 22:26:22.584980 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13618 22:26:22.585092 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13619 22:26:22.585413 arm64_za-ptrace_Set_VL_4160 pass
13620 22:26:22.585531 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13621 22:26:22.585644 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13622 22:26:22.585765 arm64_za-ptrace_Set_VL_4176 pass
13623 22:26:22.585876 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13624 22:26:22.585986 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13625 22:26:22.586308 arm64_za-ptrace_Set_VL_4192 pass
13626 22:26:22.586464 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13627 22:26:22.586632 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13628 22:26:22.586748 arm64_za-ptrace_Set_VL_4208 pass
13629 22:26:22.586859 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13630 22:26:22.586971 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13631 22:26:22.587081 arm64_za-ptrace_Set_VL_4224 pass
13632 22:26:22.587190 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13633 22:26:22.587300 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13634 22:26:22.587411 arm64_za-ptrace_Set_VL_4240 pass
13635 22:26:22.591840 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13636 22:26:22.592292 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13637 22:26:22.592741 arm64_za-ptrace_Set_VL_4256 pass
13638 22:26:22.592852 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13639 22:26:22.592947 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13640 22:26:22.593031 arm64_za-ptrace_Set_VL_4272 pass
13641 22:26:22.593123 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13642 22:26:22.593215 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13643 22:26:22.593509 arm64_za-ptrace_Set_VL_4288 pass
13644 22:26:22.593673 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13645 22:26:22.593819 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13646 22:26:22.593906 arm64_za-ptrace_Set_VL_4304 pass
13647 22:26:22.593986 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13648 22:26:22.594064 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13649 22:26:22.594146 arm64_za-ptrace_Set_VL_4320 pass
13650 22:26:22.594250 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13651 22:26:22.594341 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13652 22:26:22.594426 arm64_za-ptrace_Set_VL_4336 pass
13653 22:26:22.594513 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13654 22:26:22.594610 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13655 22:26:22.594697 arm64_za-ptrace_Set_VL_4352 pass
13656 22:26:22.594801 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13657 22:26:22.595123 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13658 22:26:22.595226 arm64_za-ptrace_Set_VL_4368 pass
13659 22:26:22.598039 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13660 22:26:22.598138 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13661 22:26:22.598205 arm64_za-ptrace_Set_VL_4384 pass
13662 22:26:22.598268 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13663 22:26:22.598332 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13664 22:26:22.598395 arm64_za-ptrace_Set_VL_4400 pass
13665 22:26:22.598456 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13666 22:26:22.598517 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13667 22:26:22.598578 arm64_za-ptrace_Set_VL_4416 pass
13668 22:26:22.598639 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13669 22:26:22.603757 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13670 22:26:22.604503 arm64_za-ptrace_Set_VL_4432 pass
13671 22:26:22.604616 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13672 22:26:22.604710 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13673 22:26:22.604802 arm64_za-ptrace_Set_VL_4448 pass
13674 22:26:22.605002 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13675 22:26:22.605115 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13676 22:26:22.605207 arm64_za-ptrace_Set_VL_4464 pass
13677 22:26:22.605296 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13678 22:26:22.605386 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13679 22:26:22.605474 arm64_za-ptrace_Set_VL_4480 pass
13680 22:26:22.605582 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13681 22:26:22.605685 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13682 22:26:22.605782 arm64_za-ptrace_Set_VL_4496 pass
13683 22:26:22.605870 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13684 22:26:22.605975 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13685 22:26:22.606065 arm64_za-ptrace_Set_VL_4512 pass
13686 22:26:22.606153 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13687 22:26:22.606258 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13688 22:26:22.606351 arm64_za-ptrace_Set_VL_4528 pass
13689 22:26:22.606455 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13690 22:26:22.606560 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13691 22:26:22.606663 arm64_za-ptrace_Set_VL_4544 pass
13692 22:26:22.606767 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13693 22:26:22.607139 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13694 22:26:22.607247 arm64_za-ptrace_Set_VL_4560 pass
13695 22:26:22.607353 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13696 22:26:22.607444 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13697 22:26:22.607547 arm64_za-ptrace_Set_VL_4576 pass
13698 22:26:22.607650 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13699 22:26:22.611874 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13700 22:26:22.612024 arm64_za-ptrace_Set_VL_4592 pass
13701 22:26:22.612155 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13702 22:26:22.612318 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13703 22:26:22.612484 arm64_za-ptrace_Set_VL_4608 pass
13704 22:26:22.612625 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13705 22:26:22.612941 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13706 22:26:22.613363 arm64_za-ptrace_Set_VL_4624 pass
13707 22:26:22.623314 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13708 22:26:22.623468 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13709 22:26:22.623627 arm64_za-ptrace_Set_VL_4640 pass
13710 22:26:22.623744 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13711 22:26:22.623866 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13712 22:26:22.623981 arm64_za-ptrace_Set_VL_4656 pass
13713 22:26:22.624110 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13714 22:26:22.624445 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13715 22:26:22.624562 arm64_za-ptrace_Set_VL_4672 pass
13716 22:26:22.624656 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13717 22:26:22.624759 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13718 22:26:22.624851 arm64_za-ptrace_Set_VL_4688 pass
13719 22:26:22.624947 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13720 22:26:22.625034 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13721 22:26:22.625392 arm64_za-ptrace_Set_VL_4704 pass
13722 22:26:22.625504 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13723 22:26:22.625633 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13724 22:26:22.625767 arm64_za-ptrace_Set_VL_4720 pass
13725 22:26:22.625894 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13726 22:26:22.625996 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13727 22:26:22.626119 arm64_za-ptrace_Set_VL_4736 pass
13728 22:26:22.626248 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13729 22:26:22.626365 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13730 22:26:22.626683 arm64_za-ptrace_Set_VL_4752 pass
13731 22:26:22.626787 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13732 22:26:22.626893 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13733 22:26:22.627015 arm64_za-ptrace_Set_VL_4768 pass
13734 22:26:22.627125 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13735 22:26:22.627257 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13736 22:26:22.627373 arm64_za-ptrace_Set_VL_4784 pass
13737 22:26:22.627482 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13738 22:26:22.631718 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13739 22:26:22.632091 arm64_za-ptrace_Set_VL_4800 pass
13740 22:26:22.632236 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13741 22:26:22.632390 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13742 22:26:22.632508 arm64_za-ptrace_Set_VL_4816 pass
13743 22:26:22.632637 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13744 22:26:22.632766 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13745 22:26:22.632891 arm64_za-ptrace_Set_VL_4832 pass
13746 22:26:22.633010 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13747 22:26:22.633105 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13748 22:26:22.633211 arm64_za-ptrace_Set_VL_4848 pass
13749 22:26:22.633302 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13750 22:26:22.633417 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13751 22:26:22.633538 arm64_za-ptrace_Set_VL_4864 pass
13752 22:26:22.633678 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13753 22:26:22.633797 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13754 22:26:22.633923 arm64_za-ptrace_Set_VL_4880 pass
13755 22:26:22.634030 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13756 22:26:22.634328 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13757 22:26:22.634435 arm64_za-ptrace_Set_VL_4896 pass
13758 22:26:22.634537 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13759 22:26:22.634862 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13760 22:26:22.634964 arm64_za-ptrace_Set_VL_4912 pass
13761 22:26:22.635046 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13762 22:26:22.635146 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13763 22:26:22.635236 arm64_za-ptrace_Set_VL_4928 pass
13764 22:26:22.635338 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13765 22:26:22.635632 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13766 22:26:22.635731 arm64_za-ptrace_Set_VL_4944 pass
13767 22:26:22.639726 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13768 22:26:22.640078 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13769 22:26:22.640219 arm64_za-ptrace_Set_VL_4960 pass
13770 22:26:22.640367 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13771 22:26:22.640518 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13772 22:26:22.640649 arm64_za-ptrace_Set_VL_4976 pass
13773 22:26:22.640809 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13774 22:26:22.640908 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13775 22:26:22.641028 arm64_za-ptrace_Set_VL_4992 pass
13776 22:26:22.641138 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13777 22:26:22.641244 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13778 22:26:22.641349 arm64_za-ptrace_Set_VL_5008 pass
13779 22:26:22.641689 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13780 22:26:22.641796 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13781 22:26:22.641903 arm64_za-ptrace_Set_VL_5024 pass
13782 22:26:22.642003 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13783 22:26:22.642130 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13784 22:26:22.642239 arm64_za-ptrace_Set_VL_5040 pass
13785 22:26:22.642344 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13786 22:26:22.642675 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13787 22:26:22.642773 arm64_za-ptrace_Set_VL_5056 pass
13788 22:26:22.642904 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13789 22:26:22.643180 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13790 22:26:22.643286 arm64_za-ptrace_Set_VL_5072 pass
13791 22:26:22.643391 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13792 22:26:22.643513 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13793 22:26:22.643611 arm64_za-ptrace_Set_VL_5088 pass
13794 22:26:22.647739 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13795 22:26:22.648118 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13796 22:26:22.648274 arm64_za-ptrace_Set_VL_5104 pass
13797 22:26:22.648477 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13798 22:26:22.648689 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13799 22:26:22.648794 arm64_za-ptrace_Set_VL_5120 pass
13800 22:26:22.648904 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13801 22:26:22.649013 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13802 22:26:22.649134 arm64_za-ptrace_Set_VL_5136 pass
13803 22:26:22.649228 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13804 22:26:22.649331 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13805 22:26:22.649447 arm64_za-ptrace_Set_VL_5152 pass
13806 22:26:22.649586 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13807 22:26:22.649704 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13808 22:26:22.649814 arm64_za-ptrace_Set_VL_5168 pass
13809 22:26:22.649918 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13810 22:26:22.650051 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13811 22:26:22.650155 arm64_za-ptrace_Set_VL_5184 pass
13812 22:26:22.650251 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13813 22:26:22.650356 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13814 22:26:22.650452 arm64_za-ptrace_Set_VL_5200 pass
13815 22:26:22.650555 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13816 22:26:22.650643 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13817 22:26:22.650744 arm64_za-ptrace_Set_VL_5216 pass
13818 22:26:22.650859 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13819 22:26:22.651331 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13820 22:26:22.651434 arm64_za-ptrace_Set_VL_5232 pass
13821 22:26:22.651560 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13822 22:26:22.651655 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13823 22:26:22.655740 arm64_za-ptrace_Set_VL_5248 pass
13824 22:26:22.656077 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13825 22:26:22.656206 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13826 22:26:22.656333 arm64_za-ptrace_Set_VL_5264 pass
13827 22:26:22.656462 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13828 22:26:22.656586 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13829 22:26:22.656711 arm64_za-ptrace_Set_VL_5280 pass
13830 22:26:22.656867 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13831 22:26:22.657222 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13832 22:26:22.657325 arm64_za-ptrace_Set_VL_5296 pass
13833 22:26:22.657467 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13834 22:26:22.657597 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13835 22:26:22.657705 arm64_za-ptrace_Set_VL_5312 pass
13836 22:26:22.657823 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13837 22:26:22.657938 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13838 22:26:22.658041 arm64_za-ptrace_Set_VL_5328 pass
13839 22:26:22.658153 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13840 22:26:22.658485 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13841 22:26:22.658588 arm64_za-ptrace_Set_VL_5344 pass
13842 22:26:22.658694 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13843 22:26:22.658796 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13844 22:26:22.658935 arm64_za-ptrace_Set_VL_5360 pass
13845 22:26:22.659052 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13846 22:26:22.659176 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13847 22:26:22.659318 arm64_za-ptrace_Set_VL_5376 pass
13848 22:26:22.659631 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13849 22:26:22.659712 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13850 22:26:22.659776 arm64_za-ptrace_Set_VL_5392 pass
13851 22:26:22.663948 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13852 22:26:22.664088 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13853 22:26:22.664393 arm64_za-ptrace_Set_VL_5408 pass
13854 22:26:22.664504 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13855 22:26:22.664603 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13856 22:26:22.664706 arm64_za-ptrace_Set_VL_5424 pass
13857 22:26:22.665019 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13858 22:26:22.665139 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13859 22:26:22.665254 arm64_za-ptrace_Set_VL_5440 pass
13860 22:26:22.665359 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
13861 22:26:22.665477 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
13862 22:26:22.665600 arm64_za-ptrace_Set_VL_5456 pass
13863 22:26:22.665713 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
13864 22:26:22.665841 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
13865 22:26:22.665939 arm64_za-ptrace_Set_VL_5472 pass
13866 22:26:22.666047 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
13867 22:26:22.666186 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
13868 22:26:22.666305 arm64_za-ptrace_Set_VL_5488 pass
13869 22:26:22.666422 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
13870 22:26:22.666543 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
13871 22:26:22.666661 arm64_za-ptrace_Set_VL_5504 pass
13872 22:26:22.666789 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
13873 22:26:22.666905 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
13874 22:26:22.667045 arm64_za-ptrace_Set_VL_5520 pass
13875 22:26:22.667150 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
13876 22:26:22.667280 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
13877 22:26:22.667397 arm64_za-ptrace_Set_VL_5536 pass
13878 22:26:22.667511 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
13879 22:26:22.667634 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
13880 22:26:22.667705 arm64_za-ptrace_Set_VL_5552 pass
13881 22:26:22.671749 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
13882 22:26:22.672040 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
13883 22:26:22.672144 arm64_za-ptrace_Set_VL_5568 pass
13884 22:26:22.672466 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
13885 22:26:22.672578 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
13886 22:26:22.672692 arm64_za-ptrace_Set_VL_5584 pass
13887 22:26:22.672796 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
13888 22:26:22.672915 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
13889 22:26:22.673008 arm64_za-ptrace_Set_VL_5600 pass
13890 22:26:22.673117 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
13891 22:26:22.673252 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
13892 22:26:22.673372 arm64_za-ptrace_Set_VL_5616 pass
13893 22:26:22.673503 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
13894 22:26:22.673607 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
13895 22:26:22.673737 arm64_za-ptrace_Set_VL_5632 pass
13896 22:26:22.673840 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
13897 22:26:22.673949 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
13898 22:26:22.674026 arm64_za-ptrace_Set_VL_5648 pass
13899 22:26:22.685664 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
13900 22:26:22.686016 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
13901 22:26:22.686198 arm64_za-ptrace_Set_VL_5664 pass
13902 22:26:22.686418 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
13903 22:26:22.686614 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
13904 22:26:22.686972 arm64_za-ptrace_Set_VL_5680 pass
13905 22:26:22.687077 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
13906 22:26:22.687394 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
13907 22:26:22.687514 arm64_za-ptrace_Set_VL_5696 pass
13908 22:26:22.687600 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
13909 22:26:22.687682 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
13910 22:26:22.687773 arm64_za-ptrace_Set_VL_5712 pass
13911 22:26:22.687859 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
13912 22:26:22.687965 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
13913 22:26:22.688267 arm64_za-ptrace_Set_VL_5728 pass
13914 22:26:22.688381 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
13915 22:26:22.688488 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
13916 22:26:22.688597 arm64_za-ptrace_Set_VL_5744 pass
13917 22:26:22.688695 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
13918 22:26:22.688817 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
13919 22:26:22.688921 arm64_za-ptrace_Set_VL_5760 pass
13920 22:26:22.689039 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
13921 22:26:22.689140 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
13922 22:26:22.689271 arm64_za-ptrace_Set_VL_5776 pass
13923 22:26:22.689381 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
13924 22:26:22.689508 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
13925 22:26:22.689611 arm64_za-ptrace_Set_VL_5792 pass
13926 22:26:22.689746 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
13927 22:26:22.689850 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
13928 22:26:22.689983 arm64_za-ptrace_Set_VL_5808 pass
13929 22:26:22.690089 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
13930 22:26:22.690189 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
13931 22:26:22.690312 arm64_za-ptrace_Set_VL_5824 pass
13932 22:26:22.690443 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
13933 22:26:22.690554 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
13934 22:26:22.690652 arm64_za-ptrace_Set_VL_5840 pass
13935 22:26:22.690739 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
13936 22:26:22.690842 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
13937 22:26:22.690942 arm64_za-ptrace_Set_VL_5856 pass
13938 22:26:22.691051 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
13939 22:26:22.691175 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
13940 22:26:22.691279 arm64_za-ptrace_Set_VL_5872 pass
13941 22:26:22.691376 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
13942 22:26:22.691513 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
13943 22:26:22.691621 arm64_za-ptrace_Set_VL_5888 pass
13944 22:26:22.691720 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
13945 22:26:22.695795 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
13946 22:26:22.696119 arm64_za-ptrace_Set_VL_5904 pass
13947 22:26:22.696229 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
13948 22:26:22.696336 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
13949 22:26:22.696428 arm64_za-ptrace_Set_VL_5920 pass
13950 22:26:22.696531 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
13951 22:26:22.696637 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
13952 22:26:22.696741 arm64_za-ptrace_Set_VL_5936 pass
13953 22:26:22.696845 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
13954 22:26:22.697150 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
13955 22:26:22.697269 arm64_za-ptrace_Set_VL_5952 pass
13956 22:26:22.697400 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
13957 22:26:22.697529 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
13958 22:26:22.697628 arm64_za-ptrace_Set_VL_5968 pass
13959 22:26:22.697763 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
13960 22:26:22.697891 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
13961 22:26:22.698199 arm64_za-ptrace_Set_VL_5984 pass
13962 22:26:22.698312 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
13963 22:26:22.698433 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
13964 22:26:22.698571 arm64_za-ptrace_Set_VL_6000 pass
13965 22:26:22.698677 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
13966 22:26:22.698766 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
13967 22:26:22.698870 arm64_za-ptrace_Set_VL_6016 pass
13968 22:26:22.698963 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
13969 22:26:22.699043 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
13970 22:26:22.699137 arm64_za-ptrace_Set_VL_6032 pass
13971 22:26:22.699236 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
13972 22:26:22.699322 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
13973 22:26:22.699418 arm64_za-ptrace_Set_VL_6048 pass
13974 22:26:22.699738 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
13975 22:26:22.703747 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
13976 22:26:22.704160 arm64_za-ptrace_Set_VL_6064 pass
13977 22:26:22.704314 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
13978 22:26:22.704453 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
13979 22:26:22.704657 arm64_za-ptrace_Set_VL_6080 pass
13980 22:26:22.704822 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
13981 22:26:22.704959 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
13982 22:26:22.705069 arm64_za-ptrace_Set_VL_6096 pass
13983 22:26:22.705179 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
13984 22:26:22.705271 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
13985 22:26:22.705389 arm64_za-ptrace_Set_VL_6112 pass
13986 22:26:22.705492 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
13987 22:26:22.705629 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
13988 22:26:22.705736 arm64_za-ptrace_Set_VL_6128 pass
13989 22:26:22.705866 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
13990 22:26:22.705974 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
13991 22:26:22.706079 arm64_za-ptrace_Set_VL_6144 pass
13992 22:26:22.706183 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
13993 22:26:22.706292 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
13994 22:26:22.706384 arm64_za-ptrace_Set_VL_6160 pass
13995 22:26:22.706485 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
13996 22:26:22.706594 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
13997 22:26:22.706719 arm64_za-ptrace_Set_VL_6176 pass
13998 22:26:22.706838 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
13999 22:26:22.706974 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14000 22:26:22.707079 arm64_za-ptrace_Set_VL_6192 pass
14001 22:26:22.707189 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14002 22:26:22.707292 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14003 22:26:22.707393 arm64_za-ptrace_Set_VL_6208 pass
14004 22:26:22.707693 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14005 22:26:22.711735 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14006 22:26:22.712117 arm64_za-ptrace_Set_VL_6224 pass
14007 22:26:22.712326 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14008 22:26:22.712597 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14009 22:26:22.712794 arm64_za-ptrace_Set_VL_6240 pass
14010 22:26:22.712963 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14011 22:26:22.713128 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14012 22:26:22.713342 arm64_za-ptrace_Set_VL_6256 pass
14013 22:26:22.713607 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14014 22:26:22.713836 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14015 22:26:22.714018 arm64_za-ptrace_Set_VL_6272 pass
14016 22:26:22.714185 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14017 22:26:22.714390 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14018 22:26:22.714617 arm64_za-ptrace_Set_VL_6288 pass
14019 22:26:22.714821 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14020 22:26:22.715031 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14021 22:26:22.715264 arm64_za-ptrace_Set_VL_6304 pass
14022 22:26:22.715484 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14023 22:26:22.715709 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14024 22:26:22.715861 arm64_za-ptrace_Set_VL_6320 pass
14025 22:26:22.715983 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14026 22:26:22.716101 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14027 22:26:22.716220 arm64_za-ptrace_Set_VL_6336 pass
14028 22:26:22.716336 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14029 22:26:22.716451 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14030 22:26:22.716567 arm64_za-ptrace_Set_VL_6352 pass
14031 22:26:22.716711 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14032 22:26:22.716835 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14033 22:26:22.716955 arm64_za-ptrace_Set_VL_6368 pass
14034 22:26:22.717073 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14035 22:26:22.717190 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14036 22:26:22.717307 arm64_za-ptrace_Set_VL_6384 pass
14037 22:26:22.717423 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14038 22:26:22.723780 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14039 22:26:22.724277 arm64_za-ptrace_Set_VL_6400 pass
14040 22:26:22.724592 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14041 22:26:22.724832 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14042 22:26:22.725092 arm64_za-ptrace_Set_VL_6416 pass
14043 22:26:22.725353 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14044 22:26:22.725746 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14045 22:26:22.725952 arm64_za-ptrace_Set_VL_6432 pass
14046 22:26:22.726137 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14047 22:26:22.726351 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14048 22:26:22.726567 arm64_za-ptrace_Set_VL_6448 pass
14049 22:26:22.726805 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14050 22:26:22.727000 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14051 22:26:22.727185 arm64_za-ptrace_Set_VL_6464 pass
14052 22:26:22.727397 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14053 22:26:22.727622 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14054 22:26:22.727841 arm64_za-ptrace_Set_VL_6480 pass
14055 22:26:22.728019 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14056 22:26:22.728167 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14057 22:26:22.728312 arm64_za-ptrace_Set_VL_6496 pass
14058 22:26:22.728455 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14059 22:26:22.728599 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14060 22:26:22.728743 arm64_za-ptrace_Set_VL_6512 pass
14061 22:26:22.728885 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14062 22:26:22.729028 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14063 22:26:22.729213 arm64_za-ptrace_Set_VL_6528 pass
14064 22:26:22.729351 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14065 22:26:22.729493 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14066 22:26:22.729637 arm64_za-ptrace_Set_VL_6544 pass
14067 22:26:22.729795 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14068 22:26:22.729940 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14069 22:26:22.730084 arm64_za-ptrace_Set_VL_6560 pass
14070 22:26:22.731856 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14071 22:26:22.732288 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14072 22:26:22.732443 arm64_za-ptrace_Set_VL_6576 pass
14073 22:26:22.732539 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14074 22:26:22.732624 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14075 22:26:22.732724 arm64_za-ptrace_Set_VL_6592 pass
14076 22:26:22.732810 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14077 22:26:22.733136 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14078 22:26:22.733400 arm64_za-ptrace_Set_VL_6608 pass
14079 22:26:22.733536 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14080 22:26:22.733623 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14081 22:26:22.733716 arm64_za-ptrace_Set_VL_6624 pass
14082 22:26:22.733819 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14083 22:26:22.733908 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14084 22:26:22.733995 arm64_za-ptrace_Set_VL_6640 pass
14085 22:26:22.734094 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14086 22:26:22.734182 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14087 22:26:22.734267 arm64_za-ptrace_Set_VL_6656 pass
14088 22:26:22.734350 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14089 22:26:22.734449 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14090 22:26:22.734535 arm64_za-ptrace_Set_VL_6672 pass
14091 22:26:22.734869 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14092 22:26:22.749750 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14093 22:26:22.750018 arm64_za-ptrace_Set_VL_6688 pass
14094 22:26:22.750142 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14095 22:26:22.750265 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14096 22:26:22.750371 arm64_za-ptrace_Set_VL_6704 pass
14097 22:26:22.750465 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14098 22:26:22.750572 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14099 22:26:22.750672 arm64_za-ptrace_Set_VL_6720 pass
14100 22:26:22.750772 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14101 22:26:22.750873 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14102 22:26:22.750984 arm64_za-ptrace_Set_VL_6736 pass
14103 22:26:22.751101 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14104 22:26:22.751200 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14105 22:26:22.751301 arm64_za-ptrace_Set_VL_6752 pass
14106 22:26:22.751399 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14107 22:26:22.751509 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14108 22:26:22.751607 arm64_za-ptrace_Set_VL_6768 pass
14109 22:26:22.751692 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14110 22:26:22.751762 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14111 22:26:22.751841 arm64_za-ptrace_Set_VL_6784 pass
14112 22:26:22.751910 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14113 22:26:22.751972 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14114 22:26:22.752035 arm64_za-ptrace_Set_VL_6800 pass
14115 22:26:22.752094 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14116 22:26:22.752153 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14117 22:26:22.752213 arm64_za-ptrace_Set_VL_6816 pass
14118 22:26:22.752273 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14119 22:26:22.752333 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14120 22:26:22.752393 arm64_za-ptrace_Set_VL_6832 pass
14121 22:26:22.752452 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14122 22:26:22.752511 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14123 22:26:22.752571 arm64_za-ptrace_Set_VL_6848 pass
14124 22:26:22.752631 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14125 22:26:22.752690 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14126 22:26:22.752750 arm64_za-ptrace_Set_VL_6864 pass
14127 22:26:22.752810 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14128 22:26:22.752869 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14129 22:26:22.752928 arm64_za-ptrace_Set_VL_6880 pass
14130 22:26:22.752990 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14131 22:26:22.753051 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14132 22:26:22.753327 arm64_za-ptrace_Set_VL_6896 pass
14133 22:26:22.753429 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14134 22:26:22.753509 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14135 22:26:22.753586 arm64_za-ptrace_Set_VL_6912 pass
14136 22:26:22.753672 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14137 22:26:22.753749 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14138 22:26:22.753825 arm64_za-ptrace_Set_VL_6928 pass
14139 22:26:22.753902 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14140 22:26:22.753977 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14141 22:26:22.754039 arm64_za-ptrace_Set_VL_6944 pass
14142 22:26:22.754100 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14143 22:26:22.754161 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14144 22:26:22.754221 arm64_za-ptrace_Set_VL_6960 pass
14145 22:26:22.754281 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14146 22:26:22.754342 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14147 22:26:22.755851 arm64_za-ptrace_Set_VL_6976 pass
14148 22:26:22.756169 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14149 22:26:22.756271 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14150 22:26:22.756592 arm64_za-ptrace_Set_VL_6992 pass
14151 22:26:22.756699 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14152 22:26:22.756814 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14153 22:26:22.756913 arm64_za-ptrace_Set_VL_7008 pass
14154 22:26:22.757010 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14155 22:26:22.757116 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14156 22:26:22.757198 arm64_za-ptrace_Set_VL_7024 pass
14157 22:26:22.757279 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14158 22:26:22.757362 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14159 22:26:22.757470 arm64_za-ptrace_Set_VL_7040 pass
14160 22:26:22.757558 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14161 22:26:22.757640 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14162 22:26:22.757757 arm64_za-ptrace_Set_VL_7056 pass
14163 22:26:22.757883 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14164 22:26:22.757967 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14165 22:26:22.758049 arm64_za-ptrace_Set_VL_7072 pass
14166 22:26:22.758159 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14167 22:26:22.758260 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14168 22:26:22.758381 arm64_za-ptrace_Set_VL_7088 pass
14169 22:26:22.758455 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14170 22:26:22.758530 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14171 22:26:22.758603 arm64_za-ptrace_Set_VL_7104 pass
14172 22:26:22.758686 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14173 22:26:22.758785 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14174 22:26:22.759081 arm64_za-ptrace_Set_VL_7120 pass
14175 22:26:22.759185 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14176 22:26:22.759273 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14177 22:26:22.759401 arm64_za-ptrace_Set_VL_7136 pass
14178 22:26:22.759500 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14179 22:26:22.759599 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14180 22:26:22.759698 arm64_za-ptrace_Set_VL_7152 pass
14181 22:26:22.759979 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14182 22:26:22.760072 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14183 22:26:22.767907 arm64_za-ptrace_Set_VL_7168 pass
14184 22:26:22.768296 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14185 22:26:22.768402 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14186 22:26:22.768485 arm64_za-ptrace_Set_VL_7184 pass
14187 22:26:22.768578 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14188 22:26:22.768660 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14189 22:26:22.768738 arm64_za-ptrace_Set_VL_7200 pass
14190 22:26:22.768830 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14191 22:26:22.768911 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14192 22:26:22.768991 arm64_za-ptrace_Set_VL_7216 pass
14193 22:26:22.769082 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14194 22:26:22.769161 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14195 22:26:22.769257 arm64_za-ptrace_Set_VL_7232 pass
14196 22:26:22.769343 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14197 22:26:22.769445 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14198 22:26:22.769521 arm64_za-ptrace_Set_VL_7248 pass
14199 22:26:22.770152 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14200 22:26:22.770261 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14201 22:26:22.770354 arm64_za-ptrace_Set_VL_7264 pass
14202 22:26:22.770441 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14203 22:26:22.770528 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14204 22:26:22.770614 arm64_za-ptrace_Set_VL_7280 pass
14205 22:26:22.770696 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14206 22:26:22.770802 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14207 22:26:22.770889 arm64_za-ptrace_Set_VL_7296 pass
14208 22:26:22.770972 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14209 22:26:22.771054 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14210 22:26:22.771144 arm64_za-ptrace_Set_VL_7312 pass
14211 22:26:22.771227 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14212 22:26:22.771327 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14213 22:26:22.771413 arm64_za-ptrace_Set_VL_7328 pass
14214 22:26:22.771770 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14215 22:26:22.771873 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14216 22:26:22.771983 arm64_za-ptrace_Set_VL_7344 pass
14217 22:26:22.772076 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14218 22:26:22.776091 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14219 22:26:22.776283 arm64_za-ptrace_Set_VL_7360 pass
14220 22:26:22.776597 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14221 22:26:22.776706 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14222 22:26:22.776792 arm64_za-ptrace_Set_VL_7376 pass
14223 22:26:22.776892 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14224 22:26:22.776975 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14225 22:26:22.777065 arm64_za-ptrace_Set_VL_7392 pass
14226 22:26:22.777151 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14227 22:26:22.777253 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14228 22:26:22.777341 arm64_za-ptrace_Set_VL_7408 pass
14229 22:26:22.777424 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14230 22:26:22.777524 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14231 22:26:22.777603 arm64_za-ptrace_Set_VL_7424 pass
14232 22:26:22.777690 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14233 22:26:22.777767 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14234 22:26:22.777858 arm64_za-ptrace_Set_VL_7440 pass
14235 22:26:22.777936 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14236 22:26:22.778013 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14237 22:26:22.778089 arm64_za-ptrace_Set_VL_7456 pass
14238 22:26:22.778182 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14239 22:26:22.778265 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14240 22:26:22.778357 arm64_za-ptrace_Set_VL_7472 pass
14241 22:26:22.778464 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14242 22:26:22.778570 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14243 22:26:22.778655 arm64_za-ptrace_Set_VL_7488 pass
14244 22:26:22.778739 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14245 22:26:22.778838 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14246 22:26:22.778934 arm64_za-ptrace_Set_VL_7504 pass
14247 22:26:22.779020 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14248 22:26:22.779114 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14249 22:26:22.779519 arm64_za-ptrace_Set_VL_7520 pass
14250 22:26:22.779624 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14251 22:26:22.779697 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14252 22:26:22.779761 arm64_za-ptrace_Set_VL_7536 pass
14253 22:26:22.779823 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14254 22:26:22.780064 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14255 22:26:22.780153 arm64_za-ptrace_Set_VL_7552 pass
14256 22:26:22.784131 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14257 22:26:22.784447 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14258 22:26:22.784559 arm64_za-ptrace_Set_VL_7568 pass
14259 22:26:22.784649 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14260 22:26:22.784756 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14261 22:26:22.784849 arm64_za-ptrace_Set_VL_7584 pass
14262 22:26:22.784954 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14263 22:26:22.785047 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14264 22:26:22.785150 arm64_za-ptrace_Set_VL_7600 pass
14265 22:26:22.785238 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14266 22:26:22.785338 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14267 22:26:22.785639 arm64_za-ptrace_Set_VL_7616 pass
14268 22:26:22.785751 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14269 22:26:22.785854 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14270 22:26:22.785956 arm64_za-ptrace_Set_VL_7632 pass
14271 22:26:22.786246 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14272 22:26:22.786352 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14273 22:26:22.786455 arm64_za-ptrace_Set_VL_7648 pass
14274 22:26:22.786559 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14275 22:26:22.786648 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14276 22:26:22.786754 arm64_za-ptrace_Set_VL_7664 pass
14277 22:26:22.786856 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14278 22:26:22.786959 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14279 22:26:22.787058 arm64_za-ptrace_Set_VL_7680 pass
14280 22:26:22.787382 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14281 22:26:22.787485 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14282 22:26:22.787608 arm64_za-ptrace_Set_VL_7696 pass
14283 22:26:22.787717 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14284 22:26:22.811731 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14285 22:26:22.812016 arm64_za-ptrace_Set_VL_7712 pass
14286 22:26:22.812116 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14287 22:26:22.812208 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14288 22:26:22.812298 arm64_za-ptrace_Set_VL_7728 pass
14289 22:26:22.812609 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14290 22:26:22.812720 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14291 22:26:22.812812 arm64_za-ptrace_Set_VL_7744 pass
14292 22:26:22.812900 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14293 22:26:22.813005 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14294 22:26:22.813095 arm64_za-ptrace_Set_VL_7760 pass
14295 22:26:22.813185 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14296 22:26:22.813272 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14297 22:26:22.813375 arm64_za-ptrace_Set_VL_7776 pass
14298 22:26:22.813755 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14299 22:26:22.814190 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14300 22:26:22.814370 arm64_za-ptrace_Set_VL_7792 pass
14301 22:26:22.814513 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14302 22:26:22.814892 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14303 22:26:22.815050 arm64_za-ptrace_Set_VL_7808 pass
14304 22:26:22.815257 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14305 22:26:22.815368 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14306 22:26:22.815458 arm64_za-ptrace_Set_VL_7824 pass
14307 22:26:22.815547 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14308 22:26:22.815635 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14309 22:26:22.815737 arm64_za-ptrace_Set_VL_7840 pass
14310 22:26:22.815848 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14311 22:26:22.815940 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14312 22:26:22.816027 arm64_za-ptrace_Set_VL_7856 pass
14313 22:26:22.816111 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14314 22:26:22.816193 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14315 22:26:22.816275 arm64_za-ptrace_Set_VL_7872 pass
14316 22:26:22.819900 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14317 22:26:22.820088 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14318 22:26:22.820608 arm64_za-ptrace_Set_VL_7888 pass
14319 22:26:22.820711 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14320 22:26:22.820795 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14321 22:26:22.820866 arm64_za-ptrace_Set_VL_7904 pass
14322 22:26:22.820979 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14323 22:26:22.821324 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14324 22:26:22.821432 arm64_za-ptrace_Set_VL_7920 pass
14325 22:26:22.821537 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14326 22:26:22.821639 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14327 22:26:22.821730 arm64_za-ptrace_Set_VL_7936 pass
14328 22:26:22.821810 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14329 22:26:22.821915 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14330 22:26:22.822015 arm64_za-ptrace_Set_VL_7952 pass
14331 22:26:22.822104 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14332 22:26:22.822207 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14333 22:26:22.822305 arm64_za-ptrace_Set_VL_7968 pass
14334 22:26:22.822420 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14335 22:26:22.822547 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14336 22:26:22.822654 arm64_za-ptrace_Set_VL_7984 pass
14337 22:26:22.822782 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14338 22:26:22.822886 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14339 22:26:22.822998 arm64_za-ptrace_Set_VL_8000 pass
14340 22:26:22.823120 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14341 22:26:22.823223 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14342 22:26:22.823307 arm64_za-ptrace_Set_VL_8016 pass
14343 22:26:22.823429 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14344 22:26:22.823518 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14345 22:26:22.823634 arm64_za-ptrace_Set_VL_8032 pass
14346 22:26:22.823730 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14347 22:26:22.827802 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14348 22:26:22.828250 arm64_za-ptrace_Set_VL_8048 pass
14349 22:26:22.828442 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14350 22:26:22.828558 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14351 22:26:22.828650 arm64_za-ptrace_Set_VL_8064 pass
14352 22:26:22.828836 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14353 22:26:22.828932 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14354 22:26:22.829020 arm64_za-ptrace_Set_VL_8080 pass
14355 22:26:22.829106 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14356 22:26:22.829313 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14357 22:26:22.829406 arm64_za-ptrace_Set_VL_8096 pass
14358 22:26:22.829491 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14359 22:26:22.829594 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14360 22:26:22.829692 arm64_za-ptrace_Set_VL_8112 pass
14361 22:26:22.829780 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14362 22:26:22.829881 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14363 22:26:22.829984 arm64_za-ptrace_Set_VL_8128 pass
14364 22:26:22.830073 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14365 22:26:22.830175 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14366 22:26:22.830506 arm64_za-ptrace_Set_VL_8144 pass
14367 22:26:22.830612 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14368 22:26:22.830718 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14369 22:26:22.830809 arm64_za-ptrace_Set_VL_8160 pass
14370 22:26:22.830910 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14371 22:26:22.831011 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14372 22:26:22.831112 arm64_za-ptrace_Set_VL_8176 pass
14373 22:26:22.831416 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14374 22:26:22.831534 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14375 22:26:22.831639 arm64_za-ptrace_Set_VL_8192 pass
14376 22:26:22.831744 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14377 22:26:22.836034 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14378 22:26:22.836245 arm64_za-ptrace pass
14379 22:26:22.836586 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14380 22:26:22.836777 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14381 22:26:22.836985 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14382 22:26:22.837189 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14383 22:26:22.837400 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14384 22:26:22.837907 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14385 22:26:22.838562 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14386 22:26:22.838741 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14387 22:26:22.838897 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14388 22:26:22.839070 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14389 22:26:22.839562 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14390 22:26:22.839750 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14391 22:26:22.839879 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14392 22:26:22.839999 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14393 22:26:22.846078 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14394 22:26:22.846236 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14395 22:26:22.846347 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14396 22:26:22.846442 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14397 22:26:22.846532 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14398 22:26:22.846619 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14399 22:26:22.846705 arm64_check_buffer_fill fail
14400 22:26:22.846786 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14401 22:26:22.846870 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14402 22:26:22.847151 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14403 22:26:22.847255 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14404 22:26:22.847360 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14405 22:26:22.847485 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14406 22:26:22.847608 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14407 22:26:22.851732 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14408 22:26:22.852067 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14409 22:26:22.852375 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14410 22:26:22.852711 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14411 22:26:22.853073 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14412 22:26:22.853183 arm64_check_child_memory fail
14413 22:26:22.853274 arm64_check_gcr_el1_cswitch fail
14414 22:26:22.853609 arm64_check_ksm_options fail
14415 22:26:22.853723 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14416 22:26:22.853830 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14417 22:26:22.854342 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14418 22:26:22.854660 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14419 22:26:22.854848 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14420 22:26:22.863825 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14421 22:26:22.864217 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14422 22:26:22.864561 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14423 22:26:22.864886 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14424 22:26:22.865226 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14425 22:26:22.865359 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14426 22:26:22.865898 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14427 22:26:22.866215 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14428 22:26:22.866534 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14429 22:26:22.866879 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14430 22:26:22.867210 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14431 22:26:22.867549 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14432 22:26:22.871900 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14433 22:26:22.872306 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14434 22:26:22.872782 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14435 22:26:22.872943 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14436 22:26:22.873328 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14437 22:26:22.873487 arm64_check_mmap_options fail
14438 22:26:22.873616 arm64_check_prctl_check_basic_read pass
14439 22:26:22.873822 arm64_check_prctl_NONE pass
14440 22:26:22.873999 arm64_check_prctl_SYNC pass
14441 22:26:22.874165 arm64_check_prctl_ASYNC pass
14442 22:26:22.874336 arm64_check_prctl_SYNC_ASYNC pass
14443 22:26:22.874503 arm64_check_prctl pass
14444 22:26:22.874935 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14445 22:26:22.875137 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14446 22:26:22.875321 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14447 22:26:22.875493 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14448 22:26:22.875682 arm64_check_tags_inclusion fail
14449 22:26:22.875829 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14450 22:26:22.875951 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14451 22:26:22.876073 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14452 22:26:22.876194 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14453 22:26:22.876313 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14454 22:26:22.876708 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14455 22:26:22.876873 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14456 22:26:22.879771 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14457 22:26:22.880100 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14458 22:26:22.880427 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14459 22:26:22.880730 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14460 22:26:22.880849 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14461 22:26:22.881166 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14462 22:26:22.881296 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14463 22:26:22.881614 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14464 22:26:22.881748 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14465 22:26:22.882049 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14466 22:26:22.882408 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14467 22:26:22.882710 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14468 22:26:22.883025 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14469 22:26:22.883127 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14470 22:26:22.883436 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14471 22:26:22.883556 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14472 22:26:22.887723 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14473 22:26:22.888046 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14474 22:26:22.888366 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14475 22:26:22.888687 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14476 22:26:22.888816 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14477 22:26:22.889146 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14478 22:26:22.889269 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14479 22:26:22.889614 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14480 22:26:22.889956 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14481 22:26:22.890081 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14482 22:26:22.890380 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14483 22:26:22.890698 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14484 22:26:22.891022 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14485 22:26:22.891141 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14486 22:26:22.891263 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14487 22:26:22.891590 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14488 22:26:22.895753 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14489 22:26:22.896105 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14490 22:26:22.896501 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14491 22:26:22.896622 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14492 22:26:22.896741 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14493 22:26:22.897111 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14494 22:26:22.897246 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14495 22:26:22.897547 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14496 22:26:22.897881 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14497 22:26:22.898006 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14498 22:26:22.898298 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14499 22:26:22.898625 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14500 22:26:22.898740 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14501 22:26:22.899110 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14502 22:26:22.899439 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14503 22:26:22.899568 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14504 22:26:22.903897 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14505 22:26:22.904226 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14506 22:26:22.904613 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14507 22:26:22.904749 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14508 22:26:22.905054 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14509 22:26:22.905357 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14510 22:26:22.905449 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14511 22:26:22.919548 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14512 22:26:22.919800 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14513 22:26:22.919895 arm64_check_user_mem pass
14514 22:26:22.919982 arm64_btitest_nohint_func_call_using_br_x0 pass
14515 22:26:22.920068 arm64_btitest_nohint_func_call_using_br_x16 pass
14516 22:26:22.920154 arm64_btitest_nohint_func_call_using_blr pass
14517 22:26:22.920239 arm64_btitest_bti_none_func_call_using_br_x0 pass
14518 22:26:22.920326 arm64_btitest_bti_none_func_call_using_br_x16 pass
14519 22:26:22.920410 arm64_btitest_bti_none_func_call_using_blr pass
14520 22:26:22.920495 arm64_btitest_bti_c_func_call_using_br_x0 pass
14521 22:26:22.920581 arm64_btitest_bti_c_func_call_using_br_x16 pass
14522 22:26:22.921200 arm64_btitest_bti_c_func_call_using_blr pass
14523 22:26:22.921312 arm64_btitest_bti_j_func_call_using_br_x0 pass
14524 22:26:22.921400 arm64_btitest_bti_j_func_call_using_br_x16 pass
14525 22:26:22.921486 arm64_btitest_bti_j_func_call_using_blr pass
14526 22:26:22.921571 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14527 22:26:22.921705 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14528 22:26:22.921811 arm64_btitest_bti_jc_func_call_using_blr pass
14529 22:26:22.921900 arm64_btitest_paciasp_func_call_using_br_x0 pass
14530 22:26:22.921985 arm64_btitest_paciasp_func_call_using_br_x16 pass
14531 22:26:22.922089 arm64_btitest_paciasp_func_call_using_blr pass
14532 22:26:22.922177 arm64_btitest pass
14533 22:26:22.922263 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14534 22:26:22.922350 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14535 22:26:22.922435 arm64_nobtitest_nohint_func_call_using_blr pass
14536 22:26:22.922518 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14537 22:26:22.922616 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14538 22:26:22.922703 arm64_nobtitest_bti_none_func_call_using_blr pass
14539 22:26:22.922803 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14540 22:26:22.922889 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14541 22:26:22.922987 arm64_nobtitest_bti_c_func_call_using_blr pass
14542 22:26:22.923284 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14543 22:26:22.923393 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14544 22:26:22.923510 arm64_nobtitest_bti_j_func_call_using_blr pass
14545 22:26:22.927969 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14546 22:26:22.928370 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14547 22:26:22.928476 arm64_nobtitest_bti_jc_func_call_using_blr pass
14548 22:26:22.928571 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14549 22:26:22.928678 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14550 22:26:22.928763 arm64_nobtitest_paciasp_func_call_using_blr pass
14551 22:26:22.929036 arm64_nobtitest pass
14552 22:26:22.929127 arm64_hwcap_cpuinfo_match_RNG pass
14553 22:26:22.929196 arm64_hwcap_sigill_RNG pass
14554 22:26:22.929267 arm64_hwcap_cpuinfo_match_SME pass
14555 22:26:22.929347 arm64_hwcap_sigill_SME pass
14556 22:26:22.929641 arm64_hwcap_cpuinfo_match_SVE pass
14557 22:26:22.929767 arm64_hwcap_sigill_SVE pass
14558 22:26:22.929879 arm64_hwcap_cpuinfo_match_SVE_2 pass
14559 22:26:22.929973 arm64_hwcap_sigill_SVE_2 pass
14560 22:26:22.930066 arm64_hwcap_cpuinfo_match_SVE_AES pass
14561 22:26:22.930176 arm64_hwcap_sigill_SVE_AES pass
14562 22:26:22.930302 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14563 22:26:22.930410 arm64_hwcap_sigill_SVE2_PMULL pass
14564 22:26:22.930511 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14565 22:26:22.930594 arm64_hwcap_sigill_SVE2_BITPERM pass
14566 22:26:22.930673 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14567 22:26:22.930792 arm64_hwcap_sigill_SVE2_SHA3 pass
14568 22:26:22.930898 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14569 22:26:22.930985 arm64_hwcap_sigill_SVE2_SM4 pass
14570 22:26:22.931059 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14571 22:26:22.931147 arm64_hwcap_sigill_SVE2_I8MM pass
14572 22:26:22.931256 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14573 22:26:22.931350 arm64_hwcap_sigill_SVE2_F32MM pass
14574 22:26:22.931441 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14575 22:26:22.931528 arm64_hwcap_sigill_SVE2_F64MM pass
14576 22:26:22.931632 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14577 22:26:22.931721 arm64_hwcap_sigill_SVE2_BF16 pass
14578 22:26:22.935994 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14579 22:26:22.936396 arm64_hwcap_sigill_SVE2_EBF16 skip
14580 22:26:22.936487 arm64_hwcap pass
14581 22:26:22.936551 arm64_ptrace_read_tpidr_one pass
14582 22:26:22.936610 arm64_ptrace_write_tpidr_one pass
14583 22:26:22.936669 arm64_ptrace_verify_tpidr_one pass
14584 22:26:22.936727 arm64_ptrace_count_tpidrs pass
14585 22:26:22.937022 arm64_ptrace_tpidr2_write pass
14586 22:26:22.937144 arm64_ptrace_tpidr2_read pass
14587 22:26:22.937248 arm64_ptrace_write_tpidr_only pass
14588 22:26:22.937359 arm64_ptrace pass
14589 22:26:22.937473 arm64_syscall-abi_getpid_FPSIMD pass
14590 22:26:22.937570 arm64_syscall-abi_getpid_SVE_VL_256 pass
14591 22:26:22.937667 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14592 22:26:22.937759 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14593 22:26:22.937851 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14594 22:26:22.937937 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14595 22:26:22.938041 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14596 22:26:22.938132 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14597 22:26:22.938227 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14598 22:26:22.938551 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14599 22:26:22.938657 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14600 22:26:22.938739 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14601 22:26:22.938821 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14602 22:26:22.939091 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14603 22:26:22.939211 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14604 22:26:22.939302 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14605 22:26:22.939615 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14606 22:26:22.939735 arm64_syscall-abi_getpid_SVE_VL_240 pass
14607 22:26:22.939801 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14608 22:26:22.939888 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14609 22:26:22.944131 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14610 22:26:22.944365 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14611 22:26:22.944643 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14612 22:26:22.944746 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14613 22:26:22.944838 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14614 22:26:22.944928 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14615 22:26:22.945233 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14616 22:26:22.945327 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14617 22:26:22.945392 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14618 22:26:22.945452 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14619 22:26:22.945697 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14620 22:26:22.945809 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14621 22:26:22.945884 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14622 22:26:22.945947 arm64_syscall-abi_getpid_SVE_VL_224 pass
14623 22:26:22.946216 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14624 22:26:22.946326 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14625 22:26:22.946407 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14626 22:26:22.946472 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14627 22:26:22.946770 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14628 22:26:22.946885 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14629 22:26:22.946979 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14630 22:26:22.947067 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14631 22:26:22.947355 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14632 22:26:22.947462 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14633 22:26:22.947562 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14634 22:26:22.947661 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14635 22:26:22.947744 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14636 22:26:22.947821 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14637 22:26:22.952022 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14638 22:26:22.952475 arm64_syscall-abi_getpid_SVE_VL_208 pass
14639 22:26:22.952587 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14640 22:26:22.952696 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14641 22:26:22.952818 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14642 22:26:22.952919 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14643 22:26:22.953026 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14644 22:26:22.953155 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14645 22:26:22.953260 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14646 22:26:22.953382 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14647 22:26:22.953700 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14648 22:26:22.953823 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14649 22:26:22.953940 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14650 22:26:22.954051 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14651 22:26:22.954410 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14652 22:26:22.954532 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14653 22:26:22.954642 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14654 22:26:22.954968 arm64_syscall-abi_getpid_SVE_VL_192 pass
14655 22:26:22.955066 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14656 22:26:22.955164 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14657 22:26:22.955455 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14658 22:26:22.955563 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14659 22:26:22.955674 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14660 22:26:22.964017 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14661 22:26:22.964260 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14662 22:26:22.964596 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14663 22:26:22.964697 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14664 22:26:22.964788 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14665 22:26:22.964876 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14666 22:26:22.965182 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14667 22:26:22.965285 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14668 22:26:22.965373 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14669 22:26:22.965470 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14670 22:26:22.965584 arm64_syscall-abi_getpid_SVE_VL_176 pass
14671 22:26:22.965697 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14672 22:26:22.965822 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14673 22:26:22.965930 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14674 22:26:22.966059 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14675 22:26:22.966349 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14676 22:26:22.966464 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14677 22:26:22.966772 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14678 22:26:22.966873 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14679 22:26:22.966966 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14680 22:26:22.967518 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14681 22:26:22.975328 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14682 22:26:22.975549 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14683 22:26:22.975635 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14684 22:26:22.975707 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14685 22:26:22.975967 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14686 22:26:22.976281 arm64_syscall-abi_getpid_SVE_VL_160 pass
14687 22:26:22.976415 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14688 22:26:22.976526 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14689 22:26:22.976634 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14690 22:26:22.976931 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14691 22:26:22.977040 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14692 22:26:22.977353 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14693 22:26:22.977478 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14694 22:26:22.977602 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14695 22:26:22.977742 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14696 22:26:22.978082 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14697 22:26:22.978202 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14698 22:26:22.978316 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14699 22:26:22.978444 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14700 22:26:22.978551 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14701 22:26:22.978686 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14702 22:26:22.978798 arm64_syscall-abi_getpid_SVE_VL_144 pass
14703 22:26:22.978921 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14704 22:26:22.979049 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14705 22:26:22.979168 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14706 22:26:22.979274 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14707 22:26:22.979569 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14708 22:26:22.983833 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14709 22:26:22.984145 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14710 22:26:22.984239 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14711 22:26:22.984339 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14712 22:26:22.984477 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14713 22:26:22.984727 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14714 22:26:22.984892 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14715 22:26:22.985370 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14716 22:26:22.985664 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14717 22:26:22.985833 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14718 22:26:22.986016 arm64_syscall-abi_getpid_SVE_VL_128 pass
14719 22:26:22.986166 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14720 22:26:22.986346 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14721 22:26:22.986519 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14722 22:26:22.986675 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14723 22:26:22.986865 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14724 22:26:22.987033 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14725 22:26:22.987201 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14726 22:26:22.987392 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14727 22:26:22.987541 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14728 22:26:22.987742 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14729 22:26:22.987924 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14730 22:26:22.988129 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14731 22:26:22.988307 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14732 22:26:22.992497 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14733 22:26:22.992994 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14734 22:26:22.993123 arm64_syscall-abi_getpid_SVE_VL_112 pass
14735 22:26:22.993217 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14736 22:26:22.993303 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14737 22:26:22.993391 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14738 22:26:22.993523 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14739 22:26:22.993619 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14740 22:26:22.993714 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14741 22:26:22.993801 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14742 22:26:22.993908 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14743 22:26:22.994001 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14744 22:26:22.994090 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14745 22:26:22.994178 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14746 22:26:22.994281 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14747 22:26:22.994370 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14748 22:26:22.994475 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14749 22:26:22.994564 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14750 22:26:22.994666 arm64_syscall-abi_getpid_SVE_VL_96 pass
14751 22:26:22.994983 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14752 22:26:22.995121 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14753 22:26:22.995250 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14754 22:26:22.995367 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14755 22:26:22.995457 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14756 22:26:22.995563 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14757 22:26:22.995869 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14758 22:26:22.999999 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14759 22:26:23.000126 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14760 22:26:23.000739 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14761 22:26:23.001108 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14762 22:26:23.001534 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14763 22:26:23.001661 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14764 22:26:23.001754 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14765 22:26:23.001842 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14766 22:26:23.001930 arm64_syscall-abi_getpid_SVE_VL_80 pass
14767 22:26:23.002016 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14768 22:26:23.002102 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14769 22:26:23.002204 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14770 22:26:23.002436 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14771 22:26:23.002532 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14772 22:26:23.002639 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14773 22:26:23.002730 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14774 22:26:23.002817 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14775 22:26:23.003025 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14776 22:26:23.003205 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14777 22:26:23.003298 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14778 22:26:23.003399 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14779 22:26:23.003722 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14780 22:26:23.003824 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14781 22:26:23.008364 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14782 22:26:23.008624 arm64_syscall-abi_getpid_SVE_VL_64 pass
14783 22:26:23.008764 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14784 22:26:23.008936 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14785 22:26:23.009073 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14786 22:26:23.009195 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14787 22:26:23.009308 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14788 22:26:23.009399 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14789 22:26:23.009504 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14790 22:26:23.009608 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14791 22:26:23.009723 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14792 22:26:23.010021 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14793 22:26:23.010126 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14794 22:26:23.010300 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14795 22:26:23.010658 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14796 22:26:23.010797 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14797 22:26:23.010949 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14798 22:26:23.011085 arm64_syscall-abi_getpid_SVE_VL_48 pass
14799 22:26:23.011232 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14800 22:26:23.011353 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14801 22:26:23.011458 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14802 22:26:23.011611 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14803 22:26:23.015938 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14804 22:26:23.016297 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14805 22:26:23.016402 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14806 22:26:23.016490 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14807 22:26:23.016588 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14808 22:26:23.016692 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14809 22:26:23.016780 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14810 22:26:23.017101 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14811 22:26:23.017209 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14812 22:26:23.017314 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14813 22:26:23.017402 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14814 22:26:23.017504 arm64_syscall-abi_getpid_SVE_VL_32 pass
14815 22:26:23.017590 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14816 22:26:23.017898 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14817 22:26:23.018004 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14818 22:26:23.018090 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14819 22:26:23.018188 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14820 22:26:23.018473 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14821 22:26:23.018560 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14822 22:26:23.018642 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14823 22:26:23.018711 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14824 22:26:23.018784 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14825 22:26:23.018854 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14826 22:26:23.018931 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14827 22:26:23.019233 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14828 22:26:23.019620 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14829 22:26:23.019735 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14830 22:26:23.019835 arm64_syscall-abi_getpid_SVE_VL_16 pass
14831 22:26:23.019929 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14832 22:26:23.023738 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14833 22:26:23.030387 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14834 22:26:23.030776 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14835 22:26:23.030885 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14836 22:26:23.030992 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14837 22:26:23.031172 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14838 22:26:23.031289 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14839 22:26:23.031396 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14840 22:26:23.031504 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14841 22:26:23.031852 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14842 22:26:23.031990 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14843 22:26:23.032324 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14844 22:26:23.032469 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14845 22:26:23.032612 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14846 22:26:23.032720 arm64_syscall-abi_sched_yield_FPSIMD pass
14847 22:26:23.032832 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14848 22:26:23.032941 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14849 22:26:23.033079 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14850 22:26:23.033216 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14851 22:26:23.033495 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14852 22:26:23.033635 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14853 22:26:23.033764 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14854 22:26:23.033878 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14855 22:26:23.034193 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14856 22:26:23.034375 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14857 22:26:23.034691 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14858 22:26:23.034800 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14859 22:26:23.034909 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
14860 22:26:23.035128 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
14861 22:26:23.035339 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
14862 22:26:23.035454 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
14863 22:26:23.035565 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
14864 22:26:23.039849 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
14865 22:26:23.040279 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
14866 22:26:23.040387 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
14867 22:26:23.040477 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
14868 22:26:23.040575 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
14869 22:26:23.040697 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
14870 22:26:23.041144 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
14871 22:26:23.041357 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
14872 22:26:23.041735 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
14873 22:26:23.041890 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
14874 22:26:23.042052 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
14875 22:26:23.042189 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
14876 22:26:23.042322 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
14877 22:26:23.042475 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
14878 22:26:23.042604 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
14879 22:26:23.042766 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
14880 22:26:23.042941 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
14881 22:26:23.043082 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
14882 22:26:23.043281 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
14883 22:26:23.043450 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
14884 22:26:23.043640 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
14885 22:26:23.043760 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
14886 22:26:23.047771 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
14887 22:26:23.048069 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
14888 22:26:23.048393 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
14889 22:26:23.048501 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
14890 22:26:23.048599 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
14891 22:26:23.048727 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
14892 22:26:23.049044 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
14893 22:26:23.049162 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
14894 22:26:23.049274 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
14895 22:26:23.049367 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
14896 22:26:23.049469 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
14897 22:26:23.049592 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
14898 22:26:23.049734 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
14899 22:26:23.049837 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
14900 22:26:23.050141 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
14901 22:26:23.050256 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
14902 22:26:23.050374 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
14903 22:26:23.050679 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
14904 22:26:23.051002 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
14905 22:26:23.051103 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
14906 22:26:23.051206 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
14907 22:26:23.051501 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
14908 22:26:23.051642 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
14909 22:26:23.055762 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
14910 22:26:23.056081 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
14911 22:26:23.056187 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
14912 22:26:23.056502 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
14913 22:26:23.056620 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
14914 22:26:23.056722 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
14915 22:26:23.056826 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
14916 22:26:23.057122 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
14917 22:26:23.057226 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
14918 22:26:23.057328 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
14919 22:26:23.057427 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
14920 22:26:23.057756 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
14921 22:26:23.057951 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
14922 22:26:23.058382 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
14923 22:26:23.058592 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
14924 22:26:23.058776 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
14925 22:26:23.059244 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
14926 22:26:23.059449 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
14927 22:26:23.059629 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
14928 22:26:23.059769 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
14929 22:26:23.059890 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
14930 22:26:23.060011 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
14931 22:26:23.060357 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
14932 22:26:23.060442 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
14933 22:26:23.060509 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
14934 22:26:23.063782 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
14935 22:26:23.064133 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
14936 22:26:23.064260 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
14937 22:26:23.064370 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
14938 22:26:23.064476 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
14939 22:26:23.064793 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
14940 22:26:23.064965 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
14941 22:26:23.065166 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
14942 22:26:23.065332 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
14943 22:26:23.065502 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
14944 22:26:23.065688 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
14945 22:26:23.066016 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
14946 22:26:23.066156 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
14947 22:26:23.066302 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
14948 22:26:23.066412 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
14949 22:26:23.066610 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
14950 22:26:23.066935 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
14951 22:26:23.067058 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
14952 22:26:23.067153 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
14953 22:26:23.067257 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
14954 22:26:23.067465 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
14955 22:26:23.067622 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
14956 22:26:23.071929 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
14957 22:26:23.072241 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
14958 22:26:23.072367 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
14959 22:26:23.072512 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
14960 22:26:23.072640 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
14961 22:26:23.072751 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
14962 22:26:23.073071 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
14963 22:26:23.073180 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
14964 22:26:23.073306 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
14965 22:26:23.073425 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
14966 22:26:23.073592 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
14967 22:26:23.073691 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
14968 22:26:23.073786 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
14969 22:26:23.074069 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
14970 22:26:23.074177 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
14971 22:26:23.074299 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
14972 22:26:23.074384 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
14973 22:26:23.082616 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
14974 22:26:23.084522 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
14975 22:26:23.084627 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
14976 22:26:23.084722 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
14977 22:26:23.084837 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
14978 22:26:23.084939 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
14979 22:26:23.085027 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
14980 22:26:23.085109 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
14981 22:26:23.085195 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
14982 22:26:23.085285 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
14983 22:26:23.085367 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
14984 22:26:23.085454 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
14985 22:26:23.085544 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
14986 22:26:23.085834 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
14987 22:26:23.085943 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
14988 22:26:23.086048 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
14989 22:26:23.086162 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
14990 22:26:23.086264 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
14991 22:26:23.086358 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
14992 22:26:23.086445 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
14993 22:26:23.086529 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
14994 22:26:23.086636 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
14995 22:26:23.086733 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
14996 22:26:23.086817 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
14997 22:26:23.086897 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
14998 22:26:23.086980 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
14999 22:26:23.087064 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15000 22:26:23.087165 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15001 22:26:23.087255 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15002 22:26:23.087354 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15003 22:26:23.087442 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15004 22:26:23.087567 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15005 22:26:23.091776 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15006 22:26:23.092150 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15007 22:26:23.092260 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15008 22:26:23.092593 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15009 22:26:23.092698 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15010 22:26:23.092803 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15011 22:26:23.092910 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15012 22:26:23.092987 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15013 22:26:23.093083 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15014 22:26:23.093354 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15015 22:26:23.093463 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15016 22:26:23.093585 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15017 22:26:23.093680 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15018 22:26:23.093775 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15019 22:26:23.094080 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15020 22:26:23.094180 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15021 22:26:23.094490 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15022 22:26:23.094585 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15023 22:26:23.094691 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15024 22:26:23.094782 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15025 22:26:23.094879 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15026 22:26:23.095102 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15027 22:26:23.095218 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15028 22:26:23.095556 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15029 22:26:23.095670 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15030 22:26:23.099829 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15031 22:26:23.099966 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15032 22:26:23.100307 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15033 22:26:23.100432 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15034 22:26:23.100556 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15035 22:26:23.100684 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15036 22:26:23.100832 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15037 22:26:23.100980 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15038 22:26:23.101128 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15039 22:26:23.101516 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15040 22:26:23.101673 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15041 22:26:23.101820 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15042 22:26:23.101960 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15043 22:26:23.102107 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15044 22:26:23.102254 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15045 22:26:23.102611 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15046 22:26:23.102789 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15047 22:26:23.102944 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15048 22:26:23.103226 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15049 22:26:23.103410 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15050 22:26:23.103559 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15051 22:26:23.103732 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15052 22:26:23.107964 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15053 22:26:23.108140 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15054 22:26:23.108321 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15055 22:26:23.108479 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15056 22:26:23.108627 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15057 22:26:23.108770 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15058 22:26:23.108915 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15059 22:26:23.109292 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15060 22:26:23.109428 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15061 22:26:23.109572 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15062 22:26:23.109734 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15063 22:26:23.109939 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15064 22:26:23.110078 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15065 22:26:23.110222 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15066 22:26:23.110344 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15067 22:26:23.110483 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15068 22:26:23.110625 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15069 22:26:23.110773 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15070 22:26:23.110918 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15071 22:26:23.111064 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15072 22:26:23.111514 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15073 22:26:23.111663 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15074 22:26:23.111779 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15075 22:26:23.117237 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15076 22:26:23.117391 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15077 22:26:23.117496 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15078 22:26:23.117579 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15079 22:26:23.117683 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15080 22:26:23.117916 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15081 22:26:23.118038 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15082 22:26:23.118164 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15083 22:26:23.118273 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15084 22:26:23.118379 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15085 22:26:23.118702 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15086 22:26:23.118825 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15087 22:26:23.118939 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15088 22:26:23.119041 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15089 22:26:23.119129 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15090 22:26:23.119215 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15091 22:26:23.119305 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15092 22:26:23.119416 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15093 22:26:23.119544 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15094 22:26:23.119657 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15095 22:26:23.119745 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15096 22:26:23.119811 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15097 22:26:23.119886 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15098 22:26:23.119965 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15099 22:26:23.120043 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15100 22:26:23.123796 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15101 22:26:23.124114 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15102 22:26:23.124225 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15103 22:26:23.124335 arm64_syscall-abi pass
15104 22:26:23.124434 arm64_tpidr2_default_value pass
15105 22:26:23.124540 arm64_tpidr2_write_read pass
15106 22:26:23.124635 arm64_tpidr2_write_sleep_read pass
15107 22:26:23.124740 arm64_tpidr2_write_fork_read pass
15108 22:26:23.124827 arm64_tpidr2_write_clone_read pass
15109 22:26:23.124911 arm64_tpidr2 pass
15110 22:26:23.137309 + ../../utils/send-to-lava.sh ./output/result.txt
15111 22:26:23.191151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15113 22:26:23.191947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15114 22:26:23.230460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15116 22:26:23.231213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15117 22:26:23.267426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15118 22:26:23.267882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15120 22:26:23.313590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15122 22:26:23.314095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15123 22:26:23.359521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15124 22:26:23.359925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15126 22:26:23.401880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15127 22:26:23.402453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15129 22:26:23.438648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15131 22:26:23.439070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15132 22:26:23.475146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15133 22:26:23.475674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15135 22:26:23.521223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15136 22:26:23.521684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15138 22:26:23.577364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15139 22:26:23.577801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15141 22:26:23.631158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15143 22:26:23.631648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15144 22:26:23.676579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15146 22:26:23.677054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15147 22:26:23.715635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15148 22:26:23.716070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15150 22:26:23.757409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15151 22:26:23.757855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15153 22:26:23.804910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15154 22:26:23.805332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15156 22:26:23.857610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15158 22:26:23.858048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15159 22:26:23.893433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15160 22:26:23.893853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15162 22:26:23.941201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15163 22:26:23.941612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15165 22:26:23.989921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15167 22:26:23.990387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15168 22:26:24.037128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15169 22:26:24.037557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15171 22:26:24.083297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15172 22:26:24.083884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15174 22:26:24.130492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15175 22:26:24.130915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15177 22:26:24.168521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15178 22:26:24.168971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15180 22:26:24.211509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15182 22:26:24.211977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15183 22:26:24.252426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15184 22:26:24.252845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15186 22:26:24.298792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15187 22:26:24.299220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15189 22:26:24.338532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15190 22:26:24.338988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15192 22:26:24.382461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15193 22:26:24.382830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15195 22:26:24.422065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15196 22:26:24.422521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15198 22:26:24.463016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15199 22:26:24.463509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15201 22:26:24.506745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15202 22:26:24.507316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15204 22:26:24.547323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15206 22:26:24.548016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15207 22:26:24.591632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15208 22:26:24.592035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15210 22:26:24.642393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15211 22:26:24.642856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15213 22:26:24.690223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15215 22:26:24.690691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15216 22:26:24.735774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15218 22:26:24.736432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15219 22:26:24.779351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15220 22:26:24.779768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15222 22:26:24.823463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15223 22:26:24.823913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15225 22:26:24.875370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15226 22:26:24.875763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15228 22:26:24.926751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15229 22:26:24.927143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15231 22:26:24.969966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15232 22:26:24.970398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15234 22:26:25.012098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15236 22:26:25.012554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15237 22:26:25.058025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15238 22:26:25.058606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15240 22:26:25.103668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15241 22:26:25.104093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15243 22:26:25.148847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15244 22:26:25.149300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15246 22:26:25.193259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15248 22:26:25.193718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15249 22:26:25.241806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15250 22:26:25.242235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15252 22:26:25.289101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15253 22:26:25.289550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15255 22:26:25.335038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15257 22:26:25.335427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15258 22:26:25.378355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15259 22:26:25.378761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15261 22:26:25.422766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15262 22:26:25.423209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15264 22:26:25.466257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15265 22:26:25.466673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15267 22:26:25.505975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15269 22:26:25.506451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15270 22:26:25.543430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15271 22:26:25.543886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15273 22:26:25.585710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15275 22:26:25.586165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15276 22:26:25.636600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15277 22:26:25.637056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15279 22:26:25.686956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15280 22:26:25.687327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15282 22:26:25.728558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15283 22:26:25.728976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15285 22:26:25.765026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15286 22:26:25.765526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15288 22:26:25.802141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15289 22:26:25.802565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15291 22:26:25.846237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15293 22:26:25.846645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15294 22:26:25.890925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15296 22:26:25.891506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15297 22:26:25.934486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15298 22:26:25.934870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15300 22:26:25.984057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15302 22:26:25.984718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15303 22:26:26.034007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15305 22:26:26.034454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15306 22:26:26.077090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15307 22:26:26.077630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15309 22:26:26.124623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15311 22:26:26.125047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15312 22:26:26.169874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15313 22:26:26.170343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15315 22:26:26.214009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15317 22:26:26.214440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15318 22:26:26.260001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15320 22:26:26.260574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15321 22:26:26.317740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15322 22:26:26.318237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15324 22:26:26.373925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15325 22:26:26.374343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15327 22:26:26.422050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15329 22:26:26.422535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15330 22:26:26.461629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15331 22:26:26.462066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15333 22:26:26.502203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15334 22:26:26.502649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15336 22:26:26.550309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15338 22:26:26.550739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15339 22:26:26.597001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15340 22:26:26.597438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15342 22:26:26.640483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15343 22:26:26.640939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15345 22:26:26.679777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15346 22:26:26.680221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15348 22:26:26.722483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15349 22:26:26.722898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15351 22:26:26.769923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15352 22:26:26.770362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15354 22:26:26.814169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15356 22:26:26.814606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15357 22:26:26.873817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15358 22:26:26.874258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15360 22:26:26.925905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15361 22:26:26.926363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15363 22:26:26.979331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15364 22:26:26.979703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15366 22:26:27.023997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15368 22:26:27.024597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15369 22:26:27.064170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15371 22:26:27.064646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15372 22:26:27.109299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15373 22:26:27.109756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15375 22:26:27.145893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15376 22:26:27.146328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15378 22:26:27.181359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15379 22:26:27.181790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15381 22:26:27.218269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15382 22:26:27.218699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15384 22:26:27.257615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15385 22:26:27.258058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15387 22:26:27.294660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15388 22:26:27.295069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15390 22:26:27.330519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15391 22:26:27.330904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15393 22:26:27.369116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15395 22:26:27.369589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15396 22:26:27.410362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15397 22:26:27.410807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15399 22:26:27.450003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15400 22:26:27.450436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15402 22:26:27.490785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15403 22:26:27.491214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15405 22:26:27.536356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15406 22:26:27.536788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15408 22:26:27.570991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15409 22:26:27.571410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15411 22:26:27.608212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15413 22:26:27.608680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15414 22:26:27.646248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15415 22:26:27.646792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15417 22:26:27.687086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15418 22:26:27.687506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15420 22:26:27.723866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15422 22:26:27.724351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15423 22:26:27.763271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15424 22:26:27.763712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15426 22:26:27.805427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15428 22:26:27.805834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15429 22:26:27.847531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15430 22:26:27.847931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15432 22:26:27.886541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15434 22:26:27.887127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15435 22:26:27.926985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15436 22:26:27.927482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15438 22:26:27.977225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15439 22:26:27.977703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15441 22:26:28.019475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15442 22:26:28.019956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15444 22:26:28.059177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15446 22:26:28.059669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15447 22:26:28.121188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15449 22:26:28.121597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15450 22:26:28.167765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15451 22:26:28.168324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15453 22:26:28.213216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15455 22:26:28.213704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15456 22:26:28.267443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15457 22:26:28.267884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15459 22:26:28.307779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15461 22:26:28.308197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15462 22:26:28.346141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15463 22:26:28.346631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15465 22:26:28.385226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15466 22:26:28.385679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15468 22:26:28.423434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15470 22:26:28.423896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15471 22:26:28.461750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15472 22:26:28.462187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15474 22:26:28.509918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15475 22:26:28.510354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15477 22:26:28.555552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15478 22:26:28.555982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15480 22:26:28.595388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15481 22:26:28.595853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15483 22:26:28.640595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15484 22:26:28.641018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15486 22:26:28.687058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15487 22:26:28.687521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15489 22:26:28.727487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15491 22:26:28.727950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15492 22:26:28.766553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15493 22:26:28.767009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15495 22:26:28.804867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15496 22:26:28.805299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15498 22:26:28.844254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15499 22:26:28.844686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15501 22:26:28.882534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15502 22:26:28.882935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15504 22:26:28.918468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15505 22:26:28.918895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15507 22:26:28.961506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15509 22:26:28.962018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15510 22:26:29.001317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15511 22:26:29.001894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15513 22:26:29.042427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15514 22:26:29.042817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15516 22:26:29.081276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15517 22:26:29.081697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15519 22:26:29.117107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15520 22:26:29.117653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15522 22:26:29.153396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15523 22:26:29.153791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15525 22:26:29.197219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15526 22:26:29.197660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15528 22:26:29.254287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15529 22:26:29.254693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15531 22:26:29.311575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15532 22:26:29.312091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15534 22:26:29.354678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15535 22:26:29.355115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15537 22:26:29.399296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15539 22:26:29.399768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15540 22:26:29.441158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15541 22:26:29.441614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15543 22:26:29.492912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15545 22:26:29.493378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15546 22:26:29.532888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15547 22:26:29.533265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15549 22:26:29.581763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15550 22:26:29.582227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15552 22:26:29.633298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15553 22:26:29.633750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15555 22:26:29.683861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15557 22:26:29.684317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15558 22:26:29.732042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15560 22:26:29.732493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15561 22:26:29.782572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15562 22:26:29.783026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15564 22:26:29.822700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15565 22:26:29.823158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15567 22:26:29.873307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15569 22:26:29.873797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15570 22:26:29.923555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15571 22:26:29.924015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15573 22:26:29.965077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15575 22:26:29.965545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15576 22:26:30.005464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15578 22:26:30.005937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15579 22:26:30.047257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15580 22:26:30.047757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15582 22:26:30.090170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15583 22:26:30.090734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15585 22:26:30.132538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15587 22:26:30.133002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15588 22:26:30.177666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15589 22:26:30.178042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15591 22:26:30.218074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15592 22:26:30.218499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15594 22:26:30.266805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15595 22:26:30.267237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15597 22:26:30.307679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15598 22:26:30.308088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15600 22:26:30.357198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15602 22:26:30.357692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15603 22:26:30.409091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15605 22:26:30.409572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15606 22:26:30.452191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15608 22:26:30.452964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15609 22:26:30.503225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15610 22:26:30.503748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15612 22:26:30.554543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15614 22:26:30.555026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15615 22:26:30.603658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15616 22:26:30.604093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15618 22:26:30.653728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15619 22:26:30.654196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15621 22:26:30.705663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15622 22:26:30.706078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15624 22:26:30.757604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15625 22:26:30.758030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15627 22:26:30.809041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15628 22:26:30.809541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15630 22:26:30.857239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15632 22:26:30.857704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15633 22:26:30.906714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15634 22:26:30.907146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15636 22:26:30.955125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15637 22:26:30.955596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15639 22:26:31.003399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15640 22:26:31.003776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15642 22:26:31.062767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15643 22:26:31.063218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15645 22:26:31.109332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15646 22:26:31.109786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15648 22:26:31.158693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15649 22:26:31.159146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15651 22:26:31.206333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15653 22:26:31.206816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15654 22:26:31.253895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15655 22:26:31.254342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15657 22:26:31.301463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15658 22:26:31.301900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15660 22:26:31.341318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15662 22:26:31.341811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15663 22:26:31.382100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15664 22:26:31.382550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15666 22:26:31.433423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15667 22:26:31.433999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15669 22:26:31.475336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15670 22:26:31.475777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15672 22:26:31.519465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15673 22:26:31.519876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15675 22:26:31.559537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15677 22:26:31.559921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15678 22:26:31.600688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15679 22:26:31.601166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15681 22:26:31.651826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15682 22:26:31.652242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15684 22:26:31.692759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15685 22:26:31.693343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15687 22:26:31.741563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15688 22:26:31.741958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15690 22:26:31.789953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15691 22:26:31.790384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15693 22:26:31.850889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15694 22:26:31.851298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15696 22:26:31.913332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15697 22:26:31.913809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15699 22:26:31.973080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15700 22:26:31.973516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15702 22:26:32.016879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15704 22:26:32.017261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15705 22:26:32.055266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15707 22:26:32.055690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15708 22:26:32.102189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15709 22:26:32.102641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15711 22:26:32.150706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15713 22:26:32.151115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15714 22:26:32.189185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15715 22:26:32.189568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15717 22:26:32.228870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15718 22:26:32.229270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15720 22:26:32.267455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15721 22:26:32.267844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15723 22:26:32.307678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15724 22:26:32.308114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15726 22:26:32.345993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15727 22:26:32.346427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15729 22:26:32.382641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15730 22:26:32.383058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15732 22:26:32.420080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15734 22:26:32.420730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15735 22:26:32.462855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15736 22:26:32.463218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15738 22:26:32.500940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15740 22:26:32.501404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15741 22:26:32.546011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15742 22:26:32.546437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15744 22:26:32.596804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15746 22:26:32.597171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15747 22:26:32.648097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15749 22:26:32.648798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15750 22:26:32.684811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15751 22:26:32.685245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15753 22:26:32.733470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15754 22:26:32.733911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15756 22:26:32.769917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15757 22:26:32.770320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15759 22:26:32.807708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15761 22:26:32.808290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15762 22:26:32.846722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15764 22:26:32.847160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15765 22:26:32.885372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15766 22:26:32.885800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15768 22:26:32.920418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15770 22:26:32.920888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15771 22:26:32.962987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15772 22:26:32.963373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15774 22:26:33.015430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15775 22:26:33.015833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15777 22:26:33.073463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15779 22:26:33.073951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15780 22:26:33.135920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15782 22:26:33.136561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15783 22:26:33.180720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15784 22:26:33.181236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15786 22:26:33.218733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15787 22:26:33.219168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15789 22:26:33.262100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15791 22:26:33.262579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15792 22:26:33.305456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15793 22:26:33.305869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15795 22:26:33.344844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15796 22:26:33.345275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15798 22:26:33.385652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15799 22:26:33.386051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15801 22:26:33.438526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15802 22:26:33.438974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15804 22:26:33.484532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15805 22:26:33.484985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15807 22:26:33.526081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15809 22:26:33.526714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15810 22:26:33.582699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15812 22:26:33.583091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15813 22:26:33.635063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15815 22:26:33.635870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15816 22:26:33.678298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15818 22:26:33.678769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15819 22:26:33.726353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15820 22:26:33.726804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15822 22:26:33.776968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15824 22:26:33.777455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15825 22:26:33.816235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15827 22:26:33.816704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15828 22:26:33.860523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15829 22:26:33.860972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15831 22:26:33.902353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15833 22:26:33.902838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15834 22:26:33.944310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15836 22:26:33.945071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15837 22:26:33.987606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15838 22:26:33.988026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15840 22:26:34.040779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15841 22:26:34.041365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15843 22:26:34.085186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15845 22:26:34.085635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15846 22:26:34.126961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15847 22:26:34.127456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15849 22:26:34.178350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15850 22:26:34.178785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15852 22:26:34.225459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15853 22:26:34.225899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15855 22:26:34.268757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15856 22:26:34.269138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15858 22:26:34.309766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
15860 22:26:34.310230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
15861 22:26:34.353581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
15863 22:26:34.354022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
15864 22:26:34.394205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
15866 22:26:34.394957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
15867 22:26:34.432896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
15868 22:26:34.433310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
15870 22:26:34.487018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
15871 22:26:34.487444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
15873 22:26:34.537604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
15874 22:26:34.538025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
15876 22:26:34.591676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
15877 22:26:34.592112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
15879 22:26:34.640825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
15881 22:26:34.641276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
15882 22:26:34.689679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
15883 22:26:34.690123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
15885 22:26:34.739590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
15886 22:26:34.739982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
15888 22:26:34.781250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
15889 22:26:34.781695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
15891 22:26:34.820927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
15893 22:26:34.821405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
15894 22:26:34.860058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
15896 22:26:34.860536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
15897 22:26:34.906005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
15898 22:26:34.906405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
15900 22:26:34.942996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
15901 22:26:34.943456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
15903 22:26:34.985900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
15904 22:26:34.986377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
15906 22:26:35.039520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
15907 22:26:35.039881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
15909 22:26:35.085631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
15910 22:26:35.086041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
15912 22:26:35.127583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
15914 22:26:35.128071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
15915 22:26:35.175690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
15916 22:26:35.176126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
15918 22:26:35.219059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
15919 22:26:35.219514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
15921 22:26:35.259095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
15922 22:26:35.259488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
15924 22:26:35.309985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
15926 22:26:35.310696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
15927 22:26:35.353539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
15929 22:26:35.354058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
15930 22:26:35.402815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
15931 22:26:35.403252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
15933 22:26:35.458041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
15934 22:26:35.458465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
15936 22:26:35.500863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
15938 22:26:35.501299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
15939 22:26:35.541768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
15940 22:26:35.542201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
15942 22:26:35.590509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
15943 22:26:35.590938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
15945 22:26:35.637724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
15946 22:26:35.638146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
15948 22:26:35.684545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
15949 22:26:35.684925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
15951 22:26:35.720428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
15953 22:26:35.720896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
15954 22:26:35.763288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
15956 22:26:35.763755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
15957 22:26:35.801697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
15959 22:26:35.802158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
15960 22:26:35.841295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
15961 22:26:35.841750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
15963 22:26:35.881898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
15964 22:26:35.882340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
15966 22:26:35.919465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
15967 22:26:35.920004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
15969 22:26:35.957903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
15970 22:26:35.958345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
15972 22:26:36.001281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
15973 22:26:36.001693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
15975 22:26:36.038689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
15977 22:26:36.039155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
15978 22:26:36.074202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
15979 22:26:36.074660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
15981 22:26:36.111014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
15983 22:26:36.111501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
15984 22:26:36.149437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
15985 22:26:36.149948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
15987 22:26:36.194074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
15988 22:26:36.194501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
15990 22:26:36.231780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
15991 22:26:36.232235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
15993 22:26:36.274683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
15994 22:26:36.275091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
15996 22:26:36.321814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
15997 22:26:36.322255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
15999 22:26:36.369559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16000 22:26:36.369978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16002 22:26:36.417464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16004 22:26:36.417901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16005 22:26:36.469945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16007 22:26:36.470366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16008 22:26:36.517437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16009 22:26:36.517857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16011 22:26:36.558095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16013 22:26:36.558573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16014 22:26:36.598698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16016 22:26:36.599112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16017 22:26:36.641310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16018 22:26:36.641694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16020 22:26:36.681140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16021 22:26:36.681509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16023 22:26:36.716984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16024 22:26:36.717370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16026 22:26:36.756279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16028 22:26:36.756785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16029 22:26:36.796211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16031 22:26:36.796742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16032 22:26:36.854181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16033 22:26:36.854646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16035 22:26:36.891343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16037 22:26:36.891828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16038 22:26:36.933175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16040 22:26:36.933588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16041 22:26:36.970179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16043 22:26:36.970839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16044 22:26:37.013884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16045 22:26:37.014418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16047 22:26:37.059744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16048 22:26:37.060303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16050 22:26:37.098935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16051 22:26:37.099350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16053 22:26:37.135777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16054 22:26:37.136207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16056 22:26:37.173043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16057 22:26:37.173439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16059 22:26:37.209522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16060 22:26:37.209903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16062 22:26:37.249739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16063 22:26:37.250279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16065 22:26:37.285767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16066 22:26:37.286214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16068 22:26:37.323283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16069 22:26:37.323688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16071 22:26:37.360310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16072 22:26:37.360696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16074 22:26:37.401271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16075 22:26:37.401832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16077 22:26:37.437354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16078 22:26:37.437839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16080 22:26:37.485030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16082 22:26:37.485419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16083 22:26:37.527714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16084 22:26:37.528110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16086 22:26:37.574745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16087 22:26:37.575142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16089 22:26:37.622557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16090 22:26:37.623037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16092 22:26:37.666376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16093 22:26:37.666819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16095 22:26:37.706784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16096 22:26:37.707176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16098 22:26:37.749763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16099 22:26:37.750150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16101 22:26:37.795084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16102 22:26:37.795469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16104 22:26:37.839175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16105 22:26:37.839559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16107 22:26:37.876747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16108 22:26:37.877161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16110 22:26:37.914201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16112 22:26:37.914666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16113 22:26:37.950876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16114 22:26:37.951226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16116 22:26:37.991308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16118 22:26:37.992060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16119 22:26:38.040116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16121 22:26:38.040581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16122 22:26:38.091065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16123 22:26:38.091457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16125 22:26:38.139097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16127 22:26:38.139549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16128 22:26:38.185161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16129 22:26:38.185623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16131 22:26:38.225804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16132 22:26:38.226358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16134 22:26:38.266217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16135 22:26:38.266638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16137 22:26:38.300831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16138 22:26:38.301333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16140 22:26:38.338680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16141 22:26:38.339079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16143 22:26:38.381159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16144 22:26:38.381689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16146 22:26:38.420850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16147 22:26:38.421389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16149 22:26:38.459656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16151 22:26:38.460283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16152 22:26:38.501800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16154 22:26:38.502287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16155 22:26:38.538572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16156 22:26:38.539078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16158 22:26:38.580093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16160 22:26:38.580678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16161 22:26:38.615235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16162 22:26:38.615715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16164 22:26:38.651615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16165 22:26:38.652042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16167 22:26:38.688604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16168 22:26:38.688992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16170 22:26:38.727328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16172 22:26:38.727807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16173 22:26:38.765612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16175 22:26:38.766086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16176 22:26:38.802684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16178 22:26:38.803152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16179 22:26:38.839130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16180 22:26:38.839556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16182 22:26:38.876324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16183 22:26:38.876823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16185 22:26:38.922239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16187 22:26:38.922730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16188 22:26:38.975850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16189 22:26:38.976257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16191 22:26:39.017609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16192 22:26:39.018053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16194 22:26:39.061316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16196 22:26:39.061795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16197 22:26:39.098837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16198 22:26:39.099339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16200 22:26:39.138900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16201 22:26:39.139459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16203 22:26:39.175910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16205 22:26:39.176400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16206 22:26:39.214052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16207 22:26:39.214511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16209 22:26:39.260016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16211 22:26:39.260600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16212 22:26:39.305857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16213 22:26:39.306292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16215 22:26:39.345438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16217 22:26:39.346226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16218 22:26:39.385868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16219 22:26:39.386388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16221 22:26:39.421579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16222 22:26:39.422087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16224 22:26:39.460654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16225 22:26:39.461123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16227 22:26:39.517696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16228 22:26:39.518092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16230 22:26:39.574028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16231 22:26:39.574466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16233 22:26:39.623456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16234 22:26:39.623903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16236 22:26:39.666680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16237 22:26:39.667114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16239 22:26:39.711983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16241 22:26:39.712421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16242 22:26:39.752902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16243 22:26:39.753311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16245 22:26:39.799823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16247 22:26:39.800244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16248 22:26:39.845791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16249 22:26:39.846307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16251 22:26:39.891008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16253 22:26:39.891539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16254 22:26:39.928108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16256 22:26:39.928864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16257 22:26:39.977314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16258 22:26:39.977745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16260 22:26:40.021198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16261 22:26:40.021708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16263 22:26:40.069348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16265 22:26:40.069786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16266 22:26:40.114146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16267 22:26:40.114583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16269 22:26:40.156081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16271 22:26:40.156540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16272 22:26:40.198086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16273 22:26:40.198527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16275 22:26:40.241607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16276 22:26:40.242046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16278 22:26:40.289589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16280 22:26:40.290078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16281 22:26:40.333866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16282 22:26:40.334276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16284 22:26:40.377060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16285 22:26:40.377452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16287 22:26:40.432670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16289 22:26:40.433056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16290 22:26:40.485958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16291 22:26:40.486386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16293 22:26:40.528615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16294 22:26:40.529013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16296 22:26:40.575640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16297 22:26:40.576076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16299 22:26:40.615744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16300 22:26:40.616132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16302 22:26:40.664960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16303 22:26:40.665367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16305 22:26:40.705108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16306 22:26:40.705525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16308 22:26:40.748327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16309 22:26:40.748776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16311 22:26:40.797874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16312 22:26:40.798305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16314 22:26:40.844187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16316 22:26:40.844619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16317 22:26:40.895473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16319 22:26:40.895909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16320 22:26:40.939799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16322 22:26:40.940247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16323 22:26:40.981529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16324 22:26:40.981934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16326 22:26:41.026368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16327 22:26:41.026780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16329 22:26:41.070575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16331 22:26:41.071042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16332 22:26:41.111946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16334 22:26:41.112426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16335 22:26:41.155920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16337 22:26:41.156399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16338 22:26:41.198417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16339 22:26:41.198807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16341 22:26:41.246032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16342 22:26:41.246437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16344 22:26:41.294466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16346 22:26:41.294961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16347 22:26:41.335689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16348 22:26:41.336240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16350 22:26:41.385111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16352 22:26:41.385779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16353 22:26:41.425556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16354 22:26:41.425974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16356 22:26:41.467539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16357 22:26:41.467956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16359 22:26:41.505977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16361 22:26:41.506421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16362 22:26:41.542840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16363 22:26:41.543236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16365 22:26:41.585222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16366 22:26:41.585684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16368 22:26:41.632192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16370 22:26:41.632669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16371 22:26:41.672135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16373 22:26:41.672602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16374 22:26:41.717791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16375 22:26:41.718198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16377 22:26:41.762861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16378 22:26:41.763288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16380 22:26:41.806538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16382 22:26:41.807014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16383 22:26:41.851174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16385 22:26:41.851552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16386 22:26:41.898000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16387 22:26:41.898436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16389 22:26:41.941855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16391 22:26:41.942317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16392 22:26:41.995459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16393 22:26:41.995906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16395 22:26:42.039446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16397 22:26:42.039836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16398 22:26:42.090155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16400 22:26:42.090685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16401 22:26:42.146438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16402 22:26:42.146991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16404 22:26:42.194054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16405 22:26:42.194485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16407 22:26:42.236106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16409 22:26:42.236570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16410 22:26:42.281294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16411 22:26:42.281777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16413 22:26:42.326249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16414 22:26:42.326791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16416 22:26:42.369641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16417 22:26:42.370259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16419 22:26:42.414644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16420 22:26:42.415094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16422 22:26:42.456024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16424 22:26:42.456488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16425 22:26:42.497541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16426 22:26:42.497955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16428 22:26:42.541529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16430 22:26:42.542016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16431 22:26:42.585985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16433 22:26:42.586472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16434 22:26:42.631385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16435 22:26:42.631938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16437 22:26:42.672663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16438 22:26:42.673051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16440 22:26:42.718741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16441 22:26:42.719190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16443 22:26:42.767752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16444 22:26:42.768191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16446 22:26:42.809067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16447 22:26:42.809477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16449 22:26:42.851335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16450 22:26:42.851724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16452 22:26:42.895014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16453 22:26:42.895514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16455 22:26:42.944791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16456 22:26:42.945224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16458 22:26:42.982596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16459 22:26:42.983003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16461 22:26:43.020964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16462 22:26:43.021405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16464 22:26:43.067251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16466 22:26:43.067692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16467 22:26:43.122423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16468 22:26:43.122852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16470 22:26:43.166147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16471 22:26:43.166578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16473 22:26:43.209019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16474 22:26:43.209451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16476 22:26:43.251723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16477 22:26:43.252255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16479 22:26:43.295149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16480 22:26:43.295582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16482 22:26:43.345978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16483 22:26:43.346405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16485 22:26:43.385697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16487 22:26:43.386132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16488 22:26:43.425720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16490 22:26:43.426183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16491 22:26:43.465388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16492 22:26:43.465806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16494 22:26:43.504787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16495 22:26:43.505270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16497 22:26:43.554960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16498 22:26:43.555365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16500 22:26:43.605556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16501 22:26:43.605990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16503 22:26:43.656936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16505 22:26:43.657405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16506 22:26:43.694875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16508 22:26:43.695574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16509 22:26:43.741157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16510 22:26:43.741537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16512 22:26:43.789190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16513 22:26:43.789604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16515 22:26:43.848265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16517 22:26:43.848984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16518 22:26:43.906927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16519 22:26:43.907353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16521 22:26:43.964079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16523 22:26:43.964650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16524 22:26:44.009709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16525 22:26:44.010123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16527 22:26:44.058115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16528 22:26:44.058682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16530 22:26:44.099037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16531 22:26:44.099432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16533 22:26:44.140397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16534 22:26:44.140784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16536 22:26:44.181174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16538 22:26:44.181644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16539 22:26:44.227169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16540 22:26:44.227573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16542 22:26:44.277444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16543 22:26:44.277838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16545 22:26:44.321626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16547 22:26:44.322096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16548 22:26:44.366562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16550 22:26:44.367023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16551 22:26:44.415511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16552 22:26:44.415949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16554 22:26:44.457104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16556 22:26:44.457568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16557 22:26:44.500784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16558 22:26:44.501217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16560 22:26:44.547302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16561 22:26:44.547728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16563 22:26:44.586482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16564 22:26:44.586895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16566 22:26:44.627492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16567 22:26:44.627926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16569 22:26:44.666539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16571 22:26:44.666998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16572 22:26:44.706148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16574 22:26:44.706563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16575 22:26:44.755092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16576 22:26:44.755492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16578 22:26:44.814473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16579 22:26:44.814915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16581 22:26:44.861552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16583 22:26:44.862040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16584 22:26:44.900991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16585 22:26:44.901447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16587 22:26:44.941593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16588 22:26:44.942040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16590 22:26:44.980642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16591 22:26:44.981061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16593 22:26:45.019391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16594 22:26:45.019823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16596 22:26:45.058701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16598 22:26:45.059184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16599 22:26:45.103477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16600 22:26:45.103875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16602 22:26:45.144637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16603 22:26:45.145051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16605 22:26:45.182614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16606 22:26:45.183020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16608 22:26:45.223034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16609 22:26:45.223419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16611 22:26:45.262006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16612 22:26:45.262441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16614 22:26:45.300024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16616 22:26:45.300755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16617 22:26:45.340644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16618 22:26:45.341074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16620 22:26:45.381798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16621 22:26:45.382235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16623 22:26:45.433065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16624 22:26:45.433495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16626 22:26:45.478831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16628 22:26:45.479443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16629 22:26:45.528071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16631 22:26:45.528565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16632 22:26:45.582788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16633 22:26:45.583171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16635 22:26:45.627341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16636 22:26:45.627747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16638 22:26:45.679546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16640 22:26:45.680039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16641 22:26:45.728803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16643 22:26:45.729373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16644 22:26:45.773460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16645 22:26:45.774032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16647 22:26:45.832545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16648 22:26:45.832925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16650 22:26:45.885970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16651 22:26:45.886397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16653 22:26:45.930100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16654 22:26:45.930640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16656 22:26:45.970322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16658 22:26:45.970765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16659 22:26:46.014560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16660 22:26:46.014993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16662 22:26:46.063655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16664 22:26:46.064105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16665 22:26:46.112478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16666 22:26:46.112899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16668 22:26:46.161505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16669 22:26:46.162028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16671 22:26:46.203576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16672 22:26:46.203935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16674 22:26:46.254354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16675 22:26:46.254779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16677 22:26:46.293463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16678 22:26:46.293923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16680 22:26:46.338642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16682 22:26:46.339103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16683 22:26:46.385379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16685 22:26:46.385842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16686 22:26:46.431514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16687 22:26:46.431921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16689 22:26:46.474203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16690 22:26:46.474653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16692 22:26:46.521952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16693 22:26:46.522393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16695 22:26:46.571240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16696 22:26:46.571682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16698 22:26:46.627679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16700 22:26:46.628108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16701 22:26:46.677925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16702 22:26:46.678362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16704 22:26:46.729937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16705 22:26:46.730394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16707 22:26:46.771569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16708 22:26:46.771985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16710 22:26:46.820672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16712 22:26:46.821058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16713 22:26:46.869232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16714 22:26:46.869675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16716 22:26:46.918282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16718 22:26:46.918685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16719 22:26:46.965845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16721 22:26:46.966332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16722 22:26:47.010659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16723 22:26:47.011093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16725 22:26:47.057402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16726 22:26:47.057861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16728 22:26:47.100569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16730 22:26:47.101039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16731 22:26:47.151325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16732 22:26:47.152035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16734 22:26:47.201638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16735 22:26:47.202038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16737 22:26:47.245791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16738 22:26:47.246189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16740 22:26:47.296240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16742 22:26:47.296933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16743 22:26:47.341762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16744 22:26:47.342183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16746 22:26:47.384478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16747 22:26:47.384870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16749 22:26:47.425096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16750 22:26:47.425523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16752 22:26:47.469060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16753 22:26:47.469488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16755 22:26:47.506252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16756 22:26:47.506642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16758 22:26:47.560850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16760 22:26:47.561331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16761 22:26:47.614688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16762 22:26:47.615105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16764 22:26:47.668961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16765 22:26:47.669372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16767 22:26:47.721257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16768 22:26:47.721688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16770 22:26:47.777053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16771 22:26:47.777433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16773 22:26:47.833075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16775 22:26:47.833554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16776 22:26:47.887651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16777 22:26:47.888084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16779 22:26:47.943517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16780 22:26:47.943900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16782 22:26:47.998168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16784 22:26:47.998605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16785 22:26:48.051737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16787 22:26:48.052212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16788 22:26:48.107612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16789 22:26:48.108041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16791 22:26:48.163098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16792 22:26:48.163625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16794 22:26:48.218035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16795 22:26:48.218473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16797 22:26:48.272048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16799 22:26:48.272959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16800 22:26:48.328684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16801 22:26:48.329121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16803 22:26:48.384826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16804 22:26:48.385301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16806 22:26:48.439219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16807 22:26:48.439789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16809 22:26:48.483213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16811 22:26:48.483687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16812 22:26:48.529592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16813 22:26:48.530023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16815 22:26:48.584127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16817 22:26:48.584997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16818 22:26:48.638803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16819 22:26:48.639238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16821 22:26:48.693636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16823 22:26:48.694083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16824 22:26:48.746689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16825 22:26:48.747194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16827 22:26:48.789589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16828 22:26:48.790094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16830 22:26:48.830858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16832 22:26:48.831339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16833 22:26:48.878574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16834 22:26:48.879032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16836 22:26:48.982886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16837 22:26:48.983343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16839 22:26:49.033521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16840 22:26:49.034182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16842 22:26:49.080728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16843 22:26:49.081125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16845 22:26:49.124141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16847 22:26:49.124611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16848 22:26:49.169796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16850 22:26:49.170276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16851 22:26:49.209894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16852 22:26:49.210310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16854 22:26:49.254022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16856 22:26:49.254529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16857 22:26:49.295493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16858 22:26:49.295889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
16860 22:26:49.337395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
16861 22:26:49.337845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
16863 22:26:49.384800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
16864 22:26:49.385306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
16866 22:26:49.427711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
16867 22:26:49.428172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
16869 22:26:49.479248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
16871 22:26:49.479800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
16872 22:26:49.530464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
16873 22:26:49.530904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
16875 22:26:49.574343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
16876 22:26:49.574731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
16878 22:26:49.620092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
16880 22:26:49.620572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
16881 22:26:49.664125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
16883 22:26:49.664607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
16884 22:26:49.703358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
16885 22:26:49.703785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
16887 22:26:49.753140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
16888 22:26:49.753568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
16890 22:26:49.801907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
16891 22:26:49.802345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
16893 22:26:49.846408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
16894 22:26:49.846848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
16896 22:26:49.897477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
16897 22:26:49.897947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
16899 22:26:49.941076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
16900 22:26:49.941505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
16902 22:26:49.986561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
16904 22:26:49.987180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
16905 22:26:50.043171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
16906 22:26:50.043673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
16908 22:26:50.093453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
16909 22:26:50.093877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
16911 22:26:50.132078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
16913 22:26:50.132852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
16914 22:26:50.182493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
16915 22:26:50.182919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
16917 22:26:50.223307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
16918 22:26:50.223747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
16920 22:26:50.267467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
16921 22:26:50.267894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
16923 22:26:50.318390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
16924 22:26:50.318784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
16926 22:26:50.360179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
16928 22:26:50.360627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
16929 22:26:50.407174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
16930 22:26:50.407633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
16932 22:26:50.453623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
16934 22:26:50.454073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
16935 22:26:50.502107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
16936 22:26:50.502575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
16938 22:26:50.550196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
16939 22:26:50.550595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
16941 22:26:50.602132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
16943 22:26:50.602809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
16944 22:26:50.653912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
16945 22:26:50.654423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
16947 22:26:50.708648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
16948 22:26:50.709091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
16950 22:26:50.761506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
16951 22:26:50.761957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
16953 22:26:50.815978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
16955 22:26:50.816430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
16956 22:26:50.873448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
16957 22:26:50.873872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
16959 22:26:50.931066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
16960 22:26:50.931500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
16962 22:26:50.990187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
16963 22:26:50.990617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
16965 22:26:51.049874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
16966 22:26:51.050435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
16968 22:26:51.107700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
16970 22:26:51.108135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
16971 22:26:51.166644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
16972 22:26:51.167145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
16974 22:26:51.224330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
16976 22:26:51.225101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
16977 22:26:51.284034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
16979 22:26:51.284513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
16980 22:26:51.342478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
16981 22:26:51.342897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
16983 22:26:51.402431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
16984 22:26:51.402823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
16986 22:26:51.454456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
16987 22:26:51.454854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
16989 22:26:51.497426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
16991 22:26:51.497910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
16992 22:26:51.547391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
16993 22:26:51.547849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
16995 22:26:51.588888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
16996 22:26:51.589392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
16998 22:26:51.634135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17000 22:26:51.634904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17001 22:26:51.681637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17002 22:26:51.682217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17004 22:26:51.724169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17006 22:26:51.724761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17007 22:26:51.766748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17008 22:26:51.767178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17010 22:26:51.809484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17012 22:26:51.809953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17013 22:26:51.853136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17014 22:26:51.853530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17016 22:26:51.905457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17017 22:26:51.905870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17019 22:26:51.961633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17020 22:26:51.962064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17022 22:26:52.014171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17023 22:26:52.014584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17025 22:26:52.050421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17027 22:26:52.050891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17028 22:26:52.086740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17029 22:26:52.087158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17031 22:26:52.128812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17033 22:26:52.129230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17034 22:26:52.173794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17035 22:26:52.174283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17037 22:26:52.230336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17038 22:26:52.230735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17040 22:26:52.288131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17042 22:26:52.288588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17043 22:26:52.346055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17044 22:26:52.346481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17046 22:26:52.405354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17047 22:26:52.405772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17049 22:26:52.462624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17050 22:26:52.463012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17052 22:26:52.522078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17054 22:26:52.522509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17055 22:26:52.580521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17056 22:26:52.580989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17058 22:26:52.641001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17059 22:26:52.641388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17061 22:26:52.701523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17062 22:26:52.701915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17064 22:26:52.761219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17065 22:26:52.761682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17067 22:26:52.819913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17069 22:26:52.821400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17070 22:26:52.878909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17072 22:26:52.879561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17073 22:26:52.940993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17074 22:26:52.941419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17076 22:26:53.002526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17077 22:26:53.002965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17079 22:26:53.055189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17080 22:26:53.057727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17082 22:26:53.111021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17083 22:26:53.111483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17085 22:26:53.165949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17087 22:26:53.166441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17088 22:26:53.214483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17089 22:26:53.214903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17091 22:26:53.255299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17092 22:26:53.255741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17094 22:26:53.302987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17096 22:26:53.303472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17097 22:26:53.340145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17099 22:26:53.340612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17100 22:26:53.389245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17101 22:26:53.389698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17103 22:26:53.433951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17104 22:26:53.434390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17106 22:26:53.487422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17108 22:26:53.487841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17109 22:26:53.530779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17111 22:26:53.531262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17112 22:26:53.577176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17114 22:26:53.577675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17115 22:26:53.626689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17116 22:26:53.627300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17118 22:26:53.676618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17120 22:26:53.677096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17121 22:26:53.717771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17122 22:26:53.718207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17124 22:26:53.763632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17125 22:26:53.764200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17127 22:26:53.807014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17128 22:26:53.807446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17130 22:26:53.854869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17131 22:26:53.855341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17133 22:26:53.902469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17134 22:26:53.902910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17136 22:26:53.945212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17137 22:26:53.945677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17139 22:26:53.992592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17140 22:26:53.993020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17142 22:26:54.091288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17143 22:26:54.091702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17145 22:26:54.150438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17147 22:26:54.150873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17148 22:26:54.211195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17149 22:26:54.211646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17151 22:26:54.273221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17152 22:26:54.274080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17154 22:26:54.321761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17155 22:26:54.322280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17157 22:26:54.365413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17158 22:26:54.365768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17160 22:26:54.407266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17162 22:26:54.407746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17163 22:26:54.454020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17164 22:26:54.454412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17166 22:26:54.495634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17167 22:26:54.496027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17169 22:26:54.538210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17171 22:26:54.538612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17172 22:26:54.588539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17173 22:26:54.589010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17175 22:26:54.630066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17177 22:26:54.630844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17178 22:26:54.681615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17179 22:26:54.682100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17181 22:26:54.731430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17182 22:26:54.731868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17184 22:26:54.775735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17185 22:26:54.776193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17187 22:26:54.823975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17188 22:26:54.824415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17190 22:26:54.873804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17191 22:26:54.874222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17193 22:26:54.914933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17195 22:26:54.915398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17196 22:26:54.975484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17197 22:26:54.975942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17199 22:26:55.037601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17200 22:26:55.038040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17202 22:26:55.099874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17204 22:26:55.100635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17205 22:26:55.162271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17207 22:26:55.162947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17208 22:26:55.221948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17209 22:26:55.222410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17211 22:26:55.282773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17212 22:26:55.283209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17214 22:26:55.345580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17215 22:26:55.346033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17217 22:26:55.407710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17218 22:26:55.408152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17220 22:26:55.470026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17221 22:26:55.470425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17223 22:26:55.531546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17224 22:26:55.531945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17226 22:26:55.596925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17227 22:26:55.597332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17229 22:26:55.659256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17230 22:26:55.659690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17232 22:26:55.719481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17233 22:26:55.719922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17235 22:26:55.781450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17236 22:26:55.781914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17238 22:26:55.842669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17240 22:26:55.843126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17241 22:26:55.903501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17243 22:26:55.903940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17244 22:26:55.965036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17245 22:26:55.965469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17247 22:26:56.025211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17248 22:26:56.025774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17250 22:26:56.085863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17251 22:26:56.086300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17253 22:26:56.145906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17254 22:26:56.146345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17256 22:26:56.207062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17257 22:26:56.207498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17259 22:26:56.268669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17260 22:26:56.269088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17262 22:26:56.329007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17263 22:26:56.329422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17265 22:26:56.388187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17267 22:26:56.388676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17268 22:26:56.449349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17269 22:26:56.449784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17271 22:26:56.512845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17273 22:26:56.513665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17274 22:26:56.578893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17276 22:26:56.579373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17277 22:26:56.643074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17279 22:26:56.643534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17280 22:26:56.688925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17282 22:26:56.689398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17283 22:26:56.731968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17285 22:26:56.732448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17286 22:26:56.773553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17287 22:26:56.774001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17289 22:26:56.827839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17291 22:26:56.828275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17292 22:26:56.877708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17294 22:26:56.878135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17295 22:26:56.925900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17296 22:26:56.926415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17298 22:26:56.973732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17299 22:26:56.974173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17301 22:26:57.023542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17303 22:26:57.024043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17304 22:26:57.069282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17306 22:26:57.069763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17307 22:26:57.111706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17308 22:26:57.112122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17310 22:26:57.155320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17311 22:26:57.155759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17313 22:26:57.205760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17314 22:26:57.206170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17316 22:26:57.249634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17317 22:26:57.250090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17319 22:26:57.289711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17320 22:26:57.290149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17322 22:26:57.331790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17323 22:26:57.332278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17325 22:26:57.380144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17327 22:26:57.380605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17328 22:26:57.424961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17330 22:26:57.425440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17331 22:26:57.469794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17333 22:26:57.470249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17334 22:26:57.514275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17335 22:26:57.514699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17337 22:26:57.557382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17339 22:26:57.557895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17340 22:26:57.603496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17342 22:26:57.603974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17343 22:26:57.654551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17344 22:26:57.654984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17346 22:26:57.702110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17347 22:26:57.702528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17349 22:26:57.743444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17350 22:26:57.743843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17352 22:26:57.791968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17354 22:26:57.792444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17355 22:26:57.842810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17356 22:26:57.843213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17358 22:26:57.897046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17359 22:26:57.897460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17361 22:26:57.957576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17362 22:26:57.957956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17364 22:26:57.996242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17365 22:26:57.996616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17367 22:26:58.034886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17369 22:26:58.035361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17370 22:26:58.073418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17371 22:26:58.073857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17373 22:26:58.130742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17374 22:26:58.131169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17376 22:26:58.192064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17378 22:26:58.192529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17379 22:26:58.232481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17380 22:26:58.232938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17382 22:26:58.271857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17384 22:26:58.272400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17385 22:26:58.310592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17386 22:26:58.311013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17388 22:26:58.353534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17390 22:26:58.354018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17391 22:26:58.391392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17392 22:26:58.391827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17394 22:26:58.433954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17395 22:26:58.434410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17397 22:26:58.469654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17398 22:26:58.470097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17400 22:26:58.519423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17402 22:26:58.519903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17403 22:26:58.571105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17404 22:26:58.571539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17406 22:26:58.623281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17407 22:26:58.623718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17409 22:26:58.668023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17411 22:26:58.668498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17412 22:26:58.708581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17413 22:26:58.709034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17415 22:26:58.751190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17416 22:26:58.751580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17418 22:26:58.802389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17419 22:26:58.802894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17421 22:26:58.846844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17422 22:26:58.847225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17424 22:26:58.898580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17425 22:26:58.899031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17427 22:26:58.937496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17428 22:26:58.937945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17430 22:26:58.977364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17431 22:26:58.977787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17433 22:26:59.018434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17434 22:26:59.018853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17436 22:26:59.065894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17438 22:26:59.066374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17439 22:26:59.111160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17440 22:26:59.111584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17442 22:26:59.151434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17444 22:26:59.151892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17445 22:26:59.193489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17447 22:26:59.193971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17448 22:26:59.232949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17449 22:26:59.233379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17451 22:26:59.271209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17452 22:26:59.271631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17454 22:26:59.313370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17455 22:26:59.313733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17457 22:26:59.361964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17458 22:26:59.362476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17460 22:26:59.412990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17461 22:26:59.413440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17463 22:26:59.448985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17465 22:26:59.449691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17466 22:26:59.503766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17467 22:26:59.504176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17469 22:26:59.549016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17471 22:26:59.549473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17472 22:26:59.594178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17474 22:26:59.594789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17475 22:26:59.641564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17476 22:26:59.641986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17478 22:26:59.677388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17479 22:26:59.677878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17481 22:26:59.715152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17482 22:26:59.715578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17484 22:26:59.756923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17486 22:26:59.757402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17487 22:26:59.793203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17488 22:26:59.793676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17490 22:26:59.830962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17492 22:26:59.831448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17493 22:26:59.876782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17494 22:26:59.877192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17496 22:26:59.919892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17498 22:26:59.920362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17499 22:26:59.978010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17500 22:26:59.978446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17502 22:27:00.028722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17503 22:27:00.029716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17505 22:27:00.074981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17507 22:27:00.075392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17508 22:27:00.125268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17510 22:27:00.125711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17511 22:27:00.174726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17512 22:27:00.175113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17514 22:27:00.228714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17515 22:27:00.229120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17517 22:27:00.279728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17518 22:27:00.280138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17520 22:27:00.331357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17521 22:27:00.331787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17523 22:27:00.378541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17524 22:27:00.379026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17526 22:27:00.425693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17527 22:27:00.426230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17529 22:27:00.467916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17531 22:27:00.468380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17532 22:27:00.515239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17534 22:27:00.515631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17535 22:27:00.564081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17537 22:27:00.564619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17538 22:27:00.611457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17540 22:27:00.611870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17541 22:27:00.664788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17543 22:27:00.665275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17544 22:27:00.704835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17545 22:27:00.705328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17547 22:27:00.747620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17549 22:27:00.748079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17550 22:27:00.797071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17551 22:27:00.797492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17553 22:27:00.844034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17555 22:27:00.844580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17556 22:27:00.891103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17558 22:27:00.891770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17559 22:27:00.942756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17560 22:27:00.943149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17562 22:27:00.989314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17563 22:27:00.989682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17565 22:27:01.035253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17566 22:27:01.035676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17568 22:27:01.081057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17569 22:27:01.081613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17571 22:27:01.129365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17572 22:27:01.129779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17574 22:27:01.170112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17575 22:27:01.170516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17577 22:27:01.216647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17579 22:27:01.217125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17580 22:27:01.262823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17582 22:27:01.263307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17583 22:27:01.298408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17585 22:27:01.298873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17586 22:27:01.341513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17587 22:27:01.341957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17589 22:27:01.379897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17591 22:27:01.380297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17592 22:27:01.423183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17593 22:27:01.423613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17595 22:27:01.463659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17596 22:27:01.464085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17598 22:27:01.505613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17599 22:27:01.506152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17601 22:27:01.547866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17603 22:27:01.548524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17604 22:27:01.597237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17605 22:27:01.597673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17607 22:27:01.643670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17608 22:27:01.644102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17610 22:27:01.681370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17611 22:27:01.681781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17613 22:27:01.725340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17614 22:27:01.725775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17616 22:27:01.763094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17617 22:27:01.763604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17619 22:27:01.811522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17620 22:27:01.811913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17622 22:27:01.870447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17623 22:27:01.870973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17625 22:27:01.927673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17626 22:27:01.928067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17628 22:27:01.985341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17630 22:27:01.986163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17631 22:27:02.042199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17632 22:27:02.042692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17634 22:27:02.085282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17635 22:27:02.085687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17637 22:27:02.126189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17638 22:27:02.126610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17640 22:27:02.179985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17642 22:27:02.180416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17643 22:27:02.233999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17644 22:27:02.234436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17646 22:27:02.273152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17647 22:27:02.273603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17649 22:27:02.322168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17650 22:27:02.322604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17652 22:27:02.361317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17653 22:27:02.361768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17655 22:27:02.408699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17657 22:27:02.409132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17658 22:27:02.459556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17659 22:27:02.460301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17661 22:27:02.504944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17662 22:27:02.505359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17664 22:27:02.555409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17665 22:27:02.555906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17667 22:27:02.609604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17668 22:27:02.610214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17670 22:27:02.662148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17672 22:27:02.662623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17673 22:27:02.715196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17675 22:27:02.715774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17676 22:27:02.766385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17677 22:27:02.766844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17679 22:27:02.803525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17680 22:27:02.803947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17682 22:27:02.841321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17683 22:27:02.841779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17685 22:27:02.877814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17686 22:27:02.878274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17688 22:27:02.914561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17690 22:27:02.915019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17691 22:27:02.954119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17692 22:27:02.954486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17694 22:27:03.003936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17696 22:27:03.004383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17697 22:27:03.042358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17698 22:27:03.042747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17700 22:27:03.079087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17702 22:27:03.079518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17703 22:27:03.121450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17704 22:27:03.121873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17706 22:27:03.166750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17707 22:27:03.167137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17709 22:27:03.221435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17711 22:27:03.221917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17712 22:27:03.259252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17713 22:27:03.259628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17715 22:27:03.296834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17716 22:27:03.297189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17718 22:27:03.333775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17719 22:27:03.334217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17721 22:27:03.371432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17723 22:27:03.371855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17724 22:27:03.413634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17725 22:27:03.414083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17727 22:27:03.457092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17729 22:27:03.457511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17730 22:27:03.504918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17732 22:27:03.505406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17733 22:27:03.550764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17734 22:27:03.551120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17736 22:27:03.599442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17737 22:27:03.599842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17739 22:27:03.651615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17740 22:27:03.652009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17742 22:27:03.693561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17743 22:27:03.694000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17745 22:27:03.738516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17747 22:27:03.738976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17748 22:27:03.782110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17749 22:27:03.782562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17751 22:27:03.822178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17752 22:27:03.822606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17754 22:27:03.867400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17755 22:27:03.867816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17757 22:27:03.913643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17758 22:27:03.914045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17760 22:27:03.962824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17761 22:27:03.963258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17763 22:27:04.006473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17764 22:27:04.006889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17766 22:27:04.052098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17768 22:27:04.052514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17769 22:27:04.089689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17770 22:27:04.090118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17772 22:27:04.128357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17773 22:27:04.128817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17775 22:27:04.177381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17777 22:27:04.177904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17778 22:27:04.230991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17779 22:27:04.231473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17781 22:27:04.291153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17782 22:27:04.291611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17784 22:27:04.347411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17786 22:27:04.347810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17787 22:27:04.399192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17788 22:27:04.399614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17790 22:27:04.458191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17791 22:27:04.458578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17793 22:27:04.518081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17794 22:27:04.518465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17796 22:27:04.574405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17797 22:27:04.574855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17799 22:27:04.621695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17800 22:27:04.622096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17802 22:27:04.671297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17803 22:27:04.671666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17805 22:27:04.723282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17806 22:27:04.723681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17808 22:27:04.762371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17809 22:27:04.762772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17811 22:27:04.805708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17813 22:27:04.806186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17814 22:27:04.845583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17815 22:27:04.845991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17817 22:27:04.886836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17818 22:27:04.887276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17820 22:27:04.925549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17821 22:27:04.926017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17823 22:27:04.963374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17824 22:27:04.963920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17826 22:27:05.002385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17827 22:27:05.002877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17829 22:27:05.060878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17830 22:27:05.061269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17832 22:27:05.118888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17834 22:27:05.119349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17835 22:27:05.170016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17836 22:27:05.170526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17838 22:27:05.207503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17840 22:27:05.208128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17841 22:27:05.244366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17842 22:27:05.244919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17844 22:27:05.281792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17845 22:27:05.282218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17847 22:27:05.318163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17848 22:27:05.318585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17850 22:27:05.354489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17851 22:27:05.354914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17853 22:27:05.397292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17854 22:27:05.397815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17856 22:27:05.439959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17858 22:27:05.440414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17859 22:27:05.478959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
17860 22:27:05.479401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
17862 22:27:05.518467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
17863 22:27:05.518850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
17865 22:27:05.554698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
17866 22:27:05.555169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
17868 22:27:05.592901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
17869 22:27:05.593320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
17871 22:27:05.634484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
17872 22:27:05.634956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
17874 22:27:05.673056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
17875 22:27:05.673464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
17877 22:27:05.711983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
17879 22:27:05.712385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
17880 22:27:05.749439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
17881 22:27:05.749913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
17883 22:27:05.787564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
17885 22:27:05.788023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
17886 22:27:05.829725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
17888 22:27:05.830231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
17889 22:27:05.874081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
17890 22:27:05.874509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
17892 22:27:05.912670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
17893 22:27:05.913118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
17895 22:27:05.950383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
17896 22:27:05.950820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
17898 22:27:05.993007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
17899 22:27:05.993556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
17901 22:27:06.033876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
17902 22:27:06.034289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
17904 22:27:06.073949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
17906 22:27:06.074615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
17907 22:27:06.113825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
17908 22:27:06.114201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
17910 22:27:06.150324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
17911 22:27:06.150707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
17913 22:27:06.192739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
17914 22:27:06.193174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
17916 22:27:06.229852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
17917 22:27:06.230304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
17919 22:27:06.265961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
17920 22:27:06.266410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
17922 22:27:06.302757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
17924 22:27:06.303219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
17925 22:27:06.339935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
17927 22:27:06.340501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
17928 22:27:06.378067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
17929 22:27:06.378487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
17931 22:27:06.414602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
17932 22:27:06.415015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
17934 22:27:06.452875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
17936 22:27:06.453294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
17937 22:27:06.501835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
17939 22:27:06.502420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
17940 22:27:06.552846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
17941 22:27:06.553274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
17943 22:27:06.591633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
17945 22:27:06.592089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
17946 22:27:06.640867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
17947 22:27:06.641271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
17949 22:27:06.698240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
17950 22:27:06.698598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
17952 22:27:06.759642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
17953 22:27:06.759999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
17955 22:27:06.812650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
17956 22:27:06.813021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
17958 22:27:06.862459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
17959 22:27:06.862904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
17961 22:27:06.914109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
17962 22:27:06.914565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
17964 22:27:06.958843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
17965 22:27:06.959368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
17967 22:27:07.003685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
17969 22:27:07.004093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
17970 22:27:07.053817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
17971 22:27:07.054300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
17973 22:27:07.101210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
17974 22:27:07.101624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
17976 22:27:07.148987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
17977 22:27:07.149426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
17979 22:27:07.188629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
17981 22:27:07.189003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
17982 22:27:07.245230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
17983 22:27:07.245680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
17985 22:27:07.302735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
17987 22:27:07.303196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
17988 22:27:07.346957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
17989 22:27:07.347408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
17991 22:27:07.398995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
17992 22:27:07.399401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
17994 22:27:07.452917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
17995 22:27:07.453315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
17997 22:27:07.502962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
17998 22:27:07.503383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18000 22:27:07.552298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18001 22:27:07.552748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18003 22:27:07.602561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18005 22:27:07.603356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18006 22:27:07.653394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18008 22:27:07.653891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18009 22:27:07.701460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18010 22:27:07.701948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18012 22:27:07.744841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18014 22:27:07.745261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18015 22:27:07.790154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18017 22:27:07.790664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18018 22:27:07.834991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18019 22:27:07.835418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18021 22:27:07.874468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18022 22:27:07.874882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18024 22:27:07.919734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18026 22:27:07.920160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18027 22:27:07.967782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18028 22:27:07.968223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18030 22:27:08.014382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18031 22:27:08.014784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18033 22:27:08.059622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18035 22:27:08.060106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18036 22:27:08.109523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18037 22:27:08.112084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18039 22:27:08.162430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18040 22:27:08.162894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18042 22:27:08.218395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18044 22:27:08.218840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18045 22:27:08.279316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18047 22:27:08.279764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18048 22:27:08.323572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18049 22:27:08.324028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18051 22:27:08.363199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18052 22:27:08.363637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18054 22:27:08.401155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18055 22:27:08.401584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18057 22:27:08.438562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18058 22:27:08.438947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18060 22:27:08.480320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18061 22:27:08.480755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18063 22:27:08.518235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18065 22:27:08.518701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18066 22:27:08.569330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18068 22:27:08.569806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18069 22:27:08.614767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18070 22:27:08.615204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18072 22:27:08.663192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18074 22:27:08.663596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18075 22:27:08.711069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18076 22:27:08.711635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18078 22:27:08.761981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18079 22:27:08.762425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18081 22:27:08.810942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18082 22:27:08.811374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18084 22:27:08.862294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18086 22:27:08.862683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18087 22:27:08.909155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18089 22:27:08.909637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18090 22:27:08.957176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18091 22:27:08.957621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18093 22:27:09.001039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18094 22:27:09.001470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18096 22:27:09.038236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18097 22:27:09.038662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18099 22:27:09.084102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18100 22:27:09.084856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18102 22:27:09.128191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18104 22:27:09.128646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18105 22:27:09.170804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18107 22:27:09.171280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18108 22:27:09.210761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18110 22:27:09.211147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18111 22:27:09.255404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18112 22:27:09.255808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18114 22:27:09.299119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18115 22:27:09.299514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18117 22:27:09.338449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18119 22:27:09.338944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18120 22:27:09.379412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18122 22:27:09.379913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18123 22:27:09.424496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18124 22:27:09.424926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18126 22:27:09.469309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18127 22:27:09.469749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18129 22:27:09.509472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18130 22:27:09.509865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18132 22:27:09.548892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18134 22:27:09.549359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18135 22:27:09.592661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18137 22:27:09.593139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18138 22:27:09.633524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18139 22:27:09.633959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18141 22:27:09.679338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18142 22:27:09.679751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18144 22:27:09.727003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18145 22:27:09.728091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18147 22:27:09.770858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18148 22:27:09.771303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18150 22:27:09.816031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18152 22:27:09.816470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18153 22:27:09.854278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18154 22:27:09.854716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18156 22:27:09.897164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18157 22:27:09.897623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18159 22:27:09.944772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18161 22:27:09.945227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18162 22:27:09.989971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18163 22:27:09.990391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18165 22:27:10.045915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18166 22:27:10.046330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18168 22:27:10.100948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18169 22:27:10.101362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18171 22:27:10.150754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18173 22:27:10.151183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18174 22:27:10.198872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18176 22:27:10.199325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18177 22:27:10.249209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18178 22:27:10.249622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18180 22:27:10.297596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18181 22:27:10.297998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18183 22:27:10.342666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18184 22:27:10.343085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18186 22:27:10.389523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18187 22:27:10.389926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18189 22:27:10.437358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18190 22:27:10.437793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18192 22:27:10.483628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18194 22:27:10.484270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18195 22:27:10.540113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18197 22:27:10.541037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18198 22:27:10.600723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18199 22:27:10.601140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18201 22:27:10.662301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18203 22:27:10.662745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18204 22:27:10.718685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18205 22:27:10.719120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18207 22:27:10.775954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18209 22:27:10.776435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18210 22:27:10.821724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18211 22:27:10.822158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18213 22:27:10.862283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18214 22:27:10.862740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18216 22:27:10.913900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18218 22:27:10.914373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18219 22:27:10.959044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18220 22:27:10.959464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18222 22:27:10.997219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18223 22:27:10.997679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18225 22:27:11.045412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18226 22:27:11.045845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18228 22:27:11.092994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18229 22:27:11.093445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18231 22:27:11.139389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18232 22:27:11.139872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18234 22:27:11.186717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18235 22:27:11.187113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18237 22:27:11.238520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18238 22:27:11.238955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18240 22:27:11.292062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18242 22:27:11.292500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18243 22:27:11.343589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18244 22:27:11.344047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18246 22:27:11.396607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18247 22:27:11.397059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18249 22:27:11.440571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18251 22:27:11.441054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18252 22:27:11.480048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18254 22:27:11.480542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18255 22:27:11.525206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18256 22:27:11.525639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18258 22:27:11.577638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18259 22:27:11.578078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18261 22:27:11.627004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18262 22:27:11.627449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18264 22:27:11.683121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18266 22:27:11.683622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18267 22:27:11.726820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18268 22:27:11.727235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18270 22:27:11.774211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18271 22:27:11.774579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18273 22:27:11.821157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18275 22:27:11.821804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18276 22:27:11.864856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18277 22:27:11.865293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18279 22:27:11.915356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18280 22:27:11.915813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18282 22:27:11.964090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18284 22:27:11.964564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18285 22:27:12.017545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18286 22:27:12.018021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18288 22:27:12.072169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18290 22:27:12.072641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18291 22:27:12.140869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18292 22:27:12.141304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18294 22:27:12.193137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18295 22:27:12.193587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18297 22:27:12.220076 <47>[ 195.893635] systemd-journald[109]: Sent WATCHDOG=1 notification.
18298 22:27:12.240419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18299 22:27:12.240844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18301 22:27:12.293523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18302 22:27:12.293984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18304 22:27:12.342837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18305 22:27:12.343257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18307 22:27:12.385709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18308 22:27:12.386209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18310 22:27:12.439921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18312 22:27:12.440344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18313 22:27:12.488213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18315 22:27:12.488689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18316 22:27:12.537363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18318 22:27:12.537850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18319 22:27:12.586489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18320 22:27:12.586924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18322 22:27:12.642012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18323 22:27:12.642432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18325 22:27:12.703277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18327 22:27:12.703713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18328 22:27:12.764867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18329 22:27:12.765337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18331 22:27:12.818598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18332 22:27:12.819060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18334 22:27:12.866146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18335 22:27:12.866547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18337 22:27:12.909837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18338 22:27:12.910287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18340 22:27:12.952194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18342 22:27:12.952682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18343 22:27:12.998203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18344 22:27:12.998632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18346 22:27:13.040907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18347 22:27:13.041354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18349 22:27:13.086101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18350 22:27:13.086508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18352 22:27:13.131419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18354 22:27:13.131847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18355 22:27:13.182963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18356 22:27:13.183398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18358 22:27:13.242383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18359 22:27:13.242790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18361 22:27:13.291588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18362 22:27:13.292028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18364 22:27:13.352209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18366 22:27:13.352683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18367 22:27:13.416855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18368 22:27:13.417308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18370 22:27:13.481786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18372 22:27:13.482274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18373 22:27:13.544020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18375 22:27:13.544545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18376 22:27:13.594331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18377 22:27:13.594754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18379 22:27:13.652850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18380 22:27:13.653281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18382 22:27:13.706006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18384 22:27:13.706497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18385 22:27:13.761688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18386 22:27:13.762126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18388 22:27:13.813215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18390 22:27:13.813700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18391 22:27:13.864854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18392 22:27:13.865313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18394 22:27:13.914461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18396 22:27:13.914937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18397 22:27:13.966286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18399 22:27:13.966761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18400 22:27:14.015423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18401 22:27:14.015846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18403 22:27:14.062817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18404 22:27:14.063274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18406 22:27:14.112942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18407 22:27:14.113378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18409 22:27:14.161690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18411 22:27:14.162159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18412 22:27:14.207585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18414 22:27:14.208061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18415 22:27:14.256629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18417 22:27:14.257063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18418 22:27:14.301685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18419 22:27:14.302120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18421 22:27:14.352522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18422 22:27:14.352967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18424 22:27:14.398963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18425 22:27:14.399391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18427 22:27:14.442562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18428 22:27:14.443004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18430 22:27:14.487190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18432 22:27:14.487675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18433 22:27:14.533153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18435 22:27:14.533632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18436 22:27:14.582854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18438 22:27:14.583329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18439 22:27:14.632973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18440 22:27:14.633438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18442 22:27:14.679603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18443 22:27:14.680047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18445 22:27:14.729211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18446 22:27:14.729782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18448 22:27:14.777151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18450 22:27:14.777627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18451 22:27:14.828716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18452 22:27:14.829139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18454 22:27:14.878390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18455 22:27:14.878824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18457 22:27:14.933516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18459 22:27:14.933990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18460 22:27:14.985704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18461 22:27:14.986136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18463 22:27:15.043101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18465 22:27:15.043584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18466 22:27:15.094778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18467 22:27:15.095215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18469 22:27:15.148017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18471 22:27:15.148698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18472 22:27:15.205919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18473 22:27:15.206519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18475 22:27:15.253535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18477 22:27:15.253953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18478 22:27:15.308919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18479 22:27:15.309348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18481 22:27:15.369634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18482 22:27:15.370046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18484 22:27:15.432093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18486 22:27:15.432569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18487 22:27:15.494487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18489 22:27:15.494983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18490 22:27:15.549611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18492 22:27:15.550092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18493 22:27:15.601046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18494 22:27:15.601503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18496 22:27:15.645373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18497 22:27:15.645811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18499 22:27:15.694751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18501 22:27:15.695230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18502 22:27:15.750389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18503 22:27:15.750829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18505 22:27:15.810242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18506 22:27:15.810707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18508 22:27:15.855695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18510 22:27:15.856218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18511 22:27:15.913237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18512 22:27:15.913662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18514 22:27:15.965662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18516 22:27:15.966149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18517 22:27:16.020977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18518 22:27:16.021384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18520 22:27:16.080732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18521 22:27:16.081183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18523 22:27:16.130461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18525 22:27:16.130938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18526 22:27:16.176771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18527 22:27:16.177234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18529 22:27:16.231204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18531 22:27:16.231686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18532 22:27:16.286393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18534 22:27:16.289523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18535 22:27:16.338163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18536 22:27:16.338601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18538 22:27:16.393065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18539 22:27:16.393527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18541 22:27:16.445249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18542 22:27:16.445687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18544 22:27:16.495681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18545 22:27:16.496105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18547 22:27:16.536897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18548 22:27:16.537356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18550 22:27:16.591408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18551 22:27:16.591851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18553 22:27:16.637129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18554 22:27:16.637558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18556 22:27:16.680895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18558 22:27:16.681535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18559 22:27:16.727595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18560 22:27:16.727999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18562 22:27:16.778035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18563 22:27:16.778468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18565 22:27:16.826867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18566 22:27:16.827304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18568 22:27:16.877374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18569 22:27:16.877783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18571 22:27:16.930292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18572 22:27:16.930724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18574 22:27:16.977326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18576 22:27:16.977727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18577 22:27:17.015699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18579 22:27:17.016174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18580 22:27:17.067017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18581 22:27:17.067451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18583 22:27:17.125094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18584 22:27:17.125542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18586 22:27:17.181215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18587 22:27:17.181656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18589 22:27:17.234533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18590 22:27:17.234928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18592 22:27:17.282365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18593 22:27:17.282755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18595 22:27:17.330927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18596 22:27:17.331322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18598 22:27:17.387089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18599 22:27:17.387544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18601 22:27:17.436726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18602 22:27:17.437261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18604 22:27:17.486009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18605 22:27:17.486466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18607 22:27:17.537506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18608 22:27:17.537945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18610 22:27:17.601043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18611 22:27:17.601505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18613 22:27:17.647614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18614 22:27:17.648093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18616 22:27:17.697073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18617 22:27:17.697522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18619 22:27:17.757432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18620 22:27:17.757947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18622 22:27:17.815675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18623 22:27:17.816107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18625 22:27:17.870885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18626 22:27:17.871353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18628 22:27:17.929054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18629 22:27:17.929474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18631 22:27:17.970819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18632 22:27:17.971242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18634 22:27:18.029259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18636 22:27:18.029681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18637 22:27:18.083130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18638 22:27:18.083584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18640 22:27:18.125038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18641 22:27:18.125504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18643 22:27:18.165226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18644 22:27:18.165643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18646 22:27:18.211390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18647 22:27:18.211847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18649 22:27:18.269206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18650 22:27:18.269627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18652 22:27:18.329959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18653 22:27:18.330405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18655 22:27:18.386835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18656 22:27:18.387219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18658 22:27:18.435521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18659 22:27:18.435962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18661 22:27:18.474354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18662 22:27:18.474800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18664 22:27:18.530559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18666 22:27:18.531042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18667 22:27:18.592939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18669 22:27:18.593423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18670 22:27:18.651250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18671 22:27:18.651640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18673 22:27:18.707215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18675 22:27:18.707608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18676 22:27:18.765118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18678 22:27:18.765530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18679 22:27:18.818506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18680 22:27:18.818945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18682 22:27:18.864769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18683 22:27:18.865144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18685 22:27:18.919684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18687 22:27:18.920168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18688 22:27:18.971229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18689 22:27:18.971644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18691 22:27:19.023610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18692 22:27:19.024111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18694 22:27:19.078524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18695 22:27:19.078991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18697 22:27:19.123658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18698 22:27:19.124109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18700 22:27:19.166350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18701 22:27:19.166785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18703 22:27:19.212735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18705 22:27:19.213177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18706 22:27:19.266334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18707 22:27:19.266701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18709 22:27:19.310337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18710 22:27:19.310723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18712 22:27:19.354413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18714 22:27:19.354881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18715 22:27:19.401390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18716 22:27:19.401926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18718 22:27:19.447372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18720 22:27:19.447848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18721 22:27:19.494701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18723 22:27:19.495170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18724 22:27:19.540945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18726 22:27:19.541417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18727 22:27:19.584200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18729 22:27:19.584674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18730 22:27:19.630045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18731 22:27:19.630451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18733 22:27:19.664945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18734 22:27:19.665364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18736 22:27:19.701880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18737 22:27:19.702309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18739 22:27:19.750044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18740 22:27:19.750466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18742 22:27:19.795202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18743 22:27:19.795621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18745 22:27:19.844700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18746 22:27:19.845084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18748 22:27:19.893496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18749 22:27:19.893928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18751 22:27:19.940997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18752 22:27:19.941434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18754 22:27:19.989552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18755 22:27:19.989987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18757 22:27:20.038094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18758 22:27:20.038485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18760 22:27:20.087223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18762 22:27:20.087699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18763 22:27:20.137447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18764 22:27:20.137855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18766 22:27:20.182639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18767 22:27:20.183044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18769 22:27:20.228802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18771 22:27:20.229182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18772 22:27:20.278778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18773 22:27:20.279219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18775 22:27:20.327289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18777 22:27:20.327765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18778 22:27:20.366479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18779 22:27:20.366922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18781 22:27:20.405232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18783 22:27:20.405827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18784 22:27:20.443487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18785 22:27:20.444065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18787 22:27:20.482205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18788 22:27:20.482597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18790 22:27:20.525334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18791 22:27:20.525678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18793 22:27:20.563096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18794 22:27:20.563536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18796 22:27:20.602176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18798 22:27:20.602633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18799 22:27:20.641670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18800 22:27:20.642119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18802 22:27:20.694000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18804 22:27:20.694461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18805 22:27:20.731455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18806 22:27:20.731886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18808 22:27:20.770333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18809 22:27:20.770763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18811 22:27:20.808615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18813 22:27:20.809079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18814 22:27:20.847269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18815 22:27:20.847692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18817 22:27:20.889126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18819 22:27:20.889604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18820 22:27:20.939340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18821 22:27:20.939769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18823 22:27:20.977892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18824 22:27:20.978308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18826 22:27:21.019187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18828 22:27:21.019807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18829 22:27:21.067069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18831 22:27:21.067475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18832 22:27:21.119489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18833 22:27:21.119872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18835 22:27:21.161992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18836 22:27:21.162422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18838 22:27:21.198377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18839 22:27:21.198851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18841 22:27:21.241302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18843 22:27:21.241935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18844 22:27:21.281439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18845 22:27:21.281841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18847 22:27:21.319501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18848 22:27:21.320060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18850 22:27:21.366192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18851 22:27:21.366620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18853 22:27:21.414149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18855 22:27:21.414628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18856 22:27:21.459875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18857 22:27:21.460299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18859 22:27:21.511124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
18861 22:27:21.511554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
18862 22:27:21.553772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
18864 22:27:21.554250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
18865 22:27:21.595537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
18866 22:27:21.595982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
18868 22:27:21.631864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
18870 22:27:21.632601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
18871 22:27:21.674468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
18872 22:27:21.674912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
18874 22:27:21.718416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
18876 22:27:21.718890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
18877 22:27:21.770650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
18879 22:27:21.771225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
18880 22:27:21.827672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
18881 22:27:21.828107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
18883 22:27:21.885581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
18884 22:27:21.886032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
18886 22:27:21.930202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
18888 22:27:21.930596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
18889 22:27:21.975603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
18890 22:27:21.976033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
18892 22:27:22.022926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
18894 22:27:22.023396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
18895 22:27:22.063264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
18897 22:27:22.063994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
18898 22:27:22.111270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
18900 22:27:22.112019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
18901 22:27:22.159516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
18902 22:27:22.159975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
18904 22:27:22.202710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
18905 22:27:22.203165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
18907 22:27:22.252587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
18908 22:27:22.252986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
18910 22:27:22.298697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
18911 22:27:22.299156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
18913 22:27:22.337810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
18914 22:27:22.338377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
18916 22:27:22.386592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
18917 22:27:22.387138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
18919 22:27:22.434356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
18921 22:27:22.434930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
18922 22:27:22.484964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
18924 22:27:22.485462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
18925 22:27:22.528406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
18926 22:27:22.528912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
18928 22:27:22.570579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
18930 22:27:22.571002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
18931 22:27:22.615296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
18932 22:27:22.615719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
18934 22:27:22.665703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
18935 22:27:22.666164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
18937 22:27:22.717008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
18938 22:27:22.717481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
18940 22:27:22.764945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
18941 22:27:22.765449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
18943 22:27:22.810469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
18944 22:27:22.810991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
18946 22:27:22.849271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
18947 22:27:22.849696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
18949 22:27:22.889890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
18950 22:27:22.890312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
18952 22:27:22.937738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
18953 22:27:22.938175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
18955 22:27:22.987063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
18956 22:27:22.987493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
18958 22:27:23.025576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
18959 22:27:23.026015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
18961 22:27:23.061232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
18963 22:27:23.062021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
18964 22:27:23.097839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
18965 22:27:23.098218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
18967 22:27:23.141343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
18968 22:27:23.141860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
18970 22:27:23.190734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
18971 22:27:23.191212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
18973 22:27:23.237487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
18975 22:27:23.237906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
18976 22:27:23.284303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
18978 22:27:23.284755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
18979 22:27:23.334187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
18980 22:27:23.334657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
18982 22:27:23.372641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
18983 22:27:23.373070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
18985 22:27:23.410657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
18987 22:27:23.411149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
18988 22:27:23.454476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
18989 22:27:23.454912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
18991 22:27:23.497369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
18992 22:27:23.497797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
18994 22:27:23.537122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
18996 22:27:23.537597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
18997 22:27:23.574867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
18998 22:27:23.575295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19000 22:27:23.615360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19001 22:27:23.615879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19003 22:27:23.661673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19004 22:27:23.662109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19006 22:27:23.699994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19008 22:27:23.700467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19009 22:27:23.745979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19011 22:27:23.746435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19012 22:27:23.783120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19013 22:27:23.783636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19015 22:27:23.833614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19016 22:27:23.834035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19018 22:27:23.886538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19020 22:27:23.886961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19021 22:27:23.937859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19022 22:27:23.938327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19024 22:27:23.989496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19025 22:27:23.989992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19027 22:27:24.034554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19028 22:27:24.034991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19030 22:27:24.076407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19031 22:27:24.076862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19033 22:27:24.120931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19034 22:27:24.121332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19036 22:27:24.161405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19037 22:27:24.161828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19039 22:27:24.198416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19040 22:27:24.198764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19042 22:27:24.234105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19044 22:27:24.234496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19045 22:27:24.274439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19047 22:27:24.274810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19048 22:27:24.315265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19049 22:27:24.315658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19051 22:27:24.357782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19053 22:27:24.358250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19054 22:27:24.396105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19056 22:27:24.396586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19057 22:27:24.433139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19059 22:27:24.433608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19060 22:27:24.481328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19061 22:27:24.481756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19063 22:27:24.540663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19064 22:27:24.541148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19066 22:27:24.592699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19067 22:27:24.593162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19069 22:27:24.643559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19071 22:27:24.643937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19072 22:27:24.689588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19073 22:27:24.690050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19075 22:27:24.727355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19076 22:27:24.727796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19078 22:27:24.808089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19080 22:27:24.808552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19081 22:27:24.860847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19083 22:27:24.861317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19084 22:27:24.906922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19085 22:27:24.907378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19087 22:27:24.954990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19088 22:27:24.955447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19090 22:27:24.998937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19092 22:27:24.999366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19093 22:27:25.043301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19094 22:27:25.043802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19096 22:27:25.085512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19098 22:27:25.086158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19099 22:27:25.128556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19100 22:27:25.129039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19102 22:27:25.173233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19103 22:27:25.173669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19105 22:27:25.214674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19107 22:27:25.215124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19108 22:27:25.250934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19110 22:27:25.251645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19111 22:27:25.285895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19113 22:27:25.286544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19114 22:27:25.326191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19115 22:27:25.326629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19117 22:27:25.368590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19119 22:27:25.369054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19120 22:27:25.410774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19122 22:27:25.411249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19123 22:27:25.454560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19124 22:27:25.454930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19126 22:27:25.504042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19128 22:27:25.504579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19129 22:27:25.553411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19131 22:27:25.553865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19132 22:27:25.590626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19133 22:27:25.591057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19135 22:27:25.626290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19137 22:27:25.627066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19138 22:27:25.662040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19139 22:27:25.662472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19141 22:27:25.697873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19142 22:27:25.698387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19144 22:27:25.736975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19145 22:27:25.737448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19147 22:27:25.775191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19148 22:27:25.775647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19150 22:27:25.813414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19151 22:27:25.813856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19153 22:27:25.851809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19154 22:27:25.852299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19156 22:27:25.899120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19157 22:27:25.900222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19159 22:27:25.936610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19161 22:27:25.937009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19162 22:27:25.984347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19163 22:27:25.984811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19165 22:27:26.025727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19167 22:27:26.026223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19168 22:27:26.075551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19169 22:27:26.076009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19171 22:27:26.120816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19172 22:27:26.121229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19174 22:27:26.167346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19175 22:27:26.167741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19177 22:27:26.218712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19179 22:27:26.219134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19180 22:27:26.271305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19181 22:27:26.271735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19183 22:27:26.316989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19185 22:27:26.317470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19186 22:27:26.361767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19187 22:27:26.362158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19189 22:27:26.409036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19190 22:27:26.409441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19192 22:27:26.452784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19194 22:27:26.453433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19195 22:27:26.494715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19196 22:27:26.495176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19198 22:27:26.540566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19199 22:27:26.540948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19201 22:27:26.589203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19202 22:27:26.589659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19204 22:27:26.630520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19206 22:27:26.630903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19207 22:27:26.680263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19209 22:27:26.680731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19210 22:27:26.730575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19212 22:27:26.731024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19213 22:27:26.787117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19214 22:27:26.787541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19216 22:27:26.838560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19217 22:27:26.839143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19219 22:27:26.883265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19220 22:27:26.883752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19222 22:27:26.934602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19224 22:27:26.935094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19225 22:27:26.986934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19226 22:27:26.987384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19228 22:27:27.037709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19230 22:27:27.038202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19231 22:27:27.093876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19232 22:27:27.094283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19234 22:27:27.150357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19235 22:27:27.150796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19237 22:27:27.206535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19238 22:27:27.206942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19240 22:27:27.257723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19241 22:27:27.258161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19243 22:27:27.311897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19245 22:27:27.312313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19246 22:27:27.365088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19248 22:27:27.365558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19249 22:27:27.404755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19250 22:27:27.405154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19252 22:27:27.455366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19253 22:27:27.455793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19255 22:27:27.505025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19256 22:27:27.505460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19258 22:27:27.553431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19259 22:27:27.553869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19261 22:27:27.605685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19262 22:27:27.606160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19264 22:27:27.651872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19265 22:27:27.652304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19267 22:27:27.690112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19268 22:27:27.690541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19270 22:27:27.733587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19271 22:27:27.734046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19273 22:27:27.774643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19274 22:27:27.775099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19276 22:27:27.817895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19277 22:27:27.818319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19279 22:27:27.857302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19280 22:27:27.857691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19282 22:27:27.900667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19283 22:27:27.901086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19285 22:27:27.941162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19287 22:27:27.941557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19288 22:27:27.985355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19289 22:27:27.985769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19291 22:27:28.025644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19293 22:27:28.026393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19294 22:27:28.068784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19295 22:27:28.069211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19297 22:27:28.114671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19298 22:27:28.115087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19300 22:27:28.169220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19301 22:27:28.169652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19303 22:27:28.216690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19304 22:27:28.217072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19306 22:27:28.271163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19307 22:27:28.271597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19309 22:27:28.319047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19310 22:27:28.319453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19312 22:27:28.366733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19313 22:27:28.367166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19315 22:27:28.409673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19317 22:27:28.410139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19318 22:27:28.457546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19319 22:27:28.457991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19321 22:27:28.497921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19323 22:27:28.498387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19324 22:27:28.541490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19325 22:27:28.541924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19327 22:27:28.588014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19329 22:27:28.588484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19330 22:27:28.632431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19331 22:27:28.632855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19333 22:27:28.681714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19334 22:27:28.682095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19336 22:27:28.737182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19337 22:27:28.737588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19339 22:27:28.791014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19340 22:27:28.791568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19342 22:27:28.841581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19343 22:27:28.841980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19345 22:27:28.890354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19347 22:27:28.891093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19348 22:27:28.930200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19349 22:27:28.930632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19351 22:27:28.969788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19352 22:27:28.970222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19354 22:27:29.018132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19355 22:27:29.018557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19357 22:27:29.058311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19359 22:27:29.058784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19360 22:27:29.099626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19361 22:27:29.100078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19363 22:27:29.141468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19364 22:27:29.141876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19366 22:27:29.185120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19367 22:27:29.185510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19369 22:27:29.223567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19370 22:27:29.223984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19372 22:27:29.266470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19373 22:27:29.266873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19375 22:27:29.311289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19376 22:27:29.311631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19378 22:27:29.356823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19379 22:27:29.357245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19381 22:27:29.397842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19382 22:27:29.398307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19384 22:27:29.447718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19386 22:27:29.448159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19387 22:27:29.501028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19388 22:27:29.501440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19390 22:27:29.547503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19391 22:27:29.547932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19393 22:27:29.587337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19394 22:27:29.587768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19396 22:27:29.626004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19398 22:27:29.626444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19399 22:27:29.665039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19400 22:27:29.665588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19402 22:27:29.708730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19403 22:27:29.709275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19405 22:27:29.750820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19407 22:27:29.751579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19408 22:27:29.793063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19409 22:27:29.793460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19411 22:27:29.838822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19413 22:27:29.839308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19414 22:27:29.915749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19416 22:27:29.916237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19417 22:27:29.959057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19418 22:27:29.959496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19420 22:27:30.002342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19422 22:27:30.002815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19423 22:27:30.040556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19425 22:27:30.041016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19426 22:27:30.080079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19428 22:27:30.080588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19429 22:27:30.133096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19431 22:27:30.133550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19432 22:27:30.182827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19434 22:27:30.183432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19435 22:27:30.229590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19436 22:27:30.230142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19438 22:27:30.270058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19439 22:27:30.270479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19441 22:27:30.308032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19443 22:27:30.308438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19444 22:27:30.354282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19446 22:27:30.354761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19447 22:27:30.397691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19448 22:27:30.398130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19450 22:27:30.448946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19451 22:27:30.449360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19453 22:27:30.489205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19454 22:27:30.489610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19456 22:27:30.531515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19457 22:27:30.531977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19459 22:27:30.570384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19461 22:27:30.570827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19462 22:27:30.612818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19463 22:27:30.613248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19465 22:27:30.655015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19466 22:27:30.655387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19468 22:27:30.699304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19469 22:27:30.699738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19471 22:27:30.742735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19472 22:27:30.743177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19474 22:27:30.789029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19475 22:27:30.789486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19477 22:27:30.832057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19479 22:27:30.832541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19480 22:27:30.874278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19481 22:27:30.874735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19483 22:27:30.917659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19485 22:27:30.918144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19486 22:27:30.970653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19487 22:27:30.971080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19489 22:27:31.010585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19490 22:27:31.011000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19492 22:27:31.053529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19494 22:27:31.054047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19495 22:27:31.094741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19496 22:27:31.095142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19498 22:27:31.133702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19499 22:27:31.134122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19501 22:27:31.179334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19502 22:27:31.179775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19504 22:27:31.220999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19506 22:27:31.221437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19507 22:27:31.259463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19508 22:27:31.259901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19510 22:27:31.303401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19511 22:27:31.303842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19513 22:27:31.349093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19514 22:27:31.349549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19516 22:27:31.395626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19517 22:27:31.396066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19519 22:27:31.443156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19521 22:27:31.443643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19522 22:27:31.484208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19524 22:27:31.484696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19525 22:27:31.526530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19526 22:27:31.526988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19528 22:27:31.565050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19530 22:27:31.565791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19531 22:27:31.615942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19533 22:27:31.616434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19534 22:27:31.659633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19536 22:27:31.660106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19537 22:27:31.699498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19538 22:27:31.699941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19540 22:27:31.739630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19541 22:27:31.740074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19543 22:27:31.778207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19544 22:27:31.778627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19546 22:27:31.820721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19547 22:27:31.821114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19549 22:27:31.860475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19550 22:27:31.860916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19552 22:27:31.898762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19553 22:27:31.899191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19555 22:27:31.943083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19556 22:27:31.943545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19558 22:27:31.990710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19559 22:27:31.991165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19561 22:27:32.040270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19562 22:27:32.040714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19564 22:27:32.083188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19565 22:27:32.083595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19567 22:27:32.128976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19568 22:27:32.129425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19570 22:27:32.173844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19571 22:27:32.174310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19573 22:27:32.225610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19574 22:27:32.226091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19576 22:27:32.271586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19577 22:27:32.272041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19579 22:27:32.313575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19580 22:27:32.314017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19582 22:27:32.355789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19584 22:27:32.356228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19585 22:27:32.393053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19586 22:27:32.393481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19588 22:27:32.434898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19590 22:27:32.435339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19591 22:27:32.478021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19593 22:27:32.478450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19594 22:27:32.516703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19595 22:27:32.517148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19597 22:27:32.554701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19599 22:27:32.555164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19600 22:27:32.597862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19601 22:27:32.598236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19603 22:27:32.637837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19604 22:27:32.638276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19606 22:27:32.681819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19607 22:27:32.682260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19609 22:27:32.734169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19610 22:27:32.734582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19612 22:27:32.779082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19613 22:27:32.779519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19615 22:27:32.825823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19617 22:27:32.826313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19618 22:27:32.871605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19619 22:27:32.872066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19621 22:27:32.916359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19622 22:27:32.916809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19624 22:27:32.957994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19626 22:27:32.958497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19627 22:27:32.999967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19629 22:27:33.000441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19630 22:27:33.041945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19631 22:27:33.042375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19633 22:27:33.091411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19635 22:27:33.092143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19636 22:27:33.137775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19637 22:27:33.138202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19639 22:27:33.173146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19640 22:27:33.173562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19642 22:27:33.218826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19643 22:27:33.219253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19645 22:27:33.262258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19646 22:27:33.262701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19648 22:27:33.306963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19649 22:27:33.307353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19651 22:27:33.355029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19652 22:27:33.355432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19654 22:27:33.399647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19656 22:27:33.400262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19657 22:27:33.444829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19659 22:27:33.445593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19660 22:27:33.487145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19661 22:27:33.487570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19663 22:27:33.529296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19664 22:27:33.529680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19666 22:27:33.579355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19667 22:27:33.579733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19669 22:27:33.619992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19670 22:27:33.620396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19672 22:27:33.662067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19674 22:27:33.662559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19675 22:27:33.706284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19677 22:27:33.707044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19678 22:27:33.743526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19679 22:27:33.743945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19681 22:27:33.786804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19682 22:27:33.787276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19684 22:27:33.835119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19685 22:27:33.835556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19687 22:27:33.882675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19689 22:27:33.883126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19690 22:27:33.925530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19692 22:27:33.926014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19693 22:27:33.970324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19694 22:27:33.970716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19696 22:27:34.023935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19698 22:27:34.024445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19699 22:27:34.065764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19700 22:27:34.066207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19702 22:27:34.112423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19704 22:27:34.112908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19705 22:27:34.156377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19706 22:27:34.156823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19708 22:27:34.202887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19709 22:27:34.203327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19711 22:27:34.248189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19713 22:27:34.248891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19714 22:27:34.286700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19715 22:27:34.287129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19717 22:27:34.327861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19719 22:27:34.328341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19720 22:27:34.370671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19721 22:27:34.371102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19723 22:27:34.418299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19724 22:27:34.418728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19726 22:27:34.463723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19728 22:27:34.464211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19729 22:27:34.510770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19731 22:27:34.511419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19732 22:27:34.560707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19733 22:27:34.561090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19735 22:27:34.605809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19736 22:27:34.606178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19738 22:27:34.648461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19739 22:27:34.648919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19741 22:27:34.694045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19743 22:27:34.694658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19744 22:27:34.743630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19745 22:27:34.744062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19747 22:27:34.786619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19748 22:27:34.787039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19750 22:27:34.823740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19752 22:27:34.824212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19753 22:27:34.862674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19754 22:27:34.863109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19756 22:27:34.910156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19757 22:27:34.910553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19759 22:27:34.953840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19761 22:27:34.954613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19762 22:27:35.017340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19763 22:27:35.017783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19765 22:27:35.062671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19767 22:27:35.063304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19768 22:27:35.115296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19769 22:27:35.115748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19771 22:27:35.168837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19773 22:27:35.169572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19774 22:27:35.226146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19775 22:27:35.226605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19777 22:27:35.272983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19778 22:27:35.273531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19780 22:27:35.315120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19782 22:27:35.315574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19783 22:27:35.361716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19785 22:27:35.362178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19786 22:27:35.405701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19787 22:27:35.406128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19789 22:27:35.446057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19790 22:27:35.446499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19792 22:27:35.489152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19793 22:27:35.489585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19795 22:27:35.533226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19796 22:27:35.533672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19798 22:27:35.577497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19799 22:27:35.577928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19801 22:27:35.625225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19802 22:27:35.625679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19804 22:27:35.670724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19805 22:27:35.671234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19807 22:27:35.714277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19808 22:27:35.714759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19810 22:27:35.757507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19812 22:27:35.758243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19813 22:27:35.792872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19814 22:27:35.793422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19816 22:27:35.831993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19818 22:27:35.832623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19819 22:27:35.878681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19820 22:27:35.879142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19822 22:27:35.921332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19824 22:27:35.922066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19825 22:27:35.963344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19827 22:27:35.963903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19828 22:27:36.007912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19830 22:27:36.008328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19831 22:27:36.048880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19833 22:27:36.049266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19834 22:27:36.086596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19835 22:27:36.087098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19837 22:27:36.128132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19839 22:27:36.128591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19840 22:27:36.164974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19842 22:27:36.165560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19843 22:27:36.201439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19844 22:27:36.201975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19846 22:27:36.246626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19848 22:27:36.247182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19849 22:27:36.294754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19851 22:27:36.295244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19852 22:27:36.338647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19854 22:27:36.339250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19855 22:27:36.385668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19856 22:27:36.386247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19858 22:27:36.432902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
19860 22:27:36.433374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19861 22:27:36.483428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
19862 22:27:36.483900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
19864 22:27:36.531815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
19866 22:27:36.532262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
19867 22:27:36.582840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
19868 22:27:36.583262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
19870 22:27:36.628505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
19872 22:27:36.628983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
19873 22:27:36.677988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
19874 22:27:36.678423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
19876 22:27:36.717882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
19877 22:27:36.718256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
19879 22:27:36.758066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
19880 22:27:36.758504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
19882 22:27:36.805545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
19883 22:27:36.805975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
19885 22:27:36.849446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
19886 22:27:36.849920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
19888 22:27:36.897134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
19889 22:27:36.897531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
19891 22:27:36.945041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
19893 22:27:36.945531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
19894 22:27:36.988936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
19895 22:27:36.989330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
19897 22:27:37.034437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
19899 22:27:37.034902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
19900 22:27:37.077385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
19902 22:27:37.078170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
19903 22:27:37.125112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
19904 22:27:37.125590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
19906 22:27:37.170934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
19908 22:27:37.171327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
19909 22:27:37.223884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
19911 22:27:37.224418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
19912 22:27:37.274540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
19914 22:27:37.275204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
19915 22:27:37.320891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
19916 22:27:37.321276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
19918 22:27:37.369982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
19919 22:27:37.370367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
19921 22:27:37.419189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
19923 22:27:37.419611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
19924 22:27:37.473724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
19926 22:27:37.474392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
19927 22:27:37.522856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
19928 22:27:37.523248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
19930 22:27:37.571686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
19931 22:27:37.572209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
19933 22:27:37.617055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
19934 22:27:37.617548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
19936 22:27:37.660851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
19938 22:27:37.661251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
19939 22:27:37.701841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
19940 22:27:37.702355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
19942 22:27:37.745946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
19943 22:27:37.746507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
19945 22:27:37.802920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
19946 22:27:37.803457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
19948 22:27:37.850257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
19950 22:27:37.850658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
19951 22:27:37.894626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
19953 22:27:37.896292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
19954 22:27:37.934690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
19955 22:27:37.935177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
19957 22:27:37.972713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
19959 22:27:37.973182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
19960 22:27:38.009110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
19961 22:27:38.009509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
19963 22:27:38.049968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
19965 22:27:38.050463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
19966 22:27:38.089729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
19967 22:27:38.090196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
19969 22:27:38.138165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
19971 22:27:38.138644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
19972 22:27:38.187669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
19974 22:27:38.188152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
19975 22:27:38.239651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
19976 22:27:38.240147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
19978 22:27:38.292952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
19979 22:27:38.293310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
19981 22:27:38.334338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
19982 22:27:38.334791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
19984 22:27:38.380905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
19986 22:27:38.381373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
19987 22:27:38.425695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
19988 22:27:38.426069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
19990 22:27:38.473293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
19991 22:27:38.473696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
19993 22:27:38.522992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
19995 22:27:38.523329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
19996 22:27:38.573710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
19998 22:27:38.574151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
19999 22:27:38.628964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20001 22:27:38.629431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20002 22:27:38.678150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20003 22:27:38.678574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20005 22:27:38.715115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20006 22:27:38.715553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20008 22:27:38.752902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20009 22:27:38.753347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20011 22:27:38.797056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20012 22:27:38.797452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20014 22:27:38.840730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20015 22:27:38.841127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20017 22:27:38.879168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20019 22:27:38.879617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20020 22:27:38.920876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20021 22:27:38.921379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20023 22:27:38.963367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20024 22:27:38.963816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20026 22:27:39.005276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20028 22:27:39.005788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20029 22:27:39.055909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20031 22:27:39.056343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20032 22:27:39.106939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20034 22:27:39.107314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20035 22:27:39.146320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20036 22:27:39.146742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20038 22:27:39.188252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20040 22:27:39.189012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20041 22:27:39.229521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20042 22:27:39.229993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20044 22:27:39.275403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20045 22:27:39.275876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20047 22:27:39.315567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20049 22:27:39.316186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20050 22:27:39.365448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20051 22:27:39.365909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20053 22:27:39.414089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20055 22:27:39.414561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20056 22:27:39.460756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20057 22:27:39.461240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20059 22:27:39.500012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20061 22:27:39.500713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20062 22:27:39.542869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20064 22:27:39.543624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20065 22:27:39.597769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20067 22:27:39.598223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20068 22:27:39.654508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20069 22:27:39.654991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20071 22:27:39.695449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20072 22:27:39.695945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20074 22:27:39.737292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20076 22:27:39.738037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20077 22:27:39.777655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20079 22:27:39.778347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20080 22:27:39.821437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20081 22:27:39.821873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20083 22:27:39.861330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20084 22:27:39.861804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20086 22:27:39.915502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20087 22:27:39.915878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20089 22:27:39.961086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20090 22:27:39.961565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20092 22:27:40.004637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20093 22:27:40.005052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20095 22:27:40.045122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20097 22:27:40.045897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20098 22:27:40.110174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20100 22:27:40.110634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20101 22:27:40.156823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20102 22:27:40.157235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20104 22:27:40.214083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20105 22:27:40.214515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20107 22:27:40.267579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20108 22:27:40.267953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20110 22:27:40.324679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20111 22:27:40.325063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20113 22:27:40.368937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20114 22:27:40.369349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20116 22:27:40.412762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20117 22:27:40.413142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20119 22:27:40.450746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20120 22:27:40.451187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20122 22:27:40.491320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20123 22:27:40.491831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20125 22:27:40.534949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20126 22:27:40.535433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20128 22:27:40.588698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20130 22:27:40.589159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20131 22:27:40.628044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20133 22:27:40.628519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20134 22:27:40.683365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20136 22:27:40.683998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20137 22:27:40.739342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20138 22:27:40.739799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20140 22:27:40.777125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20141 22:27:40.777566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20143 22:27:40.815082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20145 22:27:40.815733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20146 22:27:40.854787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20147 22:27:40.855281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20149 22:27:40.894675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20151 22:27:40.895151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20152 22:27:40.939452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20153 22:27:40.939867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20155 22:27:40.985923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20157 22:27:40.986385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20158 22:27:41.023768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20160 22:27:41.024242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20161 22:27:41.065275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20162 22:27:41.065685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20164 22:27:41.113725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20165 22:27:41.114162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20167 22:27:41.165614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20169 22:27:41.166243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20170 22:27:41.215944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20172 22:27:41.216416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20173 22:27:41.260162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20175 22:27:41.260553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20176 22:27:41.309500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20177 22:27:41.309953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20179 22:27:41.356946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20181 22:27:41.357366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20182 22:27:41.403235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20183 22:27:41.403665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20185 22:27:41.449945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20186 22:27:41.450429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20188 22:27:41.495158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20189 22:27:41.495587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20191 22:27:41.541721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20192 22:27:41.542132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20194 22:27:41.582097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20196 22:27:41.582718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20197 22:27:41.620950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20198 22:27:41.621302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20200 22:27:41.665610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20202 22:27:41.666092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20203 22:27:41.708620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20204 22:27:41.709144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20206 22:27:41.751807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20208 22:27:41.752235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20209 22:27:41.789235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20210 22:27:41.789656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20212 22:27:41.826132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20214 22:27:41.826613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20215 22:27:41.861956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20216 22:27:41.862418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20218 22:27:41.903881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20219 22:27:41.904290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20221 22:27:41.948466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20222 22:27:41.948886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20224 22:27:41.986574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20225 22:27:41.986917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20227 22:27:42.024689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20228 22:27:42.025116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20230 22:27:42.070155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20232 22:27:42.070717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20233 22:27:42.113277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20235 22:27:42.113793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20236 22:27:42.162050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20237 22:27:42.162488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20239 22:27:42.210376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20240 22:27:42.210789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20242 22:27:42.251944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20244 22:27:42.252419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20245 22:27:42.295278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20246 22:27:42.295727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20248 22:27:42.334581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20250 22:27:42.335066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20251 22:27:42.372596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20252 22:27:42.373032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20254 22:27:42.410221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20255 22:27:42.410634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20257 22:27:42.448866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20259 22:27:42.449299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20260 22:27:42.486683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20261 22:27:42.487123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20263 22:27:42.522141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20264 22:27:42.522592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20266 22:27:42.558675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20268 22:27:42.559119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20269 22:27:42.601355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20271 22:27:42.601840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20272 22:27:42.637984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20273 22:27:42.638402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20275 22:27:42.676931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20276 22:27:42.677344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20278 22:27:42.718426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20279 22:27:42.718817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20281 22:27:42.761339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20282 22:27:42.761764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20284 22:27:42.799658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20285 22:27:42.800105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20287 22:27:42.838811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20289 22:27:42.839179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20290 22:27:42.885713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20292 22:27:42.886190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20293 22:27:42.932959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20294 22:27:42.933415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20296 22:27:42.979049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20298 22:27:42.979526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20299 22:27:43.027169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20300 22:27:43.027606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20302 22:27:43.077401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20304 22:27:43.077896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20305 22:27:43.121167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20306 22:27:43.121622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20308 22:27:43.157333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20310 22:27:43.157910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20311 22:27:43.192859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20312 22:27:43.193308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20314 22:27:43.230187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20315 22:27:43.230668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20317 22:27:43.269469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20318 22:27:43.270044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20320 22:27:43.322701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20322 22:27:43.323164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20323 22:27:43.371264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20325 22:27:43.371735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20326 22:27:43.429318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20327 22:27:43.429767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20329 22:27:43.477232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20330 22:27:43.477670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20332 22:27:43.516552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20333 22:27:43.516973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20335 22:27:43.561803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20336 22:27:43.562242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20338 22:27:43.598833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20339 22:27:43.599260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20341 22:27:43.640759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20342 22:27:43.641148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20344 22:27:43.686739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20345 22:27:43.687115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20347 22:27:43.724359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20348 22:27:43.724750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20350 22:27:43.769762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20352 22:27:43.770244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20353 22:27:43.831479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20354 22:27:43.831896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20356 22:27:43.879327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20357 22:27:43.879746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20359 22:27:43.917209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20361 22:27:43.917704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20362 22:27:43.953890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20364 22:27:43.954369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20365 22:27:43.990030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20367 22:27:43.990708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20368 22:27:44.036569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20369 22:27:44.036956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20371 22:27:44.076338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20372 22:27:44.076772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20374 22:27:44.114285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20375 22:27:44.114706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20377 22:27:44.160901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20378 22:27:44.161343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20380 22:27:44.198297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20381 22:27:44.198772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20383 22:27:44.238009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20384 22:27:44.238447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20386 22:27:44.288596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20387 22:27:44.289010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20389 22:27:44.340170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20391 22:27:44.340634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20392 22:27:44.393724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20394 22:27:44.394176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20395 22:27:44.447587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20396 22:27:44.447992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20398 22:27:44.498142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20399 22:27:44.498568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20401 22:27:44.545379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20402 22:27:44.545798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20404 22:27:44.582586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20405 22:27:44.583008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20407 22:27:44.624817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20409 22:27:44.625241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20410 22:27:44.670582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20411 22:27:44.670973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20413 22:27:44.706799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20415 22:27:44.707174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20416 22:27:44.744493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20417 22:27:44.744877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20419 22:27:44.785770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20420 22:27:44.786192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20422 22:27:44.831495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20424 22:27:44.831957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20425 22:27:44.879261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20426 22:27:44.879676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20428 22:27:44.925532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20429 22:27:44.925955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20431 22:27:44.965097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20432 22:27:44.965595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20434 22:27:45.007718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20435 22:27:45.008144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20437 22:27:45.046961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20438 22:27:45.047408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20440 22:27:45.083131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20442 22:27:45.083599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20443 22:27:45.121700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20444 22:27:45.122149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20446 22:27:45.159638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20448 22:27:45.160090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20449 22:27:45.198126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20450 22:27:45.198585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20452 22:27:45.247277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20454 22:27:45.247698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20455 22:27:45.283430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20456 22:27:45.283842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20458 22:27:45.323474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20459 22:27:45.323924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20461 22:27:45.361741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20463 22:27:45.362513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20464 22:27:45.403110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20465 22:27:45.403533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20467 22:27:45.441365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20468 22:27:45.441786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20470 22:27:45.478752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20471 22:27:45.479169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20473 22:27:45.517024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20475 22:27:45.517496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20476 22:27:45.555003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20477 22:27:45.555450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20479 22:27:45.596139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20481 22:27:45.596587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20482 22:27:45.634005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20484 22:27:45.634447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20485 22:27:45.675300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20486 22:27:45.675754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20488 22:27:45.719037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20489 22:27:45.719447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20491 22:27:45.765719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20493 22:27:45.766192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20494 22:27:45.810082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20495 22:27:45.810511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20497 22:27:45.856016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20499 22:27:45.856482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20500 22:27:45.902414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20502 22:27:45.902794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20503 22:27:45.939389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20504 22:27:45.939795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20506 22:27:45.979542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20507 22:27:45.980017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20509 22:27:46.022371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20511 22:27:46.022845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20512 22:27:46.071204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20513 22:27:46.071622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20515 22:27:46.127554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20516 22:27:46.128083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20518 22:27:46.170596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20519 22:27:46.171275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20521 22:27:46.212984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20522 22:27:46.213433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20524 22:27:46.257160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20525 22:27:46.257580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20527 22:27:46.303549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20528 22:27:46.303998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20530 22:27:46.341961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20531 22:27:46.342393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20533 22:27:46.379643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20534 22:27:46.380093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20536 22:27:46.429042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20537 22:27:46.429533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20539 22:27:46.479129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20541 22:27:46.479860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20542 22:27:46.526752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20543 22:27:46.527166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20545 22:27:46.568885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20546 22:27:46.569292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20548 22:27:46.615495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20549 22:27:46.616100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20551 22:27:46.663305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20552 22:27:46.663752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20554 22:27:46.713056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20556 22:27:46.713473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20557 22:27:46.761793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20558 22:27:46.762185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20560 22:27:46.810439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20561 22:27:46.810811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20563 22:27:46.859625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20564 22:27:46.860054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20566 22:27:46.905922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20567 22:27:46.906341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20569 22:27:46.950304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20571 22:27:46.950747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20572 22:27:46.989993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20574 22:27:46.990472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20575 22:27:47.028974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20576 22:27:47.029395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20578 22:27:47.075505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20580 22:27:47.075971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20581 22:27:47.121432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20582 22:27:47.121872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20584 22:27:47.169930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20585 22:27:47.170390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20587 22:27:47.215204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20589 22:27:47.215691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20590 22:27:47.258382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20591 22:27:47.258815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20593 22:27:47.306160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20594 22:27:47.306545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20596 22:27:47.363323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20597 22:27:47.363707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20599 22:27:47.409877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20601 22:27:47.410348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20602 22:27:47.456839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20604 22:27:47.457308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20605 22:27:47.500010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20607 22:27:47.500477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20608 22:27:47.541250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20609 22:27:47.541823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20611 22:27:47.582915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20613 22:27:47.583279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20614 22:27:47.622046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20616 22:27:47.622532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20617 22:27:47.667821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20619 22:27:47.668293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20620 22:27:47.706806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20622 22:27:47.707297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20623 22:27:47.752010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20625 22:27:47.752492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20626 22:27:47.801483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20627 22:27:47.801918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20629 22:27:47.848942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20631 22:27:47.849415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20632 22:27:47.885543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20633 22:27:47.885972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20635 22:27:47.929344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20636 22:27:47.929779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20638 22:27:47.974991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20639 22:27:47.975401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20641 22:27:48.019293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20642 22:27:48.019815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20644 22:27:48.061543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20645 22:27:48.061972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20647 22:27:48.098378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20649 22:27:48.098840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20650 22:27:48.136266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20652 22:27:48.136721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20653 22:27:48.182867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20655 22:27:48.183331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20656 22:27:48.233031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20658 22:27:48.233510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20659 22:27:48.275079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20660 22:27:48.275468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20662 22:27:48.318254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20663 22:27:48.318674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20665 22:27:48.361173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20667 22:27:48.361539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20668 22:27:48.406193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20669 22:27:48.406634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20671 22:27:48.454193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20672 22:27:48.454643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20674 22:27:48.496790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20675 22:27:48.497210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20677 22:27:48.544205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20679 22:27:48.544695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20680 22:27:48.587283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20681 22:27:48.587749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20683 22:27:48.636839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20684 22:27:48.637251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20686 22:27:48.686080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20687 22:27:48.686519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20689 22:27:48.722174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20690 22:27:48.722596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20692 22:27:48.767592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20693 22:27:48.768035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20695 22:27:48.813303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20696 22:27:48.813684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20698 22:27:48.853285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20699 22:27:48.853692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20701 22:27:48.892016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20703 22:27:48.892601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20704 22:27:48.934591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20705 22:27:48.935170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20707 22:27:48.975770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20708 22:27:48.976148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20710 22:27:49.025163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20711 22:27:49.025556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20713 22:27:49.071274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20714 22:27:49.071700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20716 22:27:49.110609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20717 22:27:49.111053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20719 22:27:49.148024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20721 22:27:49.148499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20722 22:27:49.190409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20723 22:27:49.190839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20725 22:27:49.236774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20726 22:27:49.237293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20728 22:27:49.283981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20730 22:27:49.284463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20731 22:27:49.329168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20733 22:27:49.329594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20734 22:27:49.367731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20735 22:27:49.368162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20737 22:27:49.413153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20738 22:27:49.413610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20740 22:27:49.454419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20741 22:27:49.454858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20743 22:27:49.497876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20744 22:27:49.498285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20746 22:27:49.539020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20747 22:27:49.539513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20749 22:27:49.585304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20750 22:27:49.585760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20752 22:27:49.633117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20753 22:27:49.633499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20755 22:27:49.677315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20757 22:27:49.677803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20758 22:27:49.717096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20760 22:27:49.717577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20761 22:27:49.759858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20762 22:27:49.760291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20764 22:27:49.810938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20765 22:27:49.811373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20767 22:27:49.859522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20769 22:27:49.860007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20770 22:27:49.907121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20771 22:27:49.907553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20773 22:27:49.944885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20774 22:27:49.945299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20776 22:27:49.989223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20777 22:27:49.989668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20779 22:27:50.032677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20780 22:27:50.033110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20782 22:27:50.078861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20784 22:27:50.079526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20785 22:27:50.126290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20786 22:27:50.126770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20788 22:27:50.173707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20789 22:27:50.174061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20791 22:27:50.210089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20793 22:27:50.210541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20794 22:27:50.253689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20795 22:27:50.254131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20797 22:27:50.299599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20798 22:27:50.300032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20800 22:27:50.365313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20802 22:27:50.365790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20803 22:27:50.411024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20804 22:27:50.411473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20806 22:27:50.454152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20807 22:27:50.454583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20809 22:27:50.500530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20810 22:27:50.500987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20812 22:27:50.549444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20813 22:27:50.549888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20815 22:27:50.596113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20817 22:27:50.596589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20818 22:27:50.643443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20819 22:27:50.643839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20821 22:27:50.691756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20822 22:27:50.692192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20824 22:27:50.741139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20825 22:27:50.741597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20827 22:27:50.785974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20828 22:27:50.786399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20830 22:27:50.824146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20832 22:27:50.824624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20833 22:27:50.867490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20834 22:27:50.867890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20836 22:27:50.914788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20837 22:27:50.915244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20839 22:27:50.964125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20841 22:27:50.964530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20842 22:27:51.013533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20844 22:27:51.014027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20845 22:27:51.058634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20846 22:27:51.059201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20848 22:27:51.096096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20850 22:27:51.096579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20851 22:27:51.138203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20853 22:27:51.138687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20854 22:27:51.180719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20855 22:27:51.181142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20857 22:27:51.225271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
20858 22:27:51.225706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20860 22:27:51.270106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
20861 22:27:51.270562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
20863 22:27:51.311243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
20864 22:27:51.311694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
20866 22:27:51.356467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
20867 22:27:51.356915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
20869 22:27:51.400799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
20870 22:27:51.401249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
20872 22:27:51.444429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
20873 22:27:51.444848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
20875 22:27:51.483248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
20876 22:27:51.483638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
20878 22:27:51.527799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
20879 22:27:51.528234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
20881 22:27:51.565380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
20882 22:27:51.565834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
20884 22:27:51.604674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
20885 22:27:51.605125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
20887 22:27:51.645444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
20888 22:27:51.645915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
20890 22:27:51.688702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
20891 22:27:51.689140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
20893 22:27:51.734688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
20894 22:27:51.735128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
20896 22:27:51.782188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
20897 22:27:51.782644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
20899 22:27:51.827107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
20900 22:27:51.827638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
20902 22:27:51.873129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
20903 22:27:51.873559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
20905 22:27:51.910474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
20906 22:27:51.910981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
20908 22:27:51.948752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
20909 22:27:51.949211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
20911 22:27:51.986728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
20912 22:27:51.987151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
20914 22:27:52.025547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
20916 22:27:52.026021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
20917 22:27:52.079123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
20918 22:27:52.079551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
20920 22:27:52.130860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
20921 22:27:52.131311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
20923 22:27:52.179070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
20925 22:27:52.179550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
20926 22:27:52.229837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
20928 22:27:52.230324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
20929 22:27:52.279081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
20930 22:27:52.279574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
20932 22:27:52.325830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
20934 22:27:52.326320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
20935 22:27:52.377206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
20936 22:27:52.377559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
20938 22:27:52.423613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
20939 22:27:52.424098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
20941 22:27:52.473977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
20943 22:27:52.474457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
20944 22:27:52.525420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
20946 22:27:52.526236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
20947 22:27:52.565286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
20949 22:27:52.565719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
20950 22:27:52.610491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
20952 22:27:52.610880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
20953 22:27:52.668935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
20954 22:27:52.669412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
20956 22:27:52.711976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
20958 22:27:52.712602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
20959 22:27:52.757048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
20961 22:27:52.757535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
20962 22:27:52.801329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
20963 22:27:52.801784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
20965 22:27:52.847816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
20967 22:27:52.848289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
20968 22:27:52.896117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
20970 22:27:52.896609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
20971 22:27:52.955020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
20973 22:27:52.955503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
20974 22:27:53.006487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
20975 22:27:53.006946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
20977 22:27:53.050445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
20978 22:27:53.050903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
20980 22:27:53.102312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
20981 22:27:53.102748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
20983 22:27:53.144735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
20984 22:27:53.145157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
20986 22:27:53.186500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
20987 22:27:53.186914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
20989 22:27:53.233363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
20990 22:27:53.233778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
20992 22:27:53.289204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
20993 22:27:53.289721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
20995 22:27:53.347194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
20996 22:27:53.347627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
20998 22:27:53.406492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
20999 22:27:53.406895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21001 22:27:53.465578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21002 22:27:53.466054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21004 22:27:53.522680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21005 22:27:53.523112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21007 22:27:53.582803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21008 22:27:53.583232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21010 22:27:53.643680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21011 22:27:53.644135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21013 22:27:53.704691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21015 22:27:53.705129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21016 22:27:53.764079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21018 22:27:53.764527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21019 22:27:53.822524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21020 22:27:53.822941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21022 22:27:53.874365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21024 22:27:53.874853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21025 22:27:53.916643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21026 22:27:53.917100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21028 22:27:53.969716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21029 22:27:53.970156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21031 22:27:54.013729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21032 22:27:54.014183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21034 22:27:54.055627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21035 22:27:54.056065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21037 22:27:54.094483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21038 22:27:54.094928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21040 22:27:54.151146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21041 22:27:54.151582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21043 22:27:54.210668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21044 22:27:54.211087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21046 22:27:54.256596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21047 22:27:54.257028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21049 22:27:54.296628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21050 22:27:54.297081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21052 22:27:54.336191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21054 22:27:54.336921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21055 22:27:54.379506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21056 22:27:54.379930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21058 22:27:54.429372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21059 22:27:54.429792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21061 22:27:54.485243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21062 22:27:54.485635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21064 22:27:54.540697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21066 22:27:54.541371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21067 22:27:54.594018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21068 22:27:54.594618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21070 22:27:54.647125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21072 22:27:54.647773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21073 22:27:54.699286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21074 22:27:54.699844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21076 22:27:54.755079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21077 22:27:54.755590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21079 22:27:54.799707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21081 22:27:54.800362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21082 22:27:54.843727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21084 22:27:54.844355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21085 22:27:54.893082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21086 22:27:54.893515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21088 22:27:54.953959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21090 22:27:54.954453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21091 22:27:55.016131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21093 22:27:55.016754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21094 22:27:55.079924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21096 22:27:55.080482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21097 22:27:55.141851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21098 22:27:55.142285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21100 22:27:55.196656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21101 22:27:55.197075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21103 22:27:55.249944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21105 22:27:55.250687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21106 22:27:55.301779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21107 22:27:55.302335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21109 22:27:55.355199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21111 22:27:55.355892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21112 22:27:55.407982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21114 22:27:55.408688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21115 22:27:55.474251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21116 22:27:55.474686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21118 22:27:55.531236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21120 22:27:55.531975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21121 22:27:55.573320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21122 22:27:55.573779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21124 22:27:55.625085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21125 22:27:55.625522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21127 22:27:55.672827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21128 22:27:55.673228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21130 22:27:55.729971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21131 22:27:55.730491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21133 22:27:55.786324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21135 22:27:55.786803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21136 22:27:55.826952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21137 22:27:55.827404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21139 22:27:55.867149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21141 22:27:55.867627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21142 22:27:55.906333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21143 22:27:55.906763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21145 22:27:55.949462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21147 22:27:55.949951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21148 22:27:55.995074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21149 22:27:55.995496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21151 22:27:56.054163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21153 22:27:56.054565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21154 22:27:56.114816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21156 22:27:56.115276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21157 22:27:56.174740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21158 22:27:56.175254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21160 22:27:56.235554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21161 22:27:56.235960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21163 22:27:56.294245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21164 22:27:56.294697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21166 22:27:56.354879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21167 22:27:56.355286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21169 22:27:56.413205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21171 22:27:56.413584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21172 22:27:56.471032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21173 22:27:56.471419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21175 22:27:56.519621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21176 22:27:56.520182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21178 22:27:56.572929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21179 22:27:56.573376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21181 22:27:56.617200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21183 22:27:56.617691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21184 22:27:56.666707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21185 22:27:56.667139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21187 22:27:56.715039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21189 22:27:56.715431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21190 22:27:56.759510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21191 22:27:56.759943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21193 22:27:56.802761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21194 22:27:56.803185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21196 22:27:56.841432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21197 22:27:56.841857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21199 22:27:56.894514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21201 22:27:56.895186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21202 22:27:56.940944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21203 22:27:56.941426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21205 22:27:56.987264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21206 22:27:56.987850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21208 22:27:57.026006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21209 22:27:57.026502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21211 22:27:57.063363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21212 22:27:57.063816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21214 22:27:57.102939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21215 22:27:57.103359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21217 22:27:57.142626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21218 22:27:57.143036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21220 22:27:57.186104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21221 22:27:57.186621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21223 22:27:57.233987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21224 22:27:57.234377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21226 22:27:57.281451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21227 22:27:57.281867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21229 22:27:57.326429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21230 22:27:57.326870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21232 22:27:57.368695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21234 22:27:57.369073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21235 22:27:57.417373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21237 22:27:57.417783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21238 22:27:57.460052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21240 22:27:57.460527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21241 22:27:57.517499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21242 22:27:57.517954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21244 22:27:57.577068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21245 22:27:57.577482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21247 22:27:57.623550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21248 22:27:57.623984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21250 22:27:57.670120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21251 22:27:57.670548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21253 22:27:57.717856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21254 22:27:57.718322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21256 22:27:57.765825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21258 22:27:57.766283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21259 22:27:57.813466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21260 22:27:57.813923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21262 22:27:57.851219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21263 22:27:57.851656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21265 22:27:57.902091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21266 22:27:57.902543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21268 22:27:57.950669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21270 22:27:57.951152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21271 22:27:57.998282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21272 22:27:57.998715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21274 22:27:58.055322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21276 22:27:58.055861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21277 22:27:58.097925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21279 22:27:58.098386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21280 22:27:58.136352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21281 22:27:58.136774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21283 22:27:58.173960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21284 22:27:58.174344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21286 22:27:58.218673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21287 22:27:58.219120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21289 22:27:58.263987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21291 22:27:58.264782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21292 22:27:58.302892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21293 22:27:58.303317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21295 22:27:58.350365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21296 22:27:58.350791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21298 22:27:58.390844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21299 22:27:58.391231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21301 22:27:58.437181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21302 22:27:58.437614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21304 22:27:58.483025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21305 22:27:58.483852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21307 22:27:58.520682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21308 22:27:58.521212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21310 22:27:58.564126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21312 22:27:58.564698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21313 22:27:58.602728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21314 22:27:58.603151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21316 22:27:58.647262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21317 22:27:58.647688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21319 22:27:58.693111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21320 22:27:58.693487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21322 22:27:58.737294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21323 22:27:58.737692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21325 22:27:58.778738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21327 22:27:58.779337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21328 22:27:58.823622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21330 22:27:58.824174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21331 22:27:58.862568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21332 22:27:58.862995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21334 22:27:58.898776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21335 22:27:58.899153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21337 22:27:58.936816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21339 22:27:58.937298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21340 22:27:58.974938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21341 22:27:58.975430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21343 22:27:59.022430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21344 22:27:59.022881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21346 22:27:59.060162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21348 22:27:59.060633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21349 22:27:59.102256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21350 22:27:59.102677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21352 22:27:59.138899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21354 22:27:59.139345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21355 22:27:59.178789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21356 22:27:59.179189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21358 22:27:59.219090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21359 22:27:59.219478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21361 22:27:59.273697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21362 22:27:59.274132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21364 22:27:59.313715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21365 22:27:59.314078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21367 22:27:59.353384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21368 22:27:59.353764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21370 22:27:59.391090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21371 22:27:59.391440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21373 22:27:59.427998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21375 22:27:59.428462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21376 22:27:59.464969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21377 22:27:59.465430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21379 22:27:59.502076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21380 22:27:59.502476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21382 22:27:59.538763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21383 22:27:59.539312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21385 22:27:59.577379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21386 22:27:59.577817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21388 22:27:59.614582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21389 22:27:59.614952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21391 22:27:59.653380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21393 22:27:59.653819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21394 22:27:59.701385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21395 22:27:59.701790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21397 22:27:59.745493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21399 22:27:59.745992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21400 22:27:59.793755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21401 22:27:59.794090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21403 22:27:59.837435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21404 22:27:59.837902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21406 22:27:59.899003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21408 22:27:59.899719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21409 22:27:59.948582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21410 22:27:59.949037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21412 22:28:00.002326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21413 22:28:00.002748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21415 22:28:00.044124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21417 22:28:00.044583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21418 22:28:00.082726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21420 22:28:00.083194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21421 22:28:00.126719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21422 22:28:00.127151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21424 22:28:00.166244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21425 22:28:00.166623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21427 22:28:00.209729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21428 22:28:00.210150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21430 22:28:00.253680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21431 22:28:00.254066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21433 22:28:00.295340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21434 22:28:00.295778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21436 22:28:00.335960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21438 22:28:00.336575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21439 22:28:00.378585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21441 22:28:00.379044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21442 22:28:00.422373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21443 22:28:00.422774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21445 22:28:00.466228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21446 22:28:00.466649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21448 22:28:00.521734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21449 22:28:00.522206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21451 22:28:00.602230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21453 22:28:00.602972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21454 22:28:00.645962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21455 22:28:00.646455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21457 22:28:00.685261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21458 22:28:00.685699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21460 22:28:00.735552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21462 22:28:00.736042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21463 22:28:00.785520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21465 22:28:00.786004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21466 22:28:00.835447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21467 22:28:00.835883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21469 22:28:00.885739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21470 22:28:00.886192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21472 22:28:00.926931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21474 22:28:00.927397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21475 22:28:00.966900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21476 22:28:00.967306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21478 22:28:01.014613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21479 22:28:01.015076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21481 22:28:01.074971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21482 22:28:01.075385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21484 22:28:01.116883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21485 22:28:01.117292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21487 22:28:01.153319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21488 22:28:01.153741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21490 22:28:01.188874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21491 22:28:01.189507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21493 22:28:01.224582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21495 22:28:01.225336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21496 22:28:01.260412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21497 22:28:01.260856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21499 22:28:01.311212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21500 22:28:01.311760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21502 22:28:01.356043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21504 22:28:01.356474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21505 22:28:01.395714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21506 22:28:01.396132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21508 22:28:01.453103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21509 22:28:01.453537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21511 22:28:01.499399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21512 22:28:01.499841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21514 22:28:01.540654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21515 22:28:01.541047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21517 22:28:01.579738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21518 22:28:01.580165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21520 22:28:01.625175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21522 22:28:01.625656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21523 22:28:01.668165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21525 22:28:01.668595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21526 22:28:01.720865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21528 22:28:01.721317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21529 22:28:01.758293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21530 22:28:01.758732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21532 22:28:01.793674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21533 22:28:01.794109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21535 22:28:01.835654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21536 22:28:01.836132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21538 22:28:01.878860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21539 22:28:01.879307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21541 22:28:01.914755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21542 22:28:01.915149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21544 22:28:01.949046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21545 22:28:01.949489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21547 22:28:01.984043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21549 22:28:01.984503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21550 22:28:02.019472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21551 22:28:02.019900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21553 22:28:02.056190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21555 22:28:02.056772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21556 22:28:02.099040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21558 22:28:02.099625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21559 22:28:02.136557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21560 22:28:02.137128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21562 22:28:02.176281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21564 22:28:02.176907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21565 22:28:02.214173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21566 22:28:02.214624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21568 22:28:02.252987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21569 22:28:02.253392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21571 22:28:02.291209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21572 22:28:02.291634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21574 22:28:02.332668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21575 22:28:02.333056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21577 22:28:02.371566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21578 22:28:02.372020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21580 22:28:02.418055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21581 22:28:02.418495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21583 22:28:02.458970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21584 22:28:02.459370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21586 22:28:02.510514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21587 22:28:02.510935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21589 22:28:02.550484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21590 22:28:02.550916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21592 22:28:02.594381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21593 22:28:02.594758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21595 22:28:02.633256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21596 22:28:02.633683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21598 22:28:02.670885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21599 22:28:02.671302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21601 22:28:02.718100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21602 22:28:02.718537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21604 22:28:02.757158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21605 22:28:02.757585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21607 22:28:02.798480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21608 22:28:02.798913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21610 22:28:02.845121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21611 22:28:02.845548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21613 22:28:02.898330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21614 22:28:02.898713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21616 22:28:02.957893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21617 22:28:02.958276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21619 22:28:03.001985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21620 22:28:03.002386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21622 22:28:03.043979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21624 22:28:03.044473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21625 22:28:03.096168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21627 22:28:03.096649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21628 22:28:03.142732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21630 22:28:03.143212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21631 22:28:03.189803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21632 22:28:03.190222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21634 22:28:03.233767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21635 22:28:03.234332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21637 22:28:03.284558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21638 22:28:03.284980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21640 22:28:03.323134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21641 22:28:03.324254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21643 22:28:03.380865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21644 22:28:03.381319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21646 22:28:03.439561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21647 22:28:03.439992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21649 22:28:03.503389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21650 22:28:03.503852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21652 22:28:03.545875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21653 22:28:03.546301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21655 22:28:03.585915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21656 22:28:03.586335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21658 22:28:03.625557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21660 22:28:03.626010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21661 22:28:03.665308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21662 22:28:03.665732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21664 22:28:03.703962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21666 22:28:03.704437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21667 22:28:03.743223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21669 22:28:03.743705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21670 22:28:03.781320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21672 22:28:03.781969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21673 22:28:03.825158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21674 22:28:03.825659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21676 22:28:03.868443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21678 22:28:03.868919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21679 22:28:03.906586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21680 22:28:03.907056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21682 22:28:03.945122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21683 22:28:03.945591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21685 22:28:03.982655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21687 22:28:03.983223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21688 22:28:04.023340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21689 22:28:04.023823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21691 22:28:04.062299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21692 22:28:04.062725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21694 22:28:04.105089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21696 22:28:04.105751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21697 22:28:04.145812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21698 22:28:04.146209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21700 22:28:04.186297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21701 22:28:04.186706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21703 22:28:04.224032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21705 22:28:04.224460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21706 22:28:04.261921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21708 22:28:04.262384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21709 22:28:04.308979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21710 22:28:04.309406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21712 22:28:04.346256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21714 22:28:04.346640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21715 22:28:04.390512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21717 22:28:04.390902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21718 22:28:04.430275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21720 22:28:04.430848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21721 22:28:04.468630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21722 22:28:04.469099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21724 22:28:04.506419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21726 22:28:04.507089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21727 22:28:04.542984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21728 22:28:04.543449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21730 22:28:04.579689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21731 22:28:04.580152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21733 22:28:04.615973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21735 22:28:04.616457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21736 22:28:04.654492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21737 22:28:04.654920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21739 22:28:04.692552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21740 22:28:04.693036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21742 22:28:04.731067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21744 22:28:04.731649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21745 22:28:04.768192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21747 22:28:04.768661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21748 22:28:04.805978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21750 22:28:04.806457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21751 22:28:04.842598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21752 22:28:04.843025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21754 22:28:04.881853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21755 22:28:04.882274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21757 22:28:04.921534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21758 22:28:04.921932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21760 22:28:04.959210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21761 22:28:04.959583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21763 22:28:04.998158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21764 22:28:04.998576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21766 22:28:05.034653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21768 22:28:05.035129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21769 22:28:05.074228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21770 22:28:05.074609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21772 22:28:05.125657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21773 22:28:05.126061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21775 22:28:05.171749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21776 22:28:05.172177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21778 22:28:05.209520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21779 22:28:05.209956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21781 22:28:05.246738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21783 22:28:05.247219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21784 22:28:05.284767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21785 22:28:05.285159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21787 22:28:05.322657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21789 22:28:05.323071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21790 22:28:05.370782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21792 22:28:05.371280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21793 22:28:05.415046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21794 22:28:05.415395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21796 22:28:05.473224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21797 22:28:05.473633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21799 22:28:05.530708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21800 22:28:05.531160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21802 22:28:05.590225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21803 22:28:05.590634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21805 22:28:05.629920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21807 22:28:05.630405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21808 22:28:05.666838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21809 22:28:05.667266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21811 22:28:05.724099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21813 22:28:05.724561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21814 22:28:05.762853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21815 22:28:05.763230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21817 22:28:05.801720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21818 22:28:05.802133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21820 22:28:05.839495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21821 22:28:05.839912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21823 22:28:05.884827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21824 22:28:05.885245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21826 22:28:05.924519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21827 22:28:05.924902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21829 22:28:05.962679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21830 22:28:05.963099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21832 22:28:06.002015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21833 22:28:06.002406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21835 22:28:06.041147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21836 22:28:06.041636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21838 22:28:06.087241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21839 22:28:06.087664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21841 22:28:06.134558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21843 22:28:06.135006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21844 22:28:06.179443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21846 22:28:06.179913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21847 22:28:06.220828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21848 22:28:06.221294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21850 22:28:06.262293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21852 22:28:06.262779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21853 22:28:06.299456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21854 22:28:06.299907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21856 22:28:06.339378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21857 22:28:06.339802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21859 22:28:06.377793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
21861 22:28:06.378256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
21862 22:28:06.416603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
21863 22:28:06.417018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
21865 22:28:06.456032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
21867 22:28:06.456507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
21868 22:28:06.495536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
21869 22:28:06.495973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
21871 22:28:06.534880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
21872 22:28:06.535331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
21874 22:28:06.583532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
21875 22:28:06.583944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
21877 22:28:06.636906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
21878 22:28:06.637308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
21880 22:28:06.677045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
21881 22:28:06.677466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
21883 22:28:06.717593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
21884 22:28:06.717939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
21886 22:28:06.757138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
21887 22:28:06.757554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
21889 22:28:06.797795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
21891 22:28:06.798548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
21892 22:28:06.849300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
21893 22:28:06.849684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
21895 22:28:06.897195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
21896 22:28:06.897618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
21898 22:28:06.944151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
21900 22:28:06.944601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
21901 22:28:06.999788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
21902 22:28:07.000287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
21904 22:28:07.045147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
21906 22:28:07.045605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
21907 22:28:07.093907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
21908 22:28:07.094360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
21910 22:28:07.137719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
21912 22:28:07.138184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
21913 22:28:07.181313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
21915 22:28:07.181962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
21916 22:28:07.224812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
21917 22:28:07.225264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
21919 22:28:07.264557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
21921 22:28:07.265028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
21922 22:28:07.303376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
21923 22:28:07.303820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
21925 22:28:07.346955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
21926 22:28:07.347374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
21928 22:28:07.397711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
21929 22:28:07.398136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
21931 22:28:07.441722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
21932 22:28:07.442155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
21934 22:28:07.484226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
21936 22:28:07.484795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
21937 22:28:07.522632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
21938 22:28:07.523059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
21940 22:28:07.559231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
21941 22:28:07.559656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
21943 22:28:07.597380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
21944 22:28:07.597782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
21946 22:28:07.643193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
21947 22:28:07.643628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
21949 22:28:07.683195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
21950 22:28:07.683627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
21952 22:28:07.720960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
21953 22:28:07.721387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
21955 22:28:07.758950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
21956 22:28:07.759373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
21958 22:28:07.797639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
21959 22:28:07.798085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
21961 22:28:07.850770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
21962 22:28:07.851212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
21964 22:28:07.894377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
21965 22:28:07.894814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
21967 22:28:07.933316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
21968 22:28:07.933689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
21970 22:28:07.973858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
21971 22:28:07.974268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
21973 22:28:08.025824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
21974 22:28:08.026276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
21976 22:28:08.078235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
21978 22:28:08.078701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
21979 22:28:08.129965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
21981 22:28:08.130398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
21982 22:28:08.180918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
21983 22:28:08.181475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
21985 22:28:08.219310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
21986 22:28:08.219778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
21988 22:28:08.264417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
21989 22:28:08.264914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
21991 22:28:08.312999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
21992 22:28:08.313488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
21994 22:28:08.352724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
21996 22:28:08.353419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
21997 22:28:08.393072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
21999 22:28:08.393524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22000 22:28:08.441197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22001 22:28:08.441663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22003 22:28:08.497804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22005 22:28:08.498207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22006 22:28:08.538655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22008 22:28:08.539122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22009 22:28:08.578985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22011 22:28:08.579461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22012 22:28:08.626079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22014 22:28:08.626560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22015 22:28:08.669698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22016 22:28:08.670151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22018 22:28:08.709260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22020 22:28:08.709740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22021 22:28:08.748553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22023 22:28:08.748944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22024 22:28:08.787434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22025 22:28:08.787872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22027 22:28:08.827382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22028 22:28:08.827771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22030 22:28:08.873392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22031 22:28:08.873829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22033 22:28:08.915677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22034 22:28:08.916128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22036 22:28:08.957350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22037 22:28:08.957783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22039 22:28:08.998053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22040 22:28:08.998440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22042 22:28:09.039371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22043 22:28:09.039806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22045 22:28:09.089697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22046 22:28:09.090137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22048 22:28:09.149267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22049 22:28:09.149805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22051 22:28:09.209302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22052 22:28:09.209730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22054 22:28:09.259549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22055 22:28:09.259952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22057 22:28:09.314395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22058 22:28:09.314823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22060 22:28:09.375050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22061 22:28:09.375439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22063 22:28:09.434040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22064 22:28:09.434433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22066 22:28:09.490990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22067 22:28:09.491396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22069 22:28:09.535138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22070 22:28:09.535564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22072 22:28:09.578149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22073 22:28:09.578570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22075 22:28:09.621883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22076 22:28:09.622322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22078 22:28:09.675070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22079 22:28:09.675507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22081 22:28:09.734119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22082 22:28:09.734507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22084 22:28:09.781580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22085 22:28:09.781977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22087 22:28:09.840795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22088 22:28:09.841341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22090 22:28:09.891143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22091 22:28:09.891512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22093 22:28:09.936754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22094 22:28:09.937166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22096 22:28:09.981824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22097 22:28:09.982257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22099 22:28:10.021683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22100 22:28:10.022108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22102 22:28:10.067845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22103 22:28:10.068253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22105 22:28:10.125796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22106 22:28:10.126235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22108 22:28:10.171499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22109 22:28:10.171926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22111 22:28:10.222420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22112 22:28:10.222849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22114 22:28:10.275682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22115 22:28:10.276095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22117 22:28:10.326385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22118 22:28:10.326806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22120 22:28:10.370863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22121 22:28:10.371220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22123 22:28:10.430919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22124 22:28:10.431333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22126 22:28:10.489776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22127 22:28:10.490162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22129 22:28:10.548989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22131 22:28:10.549475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22132 22:28:10.586503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22134 22:28:10.587003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22135 22:28:10.624992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22137 22:28:10.625481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22138 22:28:10.664924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22139 22:28:10.665506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22141 22:28:10.715220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22142 22:28:10.715661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22144 22:28:10.758545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22145 22:28:10.758949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22147 22:28:10.805487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22148 22:28:10.805913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22150 22:28:10.890777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22151 22:28:10.891189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22153 22:28:10.938826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22155 22:28:10.939305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22156 22:28:10.978747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22157 22:28:10.979178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22159 22:28:11.026014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22160 22:28:11.026409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22162 22:28:11.073960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22163 22:28:11.074386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22165 22:28:11.126362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22166 22:28:11.126798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22168 22:28:11.187458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22170 22:28:11.188080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22171 22:28:11.246638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22173 22:28:11.247054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22174 22:28:11.289633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22175 22:28:11.290077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22177 22:28:11.334868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22178 22:28:11.335291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22180 22:28:11.391580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22181 22:28:11.391997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22183 22:28:11.452004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22185 22:28:11.452547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22186 22:28:11.502717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22187 22:28:11.503155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22189 22:28:11.545737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22191 22:28:11.546246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22192 22:28:11.585621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22193 22:28:11.586070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22195 22:28:11.633902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22196 22:28:11.634351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22198 22:28:11.681595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22200 22:28:11.682382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22201 22:28:11.723572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22203 22:28:11.724108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22204 22:28:11.766089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22205 22:28:11.766603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22207 22:28:11.808716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22208 22:28:11.809128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22210 22:28:11.850390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22211 22:28:11.850831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22213 22:28:11.897685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22214 22:28:11.898128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22216 22:28:11.948071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22218 22:28:11.948550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22219 22:28:12.000193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22221 22:28:12.000670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22222 22:28:12.059126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22223 22:28:12.059619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22225 22:28:12.115307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22226 22:28:12.115751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22228 22:28:12.155906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22230 22:28:12.156392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22231 22:28:12.201261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22232 22:28:12.201693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22234 22:28:12.256080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22236 22:28:12.256552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22237 22:28:12.305727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22239 22:28:12.306211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22240 22:28:12.358949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22241 22:28:12.359327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22243 22:28:12.407602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22244 22:28:12.408043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22246 22:28:12.461865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22247 22:28:12.462319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22249 22:28:12.522515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22250 22:28:12.522961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22252 22:28:12.573638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22253 22:28:12.574119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22255 22:28:12.618579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22257 22:28:12.619050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22258 22:28:12.661486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22260 22:28:12.661978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22261 22:28:12.708137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22263 22:28:12.708619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22264 22:28:12.749470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22265 22:28:12.749902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22267 22:28:12.798018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22269 22:28:12.798536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22270 22:28:12.840014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22272 22:28:12.840567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22273 22:28:12.887395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22274 22:28:12.887805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22276 22:28:12.934345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22277 22:28:12.934743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22279 22:28:12.985946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22280 22:28:12.986511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22282 22:28:13.033064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22283 22:28:13.033450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22285 22:28:13.079913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22287 22:28:13.080605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22288 22:28:13.123276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22289 22:28:13.123749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22291 22:28:13.173495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22292 22:28:13.173960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22294 22:28:13.215247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22295 22:28:13.215702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22297 22:28:13.261470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22298 22:28:13.261907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22300 22:28:13.299250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22301 22:28:13.299681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22303 22:28:13.345701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22304 22:28:13.346168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22306 22:28:13.385940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22307 22:28:13.386398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22309 22:28:13.442960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22310 22:28:13.443351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22312 22:28:13.502524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22314 22:28:13.503004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22315 22:28:13.562162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22316 22:28:13.562600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22318 22:28:13.600576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22319 22:28:13.600939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22321 22:28:13.643312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22322 22:28:13.643693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22324 22:28:13.690844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22325 22:28:13.691288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22327 22:28:13.736964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22328 22:28:13.737410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22330 22:28:13.793281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22331 22:28:13.793755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22333 22:28:13.838956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22334 22:28:13.839358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22336 22:28:13.894035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22337 22:28:13.894426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22339 22:28:13.939682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22341 22:28:13.940165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22342 22:28:13.982520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22344 22:28:13.983086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22345 22:28:14.030292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22346 22:28:14.030684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22348 22:28:14.084446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22350 22:28:14.084854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22351 22:28:14.135292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22352 22:28:14.135688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22354 22:28:14.185543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22355 22:28:14.185994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22357 22:28:14.232152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22359 22:28:14.232697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22360 22:28:14.286278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22361 22:28:14.286689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22363 22:28:14.343445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22364 22:28:14.343824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22366 22:28:14.401298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22367 22:28:14.401684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22369 22:28:14.459866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22371 22:28:14.460407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22372 22:28:14.517832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22373 22:28:14.518240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22375 22:28:14.575112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22376 22:28:14.575577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22378 22:28:14.633778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22379 22:28:14.634207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22381 22:28:14.690503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22383 22:28:14.690976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22384 22:28:14.745802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22385 22:28:14.746400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22387 22:28:14.787661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22388 22:28:14.788118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22390 22:28:14.831375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22391 22:28:14.831836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22393 22:28:14.877689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22394 22:28:14.878147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22396 22:28:14.919687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22397 22:28:14.920137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22399 22:28:14.964166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22401 22:28:14.964644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22402 22:28:15.015614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22403 22:28:15.016059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22405 22:28:15.061501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22406 22:28:15.061975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22408 22:28:15.100783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22409 22:28:15.101300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22411 22:28:15.148128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22413 22:28:15.148865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22414 22:28:15.187026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22415 22:28:15.187462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22417 22:28:15.227912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22419 22:28:15.228354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22420 22:28:15.271272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22421 22:28:15.271703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22423 22:28:15.319711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22425 22:28:15.320189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22426 22:28:15.368922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22427 22:28:15.369377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22429 22:28:15.411434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22430 22:28:15.411878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22432 22:28:15.450761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22434 22:28:15.451190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22435 22:28:15.497953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22436 22:28:15.498382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22438 22:28:15.549824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22439 22:28:15.550273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22441 22:28:15.602770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22442 22:28:15.603173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22444 22:28:15.649168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22446 22:28:15.649642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22447 22:28:15.698399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22448 22:28:15.698831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22450 22:28:15.750857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22451 22:28:15.751339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22453 22:28:15.808510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22454 22:28:15.808950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22456 22:28:15.850974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22458 22:28:15.851460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22459 22:28:15.893030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22460 22:28:15.893494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22462 22:28:15.949677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22463 22:28:15.950082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22465 22:28:15.999336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22466 22:28:15.999738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22468 22:28:16.057856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22469 22:28:16.058299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22471 22:28:16.114208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22472 22:28:16.114624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22474 22:28:16.158920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22475 22:28:16.159348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22477 22:28:16.203336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22479 22:28:16.203765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22480 22:28:16.247434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22481 22:28:16.247841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22483 22:28:16.289533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22485 22:28:16.290260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22486 22:28:16.338920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22488 22:28:16.339400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22489 22:28:16.400268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22491 22:28:16.400862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22492 22:28:16.450578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22493 22:28:16.451000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22495 22:28:16.499467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22496 22:28:16.499878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22498 22:28:16.546227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22499 22:28:16.546658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22501 22:28:16.594129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22502 22:28:16.594570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22504 22:28:16.648278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22506 22:28:16.649010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22507 22:28:16.689625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22508 22:28:16.690046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22510 22:28:16.727484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22511 22:28:16.727916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22513 22:28:16.775541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22515 22:28:16.776028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22516 22:28:16.816665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22517 22:28:16.817093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22519 22:28:16.854343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22520 22:28:16.854773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22522 22:28:16.894417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22523 22:28:16.894850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22525 22:28:16.935534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22526 22:28:16.935965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22528 22:28:16.985798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22529 22:28:16.986256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22531 22:28:17.044734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22532 22:28:17.045177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22534 22:28:17.101944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22535 22:28:17.102417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22537 22:28:17.152082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22539 22:28:17.152520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22540 22:28:17.204078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22542 22:28:17.204605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22543 22:28:17.253266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22544 22:28:17.253684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22546 22:28:17.299623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22547 22:28:17.300052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22549 22:28:17.348750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22550 22:28:17.349135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22552 22:28:17.400170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22554 22:28:17.400654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22555 22:28:17.443446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22556 22:28:17.443897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22558 22:28:17.489331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22559 22:28:17.489777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22561 22:28:17.526820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22562 22:28:17.527250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22564 22:28:17.565852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22565 22:28:17.566315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22567 22:28:17.602370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22568 22:28:17.602763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22570 22:28:17.641112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22571 22:28:17.641547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22573 22:28:17.683569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22574 22:28:17.683996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22576 22:28:17.720619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22577 22:28:17.721033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22579 22:28:17.756568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22580 22:28:17.756988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22582 22:28:17.791698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22583 22:28:17.792129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22585 22:28:17.837571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22586 22:28:17.837997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22588 22:28:17.876353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22589 22:28:17.876772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22591 22:28:17.917953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22592 22:28:17.918355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22594 22:28:17.957068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22595 22:28:17.957472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22597 22:28:17.997472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22599 22:28:17.997876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22600 22:28:18.039491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22601 22:28:18.039873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22603 22:28:18.074006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22604 22:28:18.074480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22606 22:28:18.108104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22608 22:28:18.108511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22609 22:28:18.149153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22610 22:28:18.149601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22612 22:28:18.190207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22613 22:28:18.190623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22615 22:28:18.226173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22616 22:28:18.226566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22618 22:28:18.265987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22619 22:28:18.266404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22621 22:28:18.304072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22623 22:28:18.304839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22624 22:28:18.342743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22625 22:28:18.343133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22627 22:28:18.382513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22628 22:28:18.382939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22630 22:28:18.430606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22632 22:28:18.431102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22633 22:28:18.481016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22634 22:28:18.481467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22636 22:28:18.519602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22637 22:28:18.520048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22639 22:28:18.558202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22640 22:28:18.558623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22642 22:28:18.597201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22643 22:28:18.597672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22645 22:28:18.641822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22646 22:28:18.642318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22648 22:28:18.680457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22649 22:28:18.680845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22651 22:28:18.717894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22652 22:28:18.718311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22654 22:28:18.754934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22655 22:28:18.755382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22657 22:28:18.794356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22658 22:28:18.794752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22660 22:28:18.837813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22661 22:28:18.838254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22663 22:28:18.879724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22665 22:28:18.880210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22666 22:28:18.924590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22667 22:28:18.925022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22669 22:28:18.978497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22670 22:28:18.978941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22672 22:28:19.016750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22673 22:28:19.017101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22675 22:28:19.052499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22676 22:28:19.052892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22678 22:28:19.088863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22679 22:28:19.089283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22681 22:28:19.125187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22683 22:28:19.125579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22684 22:28:19.161133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22686 22:28:19.161607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22687 22:28:19.198213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22688 22:28:19.198753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22690 22:28:19.235376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22692 22:28:19.235858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22693 22:28:19.286875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22695 22:28:19.287484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22696 22:28:19.323316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22697 22:28:19.323730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22699 22:28:19.360391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22700 22:28:19.360840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22702 22:28:19.399315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22703 22:28:19.399704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22705 22:28:19.436753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22706 22:28:19.437182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22708 22:28:19.475884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22710 22:28:19.476369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22711 22:28:19.529353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22712 22:28:19.529747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22714 22:28:19.581417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22715 22:28:19.581929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22717 22:28:19.631518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22718 22:28:19.631969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22720 22:28:19.671358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22721 22:28:19.671737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22723 22:28:19.715504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22724 22:28:19.715996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22726 22:28:19.751667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22727 22:28:19.752233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22729 22:28:19.795141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22731 22:28:19.795584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22732 22:28:19.837497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22733 22:28:19.837968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22735 22:28:19.879491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22736 22:28:19.880042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22738 22:28:19.914861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22739 22:28:19.915408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22741 22:28:19.951636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22743 22:28:19.952111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22744 22:28:19.987856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22746 22:28:19.988526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22747 22:28:20.026493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22749 22:28:20.026970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22750 22:28:20.074366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22752 22:28:20.074824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22753 22:28:20.111580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22755 22:28:20.112017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22756 22:28:20.154692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22757 22:28:20.155127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22759 22:28:20.201190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22760 22:28:20.201692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22762 22:28:20.237822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22763 22:28:20.238255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22765 22:28:20.273749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22766 22:28:20.274262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22768 22:28:20.313053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22769 22:28:20.313537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22771 22:28:20.349522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22772 22:28:20.349963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22774 22:28:20.386143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22775 22:28:20.386620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22777 22:28:20.422996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22778 22:28:20.423479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22780 22:28:20.461751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22781 22:28:20.462237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22783 22:28:20.505417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22785 22:28:20.505895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22786 22:28:20.545407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22788 22:28:20.545901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22789 22:28:20.584094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22791 22:28:20.584664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22792 22:28:20.621213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22793 22:28:20.621626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22795 22:28:20.659070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22796 22:28:20.659561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22798 22:28:20.702148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22799 22:28:20.702654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22801 22:28:20.738869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22802 22:28:20.739330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22804 22:28:20.790776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22806 22:28:20.791248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22807 22:28:20.829486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22808 22:28:20.829917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22810 22:28:20.869910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22811 22:28:20.870441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22813 22:28:20.917273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22815 22:28:20.917811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22816 22:28:20.969635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22817 22:28:20.970181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22819 22:28:21.007417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22820 22:28:21.007846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22822 22:28:21.074946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22824 22:28:21.075742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22825 22:28:21.128797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22827 22:28:21.129159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22828 22:28:21.173270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22829 22:28:21.173689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22831 22:28:21.228202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22833 22:28:21.228920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22834 22:28:21.271076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22835 22:28:21.271504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22837 22:28:21.310178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22839 22:28:21.310633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22840 22:28:21.348880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22842 22:28:21.349335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22843 22:28:21.385018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22844 22:28:21.385466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22846 22:28:21.423805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22847 22:28:21.424224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22849 22:28:21.465332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22851 22:28:21.465998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22852 22:28:21.508017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22854 22:28:21.508511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22855 22:28:21.545526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22857 22:28:21.546208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22858 22:28:21.581865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22859 22:28:21.582339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
22861 22:28:21.618240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
22862 22:28:21.618669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
22864 22:28:21.657815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
22865 22:28:21.658236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
22867 22:28:21.694455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
22868 22:28:21.694882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
22870 22:28:21.730770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
22871 22:28:21.731258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
22873 22:28:21.781157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
22874 22:28:21.781634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
22876 22:28:21.816806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
22877 22:28:21.817294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
22879 22:28:21.853181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
22881 22:28:21.853643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
22882 22:28:21.889517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
22884 22:28:21.889985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
22885 22:28:21.925383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
22886 22:28:21.925868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
22888 22:28:21.961637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
22889 22:28:21.962063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
22891 22:28:21.998550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
22892 22:28:21.998975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
22894 22:28:22.037267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
22896 22:28:22.037741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
22897 22:28:22.075113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
22899 22:28:22.075571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
22900 22:28:22.116422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
22901 22:28:22.116807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
22903 22:28:22.162221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
22904 22:28:22.162655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
22906 22:28:22.204727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
22907 22:28:22.205115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
22909 22:28:22.242079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
22911 22:28:22.242395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
22912 22:28:22.286779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
22913 22:28:22.287139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
22915 22:28:22.336952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
22916 22:28:22.337543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
22918 22:28:22.379454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
22920 22:28:22.379958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
22921 22:28:22.425120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
22922 22:28:22.425570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
22924 22:28:22.471081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
22925 22:28:22.471600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
22927 22:28:22.518718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
22929 22:28:22.519211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
22930 22:28:22.569728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
22931 22:28:22.570170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
22933 22:28:22.609139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
22934 22:28:22.609540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
22936 22:28:22.654332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
22937 22:28:22.654669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
22939 22:28:22.699364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
22940 22:28:22.699716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
22942 22:28:22.746095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
22943 22:28:22.746596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
22945 22:28:22.797069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
22947 22:28:22.797543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
22948 22:28:22.834233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
22949 22:28:22.834590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
22951 22:28:22.878664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
22952 22:28:22.879062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
22954 22:28:22.928953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
22956 22:28:22.929500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
22957 22:28:22.977551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
22959 22:28:22.978276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
22960 22:28:23.017947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
22962 22:28:23.018598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
22963 22:28:23.065469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
22964 22:28:23.065906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
22966 22:28:23.113122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
22967 22:28:23.113515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
22969 22:28:23.162105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
22970 22:28:23.162674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
22972 22:28:23.202714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
22973 22:28:23.203152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
22975 22:28:23.245025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
22977 22:28:23.245496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
22978 22:28:23.281038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
22980 22:28:23.281530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
22981 22:28:23.318924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
22982 22:28:23.319355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
22984 22:28:23.362811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
22986 22:28:23.363286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
22987 22:28:23.400143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
22989 22:28:23.400807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
22990 22:28:23.436950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
22992 22:28:23.437420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
22993 22:28:23.479414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
22995 22:28:23.479875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
22996 22:28:23.521484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
22997 22:28:23.522059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
22999 22:28:23.563468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23000 22:28:23.563867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23002 22:28:23.600687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23003 22:28:23.601119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23005 22:28:23.651195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23006 22:28:23.651676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23008 22:28:23.693521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23010 22:28:23.694028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23011 22:28:23.729449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23012 22:28:23.729900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23014 22:28:23.764714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23015 22:28:23.765120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23017 22:28:23.799332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23019 22:28:23.799758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23020 22:28:23.833798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23021 22:28:23.834304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23023 22:28:23.869009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23025 22:28:23.869768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23026 22:28:23.905030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23028 22:28:23.905399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23029 22:28:23.939626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23030 22:28:23.940050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23032 22:28:23.975371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23033 22:28:23.975758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23035 22:28:24.014396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23036 22:28:24.014789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23038 22:28:24.058010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23039 22:28:24.058517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23041 22:28:24.100756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23042 22:28:24.101176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23044 22:28:24.154742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23045 22:28:24.155191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23047 22:28:24.209599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23049 22:28:24.210084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23050 22:28:24.245541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23052 22:28:24.246022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23053 22:28:24.282369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23055 22:28:24.282839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23056 22:28:24.321619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23057 22:28:24.322087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23059 22:28:24.365715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23060 22:28:24.366115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23062 22:28:24.410671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23063 22:28:24.411142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23065 22:28:24.447028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23067 22:28:24.447788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23068 22:28:24.484872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23069 22:28:24.485307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23071 22:28:24.533357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23072 22:28:24.533766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23074 22:28:24.572494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23075 22:28:24.572949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23077 22:28:24.615155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23079 22:28:24.615673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23080 22:28:24.665406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23081 22:28:24.665842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23083 22:28:24.718391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23084 22:28:24.718777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23086 22:28:24.752705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23088 22:28:24.753119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23089 22:28:24.785546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23090 22:28:24.785970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23092 22:28:24.823106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23094 22:28:24.823718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23095 22:28:24.868960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23096 22:28:24.869442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23098 22:28:24.914475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23099 22:28:24.914951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23101 22:28:24.950040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23102 22:28:24.950569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23104 22:28:24.985902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23105 22:28:24.986340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23107 22:28:25.020748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23109 22:28:25.021328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23110 22:28:25.055614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23112 22:28:25.056028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23113 22:28:25.089771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23114 22:28:25.090247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23116 22:28:25.130521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23117 22:28:25.131061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23119 22:28:25.169316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23120 22:28:25.169728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23122 22:28:25.205888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23124 22:28:25.206364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23125 22:28:25.242360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23127 22:28:25.242933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23128 22:28:25.278201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23130 22:28:25.278827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23131 22:28:25.312959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23132 22:28:25.313391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23134 22:28:25.345844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23135 22:28:25.346343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23137 22:28:25.379551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23138 22:28:25.380082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23140 22:28:25.415896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23142 22:28:25.416374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23143 22:28:25.453575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23144 22:28:25.454011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23146 22:28:25.488609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23147 22:28:25.489085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23149 22:28:25.525305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23151 22:28:25.526046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23152 22:28:25.561511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23153 22:28:25.561861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23155 22:28:25.600677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23156 22:28:25.601067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23158 22:28:25.645896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23159 22:28:25.646313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23161 22:28:25.682544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23162 22:28:25.682963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23164 22:28:25.717504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23165 22:28:25.717937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23167 22:28:25.763143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23168 22:28:25.763674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23170 22:28:25.811346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23171 22:28:25.811739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23173 22:28:25.847540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23175 22:28:25.848118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23176 22:28:25.884630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23177 22:28:25.885194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23179 22:28:25.922063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23180 22:28:25.922606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23182 22:28:25.959339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23183 22:28:25.959756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23185 22:28:25.995079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23187 22:28:25.995457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23188 22:28:26.030464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23189 22:28:26.030853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23191 22:28:26.067915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23193 22:28:26.068317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23194 22:28:26.105800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23195 22:28:26.106213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23197 22:28:26.141179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23198 22:28:26.141612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23200 22:28:26.197983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23202 22:28:26.198459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23203 22:28:26.235464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23204 22:28:26.235902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23206 22:28:26.279577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23207 22:28:26.280127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23209 22:28:26.329334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23210 22:28:26.329766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23212 22:28:26.382994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23213 22:28:26.383520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23215 22:28:26.433923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23216 22:28:26.434428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23218 22:28:26.486781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23219 22:28:26.487212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23221 22:28:26.534976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23222 22:28:26.535430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23224 22:28:26.574681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23225 22:28:26.575159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23227 22:28:26.617337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23228 22:28:26.617680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23230 22:28:26.663735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23231 22:28:26.664165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23233 22:28:26.707394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23234 22:28:26.707748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23236 22:28:26.749087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23238 22:28:26.749555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23239 22:28:26.794166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23240 22:28:26.794595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23242 22:28:26.841113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23243 22:28:26.841497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23245 22:28:26.874208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23246 22:28:26.874674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23248 22:28:26.914075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23249 22:28:26.914668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23251 22:28:26.956121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23253 22:28:26.956851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23254 22:28:26.994484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23255 22:28:26.994902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23257 22:28:27.029726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23259 22:28:27.030327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23260 22:28:27.073888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23261 22:28:27.074321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23263 22:28:27.117170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23264 22:28:27.117607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23266 22:28:27.155700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23267 22:28:27.156107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23269 22:28:27.210950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23270 22:28:27.211400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23272 22:28:27.253986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23274 22:28:27.254472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23275 22:28:27.295189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23276 22:28:27.295561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23278 22:28:27.334947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23280 22:28:27.335420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23281 22:28:27.376931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23283 22:28:27.377363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23284 22:28:27.413950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23285 22:28:27.414386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23287 22:28:27.452123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23289 22:28:27.452607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23290 22:28:27.492076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23292 22:28:27.492764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23293 22:28:27.533724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23295 22:28:27.534203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23296 22:28:27.582621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23297 22:28:27.583081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23299 22:28:27.631908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23301 22:28:27.632437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23302 22:28:27.669713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23303 22:28:27.670162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23305 22:28:27.710773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23306 22:28:27.711172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23308 22:28:27.751445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23310 22:28:27.751872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23311 22:28:27.800005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23313 22:28:27.800609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23314 22:28:27.837729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23315 22:28:27.838197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23317 22:28:27.874827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23318 22:28:27.875314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23320 22:28:27.910919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23322 22:28:27.911466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23323 22:28:27.944895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23324 22:28:27.945433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23326 22:28:27.982151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23327 22:28:27.982720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23329 22:28:28.018700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23330 22:28:28.019198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23332 22:28:28.060607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23334 22:28:28.061187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23335 22:28:28.107922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23337 22:28:28.108499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23338 22:28:28.146091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23340 22:28:28.146548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23341 22:28:28.182420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23342 22:28:28.182823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23344 22:28:28.235603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23345 22:28:28.236005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23347 22:28:28.273675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23349 22:28:28.274406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23350 22:28:28.310257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23351 22:28:28.310699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23353 22:28:28.346774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23355 22:28:28.347262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23356 22:28:28.390604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23358 22:28:28.390983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23359 22:28:28.426413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23361 22:28:28.426860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23362 22:28:28.470302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23363 22:28:28.470690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23365 22:28:28.509253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23366 22:28:28.509694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23368 22:28:28.547506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23369 22:28:28.547942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23371 22:28:28.589520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23372 22:28:28.589952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23374 22:28:28.630290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23375 22:28:28.630728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23377 22:28:28.673826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23378 22:28:28.674272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23380 22:28:28.712568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23381 22:28:28.713004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23383 22:28:28.750062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23384 22:28:28.750497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23386 22:28:28.789394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23387 22:28:28.789789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23389 22:28:28.843603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23390 22:28:28.844155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23392 22:28:28.899130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23394 22:28:28.899606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23395 22:28:28.957535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23396 22:28:28.957941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23398 22:28:28.994737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23400 22:28:28.995186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23401 22:28:29.034749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23402 22:28:29.035212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23404 22:28:29.086305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23405 22:28:29.086744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23407 22:28:29.125550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23409 22:28:29.126049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23410 22:28:29.165974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23411 22:28:29.166418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23413 22:28:29.203297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23414 22:28:29.203675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23416 22:28:29.243415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23417 22:28:29.243848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23419 22:28:29.285627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23420 22:28:29.286118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23422 22:28:29.327020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23423 22:28:29.327514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23425 22:28:29.386178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23427 22:28:29.386688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23428 22:28:29.428020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23430 22:28:29.428443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23431 22:28:29.466826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23432 22:28:29.467188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23434 22:28:29.506954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23435 22:28:29.507481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23437 22:28:29.545688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23439 22:28:29.546150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23440 22:28:29.586816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23441 22:28:29.587236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23443 22:28:29.640835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23445 22:28:29.641264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23446 22:28:29.699991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23448 22:28:29.700376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23449 22:28:29.741822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23450 22:28:29.742232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23452 22:28:29.779726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23454 22:28:29.780134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23455 22:28:29.819084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23456 22:28:29.819522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23458 22:28:29.861574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23459 22:28:29.862051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23461 22:28:29.903611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23462 22:28:29.903945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23464 22:28:29.942973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23465 22:28:29.943402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23467 22:28:29.984837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23468 22:28:29.985358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23470 22:28:30.030669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23472 22:28:30.031154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23473 22:28:30.074266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23474 22:28:30.074701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23476 22:28:30.124390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23477 22:28:30.124805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23479 22:28:30.163147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23480 22:28:30.163570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23482 22:28:30.205251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23483 22:28:30.205678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23485 22:28:30.248334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23486 22:28:30.248722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23488 22:28:30.284425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23489 22:28:30.284853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23491 22:28:30.321355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23492 22:28:30.321778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23494 22:28:30.358759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23495 22:28:30.359176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23497 22:28:30.405906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23498 22:28:30.406429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23500 22:28:30.449653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23502 22:28:30.450117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23503 22:28:30.493674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23504 22:28:30.494142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23506 22:28:30.538739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23507 22:28:30.539235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23509 22:28:30.578151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23510 22:28:30.578655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23512 22:28:30.623024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23514 22:28:30.623448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23515 22:28:30.660798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23516 22:28:30.661374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23518 22:28:30.700051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23520 22:28:30.700443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23521 22:28:30.739294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23523 22:28:30.739786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23524 22:28:30.785660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23525 22:28:30.786040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23527 22:28:30.825562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23529 22:28:30.826289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23530 22:28:30.863388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23532 22:28:30.863877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23533 22:28:30.904186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23535 22:28:30.904642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23536 22:28:30.954374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23537 22:28:30.954695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23539 22:28:30.991621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23540 22:28:30.992031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23542 22:28:31.032658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23543 22:28:31.033029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23545 22:28:31.073149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23546 22:28:31.073544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23548 22:28:31.111445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23549 22:28:31.111860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23551 22:28:31.158080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23552 22:28:31.158481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23554 22:28:31.205337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23555 22:28:31.205773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23557 22:28:31.246275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23559 22:28:31.246708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23560 22:28:31.309882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23562 22:28:31.310605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23563 22:28:31.358480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23564 22:28:31.358921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23566 22:28:31.397902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23567 22:28:31.398339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23569 22:28:31.443206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23570 22:28:31.443610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23572 22:28:31.481708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23574 22:28:31.482151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23575 22:28:31.521695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23576 22:28:31.522145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23578 22:28:31.560609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23579 22:28:31.560987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23581 22:28:31.601809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23583 22:28:31.602468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23584 22:28:31.638603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23585 22:28:31.639084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23587 22:28:31.676862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23588 22:28:31.677347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23590 22:28:31.714795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23591 22:28:31.715209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23593 22:28:31.751630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23595 22:28:31.752101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23596 22:28:31.791770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23597 22:28:31.792300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23599 22:28:31.832964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23600 22:28:31.833510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23602 22:28:31.873557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23603 22:28:31.873987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23605 22:28:31.925837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23607 22:28:31.926305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23608 22:28:31.977297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23610 22:28:31.977769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23611 22:28:32.016047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23613 22:28:32.016518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23614 22:28:32.061113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23616 22:28:32.061710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23617 22:28:32.099287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23618 22:28:32.099777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23620 22:28:32.135584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23621 22:28:32.136034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23623 22:28:32.174520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23624 22:28:32.174999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23626 22:28:32.214972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23627 22:28:32.215463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23629 22:28:32.253011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23631 22:28:32.253490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23632 22:28:32.291306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23633 22:28:32.291737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23635 22:28:32.349730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23636 22:28:32.350160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23638 22:28:32.387289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23639 22:28:32.387711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23641 22:28:32.427573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23643 22:28:32.428048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23644 22:28:32.477414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23645 22:28:32.477848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23647 22:28:32.518335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23649 22:28:32.518809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23650 22:28:32.559953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23652 22:28:32.560429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23653 22:28:32.604202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23655 22:28:32.604651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23656 22:28:32.653541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23658 22:28:32.654013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23659 22:28:32.691394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23660 22:28:32.691827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23662 22:28:32.727639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23663 22:28:32.728116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23665 22:28:32.771720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23667 22:28:32.772283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23668 22:28:32.816057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23670 22:28:32.816646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23671 22:28:32.869582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23672 22:28:32.870080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23674 22:28:32.907926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23676 22:28:32.908401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23677 22:28:32.945440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23678 22:28:32.945873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23680 22:28:32.985716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23682 22:28:32.986158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23683 22:28:33.023654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23685 22:28:33.024082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23686 22:28:33.066483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23687 22:28:33.066884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23689 22:28:33.104558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23691 22:28:33.105398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23692 22:28:33.148837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23694 22:28:33.149329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23695 22:28:33.187448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23696 22:28:33.187866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23698 22:28:33.236834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23699 22:28:33.237226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23701 22:28:33.276706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23702 22:28:33.277215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23704 22:28:33.315492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23705 22:28:33.315906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23707 22:28:33.362513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23708 22:28:33.363017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23710 22:28:33.419498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23711 22:28:33.419934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23713 22:28:33.477431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23715 22:28:33.477913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23716 22:28:33.529692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23717 22:28:33.530150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23719 22:28:33.568837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23720 22:28:33.569287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23722 22:28:33.613643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23723 22:28:33.614100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23725 22:28:33.673470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23727 22:28:33.673883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23728 22:28:33.720704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23729 22:28:33.721158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23731 22:28:33.758557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23732 22:28:33.758958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23734 22:28:33.807617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23735 22:28:33.808054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23737 22:28:33.858303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23738 22:28:33.858714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23740 22:28:33.895076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23741 22:28:33.895469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23743 22:28:33.935446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23744 22:28:33.935858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23746 22:28:33.974137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23748 22:28:33.974620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23749 22:28:34.017201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23751 22:28:34.017693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23752 22:28:34.057174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23753 22:28:34.057608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23755 22:28:34.106950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23756 22:28:34.107382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23758 22:28:34.155310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23759 22:28:34.155726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23761 22:28:34.203114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23762 22:28:34.203536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23764 22:28:34.245917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23765 22:28:34.246496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23767 22:28:34.295270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23768 22:28:34.295717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23770 22:28:34.349960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23771 22:28:34.350450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23773 22:28:34.401539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23774 22:28:34.402073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23776 22:28:34.449724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23777 22:28:34.450161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23779 22:28:34.495511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23780 22:28:34.495968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23782 22:28:34.529565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23783 22:28:34.529946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23785 22:28:34.562913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23786 22:28:34.563351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23788 22:28:34.599125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23789 22:28:34.599571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23791 22:28:34.641140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23792 22:28:34.641531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23794 22:28:34.691465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23795 22:28:34.691881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23797 22:28:34.733850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23798 22:28:34.734243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23800 22:28:34.781708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23801 22:28:34.782076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23803 22:28:34.832932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23805 22:28:34.833691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23806 22:28:34.885770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23808 22:28:34.886407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23809 22:28:34.941673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23810 22:28:34.942081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23812 22:28:34.989764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23813 22:28:34.990200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23815 22:28:35.025242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23816 22:28:35.025705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23818 22:28:35.070582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23819 22:28:35.071009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23821 22:28:35.116000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23823 22:28:35.116482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23824 22:28:35.157309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23826 22:28:35.157774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23827 22:28:35.203295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23828 22:28:35.203723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23830 22:28:35.240008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23832 22:28:35.240412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23833 22:28:35.287074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23834 22:28:35.287565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23836 22:28:35.326883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23837 22:28:35.327303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23839 22:28:35.365219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23840 22:28:35.365643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23842 22:28:35.417607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23844 22:28:35.418063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23845 22:28:35.464000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23847 22:28:35.464493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23848 22:28:35.510784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23849 22:28:35.511206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23851 22:28:35.555494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23852 22:28:35.555903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23854 22:28:35.601679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23855 22:28:35.602081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23857 22:28:35.641045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
23858 22:28:35.641542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23860 22:28:35.684090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
23862 22:28:35.684756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
23863 22:28:35.738430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
23864 22:28:35.738888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
23866 22:28:35.777919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
23868 22:28:35.778693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
23869 22:28:35.814491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
23870 22:28:35.815003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
23872 22:28:35.855120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
23874 22:28:35.855483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
23875 22:28:35.902043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
23877 22:28:35.902669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
23878 22:28:35.941665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
23879 22:28:35.942156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
23881 22:28:35.987790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
23883 22:28:35.988423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
23884 22:28:36.041221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
23885 22:28:36.041696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
23887 22:28:36.079239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
23888 22:28:36.079682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
23890 22:28:36.130359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
23892 22:28:36.130852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
23893 22:28:36.183303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
23894 22:28:36.183740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
23896 22:28:36.225379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
23897 22:28:36.225818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
23899 22:28:36.262174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
23900 22:28:36.262630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
23902 22:28:36.315468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
23903 22:28:36.315864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
23905 22:28:36.360229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
23907 22:28:36.360644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
23908 22:28:36.405313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
23909 22:28:36.405695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
23911 22:28:36.475790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
23912 22:28:36.476227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
23914 22:28:36.522780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
23915 22:28:36.523210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
23917 22:28:36.572046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
23919 22:28:36.572653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
23920 22:28:36.616783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
23921 22:28:36.617202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
23923 22:28:36.654243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
23925 22:28:36.654698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
23926 22:28:36.693376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
23927 22:28:36.693883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
23929 22:28:36.735477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
23931 22:28:36.736098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
23932 22:28:36.789161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
23933 22:28:36.789638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
23935 22:28:36.835756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
23936 22:28:36.836242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
23938 22:28:36.885081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
23939 22:28:36.885583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
23941 22:28:36.921719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
23943 22:28:36.922113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
23944 22:28:36.965154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
23945 22:28:36.965563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
23947 22:28:37.008512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
23948 22:28:37.008897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
23950 22:28:37.044517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
23951 22:28:37.044904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
23953 22:28:37.081880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
23954 22:28:37.082312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
23956 22:28:37.118169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
23957 22:28:37.118590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
23959 22:28:37.157871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
23960 22:28:37.158363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
23962 22:28:37.198209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
23963 22:28:37.198640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
23965 22:28:37.235646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
23966 22:28:37.236057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
23968 22:28:37.276826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
23969 22:28:37.277268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
23971 22:28:37.311869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
23973 22:28:37.312609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
23974 22:28:37.348976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
23975 22:28:37.349427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
23977 22:28:37.385410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
23978 22:28:37.385784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
23980 22:28:37.421479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
23981 22:28:37.421954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
23983 22:28:37.457960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
23984 22:28:37.458438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
23986 22:28:37.510708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
23987 22:28:37.511241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
23989 22:28:37.549468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
23991 22:28:37.549868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
23992 22:28:37.587116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
23993 22:28:37.587536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
23995 22:28:37.638058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
23996 22:28:37.638492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
23998 22:28:37.680993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
23999 22:28:37.681420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24001 22:28:37.730937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24003 22:28:37.731304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24004 22:28:37.783218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24005 22:28:37.784182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24007 22:28:37.829770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24009 22:28:37.830217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24010 22:28:37.874455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24011 22:28:37.874879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24013 22:28:37.921704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24015 22:28:37.922076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24016 22:28:37.962568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24018 22:28:37.963046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24019 22:28:38.005173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24020 22:28:38.005642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24022 22:28:38.046003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24023 22:28:38.046567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24025 22:28:38.091770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24026 22:28:38.092175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24028 22:28:38.138189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24030 22:28:38.138863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24031 22:28:38.177482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24032 22:28:38.177923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24034 22:28:38.213394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24035 22:28:38.213956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24037 22:28:38.257530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24038 22:28:38.257970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24040 22:28:38.306197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24041 22:28:38.306646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24043 22:28:38.345229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24045 22:28:38.345837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24046 22:28:38.382775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24047 22:28:38.383201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24049 22:28:38.421191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24051 22:28:38.421601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24052 22:28:38.463345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24054 22:28:38.463740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24055 22:28:38.513687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24056 22:28:38.514115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24058 22:28:38.560830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24059 22:28:38.561232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24061 22:28:38.610837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24062 22:28:38.611214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24064 22:28:38.654269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24065 22:28:38.654684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24067 22:28:38.697326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24068 22:28:38.697681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24070 22:28:38.740110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24072 22:28:38.740582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24073 22:28:38.777272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24075 22:28:38.777740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24076 22:28:38.816884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24077 22:28:38.817306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24079 22:28:38.867605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24081 22:28:38.867971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24082 22:28:38.920807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24083 22:28:38.921189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24085 22:28:38.965928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24086 22:28:38.966362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24088 22:28:39.008597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24089 22:28:39.009016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24091 22:28:39.053262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24092 22:28:39.053660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24094 22:28:39.088919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24095 22:28:39.089339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24097 22:28:39.125234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24099 22:28:39.125701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24100 22:28:39.160886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24101 22:28:39.161302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24103 22:28:39.196511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24104 22:28:39.196947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24106 22:28:39.230525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24108 22:28:39.231095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24109 22:28:39.265138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24111 22:28:39.265506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24112 22:28:39.299455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24114 22:28:39.300196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24115 22:28:39.335102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24116 22:28:39.335555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24118 22:28:39.369274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24119 22:28:39.369687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24121 22:28:39.406652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24122 22:28:39.407069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24124 22:28:39.441215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24126 22:28:39.441676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24127 22:28:39.477273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24129 22:28:39.477869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24130 22:28:39.515580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24131 22:28:39.516132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24133 22:28:39.561862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24134 22:28:39.562366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24136 22:28:39.596756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24138 22:28:39.597173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24139 22:28:39.630970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24140 22:28:39.631392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24142 22:28:39.665487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24144 22:28:39.666167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24145 22:28:39.703122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24146 22:28:39.703505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24148 22:28:39.746837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24149 22:28:39.747234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24151 22:28:39.781573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24152 22:28:39.782087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24154 22:28:39.817880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24155 22:28:39.818310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24157 22:28:39.853241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24158 22:28:39.853670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24160 22:28:39.892694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24161 22:28:39.893074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24163 22:28:39.928980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24165 22:28:39.929389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24166 22:28:39.971283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24167 22:28:39.971692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24169 22:28:40.013630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24170 22:28:40.014051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24172 22:28:40.060335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24173 22:28:40.060757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24175 22:28:40.117229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24176 22:28:40.117610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24178 22:28:40.166945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24179 22:28:40.167352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24181 22:28:40.205829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24182 22:28:40.206412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24184 22:28:40.243419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24185 22:28:40.243836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24187 22:28:40.284014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24189 22:28:40.284439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24190 22:28:40.336449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24191 22:28:40.336880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24193 22:28:40.376602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24195 22:28:40.377083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24196 22:28:40.424654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24197 22:28:40.425043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24199 22:28:40.476550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24201 22:28:40.476930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24202 22:28:40.516101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24204 22:28:40.516488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24205 22:28:40.551034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24207 22:28:40.551423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24208 22:28:40.585439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24209 22:28:40.586003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24211 22:28:40.627259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24213 22:28:40.627949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24214 22:28:40.670683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24215 22:28:40.671167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24217 22:28:40.710672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24219 22:28:40.711416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24220 22:28:40.745279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24222 22:28:40.745714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24223 22:28:40.781131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24224 22:28:40.781529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24226 22:28:40.829296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24227 22:28:40.829684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24229 22:28:40.868281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24231 22:28:40.869035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24232 22:28:40.923687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24233 22:28:40.924120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24235 22:28:40.973429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24236 22:28:40.973820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24238 22:28:41.019398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24239 22:28:41.019863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24241 22:28:41.058238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24242 22:28:41.058629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24244 22:28:41.113294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24246 22:28:41.114063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24247 22:28:41.162366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24248 22:28:41.162732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24250 22:28:41.199972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24252 22:28:41.200424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24253 22:28:41.239216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24254 22:28:41.239707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24256 22:28:41.285956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24257 22:28:41.286377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24259 22:28:41.328560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24260 22:28:41.328952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24262 22:28:41.381918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24263 22:28:41.382310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24265 22:28:41.419848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24267 22:28:41.420215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24268 22:28:41.455646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24269 22:28:41.456123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24271 22:28:41.495891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24273 22:28:41.496386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24274 22:28:41.553643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24275 22:28:41.554209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24277 22:28:41.589814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24278 22:28:41.590274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24280 22:28:41.644159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24282 22:28:41.644821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24283 22:28:41.680776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24285 22:28:41.681572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24286 22:28:41.729269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24287 22:28:41.729687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24289 22:28:41.767461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24290 22:28:41.767892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24292 22:28:41.806652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24293 22:28:41.807084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24295 22:28:41.853372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24296 22:28:41.853820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24298 22:28:41.899426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24299 22:28:41.899855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24301 22:28:41.938732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24303 22:28:41.939209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24304 22:28:41.974683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24305 22:28:41.975112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24307 22:28:42.011116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24309 22:28:42.011870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24310 22:28:42.046501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24311 22:28:42.047091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24313 22:28:42.087669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24314 22:28:42.088233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24316 22:28:42.131737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24318 22:28:42.132323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24319 22:28:42.168505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24320 22:28:42.168994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24322 22:28:42.205077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24323 22:28:42.205632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24325 22:28:42.240300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24326 22:28:42.240781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24328 22:28:42.285050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24329 22:28:42.285505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24331 22:28:42.323519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24332 22:28:42.323906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24334 22:28:42.370648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24335 22:28:42.371086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24337 22:28:42.412588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24339 22:28:42.413018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24340 22:28:42.449497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24341 22:28:42.449951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24343 22:28:42.484718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24344 22:28:42.485148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24346 22:28:42.528266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24348 22:28:42.528743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24349 22:28:42.571305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24350 22:28:42.571738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24352 22:28:42.611026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24353 22:28:42.611449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24355 22:28:42.657656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24356 22:28:42.658061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24358 22:28:42.694620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24359 22:28:42.695026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24361 22:28:42.735062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24363 22:28:42.735740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24364 22:28:42.782223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24366 22:28:42.782780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24367 22:28:42.825232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24368 22:28:42.825678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24370 22:28:42.874251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24371 22:28:42.874653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24373 22:28:42.927472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24374 22:28:42.927908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24376 22:28:42.966024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24377 22:28:42.966459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24379 22:28:43.006822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24381 22:28:43.007453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24382 22:28:43.057535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24383 22:28:43.058056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24385 22:28:43.101576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24386 22:28:43.102093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24388 22:28:43.147227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24389 22:28:43.147726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24391 22:28:43.195381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24392 22:28:43.195822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24394 22:28:43.250070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24395 22:28:43.250433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24397 22:28:43.301305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24398 22:28:43.301684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24400 22:28:43.337915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24401 22:28:43.338361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24403 22:28:43.373106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24405 22:28:43.373769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24406 22:28:43.409952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24407 22:28:43.410382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24409 22:28:43.449739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24411 22:28:43.450578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24412 22:28:43.489666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24413 22:28:43.490147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24415 22:28:43.537992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24416 22:28:43.538592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24418 22:28:43.579996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24420 22:28:43.580807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24421 22:28:43.627713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24423 22:28:43.628101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24424 22:28:43.666259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24425 22:28:43.666682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24427 22:28:43.717771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24428 22:28:43.718139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24430 22:28:43.756781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24431 22:28:43.757185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24433 22:28:43.793800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24434 22:28:43.794216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24436 22:28:43.843485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24437 22:28:43.843916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24439 22:28:43.887729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24440 22:28:43.888164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24442 22:28:43.926026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24443 22:28:43.926457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24445 22:28:43.974525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24446 22:28:43.974956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24448 22:28:44.023462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24449 22:28:44.023985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24451 22:28:44.064940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24452 22:28:44.065380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24454 22:28:44.106689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24455 22:28:44.107121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24457 22:28:44.161635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24458 22:28:44.162056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24460 22:28:44.202667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24461 22:28:44.203072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24463 22:28:44.259345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24464 22:28:44.259791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24466 22:28:44.315095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24467 22:28:44.315465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24469 22:28:44.355527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24470 22:28:44.355915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24472 22:28:44.401062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24474 22:28:44.401548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24475 22:28:44.443504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24476 22:28:44.443902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24478 22:28:44.492046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24480 22:28:44.492508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24481 22:28:44.544866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24482 22:28:44.545252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24484 22:28:44.587331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24486 22:28:44.587809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24487 22:28:44.634875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24488 22:28:44.635295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24490 22:28:44.676540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24491 22:28:44.676903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24493 22:28:44.713850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24494 22:28:44.714252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24496 22:28:44.750146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24497 22:28:44.750544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24499 22:28:44.785701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24500 22:28:44.786045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24502 22:28:44.829421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24504 22:28:44.829839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24505 22:28:44.867519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24507 22:28:44.867907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24508 22:28:44.909004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24510 22:28:44.909488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24511 22:28:44.947297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24512 22:28:44.947677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24514 22:28:45.002928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24515 22:28:45.003324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24517 22:28:45.058417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24519 22:28:45.058895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24520 22:28:45.095659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24521 22:28:45.096042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24523 22:28:45.144662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24524 22:28:45.145037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24526 22:28:45.185185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24527 22:28:45.185609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24529 22:28:45.224548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24531 22:28:45.224985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24532 22:28:45.271196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24533 22:28:45.271572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24535 22:28:45.314342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24536 22:28:45.314780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24538 22:28:45.359021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24539 22:28:45.359406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24541 22:28:45.404635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24542 22:28:45.405163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24544 22:28:45.452989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24545 22:28:45.453501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24547 22:28:45.489694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24548 22:28:45.490108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24550 22:28:45.525181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24551 22:28:45.525620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24553 22:28:45.564426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24554 22:28:45.564875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24556 22:28:45.602990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24557 22:28:45.603421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24559 22:28:45.654903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24560 22:28:45.655337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24562 22:28:45.711929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24564 22:28:45.712346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24565 22:28:45.761615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24567 22:28:45.762092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24568 22:28:45.798200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24569 22:28:45.798573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24571 22:28:45.843327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24572 22:28:45.843756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24574 22:28:45.890073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24575 22:28:45.890517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24577 22:28:45.936700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24579 22:28:45.937311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24580 22:28:45.985521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24581 22:28:45.986020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24583 22:28:46.030001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24585 22:28:46.030445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24586 22:28:46.067292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24587 22:28:46.067853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24589 22:28:46.123147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24590 22:28:46.123653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24592 22:28:46.159767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24594 22:28:46.160244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24595 22:28:46.206262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24596 22:28:46.206828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24598 22:28:46.258462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24599 22:28:46.258858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24601 22:28:46.300499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24603 22:28:46.300962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24604 22:28:46.338080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24605 22:28:46.338590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24607 22:28:46.378943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24608 22:28:46.379490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24610 22:28:46.431541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24612 22:28:46.432285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24613 22:28:46.478959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24615 22:28:46.479532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24616 22:28:46.530063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24617 22:28:46.530555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24619 22:28:46.574720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24621 22:28:46.575462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24622 22:28:46.620580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24623 22:28:46.620921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24625 22:28:46.677111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24626 22:28:46.677576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24628 22:28:46.716954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24629 22:28:46.717264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24631 22:28:46.755716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24633 22:28:46.756207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24634 22:28:46.803691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24636 22:28:46.804434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24637 22:28:46.844661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24639 22:28:46.845238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24640 22:28:46.886402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24641 22:28:46.886852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24643 22:28:46.925657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24645 22:28:46.926124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24646 22:28:46.965717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24647 22:28:46.966114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24649 22:28:47.005178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24651 22:28:47.005557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24652 22:28:47.043675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24653 22:28:47.044072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24655 22:28:47.083033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24656 22:28:47.083524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24658 22:28:47.131750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24659 22:28:47.132187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24661 22:28:47.182302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24662 22:28:47.182733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24664 22:28:47.236796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24665 22:28:47.237222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24667 22:28:47.273518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24669 22:28:47.273999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24670 22:28:47.312763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24671 22:28:47.313265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24673 22:28:47.352744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24675 22:28:47.353171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24676 22:28:47.391217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24678 22:28:47.391677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24679 22:28:47.429008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24680 22:28:47.429496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24682 22:28:47.470661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24683 22:28:47.471061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24685 22:28:47.514183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24686 22:28:47.514628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24688 22:28:47.561175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24689 22:28:47.561632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24691 22:28:47.603895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24692 22:28:47.604327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24694 22:28:47.646893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24695 22:28:47.647316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24697 22:28:47.684164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24699 22:28:47.684580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24700 22:28:47.721441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24701 22:28:47.721873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24703 22:28:47.758042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24704 22:28:47.758481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24706 22:28:47.794196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24707 22:28:47.794611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24709 22:28:47.830303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24710 22:28:47.830714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24712 22:28:47.866793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24713 22:28:47.867239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24715 22:28:47.904738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24716 22:28:47.905174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24718 22:28:47.941381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24719 22:28:47.941828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24721 22:28:47.977953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24723 22:28:47.978426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24724 22:28:48.014326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24725 22:28:48.014905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24727 22:28:48.064735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24729 22:28:48.065216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24730 22:28:48.102367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24731 22:28:48.102793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24733 22:28:48.138730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24734 22:28:48.139169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24736 22:28:48.176424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24737 22:28:48.176851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24739 22:28:48.216997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24740 22:28:48.217441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24742 22:28:48.254544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24743 22:28:48.254981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24745 22:28:48.291214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24746 22:28:48.291641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24748 22:28:48.328908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24750 22:28:48.329334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24751 22:28:48.365453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24752 22:28:48.365870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24754 22:28:48.403597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24755 22:28:48.404047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24757 22:28:48.441922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24759 22:28:48.442392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24760 22:28:48.478648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24761 22:28:48.479145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24763 22:28:48.515677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24765 22:28:48.516153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24766 22:28:48.553044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24767 22:28:48.553464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24769 22:28:48.592445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24770 22:28:48.592856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24772 22:28:48.633083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24774 22:28:48.633857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24775 22:28:48.677225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24776 22:28:48.677673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24778 22:28:48.718503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24779 22:28:48.718930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24781 22:28:48.767905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24783 22:28:48.768473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24784 22:28:48.824410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24786 22:28:48.824919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24787 22:28:48.862530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24788 22:28:48.863048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24790 22:28:48.915022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24792 22:28:48.915635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24793 22:28:48.959018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24794 22:28:48.959591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24796 22:28:49.000687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24798 22:28:49.001038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24799 22:28:49.038899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24800 22:28:49.039434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24802 22:28:49.078101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24803 22:28:49.078612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24805 22:28:49.133527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24806 22:28:49.133903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24808 22:28:49.173535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24809 22:28:49.174108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24811 22:28:49.212951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24812 22:28:49.213395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24814 22:28:49.253582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24816 22:28:49.254022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24817 22:28:49.292994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24818 22:28:49.293574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24820 22:28:49.335330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24821 22:28:49.335740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24823 22:28:49.378922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24824 22:28:49.379322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24826 22:28:49.421712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24828 22:28:49.422156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24829 22:28:49.460962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24831 22:28:49.461372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24832 22:28:49.502118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24833 22:28:49.502514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24835 22:28:49.549558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24836 22:28:49.549983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24838 22:28:49.605109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24839 22:28:49.605621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24841 22:28:49.643081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24842 22:28:49.643507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24844 22:28:49.694523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24845 22:28:49.694950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24847 22:28:49.740095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24849 22:28:49.740584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24850 22:28:49.778668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24852 22:28:49.779048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24853 22:28:49.824785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24854 22:28:49.825228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24856 22:28:49.861547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24857 22:28:49.862099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24859 22:28:49.900440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
24860 22:28:49.900868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
24862 22:28:49.935679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
24863 22:28:49.936105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
24865 22:28:49.983453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
24866 22:28:49.983888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
24868 22:28:50.025552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
24869 22:28:50.025990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
24871 22:28:50.063435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
24872 22:28:50.063860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
24874 22:28:50.108022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
24876 22:28:50.108486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
24877 22:28:50.149778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
24879 22:28:50.150516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
24880 22:28:50.186881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
24881 22:28:50.187357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
24883 22:28:50.225344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
24884 22:28:50.225743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
24886 22:28:50.265716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
24887 22:28:50.266115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
24889 22:28:50.305428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
24890 22:28:50.305858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
24892 22:28:50.346602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
24893 22:28:50.347067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
24895 22:28:50.387187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
24896 22:28:50.387606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
24898 22:28:50.426748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
24899 22:28:50.427163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
24901 22:28:50.465701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
24903 22:28:50.466182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
24904 22:28:50.511699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
24905 22:28:50.512137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
24907 22:28:50.565032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
24909 22:28:50.565513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
24910 22:28:50.604922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
24911 22:28:50.605507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
24913 22:28:50.646014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
24914 22:28:50.646462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
24916 22:28:50.693329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
24917 22:28:50.693769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
24919 22:28:50.730676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
24920 22:28:50.731108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
24922 22:28:50.774368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
24923 22:28:50.774764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
24925 22:28:50.818512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
24926 22:28:50.818907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
24928 22:28:50.859300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
24930 22:28:50.860025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
24931 22:28:50.900030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
24933 22:28:50.900790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
24934 22:28:50.938651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
24936 22:28:50.939076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
24937 22:28:50.999142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
24938 22:28:50.999537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
24940 22:28:51.046299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
24941 22:28:51.046816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
24943 22:28:51.085118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
24944 22:28:51.085537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
24946 22:28:51.125188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
24947 22:28:51.125579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
24949 22:28:51.172451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
24950 22:28:51.173007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
24952 22:28:51.209522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
24953 22:28:51.209958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
24955 22:28:51.250173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
24957 22:28:51.250653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
24958 22:28:51.289943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
24959 22:28:51.290394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
24961 22:28:51.345125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
24962 22:28:51.345559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
24964 22:28:51.390352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
24965 22:28:51.390787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
24967 22:28:51.446575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
24968 22:28:51.446963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
24970 22:28:51.498235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
24971 22:28:51.498658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
24973 22:28:51.548759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
24974 22:28:51.549145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
24976 22:28:51.590759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
24977 22:28:51.591161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
24979 22:28:51.636961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
24980 22:28:51.637482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
24982 22:28:51.689706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
24983 22:28:51.690238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
24985 22:28:51.746155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
24987 22:28:51.746643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
24988 22:28:51.810501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
24989 22:28:51.810910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
24991 22:28:51.848990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
24992 22:28:51.849536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
24994 22:28:51.885963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
24995 22:28:51.886368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
24997 22:28:51.935008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
24999 22:28:51.935375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25000 22:28:51.985544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25001 22:28:51.985969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25003 22:28:52.029134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25004 22:28:52.029546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25006 22:28:52.068797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25007 22:28:52.069197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25009 22:28:52.106874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25010 22:28:52.107313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25012 22:28:52.149086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25013 22:28:52.149492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25015 22:28:52.208935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25017 22:28:52.209392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25018 22:28:52.251450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25019 22:28:52.251841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25021 22:28:52.289893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25023 22:28:52.290495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25024 22:28:52.327076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25025 22:28:52.327542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25027 22:28:52.364995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25028 22:28:52.365451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25030 22:28:52.404038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25032 22:28:52.404506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25033 22:28:52.451014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25035 22:28:52.451476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25036 22:28:52.490726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25037 22:28:52.491117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25039 22:28:52.531390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25040 22:28:52.531824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25042 22:28:52.575243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25043 22:28:52.575677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25045 22:28:52.622566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25046 22:28:52.623003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25048 22:28:52.683327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25049 22:28:52.683765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25051 22:28:52.722161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25053 22:28:52.722650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25054 22:28:52.760460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25055 22:28:52.760889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25057 22:28:52.809845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25058 22:28:52.810281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25060 22:28:52.869964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25061 22:28:52.870391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25063 22:28:52.914002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25065 22:28:52.914488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25066 22:28:52.952010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25068 22:28:52.952540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25069 22:28:52.991243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25071 22:28:52.991703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25072 22:28:53.041722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25073 22:28:53.042153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25075 22:28:53.081779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25076 22:28:53.082233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25078 22:28:53.125470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25079 22:28:53.125917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25081 22:28:53.187021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25082 22:28:53.187443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25084 22:28:53.239053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25085 22:28:53.239464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25087 22:28:53.285817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25088 22:28:53.286223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25090 22:28:53.338358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25092 22:28:53.338774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25093 22:28:53.378456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25094 22:28:53.378905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25096 22:28:53.418719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25098 22:28:53.419193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25099 22:28:53.465700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25101 22:28:53.466181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25102 22:28:53.509048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25103 22:28:53.509463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25105 22:28:53.550011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25106 22:28:53.550475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25108 22:28:53.595713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25109 22:28:53.596144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25111 22:28:53.653950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25112 22:28:53.654397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25114 22:28:53.704774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25116 22:28:53.705270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25117 22:28:53.743759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25118 22:28:53.744207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25120 22:28:53.783311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25121 22:28:53.783726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25123 22:28:53.823443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25124 22:28:53.824190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25126 22:28:53.865058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25127 22:28:53.865467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25129 22:28:53.904809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25130 22:28:53.905207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25132 22:28:53.946262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25133 22:28:53.946658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25135 22:28:53.989265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25136 22:28:53.989690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25138 22:28:54.030000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25139 22:28:54.030429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25141 22:28:54.069546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25142 22:28:54.070007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25144 22:28:54.110515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25146 22:28:54.110993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25147 22:28:54.150845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25148 22:28:54.151286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25150 22:28:54.192556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25151 22:28:54.192998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25153 22:28:54.236040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25155 22:28:54.236520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25156 22:28:54.281441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25157 22:28:54.281801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25159 22:28:54.322828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25160 22:28:54.323256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25162 22:28:54.363393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25163 22:28:54.363824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25165 22:28:54.403797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25166 22:28:54.404287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25168 22:28:54.444947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25169 22:28:54.445297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25171 22:28:54.496067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25173 22:28:54.496555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25174 22:28:54.546383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25175 22:28:54.546872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25177 22:28:54.594484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25178 22:28:54.594930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25180 22:28:54.645720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25181 22:28:54.646151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25183 22:28:54.695457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25185 22:28:54.695863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25186 22:28:54.739432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25188 22:28:54.739870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25189 22:28:54.793035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25191 22:28:54.793513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25192 22:28:54.838982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25194 22:28:54.839469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25195 22:28:54.891361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25196 22:28:54.891755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25198 22:28:54.946993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25199 22:28:54.947367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25201 22:28:54.989441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25202 22:28:54.989899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25204 22:28:55.026862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25205 22:28:55.027309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25207 22:28:55.086505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25208 22:28:55.086975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25210 22:28:55.130560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25211 22:28:55.130986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25213 22:28:55.171188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25214 22:28:55.171663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25216 22:28:55.208909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25217 22:28:55.209369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25219 22:28:55.249361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25220 22:28:55.249744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25222 22:28:55.302334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25223 22:28:55.302768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25225 22:28:55.345718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25227 22:28:55.346189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25228 22:28:55.384933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25230 22:28:55.385393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25231 22:28:55.429726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25232 22:28:55.430166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25234 22:28:55.470093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25235 22:28:55.470522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25237 22:28:55.522799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25238 22:28:55.523189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25240 22:28:55.574973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25241 22:28:55.575448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25243 22:28:55.630038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25245 22:28:55.630484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25246 22:28:55.673856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25247 22:28:55.674324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25249 22:28:55.715562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25251 22:28:55.716189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25252 22:28:55.758276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25254 22:28:55.758773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25255 22:28:55.797472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25256 22:28:55.797916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25258 22:28:55.841052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25260 22:28:55.841444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25261 22:28:55.889207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25263 22:28:55.889632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25264 22:28:55.949610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25265 22:28:55.950137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25267 22:28:55.993009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25268 22:28:55.993583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25270 22:28:56.030566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25271 22:28:56.030956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25273 22:28:56.069714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25274 22:28:56.070136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25276 22:28:56.110397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25277 22:28:56.110801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25279 22:28:56.146773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25280 22:28:56.147244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25282 22:28:56.186311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25284 22:28:56.186681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25285 22:28:56.221215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25286 22:28:56.221630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25288 22:28:56.255641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25290 22:28:56.256387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25291 22:28:56.303525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25292 22:28:56.303914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25294 22:28:56.338448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25296 22:28:56.338822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25297 22:28:56.378953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25299 22:28:56.379338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25300 22:28:56.422195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25301 22:28:56.422630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25303 22:28:56.474170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25304 22:28:56.474634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25306 22:28:56.532293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25307 22:28:56.532709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25309 22:28:56.570011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25310 22:28:56.570425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25312 22:28:56.614781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25314 22:28:56.615233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25315 22:28:56.652980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25317 22:28:56.653458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25318 22:28:56.703702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25319 22:28:56.704190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25321 22:28:56.748526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25323 22:28:56.748993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25324 22:28:56.792094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25326 22:28:56.792550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25327 22:28:56.839875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25329 22:28:56.840255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25330 22:28:56.886367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25331 22:28:56.886743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25333 22:28:56.945680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25334 22:28:56.946110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25336 22:28:56.993858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25337 22:28:56.994293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25339 22:28:57.045724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25340 22:28:57.046132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25342 22:28:57.099227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25343 22:28:57.099644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25345 22:28:57.136884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25346 22:28:57.137313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25348 22:28:57.173720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25349 22:28:57.174147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25351 22:28:57.209938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25352 22:28:57.210506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25354 22:28:57.247361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25355 22:28:57.247841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25357 22:28:57.284465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25359 22:28:57.284924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25360 22:28:57.321770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25362 22:28:57.322239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25363 22:28:57.358573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25365 22:28:57.359041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25366 22:28:57.395390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25367 22:28:57.395815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25369 22:28:57.433000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25370 22:28:57.433389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25372 22:28:57.469535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25373 22:28:57.470004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25375 22:28:57.507705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25377 22:28:57.508086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25378 22:28:57.558416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25379 22:28:57.558851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25381 22:28:57.603106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25382 22:28:57.603556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25384 22:28:57.654640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25386 22:28:57.655253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25387 22:28:57.717315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25388 22:28:57.717785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25390 22:28:57.756181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25392 22:28:57.756748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25393 22:28:57.806779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25394 22:28:57.807207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25396 22:28:57.845447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25397 22:28:57.845900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25399 22:28:57.898056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25400 22:28:57.898494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25402 22:28:57.955368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25403 22:28:57.955798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25405 22:28:57.994021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25406 22:28:57.994456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25408 22:28:58.033408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25409 22:28:58.033848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25411 22:28:58.072878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25413 22:28:58.073336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25414 22:28:58.112718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25415 22:28:58.113155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25417 22:28:58.164086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25419 22:28:58.164498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25420 22:28:58.214869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25421 22:28:58.215281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25423 22:28:58.266470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25424 22:28:58.267003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25426 22:28:58.317272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25427 22:28:58.317756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25429 22:28:58.353957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25430 22:28:58.354436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25432 22:28:58.390255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25433 22:28:58.390671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25435 22:28:58.427041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25436 22:28:58.427463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25438 22:28:58.464693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25440 22:28:58.465157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25441 22:28:58.503120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25442 22:28:58.503509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25444 22:28:58.541101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25445 22:28:58.541533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25447 22:28:58.585525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25448 22:28:58.585970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25450 22:28:58.623114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25451 22:28:58.623541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25453 22:28:58.665408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25454 22:28:58.665876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25456 22:28:58.708813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25457 22:28:58.709241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25459 22:28:58.753061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25460 22:28:58.753483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25462 22:28:58.799109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25464 22:28:58.799584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25465 22:28:58.839416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25466 22:28:58.839796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25468 22:28:58.886052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25469 22:28:58.886415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25471 22:28:58.923284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25472 22:28:58.923737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25474 22:28:58.960190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25476 22:28:58.960792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25477 22:28:58.997025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25478 22:28:58.997517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25480 22:28:59.034936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25481 22:28:59.035512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25483 22:28:59.073188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25485 22:28:59.073676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25486 22:28:59.112492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25487 22:28:59.112979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25489 22:28:59.149244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25491 22:28:59.149850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25492 22:28:59.185826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25493 22:28:59.186250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25495 22:28:59.222522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25496 22:28:59.222937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25498 22:28:59.260804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25500 22:28:59.261257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25501 22:28:59.297405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25502 22:28:59.297816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25504 22:28:59.334777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25505 22:28:59.335270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25507 22:28:59.372650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25508 22:28:59.373127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25510 22:28:59.410098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25512 22:28:59.411019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25513 22:28:59.448884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25515 22:28:59.449358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25516 22:28:59.487444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25517 22:28:59.487923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25519 22:28:59.526438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25520 22:28:59.527005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25522 22:28:59.565141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25523 22:28:59.565628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25525 22:28:59.602910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25526 22:28:59.603319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25528 22:28:59.642344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25529 22:28:59.642766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25531 22:28:59.678732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25532 22:28:59.679135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25534 22:28:59.714882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25535 22:28:59.715281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25537 22:28:59.753462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25539 22:28:59.753923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25540 22:28:59.790927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25541 22:28:59.791340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25543 22:28:59.827747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25545 22:28:59.828442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25546 22:28:59.865112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25547 22:28:59.865534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25549 22:28:59.902162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25551 22:28:59.902812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25552 22:28:59.938230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25554 22:28:59.938711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25555 22:28:59.978342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25556 22:28:59.978759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25558 22:29:00.018679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25560 22:29:00.019417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25561 22:29:00.057146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25562 22:29:00.057525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25564 22:29:00.099389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25565 22:29:00.099813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25567 22:29:00.140604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25568 22:29:00.141011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25570 22:29:00.179452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25572 22:29:00.179912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25573 22:29:00.217856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25574 22:29:00.218343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25576 22:29:00.274373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25577 22:29:00.274806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25579 22:29:00.317203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25580 22:29:00.317574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25582 22:29:00.370698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25583 22:29:00.371130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25585 22:29:00.409368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25586 22:29:00.409801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25588 22:29:00.458627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25589 22:29:00.459060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25591 22:29:00.510264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25592 22:29:00.510693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25594 22:29:00.546976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25595 22:29:00.547466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25597 22:29:00.582800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25599 22:29:00.583262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25600 22:29:00.618965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25601 22:29:00.619382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25603 22:29:00.656618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25604 22:29:00.657175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25606 22:29:00.698518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25607 22:29:00.698999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25609 22:29:00.738090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25611 22:29:00.738658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25612 22:29:00.774571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25614 22:29:00.775205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25615 22:29:00.811710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25616 22:29:00.812174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25618 22:29:00.864857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25619 22:29:00.865320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25621 22:29:00.911509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25622 22:29:00.911969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25624 22:29:00.957591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25625 22:29:00.958007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25627 22:29:01.012914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25628 22:29:01.013475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25630 22:29:01.050180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25631 22:29:01.050654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25633 22:29:01.097490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25634 22:29:01.097867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25636 22:29:01.135287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25638 22:29:01.135766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25639 22:29:01.179371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25641 22:29:01.179795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25642 22:29:01.226228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25643 22:29:01.226601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25645 22:29:01.269592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25646 22:29:01.270026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25648 22:29:01.306222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25649 22:29:01.306763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25651 22:29:01.356264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25653 22:29:01.356882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25654 22:29:01.405103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25655 22:29:01.405520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25657 22:29:01.439302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25659 22:29:01.439724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25660 22:29:01.473466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25661 22:29:01.473997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25663 22:29:01.507288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25664 22:29:01.507846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25666 22:29:01.545885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25667 22:29:01.546225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25669 22:29:01.588885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25671 22:29:01.590276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25672 22:29:01.646087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25673 22:29:01.646486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25675 22:29:01.689118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25676 22:29:01.689612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25678 22:29:01.725465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25679 22:29:01.725959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25681 22:29:01.765591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25682 22:29:01.766105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25684 22:29:01.812066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25686 22:29:01.812656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25687 22:29:01.854019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25689 22:29:01.854506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25690 22:29:01.893214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25691 22:29:01.893592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25693 22:29:01.939369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25694 22:29:01.939731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25696 22:29:01.976537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25697 22:29:01.976953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25699 22:29:02.042435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25701 22:29:02.043133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25702 22:29:02.079591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25703 22:29:02.079999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25705 22:29:02.116043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25707 22:29:02.116474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25708 22:29:02.172168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25710 22:29:02.172546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25711 22:29:02.213781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25712 22:29:02.214183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25714 22:29:02.219816 <47>[ 305.893565] systemd-journald[109]: Sent WATCHDOG=1 notification.
25715 22:29:02.256611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25716 22:29:02.257148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25718 22:29:02.292628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25719 22:29:02.293035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25721 22:29:02.330695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25723 22:29:02.331065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25724 22:29:02.381723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25725 22:29:02.382143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25727 22:29:02.416990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25729 22:29:02.417449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25730 22:29:02.453008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25731 22:29:02.453524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25733 22:29:02.495464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25734 22:29:02.495833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25736 22:29:02.548950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25737 22:29:02.549378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25739 22:29:02.599956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25741 22:29:02.600431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25742 22:29:02.658872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25743 22:29:02.659329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25745 22:29:02.719994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25747 22:29:02.720478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25748 22:29:02.757709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25749 22:29:02.758147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25751 22:29:02.794476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25752 22:29:02.794912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25754 22:29:02.846468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25755 22:29:02.846866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25757 22:29:02.883523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25758 22:29:02.883961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25760 22:29:02.923157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25761 22:29:02.923542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25763 22:29:02.959739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25765 22:29:02.960161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25766 22:29:02.995434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25767 22:29:02.995864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25769 22:29:03.030167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25770 22:29:03.030608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25772 22:29:03.078763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25773 22:29:03.079316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25775 22:29:03.121208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25776 22:29:03.121601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25778 22:29:03.158185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25779 22:29:03.158600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25781 22:29:03.194168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25782 22:29:03.194597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25784 22:29:03.229998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25785 22:29:03.230428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25787 22:29:03.273732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25788 22:29:03.274184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25790 22:29:03.312026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25792 22:29:03.312461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25793 22:29:03.349069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25795 22:29:03.349516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25796 22:29:03.386387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25797 22:29:03.386795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25799 22:29:03.436984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25800 22:29:03.437417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25802 22:29:03.476691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25803 22:29:03.477101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25805 22:29:03.512802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25806 22:29:03.513181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25808 22:29:03.550088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25809 22:29:03.550520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25811 22:29:03.589711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25813 22:29:03.590106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25814 22:29:03.626876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25815 22:29:03.627276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25817 22:29:03.677672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25818 22:29:03.678079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25820 22:29:03.726099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25821 22:29:03.726535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25823 22:29:03.772654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25824 22:29:03.773085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25826 22:29:03.818398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25828 22:29:03.818961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25829 22:29:03.866205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25831 22:29:03.866787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25832 22:29:03.911317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25834 22:29:03.911912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25835 22:29:03.960252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25836 22:29:03.960676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25838 22:29:04.010015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25839 22:29:04.010447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25841 22:29:04.061085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25842 22:29:04.061441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25844 22:29:04.110536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25845 22:29:04.110999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25847 22:29:04.150813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25848 22:29:04.151272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25850 22:29:04.198497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25851 22:29:04.199073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25853 22:29:04.243663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25854 22:29:04.244157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25856 22:29:04.293889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25858 22:29:04.294588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25859 22:29:04.338410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
25861 22:29:04.339155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
25862 22:29:04.377630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
25863 22:29:04.378088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
25865 22:29:04.425117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
25866 22:29:04.425562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
25868 22:29:04.462202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
25869 22:29:04.462770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
25871 22:29:04.500763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
25873 22:29:04.501241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
25874 22:29:04.549388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
25876 22:29:04.549764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
25877 22:29:04.589542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
25878 22:29:04.589996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
25880 22:29:04.640776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
25881 22:29:04.641162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
25883 22:29:04.695026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
25884 22:29:04.695414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
25886 22:29:04.751355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
25887 22:29:04.751743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
25889 22:29:04.799689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
25890 22:29:04.800080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
25892 22:29:04.842347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
25893 22:29:04.842710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
25895 22:29:04.882959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
25896 22:29:04.883412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
25898 22:29:04.920740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
25899 22:29:04.921145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
25901 22:29:04.966226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
25902 22:29:04.966649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
25904 22:29:05.009469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
25905 22:29:05.009817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
25907 22:29:05.050484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
25908 22:29:05.050844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
25910 22:29:05.089156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
25912 22:29:05.089601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
25913 22:29:05.133519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
25914 22:29:05.133956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
25916 22:29:05.173618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
25918 22:29:05.174110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
25919 22:29:05.214618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
25921 22:29:05.215061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
25922 22:29:05.264438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
25923 22:29:05.264886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
25925 22:29:05.302219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
25926 22:29:05.302626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
25928 22:29:05.340519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
25929 22:29:05.340887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
25931 22:29:05.379307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
25932 22:29:05.379751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
25934 22:29:05.417330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
25935 22:29:05.417743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
25937 22:29:05.454201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
25938 22:29:05.454620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
25940 22:29:05.493718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
25941 22:29:05.494130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
25943 22:29:05.532916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
25945 22:29:05.533396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
25946 22:29:05.573218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
25947 22:29:05.573621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
25949 22:29:05.611512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
25951 22:29:05.611917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
25952 22:29:05.653672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
25953 22:29:05.654165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
25955 22:29:05.696895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
25956 22:29:05.697313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
25958 22:29:05.735841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
25960 22:29:05.736323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
25961 22:29:05.793154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
25962 22:29:05.793549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
25964 22:29:05.833780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
25965 22:29:05.834239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
25967 22:29:05.875096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
25968 22:29:05.875582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
25970 22:29:05.917172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
25971 22:29:05.917600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
25973 22:29:05.956440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
25974 22:29:05.956846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
25976 22:29:05.996108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
25978 22:29:05.996673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
25979 22:29:06.042882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
25980 22:29:06.043285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
25982 22:29:06.081164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
25983 22:29:06.081587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
25985 22:29:06.124575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
25987 22:29:06.124941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
25988 22:29:06.162928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
25990 22:29:06.163406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
25991 22:29:06.202025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
25992 22:29:06.202463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
25994 22:29:06.257840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
25995 22:29:06.258244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
25997 22:29:06.306534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
25999 22:29:06.307019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26000 22:29:06.344765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26002 22:29:06.345217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26003 22:29:06.389566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26004 22:29:06.390032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26006 22:29:06.428796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26007 22:29:06.429223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26009 22:29:06.466782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26010 22:29:06.467203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26012 22:29:06.513302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26014 22:29:06.513978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26015 22:29:06.550428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26017 22:29:06.551073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26018 22:29:06.603260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26019 22:29:06.603658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26021 22:29:06.656703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26022 22:29:06.657163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26024 22:29:06.706492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26025 22:29:06.706877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26027 22:29:06.745055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26028 22:29:06.745488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26030 22:29:06.782061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26032 22:29:06.782543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26033 22:29:06.818503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26034 22:29:06.818979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26036 22:29:06.868629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26038 22:29:06.869113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26039 22:29:06.914821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26040 22:29:06.915278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26042 22:29:06.960617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26044 22:29:06.961103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26045 22:29:07.008747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26047 22:29:07.009227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26048 22:29:07.053947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26049 22:29:07.054408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26051 22:29:07.100909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26052 22:29:07.101339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26054 22:29:07.164712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26055 22:29:07.165131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26057 22:29:07.202181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26058 22:29:07.202626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26060 22:29:07.248247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26062 22:29:07.248721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26063 22:29:07.289084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26065 22:29:07.289565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26066 22:29:07.339118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26068 22:29:07.339581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26069 22:29:07.397695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26071 22:29:07.398164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26072 22:29:07.439652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26073 22:29:07.440086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26075 22:29:07.486008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26076 22:29:07.486441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26078 22:29:07.544718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26080 22:29:07.545142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26081 22:29:07.601330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26082 22:29:07.601792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26084 22:29:07.658254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26085 22:29:07.658707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26087 22:29:07.717414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26088 22:29:07.717853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26090 22:29:07.774460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26092 22:29:07.774942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26093 22:29:07.834209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26094 22:29:07.834629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26096 22:29:07.882434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26098 22:29:07.882884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26099 22:29:07.920947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26100 22:29:07.921407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26102 22:29:07.963917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26104 22:29:07.964445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26105 22:29:08.001490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26106 22:29:08.001931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26108 22:29:08.038870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26110 22:29:08.039343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26111 22:29:08.077384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26112 22:29:08.077863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26114 22:29:08.115191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26116 22:29:08.115658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26117 22:29:08.153180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26118 22:29:08.153617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26120 22:29:08.208773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26122 22:29:08.209364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26123 22:29:08.264991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26124 22:29:08.265352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26126 22:29:08.321677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26127 22:29:08.322110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26129 22:29:08.369472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26130 22:29:08.369879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26132 22:29:08.408928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26133 22:29:08.409359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26135 22:29:08.446742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26136 22:29:08.447184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26138 22:29:08.484003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26140 22:29:08.484496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26141 22:29:08.523863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26143 22:29:08.524338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26144 22:29:08.564863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26146 22:29:08.565310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26147 22:29:08.605459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26148 22:29:08.606052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26150 22:29:08.648417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26151 22:29:08.648797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26153 22:29:08.690622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26154 22:29:08.691004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26156 22:29:08.749702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26158 22:29:08.750170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26159 22:29:08.797386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26160 22:29:08.797764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26162 22:29:08.835004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26163 22:29:08.835408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26165 22:29:08.873773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26166 22:29:08.874200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26168 22:29:08.911375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26169 22:29:08.911788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26171 22:29:08.958716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26172 22:29:08.959108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26174 22:29:08.999953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26176 22:29:09.000282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26177 22:29:09.037928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26178 22:29:09.038346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26180 22:29:09.094930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26181 22:29:09.095353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26183 22:29:09.132508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26185 22:29:09.132965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26186 22:29:09.170180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26187 22:29:09.170591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26189 22:29:09.213479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26190 22:29:09.213889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26192 22:29:09.252842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26194 22:29:09.253235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26195 22:29:09.291457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26196 22:29:09.291875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26198 22:29:09.330919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26200 22:29:09.331370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26201 22:29:09.374396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26202 22:29:09.374809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26204 22:29:09.413710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26205 22:29:09.414102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26207 22:29:09.461711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26208 22:29:09.462106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26210 22:29:09.517845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26211 22:29:09.518255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26213 22:29:09.564733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26215 22:29:09.565145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26216 22:29:09.617466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26217 22:29:09.617832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26219 22:29:09.671063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26221 22:29:09.671658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26222 22:29:09.726037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26223 22:29:09.726435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26225 22:29:09.778882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26226 22:29:09.779306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26228 22:29:09.822294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26229 22:29:09.822705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26231 22:29:09.862959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26232 22:29:09.863377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26234 22:29:09.910101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26235 22:29:09.910514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26237 22:29:09.967493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26238 22:29:09.967921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26240 22:29:10.013736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26241 22:29:10.014129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26243 22:29:10.055016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26244 22:29:10.055419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26246 22:29:10.101420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26247 22:29:10.101872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26249 22:29:10.148627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26250 22:29:10.149093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26252 22:29:10.190348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26254 22:29:10.190827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26255 22:29:10.230495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26256 22:29:10.230897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26258 22:29:10.269112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26259 22:29:10.269551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26261 22:29:10.306892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26262 22:29:10.307347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26264 22:29:10.361171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26265 22:29:10.361555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26267 22:29:10.415250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26269 22:29:10.415667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26270 22:29:10.458722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26271 22:29:10.459167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26273 22:29:10.498581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26274 22:29:10.499016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26276 22:29:10.538952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26277 22:29:10.539403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26279 22:29:10.585987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26280 22:29:10.586379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26282 22:29:10.647519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26283 22:29:10.647913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26285 22:29:10.706948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26286 22:29:10.707393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26288 22:29:10.765808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26289 22:29:10.766228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26291 22:29:10.826921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26292 22:29:10.827366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26294 22:29:10.886099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26295 22:29:10.886550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26297 22:29:10.943068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26299 22:29:10.943497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26300 22:29:10.998705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26302 22:29:10.999476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26303 22:29:11.058179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26304 22:29:11.058584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26306 22:29:11.114587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26307 22:29:11.114961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26309 22:29:11.167329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26310 22:29:11.167737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26312 22:29:11.220852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26313 22:29:11.221306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26315 22:29:11.274697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26316 22:29:11.275126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26318 22:29:11.328096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26320 22:29:11.328552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26321 22:29:11.382255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26322 22:29:11.382650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26324 22:29:11.425402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26325 22:29:11.425819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26327 22:29:11.470645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26329 22:29:11.471128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26330 22:29:11.524613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26331 22:29:11.525062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26333 22:29:11.577796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26334 22:29:11.578239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26336 22:29:11.638316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26337 22:29:11.638696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26339 22:29:11.693826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26340 22:29:11.694274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26342 22:29:11.748882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26343 22:29:11.749310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26345 22:29:11.804892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26346 22:29:11.805323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26348 22:29:11.858788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26350 22:29:11.859282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26351 22:29:11.915887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26353 22:29:11.916354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26354 22:29:11.954561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26356 22:29:11.955013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26357 22:29:11.992375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26359 22:29:11.992793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26360 22:29:12.029301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26362 22:29:12.029732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26363 22:29:12.076670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26364 22:29:12.077109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26366 22:29:12.119510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26367 22:29:12.119948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26369 22:29:12.162671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26370 22:29:12.163102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26372 22:29:12.211629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26373 22:29:12.212029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26375 22:29:12.287100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26376 22:29:12.287531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26378 22:29:12.330763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26379 22:29:12.331146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26381 22:29:12.378367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26382 22:29:12.378911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26384 22:29:12.417310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26386 22:29:12.418081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26387 22:29:12.456107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26389 22:29:12.456578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26390 22:29:12.497770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26391 22:29:12.498200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26393 22:29:12.540773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26395 22:29:12.541246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26396 22:29:12.595366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26398 22:29:12.595867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26399 22:29:12.638520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26400 22:29:12.638965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26402 22:29:12.692808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26404 22:29:12.693288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26405 22:29:12.746118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26406 22:29:12.746559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26408 22:29:12.797784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26409 22:29:12.798215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26411 22:29:12.841628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26412 22:29:12.841996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26414 22:29:12.891263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26415 22:29:12.891713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26417 22:29:12.938700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26418 22:29:12.939168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26420 22:29:12.990752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26421 22:29:12.991170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26423 22:29:13.036866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26424 22:29:13.037312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26426 22:29:13.077724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26427 22:29:13.078190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26429 22:29:13.119522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26431 22:29:13.119999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26432 22:29:13.161696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26433 22:29:13.162136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26435 22:29:13.200607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26436 22:29:13.201041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26438 22:29:13.246642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26440 22:29:13.247105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26441 22:29:13.295568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26442 22:29:13.296018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26444 22:29:13.345966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26445 22:29:13.346408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26447 22:29:13.384061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26449 22:29:13.384492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26450 22:29:13.426696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26451 22:29:13.427123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26453 22:29:13.470034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26454 22:29:13.470462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26456 22:29:13.515087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26457 22:29:13.515585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26459 22:29:13.560172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26461 22:29:13.560648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26462 22:29:13.601807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26463 22:29:13.602345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26465 22:29:13.649989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26466 22:29:13.650523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26468 22:29:13.706398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26470 22:29:13.706864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26471 22:29:13.753655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26473 22:29:13.754092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26474 22:29:13.805815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26475 22:29:13.806250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26477 22:29:13.851093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26478 22:29:13.851522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26480 22:29:13.903506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26481 22:29:13.903927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26483 22:29:13.957785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26484 22:29:13.958229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26486 22:29:14.007164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26488 22:29:14.007629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26489 22:29:14.050515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26490 22:29:14.050959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26492 22:29:14.089782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26493 22:29:14.090151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26495 22:29:14.126303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26497 22:29:14.126777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26498 22:29:14.168037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26500 22:29:14.168508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26501 22:29:14.216946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26502 22:29:14.217313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26504 22:29:14.265717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26506 22:29:14.266205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26507 22:29:14.305816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26508 22:29:14.306221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26510 22:29:14.348038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26512 22:29:14.348506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26513 22:29:14.387616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26514 22:29:14.388107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26516 22:29:14.426580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26518 22:29:14.426981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26519 22:29:14.468840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26520 22:29:14.469261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26522 22:29:14.519140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26524 22:29:14.519629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26525 22:29:14.566472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26526 22:29:14.566907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26528 22:29:14.618078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26529 22:29:14.618494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26531 22:29:14.661243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26532 22:29:14.661624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26534 22:29:14.712776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26535 22:29:14.713225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26537 22:29:14.749671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26538 22:29:14.750097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26540 22:29:14.808092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26542 22:29:14.808619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26543 22:29:14.846554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26544 22:29:14.846934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26546 22:29:14.884820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26547 22:29:14.885247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26549 22:29:14.925635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26550 22:29:14.926048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26552 22:29:14.972536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26553 22:29:14.972974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26555 22:29:15.011630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26556 22:29:15.012075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26558 22:29:15.058338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26559 22:29:15.058730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26561 22:29:15.104085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26563 22:29:15.104554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26564 22:29:15.154298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26566 22:29:15.154789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26567 22:29:15.197235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26568 22:29:15.197635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26570 22:29:15.240163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26572 22:29:15.240605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26573 22:29:15.291178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26574 22:29:15.291630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26576 22:29:15.345577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26577 22:29:15.345997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26579 22:29:15.399569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26581 22:29:15.400059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26582 22:29:15.441947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26583 22:29:15.442409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26585 22:29:15.479218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26586 22:29:15.479564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26588 22:29:15.518983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26589 22:29:15.519424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26591 22:29:15.569213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26592 22:29:15.569640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26594 22:29:15.617396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26596 22:29:15.617830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26597 22:29:15.658411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26599 22:29:15.658799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26600 22:29:15.693471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26601 22:29:15.693996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26603 22:29:15.730600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26604 22:29:15.731098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26606 22:29:15.773916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26607 22:29:15.774481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26609 22:29:15.816940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26610 22:29:15.817368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26612 22:29:15.858131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26613 22:29:15.858593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26615 22:29:15.901543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26616 22:29:15.901991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26618 22:29:15.951602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26620 22:29:15.952040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26621 22:29:15.996808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26622 22:29:15.997255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26624 22:29:16.051963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26626 22:29:16.052376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26627 22:29:16.090226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26628 22:29:16.090598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26630 22:29:16.135607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26631 22:29:16.136016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26633 22:29:16.178763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26634 22:29:16.179237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26636 22:29:16.234977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26638 22:29:16.235449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26639 22:29:16.280480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26640 22:29:16.280913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26642 22:29:16.320894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26643 22:29:16.321285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26645 22:29:16.374455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26646 22:29:16.374871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26648 22:29:16.424815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26649 22:29:16.425320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26651 22:29:16.465673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26652 22:29:16.466107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26654 22:29:16.516902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26656 22:29:16.517302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26657 22:29:16.551802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26658 22:29:16.552212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26660 22:29:16.587255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26661 22:29:16.587688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26663 22:29:16.647723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26664 22:29:16.648118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26666 22:29:16.697306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26667 22:29:16.697745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26669 22:29:16.742213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26670 22:29:16.742646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26672 22:29:16.785617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26673 22:29:16.786052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26675 22:29:16.833551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26676 22:29:16.833957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26678 22:29:16.872119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26680 22:29:16.872714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26681 22:29:16.911556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26682 22:29:16.911970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26684 22:29:16.948784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26686 22:29:16.949372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26687 22:29:16.990474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26688 22:29:16.990975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26690 22:29:17.035578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26692 22:29:17.036062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26693 22:29:17.086559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26694 22:29:17.086964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26696 22:29:17.126650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26697 22:29:17.127079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26699 22:29:17.169957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26700 22:29:17.170389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26702 22:29:17.211634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26703 22:29:17.212064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26705 22:29:17.267106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26706 22:29:17.267582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26708 22:29:17.312091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26710 22:29:17.312517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26711 22:29:17.355667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26713 22:29:17.356361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26714 22:29:17.420986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26715 22:29:17.421485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26717 22:29:17.460805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26718 22:29:17.461247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26720 22:29:17.513116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26721 22:29:17.513570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26723 22:29:17.559445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26724 22:29:17.559884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26726 22:29:17.610931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26727 22:29:17.611384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26729 22:29:17.650320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26730 22:29:17.650692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26732 22:29:17.698162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26734 22:29:17.698664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26735 22:29:17.744382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26736 22:29:17.744805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26738 22:29:17.795255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26739 22:29:17.795658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26741 22:29:17.838440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26742 22:29:17.838895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26744 22:29:17.883702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26745 22:29:17.884100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26747 22:29:17.922954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26748 22:29:17.923450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26750 22:29:17.974276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26751 22:29:17.974736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26753 22:29:18.012222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26755 22:29:18.012704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26756 22:29:18.063237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26757 22:29:18.063654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26759 22:29:18.099755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26760 22:29:18.100188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26762 22:29:18.137120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26764 22:29:18.137532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26765 22:29:18.173139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26766 22:29:18.173548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26768 22:29:18.209237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26770 22:29:18.209663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26771 22:29:18.254536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26772 22:29:18.254925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26774 22:29:18.314845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26775 22:29:18.315204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26777 22:29:18.372344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26778 22:29:18.372732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26780 22:29:18.421040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26781 22:29:18.421421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26783 22:29:18.469175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26784 22:29:18.469573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26786 22:29:18.507319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26788 22:29:18.507969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26789 22:29:18.551987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26791 22:29:18.552526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26792 22:29:18.603501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26793 22:29:18.603931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26795 22:29:18.647208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26796 22:29:18.647637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26798 22:29:18.688071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26800 22:29:18.688542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26801 22:29:18.741605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26803 22:29:18.742034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26804 22:29:18.798962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26805 22:29:18.799386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26807 22:29:18.860100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26809 22:29:18.860489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26810 22:29:18.910901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26812 22:29:18.911390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26813 22:29:18.955086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26814 22:29:18.955474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26816 22:29:19.005619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26817 22:29:19.006069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26819 22:29:19.056427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26820 22:29:19.056855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26822 22:29:19.091614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26824 22:29:19.092086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26825 22:29:19.126045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26826 22:29:19.126497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26828 22:29:19.162175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26829 22:29:19.162700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26831 22:29:19.200374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26832 22:29:19.200768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26834 22:29:19.233684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26835 22:29:19.234083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26837 22:29:19.268495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26838 22:29:19.268875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26840 22:29:19.305190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26842 22:29:19.305814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26843 22:29:19.345025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26844 22:29:19.345584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26846 22:29:19.386414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26848 22:29:19.387065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26849 22:29:19.424190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26851 22:29:19.424968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26852 22:29:19.464011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26854 22:29:19.464756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26855 22:29:19.505404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26856 22:29:19.505833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26858 22:29:19.545186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
26860 22:29:19.545800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26861 22:29:19.585881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
26863 22:29:19.586608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
26864 22:29:19.624741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
26865 22:29:19.625217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
26867 22:29:19.660687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
26868 22:29:19.661167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
26870 22:29:19.696346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
26871 22:29:19.696849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
26873 22:29:19.731978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
26875 22:29:19.732444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
26876 22:29:19.769109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
26877 22:29:19.769489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
26879 22:29:19.806675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
26880 22:29:19.807035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
26882 22:29:19.842111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
26883 22:29:19.842639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
26885 22:29:19.876446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
26887 22:29:19.876868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
26888 22:29:19.911069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
26889 22:29:19.911475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
26891 22:29:19.949092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
26892 22:29:19.949468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
26894 22:29:19.986330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
26895 22:29:19.986745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
26897 22:29:20.021098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
26898 22:29:20.021479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
26900 22:29:20.057895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
26902 22:29:20.058366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
26903 22:29:20.098913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
26904 22:29:20.099294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
26906 22:29:20.139338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
26907 22:29:20.139722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
26909 22:29:20.178523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
26910 22:29:20.178990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
26912 22:29:20.214271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
26913 22:29:20.214783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
26915 22:29:20.248433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
26916 22:29:20.248917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
26918 22:29:20.282221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
26919 22:29:20.282627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
26921 22:29:20.316885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
26922 22:29:20.317364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
26924 22:29:20.356821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
26926 22:29:20.357190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
26927 22:29:20.395404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
26928 22:29:20.395820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
26930 22:29:20.430729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
26931 22:29:20.431145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
26933 22:29:20.478707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
26934 22:29:20.479180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
26936 22:29:20.528976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
26937 22:29:20.529344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
26939 22:29:20.565940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
26940 22:29:20.566461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
26942 22:29:20.601105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
26943 22:29:20.601622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
26945 22:29:20.647550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
26946 22:29:20.648079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
26948 22:29:20.683302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
26949 22:29:20.683725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
26951 22:29:20.723001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
26952 22:29:20.723451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
26954 22:29:20.760861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
26955 22:29:20.761368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
26957 22:29:20.798772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
26958 22:29:20.799188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
26960 22:29:20.836039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
26962 22:29:20.836432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
26963 22:29:20.873996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
26964 22:29:20.874398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
26966 22:29:20.913309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
26967 22:29:20.913761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
26969 22:29:20.948402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
26971 22:29:20.949061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
26972 22:29:20.995034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
26974 22:29:20.995403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
26975 22:29:21.041438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
26976 22:29:21.041923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
26978 22:29:21.082859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
26980 22:29:21.083520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
26981 22:29:21.118828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
26982 22:29:21.119253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
26984 22:29:21.160741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
26985 22:29:21.161233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
26987 22:29:21.201175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
26988 22:29:21.201668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
26990 22:29:21.237515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
26991 22:29:21.238056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
26993 22:29:21.278033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
26995 22:29:21.278574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
26996 22:29:21.316552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
26998 22:29:21.316946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
26999 22:29:21.356824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27001 22:29:21.357388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27002 22:29:21.397313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27003 22:29:21.397829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27005 22:29:21.442251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27006 22:29:21.442840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27008 22:29:21.480037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27010 22:29:21.480922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27011 22:29:21.516812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27012 22:29:21.517242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27014 22:29:21.553518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27015 22:29:21.553949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27017 22:29:21.589377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27018 22:29:21.589946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27020 22:29:21.626393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27021 22:29:21.626820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27023 22:29:21.665595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27024 22:29:21.666041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27026 22:29:21.704974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27027 22:29:21.705431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27029 22:29:21.741456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27031 22:29:21.741933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27032 22:29:21.779577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27033 22:29:21.780030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27035 22:29:21.827724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27037 22:29:21.828208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27038 22:29:21.876522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27039 22:29:21.877010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27041 22:29:21.910828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27043 22:29:21.911402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27044 22:29:21.947564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27045 22:29:21.948034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27047 22:29:21.986558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27048 22:29:21.987117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27050 22:29:22.021559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27051 22:29:22.022037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27053 22:29:22.055783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27054 22:29:22.056149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27056 22:29:22.091421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27057 22:29:22.091846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27059 22:29:22.129810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27060 22:29:22.130269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27062 22:29:22.168103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27064 22:29:22.168577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27065 22:29:22.203172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27066 22:29:22.203566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27068 22:29:22.240438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27069 22:29:22.240898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27071 22:29:22.276907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27072 22:29:22.277325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27074 22:29:22.317816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27075 22:29:22.318257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27077 22:29:22.355221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27078 22:29:22.355652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27080 22:29:22.399145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27081 22:29:22.399503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27083 22:29:22.440680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27084 22:29:22.441110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27086 22:29:22.480848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27087 22:29:22.481298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27089 22:29:22.536924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27091 22:29:22.537299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27092 22:29:22.572418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27093 22:29:22.572845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27095 22:29:22.608536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27096 22:29:22.608965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27098 22:29:22.645406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27099 22:29:22.645994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27101 22:29:22.684683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27102 22:29:22.685101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27104 22:29:22.722495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27105 22:29:22.722925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27107 22:29:22.760957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27109 22:29:22.761434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27110 22:29:22.802731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27111 22:29:22.803248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27113 22:29:22.858304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27114 22:29:22.858758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27116 22:29:22.913559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27118 22:29:22.914043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27119 22:29:22.963066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27120 22:29:22.963651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27122 22:29:23.005031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27123 22:29:23.005502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27125 22:29:23.043140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27126 22:29:23.043543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27128 22:29:23.082125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27129 22:29:23.082572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27131 22:29:23.124497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27132 22:29:23.125011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27134 22:29:23.167217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27135 22:29:23.167629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27137 22:29:23.203839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27139 22:29:23.204320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27140 22:29:23.252956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27141 22:29:23.253409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27143 22:29:23.293439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27145 22:29:23.293903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27146 22:29:23.329426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27147 22:29:23.329886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27149 22:29:23.365721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27150 22:29:23.366146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27152 22:29:23.404954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27153 22:29:23.405380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27155 22:29:23.441295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27157 22:29:23.441797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27158 22:29:23.477783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27160 22:29:23.478248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27161 22:29:23.514984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27163 22:29:23.515635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27164 22:29:23.551264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27165 22:29:23.551648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27167 22:29:23.589127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27168 22:29:23.589530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27170 22:29:23.622855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27171 22:29:23.623242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27173 22:29:23.660438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27175 22:29:23.660861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27176 22:29:23.703311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27177 22:29:23.703731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27179 22:29:23.753973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27181 22:29:23.754420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27182 22:29:23.805716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27184 22:29:23.806143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27185 22:29:23.855982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27187 22:29:23.856443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27188 22:29:23.907029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27189 22:29:23.907445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27191 22:29:23.945724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27192 22:29:23.946125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27194 22:29:23.998585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27196 22:29:23.999041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27197 22:29:24.038927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27198 22:29:24.039497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27200 22:29:24.090623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27201 22:29:24.091052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27203 22:29:24.127438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27204 22:29:24.127870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27206 22:29:24.175531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27207 22:29:24.175984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27209 22:29:24.217377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27211 22:29:24.217877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27212 22:29:24.258886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27213 22:29:24.259401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27215 22:29:24.301372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27216 22:29:24.301773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27218 22:29:24.336885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27220 22:29:24.337354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27221 22:29:24.374133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27222 22:29:24.374662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27224 22:29:24.415184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27225 22:29:24.415562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27227 22:29:24.453662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27228 22:29:24.454218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27230 22:29:24.489983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27232 22:29:24.490457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27233 22:29:24.529578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27234 22:29:24.530026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27236 22:29:24.567423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27237 22:29:24.567859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27239 22:29:24.617103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27241 22:29:24.617583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27242 22:29:24.657005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27243 22:29:24.657422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27245 22:29:24.693250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27247 22:29:24.694017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27248 22:29:24.730601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27249 22:29:24.731022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27251 22:29:24.768886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27252 22:29:24.769348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27254 22:29:24.808880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27255 22:29:24.809316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27257 22:29:24.851666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27258 22:29:24.852107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27260 22:29:24.905894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27261 22:29:24.906331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27263 22:29:24.943613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27264 22:29:24.944045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27266 22:29:24.980389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27267 22:29:24.980812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27269 22:29:25.019290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27271 22:29:25.019764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27272 22:29:25.061321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27273 22:29:25.061744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27275 22:29:25.105120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27276 22:29:25.105534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27278 22:29:25.143041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27280 22:29:25.143506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27281 22:29:25.184212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27283 22:29:25.184687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27284 22:29:25.222027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27285 22:29:25.222418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27287 22:29:25.258439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27289 22:29:25.258808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27290 22:29:25.293716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27292 22:29:25.294126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27293 22:29:25.327605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27294 22:29:25.328025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27296 22:29:25.360947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27297 22:29:25.361322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27299 22:29:25.398902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27300 22:29:25.399286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27302 22:29:25.438486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27303 22:29:25.438881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27305 22:29:25.478858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27306 22:29:25.479208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27308 22:29:25.523519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27309 22:29:25.523947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27311 22:29:25.566503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27312 22:29:25.566981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27314 22:29:25.602330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27316 22:29:25.602689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27317 22:29:25.639352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27318 22:29:25.639831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27320 22:29:25.675623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27322 22:29:25.676127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27323 22:29:25.712720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27324 22:29:25.713158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27326 22:29:25.749390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27328 22:29:25.749846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27329 22:29:25.785867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27331 22:29:25.786490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27332 22:29:25.821208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27333 22:29:25.821770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27335 22:29:25.859234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27336 22:29:25.859749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27338 22:29:25.896415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27339 22:29:25.896987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27341 22:29:25.935791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27343 22:29:25.936381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27344 22:29:25.977033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27345 22:29:25.977414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27347 22:29:26.029729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27348 22:29:26.030136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27350 22:29:26.083426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27352 22:29:26.083910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27353 22:29:26.126998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27355 22:29:26.127652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27356 22:29:26.168634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27357 22:29:26.169052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27359 22:29:26.206609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27361 22:29:26.207072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27362 22:29:26.246350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27364 22:29:26.246811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27365 22:29:26.284739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27366 22:29:26.285159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27368 22:29:26.328927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27369 22:29:26.329345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27371 22:29:26.367894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27373 22:29:26.368274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27374 22:29:26.403199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27376 22:29:26.403574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27377 22:29:26.441179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27378 22:29:26.441597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27380 22:29:26.478997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27381 22:29:26.479460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27383 22:29:26.516652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27384 22:29:26.517151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27386 22:29:26.553780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27387 22:29:26.554281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27389 22:29:26.590353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27390 22:29:26.590771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27392 22:29:26.629097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27393 22:29:26.629583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27395 22:29:26.666454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27396 22:29:26.666868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27398 22:29:26.704871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27399 22:29:26.705256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27401 22:29:26.741727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27402 22:29:26.742133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27404 22:29:26.793086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27406 22:29:26.793519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27407 22:29:26.829082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27408 22:29:26.829476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27410 22:29:26.872351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27411 22:29:26.872751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27413 22:29:26.910962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27415 22:29:26.911420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27416 22:29:26.949512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27418 22:29:26.949981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27419 22:29:26.989903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27421 22:29:26.990368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27422 22:29:27.027609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27424 22:29:27.028112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27425 22:29:27.065020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27426 22:29:27.065433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27428 22:29:27.103255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27429 22:29:27.103657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27431 22:29:27.141504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27433 22:29:27.141929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27434 22:29:27.186029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27435 22:29:27.186450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27437 22:29:27.228986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27439 22:29:27.229415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27440 22:29:27.265850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27441 22:29:27.266316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27443 22:29:27.301557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27444 22:29:27.302065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27446 22:29:27.340041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27448 22:29:27.340511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27449 22:29:27.387972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27451 22:29:27.388599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27452 22:29:27.430489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27453 22:29:27.430866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27455 22:29:27.475386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27456 22:29:27.475955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27458 22:29:27.532754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27459 22:29:27.533160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27461 22:29:27.579522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27462 22:29:27.579953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27464 22:29:27.642421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27465 22:29:27.642822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27467 22:29:27.679618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27469 22:29:27.680254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27470 22:29:27.721224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27472 22:29:27.721723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27473 22:29:27.770102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27474 22:29:27.770575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27476 22:29:27.811932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27478 22:29:27.812408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27479 22:29:27.857339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27480 22:29:27.857779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27482 22:29:27.911706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27484 22:29:27.912270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27485 22:29:27.963750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27486 22:29:27.964093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27488 22:29:28.004435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27489 22:29:28.004796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27491 22:29:28.043318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27493 22:29:28.043933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27494 22:29:28.080932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27495 22:29:28.081355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27497 22:29:28.117118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27498 22:29:28.117552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27500 22:29:28.153460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27502 22:29:28.153956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27503 22:29:28.189145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27504 22:29:28.189585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27506 22:29:28.224937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27508 22:29:28.225450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27509 22:29:28.274779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27511 22:29:28.275425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27512 22:29:28.310265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27514 22:29:28.310909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27515 22:29:28.349821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27516 22:29:28.350406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27518 22:29:28.389462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27520 22:29:28.389955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27521 22:29:28.426098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27522 22:29:28.426531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27524 22:29:28.466464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27525 22:29:28.466907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27527 22:29:28.518591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27528 22:29:28.518988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27530 22:29:28.573512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27531 22:29:28.573953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27533 22:29:28.629350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27534 22:29:28.629755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27536 22:29:28.671513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27538 22:29:28.671997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27539 22:29:28.710199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27540 22:29:28.710772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27542 22:29:28.757049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27544 22:29:28.757457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27545 22:29:28.801346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27547 22:29:28.801842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27548 22:29:28.852397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27549 22:29:28.852850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27551 22:29:28.887050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27552 22:29:28.887473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27554 22:29:28.928148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27556 22:29:28.928605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27557 22:29:28.973561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27558 22:29:28.974000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27560 22:29:29.014511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27561 22:29:29.015072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27563 22:29:29.052180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27565 22:29:29.052650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27566 22:29:29.093105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27568 22:29:29.093722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27569 22:29:29.132831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27570 22:29:29.133267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27572 22:29:29.168084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27574 22:29:29.168481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27575 22:29:29.204582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27576 22:29:29.205011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27578 22:29:29.244416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27580 22:29:29.244850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27581 22:29:29.281488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27582 22:29:29.281904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27584 22:29:29.322120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27585 22:29:29.322534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27587 22:29:29.360139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27589 22:29:29.360604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27590 22:29:29.407058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27591 22:29:29.407413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27593 22:29:29.447165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27595 22:29:29.447609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27596 22:29:29.484594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27597 22:29:29.484993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27599 22:29:29.524351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27600 22:29:29.524829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27602 22:29:29.561760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27603 22:29:29.562305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27605 22:29:29.596497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27606 22:29:29.596966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27608 22:29:29.642000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27609 22:29:29.642437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27611 22:29:29.690371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27612 22:29:29.690797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27614 22:29:29.735012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27616 22:29:29.735474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27617 22:29:29.770504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27618 22:29:29.770901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27620 22:29:29.821318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27622 22:29:29.821707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27623 22:29:29.857494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27624 22:29:29.857900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27626 22:29:29.902273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27627 22:29:29.902675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27629 22:29:29.945727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27630 22:29:29.946151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27632 22:29:29.993835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27634 22:29:29.994326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27635 22:29:30.031574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27637 22:29:30.032069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27638 22:29:30.071697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27639 22:29:30.072110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27641 22:29:30.117753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27642 22:29:30.118228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27644 22:29:30.158451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27645 22:29:30.158894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27647 22:29:30.198201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27648 22:29:30.198645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27650 22:29:30.235656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27652 22:29:30.236132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27653 22:29:30.278786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27654 22:29:30.279192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27656 22:29:30.319891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27657 22:29:30.320242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27659 22:29:30.357138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27660 22:29:30.357530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27662 22:29:30.401773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27663 22:29:30.402176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27665 22:29:30.443531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27666 22:29:30.444006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27668 22:29:30.484357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27669 22:29:30.484890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27671 22:29:30.525148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27672 22:29:30.525663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27674 22:29:30.569798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27675 22:29:30.570211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27677 22:29:30.610349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27678 22:29:30.610749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27680 22:29:30.658684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27682 22:29:30.659138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27683 22:29:30.697448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27685 22:29:30.697884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27686 22:29:30.735587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27687 22:29:30.736045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27689 22:29:30.774712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27690 22:29:30.775156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27692 22:29:30.813622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27694 22:29:30.814093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27695 22:29:30.852602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27697 22:29:30.853061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27698 22:29:30.892985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27700 22:29:30.893439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27701 22:29:30.934339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27702 22:29:30.934786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27704 22:29:30.975366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27705 22:29:30.975788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27707 22:29:31.018519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27708 22:29:31.019095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27710 22:29:31.059072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27711 22:29:31.059635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27713 22:29:31.099016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27715 22:29:31.099473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27716 22:29:31.143308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27717 22:29:31.143753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27719 22:29:31.198226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27720 22:29:31.198630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27722 22:29:31.236350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27723 22:29:31.236791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27725 22:29:31.274594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27726 22:29:31.275007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27728 22:29:31.325730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27730 22:29:31.326351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27731 22:29:31.371574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27732 22:29:31.372069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27734 22:29:31.411182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27735 22:29:31.411702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27737 22:29:31.455724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27739 22:29:31.456304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27740 22:29:31.493011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27742 22:29:31.493506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27743 22:29:31.530650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27744 22:29:31.531095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27746 22:29:31.570127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27748 22:29:31.570729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27749 22:29:31.609506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27750 22:29:31.610049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27752 22:29:31.656675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27753 22:29:31.657126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27755 22:29:31.702479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27757 22:29:31.702944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27758 22:29:31.748077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27760 22:29:31.748746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27761 22:29:31.787983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27763 22:29:31.788665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27764 22:29:31.826389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27765 22:29:31.826849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27767 22:29:31.862626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27769 22:29:31.863100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27770 22:29:31.900623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27772 22:29:31.901015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27773 22:29:31.942903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27774 22:29:31.943348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27776 22:29:31.983411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27777 22:29:31.983840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27779 22:29:32.027409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27781 22:29:32.027882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27782 22:29:32.078384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27784 22:29:32.078802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27785 22:29:32.122624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27787 22:29:32.123100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27788 22:29:32.162612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27789 22:29:32.163065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27791 22:29:32.200932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27792 22:29:32.201325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27794 22:29:32.237263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27795 22:29:32.237693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27797 22:29:32.275380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27799 22:29:32.275862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27800 22:29:32.311987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27802 22:29:32.312451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27803 22:29:32.349774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27804 22:29:32.350196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27806 22:29:32.394907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27808 22:29:32.395384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27809 22:29:32.440477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27811 22:29:32.440923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27812 22:29:32.477231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27814 22:29:32.477719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27815 22:29:32.512936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27816 22:29:32.513395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27818 22:29:32.551494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27819 22:29:32.551931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27821 22:29:32.592498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27822 22:29:32.592931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27824 22:29:32.628977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27826 22:29:32.629450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27827 22:29:32.675018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27829 22:29:32.675509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27830 22:29:32.720273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27831 22:29:32.720752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27833 22:29:32.789593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27834 22:29:32.790058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27836 22:29:32.851295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27837 22:29:32.851682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27839 22:29:32.913728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27841 22:29:32.914429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27842 22:29:32.961675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27843 22:29:32.962244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27845 22:29:32.999837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27847 22:29:33.000363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27848 22:29:33.038013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27850 22:29:33.038493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27851 22:29:33.075460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27853 22:29:33.075934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27854 22:29:33.112625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27855 22:29:33.113064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27857 22:29:33.156726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27859 22:29:33.157195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27860 22:29:33.197674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
27861 22:29:33.198262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
27863 22:29:33.246415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
27864 22:29:33.246843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
27866 22:29:33.284616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
27867 22:29:33.285044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
27869 22:29:33.328777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
27870 22:29:33.329167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
27872 22:29:33.377284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
27873 22:29:33.377690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
27875 22:29:33.418083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
27877 22:29:33.418555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
27878 22:29:33.453446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
27879 22:29:33.453867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
27881 22:29:33.489723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
27882 22:29:33.490150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
27884 22:29:33.525809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
27885 22:29:33.526298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
27887 22:29:33.561453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
27889 22:29:33.562199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
27890 22:29:33.601762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
27891 22:29:33.602265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
27893 22:29:33.637684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
27894 22:29:33.638035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
27896 22:29:33.678383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
27898 22:29:33.678849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
27899 22:29:33.717827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
27900 22:29:33.718311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
27902 22:29:33.756424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
27903 22:29:33.756813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
27905 22:29:33.792755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
27907 22:29:33.793178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
27908 22:29:33.833495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
27909 22:29:33.833903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
27911 22:29:33.871781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
27912 22:29:33.872182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
27914 22:29:33.919341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
27915 22:29:33.919764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
27917 22:29:33.963595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
27918 22:29:33.964081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
27920 22:29:34.003469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
27922 22:29:34.003938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
27923 22:29:34.042682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
27924 22:29:34.043091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
27926 22:29:34.082322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
27928 22:29:34.082866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
27929 22:29:34.119161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
27930 22:29:34.119570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
27932 22:29:34.157715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
27934 22:29:34.158181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
27935 22:29:34.193886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
27937 22:29:34.194347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
27938 22:29:34.231159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
27939 22:29:34.231604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
27941 22:29:34.268101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
27943 22:29:34.268490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
27944 22:29:34.310939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
27945 22:29:34.311506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
27947 22:29:34.351938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
27949 22:29:34.352660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
27950 22:29:34.408842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
27951 22:29:34.409323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
27953 22:29:34.454022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
27954 22:29:34.454584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
27956 22:29:34.494924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
27958 22:29:34.495356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
27959 22:29:34.541685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
27960 22:29:34.542035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
27962 22:29:34.582700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
27963 22:29:34.583107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
27965 22:29:34.634371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
27967 22:29:34.634958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
27968 22:29:34.667707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
27970 22:29:34.668282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
27971 22:29:34.702511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
27973 22:29:34.703103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
27974 22:29:34.737019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
27975 22:29:34.737421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
27977 22:29:34.781853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
27979 22:29:34.782484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
27980 22:29:34.825916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
27981 22:29:34.826297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
27983 22:29:34.871718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
27985 22:29:34.872276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
27986 22:29:34.914225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
27987 22:29:34.914684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
27989 22:29:34.967235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
27991 22:29:34.967646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
27992 22:29:35.005408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
27994 22:29:35.006208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
27995 22:29:35.044138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
27997 22:29:35.044606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
27998 22:29:35.084641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
27999 22:29:35.085195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28001 22:29:35.132583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28002 22:29:35.133165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28004 22:29:35.183488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28005 22:29:35.183893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28007 22:29:35.227123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28008 22:29:35.227570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28010 22:29:35.269541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28012 22:29:35.270164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28013 22:29:35.325933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28015 22:29:35.326357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28016 22:29:35.369183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28017 22:29:35.369585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28019 22:29:35.409898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28020 22:29:35.410425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28022 22:29:35.454762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28024 22:29:35.455425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28025 22:29:35.493855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28027 22:29:35.494611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28028 22:29:35.531101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28030 22:29:35.531534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28031 22:29:35.570986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28032 22:29:35.571389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28034 22:29:35.610685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28035 22:29:35.611105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28037 22:29:35.649093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28039 22:29:35.649567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28040 22:29:35.698475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28041 22:29:35.698903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28043 22:29:35.738449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28045 22:29:35.738880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28046 22:29:35.778157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28047 22:29:35.778585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28049 22:29:35.820559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28051 22:29:35.821034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28052 22:29:35.862257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28053 22:29:35.862678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28055 22:29:35.898882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28056 22:29:35.899301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28058 22:29:35.936660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28059 22:29:35.937077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28061 22:29:35.973872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28062 22:29:35.974314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28064 22:29:36.013120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28065 22:29:36.013557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28067 22:29:36.049125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28068 22:29:36.049551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28070 22:29:36.085500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28072 22:29:36.085953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28073 22:29:36.119975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28075 22:29:36.120379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28076 22:29:36.164636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28078 22:29:36.165010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28079 22:29:36.205024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28080 22:29:36.205535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28082 22:29:36.242429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28084 22:29:36.242813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28085 22:29:36.277055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28086 22:29:36.277460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28088 22:29:36.311719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28090 22:29:36.312166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28091 22:29:36.349138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28093 22:29:36.349573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28094 22:29:36.386707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28095 22:29:36.387122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28097 22:29:36.422536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28098 22:29:36.423025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28100 22:29:36.458286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28102 22:29:36.458736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28103 22:29:36.493209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28105 22:29:36.493617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28106 22:29:36.531313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28107 22:29:36.531714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28109 22:29:36.567602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28110 22:29:36.568062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28112 22:29:36.609128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28114 22:29:36.609594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28115 22:29:36.649219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28117 22:29:36.649697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28118 22:29:36.692812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28119 22:29:36.693259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28121 22:29:36.741408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28123 22:29:36.741836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28124 22:29:36.782104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28125 22:29:36.782541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28127 22:29:36.821718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28128 22:29:36.822157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28130 22:29:36.860813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28131 22:29:36.861248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28133 22:29:36.901443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28135 22:29:36.901944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28136 22:29:36.942784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28137 22:29:36.943205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28139 22:29:36.981117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28140 22:29:36.981537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28142 22:29:37.023614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28143 22:29:37.024055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28145 22:29:37.060950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28147 22:29:37.061405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28148 22:29:37.095344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28149 22:29:37.095736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28151 22:29:37.139518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28152 22:29:37.140065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28154 22:29:37.177278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28155 22:29:37.177769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28157 22:29:37.218336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28158 22:29:37.218719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28160 22:29:37.256142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28162 22:29:37.256559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28163 22:29:37.297717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28164 22:29:37.298145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28166 22:29:37.334688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28167 22:29:37.335112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28169 22:29:37.373595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28170 22:29:37.374053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28172 22:29:37.409175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28174 22:29:37.409622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28175 22:29:37.445808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28177 22:29:37.446280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28178 22:29:37.485929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28179 22:29:37.486361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28181 22:29:37.525627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28183 22:29:37.526073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28184 22:29:37.560947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28185 22:29:37.561338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28187 22:29:37.612573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28188 22:29:37.612991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28190 22:29:37.653364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28192 22:29:37.653781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28193 22:29:37.695496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28194 22:29:37.695948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28196 22:29:37.743202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28197 22:29:37.743684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28199 22:29:37.794790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28200 22:29:37.795285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28202 22:29:37.841716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28203 22:29:37.842135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28205 22:29:37.905526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28206 22:29:37.906041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28208 22:29:37.954363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28209 22:29:37.954784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28211 22:29:37.996023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28213 22:29:37.996650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28214 22:29:38.031132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28215 22:29:38.031584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28217 22:29:38.065400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28218 22:29:38.065797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28220 22:29:38.106479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28221 22:29:38.106976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28223 22:29:38.144765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28224 22:29:38.145149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28226 22:29:38.181819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28227 22:29:38.182362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28229 22:29:38.216993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28230 22:29:38.217443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28232 22:29:38.250913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28233 22:29:38.251382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28235 22:29:38.294670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28236 22:29:38.295105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28238 22:29:38.333264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28240 22:29:38.333705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28241 22:29:38.379173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28242 22:29:38.379561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28244 22:29:38.429812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28245 22:29:38.430248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28247 22:29:38.465314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28249 22:29:38.466090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28250 22:29:38.499384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28252 22:29:38.500102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28253 22:29:38.537835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28254 22:29:38.538264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28256 22:29:38.587410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28257 22:29:38.587840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28259 22:29:38.622979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28260 22:29:38.623473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28262 22:29:38.658705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28264 22:29:38.659295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28265 22:29:38.710565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28266 22:29:38.710990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28268 22:29:38.747339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28270 22:29:38.747782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28271 22:29:38.786569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28272 22:29:38.787050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28274 22:29:38.824731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28275 22:29:38.825173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28277 22:29:38.862046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28278 22:29:38.862516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28280 22:29:38.910797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28282 22:29:38.911367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28283 22:29:38.960841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28284 22:29:38.961331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28286 22:29:39.008616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28287 22:29:39.009053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28289 22:29:39.054329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28290 22:29:39.054779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28292 22:29:39.100881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28293 22:29:39.101316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28295 22:29:39.139949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28297 22:29:39.140623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28298 22:29:39.183094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28300 22:29:39.183544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28301 22:29:39.229258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28302 22:29:39.229697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28304 22:29:39.285891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28305 22:29:39.286297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28307 22:29:39.325949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28309 22:29:39.326384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28310 22:29:39.382623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28312 22:29:39.382999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28313 22:29:39.419922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28315 22:29:39.420488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28316 22:29:39.460848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28318 22:29:39.461308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28319 22:29:39.497286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28320 22:29:39.497685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28322 22:29:39.534050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28324 22:29:39.534515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28325 22:29:39.570260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28327 22:29:39.570719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28328 22:29:39.607269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28330 22:29:39.607737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28331 22:29:39.645283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28333 22:29:39.646018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28334 22:29:39.682420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28335 22:29:39.682855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28337 22:29:39.721123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28339 22:29:39.721584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28340 22:29:39.758589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28341 22:29:39.759075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28343 22:29:39.797966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28344 22:29:39.798398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28346 22:29:39.839907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28348 22:29:39.840382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28349 22:29:39.878894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28350 22:29:39.879266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28352 22:29:39.917445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28353 22:29:39.917932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28355 22:29:39.956398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28356 22:29:39.956788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28358 22:29:39.994591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28360 22:29:39.995080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28361 22:29:40.053120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28362 22:29:40.053517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28364 22:29:40.093298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28365 22:29:40.093785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28367 22:29:40.134581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28368 22:29:40.135048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28370 22:29:40.178305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28372 22:29:40.178694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28373 22:29:40.218080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28375 22:29:40.218556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28376 22:29:40.257296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28377 22:29:40.257689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28379 22:29:40.301414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28381 22:29:40.301903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28382 22:29:40.346620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28384 22:29:40.347092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28385 22:29:40.393360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28386 22:29:40.393812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28388 22:29:40.442113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28390 22:29:40.442510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28391 22:29:40.480428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28392 22:29:40.480786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28394 22:29:40.517430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28396 22:29:40.517874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28397 22:29:40.553170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28398 22:29:40.553569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28400 22:29:40.589434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28401 22:29:40.589845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28403 22:29:40.629043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28404 22:29:40.629525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28406 22:29:40.667011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28407 22:29:40.667431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28409 22:29:40.705772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28410 22:29:40.706218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28412 22:29:40.743853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28414 22:29:40.744311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28415 22:29:40.781844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28417 22:29:40.782504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28418 22:29:40.824892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28419 22:29:40.825319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28421 22:29:40.862371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28422 22:29:40.862819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28424 22:29:40.900870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28426 22:29:40.901513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28427 22:29:40.945730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28428 22:29:40.946135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28430 22:29:40.996000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28432 22:29:40.996475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28433 22:29:41.034115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28435 22:29:41.034578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28436 22:29:41.073233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28437 22:29:41.073671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28439 22:29:41.111983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28441 22:29:41.112441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28442 22:29:41.149628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28443 22:29:41.150081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28445 22:29:41.186488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28446 22:29:41.186925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28448 22:29:41.223299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28449 22:29:41.223676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28451 22:29:41.260098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28453 22:29:41.260649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28454 22:29:41.310300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28455 22:29:41.310826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28457 22:29:41.356008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28459 22:29:41.356948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28460 22:29:41.397467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28461 22:29:41.397927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28463 22:29:41.439858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28465 22:29:41.440248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28466 22:29:41.477226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28467 22:29:41.477664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28469 22:29:41.514020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28471 22:29:41.514683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28472 22:29:41.559682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28473 22:29:41.560113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28475 22:29:41.598029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28476 22:29:41.598447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28478 22:29:41.634482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28480 22:29:41.634962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28481 22:29:41.670296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28482 22:29:41.670752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28484 22:29:41.711294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28485 22:29:41.711768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28487 22:29:41.749991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28488 22:29:41.750533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28490 22:29:41.793693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28492 22:29:41.794159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28493 22:29:41.840104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28495 22:29:41.840713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28496 22:29:41.877518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28497 22:29:41.878104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28499 22:29:41.914650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28500 22:29:41.915048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28502 22:29:41.951094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28504 22:29:41.951704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28505 22:29:41.985437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28507 22:29:41.985921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28508 22:29:42.020840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28510 22:29:42.021320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28511 22:29:42.056871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28512 22:29:42.057359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28514 22:29:42.093741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28515 22:29:42.094244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28517 22:29:42.129794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28519 22:29:42.130491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28520 22:29:42.165542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28521 22:29:42.165983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28523 22:29:42.202537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28525 22:29:42.202993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28526 22:29:42.239207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28527 22:29:42.239698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28529 22:29:42.273449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28530 22:29:42.273993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28532 22:29:42.309045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28534 22:29:42.309479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28535 22:29:42.346044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28537 22:29:42.346462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28538 22:29:42.394707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28539 22:29:42.395095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28541 22:29:42.449253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28543 22:29:42.449634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28544 22:29:42.493179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28545 22:29:42.493582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28547 22:29:42.543166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28548 22:29:42.543622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28550 22:29:42.587110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28551 22:29:42.587552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28553 22:29:42.623299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28554 22:29:42.623653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28556 22:29:42.662805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28557 22:29:42.663274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28559 22:29:42.701278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28560 22:29:42.701686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28562 22:29:42.737423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28563 22:29:42.737884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28565 22:29:42.786813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28566 22:29:42.787240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28568 22:29:42.843291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28569 22:29:42.843738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28571 22:29:42.891515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28572 22:29:42.891902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28574 22:29:42.944745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28575 22:29:42.945124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28577 22:29:43.022125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28578 22:29:43.022581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28580 22:29:43.057350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28582 22:29:43.058122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28583 22:29:43.102125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28584 22:29:43.102567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28586 22:29:43.150377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28587 22:29:43.150870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28589 22:29:43.193478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28590 22:29:43.193999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28592 22:29:43.249541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28593 22:29:43.249965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28595 22:29:43.287077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28596 22:29:43.287621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28598 22:29:43.323524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28599 22:29:43.323976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28601 22:29:43.371541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28603 22:29:43.372039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28604 22:29:43.410521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28605 22:29:43.410907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28607 22:29:43.457765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28609 22:29:43.458421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28610 22:29:43.499105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28612 22:29:43.499715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28613 22:29:43.535897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28614 22:29:43.536440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28616 22:29:43.572758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28617 22:29:43.573173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28619 22:29:43.612952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28620 22:29:43.613350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28622 22:29:43.649429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28624 22:29:43.649842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28625 22:29:43.689217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28626 22:29:43.689675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28628 22:29:43.725232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28629 22:29:43.725617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28631 22:29:43.777612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28633 22:29:43.778322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28634 22:29:43.833350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28636 22:29:43.833937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28637 22:29:43.874948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28638 22:29:43.875348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28640 22:29:43.914868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28641 22:29:43.915253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28643 22:29:43.951478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28645 22:29:43.951859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28646 22:29:43.994528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28647 22:29:43.994970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28649 22:29:44.039757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28651 22:29:44.040132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28652 22:29:44.097493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28653 22:29:44.097948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28655 22:29:44.145762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28656 22:29:44.146153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28658 22:29:44.190618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28660 22:29:44.191049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28661 22:29:44.246133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28662 22:29:44.246553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28664 22:29:44.289217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28666 22:29:44.289699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28667 22:29:44.329664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28669 22:29:44.330105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28670 22:29:44.369398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28671 22:29:44.369803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28673 22:29:44.416872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28674 22:29:44.417276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28676 22:29:44.453250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28678 22:29:44.453634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28679 22:29:44.493632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28681 22:29:44.494087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28682 22:29:44.534948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28684 22:29:44.535622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28685 22:29:44.570730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28686 22:29:44.571182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28688 22:29:44.606511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28690 22:29:44.606982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28691 22:29:44.641943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28693 22:29:44.642428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28694 22:29:44.681401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28696 22:29:44.681888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28697 22:29:44.719555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28699 22:29:44.720056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28700 22:29:44.754588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28702 22:29:44.754982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28703 22:29:44.789136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28704 22:29:44.789584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28706 22:29:44.824138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28708 22:29:44.824604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28709 22:29:44.858346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28711 22:29:44.858770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28712 22:29:44.892738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28713 22:29:44.893248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28715 22:29:44.934678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28716 22:29:44.935160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28718 22:29:44.967620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28719 22:29:44.968120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28721 22:29:45.002251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28722 22:29:45.002767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28724 22:29:45.043611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28726 22:29:45.044230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28727 22:29:45.078385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28728 22:29:45.078831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28730 22:29:45.112775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28731 22:29:45.113171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28733 22:29:45.148549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28735 22:29:45.149002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28736 22:29:45.183218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28737 22:29:45.183702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28739 22:29:45.218187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28740 22:29:45.218547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28742 22:29:45.253487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28744 22:29:45.254114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28745 22:29:45.288733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28746 22:29:45.289214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28748 22:29:45.324946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28749 22:29:45.325491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28751 22:29:45.366797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28752 22:29:45.367331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28754 22:29:45.409449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28755 22:29:45.409830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28757 22:29:45.455992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28759 22:29:45.456443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28760 22:29:45.501636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28762 22:29:45.502101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28763 22:29:45.539009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28764 22:29:45.539486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28766 22:29:45.591944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28768 22:29:45.592343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28769 22:29:45.637034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28770 22:29:45.637486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28772 22:29:45.673473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28773 22:29:45.673912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28775 22:29:45.709084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28777 22:29:45.709452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28778 22:29:45.754165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28779 22:29:45.754573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28781 22:29:45.791816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28783 22:29:45.792291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28784 22:29:45.829809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28785 22:29:45.830248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28787 22:29:45.883241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28788 22:29:45.883699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28790 22:29:45.921499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28791 22:29:45.922011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28793 22:29:45.965330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28795 22:29:45.965806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28796 22:29:46.005337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28797 22:29:46.005786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28799 22:29:46.046737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28800 22:29:46.047146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28802 22:29:46.093477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28804 22:29:46.094198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28805 22:29:46.135621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28806 22:29:46.136064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28808 22:29:46.170550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28809 22:29:46.170979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28811 22:29:46.204568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28812 22:29:46.205076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28814 22:29:46.239815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28816 22:29:46.240302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28817 22:29:46.276387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28819 22:29:46.276855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28820 22:29:46.317079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28821 22:29:46.317496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28823 22:29:46.366351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28825 22:29:46.366832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28826 22:29:46.406696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28827 22:29:46.407197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28829 22:29:46.448555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28830 22:29:46.449121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28832 22:29:46.486872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28834 22:29:46.487443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28835 22:29:46.527982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28837 22:29:46.528492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28838 22:29:46.563660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28839 22:29:46.564118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28841 22:29:46.600942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28843 22:29:46.601558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28844 22:29:46.638664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28845 22:29:46.639106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28847 22:29:46.674937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28848 22:29:46.675356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28850 22:29:46.709253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28852 22:29:46.709720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28853 22:29:46.746083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28854 22:29:46.746522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28856 22:29:46.786933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28857 22:29:46.787321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28859 22:29:46.823763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
28861 22:29:46.824263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
28862 22:29:46.862697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
28863 22:29:46.863167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
28865 22:29:46.913219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
28866 22:29:46.913667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
28868 22:29:46.951230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
28869 22:29:46.951650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
28871 22:29:46.989186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
28873 22:29:46.989633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
28874 22:29:47.034108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
28876 22:29:47.034528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
28877 22:29:47.069513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
28879 22:29:47.069986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
28880 22:29:47.106560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
28882 22:29:47.106947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
28883 22:29:47.150007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
28884 22:29:47.150455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
28886 22:29:47.206115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
28887 22:29:47.206528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
28889 22:29:47.256943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
28890 22:29:47.257465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
28892 22:29:47.302916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
28893 22:29:47.303474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
28895 22:29:47.352884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
28896 22:29:47.353256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
28898 22:29:47.401364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
28899 22:29:47.401795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
28901 22:29:47.446227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
28902 22:29:47.446663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
28904 22:29:47.485363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
28905 22:29:47.485784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
28907 22:29:47.525612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
28909 22:29:47.525972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
28910 22:29:47.562880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
28911 22:29:47.563300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
28913 22:29:47.600419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
28915 22:29:47.600842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
28916 22:29:47.639465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
28917 22:29:47.639872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
28919 22:29:47.675766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
28921 22:29:47.676196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
28922 22:29:47.711227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
28923 22:29:47.711794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
28925 22:29:47.748819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
28927 22:29:47.749274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
28928 22:29:47.788495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
28929 22:29:47.788920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
28931 22:29:47.830583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
28932 22:29:47.831021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
28934 22:29:47.872690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
28935 22:29:47.873108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
28937 22:29:47.918594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
28939 22:29:47.919015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
28940 22:29:47.960213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
28942 22:29:47.960946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
28943 22:29:48.003709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
28944 22:29:48.004118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
28946 22:29:48.044503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
28948 22:29:48.045249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
28949 22:29:48.080942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
28950 22:29:48.081346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
28952 22:29:48.147825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
28953 22:29:48.148328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
28955 22:29:48.205119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
28957 22:29:48.205720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
28958 22:29:48.259529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
28959 22:29:48.260012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
28961 22:29:48.299488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
28962 22:29:48.300467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
28964 22:29:48.341306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
28965 22:29:48.341786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
28967 22:29:48.378269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
28968 22:29:48.378707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
28970 22:29:48.416608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
28971 22:29:48.417047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
28973 22:29:48.452992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
28974 22:29:48.453463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
28976 22:29:48.490555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
28977 22:29:48.491040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
28979 22:29:48.526612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
28980 22:29:48.527090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
28982 22:29:48.566476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
28983 22:29:48.566867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
28985 22:29:48.606225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
28987 22:29:48.606612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
28988 22:29:48.642194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
28989 22:29:48.642623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
28991 22:29:48.679160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
28992 22:29:48.679670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
28994 22:29:48.722094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
28996 22:29:48.722730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
28997 22:29:48.767534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
28999 22:29:48.768013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29000 22:29:48.810339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29001 22:29:48.810795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29003 22:29:48.861797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29004 22:29:48.862259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29006 22:29:48.909122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29007 22:29:48.909556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29009 22:29:48.950386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29011 22:29:48.950767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29012 22:29:48.992039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29014 22:29:48.992474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29015 22:29:49.036241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29016 22:29:49.036636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29018 22:29:49.071169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29019 22:29:49.071559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29021 22:29:49.108104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29023 22:29:49.108534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29024 22:29:49.147498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29025 22:29:49.147900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29027 22:29:49.195687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29029 22:29:49.196271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29030 22:29:49.232728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29031 22:29:49.233161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29033 22:29:49.276844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29034 22:29:49.277283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29036 22:29:49.320639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29037 22:29:49.321085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29039 22:29:49.358610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29041 22:29:49.359074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29042 22:29:49.397517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29043 22:29:49.398049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29045 22:29:49.443303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29046 22:29:49.443711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29048 22:29:49.479387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29049 22:29:49.479825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29051 22:29:49.515145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29053 22:29:49.515594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29054 22:29:49.550078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29055 22:29:49.550525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29057 22:29:49.586110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29058 22:29:49.586552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29060 22:29:49.621827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29062 22:29:49.622299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29063 22:29:49.656911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29065 22:29:49.657365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29066 22:29:49.698516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29067 22:29:49.699088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29069 22:29:49.734303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29071 22:29:49.734723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29072 22:29:49.770263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29073 22:29:49.770671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29075 22:29:49.809599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29077 22:29:49.810378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29078 22:29:49.846347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29080 22:29:49.847041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29081 22:29:49.892624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29083 22:29:49.893334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29084 22:29:49.930798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29086 22:29:49.931457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29087 22:29:49.976896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29088 22:29:49.977445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29090 22:29:50.015298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29092 22:29:50.016047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29093 22:29:50.050914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29094 22:29:50.051352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29096 22:29:50.086905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29098 22:29:50.087367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29099 22:29:50.123799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29100 22:29:50.124233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29102 22:29:50.162343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29103 22:29:50.162771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29105 22:29:50.214647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29107 22:29:50.215118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29108 22:29:50.251170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29109 22:29:50.251602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29111 22:29:50.289404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29112 22:29:50.289843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29114 22:29:50.333768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29115 22:29:50.334213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29117 22:29:50.383401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29118 22:29:50.383835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29120 22:29:50.422171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29122 22:29:50.422661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29123 22:29:50.473449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29125 22:29:50.473874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29126 22:29:50.513215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29127 22:29:50.513677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29129 22:29:50.553444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29130 22:29:50.554023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29132 22:29:50.598731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29134 22:29:50.599187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29135 22:29:50.642209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29137 22:29:50.642631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29138 22:29:50.679203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29139 22:29:50.679636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29141 22:29:50.727625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29142 22:29:50.728085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29144 22:29:50.774404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29145 22:29:50.774966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29147 22:29:50.810951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29148 22:29:50.811393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29150 22:29:50.849104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29151 22:29:50.849537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29153 22:29:50.886341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29154 22:29:50.886904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29156 22:29:50.922464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29158 22:29:50.923050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29159 22:29:50.965047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29160 22:29:50.965432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29162 22:29:51.009601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29164 22:29:51.009987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29165 22:29:51.046875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29167 22:29:51.047343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29168 22:29:51.083878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29170 22:29:51.084356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29171 22:29:51.125618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29173 22:29:51.126092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29174 22:29:51.162178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29175 22:29:51.162628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29177 22:29:51.198524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29179 22:29:51.199001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29180 22:29:51.237420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29181 22:29:51.237861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29183 22:29:51.280548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29184 22:29:51.280962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29186 22:29:51.330816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29187 22:29:51.331194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29189 22:29:51.370303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29191 22:29:51.370723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29192 22:29:51.406847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29193 22:29:51.407299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29195 22:29:51.443969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29197 22:29:51.444412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29198 22:29:51.482533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29199 22:29:51.482981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29201 22:29:51.517915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29203 22:29:51.518382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29204 22:29:51.557775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29205 22:29:51.558209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29207 22:29:51.600222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29209 22:29:51.600659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29210 22:29:51.637854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29211 22:29:51.638310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29213 22:29:51.674660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29215 22:29:51.675076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29216 22:29:51.712933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29218 22:29:51.713645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29219 22:29:51.750316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29220 22:29:51.750709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29222 22:29:51.786189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29223 22:29:51.786631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29225 22:29:51.823869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29227 22:29:51.824381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29228 22:29:51.867378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29229 22:29:51.867836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29231 22:29:51.907240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29232 22:29:51.907717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29234 22:29:51.948968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29236 22:29:51.949529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29237 22:29:51.989716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29238 22:29:51.990133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29240 22:29:52.035461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29241 22:29:52.035870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29243 22:29:52.078232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29245 22:29:52.078617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29246 22:29:52.116095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29248 22:29:52.116535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29249 22:29:52.156242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29251 22:29:52.156734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29252 22:29:52.194042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29253 22:29:52.194475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29255 22:29:52.230637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29256 22:29:52.231026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29258 22:29:52.270699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29260 22:29:52.271164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29261 22:29:52.311926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29263 22:29:52.312437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29264 22:29:52.356926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29265 22:29:52.357368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29267 22:29:52.397933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29269 22:29:52.398630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29270 22:29:52.450494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29272 22:29:52.450909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29273 22:29:52.486099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29274 22:29:52.486542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29276 22:29:52.527074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29277 22:29:52.527583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29279 22:29:52.564009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29281 22:29:52.564725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29282 22:29:52.602643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29284 22:29:52.603336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29285 22:29:52.638349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29286 22:29:52.638757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29288 22:29:52.675216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29290 22:29:52.675697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29291 22:29:52.714141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29292 22:29:52.714561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29294 22:29:52.754132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29295 22:29:52.754570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29297 22:29:52.802805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29299 22:29:52.803246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29300 22:29:52.864097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29302 22:29:52.864529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29303 22:29:52.917291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29304 22:29:52.917694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29306 22:29:52.958462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29307 22:29:52.958912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29309 22:29:52.995353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29311 22:29:52.995830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29312 22:29:53.054263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29314 22:29:53.054744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29315 22:29:53.101151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29316 22:29:53.101684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29318 22:29:53.149722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29319 22:29:53.150153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29321 22:29:53.192814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29322 22:29:53.193274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29324 22:29:53.284913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29325 22:29:53.285400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29327 22:29:53.343890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29328 22:29:53.344448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29330 22:29:53.402344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29331 22:29:53.402844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29333 22:29:53.459448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29334 22:29:53.459899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29336 22:29:53.518984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29337 22:29:53.519395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29339 22:29:53.567687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29340 22:29:53.568195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29342 22:29:53.605431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29343 22:29:53.605930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29345 22:29:53.648585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29346 22:29:53.649026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29348 22:29:53.694280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29350 22:29:53.694775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29351 22:29:53.748293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29352 22:29:53.748695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29354 22:29:53.784419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29355 22:29:53.784868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29357 22:29:53.827564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29359 22:29:53.827968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29360 22:29:53.884406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29361 22:29:53.884850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29363 22:29:53.940724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29365 22:29:53.941220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29366 22:29:53.986388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29367 22:29:53.987241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29369 22:29:54.023312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29371 22:29:54.023746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29372 22:29:54.062501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29374 22:29:54.062970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29375 22:29:54.107391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29377 22:29:54.107811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29378 22:29:54.151134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29379 22:29:54.151634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29381 22:29:54.186811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29382 22:29:54.187255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29384 22:29:54.229370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29385 22:29:54.229741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29387 22:29:54.264816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29388 22:29:54.265194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29390 22:29:54.313542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29391 22:29:54.314052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29393 22:29:54.350983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29394 22:29:54.351563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29396 22:29:54.399238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29398 22:29:54.399843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29399 22:29:54.438731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29400 22:29:54.439153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29402 22:29:54.496715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29403 22:29:54.497167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29405 22:29:54.539324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29406 22:29:54.539765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29408 22:29:54.578309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29409 22:29:54.578700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29411 22:29:54.613314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29412 22:29:54.613896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29414 22:29:54.660502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29415 22:29:54.660928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29417 22:29:54.696857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29418 22:29:54.697289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29420 22:29:54.733890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29421 22:29:54.734388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29423 22:29:54.779436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29424 22:29:54.779851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29426 22:29:54.827993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29428 22:29:54.828462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29429 22:29:54.866076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29431 22:29:54.866553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29432 22:29:54.905492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29433 22:29:54.905956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29435 22:29:54.958698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29436 22:29:54.959083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29438 22:29:54.998436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29440 22:29:54.999002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29441 22:29:55.034421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29442 22:29:55.034837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29444 22:29:55.080856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29445 22:29:55.081265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29447 22:29:55.119629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29449 22:29:55.120409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29450 22:29:55.158430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29452 22:29:55.158803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29453 22:29:55.213293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29454 22:29:55.213740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29456 22:29:55.251896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29458 22:29:55.252357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29459 22:29:55.299031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29461 22:29:55.299638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29462 22:29:55.335315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29464 22:29:55.335918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29465 22:29:55.381344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29467 22:29:55.381735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29468 22:29:55.425163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29470 22:29:55.425582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29471 22:29:55.467178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29472 22:29:55.467641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29474 22:29:55.508573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29475 22:29:55.509035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29477 22:29:55.545079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29479 22:29:55.545456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29480 22:29:55.583691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29481 22:29:55.584072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29483 22:29:55.626454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29484 22:29:55.626892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29486 22:29:55.678829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29487 22:29:55.679334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29489 22:29:55.719744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29491 22:29:55.720321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29492 22:29:55.768813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29493 22:29:55.769254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29495 22:29:55.820050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29497 22:29:55.820703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29498 22:29:55.865751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29500 22:29:55.866386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29501 22:29:55.922427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29502 22:29:55.922982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29504 22:29:55.958703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29505 22:29:55.959248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29507 22:29:55.995653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29509 22:29:55.996357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29510 22:29:56.037403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29511 22:29:56.037976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29513 22:29:56.082580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29514 22:29:56.082976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29516 22:29:56.135154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29518 22:29:56.135552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29519 22:29:56.174117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29521 22:29:56.174787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29522 22:29:56.211553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29523 22:29:56.212002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29525 22:29:56.250183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29526 22:29:56.250577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29528 22:29:56.298087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29529 22:29:56.298531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29531 22:29:56.342935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29532 22:29:56.343347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29534 22:29:56.391943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29536 22:29:56.392396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29537 22:29:56.431560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29538 22:29:56.432019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29540 22:29:56.481747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29541 22:29:56.482302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29543 22:29:56.519196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29544 22:29:56.519630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29546 22:29:56.569443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29547 22:29:56.569966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29549 22:29:56.615190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29550 22:29:56.615647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29552 22:29:56.659494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29553 22:29:56.659884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29555 22:29:56.702923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29556 22:29:56.703379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29558 22:29:56.745529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29560 22:29:56.745966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29561 22:29:56.788463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29563 22:29:56.788838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29564 22:29:56.827481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29566 22:29:56.828167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29567 22:29:56.871611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29569 22:29:56.872040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29570 22:29:56.915352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29571 22:29:56.915789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29573 22:29:56.953715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29574 22:29:56.954146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29576 22:29:56.992520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29577 22:29:56.992947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29579 22:29:57.029596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29580 22:29:57.030047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29582 22:29:57.073220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29583 22:29:57.073662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29585 22:29:57.115480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29587 22:29:57.115965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29588 22:29:57.153295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29589 22:29:57.153747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29591 22:29:57.196931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29592 22:29:57.197365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29594 22:29:57.234485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29596 22:29:57.235058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29597 22:29:57.270621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29598 22:29:57.271188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29600 22:29:57.309699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29601 22:29:57.310157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29603 22:29:57.346284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29604 22:29:57.346713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29606 22:29:57.385971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29607 22:29:57.386405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29609 22:29:57.427187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29611 22:29:57.427617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29612 22:29:57.470951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29613 22:29:57.471378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29615 22:29:57.512828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29616 22:29:57.513263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29618 22:29:57.554363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29619 22:29:57.554778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29621 22:29:57.608384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29622 22:29:57.608808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29624 22:29:57.644910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29625 22:29:57.645351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29627 22:29:57.697543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29628 22:29:57.698002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29630 22:29:57.738975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29632 22:29:57.739446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29633 22:29:57.782132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29634 22:29:57.782537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29636 22:29:57.830204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29637 22:29:57.830620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29639 22:29:57.873501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29640 22:29:57.873970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29642 22:29:57.920045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29644 22:29:57.920552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29645 22:29:57.955355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29646 22:29:57.955783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29648 22:29:57.992016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29650 22:29:57.992390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29651 22:29:58.030467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29653 22:29:58.030890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29654 22:29:58.071465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29656 22:29:58.071956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29657 22:29:58.112840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29659 22:29:58.113384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29660 22:29:58.157566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29662 22:29:58.158264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29663 22:29:58.201312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29664 22:29:58.201741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29666 22:29:58.253884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29667 22:29:58.254334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29669 22:29:58.293960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29670 22:29:58.294393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29672 22:29:58.335213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29673 22:29:58.335621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29675 22:29:58.391136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29676 22:29:58.391579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29678 22:29:58.428273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29679 22:29:58.428725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29681 22:29:58.470606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29683 22:29:58.470990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29684 22:29:58.509552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29685 22:29:58.510055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29687 22:29:58.561001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29689 22:29:58.561413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29690 22:29:58.604944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29691 22:29:58.605515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29693 22:29:58.642731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29694 22:29:58.643215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29696 22:29:58.677935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29697 22:29:58.678390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29699 22:29:58.713149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29701 22:29:58.713569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29702 22:29:58.746784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29704 22:29:58.747253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29705 22:29:58.789722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29706 22:29:58.790153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29708 22:29:58.828642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29709 22:29:58.829035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29711 22:29:58.871106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29713 22:29:58.871589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29714 22:29:58.916901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29715 22:29:58.917283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29717 22:29:58.958837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29719 22:29:58.959271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29720 22:29:59.014663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29722 22:29:59.015045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29723 22:29:59.061872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29724 22:29:59.062373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29726 22:29:59.102497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29727 22:29:59.102877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29729 22:29:59.138230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29731 22:29:59.138709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29732 22:29:59.174283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29733 22:29:59.174708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29735 22:29:59.222309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29736 22:29:59.222738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29738 22:29:59.268734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29739 22:29:59.269192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29741 22:29:59.306577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29742 22:29:59.307036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29744 22:29:59.345352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29745 22:29:59.345762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29747 22:29:59.384818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29748 22:29:59.385258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29750 22:29:59.431628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29752 22:29:59.432109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29753 22:29:59.473958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29754 22:29:59.474401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29756 22:29:59.509271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29757 22:29:59.509694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29759 22:29:59.544513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29760 22:29:59.544896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29762 22:29:59.593668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29763 22:29:59.594087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29765 22:29:59.636810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29767 22:29:59.637551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29768 22:29:59.671495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29770 22:29:59.672113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29771 22:29:59.707149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29772 22:29:59.707690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29774 22:29:59.742163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29775 22:29:59.742590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29777 22:29:59.778114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29779 22:29:59.778738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29780 22:29:59.815262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29781 22:29:59.815843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29783 22:29:59.863449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29784 22:29:59.864014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29786 22:29:59.902596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29787 22:29:59.903061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29789 22:29:59.936495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29790 22:29:59.936957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29792 22:29:59.978548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29793 22:29:59.979026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29795 22:30:00.017621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29796 22:30:00.018060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29798 22:30:00.054549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29799 22:30:00.054969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29801 22:30:00.093970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29802 22:30:00.094359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29804 22:30:00.131825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29806 22:30:00.132543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29807 22:30:00.174735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29808 22:30:00.175099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29810 22:30:00.216916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29812 22:30:00.217389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29813 22:30:00.259331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29815 22:30:00.259802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29816 22:30:00.314733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29818 22:30:00.315154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29819 22:30:00.371585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29820 22:30:00.372028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29822 22:30:00.409329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29823 22:30:00.409685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29825 22:30:00.448145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29827 22:30:00.448677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29828 22:30:00.495341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29829 22:30:00.495743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29831 22:30:00.535651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29832 22:30:00.536066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29834 22:30:00.573163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29835 22:30:00.573662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29837 22:30:00.609918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29838 22:30:00.610371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29840 22:30:00.650771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29842 22:30:00.651415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29843 22:30:00.689086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29845 22:30:00.689695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29846 22:30:00.726308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29847 22:30:00.726857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29849 22:30:00.761201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29850 22:30:00.761692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29852 22:30:00.795119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29853 22:30:00.795536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29855 22:30:00.830934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29856 22:30:00.831326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29858 22:30:00.880839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29859 22:30:00.881227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
29861 22:30:00.918480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
29862 22:30:00.918933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
29864 22:30:00.956504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
29865 22:30:00.956989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
29867 22:30:00.994413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
29868 22:30:00.994836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
29870 22:30:01.030485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
29871 22:30:01.030926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
29873 22:30:01.075188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
29874 22:30:01.075591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
29876 22:30:01.118739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
29877 22:30:01.119153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
29879 22:30:01.166499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
29880 22:30:01.166902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
29882 22:30:01.205870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
29883 22:30:01.206292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
29885 22:30:01.244480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
29887 22:30:01.244973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
29888 22:30:01.283367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
29889 22:30:01.283823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
29891 22:30:01.324566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
29892 22:30:01.324964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
29894 22:30:01.375177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
29895 22:30:01.375565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
29897 22:30:01.413987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
29899 22:30:01.414490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
29900 22:30:01.452071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
29902 22:30:01.452539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
29903 22:30:01.503047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
29904 22:30:01.503439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
29906 22:30:01.546340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
29907 22:30:01.546847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
29909 22:30:01.593985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
29911 22:30:01.594499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
29912 22:30:01.648938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
29913 22:30:01.649380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
29915 22:30:01.695165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
29916 22:30:01.695552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
29918 22:30:01.738026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
29920 22:30:01.738435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
29921 22:30:01.775794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
29922 22:30:01.776275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
29924 22:30:01.814022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
29926 22:30:01.814529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
29927 22:30:01.850167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
29928 22:30:01.850620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
29930 22:30:01.892233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
29932 22:30:01.892714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
29933 22:30:01.930971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
29934 22:30:01.931381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
29936 22:30:01.973683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
29937 22:30:01.974054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
29939 22:30:02.011948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
29941 22:30:02.012745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
29942 22:30:02.055813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
29944 22:30:02.056252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
29945 22:30:02.096281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
29946 22:30:02.096671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
29948 22:30:02.139378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
29949 22:30:02.139922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
29951 22:30:02.176921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
29952 22:30:02.177360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
29954 22:30:02.225112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
29955 22:30:02.225463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
29957 22:30:02.266167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
29958 22:30:02.266579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
29960 22:30:02.304740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
29961 22:30:02.305190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
29963 22:30:02.353433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
29964 22:30:02.353899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
29966 22:30:02.394633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
29967 22:30:02.395045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
29969 22:30:02.437632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
29971 22:30:02.438118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
29972 22:30:02.472484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
29974 22:30:02.472988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
29975 22:30:02.515694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
29977 22:30:02.516200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
29978 22:30:02.564113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
29979 22:30:02.564514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
29981 22:30:02.601372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
29983 22:30:02.601888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
29984 22:30:02.648877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
29986 22:30:02.649267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
29987 22:30:02.703462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
29988 22:30:02.703865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
29990 22:30:02.749144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
29991 22:30:02.749544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
29993 22:30:02.798077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
29994 22:30:02.798529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
29996 22:30:02.840088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
29998 22:30:02.840614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
29999 22:30:02.880944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30001 22:30:02.881380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30002 22:30:02.920986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30003 22:30:02.921418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30005 22:30:02.963190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30006 22:30:02.963594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30008 22:30:03.013126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30009 22:30:03.013554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30011 22:30:03.063149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30012 22:30:03.063579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30014 22:30:03.098398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30015 22:30:03.098799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30017 22:30:03.131454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30018 22:30:03.131847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30020 22:30:03.170757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30021 22:30:03.171180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30023 22:30:03.209270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30024 22:30:03.209717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30026 22:30:03.246830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30027 22:30:03.247277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30029 22:30:03.287315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30030 22:30:03.287781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30032 22:30:03.326598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30034 22:30:03.326988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30035 22:30:03.365186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30036 22:30:03.365595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30038 22:30:03.409407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30040 22:30:03.410165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30041 22:30:03.469897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30043 22:30:03.470380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30044 22:30:03.517022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30045 22:30:03.517536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30047 22:30:03.551619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30048 22:30:03.551998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30050 22:30:03.585398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30052 22:30:03.585917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30053 22:30:03.619263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30054 22:30:03.619775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30056 22:30:03.653269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30057 22:30:03.653666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30059 22:30:03.697782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30061 22:30:03.698199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30062 22:30:03.745120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30063 22:30:03.745511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30065 22:30:03.791371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30066 22:30:03.791760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30068 22:30:03.830380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30070 22:30:03.831081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30071 22:30:03.875501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30072 22:30:03.875917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30074 22:30:03.930717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30076 22:30:03.931297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30077 22:30:03.976889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30078 22:30:03.977269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30080 22:30:04.026296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30081 22:30:04.026859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30083 22:30:04.073509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30085 22:30:04.074167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30086 22:30:04.113507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30087 22:30:04.113900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30089 22:30:04.147044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30090 22:30:04.147553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30092 22:30:04.183283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30093 22:30:04.183709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30095 22:30:04.226302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30097 22:30:04.226771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30098 22:30:04.263544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30100 22:30:04.264040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30101 22:30:04.301383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30103 22:30:04.301915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30104 22:30:04.338697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30106 22:30:04.339077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30107 22:30:04.377186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30108 22:30:04.377586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30110 22:30:04.413530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30111 22:30:04.413931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30113 22:30:04.448905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30114 22:30:04.449294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30116 22:30:04.485045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30118 22:30:04.485680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30119 22:30:04.523397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30120 22:30:04.523761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30122 22:30:04.577117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30124 22:30:04.577540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30125 22:30:04.619230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30127 22:30:04.619708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30128 22:30:04.661546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30129 22:30:04.662021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30131 22:30:04.702142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30132 22:30:04.702567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30134 22:30:04.740994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30136 22:30:04.741456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30137 22:30:04.782303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30138 22:30:04.782815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30140 22:30:04.820941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30142 22:30:04.821403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30143 22:30:04.858253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30144 22:30:04.858639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30146 22:30:04.895976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30148 22:30:04.896409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30149 22:30:04.936445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30150 22:30:04.936906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30152 22:30:04.974345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30154 22:30:04.974746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30155 22:30:05.025916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30157 22:30:05.026415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30158 22:30:05.064922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30159 22:30:05.065305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30161 22:30:05.107342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30162 22:30:05.107802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30164 22:30:05.143984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30166 22:30:05.144399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30167 22:30:05.184952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30168 22:30:05.185440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30170 22:30:05.222451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30172 22:30:05.222941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30173 22:30:05.264705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30174 22:30:05.265286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30176 22:30:05.303022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30177 22:30:05.303430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30179 22:30:05.346518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30180 22:30:05.346975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30182 22:30:05.389653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30184 22:30:05.390154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30185 22:30:05.433541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30186 22:30:05.433982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30188 22:30:05.481717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30189 22:30:05.482166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30191 22:30:05.526929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30192 22:30:05.527366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30194 22:30:05.571106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30195 22:30:05.571552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30197 22:30:05.610653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30198 22:30:05.611050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30200 22:30:05.649725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30201 22:30:05.650174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30203 22:30:05.694079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30204 22:30:05.694505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30206 22:30:05.736110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30208 22:30:05.736645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30209 22:30:05.785342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30210 22:30:05.785771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30212 22:30:05.827432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30213 22:30:05.827899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30215 22:30:05.868786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30217 22:30:05.869283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30218 22:30:05.919575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30219 22:30:05.919982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30221 22:30:05.974514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30223 22:30:05.974993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30224 22:30:06.029250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30225 22:30:06.029694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30227 22:30:06.071691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30229 22:30:06.072076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30230 22:30:06.118670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30231 22:30:06.119089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30233 22:30:06.159292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30234 22:30:06.159721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30236 22:30:06.200064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30238 22:30:06.200525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30239 22:30:06.258507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30240 22:30:06.258951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30242 22:30:06.317730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30243 22:30:06.318165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30245 22:30:06.375225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30246 22:30:06.375585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30248 22:30:06.434634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30249 22:30:06.435154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30251 22:30:06.490562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30252 22:30:06.491014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30254 22:30:06.531062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30255 22:30:06.531445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30257 22:30:06.568690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30259 22:30:06.569170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30260 22:30:06.603810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30261 22:30:06.604244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30263 22:30:06.639916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30265 22:30:06.640394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30266 22:30:06.677724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30267 22:30:06.678183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30269 22:30:06.713789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30271 22:30:06.714424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30272 22:30:06.753816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30273 22:30:06.754254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30275 22:30:06.794264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30276 22:30:06.794695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30278 22:30:06.836646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30279 22:30:06.837070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30281 22:30:06.878560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30283 22:30:06.879044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30284 22:30:06.921557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30286 22:30:06.922066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30287 22:30:06.962252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30289 22:30:06.962683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30290 22:30:07.012940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30291 22:30:07.013386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30293 22:30:07.061017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30295 22:30:07.061460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30296 22:30:07.098226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30297 22:30:07.098671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30299 22:30:07.143665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30301 22:30:07.144171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30302 22:30:07.186969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30303 22:30:07.187413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30305 22:30:07.241538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30306 22:30:07.241973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30308 22:30:07.289785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30309 22:30:07.290248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30311 22:30:07.343112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30312 22:30:07.343551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30314 22:30:07.390230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30316 22:30:07.390678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30317 22:30:07.441976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30318 22:30:07.442420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30320 22:30:07.490838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30322 22:30:07.491328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30323 22:30:07.535754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30324 22:30:07.536149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30326 22:30:07.593119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30328 22:30:07.593557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30329 22:30:07.638344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30330 22:30:07.638789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30332 22:30:07.695831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30334 22:30:07.696290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30335 22:30:07.741748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30336 22:30:07.742163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30338 22:30:07.786052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30339 22:30:07.786493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30341 22:30:07.839509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30342 22:30:07.839945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30344 22:30:07.887674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30345 22:30:07.888130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30347 22:30:07.937891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30348 22:30:07.938337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30350 22:30:07.982963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30351 22:30:07.983407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30353 22:30:08.024325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30354 22:30:08.024732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30356 22:30:08.069196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30357 22:30:08.069618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30359 22:30:08.122225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30360 22:30:08.122683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30362 22:30:08.176761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30363 22:30:08.177215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30365 22:30:08.225211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30366 22:30:08.225669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30368 22:30:08.272636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30369 22:30:08.273106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30371 22:30:08.310655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30372 22:30:08.311072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30374 22:30:08.357412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30375 22:30:08.357816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30377 22:30:08.410154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30379 22:30:08.410597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30380 22:30:08.458620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30381 22:30:08.459011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30383 22:30:08.499591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30385 22:30:08.500078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30386 22:30:08.556954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30387 22:30:08.557401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30389 22:30:08.634827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30390 22:30:08.635287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30392 22:30:08.693309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30393 22:30:08.693741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30395 22:30:08.741894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30396 22:30:08.742300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30398 22:30:08.789369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30399 22:30:08.789819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30401 22:30:08.833259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30402 22:30:08.834146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30404 22:30:08.890162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30405 22:30:08.890605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30407 22:30:08.949725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30408 22:30:08.950289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30410 22:30:09.006216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30412 22:30:09.006681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30413 22:30:09.058153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30414 22:30:09.058564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30416 22:30:09.103104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30417 22:30:09.103507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30419 22:30:09.147229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30420 22:30:09.147590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30422 22:30:09.188970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30423 22:30:09.189368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30425 22:30:09.229776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30427 22:30:09.230287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30428 22:30:09.274555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30429 22:30:09.274958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30431 22:30:09.321689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30432 22:30:09.323028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30434 22:30:09.376803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30435 22:30:09.377271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30437 22:30:09.421529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30438 22:30:09.421981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30440 22:30:09.465962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30442 22:30:09.466497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30443 22:30:09.521816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30444 22:30:09.522297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30446 22:30:09.567059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30447 22:30:09.567507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30449 22:30:09.616433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30450 22:30:09.616863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30452 22:30:09.658468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30453 22:30:09.658920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30455 22:30:09.718168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30456 22:30:09.718599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30458 22:30:09.765400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30459 22:30:09.765808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30461 22:30:09.813336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30462 22:30:09.813870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30464 22:30:09.865683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30465 22:30:09.866190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30467 22:30:09.915345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30468 22:30:09.915823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30470 22:30:09.962987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30471 22:30:09.963458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30473 22:30:10.007153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30474 22:30:10.007620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30476 22:30:10.067015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30477 22:30:10.067421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30479 22:30:10.115469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30481 22:30:10.115948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30482 22:30:10.161450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30483 22:30:10.161942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30485 22:30:10.217299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30486 22:30:10.217786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30488 22:30:10.270141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30489 22:30:10.270544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30491 22:30:10.323233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30493 22:30:10.323716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30494 22:30:10.373244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30495 22:30:10.373685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30497 22:30:10.423547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30499 22:30:10.424029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30500 22:30:10.468396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30501 22:30:10.468854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30503 22:30:10.516267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30504 22:30:10.516736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30506 22:30:10.572767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30507 22:30:10.573213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30509 22:30:10.624174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30511 22:30:10.624729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30512 22:30:10.674118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30513 22:30:10.674533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30515 22:30:10.718565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30517 22:30:10.719050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30518 22:30:10.774807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30519 22:30:10.775225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30521 22:30:10.814549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30522 22:30:10.814983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30524 22:30:10.861192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30525 22:30:10.861573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30527 22:30:10.906717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30528 22:30:10.907170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30530 22:30:10.962320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30531 22:30:10.962725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30533 22:30:11.014015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30534 22:30:11.014480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30536 22:30:11.059749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30537 22:30:11.060194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30539 22:30:11.105364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30540 22:30:11.105836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30542 22:30:11.148532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30543 22:30:11.148933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30545 22:30:11.189993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30546 22:30:11.190460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30548 22:30:11.231541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30549 22:30:11.231985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30551 22:30:11.278446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30552 22:30:11.278910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30554 22:30:11.323011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30555 22:30:11.323438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30557 22:30:11.365214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30558 22:30:11.365695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30560 22:30:11.412722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30562 22:30:11.413235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30563 22:30:11.458320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30564 22:30:11.458777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30566 22:30:11.509671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30567 22:30:11.510100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30569 22:30:11.553567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30570 22:30:11.554005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30572 22:30:11.609991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30573 22:30:11.610448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30575 22:30:11.661547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30576 22:30:11.662022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30578 22:30:11.722212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30579 22:30:11.722624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30581 22:30:11.782166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30582 22:30:11.782582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30584 22:30:11.844689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30585 22:30:11.845105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30587 22:30:11.907871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30589 22:30:11.908384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30590 22:30:11.961262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30591 22:30:11.961686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30593 22:30:12.013503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30595 22:30:12.014005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30596 22:30:12.070376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30598 22:30:12.070872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30599 22:30:12.118835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30601 22:30:12.119196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30602 22:30:12.169463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30603 22:30:12.169941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30605 22:30:12.218222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30606 22:30:12.218612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30608 22:30:12.224124 <47>[ 375.897687] systemd-journald[109]: Sent WATCHDOG=1 notification.
30609 22:30:12.281217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30610 22:30:12.281707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30612 22:30:12.339010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30613 22:30:12.339471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30615 22:30:12.401344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30616 22:30:12.401776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30618 22:30:12.458274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30619 22:30:12.458729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30621 22:30:12.506132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30622 22:30:12.506526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30624 22:30:12.543373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30626 22:30:12.543871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30627 22:30:12.588299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30628 22:30:12.588703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30630 22:30:12.631316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30631 22:30:12.631773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30633 22:30:12.685014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30634 22:30:12.685465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30636 22:30:12.732870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30637 22:30:12.733310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30639 22:30:12.775026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30640 22:30:12.775468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30642 22:30:12.814872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30643 22:30:12.815226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30645 22:30:12.867617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30647 22:30:12.868083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30648 22:30:12.918781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30649 22:30:12.919234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30651 22:30:12.964894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30652 22:30:12.965306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30654 22:30:13.014960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30655 22:30:13.015345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30657 22:30:13.064698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30658 22:30:13.065145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30660 22:30:13.115516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30661 22:30:13.115951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30663 22:30:13.166810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30664 22:30:13.167277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30666 22:30:13.226169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30667 22:30:13.226583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30669 22:30:13.289316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30670 22:30:13.289843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30672 22:30:13.338043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30673 22:30:13.338478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30675 22:30:13.383359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30676 22:30:13.383791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30678 22:30:13.431533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30679 22:30:13.431977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30681 22:30:13.485996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30682 22:30:13.486447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30684 22:30:13.537669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30685 22:30:13.538127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30687 22:30:13.588916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30688 22:30:13.589361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30690 22:30:13.639653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30691 22:30:13.640110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30693 22:30:13.710048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30694 22:30:13.710489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30696 22:30:13.758906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30697 22:30:13.759339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30699 22:30:13.797294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30700 22:30:13.797687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30702 22:30:13.835600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30704 22:30:13.836087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30705 22:30:13.881150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30706 22:30:13.881597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30708 22:30:13.928756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30710 22:30:13.929629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30711 22:30:13.980414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30712 22:30:13.980837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30714 22:30:14.026919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30715 22:30:14.027370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30717 22:30:14.081526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30719 22:30:14.081934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30720 22:30:14.125784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30721 22:30:14.126216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30723 22:30:14.187130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30724 22:30:14.187574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30726 22:30:14.243316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30728 22:30:14.244117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30729 22:30:14.287118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30730 22:30:14.287567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30732 22:30:14.343414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30734 22:30:14.343897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30735 22:30:14.390745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30737 22:30:14.391238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30738 22:30:14.441322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30739 22:30:14.441783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30741 22:30:14.489410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30742 22:30:14.489858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30744 22:30:14.532676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30745 22:30:14.533103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30747 22:30:14.576517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30748 22:30:14.576963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30750 22:30:14.618039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30751 22:30:14.618501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30753 22:30:14.659066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30755 22:30:14.659552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30756 22:30:14.706398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30758 22:30:14.706898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30759 22:30:14.755876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30761 22:30:14.756447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30762 22:30:14.803477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30764 22:30:14.805885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30765 22:30:14.843144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30766 22:30:14.843591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30768 22:30:14.881525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30769 22:30:14.881982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30771 22:30:14.931994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30772 22:30:14.932431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30774 22:30:14.977928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30776 22:30:14.978405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30777 22:30:15.018087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30778 22:30:15.018511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30780 22:30:15.058228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30781 22:30:15.058658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30783 22:30:15.101150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30784 22:30:15.101551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30786 22:30:15.139032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30788 22:30:15.139492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30789 22:30:15.177831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30790 22:30:15.178230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30792 22:30:15.218014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30793 22:30:15.218559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30795 22:30:15.259166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30796 22:30:15.259576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30798 22:30:15.300771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30799 22:30:15.301211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30801 22:30:15.349543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30802 22:30:15.349955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30804 22:30:15.387548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30805 22:30:15.387988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30807 22:30:15.431996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30809 22:30:15.432466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30810 22:30:15.479799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30811 22:30:15.480246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30813 22:30:15.538294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30814 22:30:15.538737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30816 22:30:15.597982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30817 22:30:15.598404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30819 22:30:15.638863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30821 22:30:15.639324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30822 22:30:15.680199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30824 22:30:15.680676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30825 22:30:15.720110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30827 22:30:15.720655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30828 22:30:15.762340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30829 22:30:15.762790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30831 22:30:15.804939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30832 22:30:15.805386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30834 22:30:15.858334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30835 22:30:15.858770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30837 22:30:15.919672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30839 22:30:15.920098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30840 22:30:15.975728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30841 22:30:15.976163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30843 22:30:16.021860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30844 22:30:16.022323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30846 22:30:16.075411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30848 22:30:16.075908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30849 22:30:16.118009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30850 22:30:16.118436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30852 22:30:16.159537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30854 22:30:16.160012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30855 22:30:16.200512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30856 22:30:16.200964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30858 22:30:16.240340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30859 22:30:16.240798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30861 22:30:16.282282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
30862 22:30:16.282720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
30864 22:30:16.325158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
30865 22:30:16.325620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
30867 22:30:16.365301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
30869 22:30:16.365690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
30870 22:30:16.405557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
30872 22:30:16.406058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
30873 22:30:16.447174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
30875 22:30:16.447655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
30876 22:30:16.490073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
30877 22:30:16.490520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
30879 22:30:16.530897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
30880 22:30:16.531327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
30882 22:30:16.571648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
30884 22:30:16.572124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
30885 22:30:16.613354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
30887 22:30:16.613985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
30888 22:30:16.654625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
30889 22:30:16.655011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
30891 22:30:16.695460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
30892 22:30:16.695897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
30894 22:30:16.734861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
30895 22:30:16.735301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
30897 22:30:16.775019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
30899 22:30:16.775422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
30900 22:30:16.814498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
30902 22:30:16.814963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
30903 22:30:16.854747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
30904 22:30:16.855196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
30906 22:30:16.896054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
30908 22:30:16.896542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
30909 22:30:16.937597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
30910 22:30:16.938038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
30912 22:30:16.979273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
30914 22:30:16.979756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
30915 22:30:17.020760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
30916 22:30:17.021183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
30918 22:30:17.062289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
30919 22:30:17.062726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
30921 22:30:17.102661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
30923 22:30:17.103138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
30924 22:30:17.145263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
30925 22:30:17.145674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
30927 22:30:17.206536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
30928 22:30:17.206982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
30930 22:30:17.263661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
30931 22:30:17.264107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
30933 22:30:17.303733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
30935 22:30:17.304215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
30936 22:30:17.343349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
30938 22:30:17.343828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
30939 22:30:17.381602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
30940 22:30:17.382059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
30942 22:30:17.422369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
30943 22:30:17.422783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
30945 22:30:17.461130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
30947 22:30:17.461604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
30948 22:30:17.499193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
30950 22:30:17.499659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
30951 22:30:17.536530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
30952 22:30:17.536967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
30954 22:30:17.573616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
30956 22:30:17.574045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
30957 22:30:17.619975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
30959 22:30:17.620465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
30960 22:30:17.663584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
30961 22:30:17.663999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
30963 22:30:17.699366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
30964 22:30:17.699781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
30966 22:30:17.750248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
30967 22:30:17.750689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
30969 22:30:17.800909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
30970 22:30:17.801465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
30972 22:30:17.849035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
30973 22:30:17.849569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
30975 22:30:17.895126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
30977 22:30:17.895608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
30978 22:30:17.936093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
30980 22:30:17.936607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
30981 22:30:17.994956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
30983 22:30:17.995327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
30984 22:30:18.034879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
30985 22:30:18.035275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
30987 22:30:18.075433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
30988 22:30:18.075874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
30990 22:30:18.114347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
30991 22:30:18.114793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
30993 22:30:18.160055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
30995 22:30:18.160704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
30996 22:30:18.216194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
30998 22:30:18.216630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
30999 22:30:18.273480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31000 22:30:18.273926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31002 22:30:18.311818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31004 22:30:18.312574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31005 22:30:18.358686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31007 22:30:18.359287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31008 22:30:18.404919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31009 22:30:18.405349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31011 22:30:18.445133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31013 22:30:18.445622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31014 22:30:18.505382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31015 22:30:18.505822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31017 22:30:18.553372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31018 22:30:18.553920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31020 22:30:18.592016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31022 22:30:18.592602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31023 22:30:18.630483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31025 22:30:18.630974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31026 22:30:18.669546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31027 22:30:18.669975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31029 22:30:18.706750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31030 22:30:18.707194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31032 22:30:18.744018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31034 22:30:18.744704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31035 22:30:18.781802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31037 22:30:18.782373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31038 22:30:18.837599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31040 22:30:18.838167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31041 22:30:18.878639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31042 22:30:18.879098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31044 22:30:18.930263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31046 22:30:18.930738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31047 22:30:18.975556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31048 22:30:18.975973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31050 22:30:19.023764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31051 22:30:19.024204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31053 22:30:19.079499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31055 22:30:19.079982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31056 22:30:19.135372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31057 22:30:19.135824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31059 22:30:19.185983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31060 22:30:19.186504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31062 22:30:19.241585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31063 22:30:19.242050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31065 22:30:19.289805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31067 22:30:19.290248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31068 22:30:19.335210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31069 22:30:19.335646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31071 22:30:19.374179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31073 22:30:19.374532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31074 22:30:19.413457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31075 22:30:19.413873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31077 22:30:19.453853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31078 22:30:19.454254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31080 22:30:19.495249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31081 22:30:19.495600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31083 22:30:19.544604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31084 22:30:19.544961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31086 22:30:19.582514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31087 22:30:19.582929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31089 22:30:19.620777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31090 22:30:19.621178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31092 22:30:19.659979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31094 22:30:19.660336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31095 22:30:19.699917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31097 22:30:19.700401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31098 22:30:19.748910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31099 22:30:19.749280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31101 22:30:19.791946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31103 22:30:19.792272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31104 22:30:19.831076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31106 22:30:19.831425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31107 22:30:19.869792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31108 22:30:19.870240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31110 22:30:19.908573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31111 22:30:19.908950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31113 22:30:19.953063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31115 22:30:19.953349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31116 22:30:19.991364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31118 22:30:19.991718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31119 22:30:20.029566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31121 22:30:20.030151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31122 22:30:20.066787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31123 22:30:20.067215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31125 22:30:20.105264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31126 22:30:20.105705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31128 22:30:20.145374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31130 22:30:20.145851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31131 22:30:20.185102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31132 22:30:20.185549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31134 22:30:20.223631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31136 22:30:20.224117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31137 22:30:20.267619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31138 22:30:20.268045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31140 22:30:20.306305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31141 22:30:20.306734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31143 22:30:20.345390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31144 22:30:20.345774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31146 22:30:20.386630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31148 22:30:20.387099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31149 22:30:20.433468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31150 22:30:20.433958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31152 22:30:20.473988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31153 22:30:20.474298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31155 22:30:20.526742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31157 22:30:20.527233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31158 22:30:20.573576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31159 22:30:20.574032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31161 22:30:20.610739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31162 22:30:20.611161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31164 22:30:20.656512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31165 22:30:20.656957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31167 22:30:20.695595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31168 22:30:20.696054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31170 22:30:20.733062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31172 22:30:20.733414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31173 22:30:20.777006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31174 22:30:20.777369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31176 22:30:20.814710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31177 22:30:20.815229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31179 22:30:20.857974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31181 22:30:20.858364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31182 22:30:20.897474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31184 22:30:20.897892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31185 22:30:20.937266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31187 22:30:20.937740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31188 22:30:20.978726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31189 22:30:20.979047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31191 22:30:21.023086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31192 22:30:21.023389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31194 22:30:21.059683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31195 22:30:21.060148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31197 22:30:21.096118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31199 22:30:21.096547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31200 22:30:21.135240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31201 22:30:21.135633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31203 22:30:21.175428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31204 22:30:21.175836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31206 22:30:21.211322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31208 22:30:21.211713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31209 22:30:21.250749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31210 22:30:21.251168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31212 22:30:21.291119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31214 22:30:21.291899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31215 22:30:21.335570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31216 22:30:21.336080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31218 22:30:21.375837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31220 22:30:21.376315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31221 22:30:21.416370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31222 22:30:21.416877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31224 22:30:21.457280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31225 22:30:21.457691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31227 22:30:21.498018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31228 22:30:21.498481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31230 22:30:21.533353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31231 22:30:21.533807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31233 22:30:21.568480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31234 22:30:21.568925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31236 22:30:21.603096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31237 22:30:21.603558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31239 22:30:21.636459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31240 22:30:21.636908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31242 22:30:21.677055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31243 22:30:21.677580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31245 22:30:21.716886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31247 22:30:21.717410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31248 22:30:21.758779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31249 22:30:21.759287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31251 22:30:21.793883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31252 22:30:21.794275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31254 22:30:21.829987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31256 22:30:21.830658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31257 22:30:21.869276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31258 22:30:21.869853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31260 22:30:21.905414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31261 22:30:21.905860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31263 22:30:21.952068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31265 22:30:21.952473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31266 22:30:22.002163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31267 22:30:22.002509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31269 22:30:22.054102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31271 22:30:22.054604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31272 22:30:22.104011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31274 22:30:22.104613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31275 22:30:22.148830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31277 22:30:22.149397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31278 22:30:22.198215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31279 22:30:22.198766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31281 22:30:22.239446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31283 22:30:22.239927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31284 22:30:22.285426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31285 22:30:22.286019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31287 22:30:22.330319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31288 22:30:22.330812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31290 22:30:22.365346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31291 22:30:22.365847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31293 22:30:22.407090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31294 22:30:22.407545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31296 22:30:22.443582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31297 22:30:22.444093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31299 22:30:22.481283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31301 22:30:22.482065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31302 22:30:22.516654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31303 22:30:22.517055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31305 22:30:22.551818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31307 22:30:22.552370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31308 22:30:22.590538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31309 22:30:22.590977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31311 22:30:22.629973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31312 22:30:22.630409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31314 22:30:22.660805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31315 22:30:22.661237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31317 22:30:22.696647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31318 22:30:22.697071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31320 22:30:22.738180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31321 22:30:22.738601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31323 22:30:22.777352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31325 22:30:22.777819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31326 22:30:22.811583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31328 22:30:22.811949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31329 22:30:22.861476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31330 22:30:22.861878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31332 22:30:22.900498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31333 22:30:22.900905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31335 22:30:22.943357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31336 22:30:22.943791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31338 22:30:22.989806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31339 22:30:22.990243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31341 22:30:23.033622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31342 22:30:23.034025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31344 22:30:23.079259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31345 22:30:23.079642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31347 22:30:23.125482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31349 22:30:23.125964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31350 22:30:23.159989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31352 22:30:23.160460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31353 22:30:23.193928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31354 22:30:23.194324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31356 22:30:23.229865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31357 22:30:23.230275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31359 22:30:23.265249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31360 22:30:23.265659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31362 22:30:23.309664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31364 22:30:23.310063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31365 22:30:23.345901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31366 22:30:23.346453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31368 22:30:23.383232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31369 22:30:23.383679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31371 22:30:23.419233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31373 22:30:23.419887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31374 22:30:23.455417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31376 22:30:23.455837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31377 22:30:23.494869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31379 22:30:23.495572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31380 22:30:23.530082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31382 22:30:23.530550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31383 22:30:23.564954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31384 22:30:23.565376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31386 22:30:23.600062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31388 22:30:23.600818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31389 22:30:23.635516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31390 22:30:23.636037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31392 22:30:23.680751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31394 22:30:23.681353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31395 22:30:23.736676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31397 22:30:23.737073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31398 22:30:23.774637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31400 22:30:23.775196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31401 22:30:23.814087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31402 22:30:23.814506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31404 22:30:23.853909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31405 22:30:23.854315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31407 22:30:23.912016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31409 22:30:23.912490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31410 22:30:23.986927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31412 22:30:23.987385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31413 22:30:24.033281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31414 22:30:24.033695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31416 22:30:24.079649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31418 22:30:24.080122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31419 22:30:24.124536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31420 22:30:24.124974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31422 22:30:24.157404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31423 22:30:24.157870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31425 22:30:24.191137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31426 22:30:24.191568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31428 22:30:24.225071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31429 22:30:24.225669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31431 22:30:24.261443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31433 22:30:24.261874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31434 22:30:24.299993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31436 22:30:24.300584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31437 22:30:24.335177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31439 22:30:24.335748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31440 22:30:24.369382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31442 22:30:24.369807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31443 22:30:24.403371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31445 22:30:24.403839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31446 22:30:24.438412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31447 22:30:24.438847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31449 22:30:24.472497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31451 22:30:24.473073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31452 22:30:24.513792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31453 22:30:24.514221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31455 22:30:24.549090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31457 22:30:24.549603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31458 22:30:24.584245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31459 22:30:24.584697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31461 22:30:24.618103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31463 22:30:24.618858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31464 22:30:24.651660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31465 22:30:24.652060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31467 22:30:24.685876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31469 22:30:24.686642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31470 22:30:24.721315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31471 22:30:24.721690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31473 22:30:24.757192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31474 22:30:24.757687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31476 22:30:24.794345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31478 22:30:24.794730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31479 22:30:24.835351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31480 22:30:24.835717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31482 22:30:24.870751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31483 22:30:24.871254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31485 22:30:24.906441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31486 22:30:24.906922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31488 22:30:24.945108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31489 22:30:24.945532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31491 22:30:24.983283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31493 22:30:24.983678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31494 22:30:25.024818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31496 22:30:25.025225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31497 22:30:25.063638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31498 22:30:25.064069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31500 22:30:25.114453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31501 22:30:25.114902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31503 22:30:25.153089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31505 22:30:25.153550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31506 22:30:25.199409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31508 22:30:25.199789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31509 22:30:25.253639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31510 22:30:25.254089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31512 22:30:25.296832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31513 22:30:25.297292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31515 22:30:25.335896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31517 22:30:25.336321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31518 22:30:25.370644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31519 22:30:25.371075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31521 22:30:25.404544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31522 22:30:25.404990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31524 22:30:25.440910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31526 22:30:25.441392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31527 22:30:25.476669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31528 22:30:25.477048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31530 22:30:25.511448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31532 22:30:25.512060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31533 22:30:25.550795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31534 22:30:25.551172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31536 22:30:25.585418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31537 22:30:25.585937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31539 22:30:25.621099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31540 22:30:25.621677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31542 22:30:25.661928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31544 22:30:25.662580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31545 22:30:25.704541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31546 22:30:25.705106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31548 22:30:25.745047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31550 22:30:25.745516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31551 22:30:25.779650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31553 22:30:25.780126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31554 22:30:25.818320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31556 22:30:25.819066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31557 22:30:25.860306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31558 22:30:25.860737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31560 22:30:25.897401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31561 22:30:25.897859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31563 22:30:25.933785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31564 22:30:25.934240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31566 22:30:25.974851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31567 22:30:25.975267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31569 22:30:26.020887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31570 22:30:26.021398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31572 22:30:26.057441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31573 22:30:26.057936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31575 22:30:26.101690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31576 22:30:26.102247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31578 22:30:26.142292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31579 22:30:26.142832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31581 22:30:26.186309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31582 22:30:26.186787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31584 22:30:26.241514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31586 22:30:26.242239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31587 22:30:26.285970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31588 22:30:26.286500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31590 22:30:26.324928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31591 22:30:26.325372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31593 22:30:26.365343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31595 22:30:26.366027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31596 22:30:26.401173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31598 22:30:26.401782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31599 22:30:26.445722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31600 22:30:26.446182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31602 22:30:26.483375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31604 22:30:26.484123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31605 22:30:26.522696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31606 22:30:26.523107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31608 22:30:26.558315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31609 22:30:26.558815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31611 22:30:26.594715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31612 22:30:26.595237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31614 22:30:26.629137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31615 22:30:26.629669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31617 22:30:26.673801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31618 22:30:26.674274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31620 22:30:26.720901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31622 22:30:26.721282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31623 22:30:26.769086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31625 22:30:26.769573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31626 22:30:26.817153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31628 22:30:26.817640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31629 22:30:26.857486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31630 22:30:26.857928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31632 22:30:26.900542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31633 22:30:26.901003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31635 22:30:26.942221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31636 22:30:26.942661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31638 22:30:26.994023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31639 22:30:26.994541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31641 22:30:27.039921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31642 22:30:27.040348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31644 22:30:27.078692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31645 22:30:27.079079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31647 22:30:27.116986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31648 22:30:27.117561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31650 22:30:27.155029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31652 22:30:27.155651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31653 22:30:27.195791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31655 22:30:27.196284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31656 22:30:27.239393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31658 22:30:27.239879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31659 22:30:27.279581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31660 22:30:27.280029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31662 22:30:27.320684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31664 22:30:27.321145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31665 22:30:27.359339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31666 22:30:27.359908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31668 22:30:27.398663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31669 22:30:27.399093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31671 22:30:27.437737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31673 22:30:27.438537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31674 22:30:27.480773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31676 22:30:27.481275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31677 22:30:27.525711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31678 22:30:27.526332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31680 22:30:27.570239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31682 22:30:27.570710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31683 22:30:27.613143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31684 22:30:27.613639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31686 22:30:27.654003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31688 22:30:27.654428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31689 22:30:27.694785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31690 22:30:27.695211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31692 22:30:27.738400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31694 22:30:27.738855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31695 22:30:27.791955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31697 22:30:27.792626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31698 22:30:27.827868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31700 22:30:27.828343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31701 22:30:27.866083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31702 22:30:27.866525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31704 22:30:27.907612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31705 22:30:27.908063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31707 22:30:27.950636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31708 22:30:27.951211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31710 22:30:27.991049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31711 22:30:27.991501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31713 22:30:28.035124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31714 22:30:28.035531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31716 22:30:28.087909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31718 22:30:28.088407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31719 22:30:28.141827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31721 22:30:28.142315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31722 22:30:28.186319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31723 22:30:28.186682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31725 22:30:28.243983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31727 22:30:28.244370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31728 22:30:28.287033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31729 22:30:28.287447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31731 22:30:28.326674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31732 22:30:28.327084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31734 22:30:28.366672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31735 22:30:28.367152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31737 22:30:28.405170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31739 22:30:28.405627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31740 22:30:28.442954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31741 22:30:28.443392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31743 22:30:28.481491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31745 22:30:28.481966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31746 22:30:28.528060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31748 22:30:28.528834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31749 22:30:28.573088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31750 22:30:28.573528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31752 22:30:28.614743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31754 22:30:28.615230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31755 22:30:28.651986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31757 22:30:28.652453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31758 22:30:28.688789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31760 22:30:28.689202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31761 22:30:28.729431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31762 22:30:28.729943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31764 22:30:28.766112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31766 22:30:28.766732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31767 22:30:28.801295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31768 22:30:28.801762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31770 22:30:28.837531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31772 22:30:28.837993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31773 22:30:28.880370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31774 22:30:28.880970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31776 22:30:28.923423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31777 22:30:28.924013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31779 22:30:28.971935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31781 22:30:28.972324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31782 22:30:29.015672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31783 22:30:29.016228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31785 22:30:29.069823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31787 22:30:29.070304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31788 22:30:29.120375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31789 22:30:29.120778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31791 22:30:29.157404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31793 22:30:29.157888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31794 22:30:29.198403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31795 22:30:29.198826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31797 22:30:29.241197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31799 22:30:29.241675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31800 22:30:29.280076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31802 22:30:29.280492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31803 22:30:29.320547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31805 22:30:29.321031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31806 22:30:29.358207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31807 22:30:29.358642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31809 22:30:29.395004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31810 22:30:29.395506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31812 22:30:29.433063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31813 22:30:29.433494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31815 22:30:29.472679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31816 22:30:29.473123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31818 22:30:29.511078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31820 22:30:29.511557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31821 22:30:29.550223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31822 22:30:29.550729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31824 22:30:29.593570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31825 22:30:29.594137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31827 22:30:29.631687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31829 22:30:29.632521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31830 22:30:29.678470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31832 22:30:29.679151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31833 22:30:29.722683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31834 22:30:29.723126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31836 22:30:29.762025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31838 22:30:29.762504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31839 22:30:29.801983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31841 22:30:29.802439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31842 22:30:29.842590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31843 22:30:29.843014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31845 22:30:29.885888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31847 22:30:29.886366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31848 22:30:29.926144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31850 22:30:29.926697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31851 22:30:29.972539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31853 22:30:29.973019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31854 22:30:30.009522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31855 22:30:30.010014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31857 22:30:30.057956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31858 22:30:30.058527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31860 22:30:30.098966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31861 22:30:30.099400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
31863 22:30:30.136648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
31864 22:30:30.137079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
31866 22:30:30.175203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
31868 22:30:30.175667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
31869 22:30:30.212978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
31870 22:30:30.213538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
31872 22:30:30.249769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
31873 22:30:30.250352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
31875 22:30:30.289751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
31876 22:30:30.290336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
31878 22:30:30.331703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
31880 22:30:30.332141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
31881 22:30:30.383271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
31883 22:30:30.383852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
31884 22:30:30.434981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
31886 22:30:30.435714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
31887 22:30:30.486841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
31888 22:30:30.487334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
31890 22:30:30.537446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
31892 22:30:30.538095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
31893 22:30:30.582633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
31894 22:30:30.583063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
31896 22:30:30.636842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
31898 22:30:30.637453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
31899 22:30:30.691284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
31900 22:30:30.691734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
31902 22:30:30.735230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
31903 22:30:30.735684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
31905 22:30:30.770170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
31906 22:30:30.770630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
31908 22:30:30.804386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
31909 22:30:30.804864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
31911 22:30:30.845224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
31912 22:30:30.845677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
31914 22:30:30.889728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
31916 22:30:30.890377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
31917 22:30:30.932003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
31919 22:30:30.932749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
31920 22:30:30.967203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
31921 22:30:30.967672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
31923 22:30:31.002204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
31924 22:30:31.002677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
31926 22:30:31.037237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
31927 22:30:31.037711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
31929 22:30:31.072057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
31931 22:30:31.072720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
31932 22:30:31.108563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
31933 22:30:31.109026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
31935 22:30:31.145209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
31937 22:30:31.145797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
31938 22:30:31.181852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
31939 22:30:31.182353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
31941 22:30:31.217571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
31942 22:30:31.218073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
31944 22:30:31.253246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
31946 22:30:31.253845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
31947 22:30:31.288683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
31949 22:30:31.289401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
31950 22:30:31.323934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
31952 22:30:31.324498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
31953 22:30:31.359568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
31955 22:30:31.360316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
31956 22:30:31.395926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
31958 22:30:31.396265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
31959 22:30:31.429274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
31961 22:30:31.429835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
31962 22:30:31.462888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
31963 22:30:31.463290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
31965 22:30:31.496814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
31967 22:30:31.497289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
31968 22:30:31.535515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
31969 22:30:31.535951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
31971 22:30:31.579047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
31973 22:30:31.579446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
31974 22:30:31.621036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
31975 22:30:31.621522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
31977 22:30:31.660791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
31978 22:30:31.661324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
31980 22:30:31.698947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
31981 22:30:31.699512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
31983 22:30:31.741120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
31985 22:30:31.741715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
31986 22:30:31.776103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
31988 22:30:31.776878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
31989 22:30:31.809981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
31990 22:30:31.810438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
31992 22:30:31.846265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
31993 22:30:31.846694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
31995 22:30:31.880134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
31997 22:30:31.880598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
31998 22:30:31.913931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32000 22:30:31.914397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32001 22:30:31.946783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32002 22:30:31.947168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32004 22:30:31.982440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32006 22:30:31.982816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32007 22:30:32.017306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32009 22:30:32.017869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32010 22:30:32.050937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32011 22:30:32.051384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32013 22:30:32.085678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32014 22:30:32.086141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32016 22:30:32.118472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32017 22:30:32.118939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32019 22:30:32.151953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32021 22:30:32.152612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32022 22:30:32.185109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32023 22:30:32.185594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32025 22:30:32.219890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32027 22:30:32.220339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32028 22:30:32.254182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32030 22:30:32.254818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32031 22:30:32.286631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32032 22:30:32.287090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32034 22:30:32.319242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32036 22:30:32.319858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32037 22:30:32.353632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32038 22:30:32.354133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32040 22:30:32.388594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32041 22:30:32.389063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32043 22:30:32.424800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32044 22:30:32.425209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32046 22:30:32.458384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32048 22:30:32.458847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32049 22:30:32.491637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32050 22:30:32.492092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32052 22:30:32.524826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32053 22:30:32.525285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32055 22:30:32.558237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32057 22:30:32.558851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32058 22:30:32.593087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32059 22:30:32.593542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32061 22:30:32.625983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32062 22:30:32.626445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32064 22:30:32.659366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32065 22:30:32.659823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32067 22:30:32.693208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32069 22:30:32.693780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32070 22:30:32.726235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32071 22:30:32.726699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32073 22:30:32.759258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32074 22:30:32.759714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32076 22:30:32.792587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32077 22:30:32.793064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32079 22:30:32.825527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32080 22:30:32.826116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32082 22:30:32.860924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32084 22:30:32.861581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32085 22:30:32.895523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32087 22:30:32.895978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32088 22:30:32.931721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32089 22:30:32.932150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32091 22:30:32.967192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32093 22:30:32.967637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32094 22:30:33.000343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32095 22:30:33.000736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32097 22:30:33.033018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32098 22:30:33.033449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32100 22:30:33.065228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32101 22:30:33.065660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32103 22:30:33.098205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32105 22:30:33.098643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32106 22:30:33.130569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32107 22:30:33.130977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32109 22:30:33.164857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32111 22:30:33.165308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32112 22:30:33.197950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32113 22:30:33.198341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32115 22:30:33.232361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32117 22:30:33.232975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32118 22:30:33.265343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32120 22:30:33.265985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32121 22:30:33.298165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32123 22:30:33.298563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32124 22:30:33.330855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32125 22:30:33.331329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32127 22:30:33.362996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32129 22:30:33.363264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32130 22:30:33.394549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32131 22:30:33.394821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32133 22:30:33.426176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32134 22:30:33.426530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32136 22:30:33.457500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32137 22:30:33.457871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32139 22:30:33.489158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32140 22:30:33.489511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32142 22:30:33.520578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32143 22:30:33.520924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32145 22:30:33.552470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32146 22:30:33.552814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32148 22:30:33.583575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32149 22:30:33.583931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32151 22:30:33.614838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32152 22:30:33.615201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32154 22:30:33.645941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32155 22:30:33.646297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32157 22:30:33.677447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32158 22:30:33.677794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32160 22:30:33.708644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32162 22:30:33.709071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32163 22:30:33.740903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32165 22:30:33.741338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32166 22:30:33.772644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32167 22:30:33.773121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32169 22:30:33.803540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32171 22:30:33.803987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32172 22:30:33.835249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32174 22:30:33.835683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32175 22:30:33.866702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32176 22:30:33.867046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32178 22:30:33.899201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32179 22:30:33.899550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32181 22:30:33.931604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32182 22:30:33.932069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32184 22:30:33.964534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32186 22:30:33.965088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32187 22:30:33.995792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32189 22:30:33.996362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32190 22:30:34.027413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32191 22:30:34.027910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32193 22:30:34.060035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32195 22:30:34.060582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32196 22:30:34.095180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32197 22:30:34.095618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32199 22:30:34.128068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32201 22:30:34.128529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32202 22:30:34.159846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32204 22:30:34.160274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32205 22:30:34.209662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32206 22:30:34.210127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32208 22:30:34.241274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32209 22:30:34.241686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32211 22:30:34.273335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32212 22:30:34.273789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32214 22:30:34.305245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32216 22:30:34.305824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32217 22:30:34.336901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32219 22:30:34.337440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32220 22:30:34.369003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32222 22:30:34.369552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32223 22:30:34.401210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32225 22:30:34.401662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32226 22:30:34.433576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32227 22:30:34.434066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32229 22:30:34.466138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32230 22:30:34.466593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32232 22:30:34.498611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32233 22:30:34.499078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32235 22:30:34.532500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32237 22:30:34.533072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32238 22:30:34.565596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32239 22:30:34.566104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32241 22:30:34.602201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32243 22:30:34.602798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32244 22:30:34.635582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32245 22:30:34.635985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32247 22:30:34.668407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32248 22:30:34.668772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32250 22:30:34.700789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32251 22:30:34.701263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32253 22:30:34.733310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32254 22:30:34.733771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32256 22:30:34.765138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32257 22:30:34.765586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32259 22:30:34.798234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32261 22:30:34.798796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32262 22:30:34.830628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32263 22:30:34.831084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32265 22:30:34.862875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32267 22:30:34.863448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32268 22:30:34.894942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32270 22:30:34.895489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32271 22:30:34.926905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32272 22:30:34.927384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32274 22:30:34.958591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32276 22:30:34.959208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32277 22:30:34.989865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32278 22:30:34.990341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32280 22:30:35.022767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32281 22:30:35.023228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32283 22:30:35.054167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32284 22:30:35.054495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32286 22:30:35.085557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32287 22:30:35.085892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32289 22:30:35.117109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32290 22:30:35.117445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32292 22:30:35.149068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32293 22:30:35.149389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32295 22:30:35.181712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32296 22:30:35.182159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32298 22:30:35.214238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32299 22:30:35.214582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32301 22:30:35.246434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32302 22:30:35.246840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32304 22:30:35.277686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32305 22:30:35.278031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32307 22:30:35.310097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32309 22:30:35.310541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32310 22:30:35.341870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32311 22:30:35.342312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32313 22:30:35.375828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32315 22:30:35.376280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32316 22:30:35.408626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32317 22:30:35.409007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32319 22:30:35.441012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32320 22:30:35.441386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32322 22:30:35.473241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32323 22:30:35.473656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32325 22:30:35.506227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32326 22:30:35.506607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32328 22:30:35.539403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32329 22:30:35.539792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32331 22:30:35.571254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32332 22:30:35.571689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32334 22:30:35.604795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32335 22:30:35.605206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32337 22:30:35.639228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32338 22:30:35.639628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32340 22:30:35.673644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32341 22:30:35.674074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32343 22:30:35.708755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32344 22:30:35.709141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32346 22:30:35.741568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32347 22:30:35.742054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32349 22:30:35.773613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32350 22:30:35.774070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32352 22:30:35.806203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32353 22:30:35.806655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32355 22:30:35.838878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32356 22:30:35.839346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32358 22:30:35.872110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32360 22:30:35.872683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32361 22:30:35.905680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32362 22:30:35.906159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32364 22:30:35.938163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32365 22:30:35.938626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32367 22:30:35.969824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32368 22:30:35.970280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32370 22:30:36.001369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32371 22:30:36.001835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32373 22:30:36.033876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32374 22:30:36.034282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32376 22:30:36.066382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32377 22:30:36.066830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32379 22:30:36.098376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32380 22:30:36.098837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32382 22:30:36.131330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32384 22:30:36.131902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32385 22:30:36.164456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32386 22:30:36.164814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32388 22:30:36.196468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32389 22:30:36.196820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32391 22:30:36.228963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32392 22:30:36.229423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32394 22:30:36.261494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32395 22:30:36.261971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32397 22:30:36.293972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32398 22:30:36.294433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32400 22:30:36.326543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32401 22:30:36.326958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32403 22:30:36.358884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32404 22:30:36.359291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32406 22:30:36.391129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32408 22:30:36.391784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32409 22:30:36.422850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32411 22:30:36.423485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32412 22:30:36.453773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32413 22:30:36.454221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32415 22:30:36.485952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32416 22:30:36.486309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32418 22:30:36.517871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32419 22:30:36.518238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32421 22:30:36.551170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32422 22:30:36.551521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32424 22:30:36.583723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32426 22:30:36.584157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32427 22:30:36.616533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32428 22:30:36.616994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32430 22:30:36.649347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32431 22:30:36.649802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32433 22:30:36.684082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32435 22:30:36.684655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32436 22:30:36.716967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32437 22:30:36.717417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32439 22:30:36.749271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32440 22:30:36.749680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32442 22:30:36.781503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32444 22:30:36.781809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32445 22:30:36.813582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32446 22:30:36.813987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32448 22:30:36.846262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32449 22:30:36.846741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32451 22:30:36.878714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32452 22:30:36.879141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32454 22:30:36.911169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32455 22:30:36.911542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32457 22:30:36.943299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32458 22:30:36.943674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32460 22:30:36.975450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32461 22:30:36.975899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32463 22:30:37.008132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32465 22:30:37.008688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32466 22:30:37.040601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32467 22:30:37.040981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32469 22:30:37.073124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32470 22:30:37.073473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32472 22:30:37.105368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32474 22:30:37.105680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32475 22:30:37.137281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32476 22:30:37.137747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32478 22:30:37.169525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32479 22:30:37.169973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32481 22:30:37.201790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32483 22:30:37.202303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32484 22:30:37.233225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32486 22:30:37.233792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32487 22:30:37.264788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32488 22:30:37.265240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32490 22:30:37.296243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32491 22:30:37.296671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32493 22:30:37.327081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32495 22:30:37.327608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32496 22:30:37.358795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32498 22:30:37.359329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32499 22:30:37.390055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32501 22:30:37.390581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32502 22:30:37.422638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32503 22:30:37.423108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32505 22:30:37.454421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32506 22:30:37.454887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32508 22:30:37.486398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32509 22:30:37.486857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32511 22:30:37.518564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32512 22:30:37.519020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32514 22:30:37.549999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32515 22:30:37.550347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32517 22:30:37.583655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32518 22:30:37.584113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32520 22:30:37.616771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32521 22:30:37.617230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32523 22:30:37.649156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32525 22:30:37.649756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32526 22:30:37.681232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32527 22:30:37.681702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32529 22:30:37.713225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32530 22:30:37.713686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32532 22:30:37.750425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32533 22:30:37.750884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32535 22:30:37.795677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32536 22:30:37.796272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32538 22:30:37.833822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32539 22:30:37.834163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32541 22:30:37.869300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32543 22:30:37.869600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32544 22:30:37.904497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32546 22:30:37.904967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32547 22:30:37.946707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32548 22:30:37.947064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32550 22:30:37.984715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32551 22:30:37.985073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32553 22:30:38.016738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32555 22:30:38.017286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32556 22:30:38.048404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32557 22:30:38.048836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32559 22:30:38.079516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32560 22:30:38.079864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32562 22:30:38.111861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32564 22:30:38.112179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32565 22:30:38.144285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32566 22:30:38.144583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32568 22:30:38.176282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32569 22:30:38.176670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32571 22:30:38.208041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32573 22:30:38.208488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32574 22:30:38.240683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32575 22:30:38.241039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32577 22:30:38.273523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32578 22:30:38.273895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32580 22:30:38.305450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32581 22:30:38.305820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32583 22:30:38.337618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32584 22:30:38.338103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32586 22:30:38.369050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32587 22:30:38.369416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32589 22:30:38.401068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32591 22:30:38.401723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32592 22:30:38.433072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32593 22:30:38.433542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32595 22:30:38.465226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32597 22:30:38.465829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32598 22:30:38.499217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32599 22:30:38.499683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32601 22:30:38.531151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32602 22:30:38.531623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32604 22:30:38.563922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32606 22:30:38.564475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32607 22:30:38.596436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32609 22:30:38.597007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32610 22:30:38.628127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32612 22:30:38.628512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32613 22:30:38.661804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32614 22:30:38.662203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32616 22:30:38.694070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32617 22:30:38.694519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32619 22:30:38.726071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32621 22:30:38.726678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32622 22:30:38.757998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32623 22:30:38.758434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32625 22:30:38.790418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32626 22:30:38.790853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32628 22:30:38.822161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32629 22:30:38.822569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32631 22:30:38.853875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32632 22:30:38.854184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32634 22:30:38.885737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32635 22:30:38.886009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32637 22:30:38.917519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32638 22:30:38.917883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32640 22:30:38.950725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32641 22:30:38.951179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32643 22:30:38.983047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32644 22:30:38.983513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32646 22:30:39.016986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32647 22:30:39.017418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32649 22:30:39.051190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32650 22:30:39.051624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32652 22:30:39.086451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32653 22:30:39.086800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32655 22:30:39.121092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32656 22:30:39.121454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32658 22:30:39.153654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32659 22:30:39.154064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32661 22:30:39.186249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32662 22:30:39.186658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32664 22:30:39.218793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32665 22:30:39.219178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32667 22:30:39.250902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32668 22:30:39.251297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32670 22:30:39.283331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32671 22:30:39.283744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32673 22:30:39.331701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32674 22:30:39.332170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32676 22:30:39.363418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32677 22:30:39.363782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32679 22:30:39.395219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32681 22:30:39.395662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32682 22:30:39.426453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32683 22:30:39.426820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32685 22:30:39.458024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32687 22:30:39.458338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32688 22:30:39.489366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32689 22:30:39.489658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32691 22:30:39.521120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32692 22:30:39.521474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32694 22:30:39.553613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32695 22:30:39.553989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32697 22:30:39.587235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32698 22:30:39.587611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32700 22:30:39.619259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32701 22:30:39.619602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32703 22:30:39.650938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32704 22:30:39.651287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32706 22:30:39.684023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32708 22:30:39.684575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32709 22:30:39.715653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32711 22:30:39.716154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32712 22:30:39.746908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32714 22:30:39.747416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32715 22:30:39.777931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32717 22:30:39.778365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32718 22:30:39.809232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32719 22:30:39.809704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32721 22:30:39.840695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32723 22:30:39.841203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32724 22:30:39.871727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32726 22:30:39.872154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32727 22:30:39.902684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32728 22:30:39.903032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32730 22:30:39.934029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32731 22:30:39.934384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32733 22:30:39.965000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32734 22:30:39.965366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32736 22:30:39.999674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32737 22:30:40.000029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32739 22:30:40.032412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32740 22:30:40.032808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32742 22:30:40.065017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32743 22:30:40.065445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32745 22:30:40.096978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32746 22:30:40.097353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32748 22:30:40.134240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32750 22:30:40.134823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32751 22:30:40.168564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32753 22:30:40.168962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32754 22:30:40.201134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32755 22:30:40.201535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32757 22:30:40.233573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32758 22:30:40.233985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32760 22:30:40.270038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32761 22:30:40.270470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32763 22:30:40.303955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32765 22:30:40.304445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32766 22:30:40.339855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32768 22:30:40.340456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32769 22:30:40.375753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32770 22:30:40.376161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32772 22:30:40.410729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32773 22:30:40.411228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32775 22:30:40.445617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32777 22:30:40.446068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32778 22:30:40.478821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32780 22:30:40.479250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32781 22:30:40.510476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32782 22:30:40.510888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32784 22:30:40.543237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32786 22:30:40.543694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32787 22:30:40.575130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32788 22:30:40.575541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32790 22:30:40.608877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32792 22:30:40.609316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32793 22:30:40.642526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32794 22:30:40.643008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32796 22:30:40.674105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32797 22:30:40.674590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32799 22:30:40.706435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32801 22:30:40.707073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32802 22:30:40.739366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32804 22:30:40.739783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32805 22:30:40.772365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32806 22:30:40.772755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32808 22:30:40.803878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32810 22:30:40.804465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32811 22:30:40.835460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32812 22:30:40.835934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32814 22:30:40.867163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32816 22:30:40.867598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32817 22:30:40.899178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32818 22:30:40.899595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32820 22:30:40.931764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32821 22:30:40.932192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32823 22:30:40.963582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32824 22:30:40.964013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32826 22:30:40.995149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32827 22:30:40.995562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32829 22:30:41.027034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32830 22:30:41.027503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32832 22:30:41.058461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32833 22:30:41.058928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32835 22:30:41.091607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32836 22:30:41.092107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32838 22:30:41.126625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32839 22:30:41.127025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32841 22:30:41.158211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32842 22:30:41.158674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32844 22:30:41.189686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32846 22:30:41.190213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32847 22:30:41.221143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32849 22:30:41.221700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32850 22:30:41.252408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32851 22:30:41.252849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32853 22:30:41.283914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32855 22:30:41.284554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32856 22:30:41.316401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32857 22:30:41.316888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32859 22:30:41.349413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
32861 22:30:41.349770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32862 22:30:41.381568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
32863 22:30:41.381868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
32865 22:30:41.413874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
32867 22:30:41.414273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
32868 22:30:41.445069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
32869 22:30:41.445470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
32871 22:30:41.477274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
32873 22:30:41.477730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
32874 22:30:41.510984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
32875 22:30:41.511401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
32877 22:30:41.542570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
32878 22:30:41.542977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
32880 22:30:41.574219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
32881 22:30:41.574625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
32883 22:30:41.606276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
32884 22:30:41.606742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
32886 22:30:41.638613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
32887 22:30:41.639089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
32889 22:30:41.670186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
32891 22:30:41.670732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
32892 22:30:41.701874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
32893 22:30:41.702281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
32895 22:30:41.733495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
32896 22:30:41.733868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
32898 22:30:41.764757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
32900 22:30:41.765302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
32901 22:30:41.797400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
32903 22:30:41.798023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
32904 22:30:41.829760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
32906 22:30:41.830225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
32907 22:30:41.861637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
32909 22:30:41.862085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
32910 22:30:41.893249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
32912 22:30:41.893691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
32913 22:30:41.925235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
32914 22:30:41.925604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
32916 22:30:41.957442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
32918 22:30:41.957997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
32919 22:30:41.989284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
32920 22:30:41.989666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
32922 22:30:42.021063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
32924 22:30:42.021515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
32925 22:30:42.053355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
32927 22:30:42.053876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
32928 22:30:42.085134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
32930 22:30:42.085579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
32931 22:30:42.116711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
32933 22:30:42.117175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
32934 22:30:42.149249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
32936 22:30:42.149701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
32937 22:30:42.180886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
32939 22:30:42.181327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
32940 22:30:42.214400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
32941 22:30:42.214799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
32943 22:30:42.246857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
32945 22:30:42.247403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
32946 22:30:42.281716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
32947 22:30:42.282137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
32949 22:30:42.317410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
32951 22:30:42.317806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
32952 22:30:42.350833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
32953 22:30:42.351118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
32955 22:30:42.383183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
32956 22:30:42.383568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
32958 22:30:42.416949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
32959 22:30:42.417433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
32961 22:30:42.451121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
32962 22:30:42.451576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
32964 22:30:42.484946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
32965 22:30:42.485366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
32967 22:30:42.517967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
32968 22:30:42.518422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
32970 22:30:42.550594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
32972 22:30:42.551012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
32973 22:30:42.583092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
32975 22:30:42.583390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
32976 22:30:42.616078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
32978 22:30:42.616891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
32979 22:30:42.650327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
32980 22:30:42.650716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
32982 22:30:42.684041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
32984 22:30:42.684513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
32985 22:30:42.717193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
32987 22:30:42.717845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
32988 22:30:42.750150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
32990 22:30:42.750599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
32991 22:30:42.783353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
32993 22:30:42.783853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
32994 22:30:42.819230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
32995 22:30:42.819645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
32997 22:30:42.853325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
32998 22:30:42.853744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33000 22:30:42.885670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33001 22:30:42.886028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33003 22:30:42.918285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33004 22:30:42.918643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33006 22:30:42.950701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33007 22:30:42.951119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33009 22:30:42.985549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33010 22:30:42.985887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33012 22:30:43.018002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33013 22:30:43.018356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33015 22:30:43.050291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33016 22:30:43.050662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33018 22:30:43.084727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33019 22:30:43.085077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33021 22:30:43.124293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33022 22:30:43.124578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33024 22:30:43.157035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33025 22:30:43.157317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33027 22:30:43.191433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33028 22:30:43.191716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33030 22:30:43.231362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33031 22:30:43.231728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33033 22:30:43.266121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33034 22:30:43.266615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33036 22:30:43.298854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33037 22:30:43.299313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33039 22:30:43.335057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33041 22:30:43.335637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33042 22:30:43.373441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33044 22:30:43.373853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33045 22:30:43.407633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33047 22:30:43.408130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33048 22:30:43.440422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33049 22:30:43.440849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33051 22:30:43.473905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33052 22:30:43.474343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33054 22:30:43.513192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33055 22:30:43.513671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33057 22:30:43.551039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33059 22:30:43.551589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33060 22:30:43.584595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33061 22:30:43.585022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33063 22:30:43.617448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33064 22:30:43.617909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33066 22:30:43.650687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33067 22:30:43.651118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33069 22:30:43.686961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33071 22:30:43.687397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33072 22:30:43.726734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33073 22:30:43.727203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33075 22:30:43.765205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33076 22:30:43.765711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33078 22:30:43.801878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33079 22:30:43.802418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33081 22:30:43.836965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33083 22:30:43.837608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33084 22:30:43.870033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33086 22:30:43.870667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33087 22:30:43.903352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33088 22:30:43.903824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33090 22:30:43.936080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33092 22:30:43.936748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33093 22:30:43.972836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33094 22:30:43.973268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33096 22:30:44.006792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33097 22:30:44.007222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33099 22:30:44.042116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33100 22:30:44.042628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33102 22:30:44.075610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33104 22:30:44.076253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33105 22:30:44.109098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33106 22:30:44.109582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33108 22:30:44.143890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33110 22:30:44.144277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33111 22:30:44.178260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33112 22:30:44.178677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33114 22:30:44.214086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33115 22:30:44.214469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33117 22:30:44.249763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33119 22:30:44.250215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33120 22:30:44.287355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33121 22:30:44.287772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33123 22:30:44.320838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33124 22:30:44.321271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33126 22:30:44.354146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33127 22:30:44.354544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33129 22:30:44.386440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33130 22:30:44.386747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33132 22:30:44.434223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33133 22:30:44.434618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33135 22:30:44.466962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33136 22:30:44.467436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33138 22:30:44.499482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33139 22:30:44.499919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33141 22:30:44.536395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33142 22:30:44.536787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33144 22:30:44.567990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33146 22:30:44.568339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33147 22:30:44.599191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33148 22:30:44.599516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33150 22:30:44.632379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33151 22:30:44.632865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33153 22:30:44.665270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33154 22:30:44.665583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33156 22:30:44.697758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33157 22:30:44.698114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33159 22:30:44.731183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33161 22:30:44.731800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33162 22:30:44.763247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33163 22:30:44.763628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33165 22:30:44.795237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33166 22:30:44.795609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33168 22:30:44.826706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33169 22:30:44.826995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33171 22:30:44.858510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33172 22:30:44.858795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33174 22:30:44.892789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33176 22:30:44.893276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33177 22:30:44.926353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33178 22:30:44.926726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33180 22:30:44.958785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33181 22:30:44.959148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33183 22:30:44.990565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33184 22:30:44.991026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33186 22:30:45.022002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33187 22:30:45.022404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33189 22:30:45.054003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33190 22:30:45.054290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33192 22:30:45.085795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33193 22:30:45.086119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33195 22:30:45.117242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33196 22:30:45.117529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33198 22:30:45.148898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33199 22:30:45.149182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33201 22:30:45.180606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33202 22:30:45.180966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33204 22:30:45.212737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33205 22:30:45.213152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33207 22:30:45.246044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33209 22:30:45.246604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33210 22:30:45.278062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33211 22:30:45.278563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33213 22:30:45.310324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33214 22:30:45.310788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33216 22:30:45.342589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33218 22:30:45.343219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33219 22:30:45.374113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33220 22:30:45.374481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33222 22:30:45.406223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33223 22:30:45.406590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33225 22:30:45.439220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33227 22:30:45.439677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33228 22:30:45.472082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33229 22:30:45.472520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33231 22:30:45.507266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33233 22:30:45.507862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33234 22:30:45.539161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33235 22:30:45.539616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33237 22:30:45.570896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33238 22:30:45.571344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33240 22:30:45.602246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33241 22:30:45.602691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33243 22:30:45.634281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33244 22:30:45.634688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33246 22:30:45.666900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33248 22:30:45.667452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33249 22:30:45.699114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33250 22:30:45.699467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33252 22:30:45.730997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33253 22:30:45.731408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33255 22:30:45.763201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33256 22:30:45.763602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33258 22:30:45.795212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33260 22:30:45.795785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33261 22:30:45.829309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33263 22:30:45.829882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33264 22:30:45.861218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33266 22:30:45.861771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33267 22:30:45.893201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33268 22:30:45.893678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33270 22:30:45.927415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33272 22:30:45.927851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33273 22:30:45.960486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33274 22:30:45.960776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33276 22:30:45.992775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33277 22:30:45.993066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33279 22:30:46.027544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33280 22:30:46.027865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33282 22:30:46.060081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33284 22:30:46.060623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33285 22:30:46.092674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33287 22:30:46.093212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33288 22:30:46.124942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33289 22:30:46.125315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33291 22:30:46.157795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33292 22:30:46.158252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33294 22:30:46.190030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33295 22:30:46.190437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33297 22:30:46.221880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33298 22:30:46.222165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33300 22:30:46.253959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33301 22:30:46.254241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33303 22:30:46.285974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33304 22:30:46.286257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33306 22:30:46.318892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33307 22:30:46.319300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33309 22:30:46.351449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33311 22:30:46.351895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33312 22:30:46.383318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33313 22:30:46.383727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33315 22:30:46.415412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33316 22:30:46.415927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33318 22:30:46.448573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33319 22:30:46.449022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33321 22:30:46.481175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33323 22:30:46.481507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33324 22:30:46.513552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33326 22:30:46.513855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33327 22:30:46.545470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33328 22:30:46.545754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33330 22:30:46.577499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33331 22:30:46.577865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33333 22:30:46.610065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33334 22:30:46.610514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33336 22:30:46.642147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33337 22:30:46.642546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33339 22:30:46.675779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33341 22:30:46.676252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33342 22:30:46.708723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33343 22:30:46.709137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33345 22:30:46.741851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33347 22:30:46.742492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33348 22:30:46.774107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33349 22:30:46.774578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33351 22:30:46.806558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33352 22:30:46.806963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33354 22:30:46.838968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33356 22:30:46.839401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33357 22:30:46.871480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33358 22:30:46.871879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33360 22:30:46.902852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33361 22:30:46.903329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33363 22:30:46.935227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33364 22:30:46.935669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33366 22:30:46.968710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33367 22:30:46.969162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33369 22:30:47.000892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33370 22:30:47.001302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33372 22:30:47.033155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33374 22:30:47.033594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33375 22:30:47.065170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33376 22:30:47.065628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33378 22:30:47.096930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33379 22:30:47.097417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33381 22:30:47.129624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33382 22:30:47.129985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33384 22:30:47.162402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33385 22:30:47.162880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33387 22:30:47.193955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33388 22:30:47.194374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33390 22:30:47.225936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33391 22:30:47.226391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33393 22:30:47.258068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33394 22:30:47.258522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33396 22:30:47.290078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33397 22:30:47.290543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33399 22:30:47.322002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33400 22:30:47.322404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33402 22:30:47.354753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33403 22:30:47.355159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33405 22:30:47.386857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33406 22:30:47.387261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33408 22:30:47.419491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33410 22:30:47.420061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33411 22:30:47.451034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33413 22:30:47.451462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33414 22:30:47.484037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33416 22:30:47.484473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33417 22:30:47.516124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33418 22:30:47.516477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33420 22:30:47.548179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33421 22:30:47.548553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33423 22:30:47.581029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33425 22:30:47.581597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33426 22:30:47.612949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33427 22:30:47.613383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33429 22:30:47.645168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33430 22:30:47.645520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33432 22:30:47.676977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33433 22:30:47.677260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33435 22:30:47.708865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33437 22:30:47.709143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33438 22:30:47.740567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33439 22:30:47.740841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33441 22:30:47.775709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33442 22:30:47.776123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33444 22:30:47.808573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33446 22:30:47.809137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33447 22:30:47.840569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33448 22:30:47.841006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33450 22:30:47.872999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33451 22:30:47.873377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33453 22:30:47.904655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33454 22:30:47.904948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33456 22:30:47.936264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33457 22:30:47.936550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33459 22:30:47.967996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33461 22:30:47.968286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33462 22:30:48.000973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33464 22:30:48.001271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33465 22:30:48.032584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33466 22:30:48.032904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33468 22:30:48.063728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33470 22:30:48.064284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33471 22:30:48.095953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33473 22:30:48.096537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33474 22:30:48.128788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33475 22:30:48.129235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33477 22:30:48.161926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33479 22:30:48.162360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33480 22:30:48.194284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33481 22:30:48.194655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33483 22:30:48.226482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33484 22:30:48.226940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33486 22:30:48.258888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33488 22:30:48.259510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33489 22:30:48.293667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33490 22:30:48.294135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33492 22:30:48.326984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33494 22:30:48.327541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33495 22:30:48.359128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33497 22:30:48.359576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33498 22:30:48.391778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33500 22:30:48.392427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33501 22:30:48.424245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33502 22:30:48.424733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33504 22:30:48.455777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33506 22:30:48.456417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33507 22:30:48.487635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33509 22:30:48.488150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33510 22:30:48.519369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33511 22:30:48.519743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33513 22:30:48.551320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33514 22:30:48.551701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33516 22:30:48.583047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33517 22:30:48.583404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33519 22:30:48.614902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33520 22:30:48.615363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33522 22:30:48.646399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33524 22:30:48.646887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33525 22:30:48.678030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33526 22:30:48.678472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33528 22:30:48.709859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33529 22:30:48.710262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33531 22:30:48.741485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33532 22:30:48.741763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33534 22:30:48.773034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33535 22:30:48.773312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33537 22:30:48.805393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33538 22:30:48.805669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33540 22:30:48.837486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33541 22:30:48.837870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33543 22:30:48.869543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33544 22:30:48.869826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33546 22:30:48.901447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33547 22:30:48.901768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33549 22:30:48.933571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33550 22:30:48.933954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33552 22:30:48.965246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33553 22:30:48.965710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33555 22:30:48.998425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33557 22:30:48.998990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33558 22:30:49.031621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33560 22:30:49.032177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33561 22:30:49.064299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33563 22:30:49.064853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33564 22:30:49.096953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33565 22:30:49.097365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33567 22:30:49.131648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33569 22:30:49.132032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33570 22:30:49.166070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33571 22:30:49.166401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33573 22:30:49.199788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33575 22:30:49.200326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33576 22:30:49.232370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33578 22:30:49.232887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33579 22:30:49.263921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33581 22:30:49.264495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33582 22:30:49.295161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33583 22:30:49.295564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33585 22:30:49.326913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33586 22:30:49.327289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33588 22:30:49.359044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33589 22:30:49.359394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33591 22:30:49.391194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33592 22:30:49.391556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33594 22:30:49.423364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33596 22:30:49.423897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33597 22:30:49.454493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33598 22:30:49.454855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33600 22:30:49.486201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33602 22:30:49.486752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33603 22:30:49.517396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33604 22:30:49.517752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33606 22:30:49.566100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33607 22:30:49.566563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33609 22:30:49.598388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33610 22:30:49.598860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33612 22:30:49.630685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33613 22:30:49.631150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33615 22:30:49.662595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33616 22:30:49.663047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33618 22:30:49.694543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33619 22:30:49.694987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33621 22:30:49.726354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33622 22:30:49.726772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33624 22:30:49.758874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33625 22:30:49.759193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33627 22:30:49.790560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33628 22:30:49.790877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33630 22:30:49.822276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33632 22:30:49.822760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33633 22:30:49.854816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33635 22:30:49.855356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33636 22:30:49.886667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33637 22:30:49.887113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33639 22:30:49.918531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33640 22:30:49.918967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33642 22:30:49.950990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33644 22:30:49.951550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33645 22:30:49.983136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33646 22:30:49.983544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33648 22:30:50.015428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33650 22:30:50.015891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33651 22:30:50.047477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33652 22:30:50.047898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33654 22:30:50.080264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33655 22:30:50.080712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33657 22:30:50.111544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33658 22:30:50.111983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33660 22:30:50.143457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33662 22:30:50.143897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33663 22:30:50.175659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33665 22:30:50.176285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33666 22:30:50.207511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33667 22:30:50.207967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33669 22:30:50.240116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33671 22:30:50.240561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33672 22:30:50.272776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33673 22:30:50.273262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33675 22:30:50.304698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33677 22:30:50.305237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33678 22:30:50.336656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33680 22:30:50.337212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33681 22:30:50.369041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33682 22:30:50.369496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33684 22:30:50.401972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33686 22:30:50.402540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33687 22:30:50.434874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33689 22:30:50.435334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33690 22:30:50.467319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33692 22:30:50.467768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33693 22:30:50.499342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33694 22:30:50.499758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33696 22:30:50.531604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33698 22:30:50.532035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33699 22:30:50.564033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33701 22:30:50.564359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33702 22:30:50.597146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33703 22:30:50.597480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33705 22:30:50.629967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33707 22:30:50.630408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33708 22:30:50.663815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33710 22:30:50.664141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33711 22:30:50.698139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33712 22:30:50.698420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33714 22:30:50.731981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33716 22:30:50.732270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33717 22:30:50.766057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33718 22:30:50.766533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33720 22:30:50.798809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33721 22:30:50.799277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33723 22:30:50.831200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33724 22:30:50.831651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33726 22:30:50.863969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33728 22:30:50.864363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33729 22:30:50.897609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33731 22:30:50.898041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33732 22:30:50.929361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33734 22:30:50.929719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33735 22:30:50.963546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33737 22:30:50.964169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33738 22:30:50.997033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33740 22:30:50.997460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33741 22:30:51.028844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33742 22:30:51.029128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33744 22:30:51.060783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33745 22:30:51.061066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33747 22:30:51.092764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33748 22:30:51.093046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33750 22:30:51.130035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33751 22:30:51.130439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33753 22:30:51.162586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33755 22:30:51.163139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33756 22:30:51.194880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33757 22:30:51.195335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33759 22:30:51.231358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33760 22:30:51.231822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33762 22:30:51.264103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33764 22:30:51.264723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33765 22:30:51.297323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33767 22:30:51.297792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33768 22:30:51.329368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33769 22:30:51.329744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33771 22:30:51.361488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33772 22:30:51.361774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33774 22:30:51.393686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33775 22:30:51.394053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33777 22:30:51.425348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33779 22:30:51.425924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33780 22:30:51.456917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33781 22:30:51.457219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33783 22:30:51.489025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33784 22:30:51.489398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33786 22:30:51.520778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33787 22:30:51.521147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33789 22:30:51.552722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33790 22:30:51.553086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33792 22:30:51.584544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33793 22:30:51.584949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33795 22:30:51.616748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33796 22:30:51.617148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33798 22:30:51.649613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33799 22:30:51.650071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33801 22:30:51.681630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33802 22:30:51.682068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33804 22:30:51.713333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33805 22:30:51.713691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33807 22:30:51.744806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33808 22:30:51.745221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33810 22:30:51.776465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33811 22:30:51.776926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33813 22:30:51.808812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33814 22:30:51.809274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33816 22:30:51.841003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33817 22:30:51.841448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33819 22:30:51.873116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33820 22:30:51.873569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33822 22:30:51.905180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33824 22:30:51.905750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33825 22:30:51.937787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33827 22:30:51.938327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33828 22:30:51.970147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33830 22:30:51.970717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33831 22:30:52.001921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33833 22:30:52.002464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33834 22:30:52.035642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33835 22:30:52.036165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33837 22:30:52.070584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33839 22:30:52.071048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33840 22:30:52.102731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33841 22:30:52.103192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33843 22:30:52.134570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33845 22:30:52.135016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33846 22:30:52.167660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33847 22:30:52.168123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33849 22:30:52.199712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33851 22:30:52.200265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33852 22:30:52.232017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33854 22:30:52.232596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33855 22:30:52.264555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33857 22:30:52.265000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33858 22:30:52.296665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33860 22:30:52.297115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33861 22:30:52.330104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33862 22:30:52.330512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
33864 22:30:52.362765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33865 22:30:52.363212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33867 22:30:52.394919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33869 22:30:52.395470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33870 22:30:52.426646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
33872 22:30:52.427201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33873 22:30:52.458019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33874 22:30:52.458486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33876 22:30:52.494707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33877 22:30:52.495191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33879 22:30:52.529193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33880 22:30:52.529665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
33882 22:30:52.563511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33883 22:30:52.563998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33885 22:30:52.595476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33887 22:30:52.596056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33888 22:30:52.626759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
33890 22:30:52.627319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33891 22:30:52.658228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33892 22:30:52.658721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33894 22:30:52.691319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33896 22:30:52.691917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33897 22:30:52.724470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33898 22:30:52.725022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
33900 22:30:52.757577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33901 22:30:52.758040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33903 22:30:52.789322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
33904 22:30:52.789736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
33906 22:30:52.821057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33907 22:30:52.821459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33909 22:30:52.853223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33910 22:30:52.853692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
33912 22:30:52.885419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33913 22:30:52.885877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33915 22:30:52.917076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33916 22:30:52.917521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33918 22:30:52.949515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33919 22:30:52.949970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
33921 22:30:52.982303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33923 22:30:52.982748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33924 22:30:53.014405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33926 22:30:53.014831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33927 22:30:53.046257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33928 22:30:53.046659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
33930 22:30:53.077951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33931 22:30:53.078307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33933 22:30:53.109503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33934 22:30:53.109962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33936 22:30:53.141114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
33938 22:30:53.141686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33939 22:30:53.173125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33940 22:30:53.173533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33942 22:30:53.205761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33943 22:30:53.206165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33945 22:30:53.237965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
33947 22:30:53.238399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33948 22:30:53.269960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33950 22:30:53.270398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33951 22:30:53.301700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
33952 22:30:53.302101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
33954 22:30:53.333932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33955 22:30:53.334411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33957 22:30:53.366301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33958 22:30:53.366763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
33960 22:30:53.398180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33961 22:30:53.398630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33963 22:30:53.430111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33965 22:30:53.430657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33966 22:30:53.461683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
33968 22:30:53.462176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33969 22:30:53.493053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33970 22:30:53.493474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33972 22:30:53.524961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33974 22:30:53.525452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33975 22:30:53.556673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33976 22:30:53.557072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
33978 22:30:53.588305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33979 22:30:53.588775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33981 22:30:53.620048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33983 22:30:53.620668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33984 22:30:53.651604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33985 22:30:53.652060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
33987 22:30:53.685840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33989 22:30:53.686478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33990 22:30:53.718473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33991 22:30:53.718874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33993 22:30:53.750948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33994 22:30:53.751443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
33996 22:30:53.782671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33998 22:30:53.783209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33999 22:30:53.814092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34001 22:30:53.814612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34002 22:30:53.845992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34004 22:30:53.846612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34005 22:30:53.877964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34006 22:30:53.878408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34008 22:30:53.909892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34009 22:30:53.910330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34011 22:30:53.941897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34013 22:30:53.942436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34014 22:30:53.973464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34016 22:30:53.974012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34017 22:30:54.009052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34019 22:30:54.009519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34020 22:30:54.041873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34021 22:30:54.042347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34023 22:30:54.076600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34024 22:30:54.077094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34026 22:30:54.112395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34028 22:30:54.112988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34029 22:30:54.150549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34031 22:30:54.151097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34032 22:30:54.186539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34033 22:30:54.186994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34035 22:30:54.218356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34036 22:30:54.218800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34038 22:30:54.250980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34040 22:30:54.251452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34041 22:30:54.282439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34043 22:30:54.282879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34044 22:30:54.313584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34045 22:30:54.314008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34047 22:30:54.345441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34048 22:30:54.345815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34050 22:30:54.377368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34052 22:30:54.377952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34053 22:30:54.409674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34054 22:30:54.410051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34056 22:30:54.441548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34057 22:30:54.442015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34059 22:30:54.473047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34060 22:30:54.473504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34062 22:30:54.504792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34063 22:30:54.505224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34065 22:30:54.536864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34067 22:30:54.537338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34068 22:30:54.569010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34069 22:30:54.569483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34071 22:30:54.601000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34073 22:30:54.601561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34074 22:30:54.633038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34076 22:30:54.633574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34077 22:30:54.684602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34078 22:30:54.685036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34080 22:30:54.716490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34081 22:30:54.716917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34083 22:30:54.748979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34085 22:30:54.749632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34086 22:30:54.783253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34087 22:30:54.783738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34089 22:30:54.815419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34091 22:30:54.815866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34092 22:30:54.847396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34094 22:30:54.847851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34095 22:30:54.879605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34097 22:30:54.880039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34098 22:30:54.911630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34099 22:30:54.911983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34101 22:30:54.942903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34102 22:30:54.943314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34104 22:30:54.974465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34105 22:30:54.974860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34107 22:30:55.006135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34108 22:30:55.006551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34110 22:30:55.038263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34111 22:30:55.038666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34113 22:30:55.071279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34114 22:30:55.071742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34116 22:30:55.103633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34117 22:30:55.104084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34119 22:30:55.135537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34120 22:30:55.135934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34122 22:30:55.168028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34124 22:30:55.168624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34125 22:30:55.201056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34126 22:30:55.201537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34128 22:30:55.232992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34129 22:30:55.233421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34131 22:30:55.265178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34133 22:30:55.265758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34134 22:30:55.298074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34136 22:30:55.298634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34137 22:30:55.329775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34139 22:30:55.330309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34140 22:30:55.362233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34141 22:30:55.362698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34143 22:30:55.394386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34144 22:30:55.394875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34146 22:30:55.426607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34147 22:30:55.427071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34149 22:30:55.460150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34151 22:30:55.460701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34152 22:30:55.494447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34154 22:30:55.495020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34155 22:30:55.530513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34157 22:30:55.531068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34158 22:30:55.562944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34159 22:30:55.563302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34161 22:30:55.594759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34162 22:30:55.595125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34164 22:30:55.626355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34165 22:30:55.626644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34167 22:30:55.657971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34168 22:30:55.658254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34170 22:30:55.689365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34171 22:30:55.689651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34173 22:30:55.720925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34174 22:30:55.721305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34176 22:30:55.754940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34177 22:30:55.755394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34179 22:30:55.787196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34180 22:30:55.787649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34182 22:30:55.819932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34184 22:30:55.820472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34185 22:30:55.851681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34186 22:30:55.852112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34188 22:30:55.885276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34189 22:30:55.885851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34191 22:30:55.918654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34192 22:30:55.919133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34194 22:30:55.950422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34195 22:30:55.950880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34197 22:30:55.982710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34198 22:30:55.983175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34200 22:30:56.014513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34201 22:30:56.014994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34203 22:30:56.046212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34204 22:30:56.046501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34206 22:30:56.078419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34207 22:30:56.078709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34209 22:30:56.111657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34210 22:30:56.112036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34212 22:30:56.144941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34213 22:30:56.145376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34215 22:30:56.177082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34216 22:30:56.177546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34218 22:30:56.209443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34220 22:30:56.210003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34221 22:30:56.241354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34222 22:30:56.241684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34224 22:30:56.273084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34225 22:30:56.273433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34227 22:30:56.304758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34228 22:30:56.305055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34230 22:30:56.337392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34231 22:30:56.337754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34233 22:30:56.368994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34234 22:30:56.369350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34236 22:30:56.401572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34237 22:30:56.401943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34239 22:30:56.433397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34240 22:30:56.433756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34242 22:30:56.467082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34243 22:30:56.467539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34245 22:30:56.499843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34247 22:30:56.500432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34248 22:30:56.532061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34250 22:30:56.532596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34251 22:30:56.564358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34252 22:30:56.564801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34254 22:30:56.596125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34256 22:30:56.596664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34257 22:30:56.627640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34259 22:30:56.628238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34260 22:30:56.660059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34262 22:30:56.660605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34263 22:30:56.693666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34264 22:30:56.694142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34266 22:30:56.726166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34267 22:30:56.726579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34269 22:30:56.757982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34270 22:30:56.758368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34272 22:30:56.789585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34273 22:30:56.789873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34275 22:30:56.821425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34276 22:30:56.821804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34278 22:30:56.856342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34279 22:30:56.856768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34281 22:30:56.888339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34282 22:30:56.888691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34284 22:30:56.920464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34285 22:30:56.920824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34287 22:30:56.951795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34289 22:30:56.952338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34290 22:30:56.984024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34292 22:30:56.984560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34293 22:30:57.016641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34294 22:30:57.017078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34296 22:30:57.049046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34297 22:30:57.049496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34299 22:30:57.081057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34300 22:30:57.081422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34302 22:30:57.112984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34303 22:30:57.113342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34305 22:30:57.145589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34307 22:30:57.146182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34308 22:30:57.177689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34309 22:30:57.178133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34311 22:30:57.209892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34312 22:30:57.210320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34314 22:30:57.242117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34316 22:30:57.242645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34317 22:30:57.274544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34318 22:30:57.274984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34320 22:30:57.306665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34321 22:30:57.307090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34323 22:30:57.338649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34325 22:30:57.339095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34326 22:30:57.371132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34327 22:30:57.371542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34329 22:30:57.402844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34331 22:30:57.403415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34332 22:30:57.434225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34333 22:30:57.434699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34335 22:30:57.465539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34336 22:30:57.466001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34338 22:30:57.497419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34339 22:30:57.497888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34341 22:30:57.530129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34342 22:30:57.530569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34344 22:30:57.562048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34345 22:30:57.562496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34347 22:30:57.594609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34348 22:30:57.595071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34350 22:30:57.626277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34351 22:30:57.626740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34353 22:30:57.658502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34355 22:30:57.659043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34356 22:30:57.691136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34357 22:30:57.691581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34359 22:30:57.723784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34361 22:30:57.724235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34362 22:30:57.758862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34364 22:30:57.759292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34365 22:30:57.793014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34366 22:30:57.793459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34368 22:30:57.828226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34369 22:30:57.828708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34371 22:30:57.862829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34373 22:30:57.863278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34374 22:30:57.898183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34375 22:30:57.898663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34377 22:30:57.933180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34378 22:30:57.933529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34380 22:30:57.968002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34382 22:30:57.968548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34383 22:30:58.001807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34384 22:30:58.002158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34386 22:30:58.035615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34387 22:30:58.035968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34389 22:30:58.070878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34390 22:30:58.071241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34392 22:30:58.105344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34393 22:30:58.105685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34395 22:30:58.138720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34397 22:30:58.139364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34398 22:30:58.170749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34399 22:30:58.171196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34401 22:30:58.203445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34402 22:30:58.203891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34404 22:30:58.235005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34405 22:30:58.235343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34407 22:30:58.266714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34408 22:30:58.267066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34410 22:30:58.298527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34411 22:30:58.298814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34413 22:30:58.330347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34414 22:30:58.330785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34416 22:30:58.363283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34418 22:30:58.363738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34419 22:30:58.395463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34420 22:30:58.395873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34422 22:30:58.428490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34423 22:30:58.428964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34425 22:30:58.460684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34426 22:30:58.461144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34428 22:30:58.492758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34429 22:30:58.493223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34431 22:30:58.524859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34433 22:30:58.525423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34434 22:30:58.556330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34435 22:30:58.556631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34437 22:30:58.588657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34438 22:30:58.588940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34440 22:30:58.620781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34441 22:30:58.621234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34443 22:30:58.653044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34445 22:30:58.653390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34446 22:30:58.684982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34447 22:30:58.685362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34449 22:30:58.716897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34450 22:30:58.717175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34452 22:30:58.748676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34454 22:30:58.748966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34455 22:30:58.780087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34457 22:30:58.780528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34458 22:30:58.811634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34460 22:30:58.812248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34461 22:30:58.843396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34462 22:30:58.843809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34464 22:30:58.875471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34466 22:30:58.875928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34467 22:30:58.907710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34468 22:30:58.908126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34470 22:30:58.940906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34471 22:30:58.941313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34473 22:30:58.973125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34474 22:30:58.973532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34476 22:30:59.018783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34477 22:30:59.019169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34479 22:30:59.056255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34480 22:30:59.056543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34482 22:30:59.089892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34483 22:30:59.090306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34485 22:30:59.125689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34486 22:30:59.126066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34488 22:30:59.159132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34489 22:30:59.159517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34491 22:30:59.191176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34492 22:30:59.191546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34494 22:30:59.223265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34495 22:30:59.223648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34497 22:30:59.255747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34499 22:30:59.256299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34500 22:30:59.258603 + set +x
34501 22:30:59.258781 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 566130_1.1.3.5>
34502 22:30:59.259109 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 566130_1.1.3.5
34503 22:30:59.259260 Ending use of test pattern.
34504 22:30:59.259391 Ending test lava.1_kselftest-arm64_qemu (566130_1.1.3.5), duration 399.32
34506 22:30:59.261804 <LAVA_TEST_RUNNER EXIT>
34507 22:30:59.262225 ok: lava_test_shell seems to have completed
34508 22:30:59.316538 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34509 22:30:59.319747 end: 3.1 lava-test-shell (duration 00:06:41) [common]
34510 22:30:59.319843 end: 3 lava-test-retry (duration 00:06:41) [common]
34511 22:30:59.319936 start: 4 finalize (timeout 00:02:06) [common]
34512 22:30:59.320027 start: 4.1 power-off (timeout 00:00:30) [common]
34513 22:30:59.320114 end: 4.1 power-off (duration 00:00:00) [common]
34514 22:30:59.320195 start: 4.2 read-feedback (timeout 00:02:06) [common]
34515 22:30:59.320369 Listened to connection for namespace 'common' for up to 1s
34516 22:30:59.320643 Listened to connection for namespace 'common' for up to 1s
34517 22:31:00.321737 Finalising connection for namespace 'common'
34519 22:31:00.422678 / # poweroff
34520 22:31:00.423289 Already disconnected
34521 22:31:00.423473 poweroff
34522 22:31:00.825845 end: 4.2 read-feedback (duration 00:00:02) [common]
34523 22:31:00.826131 Already disconnected
34524 22:31:00.826304 end: 4 finalize (duration 00:00:02) [common]
34525 22:31:00.826483 Cleaning after the job
34526 22:31:00.826668 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566130/deployimages-zscwmunz/kernel
34527 22:31:00.835432 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566130/deployimages-zscwmunz/ramdisk
34528 22:31:00.852038 Stopping the qemu container lava-docker-qemu-566130-2.1.1-ihg0yju15w
34529 22:31:03.082897 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/566130
34530 22:31:03.173914 Job finished correctly