Boot log: qemu_arm64-virt-gicv3
- Errors: 0
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
1 22:22:40.153173 lava-dispatcher, installed at version: 2023.01
2 22:22:40.153488 start: 0 validate
3 22:22:40.153630 Start time: 2023-06-05 22:22:40.153618+00:00 (UTC)
4 22:22:40.155248 Validating that http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kernel/Image exists
5 22:22:40.517492 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz exists
6 22:22:40.695255 cmd: ['docker', 'pull', 'kernelci/qemu']
7 22:22:40.695518 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 22:22:40.859665 >> Using default tag: latest
9 22:22:41.948844 >> latest: Pulling from kernelci/qemu
10 22:22:41.980699 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
11 22:22:41.980928 >> Status: Image is up to date for kernelci/qemu:latest
12 22:22:42.014020 >> docker.io/kernelci/qemu:latest
13 22:22:42.017374 Returned 0 in 1 seconds
14 22:22:42.155277 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 22:22:42.155665 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 22:22:43.981856 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 22:22:43.982175 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 22:22:45.032724 Returned 0 in 2 seconds
19 22:22:45.134030 validate duration: 4.98
21 22:22:45.134605 start: 1 deployimages (timeout 00:03:00) [common]
22 22:22:45.134780 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 22:22:45.135250 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su
24 22:22:45.135510 makedir: /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin
25 22:22:45.135713 makedir: /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/tests
26 22:22:45.135909 makedir: /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/results
27 22:22:45.136103 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-add-keys
28 22:22:45.136366 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-add-sources
29 22:22:45.136607 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-background-process-start
30 22:22:45.136846 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-background-process-stop
31 22:22:45.137077 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-common-functions
32 22:22:45.137303 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-echo-ipv4
33 22:22:45.137540 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-install-packages
34 22:22:45.137789 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-installed-packages
35 22:22:45.138016 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-os-build
36 22:22:45.138248 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-probe-channel
37 22:22:45.138481 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-probe-ip
38 22:22:45.138788 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-target-ip
39 22:22:45.139051 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-target-mac
40 22:22:45.139282 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-target-storage
41 22:22:45.139517 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-case
42 22:22:45.139745 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-event
43 22:22:45.140095 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-feedback
44 22:22:45.140404 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-raise
45 22:22:45.140659 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-reference
46 22:22:45.140901 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-runner
47 22:22:45.141136 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-set
48 22:22:45.141373 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-test-shell
49 22:22:45.141630 Updating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-install-packages (oe)
50 22:22:45.141961 Updating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/bin/lava-installed-packages (oe)
51 22:22:45.142239 Creating /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/environment
52 22:22:45.142446 LAVA metadata
53 22:22:45.142587 - LAVA_JOB_ID=566066
54 22:22:45.142741 - LAVA_DISPATCHER_IP=172.27.0.2
55 22:22:45.142966 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 22:22:45.143103 skipped lava-vland-overlay
57 22:22:45.143255 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 22:22:45.143425 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 22:22:45.143556 skipped lava-multinode-overlay
60 22:22:45.143701 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 22:22:45.143855 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 22:22:45.144011 Loading test definitions
63 22:22:45.144196 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 22:22:45.144342 Using /lava-566066 at stage 0
65 22:22:45.144970 uuid=566066_1.1.3.1 testdef=None
66 22:22:45.145153 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 22:22:45.145319 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 22:22:45.146258 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 22:22:45.146742 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 22:22:45.147929 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 22:22:45.148417 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 22:22:45.149547 runner path: /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/0/tests/0_timesync-off test_uuid 566066_1.1.3.1
75 22:22:45.149856 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 22:22:45.150328 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 22:22:45.150475 Using /lava-566066 at stage 0
79 22:22:45.150675 Fetching tests from https://github.com/kernelci/test-definitions.git
80 22:22:45.150825 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/0/tests/1_kselftest-arm64_qemu'
81 22:22:47.987982 Running '/usr/bin/git checkout kernelci.org
82 22:22:48.157127 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 22:22:48.158047 uuid=566066_1.1.3.5 testdef=None
84 22:22:48.158238 end: 1.1.3.5 git-repo-action (duration 00:00:03) [common]
86 22:22:48.158591 start: 1.1.3.6 test-overlay (timeout 00:02:57) [common]
87 22:22:48.159762 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 22:22:48.160114 start: 1.1.3.7 test-install-overlay (timeout 00:02:57) [common]
90 22:22:48.161725 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 22:22:48.162095 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:57) [common]
93 22:22:48.163657 runner path: /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/0/tests/1_kselftest-arm64_qemu test_uuid 566066_1.1.3.5
94 22:22:48.163784 BOARD='qemu_arm64-virt-gicv3'
95 22:22:48.163874 BRANCH='cip-gitlab'
96 22:22:48.163963 SKIPFILE='/dev/null'
97 22:22:48.164051 SKIP_INSTALL='True'
98 22:22:48.164139 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kselftest.tar.xz'
99 22:22:48.164229 TST_CASENAME=''
100 22:22:48.164316 TST_CMDFILES='arm64'
101 22:22:48.164511 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 22:22:48.164848 Creating lava-test-runner.conf files
104 22:22:48.164944 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/566066/lava-overlay-u3y723su/lava-566066/0 for stage 0
105 22:22:48.165077 - 0_timesync-off
106 22:22:48.165176 - 1_kselftest-arm64_qemu
107 22:22:48.165311 end: 1.1.3 test-definition (duration 00:00:03) [common]
108 22:22:48.165435 start: 1.1.4 compress-overlay (timeout 00:02:57) [common]
109 22:22:56.953342 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 22:22:56.953538 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:48) [common]
111 22:22:56.953627 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 22:22:56.953742 end: 1.1 lava-overlay (duration 00:00:12) [common]
113 22:22:56.953836 start: 1.2 apply-overlay-guest (timeout 00:02:48) [common]
114 22:22:56.953913 Overlay: /var/lib/lava/dispatcher/tmp/566066/compress-overlay-mepj2o9p/overlay-1.1.4.tar.gz
115 22:23:11.818218 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 22:23:11.818990 start: 1.3 deploy-device-env (timeout 00:02:33) [common]
118 22:23:11.819158 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 22:23:11.819319 start: 1.4 download-retry (timeout 00:02:33) [common]
120 22:23:11.819488 start: 1.4.1 http-download (timeout 00:02:33) [common]
121 22:23:11.819775 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kernel/Image
122 22:23:11.819910 saving as /var/lib/lava/dispatcher/tmp/566066/deployimages-i6fbuh2_/kernel/Image
123 22:23:11.820029 total size: 37358080 (35MB)
124 22:23:11.820146 No compression specified
125 22:23:12.173628 progress 0% (0MB)
126 22:23:13.227923 progress 5% (1MB)
127 22:23:13.581438 progress 10% (3MB)
128 22:23:13.597453 progress 15% (5MB)
129 22:23:13.774713 progress 20% (7MB)
130 22:23:14.128440 progress 25% (8MB)
131 22:23:14.304770 progress 30% (10MB)
132 22:23:14.481629 progress 35% (12MB)
133 22:23:14.658776 progress 40% (14MB)
134 22:23:14.835559 progress 45% (16MB)
135 22:23:15.012447 progress 50% (17MB)
136 22:23:15.188992 progress 55% (19MB)
137 22:23:15.365629 progress 60% (21MB)
138 22:23:15.541515 progress 65% (23MB)
139 22:23:15.717094 progress 70% (24MB)
140 22:23:15.892281 progress 75% (26MB)
141 22:23:16.067935 progress 80% (28MB)
142 22:23:16.243449 progress 85% (30MB)
143 22:23:16.419594 progress 90% (32MB)
144 22:23:16.594212 progress 95% (33MB)
145 22:23:16.769126 progress 100% (35MB)
146 22:23:16.769445 35MB downloaded in 4.95s (7.20MB/s)
147 22:23:16.769748 end: 1.4.1 http-download (duration 00:00:05) [common]
149 22:23:16.770252 end: 1.4 download-retry (duration 00:00:05) [common]
150 22:23:16.770415 start: 1.5 download-retry (timeout 00:02:28) [common]
151 22:23:16.770574 start: 1.5.1 http-download (timeout 00:02:28) [common]
152 22:23:16.770810 Not decompressing ramdisk as can be used compressed.
153 22:23:16.770976 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz
154 22:23:16.771102 saving as /var/lib/lava/dispatcher/tmp/566066/deployimages-i6fbuh2_/ramdisk/rootfs.cpio.gz
155 22:23:16.771225 total size: 88976554 (84MB)
156 22:23:16.771344 No compression specified
157 22:23:16.949190 progress 0% (0MB)
158 22:23:17.322326 progress 5% (4MB)
159 22:23:18.006786 progress 10% (8MB)
160 22:23:18.535233 progress 15% (12MB)
161 22:23:19.061861 progress 20% (17MB)
162 22:23:19.426779 progress 25% (21MB)
163 22:23:19.952478 progress 30% (25MB)
164 22:23:20.478852 progress 35% (29MB)
165 22:23:21.003244 progress 40% (33MB)
166 22:23:21.521502 progress 45% (38MB)
167 22:23:21.889959 progress 50% (42MB)
168 22:23:22.412199 progress 55% (46MB)
169 22:23:22.929859 progress 60% (50MB)
170 22:23:23.296945 progress 65% (55MB)
171 22:23:23.819092 progress 70% (59MB)
172 22:23:24.334428 progress 75% (63MB)
173 22:23:24.703301 progress 80% (67MB)
174 22:23:25.225579 progress 85% (72MB)
175 22:23:25.587599 progress 90% (76MB)
176 22:23:26.109873 progress 95% (80MB)
177 22:23:26.631069 progress 100% (84MB)
178 22:23:26.631457 84MB downloaded in 9.86s (8.61MB/s)
179 22:23:26.631727 end: 1.5.1 http-download (duration 00:00:10) [common]
181 22:23:26.632229 end: 1.5 download-retry (duration 00:00:10) [common]
182 22:23:26.632393 end: 1 deployimages (duration 00:00:41) [common]
183 22:23:26.632566 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 22:23:26.632757 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 22:23:26.632977 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 22:23:26.633343 Extending command line for qcow2 test overlay
187 22:23:26.633978 Pulling docker image
188 22:23:26.634144 cmd: ['docker', 'pull', 'kernelci/qemu']
189 22:23:26.634279 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 22:23:26.798282 >> Using default tag: latest
191 22:23:27.895099 >> latest: Pulling from kernelci/qemu
192 22:23:27.927084 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
193 22:23:27.927299 >> Status: Image is up to date for kernelci/qemu:latest
194 22:23:27.977551 >> docker.io/kernelci/qemu:latest
195 22:23:27.980820 Returned 0 in 1 seconds
196 22:23:28.119250 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-566066-2.1.1-0qo7n8jgwe --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/566066/deployimages-i6fbuh2_/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/566066/deployimages-i6fbuh2_/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/566066/apply-overlay-guest-3u2ng1g1/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 22:23:28.255798 started a shell command
198 22:23:28.256437 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 22:23:28.256635 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 22:23:28.256824 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 22:23:28.257004 Setting prompt string to ['Linux version [0-9]']
202 22:23:28.257147 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 22:23:30.543561 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 22:23:30.544160 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1612388-arm64-gcc-10-defconfig-p42ml) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 5 21:57:30 UTC 2023
205 22:23:30.544313 [ 0.000000] random: crng init done
206 22:23:30.544418 [ 0.000000] Machine model: linux,dummy-virt
207 22:23:30.544515 [ 0.000000] efi: UEFI not found.
208 22:23:30.544627 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
209 22:23:30.544736 [ 0.000000] printk: bootconsole [pl11] enabled
210 22:23:30.545088 start: 2.2.1 login-action (timeout 00:04:56) [common]
211 22:23:30.545212 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
212 22:23:30.545350 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
213 22:23:30.545472 Using line separator: #'\n'#
214 22:23:30.545569 No login prompt set.
215 22:23:30.545681 Parsing kernel messages
216 22:23:30.545773 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
217 22:23:30.545954 [login-action] Waiting for messages, (timeout 00:04:56)
218 22:23:30.548324 [ 0.000000] NUMA: No NUMA configuration found
219 22:23:30.548882 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 22:23:30.549283 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf2a00-0x7fdf4fff]
221 22:23:30.551528 [ 0.000000] Zone ranges:
222 22:23:30.552412 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 22:23:30.552603 [ 0.000000] DMA32 empty
224 22:23:30.552788 [ 0.000000] Normal empty
225 22:23:30.552941 [ 0.000000] Movable zone start for each node
226 22:23:30.553071 [ 0.000000] Early memory node ranges
227 22:23:30.553219 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 22:23:30.553576 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 22:23:30.568714 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 22:23:30.569663 [ 0.000000] psci: probing for conduit method from DT.
231 22:23:30.570044 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 22:23:30.570210 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 22:23:30.570523 [ 0.000000] psci: Trusted OS migration not required
234 22:23:30.570641 [ 0.000000] psci: SMC Calling Convention v1.0
235 22:23:30.573095 [ 0.000000] percpu: Embedded 20 pages/cpu s44840 r8192 d28888 u81920
236 22:23:30.573707 [ 0.000000] pcpu-alloc: s44840 r8192 d28888 u81920 alloc=20*4096
237 22:23:30.573839 [ 0.000000] pcpu-alloc: [0] 0
238 22:23:30.575456 [ 0.000000] Detected PIPT I-cache on CPU0
239 22:23:30.580888 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 22:23:30.581639 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 22:23:30.581845 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 22:23:30.582055 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 22:23:30.582285 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 22:23:30.582724 [ 0.000000] CPU features: detected: Spectre-v4
245 22:23:30.586469 [ 0.000000] alternatives: applying boot alternatives
246 22:23:30.589383 [ 0.000000] Fallback order for Node 0: 0
247 22:23:30.589938 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 22:23:30.590140 [ 0.000000] Policy zone: DMA
249 22:23:30.590358 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 22:23:30.592855 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 22:23:30.595555 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 22:23:30.595884 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 22:23:30.596310 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 22:23:30.605753 <6>[ 0.000000] Memory: 870672K/1048576K available (16192K kernel code, 3714K rwdata, 8860K rodata, 7552K init, 609K bss, 145136K reserved, 32768K cma-reserved)
255 22:23:30.611753 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 22:23:30.618522 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 22:23:30.618777 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 22:23:30.619125 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 22:23:30.619239 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 22:23:30.619345 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 22:23:30.619457 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 22:23:30.619797 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 22:23:30.620670 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 22:23:30.627956 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 22:23:30.628217 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 22:23:30.629974 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 22:23:30.630166 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 22:23:30.630630 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 22:23:30.635503 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 22:23:30.636379 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @42830000 (indirect, esz 8, psz 64K, shr 1)
271 22:23:30.636584 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @42840000 (flat, esz 8, psz 64K, shr 1)
272 22:23:30.637383 <6>[ 0.000000] GICv3: using LPI property table @0x0000000042850000
273 22:23:30.638150 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000042860000
274 22:23:30.639486 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 22:23:30.648116 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 22:23:30.648599 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 22:23:30.649283 <6>[ 0.000082] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 22:23:30.667152 <6>[ 0.015295] Console: colour dummy device 80x25
279 22:23:30.671369 <6>[ 0.021574] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 22:23:30.671709 <6>[ 0.022782] pid_max: default: 32768 minimum: 301
281 22:23:30.673671 <6>[ 0.024503] LSM: Security Framework initializing
282 22:23:30.678497 <6>[ 0.029200] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 22:23:30.678803 <6>[ 0.029474] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 22:23:30.711362 <4>[ 0.062306] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 22:23:30.717364 <6>[ 0.068372] cblist_init_generic: Setting adjustable number of callback queues.
286 22:23:30.717914 <6>[ 0.068696] cblist_init_generic: Setting shift to 0 and lim to 1.
287 22:23:30.718402 <6>[ 0.069304] cblist_init_generic: Setting shift to 0 and lim to 1.
288 22:23:30.719987 <6>[ 0.071031] rcu: Hierarchical SRCU implementation.
289 22:23:30.720514 <6>[ 0.071214] rcu: Max phase no-delay instances is 1000.
290 22:23:30.725046 <6>[ 0.075875] Platform MSI: its@8080000 domain created
291 22:23:30.726986 <6>[ 0.077630] PCI/MSI: /intc@8000000/its@8080000 domain created
292 22:23:30.727197 <6>[ 0.078263] fsl-mc MSI: its@8080000 domain created
293 22:23:30.730399 <6>[ 0.081475] EFI services will not be available.
294 22:23:30.731659 <6>[ 0.082550] smp: Bringing up secondary CPUs ...
295 22:23:30.731790 <6>[ 0.082810] smp: Brought up 1 node, 1 CPU
296 22:23:30.731899 <6>[ 0.082947] SMP: Total of 1 processors activated.
297 22:23:30.732244 <6>[ 0.083319] CPU features: detected: Branch Target Identification
298 22:23:30.732605 <6>[ 0.083565] CPU features: detected: 32-bit EL0 Support
299 22:23:30.732734 <6>[ 0.083731] CPU features: detected: 32-bit EL1 Support
300 22:23:30.733075 <6>[ 0.083922] CPU features: detected: ARMv8.4 Translation Table Level
301 22:23:30.733202 <6>[ 0.084148] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 22:23:30.733584 <6>[ 0.084481] CPU features: detected: Common not Private translations
303 22:23:30.733805 <6>[ 0.084676] CPU features: detected: CRC32 instructions
304 22:23:30.733999 <6>[ 0.084984] CPU features: detected: E0PD
305 22:23:30.734416 <6>[ 0.085184] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 22:23:30.734558 <6>[ 0.085374] CPU features: detected: RCpc load-acquire (LDAPR)
307 22:23:30.734738 <6>[ 0.085555] CPU features: detected: LSE atomic instructions
308 22:23:30.734880 <6>[ 0.085718] CPU features: detected: Privileged Access Never
309 22:23:30.735057 <6>[ 0.085887] CPU features: detected: RAS Extension Support
310 22:23:30.735199 <6>[ 0.086054] CPU features: detected: Random Number Generator
311 22:23:30.735375 <6>[ 0.086237] CPU features: detected: Speculation barrier (SB)
312 22:23:30.735517 <6>[ 0.086416] CPU features: detected: Stage-2 Force Write-Back
313 22:23:30.735692 <6>[ 0.086579] CPU features: detected: TLB range maintenance instructions
314 22:23:30.735861 <6>[ 0.086822] CPU features: detected: Scalable Matrix Extension
315 22:23:30.736028 <6>[ 0.086989] CPU features: detected: FA64
316 22:23:30.736199 <6>[ 0.087123] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 22:23:30.736369 <6>[ 0.087353] CPU features: detected: Scalable Vector Extension
318 22:23:30.748805 <6>[ 0.097110] SVE: maximum available vector length 256 bytes per vector
319 22:23:30.749354 <6>[ 0.100171] SVE: default vector length 64 bytes per vector
320 22:23:30.751279 <6>[ 0.102156] SME: minimum available vector length 16 bytes per vector
321 22:23:30.751426 <6>[ 0.102396] SME: maximum available vector length 256 bytes per vector
322 22:23:30.751764 <6>[ 0.102587] SME: default vector length 32 bytes per vector
323 22:23:30.752095 <6>[ 0.103046] CPU: All CPU(s) started at EL1
324 22:23:30.752430 <6>[ 0.103414] alternatives: applying system-wide alternatives
325 22:23:30.804910 <6>[ 0.155764] devtmpfs: initialized
326 22:23:30.825413 <6>[ 0.176026] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 22:23:30.826758 <6>[ 0.176880] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 22:23:30.831777 <6>[ 0.182792] pinctrl core: initialized pinctrl subsystem
329 22:23:30.843037 <6>[ 0.194086] DMI not present or invalid.
330 22:23:30.852196 <6>[ 0.203235] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 22:23:30.864172 <6>[ 0.214896] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 22:23:30.864764 <6>[ 0.215780] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 22:23:30.865366 <6>[ 0.216220] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 22:23:30.865737 <6>[ 0.216697] audit: initializing netlink subsys (disabled)
335 22:23:30.871433 <5>[ 0.222198] audit: type=2000 audit(0.184:1): state=initialized audit_enabled=0 res=1
336 22:23:30.873901 <6>[ 0.224842] thermal_sys: Registered thermal governor 'step_wise'
337 22:23:30.874565 <6>[ 0.224917] thermal_sys: Registered thermal governor 'power_allocator'
338 22:23:30.874672 <6>[ 0.225523] cpuidle: using governor menu
339 22:23:30.876334 <6>[ 0.227159] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
340 22:23:30.876899 <6>[ 0.227827] ASID allocator initialised with 65536 entries
341 22:23:30.882983 <6>[ 0.233952] Serial: AMBA PL011 UART driver
342 22:23:30.932740 <6>[ 0.283692] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
343 22:23:30.934641 <6>[ 0.285386] printk: console [ttyAMA0] enabled
344 22:23:30.934889 <6>[ 0.285386] printk: console [ttyAMA0] enabled
345 22:23:30.935055 <6>[ 0.285913] printk: bootconsole [pl11] disabled
346 22:23:30.935208 <6>[ 0.285913] printk: bootconsole [pl11] disabled
347 22:23:30.945997 <6>[ 0.297099] KASLR enabled
348 22:23:30.980047 <6>[ 0.330970] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
349 22:23:30.980564 <6>[ 0.331203] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
350 22:23:30.980672 <6>[ 0.331419] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
351 22:23:30.980765 <6>[ 0.331644] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
352 22:23:30.980871 <6>[ 0.331807] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
353 22:23:30.981246 <6>[ 0.332049] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
354 22:23:30.981466 <6>[ 0.332282] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
355 22:23:30.981678 <6>[ 0.332614] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
356 22:23:30.991268 <6>[ 0.342275] ACPI: Interpreter disabled.
357 22:23:30.999706 <6>[ 0.350680] iommu: Default domain type: Translated
358 22:23:31.000284 <6>[ 0.350851] iommu: DMA domain TLB invalidation policy: strict mode
359 22:23:31.001687 <5>[ 0.352521] SCSI subsystem initialized
360 22:23:31.002579 <7>[ 0.353445] libata version 3.00 loaded.
361 22:23:31.004049 <6>[ 0.354786] usbcore: registered new interface driver usbfs
362 22:23:31.004359 <6>[ 0.355264] usbcore: registered new interface driver hub
363 22:23:31.004887 <6>[ 0.355657] usbcore: registered new device driver usb
364 22:23:31.007916 <6>[ 0.358732] pps_core: LinuxPPS API ver. 1 registered
365 22:23:31.008129 <6>[ 0.358900] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
366 22:23:31.008365 <6>[ 0.359336] PTP clock support registered
367 22:23:31.009131 <6>[ 0.360001] EDAC MC: Ver: 3.0.0
368 22:23:31.015101 <6>[ 0.366130] FPGA manager framework
369 22:23:31.016119 <6>[ 0.366992] Advanced Linux Sound Architecture Driver Initialized.
370 22:23:31.025438 <6>[ 0.376496] vgaarb: loaded
371 22:23:31.029692 <6>[ 0.380498] clocksource: Switched to clocksource arch_sys_counter
372 22:23:31.030966 <5>[ 0.381845] VFS: Disk quotas dquot_6.6.0
373 22:23:31.031321 <6>[ 0.382202] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
374 22:23:31.034717 <6>[ 0.385774] pnp: PnP ACPI: disabled
375 22:23:31.053102 <6>[ 0.404062] NET: Registered PF_INET protocol family
376 22:23:31.055626 <6>[ 0.406463] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
377 22:23:31.060744 <6>[ 0.411683] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
378 22:23:31.061403 <6>[ 0.411985] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
379 22:23:31.061796 <6>[ 0.412412] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
380 22:23:31.062040 <6>[ 0.412857] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
381 22:23:31.062490 <6>[ 0.413473] TCP: Hash tables configured (established 8192 bind 8192)
382 22:23:31.063765 <6>[ 0.414671] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
383 22:23:31.064166 <6>[ 0.415095] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
384 22:23:31.065469 <6>[ 0.416368] NET: Registered PF_UNIX/PF_LOCAL protocol family
385 22:23:31.067938 <6>[ 0.418638] RPC: Registered named UNIX socket transport module.
386 22:23:31.068088 <6>[ 0.418865] RPC: Registered udp transport module.
387 22:23:31.068203 <6>[ 0.419009] RPC: Registered tcp transport module.
388 22:23:31.068298 <6>[ 0.419147] RPC: Registered tcp NFSv4.1 backchannel transport module.
389 22:23:31.068403 <6>[ 0.419445] PCI: CLS 0 bytes, default 64
390 22:23:31.072936 <6>[ 0.423932] Unpacking initramfs...
391 22:23:31.081777 <6>[ 0.432678] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
392 22:23:31.082379 <6>[ 0.433464] kvm [1]: HYP mode not available
393 22:23:31.087499 <5>[ 0.438484] Initialise system trusted keyrings
394 22:23:31.094104 <6>[ 0.445101] workingset: timestamp_bits=42 max_order=18 bucket_order=0
395 22:23:31.134384 <6>[ 0.485279] squashfs: version 4.0 (2009/01/31) Phillip Lougher
396 22:23:31.138751 <5>[ 0.489740] NFS: Registering the id_resolver key type
397 22:23:31.139316 <5>[ 0.490203] Key type id_resolver registered
398 22:23:31.139425 <5>[ 0.490375] Key type id_legacy registered
399 22:23:31.139991 <6>[ 0.490926] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
400 22:23:31.140328 <6>[ 0.491229] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
401 22:23:31.145307 <6>[ 0.496393] 9p: Installing v9fs 9p2000 file system support
402 22:23:31.211513 <5>[ 0.562464] Key type asymmetric registered
403 22:23:31.212000 <5>[ 0.562663] Asymmetric key parser 'x509' registered
404 22:23:31.212159 <6>[ 0.563161] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
405 22:23:31.212533 <6>[ 0.563513] io scheduler mq-deadline registered
406 22:23:31.212681 <6>[ 0.563733] io scheduler kyber registered
407 22:23:31.278212 <6>[ 0.629126] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
408 22:23:31.288943 <6>[ 0.639710] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
409 22:23:31.294095 <6>[ 0.644727] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
410 22:23:31.294633 <6>[ 0.645487] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
411 22:23:31.294861 <6>[ 0.645833] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
412 22:23:31.295917 <4>[ 0.646720] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
413 22:23:31.296955 <6>[ 0.647453] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
414 22:23:31.302296 <6>[ 0.653123] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
415 22:23:31.302550 <6>[ 0.653579] pci_bus 0000:00: root bus resource [bus 00-ff]
416 22:23:31.303113 <6>[ 0.653852] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
417 22:23:31.303348 <6>[ 0.654118] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
418 22:23:31.303518 <6>[ 0.654381] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
419 22:23:31.305176 <6>[ 0.655961] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
420 22:23:31.312680 <6>[ 0.663517] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
421 22:23:31.313124 <6>[ 0.663932] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
422 22:23:31.313251 <6>[ 0.664146] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
423 22:23:31.317680 <6>[ 0.668352] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
424 22:23:31.317910 <6>[ 0.668651] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
425 22:23:31.318424 <6>[ 0.669277] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
426 22:23:31.318614 <6>[ 0.669484] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
427 22:23:31.318794 <6>[ 0.669708] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
428 22:23:31.319229 <6>[ 0.669990] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
429 22:23:31.325997 <6>[ 0.676964] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
430 22:23:31.326560 <6>[ 0.677469] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
431 22:23:31.326986 <6>[ 0.677835] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
432 22:23:31.327181 <6>[ 0.678150] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
433 22:23:31.327597 <6>[ 0.678420] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
434 22:23:31.327767 <6>[ 0.678636] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
435 22:23:31.327928 <6>[ 0.678873] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
436 22:23:31.342451 <6>[ 0.693493] EINJ: ACPI disabled.
437 22:23:31.430686 <6>[ 0.781563] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
438 22:23:31.438106 <6>[ 0.788774] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
439 22:23:31.466916 <6>[ 0.817803] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
440 22:23:31.482931 <6>[ 0.833917] SuperH (H)SCI(F) driver initialized
441 22:23:31.484622 <6>[ 0.835452] msm_serial: driver initialized
442 22:23:31.493747 <4>[ 0.844461] cacheinfo: Unable to detect cache hierarchy for CPU 0
443 22:23:31.525814 <6>[ 0.876799] loop: module loaded
444 22:23:31.526639 <6>[ 0.877694] virtio_blk virtio1: 1/0/0 default/read/poll queues
445 22:23:31.543290 <5>[ 0.894247] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
446 22:23:31.575506 <6>[ 0.926461] megasas: 07.719.03.00-rc1
447 22:23:31.589821 <5>[ 0.940563] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
448 22:23:31.591269 <6>[ 0.942100] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
449 22:23:31.591997 <6>[ 0.942793] Intel/Sharp Extended Query Table at 0x0031
450 22:23:31.592809 <6>[ 0.943645] Using buffer write method
451 22:23:31.593293 <7>[ 0.944107] erase region 0: offset=0x0,size=0x40000,blocks=256
452 22:23:31.601584 <5>[ 0.952520] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
453 22:23:31.602627 <6>[ 0.953231] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
454 22:23:31.602773 <6>[ 0.953603] Intel/Sharp Extended Query Table at 0x0031
455 22:23:31.603157 <6>[ 0.954199] Using buffer write method
456 22:23:31.603334 <7>[ 0.954379] erase region 0: offset=0x0,size=0x40000,blocks=256
457 22:23:31.603799 <5>[ 0.954620] Concatenating MTD devices:
458 22:23:31.604012 <5>[ 0.954783] (0): \"0.flash\"
459 22:23:31.604181 <5>[ 0.954910] (1): \"0.flash\"
460 22:23:31.604310 <5>[ 0.955015] into device \"0.flash\"
461 22:23:36.401420 <6>[ 5.752310] Freeing initrd memory: 86888K
462 22:23:36.515010 <6>[ 5.865923] tun: Universal TUN/TAP device driver, 1.6
463 22:23:36.524678 <6>[ 5.875741] thunder_xcv, ver 1.0
464 22:23:36.525061 <6>[ 5.875961] thunder_bgx, ver 1.0
465 22:23:36.525176 <6>[ 5.876167] nicpf, ver 1.0
466 22:23:36.528757 <6>[ 5.879507] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
467 22:23:36.529036 <6>[ 5.879667] hns3: Copyright (c) 2017 Huawei Corporation.
468 22:23:36.529230 <6>[ 5.880021] hclge is initializing
469 22:23:36.529474 <6>[ 5.880335] e1000: Intel(R) PRO/1000 Network Driver
470 22:23:36.529668 <6>[ 5.880497] e1000: Copyright (c) 1999-2006 Intel Corporation.
471 22:23:36.529880 <6>[ 5.880803] e1000e: Intel(R) PRO/1000 Network Driver
472 22:23:36.530024 <6>[ 5.880934] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
473 22:23:36.530184 <6>[ 5.881250] igb: Intel(R) Gigabit Ethernet Network Driver
474 22:23:36.530402 <6>[ 5.881413] igb: Copyright (c) 2007-2014 Intel Corporation.
475 22:23:36.530860 <6>[ 5.881692] igbvf: Intel(R) Gigabit Virtual Function Network Driver
476 22:23:36.531011 <6>[ 5.881877] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
477 22:23:36.531739 <6>[ 5.882859] sky2: driver version 1.30
478 22:23:36.534749 <6>[ 5.885836] VFIO - User Level meta-driver version: 0.3
479 22:23:36.544158 <6>[ 5.895016] usbcore: registered new interface driver usb-storage
480 22:23:36.553575 <6>[ 5.904399] rtc-pl031 9010000.pl031: registered as rtc0
481 22:23:36.554603 <6>[ 5.905147] rtc-pl031 9010000.pl031: setting system clock to 2023-06-05T22:23:36 UTC (1686003816)
482 22:23:36.556421 <6>[ 5.907278] i2c_dev: i2c /dev entries driver
483 22:23:36.572377 <6>[ 5.923369] sdhci: Secure Digital Host Controller Interface driver
484 22:23:36.572832 <6>[ 5.923522] sdhci: Copyright(c) Pierre Ossman
485 22:23:36.574820 <6>[ 5.925711] Synopsys Designware Multimedia Card Interface Driver
486 22:23:36.577284 <6>[ 5.928360] sdhci-pltfm: SDHCI platform and OF driver helper
487 22:23:36.582536 <6>[ 5.933406] ledtrig-cpu: registered to indicate activity on CPUs
488 22:23:36.588133 <6>[ 5.939178] usbcore: registered new interface driver usbhid
489 22:23:36.588507 <6>[ 5.939338] usbhid: USB HID core driver
490 22:23:36.605060 <6>[ 5.956072] NET: Registered PF_PACKET protocol family
491 22:23:36.606325 <6>[ 5.957419] 9pnet: Installing 9P2000 support
492 22:23:36.606925 <5>[ 5.957831] Key type dns_resolver registered
493 22:23:36.608069 <6>[ 5.959175] registered taskstats version 1
494 22:23:36.608502 <5>[ 5.959595] Loading compiled-in X.509 certificates
495 22:23:36.629749 <6>[ 5.980380] input: gpio-keys as /devices/platform/gpio-keys/input/input0
496 22:23:36.636360 <6>[ 5.987421] ALSA device list:
497 22:23:36.636862 <6>[ 5.987576] No soundcards found.
498 22:23:36.639330 <6>[ 5.990172] uart-pl011 9000000.pl011: no DMA platform data
499 22:23:36.693633 <6>[ 6.044570] Freeing unused kernel memory: 7552K
500 22:23:36.694316 <6>[ 6.045422] Run /init as init process
501 22:23:36.694867 <7>[ 6.045559] with arguments:
502 22:23:36.695031 <7>[ 6.045678] /init
503 22:23:36.695168 <7>[ 6.045761] verbose
504 22:23:36.695289 <7>[ 6.045847] with environment:
505 22:23:36.695408 <7>[ 6.045943] HOME=/
506 22:23:36.695526 <7>[ 6.046018] TERM=linux
507 22:23:36.825979 <30>[ 6.176544] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
508 22:23:36.827035 <31>[ 6.177835] systemd[1]: No virtualization found in DMI
509 22:23:36.827933 <31>[ 6.178792] systemd[1]: UML virtualization not found in /proc/cpuinfo.
510 22:23:36.828165 <31>[ 6.179127] systemd[1]: No virtualization found in CPUID
511 22:23:36.828510 <31>[ 6.179399] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
512 22:23:36.830001 <31>[ 6.180857] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
513 22:23:36.830338 <31>[ 6.181331] systemd[1]: Found VM virtualization qemu
514 22:23:36.830666 <30>[ 6.181630] systemd[1]: Detected virtualization qemu.
515 22:23:36.830990 <30>[ 6.181974] systemd[1]: Detected architecture arm64.
516 22:23:36.831541 <31>[ 6.182363] systemd[1]: Detected initialized system, this is not the first boot.
517 22:23:36.835496
518 22:23:36.835842 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
519 22:23:36.835938
520 22:23:36.838028 <30>[ 6.188833] systemd[1]: Set hostname to <debian-bullseye-arm64>.
521 22:23:36.856585 <31>[ 6.207493] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
522 22:23:36.858092 <31>[ 6.208915] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
523 22:23:36.858591 <31>[ 6.209419] systemd[1]: Successfully brought loopback interface up
524 22:23:36.863188 <31>[ 6.214042] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
525 22:23:36.874974 <31>[ 6.225772] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
526 22:23:36.875165 <31>[ 6.226054] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
527 22:23:36.915296 <31>[ 6.266184] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
528 22:23:36.916436 <31>[ 6.267536] systemd[1]: Controller 'cpu' supported: yes
529 22:23:36.916924 <31>[ 6.267734] systemd[1]: Controller 'cpuacct' supported: no
530 22:23:36.917090 <31>[ 6.267912] systemd[1]: Controller 'cpuset' supported: yes
531 22:23:36.917256 <31>[ 6.268066] systemd[1]: Controller 'io' supported: yes
532 22:23:36.917450 <31>[ 6.268429] systemd[1]: Controller 'blkio' supported: no
533 22:23:36.917665 <31>[ 6.268615] systemd[1]: Controller 'memory' supported: yes
534 22:23:36.917855 <31>[ 6.268793] systemd[1]: Controller 'devices' supported: no
535 22:23:36.918020 <31>[ 6.268976] systemd[1]: Controller 'pids' supported: yes
536 22:23:36.918171 <31>[ 6.269136] systemd[1]: Controller 'bpf-firewall' supported: yes
537 22:23:36.918327 <31>[ 6.269319] systemd[1]: Controller 'bpf-devices' supported: yes
538 22:23:36.919667 <31>[ 6.270532] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
539 22:23:36.919868 <31>[ 6.270854] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
540 22:23:36.920537 <31>[ 6.271331] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
541 22:23:36.927813 <31>[ 6.278681] systemd[1]: Enabling (yes) showing of status (commandline).
542 22:23:36.935398 <31>[ 6.286246] systemd[1]: Successfully forked off '(sd-executor)' as PID 94.
543 22:23:36.944606 <31>[ 6.295441] systemd[94]: Successfully forked off '(direxec)' as PID 95.
544 22:23:36.946707 <31>[ 6.297537] systemd[94]: Successfully forked off '(direxec)' as PID 96.
545 22:23:36.949179 <31>[ 6.300005] systemd[94]: Successfully forked off '(direxec)' as PID 97.
546 22:23:36.963246 <31>[ 6.313994] systemd[94]: Successfully forked off '(direxec)' as PID 98.
547 22:23:36.965030 <31>[ 6.315817] systemd[94]: Successfully forked off '(direxec)' as PID 99.
548 22:23:37.119841 <31>[ 6.470793] systemd-fstab-generator[96]: Parsing /etc/fstab...
549 22:23:37.126417 <31>[ 6.477166] systemd-bless-boot-generator[95]: Skipping generator, not an EFI boot.
550 22:23:37.133709 <31>[ 6.484555] systemd-getty-generator[97]: Automatically adding serial getty for /dev/ttyAMA0.
551 22:23:37.134928 <31>[ 6.485836] systemd-getty-generator[97]: SELinux enabled state cached to: disabled
552 22:23:37.142080 <31>[ 6.492814] systemd-fstab-generator[96]: Found entry what=/dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
553 22:23:37.144483 <31>[ 6.495280] systemd-fstab-generator[96]: Checking was requested for /dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76, but fsck.ext4 does not exist.
554 22:23:37.152662 <31>[ 6.503673] systemd-fstab-generator[96]: SELinux enabled state cached to: disabled
555 22:23:37.154629 <31>[ 6.505463] systemd[94]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
556 22:23:37.155141 <31>[ 6.505976] systemd[94]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
557 22:23:37.155368 <31>[ 6.506339] systemd[94]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
558 22:23:37.160692 <31>[ 6.511428] systemd[94]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
559 22:23:37.160902 <31>[ 6.511781] systemd[94]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
560 22:23:37.163612 <31>[ 6.514704] systemd[1]: (sd-executor) succeeded.
561 22:23:37.165230 <31>[ 6.516075] systemd[1]: Looking for unit files in (higher priority first):
562 22:23:37.165691 <31>[ 6.516758] systemd[1]: /etc/systemd/system.control
563 22:23:37.165890 <31>[ 6.516933] systemd[1]: /run/systemd/system.control
564 22:23:37.166102 <31>[ 6.517109] systemd[1]: /run/systemd/transient
565 22:23:37.166318 <31>[ 6.517260] systemd[1]: /run/systemd/generator.early
566 22:23:37.166486 <31>[ 6.517395] systemd[1]: /etc/systemd/system
567 22:23:37.166662 <31>[ 6.517540] systemd[1]: /etc/systemd/system.attached
568 22:23:37.166807 <31>[ 6.517705] systemd[1]: /run/systemd/system
569 22:23:37.167009 <31>[ 6.517844] systemd[1]: /run/systemd/system.attached
570 22:23:37.167176 <31>[ 6.518005] systemd[1]: /run/systemd/generator
571 22:23:37.167423 <31>[ 6.518158] systemd[1]: /usr/local/lib/systemd/system
572 22:23:37.167606 <31>[ 6.518314] systemd[1]: /lib/systemd/system
573 22:23:37.167781 <31>[ 6.518484] systemd[1]: /usr/lib/systemd/system
574 22:23:37.167966 <31>[ 6.518622] systemd[1]: /run/systemd/generator.late
575 22:23:37.202602 <31>[ 6.553283] systemd[1]: Modification times have changed, need to update cache.
576 22:23:37.203971 <31>[ 6.554820] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
577 22:23:37.205020 <31>[ 6.555832] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
578 22:23:37.206219 <31>[ 6.556977] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
579 22:23:37.207086 <31>[ 6.557832] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
580 22:23:37.207845 <31>[ 6.558600] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
581 22:23:37.207970 <31>[ 6.558932] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
582 22:23:37.208406 <31>[ 6.559244] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
583 22:23:37.208665 <31>[ 6.559573] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
584 22:23:37.209171 <31>[ 6.559915] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
585 22:23:37.209681 <31>[ 6.560578] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
586 22:23:37.210220 <31>[ 6.561019] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
587 22:23:37.210758 <31>[ 6.561730] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
588 22:23:37.211344 <31>[ 6.562054] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
589 22:23:37.211553 <31>[ 6.562428] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
590 22:23:37.212203 <31>[ 6.563031] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
591 22:23:37.212577 <31>[ 6.563360] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
592 22:23:37.212951 <31>[ 6.563693] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
593 22:23:37.213072 <31>[ 6.564029] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
594 22:23:37.213756 <31>[ 6.564638] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
595 22:23:37.214388 <31>[ 6.565295] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
596 22:23:37.214823 <31>[ 6.565670] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp.service
597 22:23:37.215680 <31>[ 6.566325] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
598 22:23:37.215917 <31>[ 6.566634] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
599 22:23:37.216164 <31>[ 6.566926] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
600 22:23:37.216397 <31>[ 6.567255] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
601 22:23:37.216630 <31>[ 6.567630] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
602 22:23:37.217137 <31>[ 6.567927] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
603 22:23:37.218155 <31>[ 6.568977] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
604 22:23:37.218832 <31>[ 6.569561] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
605 22:23:37.218947 <31>[ 6.569908] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
606 22:23:37.219291 <31>[ 6.570186] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
607 22:23:37.219823 <31>[ 6.570680] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
608 22:23:37.220177 <31>[ 6.571022] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
609 22:23:37.220319 <31>[ 6.571351] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
610 22:23:37.220652 <31>[ 6.571628] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
611 22:23:37.221210 <31>[ 6.571967] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
612 22:23:37.221732 <31>[ 6.572649] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
613 22:23:37.222143 <31>[ 6.572983] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-parse-etc.service
614 22:23:37.222600 <31>[ 6.573333] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
615 22:23:37.222823 <31>[ 6.573625] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
616 22:23:37.223049 <31>[ 6.573952] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
617 22:23:37.223305 <31>[ 6.574250] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
618 22:23:37.223558 <31>[ 6.574531] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
619 22:23:37.224131 <31>[ 6.574833] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
620 22:23:37.224315 <31>[ 6.575116] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
621 22:23:37.224922 <31>[ 6.575718] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
622 22:23:37.225252 <31>[ 6.576064] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
623 22:23:37.226073 <31>[ 6.577028] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel2.target → multi-user.target
624 22:23:37.226479 <31>[ 6.577362] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
625 22:23:37.227071 <31>[ 6.577722] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
626 22:23:37.227294 <31>[ 6.578044] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
627 22:23:37.227507 <31>[ 6.578342] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
628 22:23:37.228002 <31>[ 6.578949] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
629 22:23:37.228644 <31>[ 6.579280] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
630 22:23:37.228856 <31>[ 6.579579] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
631 22:23:37.229049 <31>[ 6.579924] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
632 22:23:37.230060 <31>[ 6.580815] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
633 22:23:37.230320 <31>[ 6.581132] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
634 22:23:37.230518 <31>[ 6.581450] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
635 22:23:37.231329 <31>[ 6.582004] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
636 22:23:37.231556 <31>[ 6.582312] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
637 22:23:37.231731 <31>[ 6.582642] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
638 22:23:37.231910 <31>[ 6.582903] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
639 22:23:37.232303 <31>[ 6.583240] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
640 22:23:37.232910 <31>[ 6.583590] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
641 22:23:37.233070 <31>[ 6.583898] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
642 22:23:37.233503 <31>[ 6.584383] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
643 22:23:37.233880 <31>[ 6.584792] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
644 22:23:37.234308 <31>[ 6.585140] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
645 22:23:37.234538 <31>[ 6.585427] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
646 22:23:37.234779 <31>[ 6.585730] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
647 22:23:37.235325 <31>[ 6.586080] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
648 22:23:37.235547 <31>[ 6.586427] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
649 22:23:37.235789 <31>[ 6.586749] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
650 22:23:37.236607 <31>[ 6.587326] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
651 22:23:37.236830 <31>[ 6.587649] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
652 22:23:37.237071 <31>[ 6.587962] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
653 22:23:37.238706 <31>[ 6.589456] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
654 22:23:37.239231 <31>[ 6.590020] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
655 22:23:37.239753 <31>[ 6.590483] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
656 22:23:37.240277 <31>[ 6.590940] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
657 22:23:37.240875 <31>[ 6.591565] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
658 22:23:37.242017 <31>[ 6.592799] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.locale1.service → systemd-localed.service
659 22:23:37.242254 <31>[ 6.593251] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
660 22:23:37.242832 <31>[ 6.593544] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
661 22:23:37.243030 <31>[ 6.593866] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
662 22:23:37.243505 <31>[ 6.594189] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
663 22:23:37.243715 <31>[ 6.594545] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
664 22:23:37.243898 <31>[ 6.594832] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
665 22:23:37.244490 <31>[ 6.595144] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
666 22:23:37.244702 <31>[ 6.595464] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
667 22:23:37.244902 <31>[ 6.595801] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
668 22:23:37.245444 <31>[ 6.596128] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
669 22:23:37.246008 <31>[ 6.596719] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
670 22:23:37.246201 <31>[ 6.597080] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
671 22:23:37.246400 <31>[ 6.597398] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
672 22:23:37.246910 <31>[ 6.597717] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
673 22:23:37.247506 <31>[ 6.598206] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-varlink@.socket
674 22:23:37.247735 <31>[ 6.598539] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
675 22:23:37.247932 <31>[ 6.598857] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
676 22:23:37.248953 <31>[ 6.599578] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.hostname1.service → systemd-hostnamed.service
677 22:23:37.249154 <31>[ 6.599927] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
678 22:23:37.249536 <31>[ 6.600499] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
679 22:23:37.249885 <31>[ 6.600829] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
680 22:23:37.250216 <31>[ 6.601155] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
681 22:23:37.250571 <31>[ 6.601531] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
682 22:23:37.250998 <31>[ 6.601866] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
683 22:23:37.251234 <31>[ 6.602184] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
684 22:23:37.251782 <31>[ 6.602479] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-bless-boot.service
685 22:23:37.251942 <31>[ 6.602751] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
686 22:23:37.252172 <31>[ 6.603055] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
687 22:23:37.252413 <31>[ 6.603386] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
688 22:23:37.252652 <31>[ 6.603695] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
689 22:23:37.253165 <31>[ 6.603923] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
690 22:23:37.253699 <31>[ 6.604549] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
691 22:23:37.253904 <31>[ 6.604845] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
692 22:23:37.254440 <31>[ 6.605169] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
693 22:23:37.254639 <31>[ 6.605474] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.service
694 22:23:37.254821 <31>[ 6.605789] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-cleanup.service
695 22:23:37.255329 <31>[ 6.606087] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
696 22:23:37.255536 <31>[ 6.606353] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
697 22:23:37.255720 <31>[ 6.606668] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
698 22:23:37.256330 <31>[ 6.607004] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
699 22:23:37.256528 <31>[ 6.607288] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
700 22:23:37.256720 <31>[ 6.607570] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
701 22:23:37.256943 <31>[ 6.607906] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
702 22:23:37.257380 <31>[ 6.608314] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
703 22:23:37.257902 <31>[ 6.608651] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
704 22:23:37.258112 <31>[ 6.608995] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
705 22:23:37.258592 <31>[ 6.609303] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
706 22:23:37.259096 <31>[ 6.609827] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
707 22:23:37.259280 <31>[ 6.610219] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
708 22:23:37.260191 <31>[ 6.610911] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
709 22:23:37.260399 <31>[ 6.611305] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
710 22:23:37.260652 <31>[ 6.611589] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate.service
711 22:23:37.261193 <31>[ 6.611919] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
712 22:23:37.261751 <31>[ 6.612424] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
713 22:23:37.261965 <31>[ 6.612750] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
714 22:23:37.262218 <31>[ 6.613047] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
715 22:23:37.262442 <31>[ 6.613375] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
716 22:23:37.262727 <31>[ 6.613662] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
717 22:23:37.262971 <31>[ 6.613926] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
718 22:23:37.263186 <31>[ 6.614195] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
719 22:23:37.263713 <31>[ 6.614656] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
720 22:23:37.264292 <31>[ 6.615152] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
721 22:23:37.264545 <31>[ 6.615468] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
722 22:23:37.265126 <31>[ 6.615787] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
723 22:23:37.265328 <31>[ 6.616112] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
724 22:23:37.265720 <31>[ 6.616675] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
725 22:23:37.266298 <31>[ 6.617007] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
726 22:23:37.266462 <31>[ 6.617283] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
727 22:23:37.710343 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
728 22:23:37.714786 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
729 22:23:37.718501 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
730 22:23:37.721292 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
731 22:23:37.724705 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
732 22:23:37.726384 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
733 22:23:37.728568 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
734 22:23:37.729718 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
735 22:23:37.730406 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
736 22:23:37.731247 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
737 22:23:37.732065 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
738 22:23:37.735964 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
739 22:23:37.739904 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
740 22:23:37.742812 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
741 22:23:37.744976 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
742 22:23:37.747531 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
743 22:23:37.750506 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
744 22:23:37.752219 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
745 22:23:37.778984 Mounting [0;1;39mHuge Pages File System[0m...
746 22:23:37.802513 Mounting [0;1;39mPOSIX Message Queue File System[0m...
747 22:23:37.834712 Mounting [0;1;39mKernel Debug File System[0m...
748 22:23:37.891217 Starting [0;1;39mLoad Kernel Module configfs[0m...
749 22:23:37.930735 Starting [0;1;39mLoad Kernel Module drm[0m...
750 22:23:37.986980 Starting [0;1;39mJournal Service[0m...
751 22:23:38.018891 Starting [0;1;39mLoad Kernel Modules[0m...
752 22:23:38.058960 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
753 22:23:38.111364 Starting [0;1;39mColdplug All udev Devices[0m...
754 22:23:38.208233 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
755 22:23:38.223542 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
756 22:23:38.235047 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
757 22:23:38.286480 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
758 22:23:38.334494 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
759 22:23:38.355582 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
760 22:23:38.432541 Mounting [0;1;39mKernel Configuration File System[0m...
761 22:23:38.535072 Starting [0;1;39mApply Kernel Variables[0m...
762 22:23:38.615489 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
763 22:23:38.693422 <47>[ 8.024176] systemd-journald[105]: SELinux enabled state cached to: disabled
764 22:23:38.694964 <47>[ 8.045831] systemd-journald[105]: Auditing in kernel turned off.
765 22:23:38.715868 <47>[ 8.066697] systemd-journald[105]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
766 22:23:38.765312 <47>[ 8.115989] systemd-journald[105]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
767 22:23:38.770197 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
768 22:23:38.775974 <47>[ 8.126772] systemd-journald[105]: Fixed min_use=3.8M max_use=19.4M max_size=2.4M min_size=512.0K keep_free=9.7M n_max_files=100
769 22:23:38.778053 See 'systemctl status systemd-remount-fs.service' for details.
770 22:23:38.786112 <47>[ 8.136893] systemd-journald[105]: Reserving 333 entries in field hash table.
771 22:23:38.794990 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
772 22:23:38.812011 <47>[ 8.162669] systemd-journald[105]: Reserving 4437 entries in data hash table.
773 22:23:38.821810 <47>[ 8.172822] systemd-journald[105]: Vacuuming...
774 22:23:38.822723 <47>[ 8.173507] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
775 22:23:38.823203 <47>[ 8.174117] systemd-journald[105]: Flushing /dev/kmsg...
776 22:23:38.831388 Starting [0;1;39mLoad/Save Random Seed[0m...
777 22:23:38.890824 Starting [0;1;39mCreate System Users[0m...
778 22:23:39.027377 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
779 22:23:39.203167 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
780 22:23:39.239172 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
781 22:23:39.346248 <47>[ 8.697178] systemd-journald[105]: systemd-journald running as PID 105 for the system.
782 22:23:39.360010 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
783 22:23:39.365936 <47>[ 8.716593] systemd-journald[105]: Sent READY=1 notification.
784 22:23:39.366232 <47>[ 8.717021] systemd-journald[105]: Sent WATCHDOG=1 notification.
785 22:23:39.404065 <47>[ 8.755000] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
786 22:23:39.414988 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
787 22:23:39.423655 <47>[ 8.774647] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
788 22:23:39.443178 <47>[ 8.793906] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
789 22:23:39.461461 <47>[ 8.796174] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
790 22:23:39.471421 <47>[ 8.822372] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
791 22:23:39.483475 <47>[ 8.834461] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
792 22:23:39.497592 <47>[ 8.848522] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
793 22:23:39.515503 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
794 22:23:39.519210 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
795 22:23:39.530415 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
796 22:23:39.531787 <47>[ 8.882654] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
797 22:23:39.536698 <47>[ 8.887483] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
798 22:23:39.551495 <47>[ 8.902434] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
799 22:23:39.566047 <47>[ 8.904175] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
800 22:23:39.568464 <47>[ 8.919348] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
801 22:23:39.582526 <47>[ 8.933534] systemd-journald[105]: n/a: New incoming connection.
802 22:23:39.583209 <47>[ 8.934059] systemd-journald[105]: varlink-21: varlink: setting state idle-server
803 22:23:39.596708 <47>[ 8.947415] systemd-journald[105]: varlink-21: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
804 22:23:39.603382 <47>[ 8.954208] systemd-journald[105]: varlink-21: varlink: changing state idle-server → processing-method
805 22:23:39.603819 <46>[ 8.954586] systemd-journald[105]: Received client request to flush runtime journal.
806 22:23:39.604200 <47>[ 8.955102] systemd-journald[105]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
807 22:23:39.605111 <47>[ 8.956028] systemd-journald[105]: Vacuuming...
808 22:23:39.607877 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
809 22:23:39.622041 <47>[ 8.972809] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
810 22:23:39.623310 <47>[ 8.974185] systemd-journald[105]: varlink-21: Sending message: {\"parameters\":{}}
811 22:23:39.623756 <47>[ 8.974467] systemd-journald[105]: varlink-21: varlink: changing state processing-method → processed-method
812 22:23:39.624141 <47>[ 8.974942] systemd-journald[105]: varlink-21: varlink: changing state processed-method → idle-server
813 22:23:39.642069 <47>[ 8.992645] systemd-journald[105]: varlink-21: varlink: changing state idle-server → pending-disconnect
814 22:23:39.642411 <47>[ 8.993059] systemd-journald[105]: varlink-21: varlink: changing state pending-disconnect → processing-disconnect
815 22:23:39.642605 <47>[ 8.993381] systemd-journald[105]: varlink-21: varlink: changing state processing-disconnect → disconnected
816 22:23:39.643200 <47>[ 8.994132] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
817 22:23:39.658947 <47>[ 9.009615] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
818 22:23:39.661047 <47>[ 9.011850] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
819 22:23:39.668264 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
820 22:23:39.739555 Starting [0;1;39mCreate Volatile Files and Directories[0m...
821 22:23:39.765750 <47>[ 9.116649] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
822 22:23:40.213754 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
823 22:23:40.294400 Starting [0;1;39mNetwork Service[0m...
824 22:23:40.320101 <47>[ 9.671025] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
825 22:23:40.334542 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
826 22:23:40.427033 Starting [0;1;39mNetwork Time Synchronization[0m...
827 22:23:40.452022 <47>[ 9.802957] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
828 22:23:40.499683 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
829 22:23:40.525760 <47>[ 9.876687] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
830 22:23:40.938718 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
831 22:23:41.902908 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
832 22:23:41.979877 <47>[ 11.330332] systemd-journald[105]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.1 (3330 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
833 22:23:41.980140 <47>[ 11.331018] systemd-journald[105]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
834 22:23:41.980507 <47>[ 11.331425] systemd-journald[105]: Rotating...
835 22:23:41.983774 <47>[ 11.334666] systemd-journald[105]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
836 22:23:41.985376 <47>[ 11.336171] systemd-journald[105]: Reserving 333 entries in field hash table.
837 22:23:42.015334 Starting [0;1;39mNetwork Name Resolution[0m...
838 22:23:42.045697 <47>[ 11.396671] systemd-journald[105]: Reserving 4437 entries in data hash table.
839 22:23:42.048787 <47>[ 11.399653] systemd-journald[105]: Vacuuming...
840 22:23:42.076887 <47>[ 11.427525] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
841 22:23:42.104257 <47>[ 11.454902] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
842 22:23:42.480009 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
843 22:23:42.486479 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
844 22:23:42.489728 <47>[ 11.840540] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
845 22:23:42.499941 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
846 22:23:43.794853 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
847 22:23:43.800975 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
848 22:23:43.833097 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
849 22:23:43.858175 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
850 22:23:43.871522 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
851 22:23:43.874683 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
852 22:23:43.899868 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
853 22:23:43.907908 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
854 22:23:43.920648 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
855 22:23:43.979958 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
856 22:23:44.000538 <47>[ 13.351107] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
857 22:23:44.151101 <47>[ 13.501719] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
858 22:23:44.154410 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
859 22:23:44.405200 <47>[ 13.755804] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
860 22:23:44.405511 Starting [0;1;39mUser Login Management[0m...
861 22:23:44.515488 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
862 22:23:44.518589 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
863 22:23:44.529193 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
864 22:23:44.614927 Starting [0;1;39mPermit User Sessions[0m...
865 22:23:44.629802 <47>[ 13.980470] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
866 22:23:44.899362 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
867 22:23:44.980718 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
868 22:23:45.151563 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
869 22:23:45.611014 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
870 22:23:47.886293 [[0m[0;31m* [0m] A start job is running for /dev/ttyAMA0 (10s / 1min 30s)
871 22:23:47.934633 M[K[[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
872 22:23:48.006559 [K[[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
873 22:23:48.029285 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
874 22:23:48.046465 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
875 22:23:48.056142 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
876 22:23:48.106153 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
877 22:23:48.115523 <47>[ 17.466342] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
878 22:23:48.317983 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
879 22:23:48.360132 <6>[ 17.711048] virtio_net virtio0 enp0s1: renamed from eth0
880 22:23:48.384472 <47>[ 17.735392] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
881 22:23:48.395243 <47>[ 17.745961] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
882 22:23:48.468505
883 22:23:48.469126 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
884 22:23:48.469284
885 22:23:48.497520 debian-bullseye-arm64 login: root (automatic login)
886 22:23:48.498133
887 22:23:48.723878 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Mon Jun 5 21:57:30 UTC 2023 aarch64
888 22:23:48.724487
889 22:23:48.724697 The programs included with the Debian GNU/Linux system are free software;
890 22:23:48.724888 the exact distribution terms for each program are described in the
891 22:23:48.725023 individual files in /usr/share/doc/*/copyright.
892 22:23:48.725142
893 22:23:48.725259 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
894 22:23:48.725376 permitted by applicable law.
895 22:23:49.251807 <47>[ 18.602722] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
896 22:23:49.304628 <47>[ 18.655213] systemd-journald[105]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.1 (3331 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
897 22:23:49.305141 <47>[ 18.655819] systemd-journald[105]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
898 22:23:49.317026 <47>[ 18.656302] systemd-journald[105]: Rotating...
899 22:23:49.319223 <47>[ 18.670019] systemd-journald[105]: Reserving 333 entries in field hash table.
900 22:23:49.343711 <47>[ 18.694672] systemd-journald[105]: Reserving 4437 entries in data hash table.
901 22:23:49.354977 <47>[ 18.706007] systemd-journald[105]: Vacuuming...
902 22:23:49.356406 <47>[ 18.707241] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
903 22:23:49.536476 <47>[ 18.887389] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
904 22:23:51.292717 <47>[ 20.643610] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
905 22:23:51.624280 Matched prompt #10: / #
907 22:23:51.624845 Setting prompt string to ['/ #']
908 22:23:51.625023 end: 2.2.1 login-action (duration 00:00:21) [common]
910 22:23:51.625430 end: 2.2 auto-login-action (duration 00:00:23) [common]
911 22:23:51.625601 start: 2.3 expect-shell-connection (timeout 00:04:35) [common]
912 22:23:51.625814 Setting prompt string to ['/ #']
913 22:23:51.625951 Forcing a shell prompt, looking for ['/ #']
915 22:23:51.676548 / #
916 22:23:51.676764 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
917 22:23:51.676980 Waiting using forced prompt support (timeout 00:02:30)
918 22:23:51.679055
919 22:23:51.687996 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
920 22:23:51.688224 start: 2.4 export-device-env (timeout 00:04:35) [common]
921 22:23:51.688403 end: 2.4 export-device-env (duration 00:00:00) [common]
922 22:23:51.688565 end: 2 boot-image-retry (duration 00:00:25) [common]
923 22:23:51.688732 start: 3 lava-test-retry (timeout 00:08:53) [common]
924 22:23:51.688913 start: 3.1 lava-test-shell (timeout 00:08:53) [common]
925 22:23:51.689095 Using namespace: common
927 22:23:51.789775 / # #
928 22:23:51.790077 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
929 22:23:51.790763 #
931 22:23:51.899576 / # mkdir /lava-566066
932 22:23:51.900337 mkdir /lava-566066
934 22:23:52.031545 / # mount /dev/disk/by-uuid/1f7aca41-6265-4b43-b6fa-eb928b73ba81 -t ext2 /lava-566066
935 22:23:52.032341 mount /dev/disk/by-uuid/1f7aca41-6265-4b43-b6fa-eb928b73ba81 -t ext2 /lava-566066
936 22:23:52.070822 <4>[ 21.421242] ext2 filesystem being mounted at /lava-566066 supports timestamps until 2038 (0x7fffffff)
938 22:23:52.212559 / # ls -la /lava-566066/bin/lava-test-runner
939 22:23:52.213344 ls -la /lava-566066/bin/lava-test-runner
940 22:23:52.253424 -rwxr-xr-x 1 root root 1039 Jun 5 22:22 /lava-566066/bin/lava-test-runner
941 22:23:52.265008 Using /lava-566066
943 22:23:52.365765 / # export SHELL=/bin/sh
944 22:23:52.366686 export SHELL=/bin/sh
946 22:23:52.474840 / # . /lava-566066/environment
947 22:23:52.475601 . /lava-566066/environment
949 22:23:52.586719 / # /lava-566066/bin/lava-test-runner /lava-566066/0
950 22:23:52.586936 Test shell timeout: 10s (minimum of the action and connection timeout)
951 22:23:52.587569 /lava-566066/bin/lava-test-runner /lava-566066/0
952 22:23:52.707043 + export TESTRUN_ID=0_timesync-off
953 22:23:52.707362 + cd /lava-566066/0/tests/0_timesync-off
954 22:23:52.709762 + cat uuid
955 22:23:52.717625 + UUID=566066_1.1.3.1
956 22:23:52.717822 + set +x
957 22:23:52.718288 <LAVA_SIGNAL_STARTRUN 0_timesync-off 566066_1.1.3.1>
958 22:23:52.718590 Received signal: <STARTRUN> 0_timesync-off 566066_1.1.3.1
959 22:23:52.718696 Starting test lava.0_timesync-off (566066_1.1.3.1)
960 22:23:52.718813 Skipping test definition patterns.
961 22:23:52.718948 + systemctl stop systemd-timesyncd
962 22:23:52.957256 + set +x
963 22:23:52.957758 <LAVA_SIGNAL_ENDRUN 0_timesync-off 566066_1.1.3.1>
964 22:23:52.958094 Received signal: <ENDRUN> 0_timesync-off 566066_1.1.3.1
965 22:23:52.958249 Ending use of test pattern.
966 22:23:52.958369 Ending test lava.0_timesync-off (566066_1.1.3.1), duration 0.24
968 22:23:53.001541 + export TESTRUN_ID=1_kselftest-arm64_qemu
969 22:23:53.001848 + cd /lava-566066/0/tests/1_kselftest-arm64_qemu
970 22:23:53.004031 + cat uuid
971 22:23:53.011510 + UUID=566066_1.1.3.5
972 22:23:53.012005 + set +x
973 22:23:53.012160 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 566066_1.1.3.5>
974 22:23:53.012287 + cd ./automated/linux/kselftest/
975 22:23:53.012562 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 566066_1.1.3.5
976 22:23:53.012671 Starting test lava.1_kselftest-arm64_qemu (566066_1.1.3.5)
977 22:23:53.012786 Skipping test definition patterns.
978 22:23:53.017235 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip-gitlab -e -p /opt/kselftests/mainline/ -n 1 -i 1
979 22:23:53.109474 INFO: install_deps skipped
980 22:23:53.142102 --2023-06-05 22:23:53-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kselftest.tar.xz
981 22:23:53.166709 Resolving storage.kernelci.org (storage.kernelci.org)... 52.250.1.28
982 22:23:53.365388 Connecting to storage.kernelci.org (storage.kernelci.org)|52.250.1.28|:80... connected.
983 22:23:53.557487 HTTP request sent, awaiting response... 200 OK
984 22:23:53.560359 Length: 2702152 (2.6M) [application/octet-stream]
985 22:23:53.561686 Saving to: 'kselftest.tar.xz'
986 22:23:53.562984
987 22:23:54.845114 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 147KB/s kselftest.tar.xz 8%[> ] 219.84K 313KB/s kselftest.tar.xz 32%[=====> ] 846.09K 938KB/s kselftest.tar.xz 60%[===========> ] 1.56M 1.41MB/s kselftest.tar.xz 100%[===================>] 2.58M 2.01MB/s in 1.3s
988 22:23:54.845497
989 22:23:54.850807 2023-06-05 22:23:54 (2.01 MB/s) - 'kselftest.tar.xz' saved [2702152/2702152]
990 22:23:54.850988
991 22:23:58.001928 skiplist:
992 22:23:58.002382 ========================================
993 22:23:58.002680 ========================================
994 22:23:58.058796 arm64:tags_test
995 22:23:58.059322 arm64:run_tags_test.sh
996 22:23:58.059487 arm64:fake_sigreturn_bad_magic
997 22:23:58.059626 arm64:fake_sigreturn_bad_size
998 22:23:58.059751 arm64:fake_sigreturn_bad_size_for_magic0
999 22:23:58.059871 arm64:fake_sigreturn_duplicated_fpsimd
1000 22:23:58.059989 arm64:fake_sigreturn_misaligned_sp
1001 22:23:58.060108 arm64:fake_sigreturn_missing_fpsimd
1002 22:23:58.060225 arm64:fake_sigreturn_sme_change_vl
1003 22:23:58.060373 arm64:fake_sigreturn_sve_change_vl
1004 22:23:58.060497 arm64:mangle_pstate_invalid_compat_toggle
1005 22:23:58.060617 arm64:mangle_pstate_invalid_daif_bits
1006 22:23:58.060735 arm64:mangle_pstate_invalid_mode_el1h
1007 22:23:58.060857 arm64:mangle_pstate_invalid_mode_el1t
1008 22:23:58.060975 arm64:mangle_pstate_invalid_mode_el2h
1009 22:23:58.061092 arm64:mangle_pstate_invalid_mode_el2t
1010 22:23:58.061211 arm64:mangle_pstate_invalid_mode_el3h
1011 22:23:58.061332 arm64:mangle_pstate_invalid_mode_el3t
1012 22:23:58.061452 arm64:sme_trap_no_sm
1013 22:23:58.061571 arm64:sme_trap_non_streaming
1014 22:23:58.061706 arm64:sme_trap_za
1015 22:23:58.061827 arm64:sme_vl
1016 22:23:58.061945 arm64:ssve_regs
1017 22:23:58.062066 arm64:sve_regs
1018 22:23:58.062240 arm64:sve_vl
1019 22:23:58.062368 arm64:za_no_regs
1020 22:23:58.062488 arm64:za_regs
1021 22:23:58.062605 arm64:pac
1022 22:23:58.062725 arm64:fp-stress
1023 22:23:58.062842 arm64:sve-ptrace
1024 22:23:58.062994 arm64:sve-probe-vls
1025 22:23:58.063132 arm64:vec-syscfg
1026 22:23:58.063255 arm64:za-fork
1027 22:23:58.063374 arm64:za-ptrace
1028 22:23:58.063491 arm64:check_buffer_fill
1029 22:23:58.063608 arm64:check_child_memory
1030 22:23:58.063724 arm64:check_gcr_el1_cswitch
1031 22:23:58.063839 arm64:check_ksm_options
1032 22:23:58.063955 arm64:check_mmap_options
1033 22:23:58.064071 arm64:check_prctl
1034 22:23:58.064187 arm64:check_tags_inclusion
1035 22:23:58.064305 arm64:check_user_mem
1036 22:23:58.064422 arm64:btitest
1037 22:23:58.064540 arm64:nobtitest
1038 22:23:58.064656 arm64:hwcap
1039 22:23:58.064775 arm64:ptrace
1040 22:23:58.064891 arm64:syscall-abi
1041 22:23:58.065006 arm64:tpidr2
1042 22:23:58.073861 ============== Tests to run ===============
1043 22:23:58.078218 arm64:tags_test
1044 22:23:58.078368 arm64:run_tags_test.sh
1045 22:23:58.078685 arm64:fake_sigreturn_bad_magic
1046 22:23:58.078843 arm64:fake_sigreturn_bad_size
1047 22:23:58.078976 arm64:fake_sigreturn_bad_size_for_magic0
1048 22:23:58.079102 arm64:fake_sigreturn_duplicated_fpsimd
1049 22:23:58.079257 arm64:fake_sigreturn_misaligned_sp
1050 22:23:58.079389 arm64:fake_sigreturn_missing_fpsimd
1051 22:23:58.079515 arm64:fake_sigreturn_sme_change_vl
1052 22:23:58.079640 arm64:fake_sigreturn_sve_change_vl
1053 22:23:58.079758 arm64:mangle_pstate_invalid_compat_toggle
1054 22:23:58.079911 arm64:mangle_pstate_invalid_daif_bits
1055 22:23:58.080045 arm64:mangle_pstate_invalid_mode_el1h
1056 22:23:58.080204 arm64:mangle_pstate_invalid_mode_el1t
1057 22:23:58.080337 arm64:mangle_pstate_invalid_mode_el2h
1058 22:23:58.080470 arm64:mangle_pstate_invalid_mode_el2t
1059 22:23:58.080596 arm64:mangle_pstate_invalid_mode_el3h
1060 22:23:58.080719 arm64:mangle_pstate_invalid_mode_el3t
1061 22:23:58.080836 arm64:sme_trap_no_sm
1062 22:23:58.080953 arm64:sme_trap_non_streaming
1063 22:23:58.081068 arm64:sme_trap_za
1064 22:23:58.081185 arm64:sme_vl
1065 22:23:58.081300 arm64:ssve_regs
1066 22:23:58.081416 arm64:sve_regs
1067 22:23:58.081532 arm64:sve_vl
1068 22:23:58.081659 arm64:za_no_regs
1069 22:23:58.081779 arm64:za_regs
1070 22:23:58.081895 arm64:pac
1071 22:23:58.082011 arm64:fp-stress
1072 22:23:58.082129 arm64:sve-ptrace
1073 22:23:58.082244 arm64:sve-probe-vls
1074 22:23:58.082359 arm64:vec-syscfg
1075 22:23:58.082474 arm64:za-fork
1076 22:23:58.082627 arm64:za-ptrace
1077 22:23:58.082758 arm64:check_buffer_fill
1078 22:23:58.082877 arm64:check_child_memory
1079 22:23:58.082993 arm64:check_gcr_el1_cswitch
1080 22:23:58.083109 arm64:check_ksm_options
1081 22:23:58.083226 arm64:check_mmap_options
1082 22:23:58.083341 arm64:check_prctl
1083 22:23:58.083457 arm64:check_tags_inclusion
1084 22:23:58.083572 arm64:check_user_mem
1085 22:23:58.083688 arm64:btitest
1086 22:23:58.083807 arm64:nobtitest
1087 22:23:58.083922 arm64:hwcap
1088 22:23:58.084038 arm64:ptrace
1089 22:23:58.084154 arm64:syscall-abi
1090 22:23:58.084269 arm64:tpidr2
1091 22:23:58.084408 ===========End Tests to run ===============
1092 22:23:59.020197 <12>[ 28.371097] kselftest: Running tests in arm64
1093 22:23:59.048975 TAP version 13
1094 22:23:59.066548 1..48
1095 22:23:59.114351 # selftests: arm64: tags_test
1096 22:23:59.168326 ok 1 selftests: arm64: tags_test
1097 22:23:59.216420 # selftests: arm64: run_tags_test.sh
1098 22:23:59.267996 # --------------------
1099 22:23:59.268274 # running tags test
1100 22:23:59.268403 # --------------------
1101 22:23:59.268519 # [PASS]
1102 22:23:59.274163 ok 2 selftests: arm64: run_tags_test.sh
1103 22:23:59.322044 # selftests: arm64: fake_sigreturn_bad_magic
1104 22:23:59.375741 # Registered handlers for all signals.
1105 22:23:59.375990 # Detected MINSTKSIGSZ:10000
1106 22:23:59.376297 # Testcase initialized.
1107 22:23:59.376394 # uc context validated.
1108 22:23:59.376482 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1109 22:23:59.376569 # Handled SIG_COPYCTX
1110 22:23:59.376652 # Available space:3536
1111 22:23:59.376734 # Using badly built context - ERR: BAD MAGIC !
1112 22:23:59.376839 # SIG_OK -- SP:0xFFFFDA6C43C0 si_addr@:0xffffda6c43c0 si_code:2 token@:0xffffda6c3160 offset:-4704
1113 22:23:59.376927 # ==>> completed. PASS(1)
1114 22:23:59.377012 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1115 22:23:59.377115 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDA6C3160
1116 22:23:59.384871 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1117 22:23:59.430846 # selftests: arm64: fake_sigreturn_bad_size
1118 22:23:59.481465 # Registered handlers for all signals.
1119 22:23:59.481718 # Detected MINSTKSIGSZ:10000
1120 22:23:59.482045 # Testcase initialized.
1121 22:23:59.482227 # uc context validated.
1122 22:23:59.482370 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1123 22:23:59.482499 # Handled SIG_COPYCTX
1124 22:23:59.482625 # Available space:3536
1125 22:23:59.482749 # uc context validated.
1126 22:23:59.482872 # Using badly built context - ERR: Bad size for esr_context
1127 22:23:59.483029 # SIG_OK -- SP:0xFFFFE23B9C50 si_addr@:0xffffe23b9c50 si_code:2 token@:0xffffe23b89f0 offset:-4704
1128 22:23:59.483168 # ==>> completed. PASS(1)
1129 22:23:59.483293 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1130 22:23:59.483420 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE23B89F0
1131 22:23:59.491656 ok 4 selftests: arm64: fake_sigreturn_bad_size
1132 22:23:59.537473 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1133 22:23:59.588081 # Registered handlers for all signals.
1134 22:23:59.588675 # Detected MINSTKSIGSZ:10000
1135 22:23:59.588851 # Testcase initialized.
1136 22:23:59.588981 # uc context validated.
1137 22:23:59.589099 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1138 22:23:59.589217 # Handled SIG_COPYCTX
1139 22:23:59.589332 # Available space:3536
1140 22:23:59.589448 # Using badly built context - ERR: Bad size for terminator
1141 22:23:59.590539 # SIG_OK -- SP:0xFFFFE2DD5090 si_addr@:0xffffe2dd5090 si_code:2 token@:0xffffe2dd3e30 offset:-4704
1142 22:23:59.590909 # ==>> completed. PASS(1)
1143 22:23:59.591038 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1144 22:23:59.591156 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE2DD3E30
1145 22:23:59.597897 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1146 22:23:59.645290 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1147 22:23:59.694593 # Registered handlers for all signals.
1148 22:23:59.695070 # Detected MINSTKSIGSZ:10000
1149 22:23:59.695182 # Testcase initialized.
1150 22:23:59.695276 # uc context validated.
1151 22:23:59.695365 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1152 22:23:59.695454 # Handled SIG_COPYCTX
1153 22:23:59.695542 # Available space:3536
1154 22:23:59.695631 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1155 22:23:59.695737 # SIG_OK -- SP:0xFFFFCA5E75D0 si_addr@:0xffffca5e75d0 si_code:2 token@:0xffffca5e6370 offset:-4704
1156 22:23:59.695834 # ==>> completed. PASS(1)
1157 22:23:59.695921 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1158 22:23:59.696008 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCA5E6370
1159 22:23:59.703555 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1160 22:23:59.749041 # selftests: arm64: fake_sigreturn_misaligned_sp
1161 22:23:59.799553 # Registered handlers for all signals.
1162 22:23:59.799884 # Detected MINSTKSIGSZ:10000
1163 22:23:59.800297 # Testcase initialized.
1164 22:23:59.800453 # uc context validated.
1165 22:23:59.800578 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1166 22:23:59.800698 # Handled SIG_COPYCTX
1167 22:23:59.802350 # SIG_OK -- SP:0xFFFFF7604793 si_addr@:0xfffff7604793 si_code:2 token@:0xfffff7604793 offset:0
1168 22:23:59.802510 # ==>> completed. PASS(1)
1169 22:23:59.802841 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1170 22:23:59.802975 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF7604793
1171 22:23:59.809112 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1172 22:23:59.855201 # selftests: arm64: fake_sigreturn_missing_fpsimd
1173 22:23:59.908285 # Registered handlers for all signals.
1174 22:23:59.908580 # Detected MINSTKSIGSZ:10000
1175 22:23:59.908949 # Testcase initialized.
1176 22:23:59.909093 # uc context validated.
1177 22:23:59.909226 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1178 22:23:59.909350 # Handled SIG_COPYCTX
1179 22:23:59.909474 # Mangling template header. Spare space:4096
1180 22:23:59.909592 # Using badly built context - ERR: Missing FPSIMD
1181 22:23:59.909752 # SIG_OK -- SP:0xFFFFC82A01E0 si_addr@:0xffffc82a01e0 si_code:2 token@:0xffffc829ef80 offset:-4704
1182 22:23:59.909880 # ==>> completed. PASS(1)
1183 22:23:59.909998 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1184 22:23:59.910117 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC829EF80
1185 22:23:59.918192 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1186 22:23:59.966184 # selftests: arm64: fake_sigreturn_sme_change_vl
1187 22:24:00.015691 # Registered handlers for all signals.
1188 22:24:00.017630 # Detected MINSTKSIGSZ:10000
1189 22:24:00.017847 # Required Features: [ SME ] supported
1190 22:24:00.018034 # Incompatible Features: [] absent
1191 22:24:00.018258 # Testcase initialized.
1192 22:24:00.018416 # uc context validated.
1193 22:24:00.018545 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1194 22:24:00.018675 # Handled SIG_COPYCTX
1195 22:24:00.018803 # Attempting to change VL from 16 to 256
1196 22:24:00.018957 # SIG_OK -- SP:0xFFFFCC73DB00 si_addr@:0xffffcc73db00 si_code:2 token@:0xffffcc73c8a0 offset:-4704
1197 22:24:00.019092 # ==>> completed. PASS(1)
1198 22:24:00.019220 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1199 22:24:00.019349 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCC73C8A0
1200 22:24:00.025139 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1201 22:24:00.069626 # selftests: arm64: fake_sigreturn_sve_change_vl
1202 22:24:00.118713 # Registered handlers for all signals.
1203 22:24:00.119180 # Detected MINSTKSIGSZ:10000
1204 22:24:00.119288 # Required Features: [ SVE ] supported
1205 22:24:00.119382 # Incompatible Features: [] absent
1206 22:24:00.119472 # Testcase initialized.
1207 22:24:00.119560 # uc context validated.
1208 22:24:00.119664 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1209 22:24:00.119756 # Handled SIG_COPYCTX
1210 22:24:00.121633 # Attempting to change VL from 16 to 256
1211 22:24:00.121950 # SIG_OK -- SP:0xFFFFD70F9EC0 si_addr@:0xffffd70f9ec0 si_code:2 token@:0xffffd70f8c60 offset:-4704
1212 22:24:00.122059 # ==>> completed. PASS(1)
1213 22:24:00.122166 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1214 22:24:00.122257 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD70F8C60
1215 22:24:00.128905 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1216 22:24:00.175139 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1217 22:24:00.223128 # Registered handlers for all signals.
1218 22:24:00.223411 # Detected MINSTKSIGSZ:10000
1219 22:24:00.224675 # Testcase initialized.
1220 22:24:00.225115 # uc context validated.
1221 22:24:00.225289 # Handled SIG_TRIG
1222 22:24:00.225463 # SIG_OK -- SP:0xFFFFF5534C30 si_addr@:0xfffff5534c30 si_code:2 token@:(nil) offset:-281474797620272
1223 22:24:00.225616 # ==>> completed. PASS(1)
1224 22:24:00.225817 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1225 22:24:00.232061 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1226 22:24:00.276909 # selftests: arm64: mangle_pstate_invalid_daif_bits
1227 22:24:00.325055 # Registered handlers for all signals.
1228 22:24:00.325288 # Detected MINSTKSIGSZ:10000
1229 22:24:00.325383 # Testcase initialized.
1230 22:24:00.325469 # uc context validated.
1231 22:24:00.325556 # Handled SIG_TRIG
1232 22:24:00.325670 # SIG_OK -- SP:0xFFFFE2526BD0 si_addr@:0xffffe2526bd0 si_code:2 token@:(nil) offset:-281474478795728
1233 22:24:00.325769 # ==>> completed. PASS(1)
1234 22:24:00.325860 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1235 22:24:00.333390 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1236 22:24:00.377354 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1237 22:24:00.424992 # Registered handlers for all signals.
1238 22:24:00.425241 # Detected MINSTKSIGSZ:10000
1239 22:24:00.425334 # Testcase initialized.
1240 22:24:00.425630 # uc context validated.
1241 22:24:00.425737 # Handled SIG_TRIG
1242 22:24:00.425829 # SIG_OK -- SP:0xFFFFC5A35C90 si_addr@:0xffffc5a35c90 si_code:2 token@:(nil) offset:-281473997560976
1243 22:24:00.425922 # ==>> completed. PASS(1)
1244 22:24:00.426031 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1245 22:24:00.433177 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1246 22:24:00.478243 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1247 22:24:00.526404 # Registered handlers for all signals.
1248 22:24:00.526635 # Detected MINSTKSIGSZ:10000
1249 22:24:00.526735 # Testcase initialized.
1250 22:24:00.526824 # uc context validated.
1251 22:24:00.526910 # Handled SIG_TRIG
1252 22:24:00.528612 # SIG_OK -- SP:0xFFFFCD86C0E0 si_addr@:0xffffcd86c0e0 si_code:2 token@:(nil) offset:-281474129903840
1253 22:24:00.528911 # ==>> completed. PASS(1)
1254 22:24:00.529009 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1255 22:24:00.535373 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1256 22:24:00.580747 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1257 22:24:00.628774 # Registered handlers for all signals.
1258 22:24:00.629027 # Detected MINSTKSIGSZ:10000
1259 22:24:00.629119 # Testcase initialized.
1260 22:24:00.629206 # uc context validated.
1261 22:24:00.629505 # Handled SIG_TRIG
1262 22:24:00.629613 # SIG_OK -- SP:0xFFFFEAAF60F0 si_addr@:0xffffeaaf60f0 si_code:2 token@:(nil) offset:-281474619105520
1263 22:24:00.629727 # ==>> completed. PASS(1)
1264 22:24:00.629820 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1265 22:24:00.637089 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1266 22:24:00.681595 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1267 22:24:00.729130 # Registered handlers for all signals.
1268 22:24:00.729598 # Detected MINSTKSIGSZ:10000
1269 22:24:00.729713 # Testcase initialized.
1270 22:24:00.729803 # uc context validated.
1271 22:24:00.729887 # Handled SIG_TRIG
1272 22:24:00.729966 # SIG_OK -- SP:0xFFFFCF70E100 si_addr@:0xffffcf70e100 si_code:2 token@:(nil) offset:-281474162024704
1273 22:24:00.730043 # ==>> completed. PASS(1)
1274 22:24:00.730135 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1275 22:24:00.738021 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1276 22:24:00.782566 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1277 22:24:00.830300 # Registered handlers for all signals.
1278 22:24:00.830544 # Detected MINSTKSIGSZ:10000
1279 22:24:00.830639 # Testcase initialized.
1280 22:24:00.830949 # uc context validated.
1281 22:24:00.831056 # Handled SIG_TRIG
1282 22:24:00.831148 # SIG_OK -- SP:0xFFFFFD4C67B0 si_addr@:0xfffffd4c67b0 si_code:2 token@:(nil) offset:-281474931386288
1283 22:24:00.831238 # ==>> completed. PASS(1)
1284 22:24:00.831343 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1285 22:24:00.839327 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1286 22:24:00.884021 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1287 22:24:00.932806 # Registered handlers for all signals.
1288 22:24:00.933037 # Detected MINSTKSIGSZ:10000
1289 22:24:00.933130 # Testcase initialized.
1290 22:24:00.933218 # uc context validated.
1291 22:24:00.933306 # Handled SIG_TRIG
1292 22:24:00.933412 # SIG_OK -- SP:0xFFFFC0378370 si_addr@:0xffffc0378370 si_code:2 token@:(nil) offset:-281473906606960
1293 22:24:00.933505 # ==>> completed. PASS(1)
1294 22:24:00.933594 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1295 22:24:00.942441 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1296 22:24:00.988716 # selftests: arm64: sme_trap_no_sm
1297 22:24:01.103768 # Registered handlers for all signals.
1298 22:24:01.104326 # Detected MINSTKSIGSZ:10000
1299 22:24:01.104492 # Required Features: [ SME ] supported
1300 22:24:01.104619 # Incompatible Features: [] absent
1301 22:24:01.104738 # Testcase initialized.
1302 22:24:01.104856 # SIG_OK -- SP:0xFFFFECD24080 si_addr@:0xaaaabf732514 si_code:1 token@:(nil) offset:-187650333156628
1303 22:24:01.104974 # ==>> completed. PASS(1)
1304 22:24:01.105153 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1305 22:24:01.122781 ok 19 selftests: arm64: sme_trap_no_sm
1306 22:24:01.212585 # selftests: arm64: sme_trap_non_streaming
1307 22:24:01.272706 # Registered handlers for all signals.
1308 22:24:01.272953 # Detected MINSTKSIGSZ:10000
1309 22:24:01.273047 # Required Features: [] NOT supported
1310 22:24:01.273346 # Incompatible Features: [] supported
1311 22:24:01.273445 # ==>> completed. SKIP.
1312 22:24:01.275320 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1313 22:24:01.282739 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1314 22:24:01.332097 # selftests: arm64: sme_trap_za
1315 22:24:01.381493 # Registered handlers for all signals.
1316 22:24:01.381752 # Detected MINSTKSIGSZ:10000
1317 22:24:01.382058 # Testcase initialized.
1318 22:24:01.382164 # SIG_OK -- SP:0xFFFFC4D2A950 si_addr@:0xaaaad9702510 si_code:1 token@:(nil) offset:-187650769167632
1319 22:24:01.382258 # ==>> completed. PASS(1)
1320 22:24:01.382348 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1321 22:24:01.389027 ok 21 selftests: arm64: sme_trap_za
1322 22:24:01.437224 # selftests: arm64: sme_vl
1323 22:24:01.490580 # Registered handlers for all signals.
1324 22:24:01.490907 # Detected MINSTKSIGSZ:10000
1325 22:24:01.491095 # Required Features: [ SME ] supported
1326 22:24:01.491493 # Incompatible Features: [] absent
1327 22:24:01.491652 # Testcase initialized.
1328 22:24:01.491804 # uc context validated.
1329 22:24:01.491949 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1330 22:24:01.492093 # Handled SIG_COPYCTX
1331 22:24:01.492239 # got expected VL 32
1332 22:24:01.492427 # ==>> completed. PASS(1)
1333 22:24:01.492617 # # SME VL :: Check that we get the right SME VL reported
1334 22:24:01.497930 ok 22 selftests: arm64: sme_vl
1335 22:24:01.547598 # selftests: arm64: ssve_regs
1336 22:24:01.739394 # Registered handlers for all signals.
1337 22:24:01.739788 # Detected MINSTKSIGSZ:10000
1338 22:24:01.740212 # Required Features: [ SME FA64 ] supported
1339 22:24:01.740376 # Incompatible Features: [] absent
1340 22:24:01.740503 # Testcase initialized.
1341 22:24:01.740624 # Testing VL 256
1342 22:24:01.740743 # Validating EXTRA...
1343 22:24:01.740860 # uc context validated.
1344 22:24:01.740976 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1345 22:24:01.741136 # Handled SIG_COPYCTX
1346 22:24:01.741604 # Got expected size 8752 and VL 256
1347 22:24:01.741819 # Testing VL 128
1348 22:24:01.742253 # Validating EXTRA...
1349 22:24:01.742447 # uc context validated.
1350 22:24:01.742659 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1351 22:24:01.742905 # Handled SIG_COPYCTX
1352 22:24:01.743130 # Got expected size 4384 and VL 128
1353 22:24:01.743335 # Testing VL 64
1354 22:24:01.743532 # uc context validated.
1355 22:24:01.743703 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1356 22:24:01.743833 # Handled SIG_COPYCTX
1357 22:24:01.743955 # Got expected size 2208 and VL 64
1358 22:24:01.744073 # Testing VL 32
1359 22:24:01.744190 # uc context validated.
1360 22:24:01.744308 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1361 22:24:01.744424 # Handled SIG_COPYCTX
1362 22:24:01.744540 # Got expected size 1120 and VL 32
1363 22:24:01.744656 # Testing VL 16
1364 22:24:01.744772 # uc context validated.
1365 22:24:01.744887 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1366 22:24:01.745003 # Handled SIG_COPYCTX
1367 22:24:01.745166 # Got expected size 576 and VL 16
1368 22:24:01.745300 # ==>> completed. PASS(1)
1369 22:24:01.745418 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1370 22:24:01.750175 ok 23 selftests: arm64: ssve_regs
1371 22:24:01.794661 # selftests: arm64: sve_regs
1372 22:24:02.223708 # Registered handlers for all signals.
1373 22:24:02.223938 # Detected MINSTKSIGSZ:10000
1374 22:24:02.224031 # Required Features: [ SVE ] supported
1375 22:24:02.224115 # Incompatible Features: [] absent
1376 22:24:02.224218 # Testcase initialized.
1377 22:24:02.224331 # Testing VL 256
1378 22:24:02.224422 # Validating EXTRA...
1379 22:24:02.224507 # uc context validated.
1380 22:24:02.224590 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1381 22:24:02.224676 # Handled SIG_COPYCTX
1382 22:24:02.224764 # Got expected size 8752 and VL 256
1383 22:24:02.224846 # Testing VL 240
1384 22:24:02.224929 # Validating EXTRA...
1385 22:24:02.225012 # uc context validated.
1386 22:24:02.225115 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1387 22:24:02.225199 # Handled SIG_COPYCTX
1388 22:24:02.225280 # Got expected size 8208 and VL 240
1389 22:24:02.225360 # Testing VL 224
1390 22:24:02.225443 # Validating EXTRA...
1391 22:24:02.225528 # uc context validated.
1392 22:24:02.225612 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1393 22:24:02.225702 # Handled SIG_COPYCTX
1394 22:24:02.226229 # Got expected size 7664 and VL 224
1395 22:24:02.226322 # Testing VL 208
1396 22:24:02.226404 # Validating EXTRA...
1397 22:24:02.226484 # uc context validated.
1398 22:24:02.226595 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1399 22:24:02.226685 # Handled SIG_COPYCTX
1400 22:24:02.226768 # Got expected size 7120 and VL 208
1401 22:24:02.226849 # Testing VL 192
1402 22:24:02.226928 # Validating EXTRA...
1403 22:24:02.227008 # uc context validated.
1404 22:24:02.227092 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1405 22:24:02.227176 # Handled SIG_COPYCTX
1406 22:24:02.227260 # Got expected size 6576 and VL 192
1407 22:24:02.227345 # Testing VL 176
1408 22:24:02.227427 # Validating EXTRA...
1409 22:24:02.227508 # uc context validated.
1410 22:24:02.227593 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1411 22:24:02.227680 # Handled SIG_COPYCTX
1412 22:24:02.227763 # Got expected size 6032 and VL 176
1413 22:24:02.227845 # Testing VL 160
1414 22:24:02.227925 # Validating EXTRA...
1415 22:24:02.228007 # uc context validated.
1416 22:24:02.228091 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1417 22:24:02.228174 # Handled SIG_COPYCTX
1418 22:24:02.228254 # Got expected size 5488 and VL 160
1419 22:24:02.228336 # Testing VL 144
1420 22:24:02.228438 # Validating EXTRA...
1421 22:24:02.228527 # uc context validated.
1422 22:24:02.228619 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1423 22:24:02.228702 # Handled SIG_COPYCTX
1424 22:24:02.228805 # Got expected size 4944 and VL 144
1425 22:24:02.228894 # Testing VL 128
1426 22:24:02.228975 # Validating EXTRA...
1427 22:24:02.235579 # uc context validated.
1428 22:24:02.236030 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1429 22:24:02.236242 # Handled SIG_COPYCTX
1430 22:24:02.236412 # Got expected size 4384 and VL 128
1431 22:24:02.236584 # Testing VL 112
1432 22:24:02.236757 # Validating EXTRA...
1433 22:24:02.236929 # uc context validated.
1434 22:24:02.237130 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1435 22:24:02.237285 # Handled SIG_COPYCTX
1436 22:24:02.237437 # Got expected size 3840 and VL 112
1437 22:24:02.237576 # Testing VL 96
1438 22:24:02.237748 # uc context validated.
1439 22:24:02.237906 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1440 22:24:02.238074 # Handled SIG_COPYCTX
1441 22:24:02.238242 # Got expected size 3296 and VL 96
1442 22:24:02.238403 # Testing VL 80
1443 22:24:02.238559 # uc context validated.
1444 22:24:02.238717 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1445 22:24:02.238840 # Handled SIG_COPYCTX
1446 22:24:02.238956 # Got expected size 2752 and VL 80
1447 22:24:02.239073 # Testing VL 64
1448 22:24:02.239188 # uc context validated.
1449 22:24:02.239341 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1450 22:24:02.239502 # Handled SIG_COPYCTX
1451 22:24:02.239625 # Got expected size 2208 and VL 64
1452 22:24:02.239737 # Testing VL 48
1453 22:24:02.239849 # uc context validated.
1454 22:24:02.239961 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1455 22:24:02.240073 # Handled SIG_COPYCTX
1456 22:24:02.240184 # Got expected size 1664 and VL 48
1457 22:24:02.240295 # Testing VL 32
1458 22:24:02.240405 # uc context validated.
1459 22:24:02.240548 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1460 22:24:02.240710 # Handled SIG_COPYCTX
1461 22:24:02.240833 # Got expected size 1120 and VL 32
1462 22:24:02.240951 # Testing VL 16
1463 22:24:02.241067 # uc context validated.
1464 22:24:02.241184 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1465 22:24:02.241299 # Handled SIG_COPYCTX
1466 22:24:02.241416 # Got expected size 576 and VL 16
1467 22:24:02.241533 # ==>> completed. PASS(1)
1468 22:24:02.241691 # # SVE registers :: Check that we get the right SVE registers reported
1469 22:24:02.243415 ok 24 selftests: arm64: sve_regs
1470 22:24:02.289185 # selftests: arm64: sve_vl
1471 22:24:02.341043 # Registered handlers for all signals.
1472 22:24:02.341495 # Detected MINSTKSIGSZ:10000
1473 22:24:02.341598 # Required Features: [ SVE ] supported
1474 22:24:02.341690 # Incompatible Features: [] absent
1475 22:24:02.341829 # Testcase initialized.
1476 22:24:02.341919 # uc context validated.
1477 22:24:02.341998 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1478 22:24:02.342080 # Handled SIG_COPYCTX
1479 22:24:02.342160 # got expected VL 64
1480 22:24:02.342444 # ==>> completed. PASS(1)
1481 22:24:02.342545 # # SVE VL :: Check that we get the right SVE VL reported
1482 22:24:02.349463 ok 25 selftests: arm64: sve_vl
1483 22:24:02.395613 # selftests: arm64: za_no_regs
1484 22:24:02.457329 # Registered handlers for all signals.
1485 22:24:02.457577 # Detected MINSTKSIGSZ:10000
1486 22:24:02.457870 # Required Features: [ SME ] supported
1487 22:24:02.457978 # Incompatible Features: [] absent
1488 22:24:02.458069 # Testcase initialized.
1489 22:24:02.458158 # Testing VL 256
1490 22:24:02.458248 # uc context validated.
1491 22:24:02.458336 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1492 22:24:02.458428 # Handled SIG_COPYCTX
1493 22:24:02.458518 # Got expected size 16 and VL 256
1494 22:24:02.458608 # Testing VL 128
1495 22:24:02.458716 # uc context validated.
1496 22:24:02.458808 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1497 22:24:02.458897 # Handled SIG_COPYCTX
1498 22:24:02.458984 # Got expected size 16 and VL 128
1499 22:24:02.459072 # Testing VL 64
1500 22:24:02.459158 # uc context validated.
1501 22:24:02.459246 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1502 22:24:02.459332 # Handled SIG_COPYCTX
1503 22:24:02.459420 # Got expected size 16 and VL 64
1504 22:24:02.459507 # Testing VL 32
1505 22:24:02.459593 # uc context validated.
1506 22:24:02.466338 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1507 22:24:02.466484 # Handled SIG_COPYCTX
1508 22:24:02.466582 # Got expected size 16 and VL 32
1509 22:24:02.466689 # Testing VL 16
1510 22:24:02.466777 # uc context validated.
1511 22:24:02.466864 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1512 22:24:02.467708 # Handled SIG_COPYCTX
1513 22:24:02.467818 # Got expected size 16 and VL 16
1514 22:24:02.467913 # ==>> completed. PASS(1)
1515 22:24:02.468019 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1516 22:24:02.468327 ok 26 selftests: arm64: za_no_regs
1517 22:24:02.513471 # selftests: arm64: za_regs
1518 22:24:02.777930 # Registered handlers for all signals.
1519 22:24:02.778168 # Detected MINSTKSIGSZ:10000
1520 22:24:02.778264 # Required Features: [ SME ] supported
1521 22:24:02.778354 # Incompatible Features: [] absent
1522 22:24:02.778459 # Testcase initialized.
1523 22:24:02.778549 # Testing VL 256
1524 22:24:02.778636 # Validating EXTRA...
1525 22:24:02.778721 # uc context validated.
1526 22:24:02.782944 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1527 22:24:02.783063 # Handled SIG_COPYCTX
1528 22:24:02.783149 # Got expected size 65552 and VL 256
1529 22:24:02.783232 # Testing VL 128
1530 22:24:02.783335 # Validating EXTRA...
1531 22:24:02.783424 # uc context validated.
1532 22:24:02.783508 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1533 22:24:02.783591 # Handled SIG_COPYCTX
1534 22:24:02.783672 # Got expected size 16400 and VL 128
1535 22:24:02.783757 # Testing VL 64
1536 22:24:02.783864 # Validating EXTRA...
1537 22:24:02.783957 # uc context validated.
1538 22:24:02.784041 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1539 22:24:02.784129 # Handled SIG_COPYCTX
1540 22:24:02.784214 # Got expected size 4112 and VL 64
1541 22:24:02.784307 # Testing VL 32
1542 22:24:02.784391 # uc context validated.
1543 22:24:02.784472 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1544 22:24:02.784573 # Handled SIG_COPYCTX
1545 22:24:02.784664 # Got expected size 1040 and VL 32
1546 22:24:02.784752 # Testing VL 16
1547 22:24:02.784836 # uc context validated.
1548 22:24:02.784918 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1549 22:24:02.784999 # Handled SIG_COPYCTX
1550 22:24:02.785080 # Got expected size 272 and VL 16
1551 22:24:02.785161 # ==>> completed. PASS(1)
1552 22:24:02.785242 # # ZA register :: Check that we get the right ZA registers reported
1553 22:24:02.805955 ok 27 selftests: arm64: za_regs
1554 22:24:02.861400 # selftests: arm64: pac
1555 22:24:03.024862 # TAP version 13
1556 22:24:03.025065 # 1..7
1557 22:24:03.025159 # # Starting 7 tests from 1 test cases.
1558 22:24:03.025437 # # RUN global.corrupt_pac ...
1559 22:24:03.025582 # # OK global.corrupt_pac
1560 22:24:03.025696 # ok 1 global.corrupt_pac
1561 22:24:03.025872 # # RUN global.pac_instructions_not_nop ...
1562 22:24:03.025977 # # OK global.pac_instructions_not_nop
1563 22:24:03.026092 # ok 2 global.pac_instructions_not_nop
1564 22:24:03.026184 # # RUN global.pac_instructions_not_nop_generic ...
1565 22:24:03.033304 # # OK global.pac_instructions_not_nop_generic
1566 22:24:03.033480 # ok 3 global.pac_instructions_not_nop_generic
1567 22:24:03.033817 # # RUN global.single_thread_different_keys ...
1568 22:24:03.033923 # # OK global.single_thread_different_keys
1569 22:24:03.034016 # ok 4 global.single_thread_different_keys
1570 22:24:03.034105 # # RUN global.exec_changed_keys ...
1571 22:24:03.034549 # # OK global.exec_changed_keys
1572 22:24:03.034859 # ok 5 global.exec_changed_keys
1573 22:24:03.034962 # # RUN global.context_switch_keep_keys ...
1574 22:24:03.035062 # # OK global.context_switch_keep_keys
1575 22:24:03.035164 # ok 6 global.context_switch_keep_keys
1576 22:24:03.035249 # # RUN global.context_switch_keep_keys_generic ...
1577 22:24:03.035349 # # OK global.context_switch_keep_keys_generic
1578 22:24:03.035640 # ok 7 global.context_switch_keep_keys_generic
1579 22:24:03.035743 # # PASSED: 7 / 7 tests passed.
1580 22:24:03.035829 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1581 22:24:03.035927 ok 28 selftests: arm64: pac
1582 22:24:03.090199 # selftests: arm64: fp-stress
1583 22:24:19.754523 # TAP version 13
1584 22:24:19.754758 # 1..27
1585 22:24:19.755065 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1586 22:24:19.755172 # # Will run for 10s
1587 22:24:19.755258 # # Started FPSIMD-0-0
1588 22:24:19.755337 # # Started SVE-VL-256-0
1589 22:24:19.755414 # # Started SVE-VL-240-0
1590 22:24:19.755491 # # Started SVE-VL-224-0
1591 22:24:19.755567 # # Started SVE-VL-208-0
1592 22:24:19.755642 # # Started SVE-VL-192-0
1593 22:24:19.755734 # # Started SVE-VL-176-0
1594 22:24:19.755827 # # Started SVE-VL-160-0
1595 22:24:19.755907 # # Started SVE-VL-144-0
1596 22:24:19.755996 # # Started SVE-VL-128-0
1597 22:24:19.756088 # # Started SVE-VL-112-0
1598 22:24:19.756167 # # Started SVE-VL-96-0
1599 22:24:19.756257 # # Started SVE-VL-80-0
1600 22:24:19.756336 # # Started SVE-VL-64-0
1601 22:24:19.756425 # # Started SVE-VL-48-0
1602 22:24:19.756505 # # Started SVE-VL-32-0
1603 22:24:19.756593 # # Started SVE-VL-16-0
1604 22:24:19.756672 # # Started SSVE-VL-256-0
1605 22:24:19.756748 # # Started ZA-VL-256-0
1606 22:24:19.756836 # # Started SSVE-VL-128-0
1607 22:24:19.756915 # # Started ZA-VL-128-0
1608 22:24:19.756991 # # Started SSVE-VL-64-0
1609 22:24:19.757067 # # Started ZA-VL-64-0
1610 22:24:19.757156 # # Started SSVE-VL-32-0
1611 22:24:19.757235 # # Started ZA-VL-32-0
1612 22:24:19.757310 # # Started SSVE-VL-16-0
1613 22:24:19.757398 # # FPSIMD-0-0: Vector length: 128 bits
1614 22:24:19.757496 # # FPSIMD-0-0: PID: 906
1615 22:24:19.757587 # # Started ZA-VL-16-0
1616 22:24:19.757881 # # SVE-VL-208-0: Vector length: 1664 bits
1617 22:24:19.757966 # # SVE-VL-208-0: PID: 910
1618 22:24:19.758056 # # SVE-VL-224-0: Vector length: 1792 bits
1619 22:24:19.758148 # # SVE-VL-224-0: PID: 909
1620 22:24:19.758238 # # SVE-VL-240-0: Vector length: 1920 bits
1621 22:24:19.758580 # # SVE-VL-256-0: Vector length: 2048 bits
1622 22:24:19.758665 # # SVE-VL-240-0: PID: 908
1623 22:24:19.758742 # # SVE-VL-256-0: PID: 907
1624 22:24:19.759010 # # SVE-VL-48-0: Vector length: 384 bits
1625 22:24:19.759092 # # SVE-VL-48-0: PID: 920
1626 22:24:19.759169 # # SVE-VL-16-0: Vector length: 128 bits
1627 22:24:19.759245 # # SVE-VL-16-0: PID: 922
1628 22:24:19.759324 # # SVE-VL-32-0: Vector length: 256 bits
1629 22:24:19.759414 # # SVE-VL-32-0: PID: 921
1630 22:24:19.759492 # # SVE-VL-176-0: Vector length: 1408 bits
1631 22:24:19.765852 # # SVE-VL-176-0: PID: 912
1632 22:24:19.766217 # # SVE-VL-112-0: Vector length: 896 bits
1633 22:24:19.766302 # # SVE-VL-112-0: PID: 916
1634 22:24:19.766380 # # SVE-VL-128-0: Vector length: 1024 bits
1635 22:24:19.766471 # # SVE-VL-128-0: PID: 915
1636 22:24:19.766550 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1637 22:24:19.766641 # # ZA-VL-64-0: PID: 928
1638 22:24:19.766720 # # SVE-VL-160-0: Vector length: 1280 bits
1639 22:24:19.766985 # # SVE-VL-160-0: PID: 913
1640 22:24:19.767067 # # SVE-VL-144-0: Vector length: 1152 bits
1641 22:24:19.767144 # # SVE-VL-144-0: PID: 914
1642 22:24:19.767233 # # SVE-VL-80-0: Vector length: 640 bits
1643 22:24:19.767312 # # SVE-VL-80-0: PID: 918
1644 22:24:19.771036 # # SVE-VL-64-0: Vector length: 512 bits
1645 22:24:19.771337 # # SVE-VL-64-0: PID: 919
1646 22:24:19.773208 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1647 22:24:19.773496 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1648 22:24:19.773583 # # SSVE-VL-256-0: PID: 923
1649 22:24:19.773858 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1650 22:24:19.773943 # # SSVE-VL-64-0: PID: 927
1651 22:24:19.774032 # # SVE-VL-192-0: Vector length: 1536 bits
1652 22:24:19.774124 # # ZA-VL-256-0: PID: 924
1653 22:24:19.774202 # # SVE-VL-192-0: PID: 911
1654 22:24:19.774289 # # SVE-VL-96-0: Vector length: 768 bits
1655 22:24:19.774367 # # SVE-VL-96-0: PID: 917
1656 22:24:19.774460 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1657 22:24:19.774555 # # SSVE-VL-128-0: PID: 925
1658 22:24:19.774831 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1659 22:24:19.774916 # # SSVE-VL-16-0: PID: 931
1660 22:24:19.775008 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1661 22:24:19.775101 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1662 22:24:19.776156 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1663 22:24:19.776631 # # SSVE-VL-32-0: PID: 929
1664 22:24:19.776844 # # ZA-VL-32-0: PID: 930
1665 22:24:19.777036 # # ZA-VL-16-0: PID: 932
1666 22:24:19.777250 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1667 22:24:19.777433 # # ZA-VL-128-0: PID: 926
1668 22:24:19.777598 # # Finishing up...
1669 22:24:19.777812 # ok 1 FPSIMD-0-0
1670 22:24:19.777968 # ok 2 SVE-VL-256-0
1671 22:24:19.778095 # ok 3 SVE-VL-240-0
1672 22:24:19.778262 # ok 4 SVE-VL-224-0
1673 22:24:19.778484 # ok 5 SVE-VL-208-0
1674 22:24:19.778696 # ok 6 SVE-VL-192-0
1675 22:24:19.778893 # ok 7 SVE-VL-176-0
1676 22:24:19.779103 # ok 8 SVE-VL-160-0
1677 22:24:19.779292 # ok 9 SVE-VL-144-0
1678 22:24:19.779466 # ok 10 SVE-VL-128-0
1679 22:24:19.779599 # ok 11 SVE-VL-112-0
1680 22:24:19.779734 # ok 12 SVE-VL-96-0
1681 22:24:19.779903 # ok 13 SVE-VL-80-0
1682 22:24:19.780029 # ok 14 SVE-VL-64-0
1683 22:24:19.780144 # ok 15 SVE-VL-48-0
1684 22:24:19.780257 # ok 16 SVE-VL-32-0
1685 22:24:19.780371 # ok 17 SVE-VL-16-0
1686 22:24:19.780484 # ok 18 SSVE-VL-256-0
1687 22:24:19.780596 # ok 19 ZA-VL-256-0
1688 22:24:19.780707 # ok 20 SSVE-VL-128-0
1689 22:24:19.780822 # ok 21 ZA-VL-128-0
1690 22:24:19.780973 # ok 22 SSVE-VL-64-0
1691 22:24:19.781094 # ok 23 ZA-VL-64-0
1692 22:24:19.781208 # ok 24 SSVE-VL-32-0
1693 22:24:19.781322 # ok 25 ZA-VL-32-0
1694 22:24:19.781435 # ok 26 SSVE-VL-16-0
1695 22:24:19.781547 # ok 27 ZA-VL-16-0
1696 22:24:19.781684 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=12066, signals=9
1697 22:24:19.781896 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=4957, signals=9
1698 22:24:19.782086 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=240, signals=9
1699 22:24:19.782272 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=474, signals=9
1700 22:24:19.782455 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=1851, signals=9
1701 22:24:19.782638 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=2976, signals=9
1702 22:24:19.800408 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=10554, signals=9
1703 22:24:19.800941 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=8159, signals=9
1704 22:24:19.801101 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=3304, signals=9
1705 22:24:19.801252 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3862, signals=9
1706 22:24:19.929408 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2711, signals=9
1707 22:24:19.930023 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=14092, signals=9
1708 22:24:19.930253 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=1849, signals=9
1709 22:24:19.930460 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=4377, signals=9
1710 22:24:19.930727 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2764, signals=9
1711 22:24:19.930919 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=7106, signals=9
1712 22:24:19.931098 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=8593, signals=9
1713 22:24:19.931297 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=4674, signals=9
1714 22:24:19.931440 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=5979, signals=9
1715 22:24:19.931564 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1684, signals=9
1716 22:24:19.941689 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2552, signals=9
1717 22:24:19.942089 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=6912, signals=9
1718 22:24:19.942206 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=2804, signals=9
1719 22:24:19.942318 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=3932, signals=9
1720 22:24:19.944933 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=5012, signals=9
1721 22:24:19.945156 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3383, signals=9
1722 22:24:19.945320 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=3487, signals=9
1723 22:24:19.945462 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1724 22:24:19.972797 ok 29 selftests: arm64: fp-stress
1725 22:24:20.153566 # selftests: arm64: sve-ptrace
1726 22:24:20.312636 # TAP version 13
1727 22:24:20.312863 # 1..4104
1728 22:24:20.312947 # # Parent is 949, child is 950
1729 22:24:20.313277 # ok 1 SVE FPSIMD set via SVE: 0
1730 22:24:20.313476 # ok 2 SVE get_fpsimd() gave same state
1731 22:24:20.313669 # ok 3 SVE SVE_PT_VL_INHERIT set
1732 22:24:20.313866 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1733 22:24:20.314045 # ok 5 Set SVE VL 16
1734 22:24:20.314216 # ok 6 Set and get SVE data for VL 16
1735 22:24:20.314433 # ok 7 Set and get FPSIMD data for SVE VL 16
1736 22:24:20.314578 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1737 22:24:20.314767 # ok 9 Set SVE VL 32
1738 22:24:20.314926 # ok 10 Set and get SVE data for VL 32
1739 22:24:20.315091 # ok 11 Set and get FPSIMD data for SVE VL 32
1740 22:24:20.315278 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1741 22:24:20.315410 # ok 13 Set SVE VL 48
1742 22:24:20.315526 # ok 14 Set and get SVE data for VL 48
1743 22:24:20.315655 # ok 15 Set and get FPSIMD data for SVE VL 48
1744 22:24:20.315773 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1745 22:24:20.315890 # ok 17 Set SVE VL 64
1746 22:24:20.316003 # ok 18 Set and get SVE data for VL 64
1747 22:24:20.316117 # ok 19 Set and get FPSIMD data for SVE VL 64
1748 22:24:20.316261 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1749 22:24:20.316385 # ok 21 Set SVE VL 80
1750 22:24:20.316501 # ok 22 Set and get SVE data for VL 80
1751 22:24:20.316616 # ok 23 Set and get FPSIMD data for SVE VL 80
1752 22:24:20.316731 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1753 22:24:20.316847 # ok 25 Set SVE VL 96
1754 22:24:20.316961 # ok 26 Set and get SVE data for VL 96
1755 22:24:20.317074 # ok 27 Set and get FPSIMD data for SVE VL 96
1756 22:24:20.318411 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1757 22:24:20.318744 # ok 29 Set SVE VL 112
1758 22:24:20.318935 # ok 30 Set and get SVE data for VL 112
1759 22:24:20.319106 # ok 31 Set and get FPSIMD data for SVE VL 112
1760 22:24:20.319246 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1761 22:24:20.319394 # ok 33 Set SVE VL 128
1762 22:24:20.319518 # ok 34 Set and get SVE data for VL 128
1763 22:24:20.319638 # ok 35 Set and get FPSIMD data for SVE VL 128
1764 22:24:20.319775 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1765 22:24:20.319966 # ok 37 Set SVE VL 144
1766 22:24:20.320163 # ok 38 Set and get SVE data for VL 144
1767 22:24:20.320367 # ok 39 Set and get FPSIMD data for SVE VL 144
1768 22:24:20.320530 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1769 22:24:20.320708 # ok 41 Set SVE VL 160
1770 22:24:20.320870 # ok 42 Set and get SVE data for VL 160
1771 22:24:20.321028 # ok 43 Set and get FPSIMD data for SVE VL 160
1772 22:24:20.321213 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1773 22:24:20.321384 # ok 45 Set SVE VL 176
1774 22:24:20.321538 # ok 46 Set and get SVE data for VL 176
1775 22:24:20.321719 # ok 47 Set and get FPSIMD data for SVE VL 176
1776 22:24:20.321951 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1777 22:24:20.322119 # ok 49 Set SVE VL 192
1778 22:24:20.322286 # ok 50 Set and get SVE data for VL 192
1779 22:24:20.322452 # ok 51 Set and get FPSIMD data for SVE VL 192
1780 22:24:20.322644 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1781 22:24:20.322869 # ok 53 Set SVE VL 208
1782 22:24:20.323059 # ok 54 Set and get SVE data for VL 208
1783 22:24:20.323229 # ok 55 Set and get FPSIMD data for SVE VL 208
1784 22:24:20.323397 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1785 22:24:20.323527 # ok 57 Set SVE VL 224
1786 22:24:20.323644 # ok 58 Set and get SVE data for VL 224
1787 22:24:20.323759 # ok 59 Set and get FPSIMD data for SVE VL 224
1788 22:24:20.323877 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1789 22:24:20.323993 # ok 61 Set SVE VL 240
1790 22:24:20.324135 # ok 62 Set and get SVE data for VL 240
1791 22:24:20.324259 # ok 63 Set and get FPSIMD data for SVE VL 240
1792 22:24:20.328969 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1793 22:24:20.329372 # ok 65 Set SVE VL 256
1794 22:24:20.329532 # ok 66 Set and get SVE data for VL 256
1795 22:24:20.329676 # ok 67 Set and get FPSIMD data for SVE VL 256
1796 22:24:20.329837 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1797 22:24:20.330025 # ok 69 Set SVE VL 272
1798 22:24:20.330153 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1799 22:24:20.330279 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1800 22:24:20.330425 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1801 22:24:20.330575 # ok 73 Set SVE VL 288
1802 22:24:20.330709 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1803 22:24:20.330910 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1804 22:24:20.331120 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1805 22:24:20.331292 # ok 77 Set SVE VL 304
1806 22:24:20.331439 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1807 22:24:20.331581 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1808 22:24:20.331734 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1809 22:24:20.331907 # ok 81 Set SVE VL 320
1810 22:24:20.332081 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1811 22:24:20.332316 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1812 22:24:20.332492 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1813 22:24:20.332657 # ok 85 Set SVE VL 336
1814 22:24:20.332853 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1815 22:24:20.333025 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1816 22:24:20.333171 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1817 22:24:20.333313 # ok 89 Set SVE VL 352
1818 22:24:20.333453 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1819 22:24:20.333593 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1820 22:24:20.333744 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1821 22:24:20.333889 # ok 93 Set SVE VL 368
1822 22:24:20.334083 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1823 22:24:20.334280 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1824 22:24:20.334420 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1825 22:24:20.334556 # ok 97 Set SVE VL 384
1826 22:24:20.334707 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1827 22:24:20.334828 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1828 22:24:20.334960 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1829 22:24:20.335112 # ok 101 Set SVE VL 400
1830 22:24:20.335238 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1831 22:24:20.335383 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1832 22:24:20.335505 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1833 22:24:20.335623 # ok 105 Set SVE VL 416
1834 22:24:20.335736 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1835 22:24:20.335851 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1836 22:24:20.335967 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1837 22:24:20.336082 # ok 109 Set SVE VL 432
1838 22:24:20.336197 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1839 22:24:20.336526 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1840 22:24:20.336654 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1841 22:24:20.344154 # ok 113 Set SVE VL 448
1842 22:24:20.344602 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1843 22:24:20.344792 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1844 22:24:20.344968 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1845 22:24:20.345132 # ok 117 Set SVE VL 464
1846 22:24:20.345310 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1847 22:24:20.345463 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1848 22:24:20.345622 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1849 22:24:20.345794 # ok 121 Set SVE VL 480
1850 22:24:20.345948 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1851 22:24:20.346108 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1852 22:24:20.346283 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1853 22:24:20.346469 # ok 125 Set SVE VL 496
1854 22:24:20.346605 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1855 22:24:20.346747 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1856 22:24:20.346949 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1857 22:24:20.347115 # ok 129 Set SVE VL 512
1858 22:24:20.347238 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1859 22:24:20.347355 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1860 22:24:20.347471 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1861 22:24:20.347585 # ok 133 Set SVE VL 528
1862 22:24:20.347699 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1863 22:24:20.347814 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1864 22:24:20.347958 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1865 22:24:20.348082 # ok 137 Set SVE VL 544
1866 22:24:20.348200 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1867 22:24:20.348316 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1868 22:24:20.348430 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1869 22:24:20.348547 # ok 141 Set SVE VL 560
1870 22:24:20.353992 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1871 22:24:20.354404 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1872 22:24:20.354619 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1873 22:24:20.354814 # ok 145 Set SVE VL 576
1874 22:24:20.354993 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1875 22:24:20.355183 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1876 22:24:20.355316 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1877 22:24:20.355438 # ok 149 Set SVE VL 592
1878 22:24:20.355555 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1879 22:24:20.355671 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1880 22:24:20.355863 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1881 22:24:20.356026 # ok 153 Set SVE VL 608
1882 22:24:20.356203 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1883 22:24:20.356444 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1884 22:24:20.356636 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1885 22:24:20.356813 # ok 157 Set SVE VL 624
1886 22:24:20.357014 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1887 22:24:20.357236 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1888 22:24:20.357424 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1889 22:24:20.357612 # ok 161 Set SVE VL 640
1890 22:24:20.357799 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1891 22:24:20.357960 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1892 22:24:20.358153 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1893 22:24:20.358315 # ok 165 Set SVE VL 656
1894 22:24:20.358458 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1895 22:24:20.358603 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1896 22:24:20.358736 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1897 22:24:20.358886 # ok 169 Set SVE VL 672
1898 22:24:20.359051 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1899 22:24:20.359186 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1900 22:24:20.359306 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1901 22:24:20.359423 # ok 173 Set SVE VL 688
1902 22:24:20.359536 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1903 22:24:20.359651 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1904 22:24:20.359766 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1905 22:24:20.359881 # ok 177 Set SVE VL 704
1906 22:24:20.359995 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1907 22:24:20.360108 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1908 22:24:20.360223 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1909 22:24:20.360338 # ok 181 Set SVE VL 720
1910 22:24:20.365993 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1911 22:24:20.366296 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1912 22:24:20.366398 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1913 22:24:20.366481 # ok 185 Set SVE VL 736
1914 22:24:20.366574 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1915 22:24:20.366655 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1916 22:24:20.366733 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1917 22:24:20.366824 # ok 189 Set SVE VL 752
1918 22:24:20.366905 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1919 22:24:20.367001 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1920 22:24:20.367082 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1921 22:24:20.367172 # ok 193 Set SVE VL 768
1922 22:24:20.367644 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1923 22:24:20.367926 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1924 22:24:20.368027 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1925 22:24:20.368108 # ok 197 Set SVE VL 784
1926 22:24:20.368199 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1927 22:24:20.368293 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1928 22:24:20.368374 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1929 22:24:20.368464 # ok 201 Set SVE VL 800
1930 22:24:20.368543 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1931 22:24:20.368638 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1932 22:24:20.368730 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1933 22:24:20.368810 # ok 205 Set SVE VL 816
1934 22:24:20.368899 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1935 22:24:20.369190 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1936 22:24:20.369276 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1937 22:24:20.369354 # ok 209 Set SVE VL 832
1938 22:24:20.369433 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1939 22:24:20.369525 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1940 22:24:20.369604 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1941 22:24:20.369690 # ok 213 Set SVE VL 848
1942 22:24:20.369782 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1943 22:24:20.369870 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1944 22:24:20.369950 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1945 22:24:20.370041 # ok 217 Set SVE VL 864
1946 22:24:20.370120 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1947 22:24:20.370211 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1948 22:24:20.370305 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1949 22:24:20.370383 # ok 221 Set SVE VL 880
1950 22:24:20.370471 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1951 22:24:20.370550 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1952 22:24:20.370638 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1953 22:24:20.370716 # ok 225 Set SVE VL 896
1954 22:24:20.370804 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1955 22:24:20.370894 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1956 22:24:20.371181 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1957 22:24:20.371283 # ok 229 Set SVE VL 912
1958 22:24:20.380292 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1959 22:24:20.380534 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1960 22:24:20.380764 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1961 22:24:20.380967 # ok 233 Set SVE VL 928
1962 22:24:20.381152 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1963 22:24:20.381343 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1964 22:24:20.381547 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1965 22:24:20.381731 # ok 237 Set SVE VL 944
1966 22:24:20.381895 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1967 22:24:20.382055 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1968 22:24:20.382209 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1969 22:24:20.382361 # ok 241 Set SVE VL 960
1970 22:24:20.382503 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1971 22:24:20.382660 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1972 22:24:20.382819 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1973 22:24:20.382981 # ok 245 Set SVE VL 976
1974 22:24:20.383573 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1975 22:24:20.383704 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1976 22:24:20.383821 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1977 22:24:20.383936 # ok 249 Set SVE VL 992
1978 22:24:20.384051 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1979 22:24:20.384164 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1980 22:24:20.384275 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1981 22:24:20.384388 # ok 253 Set SVE VL 1008
1982 22:24:20.384500 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1983 22:24:20.384613 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1984 22:24:20.384725 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1985 22:24:20.384838 # ok 257 Set SVE VL 1024
1986 22:24:20.384949 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1987 22:24:20.385062 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1988 22:24:20.385173 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1989 22:24:20.385284 # ok 261 Set SVE VL 1040
1990 22:24:20.385395 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1991 22:24:20.388280 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1992 22:24:20.388734 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1993 22:24:20.388951 # ok 265 Set SVE VL 1056
1994 22:24:20.389140 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1995 22:24:20.389371 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1996 22:24:20.389601 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1997 22:24:20.389788 # ok 269 Set SVE VL 1072
1998 22:24:20.389936 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
1999 22:24:20.390093 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
2000 22:24:20.390298 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2001 22:24:20.390474 # ok 273 Set SVE VL 1088
2002 22:24:20.390663 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2003 22:24:20.390792 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2004 22:24:20.390913 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2005 22:24:20.391058 # ok 277 Set SVE VL 1104
2006 22:24:20.391234 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2007 22:24:20.391357 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2008 22:24:20.391487 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2009 22:24:20.391603 # ok 281 Set SVE VL 1120
2010 22:24:20.391715 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2011 22:24:20.391830 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2012 22:24:20.391944 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2013 22:24:20.392058 # ok 285 Set SVE VL 1136
2014 22:24:20.392171 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2015 22:24:20.392283 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2016 22:24:20.392397 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2017 22:24:20.392510 # ok 289 Set SVE VL 1152
2018 22:24:20.392622 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2019 22:24:20.392735 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2020 22:24:20.395640 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2021 22:24:20.404197 # ok 293 Set SVE VL 1168
2022 22:24:20.404656 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2023 22:24:20.404821 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2024 22:24:20.404954 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2025 22:24:20.405100 # ok 297 Set SVE VL 1184
2026 22:24:20.405260 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2027 22:24:20.405424 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2028 22:24:20.405563 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2029 22:24:20.405705 # ok 301 Set SVE VL 1200
2030 22:24:20.405854 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2031 22:24:20.406040 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2032 22:24:20.406231 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2033 22:24:20.406431 # ok 305 Set SVE VL 1216
2034 22:24:20.406622 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2035 22:24:20.406800 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2036 22:24:20.406969 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2037 22:24:20.407163 # ok 309 Set SVE VL 1232
2038 22:24:20.407334 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2039 22:24:20.407482 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2040 22:24:20.407661 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2041 22:24:20.407798 # ok 313 Set SVE VL 1248
2042 22:24:20.407956 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2043 22:24:20.408096 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2044 22:24:20.408260 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2045 22:24:20.408441 # ok 317 Set SVE VL 1264
2046 22:24:20.408630 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2047 22:24:20.408830 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2048 22:24:20.409012 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2049 22:24:20.409163 # ok 321 Set SVE VL 1280
2050 22:24:20.409312 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2051 22:24:20.409486 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2052 22:24:20.409659 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2053 22:24:20.409846 # ok 325 Set SVE VL 1296
2054 22:24:20.410016 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2055 22:24:20.410163 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2056 22:24:20.410306 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2057 22:24:20.410472 # ok 329 Set SVE VL 1312
2058 22:24:20.410685 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2059 22:24:20.410870 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2060 22:24:20.411093 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2061 22:24:20.411255 # ok 333 Set SVE VL 1328
2062 22:24:20.411384 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2063 22:24:20.411498 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2064 22:24:20.411614 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2065 22:24:20.411729 # ok 337 Set SVE VL 1344
2066 22:24:20.412083 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2067 22:24:20.412239 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2068 22:24:20.412363 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2069 22:24:20.412480 # ok 341 Set SVE VL 1360
2070 22:24:20.412593 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2071 22:24:20.412707 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2072 22:24:20.412822 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2073 22:24:20.412937 # ok 345 Set SVE VL 1376
2074 22:24:20.413056 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2075 22:24:20.413173 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2076 22:24:20.413288 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2077 22:24:20.413404 # ok 349 Set SVE VL 1392
2078 22:24:20.413519 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2079 22:24:20.413634 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2080 22:24:20.413765 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2081 22:24:20.413881 # ok 353 Set SVE VL 1408
2082 22:24:20.413997 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2083 22:24:20.414110 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2084 22:24:20.415580 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2085 22:24:20.415947 # ok 357 Set SVE VL 1424
2086 22:24:20.416141 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2087 22:24:20.416326 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2088 22:24:20.416537 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2089 22:24:20.416812 # ok 361 Set SVE VL 1440
2090 22:24:20.417012 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2091 22:24:20.417221 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2092 22:24:20.417407 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2093 22:24:20.417607 # ok 365 Set SVE VL 1456
2094 22:24:20.417825 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2095 22:24:20.418040 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2096 22:24:20.418214 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2097 22:24:20.418368 # ok 369 Set SVE VL 1472
2098 22:24:20.418520 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2099 22:24:20.418658 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2100 22:24:20.418779 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2101 22:24:20.418896 # ok 373 Set SVE VL 1488
2102 22:24:20.419015 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2103 22:24:20.419168 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2104 22:24:20.419268 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2105 22:24:20.419355 # ok 377 Set SVE VL 1504
2106 22:24:20.419443 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2107 22:24:20.419529 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2108 22:24:20.419615 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2109 22:24:20.419701 # ok 381 Set SVE VL 1520
2110 22:24:20.419788 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2111 22:24:20.419898 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2112 22:24:20.419991 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2113 22:24:20.420080 # ok 385 Set SVE VL 1536
2114 22:24:20.420165 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2115 22:24:20.420251 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2116 22:24:20.420338 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2117 22:24:20.420425 # ok 389 Set SVE VL 1552
2118 22:24:20.420510 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2119 22:24:20.420596 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2120 22:24:20.420681 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2121 22:24:20.423613 # ok 393 Set SVE VL 1568
2122 22:24:20.423730 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2123 22:24:20.423873 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2124 22:24:20.424011 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2125 22:24:20.424104 # ok 397 Set SVE VL 1584
2126 22:24:20.424205 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2127 22:24:20.424308 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2128 22:24:20.424391 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2129 22:24:20.424476 # ok 401 Set SVE VL 1600
2130 22:24:20.424544 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2131 22:24:20.424638 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2132 22:24:20.424731 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2133 22:24:20.424809 # ok 405 Set SVE VL 1616
2134 22:24:20.424908 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2135 22:24:20.425002 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2136 22:24:20.425098 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2137 22:24:20.425220 # ok 409 Set SVE VL 1632
2138 22:24:20.425332 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2139 22:24:20.425443 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2140 22:24:20.425524 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2141 22:24:20.425616 # ok 413 Set SVE VL 1648
2142 22:24:20.425734 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2143 22:24:20.425832 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2144 22:24:20.425947 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2145 22:24:20.426036 # ok 417 Set SVE VL 1664
2146 22:24:20.426130 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2147 22:24:20.426228 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2148 22:24:20.426346 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2149 22:24:20.426459 # ok 421 Set SVE VL 1680
2150 22:24:20.426539 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2151 22:24:20.426625 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2152 22:24:20.426716 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2153 22:24:20.426803 # ok 425 Set SVE VL 1696
2154 22:24:20.426916 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2155 22:24:20.427031 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2156 22:24:20.427131 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2157 22:24:20.427204 # ok 429 Set SVE VL 1712
2158 22:24:20.431460 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2159 22:24:20.431797 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2160 22:24:20.431917 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2161 22:24:20.432018 # ok 433 Set SVE VL 1728
2162 22:24:20.432117 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2163 22:24:20.432199 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2164 22:24:20.432276 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2165 22:24:20.432376 # ok 437 Set SVE VL 1744
2166 22:24:20.432460 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2167 22:24:20.432556 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2168 22:24:20.432654 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2169 22:24:20.432748 # ok 441 Set SVE VL 1760
2170 22:24:20.432850 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2171 22:24:20.432922 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2172 22:24:20.433001 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2173 22:24:20.433092 # ok 445 Set SVE VL 1776
2174 22:24:20.433177 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2175 22:24:20.433257 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2176 22:24:20.433352 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2177 22:24:20.433437 # ok 449 Set SVE VL 1792
2178 22:24:20.433540 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2179 22:24:20.433625 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2180 22:24:20.433763 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2181 22:24:20.433851 # ok 453 Set SVE VL 1808
2182 22:24:20.433944 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2183 22:24:20.434032 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2184 22:24:20.434126 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2185 22:24:20.434234 # ok 457 Set SVE VL 1824
2186 22:24:20.434341 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2187 22:24:20.434457 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2188 22:24:20.434583 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2189 22:24:20.434692 # ok 461 Set SVE VL 1840
2190 22:24:20.434812 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2191 22:24:20.434911 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2192 22:24:20.435039 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2193 22:24:20.435129 # ok 465 Set SVE VL 1856
2194 22:24:20.435208 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2195 22:24:20.439659 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2196 22:24:20.439776 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2197 22:24:20.439876 # ok 469 Set SVE VL 1872
2198 22:24:20.439984 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2199 22:24:20.440104 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2200 22:24:20.440320 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2201 22:24:20.440487 # ok 473 Set SVE VL 1888
2202 22:24:20.440647 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2203 22:24:20.440837 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2204 22:24:20.440992 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2205 22:24:20.441159 # ok 477 Set SVE VL 1904
2206 22:24:20.441300 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2207 22:24:20.441464 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2208 22:24:20.447748 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2209 22:24:20.448049 # ok 481 Set SVE VL 1920
2210 22:24:20.448318 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2211 22:24:20.448615 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2212 22:24:20.448863 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2213 22:24:20.449070 # ok 485 Set SVE VL 1936
2214 22:24:20.449263 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2215 22:24:20.449501 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2216 22:24:20.449719 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2217 22:24:20.449917 # ok 489 Set SVE VL 1952
2218 22:24:20.450105 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2219 22:24:20.450308 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2220 22:24:20.450611 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2221 22:24:20.450823 # ok 493 Set SVE VL 1968
2222 22:24:20.451031 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2223 22:24:20.451215 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2224 22:24:20.451358 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2225 22:24:20.451477 # ok 497 Set SVE VL 1984
2226 22:24:20.451625 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2227 22:24:20.451772 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2228 22:24:20.451891 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2229 22:24:20.452043 # ok 501 Set SVE VL 2000
2230 22:24:20.452185 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2231 22:24:20.452322 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2232 22:24:20.452440 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2233 22:24:20.452587 # ok 505 Set SVE VL 2016
2234 22:24:20.452734 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2235 22:24:20.452852 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2236 22:24:20.452996 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2237 22:24:20.453147 # ok 509 Set SVE VL 2032
2238 22:24:20.453292 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2239 22:24:20.453468 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2240 22:24:20.453595 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2241 22:24:20.453753 # ok 513 Set SVE VL 2048
2242 22:24:20.453895 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2243 22:24:20.454038 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2244 22:24:20.455533 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2245 22:24:20.455739 # ok 517 Set SVE VL 2064
2246 22:24:20.456176 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2247 22:24:20.456367 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2248 22:24:20.456524 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2249 22:24:20.456685 # ok 521 Set SVE VL 2080
2250 22:24:20.456827 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2251 22:24:20.456984 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2252 22:24:20.457107 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2253 22:24:20.457198 # ok 525 Set SVE VL 2096
2254 22:24:20.457315 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2255 22:24:20.457451 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2256 22:24:20.457566 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2257 22:24:20.457687 # ok 529 Set SVE VL 2112
2258 22:24:20.457793 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2259 22:24:20.457917 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2260 22:24:20.458058 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2261 22:24:20.458165 # ok 533 Set SVE VL 2128
2262 22:24:20.458245 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2263 22:24:20.458317 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2264 22:24:20.458420 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2265 22:24:20.458504 # ok 537 Set SVE VL 2144
2266 22:24:20.458568 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2267 22:24:20.458660 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2268 22:24:20.458729 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2269 22:24:20.458793 # ok 541 Set SVE VL 2160
2270 22:24:20.458863 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2271 22:24:20.458932 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2272 22:24:20.458996 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2273 22:24:20.459056 # ok 545 Set SVE VL 2176
2274 22:24:20.459129 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2275 22:24:20.459191 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2276 22:24:20.459251 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2277 22:24:20.465020 # ok 549 Set SVE VL 2192
2278 22:24:20.465318 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2279 22:24:20.465425 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2280 22:24:20.465522 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2281 22:24:20.465604 # ok 553 Set SVE VL 2208
2282 22:24:20.465722 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2283 22:24:20.465806 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2284 22:24:20.465907 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2285 22:24:20.465989 # ok 557 Set SVE VL 2224
2286 22:24:20.466279 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2287 22:24:20.466470 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2288 22:24:20.466677 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2289 22:24:20.466890 # ok 561 Set SVE VL 2240
2290 22:24:20.467064 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2291 22:24:20.467212 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2292 22:24:20.467356 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2293 22:24:20.467536 # ok 565 Set SVE VL 2256
2294 22:24:20.467673 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2295 22:24:20.467817 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2296 22:24:20.467959 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2297 22:24:20.468101 # ok 569 Set SVE VL 2272
2298 22:24:20.468316 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2299 22:24:20.468494 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2300 22:24:20.468671 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2301 22:24:20.468867 # ok 573 Set SVE VL 2288
2302 22:24:20.469036 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2303 22:24:20.469189 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2304 22:24:20.469365 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2305 22:24:20.469527 # ok 577 Set SVE VL 2304
2306 22:24:20.469742 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2307 22:24:20.469904 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2308 22:24:20.470044 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2309 22:24:20.470205 # ok 581 Set SVE VL 2320
2310 22:24:20.470409 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2311 22:24:20.470616 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2312 22:24:20.470817 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2313 22:24:20.471031 # ok 585 Set SVE VL 2336
2314 22:24:20.471264 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2315 22:24:20.471401 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2316 22:24:20.471521 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2317 22:24:20.471635 # ok 589 Set SVE VL 2352
2318 22:24:20.471749 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2319 22:24:20.471864 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2320 22:24:20.471978 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2321 22:24:20.472092 # ok 593 Set SVE VL 2368
2322 22:24:20.472204 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2323 22:24:20.472317 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2324 22:24:20.472431 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2325 22:24:20.472629 # ok 597 Set SVE VL 2384
2326 22:24:20.472808 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2327 22:24:20.472989 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2328 22:24:20.473130 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2329 22:24:20.473278 # ok 601 Set SVE VL 2400
2330 22:24:20.473682 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2331 22:24:20.473899 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2332 22:24:20.474087 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2333 22:24:20.474279 # ok 605 Set SVE VL 2416
2334 22:24:20.474454 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2335 22:24:20.474615 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2336 22:24:20.474798 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2337 22:24:20.474993 # ok 609 Set SVE VL 2432
2338 22:24:20.475145 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2339 22:24:20.475235 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2340 22:24:20.475321 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2341 22:24:20.475444 # ok 613 Set SVE VL 2448
2342 22:24:20.475561 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2343 22:24:20.475701 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2344 22:24:20.475848 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2345 22:24:20.475989 # ok 617 Set SVE VL 2464
2346 22:24:20.476139 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2347 22:24:20.476313 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2348 22:24:20.476434 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2349 22:24:20.476551 # ok 621 Set SVE VL 2480
2350 22:24:20.476676 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2351 22:24:20.476799 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2352 22:24:20.476968 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2353 22:24:20.477124 # ok 625 Set SVE VL 2496
2354 22:24:20.477273 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2355 22:24:20.477466 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2356 22:24:20.477622 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2357 22:24:20.478354 # ok 629 Set SVE VL 2512
2358 22:24:20.478455 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2359 22:24:20.478548 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2360 22:24:20.478646 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2361 22:24:20.478748 # ok 633 Set SVE VL 2528
2362 22:24:20.478849 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2363 22:24:20.478939 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2364 22:24:20.479017 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2365 22:24:20.479090 # ok 637 Set SVE VL 2544
2366 22:24:20.479151 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2367 22:24:20.479227 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2368 22:24:20.479315 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2369 22:24:20.479410 # ok 641 Set SVE VL 2560
2370 22:24:20.479501 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2371 22:24:20.479567 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2372 22:24:20.479625 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2373 22:24:20.479682 # ok 645 Set SVE VL 2576
2374 22:24:20.479984 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2375 22:24:20.480144 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2376 22:24:20.480274 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2377 22:24:20.480393 # ok 649 Set SVE VL 2592
2378 22:24:20.480509 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2379 22:24:20.480625 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2380 22:24:20.480742 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2381 22:24:20.480857 # ok 653 Set SVE VL 2608
2382 22:24:20.480972 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2383 22:24:20.481087 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2384 22:24:20.481204 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2385 22:24:20.481323 # ok 657 Set SVE VL 2624
2386 22:24:20.481438 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2387 22:24:20.481555 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2388 22:24:20.481686 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2389 22:24:20.481805 # ok 661 Set SVE VL 2640
2390 22:24:20.481921 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2391 22:24:20.482033 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2392 22:24:20.482147 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2393 22:24:20.482238 # ok 665 Set SVE VL 2656
2394 22:24:20.482324 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2395 22:24:20.490938 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2396 22:24:20.491253 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2397 22:24:20.491328 # ok 669 Set SVE VL 2672
2398 22:24:20.491616 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2399 22:24:20.491747 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2400 22:24:20.491853 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2401 22:24:20.491935 # ok 673 Set SVE VL 2688
2402 22:24:20.492012 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2403 22:24:20.492104 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2404 22:24:20.492183 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2405 22:24:20.492263 # ok 677 Set SVE VL 2704
2406 22:24:20.492353 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2407 22:24:20.492432 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2408 22:24:20.492521 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2409 22:24:20.492598 # ok 681 Set SVE VL 2720
2410 22:24:20.492673 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2411 22:24:20.492762 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2412 22:24:20.492841 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2413 22:24:20.492929 # ok 685 Set SVE VL 2736
2414 22:24:20.493019 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2415 22:24:20.493110 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2416 22:24:20.493199 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2417 22:24:20.493289 # ok 689 Set SVE VL 2752
2418 22:24:20.493379 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2419 22:24:20.493468 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2420 22:24:20.493847 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2421 22:24:20.493945 # ok 693 Set SVE VL 2768
2422 22:24:20.494037 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2423 22:24:20.494136 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2424 22:24:20.494217 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2425 22:24:20.494292 # ok 697 Set SVE VL 2784
2426 22:24:20.494367 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2427 22:24:20.494458 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2428 22:24:20.494564 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2429 22:24:20.494650 # ok 701 Set SVE VL 2800
2430 22:24:20.494764 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2431 22:24:20.494856 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2432 22:24:20.494946 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2433 22:24:20.495066 # ok 705 Set SVE VL 2816
2434 22:24:20.495159 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2435 22:24:20.495275 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2436 22:24:20.495364 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2437 22:24:20.495472 # ok 709 Set SVE VL 2832
2438 22:24:20.495550 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2439 22:24:20.495641 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2440 22:24:20.495727 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2441 22:24:20.495798 # ok 713 Set SVE VL 2848
2442 22:24:20.495888 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2443 22:24:20.495984 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2444 22:24:20.496067 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2445 22:24:20.496151 # ok 717 Set SVE VL 2864
2446 22:24:20.496262 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2447 22:24:20.496356 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2448 22:24:20.496473 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2449 22:24:20.496564 # ok 721 Set SVE VL 2880
2450 22:24:20.496679 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2451 22:24:20.496792 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2452 22:24:20.496888 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2453 22:24:20.496987 # ok 725 Set SVE VL 2896
2454 22:24:20.497103 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2455 22:24:20.497184 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2456 22:24:20.497256 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2457 22:24:20.497355 # ok 729 Set SVE VL 2912
2458 22:24:20.497438 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2459 22:24:20.497520 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2460 22:24:20.497593 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2461 22:24:20.497691 # ok 733 Set SVE VL 2928
2462 22:24:20.497813 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2463 22:24:20.497920 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2464 22:24:20.498200 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2465 22:24:20.498291 # ok 737 Set SVE VL 2944
2466 22:24:20.498384 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2467 22:24:20.498461 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2468 22:24:20.498553 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2469 22:24:20.498624 # ok 741 Set SVE VL 2960
2470 22:24:20.498698 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2471 22:24:20.498771 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2472 22:24:20.498860 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2473 22:24:20.498932 # ok 745 Set SVE VL 2976
2474 22:24:20.499023 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2475 22:24:20.499138 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2476 22:24:20.499242 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2477 22:24:20.499330 # ok 749 Set SVE VL 2992
2478 22:24:20.499415 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2479 22:24:20.499690 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2480 22:24:20.499772 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2481 22:24:20.499864 # ok 753 Set SVE VL 3008
2482 22:24:20.499935 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2483 22:24:20.500024 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2484 22:24:20.500288 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2485 22:24:20.500360 # ok 757 Set SVE VL 3024
2486 22:24:20.500450 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2487 22:24:20.500520 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2488 22:24:20.500608 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2489 22:24:20.500693 # ok 761 Set SVE VL 3040
2490 22:24:20.500777 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2491 22:24:20.501041 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2492 22:24:20.501126 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2493 22:24:20.501212 # ok 765 Set SVE VL 3056
2494 22:24:20.501302 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2495 22:24:20.501386 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2496 22:24:20.501827 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2497 22:24:20.501898 # ok 769 Set SVE VL 3072
2498 22:24:20.501993 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2499 22:24:20.502097 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2500 22:24:20.502211 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2501 22:24:20.502321 # ok 773 Set SVE VL 3088
2502 22:24:20.502422 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2503 22:24:20.502523 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2504 22:24:20.502614 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2505 22:24:20.502699 # ok 777 Set SVE VL 3104
2506 22:24:20.502780 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2507 22:24:20.502901 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2508 22:24:20.503008 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2509 22:24:20.503108 # ok 781 Set SVE VL 3120
2510 22:24:20.503181 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2511 22:24:20.503295 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2512 22:24:20.503380 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2513 22:24:20.503463 # ok 785 Set SVE VL 3136
2514 22:24:20.503559 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2515 22:24:20.503629 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2516 22:24:20.503709 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2517 22:24:20.503778 # ok 789 Set SVE VL 3152
2518 22:24:20.503868 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2519 22:24:20.503941 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2520 22:24:20.504019 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2521 22:24:20.504111 # ok 793 Set SVE VL 3168
2522 22:24:20.504182 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2523 22:24:20.504263 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2524 22:24:20.504370 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2525 22:24:20.504449 # ok 797 Set SVE VL 3184
2526 22:24:20.504521 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2527 22:24:20.504603 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2528 22:24:20.504678 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2529 22:24:20.504753 # ok 801 Set SVE VL 3200
2530 22:24:20.504830 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2531 22:24:20.505524 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2532 22:24:20.505624 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2533 22:24:20.505720 # ok 805 Set SVE VL 3216
2534 22:24:20.505805 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2535 22:24:20.505874 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2536 22:24:20.505949 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2537 22:24:20.506032 # ok 809 Set SVE VL 3232
2538 22:24:20.506121 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2539 22:24:20.506187 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2540 22:24:20.506258 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2541 22:24:20.506333 # ok 813 Set SVE VL 3248
2542 22:24:20.506394 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2543 22:24:20.506473 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2544 22:24:20.506546 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2545 22:24:20.506638 # ok 817 Set SVE VL 3264
2546 22:24:20.506702 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2547 22:24:20.506795 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2548 22:24:20.506875 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2549 22:24:20.506954 # ok 821 Set SVE VL 3280
2550 22:24:20.507045 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2551 22:24:20.507120 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2552 22:24:20.507430 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2553 22:24:20.507631 # ok 825 Set SVE VL 3296
2554 22:24:20.507826 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2555 22:24:20.507957 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2556 22:24:20.508170 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2557 22:24:20.508334 # ok 829 Set SVE VL 3312
2558 22:24:20.508552 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2559 22:24:20.508718 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2560 22:24:20.508915 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2561 22:24:20.509082 # ok 833 Set SVE VL 3328
2562 22:24:20.509242 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2563 22:24:20.509400 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2564 22:24:20.509557 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2565 22:24:20.509708 # ok 837 Set SVE VL 3344
2566 22:24:20.509850 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2567 22:24:20.510037 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2568 22:24:20.510204 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2569 22:24:20.510366 # ok 841 Set SVE VL 3360
2570 22:24:20.510513 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2571 22:24:20.510636 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2572 22:24:20.510753 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2573 22:24:20.510870 # ok 845 Set SVE VL 3376
2574 22:24:20.510997 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2575 22:24:20.511164 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2576 22:24:20.511292 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2577 22:24:20.511410 # ok 849 Set SVE VL 3392
2578 22:24:20.511555 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2579 22:24:20.511680 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2580 22:24:20.511799 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2581 22:24:20.511916 # ok 853 Set SVE VL 3408
2582 22:24:20.512031 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2583 22:24:20.516799 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2584 22:24:20.516914 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2585 22:24:20.516996 # ok 857 Set SVE VL 3424
2586 22:24:20.517085 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2587 22:24:20.517164 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2588 22:24:20.517257 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2589 22:24:20.517336 # ok 861 Set SVE VL 3440
2590 22:24:20.517424 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2591 22:24:20.517514 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2592 22:24:20.517604 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2593 22:24:20.517734 # ok 865 Set SVE VL 3456
2594 22:24:20.517835 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2595 22:24:20.517932 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2596 22:24:20.518011 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2597 22:24:20.518099 # ok 869 Set SVE VL 3472
2598 22:24:20.518177 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2599 22:24:20.518267 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2600 22:24:20.518356 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2601 22:24:20.518444 # ok 873 Set SVE VL 3488
2602 22:24:20.518532 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2603 22:24:20.518621 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2604 22:24:20.518708 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2605 22:24:20.518797 # ok 877 Set SVE VL 3504
2606 22:24:20.519173 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2607 22:24:20.519281 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2608 22:24:20.519545 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2609 22:24:20.519627 # ok 881 Set SVE VL 3520
2610 22:24:20.519703 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2611 22:24:20.519791 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2612 22:24:20.519868 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2613 22:24:20.519957 # ok 885 Set SVE VL 3536
2614 22:24:20.520034 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2615 22:24:20.520123 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2616 22:24:20.520200 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2617 22:24:20.520293 # ok 889 Set SVE VL 3552
2618 22:24:20.520370 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2619 22:24:20.520457 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2620 22:24:20.520553 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2621 22:24:20.520633 # ok 893 Set SVE VL 3568
2622 22:24:20.520721 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2623 22:24:20.521009 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2624 22:24:20.521106 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2625 22:24:20.521184 # ok 897 Set SVE VL 3584
2626 22:24:20.521272 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2627 22:24:20.521349 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2628 22:24:20.521424 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2629 22:24:20.521510 # ok 901 Set SVE VL 3600
2630 22:24:20.521598 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2631 22:24:20.521696 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2632 22:24:20.521798 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2633 22:24:20.521896 # ok 905 Set SVE VL 3616
2634 22:24:20.522173 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2635 22:24:20.522269 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2636 22:24:20.522347 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2637 22:24:20.522423 # ok 909 Set SVE VL 3632
2638 22:24:20.522698 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2639 22:24:20.522795 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2640 22:24:20.522873 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2641 22:24:20.522949 # ok 913 Set SVE VL 3648
2642 22:24:20.523023 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2643 22:24:20.523099 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2644 22:24:20.523188 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2645 22:24:20.523273 # ok 917 Set SVE VL 3664
2646 22:24:20.523348 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2647 22:24:20.523437 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2648 22:24:20.523515 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2649 22:24:20.523591 # ok 921 Set SVE VL 3680
2650 22:24:20.523678 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2651 22:24:20.523756 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2652 22:24:20.523843 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2653 22:24:20.523934 # ok 925 Set SVE VL 3696
2654 22:24:20.524011 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2655 22:24:20.524099 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2656 22:24:20.524177 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2657 22:24:20.524268 # ok 929 Set SVE VL 3712
2658 22:24:20.524346 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2659 22:24:20.524433 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2660 22:24:20.524523 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2661 22:24:20.524798 # ok 933 Set SVE VL 3728
2662 22:24:20.524880 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2663 22:24:20.524968 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2664 22:24:20.525057 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2665 22:24:20.525146 # ok 937 Set SVE VL 3744
2666 22:24:20.525236 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2667 22:24:20.525340 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2668 22:24:20.525605 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2669 22:24:20.525707 # ok 941 Set SVE VL 3760
2670 22:24:20.525804 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2671 22:24:20.525900 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2672 22:24:20.525991 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2673 22:24:20.526081 # ok 945 Set SVE VL 3776
2674 22:24:20.526178 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2675 22:24:20.526290 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2676 22:24:20.526565 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2677 22:24:20.526647 # ok 949 Set SVE VL 3792
2678 22:24:20.526736 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2679 22:24:20.526826 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2680 22:24:20.526934 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2681 22:24:20.527025 # ok 953 Set SVE VL 3808
2682 22:24:20.527295 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2683 22:24:20.527388 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2684 22:24:20.527685 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2685 22:24:20.527842 # ok 957 Set SVE VL 3824
2686 22:24:20.527991 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2687 22:24:20.528111 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2688 22:24:20.528228 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2689 22:24:20.528343 # ok 961 Set SVE VL 3840
2690 22:24:20.528481 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2691 22:24:20.528601 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2692 22:24:20.528718 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2693 22:24:20.528859 # ok 965 Set SVE VL 3856
2694 22:24:20.528977 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2695 22:24:20.529093 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2696 22:24:20.529209 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2697 22:24:20.529350 # ok 969 Set SVE VL 3872
2698 22:24:20.529468 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2699 22:24:20.529584 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2700 22:24:20.529732 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2701 22:24:20.529875 # ok 973 Set SVE VL 3888
2702 22:24:20.529994 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2703 22:24:20.530111 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2704 22:24:20.530225 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2705 22:24:20.530311 # ok 977 Set SVE VL 3904
2706 22:24:20.530416 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2707 22:24:20.530509 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2708 22:24:20.530596 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2709 22:24:20.530684 # ok 981 Set SVE VL 3920
2710 22:24:20.530770 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2711 22:24:20.530873 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2712 22:24:20.530964 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2713 22:24:20.531068 # ok 985 Set SVE VL 3936
2714 22:24:20.531159 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2715 22:24:20.531265 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2716 22:24:20.531357 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2717 22:24:20.531445 # ok 989 Set SVE VL 3952
2718 22:24:20.531548 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2719 22:24:20.531639 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2720 22:24:20.531743 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2721 22:24:20.531834 # ok 993 Set SVE VL 3968
2722 22:24:20.531936 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2723 22:24:20.532027 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2724 22:24:20.532342 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2725 22:24:20.532476 # ok 997 Set SVE VL 3984
2726 22:24:20.532580 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2727 22:24:20.532699 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2728 22:24:20.532827 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2729 22:24:20.532957 # ok 1001 Set SVE VL 4000
2730 22:24:20.533099 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2731 22:24:20.533236 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2732 22:24:20.533340 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2733 22:24:20.533431 # ok 1005 Set SVE VL 4016
2734 22:24:20.533519 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2735 22:24:20.533601 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2736 22:24:20.533675 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2737 22:24:20.533776 # ok 1009 Set SVE VL 4032
2738 22:24:20.533866 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2739 22:24:20.533946 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2740 22:24:20.534018 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2741 22:24:20.534091 # ok 1013 Set SVE VL 4048
2742 22:24:20.534174 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2743 22:24:20.534263 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2744 22:24:20.534338 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2745 22:24:20.534398 # ok 1017 Set SVE VL 4064
2746 22:24:20.534475 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2747 22:24:20.534566 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2748 22:24:20.534651 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2749 22:24:20.534716 # ok 1021 Set SVE VL 4080
2750 22:24:20.534789 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2751 22:24:20.534855 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2752 22:24:20.534931 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2753 22:24:20.535015 # ok 1025 Set SVE VL 4096
2754 22:24:20.535098 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2755 22:24:20.535177 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2756 22:24:20.535451 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2757 22:24:20.535552 # ok 1029 Set SVE VL 4112
2758 22:24:20.535634 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2759 22:24:20.535749 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2760 22:24:20.535843 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2761 22:24:20.535923 # ok 1033 Set SVE VL 4128
2762 22:24:20.536014 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2763 22:24:20.536085 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2764 22:24:20.536170 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2765 22:24:20.536234 # ok 1037 Set SVE VL 4144
2766 22:24:20.536503 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2767 22:24:20.536583 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2768 22:24:20.536656 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2769 22:24:20.544410 # ok 1041 Set SVE VL 4160
2770 22:24:20.544520 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2771 22:24:20.544628 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2772 22:24:20.544715 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2773 22:24:20.544857 # ok 1045 Set SVE VL 4176
2774 22:24:20.544974 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2775 22:24:20.545093 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2776 22:24:20.545198 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2777 22:24:20.545304 # ok 1049 Set SVE VL 4192
2778 22:24:20.545386 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2779 22:24:20.545481 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2780 22:24:20.545560 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2781 22:24:20.545638 # ok 1053 Set SVE VL 4208
2782 22:24:20.545741 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2783 22:24:20.545825 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2784 22:24:20.545907 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2785 22:24:20.546008 # ok 1057 Set SVE VL 4224
2786 22:24:20.546095 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2787 22:24:20.546194 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2788 22:24:20.546286 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2789 22:24:20.546388 # ok 1061 Set SVE VL 4240
2790 22:24:20.546492 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2791 22:24:20.546572 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2792 22:24:20.546657 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2793 22:24:20.546737 # ok 1065 Set SVE VL 4256
2794 22:24:20.546814 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2795 22:24:20.546905 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2796 22:24:20.546995 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2797 22:24:20.547105 # ok 1069 Set SVE VL 4272
2798 22:24:20.547217 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2799 22:24:20.547321 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2800 22:24:20.547410 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2801 22:24:20.547504 # ok 1073 Set SVE VL 4288
2802 22:24:20.547598 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2803 22:24:20.547694 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2804 22:24:20.547790 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2805 22:24:20.547879 # ok 1077 Set SVE VL 4304
2806 22:24:20.548150 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2807 22:24:20.548232 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2808 22:24:20.548313 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2809 22:24:20.548410 # ok 1081 Set SVE VL 4320
2810 22:24:20.548476 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2811 22:24:20.548563 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2812 22:24:20.548654 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2813 22:24:20.548725 # ok 1085 Set SVE VL 4336
2814 22:24:20.548808 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2815 22:24:20.548895 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2816 22:24:20.549019 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2817 22:24:20.549103 # ok 1089 Set SVE VL 4352
2818 22:24:20.549201 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2819 22:24:20.549497 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2820 22:24:20.549593 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2821 22:24:20.549708 # ok 1093 Set SVE VL 4368
2822 22:24:20.549812 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2823 22:24:20.549904 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2824 22:24:20.549981 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2825 22:24:20.550095 # ok 1097 Set SVE VL 4384
2826 22:24:20.550207 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2827 22:24:20.550328 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2828 22:24:20.550426 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2829 22:24:20.550508 # ok 1101 Set SVE VL 4400
2830 22:24:20.550588 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2831 22:24:20.550672 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2832 22:24:20.550747 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2833 22:24:20.550812 # ok 1105 Set SVE VL 4416
2834 22:24:20.550887 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2835 22:24:20.550987 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2836 22:24:20.551083 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2837 22:24:20.551168 # ok 1109 Set SVE VL 4432
2838 22:24:20.551285 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2839 22:24:20.551383 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2840 22:24:20.551478 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2841 22:24:20.551559 # ok 1113 Set SVE VL 4448
2842 22:24:20.551644 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2843 22:24:20.551744 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2844 22:24:20.551852 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2845 22:24:20.551940 # ok 1117 Set SVE VL 4464
2846 22:24:20.552023 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2847 22:24:20.552101 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2848 22:24:20.552182 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2849 22:24:20.552422 # ok 1121 Set SVE VL 4480
2850 22:24:20.552525 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2851 22:24:20.552605 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2852 22:24:20.552695 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2853 22:24:20.552774 # ok 1125 Set SVE VL 4496
2854 22:24:20.552849 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2855 22:24:20.552925 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2856 22:24:20.553216 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2857 22:24:20.553314 # ok 1129 Set SVE VL 4512
2858 22:24:20.553392 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2859 22:24:20.553469 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2860 22:24:20.553545 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2861 22:24:20.553635 # ok 1133 Set SVE VL 4528
2862 22:24:20.553723 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2863 22:24:20.553805 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2864 22:24:20.553887 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2865 22:24:20.553979 # ok 1137 Set SVE VL 4544
2866 22:24:20.554057 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2867 22:24:20.554134 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2868 22:24:20.554223 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2869 22:24:20.554302 # ok 1141 Set SVE VL 4560
2870 22:24:20.554378 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2871 22:24:20.554453 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2872 22:24:20.554543 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2873 22:24:20.554623 # ok 1145 Set SVE VL 4576
2874 22:24:20.554711 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2875 22:24:20.554790 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2876 22:24:20.554878 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2877 22:24:20.554957 # ok 1149 Set SVE VL 4592
2878 22:24:20.555045 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2879 22:24:20.555366 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2880 22:24:20.555464 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2881 22:24:20.555556 # ok 1153 Set SVE VL 4608
2882 22:24:20.555634 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2883 22:24:20.555723 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2884 22:24:20.555813 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2885 22:24:20.555892 # ok 1157 Set SVE VL 4624
2886 22:24:20.555979 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2887 22:24:20.556068 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2888 22:24:20.556157 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2889 22:24:20.556246 # ok 1161 Set SVE VL 4640
2890 22:24:20.556340 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2891 22:24:20.556607 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2892 22:24:20.556930 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2893 22:24:20.557052 # ok 1165 Set SVE VL 4656
2894 22:24:20.557136 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2895 22:24:20.557211 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2896 22:24:20.557307 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2897 22:24:20.557387 # ok 1169 Set SVE VL 4672
2898 22:24:20.557463 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2899 22:24:20.557538 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2900 22:24:20.557627 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2901 22:24:20.557715 # ok 1173 Set SVE VL 4688
2902 22:24:20.557795 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2903 22:24:20.557877 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2904 22:24:20.557968 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2905 22:24:20.558046 # ok 1177 Set SVE VL 4704
2906 22:24:20.558121 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2907 22:24:20.558210 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2908 22:24:20.558288 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2909 22:24:20.558375 # ok 1181 Set SVE VL 4720
2910 22:24:20.558463 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2911 22:24:20.558554 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2912 22:24:20.558632 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2913 22:24:20.558720 # ok 1185 Set SVE VL 4736
2914 22:24:20.558797 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2915 22:24:20.558884 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2916 22:24:20.558974 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2917 22:24:20.559052 # ok 1189 Set SVE VL 4752
2918 22:24:20.559139 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2919 22:24:20.559435 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2920 22:24:20.559608 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2921 22:24:20.559745 # ok 1193 Set SVE VL 4768
2922 22:24:20.559888 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2923 22:24:20.560008 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2924 22:24:20.560127 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2925 22:24:20.560243 # ok 1197 Set SVE VL 4784
2926 22:24:20.560379 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2927 22:24:20.560508 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2928 22:24:20.560680 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2929 22:24:20.560830 # ok 1201 Set SVE VL 4800
2930 22:24:20.560963 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2931 22:24:20.561135 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2932 22:24:20.561285 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2933 22:24:20.561415 # ok 1205 Set SVE VL 4816
2934 22:24:20.561532 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2935 22:24:20.561657 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2936 22:24:20.561769 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2937 22:24:20.561866 # ok 1209 Set SVE VL 4832
2938 22:24:20.562005 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2939 22:24:20.562128 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2940 22:24:20.562268 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2941 22:24:20.562366 # ok 1213 Set SVE VL 4848
2942 22:24:20.562432 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2943 22:24:20.562490 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2944 22:24:20.562549 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2945 22:24:20.562610 # ok 1217 Set SVE VL 4864
2946 22:24:20.562668 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2947 22:24:20.562727 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2948 22:24:20.562800 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2949 22:24:20.562862 # ok 1221 Set SVE VL 4880
2950 22:24:20.562921 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2951 22:24:20.562983 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2952 22:24:20.572752 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2953 22:24:20.572951 # ok 1225 Set SVE VL 4896
2954 22:24:20.573119 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2955 22:24:20.573312 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2956 22:24:20.573483 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2957 22:24:20.573682 # ok 1229 Set SVE VL 4912
2958 22:24:20.573852 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2959 22:24:20.574049 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2960 22:24:20.574304 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2961 22:24:20.574486 # ok 1233 Set SVE VL 4928
2962 22:24:20.574666 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2963 22:24:20.574827 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2964 22:24:20.575000 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2965 22:24:20.575128 # ok 1237 Set SVE VL 4944
2966 22:24:20.575221 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2967 22:24:20.575308 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2968 22:24:20.575392 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2969 22:24:20.575453 # ok 1241 Set SVE VL 4960
2970 22:24:20.575511 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2971 22:24:20.575569 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2972 22:24:20.575626 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2973 22:24:20.575683 # ok 1245 Set SVE VL 4976
2974 22:24:20.575740 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2975 22:24:20.575797 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2976 22:24:20.575855 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2977 22:24:20.575912 # ok 1249 Set SVE VL 4992
2978 22:24:20.576430 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2979 22:24:20.576794 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2980 22:24:20.576916 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2981 22:24:20.577011 # ok 1253 Set SVE VL 5008
2982 22:24:20.577103 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2983 22:24:20.577183 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2984 22:24:20.577259 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2985 22:24:20.577351 # ok 1257 Set SVE VL 5024
2986 22:24:20.577429 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2987 22:24:20.577517 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2988 22:24:20.577595 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2989 22:24:20.577679 # ok 1261 Set SVE VL 5040
2990 22:24:20.577772 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2991 22:24:20.577879 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2992 22:24:20.577985 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2993 22:24:20.578065 # ok 1265 Set SVE VL 5056
2994 22:24:20.578141 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2995 22:24:20.578230 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2996 22:24:20.578307 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2997 22:24:20.578388 # ok 1269 Set SVE VL 5072
2998 22:24:20.579166 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
2999 22:24:20.579266 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
3000 22:24:20.579345 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3001 22:24:20.579420 # ok 1273 Set SVE VL 5088
3002 22:24:20.579496 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3003 22:24:20.579570 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3004 22:24:20.579645 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3005 22:24:20.579721 # ok 1277 Set SVE VL 5104
3006 22:24:20.579796 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3007 22:24:20.580152 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3008 22:24:20.580453 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3009 22:24:20.580550 # ok 1281 Set SVE VL 5120
3010 22:24:20.580627 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3011 22:24:20.580704 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3012 22:24:20.580794 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3013 22:24:20.580872 # ok 1285 Set SVE VL 5136
3014 22:24:20.580947 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3015 22:24:20.581022 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3016 22:24:20.581098 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3017 22:24:20.581189 # ok 1289 Set SVE VL 5152
3018 22:24:20.581268 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3019 22:24:20.581343 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3020 22:24:20.581418 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3021 22:24:20.581508 # ok 1293 Set SVE VL 5168
3022 22:24:20.581586 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3023 22:24:20.581671 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3024 22:24:20.581767 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3025 22:24:20.581880 # ok 1297 Set SVE VL 5184
3026 22:24:20.581995 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3027 22:24:20.582078 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3028 22:24:20.582153 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3029 22:24:20.582229 # ok 1301 Set SVE VL 5200
3030 22:24:20.582318 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3031 22:24:20.582395 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3032 22:24:20.582471 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3033 22:24:20.582546 # ok 1305 Set SVE VL 5216
3034 22:24:20.582635 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3035 22:24:20.582739 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3036 22:24:20.582828 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3037 22:24:20.582921 # ok 1309 Set SVE VL 5232
3038 22:24:20.583000 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3039 22:24:20.583076 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3040 22:24:20.583151 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3041 22:24:20.583226 # ok 1313 Set SVE VL 5248
3042 22:24:20.583313 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3043 22:24:20.583408 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3044 22:24:20.583736 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3045 22:24:20.583946 # ok 1317 Set SVE VL 5264
3046 22:24:20.584203 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3047 22:24:20.584400 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3048 22:24:20.584579 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3049 22:24:20.584750 # ok 1321 Set SVE VL 5280
3050 22:24:20.584909 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3051 22:24:20.585060 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3052 22:24:20.585195 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3053 22:24:20.585325 # ok 1325 Set SVE VL 5296
3054 22:24:20.585484 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3055 22:24:20.585657 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3056 22:24:20.585792 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3057 22:24:20.585936 # ok 1329 Set SVE VL 5312
3058 22:24:20.586115 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3059 22:24:20.586242 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3060 22:24:20.586360 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3061 22:24:20.586456 # ok 1333 Set SVE VL 5328
3062 22:24:20.586541 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3063 22:24:20.586620 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3064 22:24:20.586701 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3065 22:24:20.586778 # ok 1337 Set SVE VL 5344
3066 22:24:20.586860 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3067 22:24:20.586938 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3068 22:24:20.587011 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3069 22:24:20.587089 # ok 1341 Set SVE VL 5360
3070 22:24:20.587151 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3071 22:24:20.587225 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3072 22:24:20.587305 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3073 22:24:20.587381 # ok 1345 Set SVE VL 5376
3074 22:24:20.587461 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3075 22:24:20.587536 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3076 22:24:20.587613 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3077 22:24:20.587709 # ok 1349 Set SVE VL 5392
3078 22:24:20.587794 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3079 22:24:20.587873 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3080 22:24:20.587955 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3081 22:24:20.588039 # ok 1353 Set SVE VL 5408
3082 22:24:20.588119 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3083 22:24:20.588198 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3084 22:24:20.588278 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3085 22:24:20.588385 # ok 1357 Set SVE VL 5424
3086 22:24:20.588492 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3087 22:24:20.588824 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3088 22:24:20.588932 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3089 22:24:20.589014 # ok 1361 Set SVE VL 5440
3090 22:24:20.589090 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3091 22:24:20.589166 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3092 22:24:20.589241 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3093 22:24:20.589317 # ok 1365 Set SVE VL 5456
3094 22:24:20.589392 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3095 22:24:20.589466 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3096 22:24:20.589541 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3097 22:24:20.589616 # ok 1369 Set SVE VL 5472
3098 22:24:20.589698 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3099 22:24:20.589776 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3100 22:24:20.589859 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3101 22:24:20.589935 # ok 1373 Set SVE VL 5488
3102 22:24:20.590031 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3103 22:24:20.590110 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3104 22:24:20.590187 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3105 22:24:20.590263 # ok 1377 Set SVE VL 5504
3106 22:24:20.590338 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3107 22:24:20.590419 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3108 22:24:20.590494 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3109 22:24:20.590569 # ok 1381 Set SVE VL 5520
3110 22:24:20.590644 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3111 22:24:20.590719 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3112 22:24:20.590794 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3113 22:24:20.590885 # ok 1385 Set SVE VL 5536
3114 22:24:20.590963 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3115 22:24:20.591039 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3116 22:24:20.591114 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3117 22:24:20.591190 # ok 1389 Set SVE VL 5552
3118 22:24:20.591265 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3119 22:24:20.591340 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3120 22:24:20.591415 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3121 22:24:20.591505 # ok 1393 Set SVE VL 5568
3122 22:24:20.591584 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3123 22:24:20.591659 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3124 22:24:20.591734 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3125 22:24:20.591811 # ok 1397 Set SVE VL 5584
3126 22:24:20.591885 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3127 22:24:20.591974 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3128 22:24:20.592051 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3129 22:24:20.592127 # ok 1401 Set SVE VL 5600
3130 22:24:20.592389 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3131 22:24:20.592470 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3132 22:24:20.592546 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3133 22:24:20.592621 # ok 1405 Set SVE VL 5616
3134 22:24:20.592696 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3135 22:24:20.625589 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3136 22:24:20.625836 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3137 22:24:20.626060 # ok 1409 Set SVE VL 5632
3138 22:24:20.626287 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3139 22:24:20.626452 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3140 22:24:20.626576 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3141 22:24:20.626698 # ok 1413 Set SVE VL 5648
3142 22:24:20.626817 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3143 22:24:20.626917 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3144 22:24:20.627227 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3145 22:24:20.627357 # ok 1417 Set SVE VL 5664
3146 22:24:20.627473 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3147 22:24:20.627610 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3148 22:24:20.627713 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3149 22:24:20.627822 # ok 1421 Set SVE VL 5680
3150 22:24:20.627929 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3151 22:24:20.628035 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3152 22:24:20.628142 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3153 22:24:20.628249 # ok 1425 Set SVE VL 5696
3154 22:24:20.628355 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3155 22:24:20.630639 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3156 22:24:20.631021 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3157 22:24:20.631159 # ok 1429 Set SVE VL 5712
3158 22:24:20.631289 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3159 22:24:20.631421 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3160 22:24:20.631496 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3161 22:24:20.633859 # ok 1433 Set SVE VL 5728
3162 22:24:20.634215 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3163 22:24:20.634317 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3164 22:24:20.634417 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3165 22:24:20.634516 # ok 1437 Set SVE VL 5744
3166 22:24:20.634617 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3167 22:24:20.634693 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3168 22:24:20.634794 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3169 22:24:20.634873 # ok 1441 Set SVE VL 5760
3170 22:24:20.634969 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3171 22:24:20.635060 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3172 22:24:20.635140 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3173 22:24:20.635216 # ok 1445 Set SVE VL 5776
3174 22:24:20.635291 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3175 22:24:20.636208 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3176 22:24:20.636547 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3177 22:24:20.636735 # ok 1449 Set SVE VL 5792
3178 22:24:20.636901 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3179 22:24:20.637089 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3180 22:24:20.637249 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3181 22:24:20.637409 # ok 1453 Set SVE VL 5808
3182 22:24:20.637533 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3183 22:24:20.637658 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3184 22:24:20.637806 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3185 22:24:20.637930 # ok 1457 Set SVE VL 5824
3186 22:24:20.638050 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3187 22:24:20.638171 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3188 22:24:20.638292 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3189 22:24:20.638410 # ok 1461 Set SVE VL 5840
3190 22:24:20.638525 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3191 22:24:20.638640 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3192 22:24:20.638778 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3193 22:24:20.638907 # ok 1465 Set SVE VL 5856
3194 22:24:20.639018 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3195 22:24:20.639132 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3196 22:24:20.639232 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3197 22:24:20.639320 # ok 1469 Set SVE VL 5872
3198 22:24:20.639406 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3199 22:24:20.639492 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3200 22:24:20.639578 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3201 22:24:20.639665 # ok 1473 Set SVE VL 5888
3202 22:24:20.639771 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3203 22:24:20.639863 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3204 22:24:20.639954 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3205 22:24:20.640054 # ok 1477 Set SVE VL 5904
3206 22:24:20.640141 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3207 22:24:20.640277 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3208 22:24:20.640399 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3209 22:24:20.640524 # ok 1481 Set SVE VL 5920
3210 22:24:20.640642 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3211 22:24:20.640799 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3212 22:24:20.640968 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3213 22:24:20.641118 # ok 1485 Set SVE VL 5936
3214 22:24:20.641274 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3215 22:24:20.641396 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3216 22:24:20.641515 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3217 22:24:20.641630 # ok 1489 Set SVE VL 5952
3218 22:24:20.642034 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3219 22:24:20.642363 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3220 22:24:20.642487 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3221 22:24:20.642557 # ok 1493 Set SVE VL 5968
3222 22:24:20.642619 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3223 22:24:20.642681 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3224 22:24:20.642752 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3225 22:24:20.642819 # ok 1497 Set SVE VL 5984
3226 22:24:20.642891 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3227 22:24:20.642957 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3228 22:24:20.643024 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3229 22:24:20.643085 # ok 1501 Set SVE VL 6000
3230 22:24:20.643163 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3231 22:24:20.643227 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3232 22:24:20.643288 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3233 22:24:20.643350 # ok 1505 Set SVE VL 6016
3234 22:24:20.643413 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3235 22:24:20.643479 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3236 22:24:20.643543 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3237 22:24:20.643604 # ok 1509 Set SVE VL 6032
3238 22:24:20.643664 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3239 22:24:20.643919 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3240 22:24:20.644227 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3241 22:24:20.644330 # ok 1513 Set SVE VL 6048
3242 22:24:20.644423 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3243 22:24:20.644503 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3244 22:24:20.644578 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3245 22:24:20.644667 # ok 1517 Set SVE VL 6064
3246 22:24:20.644744 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3247 22:24:20.644832 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3248 22:24:20.644922 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3249 22:24:20.645011 # ok 1521 Set SVE VL 6080
3250 22:24:20.645100 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3251 22:24:20.645431 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3252 22:24:20.645616 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3253 22:24:20.645801 # ok 1525 Set SVE VL 6096
3254 22:24:20.645977 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3255 22:24:20.646127 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3256 22:24:20.646277 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3257 22:24:20.646424 # ok 1529 Set SVE VL 6112
3258 22:24:20.646608 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3259 22:24:20.646774 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3260 22:24:20.646930 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3261 22:24:20.647125 # ok 1533 Set SVE VL 6128
3262 22:24:20.647267 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3263 22:24:20.647450 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3264 22:24:20.647553 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3265 22:24:20.647642 # ok 1537 Set SVE VL 6144
3266 22:24:20.647740 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3267 22:24:20.647879 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3268 22:24:20.648026 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3269 22:24:20.648148 # ok 1541 Set SVE VL 6160
3270 22:24:20.648257 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3271 22:24:20.648401 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3272 22:24:20.648526 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3273 22:24:20.648650 # ok 1545 Set SVE VL 6176
3274 22:24:20.648787 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3275 22:24:20.648917 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3276 22:24:20.649063 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3277 22:24:20.649162 # ok 1549 Set SVE VL 6192
3278 22:24:20.649288 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3279 22:24:20.649407 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3280 22:24:20.649540 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3281 22:24:20.649739 # ok 1553 Set SVE VL 6208
3282 22:24:20.649925 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3283 22:24:20.650072 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3284 22:24:20.650240 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3285 22:24:20.650381 # ok 1557 Set SVE VL 6224
3286 22:24:20.650510 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3287 22:24:20.650600 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3288 22:24:20.650676 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3289 22:24:20.650751 # ok 1561 Set SVE VL 6240
3290 22:24:20.650823 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3291 22:24:20.650905 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3292 22:24:20.651027 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3293 22:24:20.651121 # ok 1565 Set SVE VL 6256
3294 22:24:20.651383 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3295 22:24:20.651453 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3296 22:24:20.651514 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3297 22:24:20.651575 # ok 1569 Set SVE VL 6272
3298 22:24:20.651637 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3299 22:24:20.651741 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3300 22:24:20.651861 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3301 22:24:20.651985 # ok 1573 Set SVE VL 6288
3302 22:24:20.652102 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3303 22:24:20.652213 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3304 22:24:20.652302 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3305 22:24:20.652587 # ok 1577 Set SVE VL 6304
3306 22:24:20.652675 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3307 22:24:20.652797 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3308 22:24:20.652898 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3309 22:24:20.652990 # ok 1581 Set SVE VL 6320
3310 22:24:20.653080 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3311 22:24:20.653157 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3312 22:24:20.653255 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3313 22:24:20.653339 # ok 1585 Set SVE VL 6336
3314 22:24:20.653436 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3315 22:24:20.653528 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3316 22:24:20.653625 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3317 22:24:20.653727 # ok 1589 Set SVE VL 6352
3318 22:24:20.657210 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3319 22:24:20.657331 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3320 22:24:20.657500 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3321 22:24:20.657597 # ok 1593 Set SVE VL 6368
3322 22:24:20.657714 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3323 22:24:20.657819 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3324 22:24:20.657913 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3325 22:24:20.658026 # ok 1597 Set SVE VL 6384
3326 22:24:20.658133 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3327 22:24:20.658244 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3328 22:24:20.658352 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3329 22:24:20.658465 # ok 1601 Set SVE VL 6400
3330 22:24:20.658556 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3331 22:24:20.658645 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3332 22:24:20.658742 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3333 22:24:20.658836 # ok 1605 Set SVE VL 6416
3334 22:24:20.658937 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3335 22:24:20.659023 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3336 22:24:20.659103 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3337 22:24:20.659630 # ok 1609 Set SVE VL 6432
3338 22:24:20.659729 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3339 22:24:20.659937 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3340 22:24:20.660028 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3341 22:24:20.660141 # ok 1613 Set SVE VL 6448
3342 22:24:20.660266 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3343 22:24:20.660358 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3344 22:24:20.660459 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3345 22:24:20.660543 # ok 1617 Set SVE VL 6464
3346 22:24:20.660634 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3347 22:24:20.660712 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3348 22:24:20.660803 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3349 22:24:20.661102 # ok 1621 Set SVE VL 6480
3350 22:24:20.661250 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3351 22:24:20.661376 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3352 22:24:20.661568 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3353 22:24:20.661718 # ok 1625 Set SVE VL 6496
3354 22:24:20.661858 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3355 22:24:20.661991 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3356 22:24:20.662090 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3357 22:24:20.662187 # ok 1629 Set SVE VL 6512
3358 22:24:20.662296 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3359 22:24:20.662435 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3360 22:24:20.662532 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3361 22:24:20.662607 # ok 1633 Set SVE VL 6528
3362 22:24:20.662686 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3363 22:24:20.662774 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3364 22:24:20.662856 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3365 22:24:20.662933 # ok 1637 Set SVE VL 6544
3366 22:24:20.663021 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3367 22:24:20.663087 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3368 22:24:20.663179 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3369 22:24:20.663272 # ok 1641 Set SVE VL 6560
3370 22:24:20.663354 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3371 22:24:20.663425 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3372 22:24:20.663694 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3373 22:24:20.663790 # ok 1645 Set SVE VL 6576
3374 22:24:20.663883 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3375 22:24:20.663975 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3376 22:24:20.664075 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3377 22:24:20.664166 # ok 1649 Set SVE VL 6592
3378 22:24:20.664271 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3379 22:24:20.664565 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3380 22:24:20.664654 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3381 22:24:20.664756 # ok 1653 Set SVE VL 6608
3382 22:24:20.664875 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3383 22:24:20.664965 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3384 22:24:20.665076 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3385 22:24:20.665185 # ok 1657 Set SVE VL 6624
3386 22:24:20.665283 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3387 22:24:20.665364 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3388 22:24:20.665481 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3389 22:24:20.665578 # ok 1661 Set SVE VL 6640
3390 22:24:20.665697 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3391 22:24:20.665792 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3392 22:24:20.666050 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3393 22:24:20.666121 # ok 1665 Set SVE VL 6656
3394 22:24:20.666199 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3395 22:24:20.666276 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3396 22:24:20.666377 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3397 22:24:20.666483 # ok 1669 Set SVE VL 6672
3398 22:24:20.666580 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3399 22:24:20.666658 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3400 22:24:20.666953 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3401 22:24:20.667058 # ok 1673 Set SVE VL 6688
3402 22:24:20.667151 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3403 22:24:20.667268 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3404 22:24:20.667380 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3405 22:24:20.667474 # ok 1677 Set SVE VL 6704
3406 22:24:20.667588 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3407 22:24:20.667680 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3408 22:24:20.667803 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3409 22:24:20.667885 # ok 1681 Set SVE VL 6720
3410 22:24:20.667997 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3411 22:24:20.668088 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3412 22:24:20.668174 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3413 22:24:20.668261 # ok 1685 Set SVE VL 6736
3414 22:24:20.668365 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3415 22:24:20.668460 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3416 22:24:20.668550 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3417 22:24:20.668636 # ok 1689 Set SVE VL 6752
3418 22:24:20.668733 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3419 22:24:20.668853 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3420 22:24:20.668956 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3421 22:24:20.669050 # ok 1693 Set SVE VL 6768
3422 22:24:20.669140 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3423 22:24:20.669434 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3424 22:24:20.669534 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3425 22:24:20.669635 # ok 1697 Set SVE VL 6784
3426 22:24:20.669730 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3427 22:24:20.669817 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3428 22:24:20.669896 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3429 22:24:20.669968 # ok 1701 Set SVE VL 6800
3430 22:24:20.670054 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3431 22:24:20.670145 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3432 22:24:20.670236 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3433 22:24:20.670329 # ok 1705 Set SVE VL 6816
3434 22:24:20.670617 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3435 22:24:20.670715 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3436 22:24:20.670808 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3437 22:24:20.670888 # ok 1709 Set SVE VL 6832
3438 22:24:20.670982 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3439 22:24:20.671105 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3440 22:24:20.671380 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3441 22:24:20.671488 # ok 1713 Set SVE VL 6848
3442 22:24:20.671571 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3443 22:24:20.671657 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3444 22:24:20.671740 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3445 22:24:20.671831 # ok 1717 Set SVE VL 6864
3446 22:24:20.671939 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3447 22:24:20.672034 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3448 22:24:20.672325 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3449 22:24:20.672422 # ok 1721 Set SVE VL 6880
3450 22:24:20.672505 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3451 22:24:20.672599 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3452 22:24:20.672691 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3453 22:24:20.672776 # ok 1725 Set SVE VL 6896
3454 22:24:20.672894 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3455 22:24:20.672988 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3456 22:24:20.673090 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3457 22:24:20.673166 # ok 1729 Set SVE VL 6912
3458 22:24:20.673242 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3459 22:24:20.673320 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3460 22:24:20.673593 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3461 22:24:20.673703 # ok 1733 Set SVE VL 6928
3462 22:24:20.673807 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3463 22:24:20.673927 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3464 22:24:20.674030 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3465 22:24:20.674119 # ok 1737 Set SVE VL 6944
3466 22:24:20.674216 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3467 22:24:20.674301 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3468 22:24:20.674384 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3469 22:24:20.674478 # ok 1741 Set SVE VL 6960
3470 22:24:20.674551 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3471 22:24:20.674625 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3472 22:24:20.674700 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3473 22:24:20.674774 # ok 1745 Set SVE VL 6976
3474 22:24:20.675018 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3475 22:24:20.675107 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3476 22:24:20.675219 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3477 22:24:20.675324 # ok 1749 Set SVE VL 6992
3478 22:24:20.675416 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3479 22:24:20.675511 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3480 22:24:20.675606 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3481 22:24:20.675699 # ok 1753 Set SVE VL 7008
3482 22:24:20.675791 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3483 22:24:20.675898 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3484 22:24:20.675995 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3485 22:24:20.676274 # ok 1757 Set SVE VL 7024
3486 22:24:20.676367 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3487 22:24:20.676439 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3488 22:24:20.676521 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3489 22:24:20.676605 # ok 1761 Set SVE VL 7040
3490 22:24:20.676684 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3491 22:24:20.676767 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3492 22:24:20.676855 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3493 22:24:20.676932 # ok 1765 Set SVE VL 7056
3494 22:24:20.677022 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3495 22:24:20.677305 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3496 22:24:20.677399 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3497 22:24:20.677484 # ok 1769 Set SVE VL 7072
3498 22:24:20.677582 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3499 22:24:20.677670 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3500 22:24:20.677750 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3501 22:24:20.680452 # ok 1773 Set SVE VL 7088
3502 22:24:20.680563 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3503 22:24:20.680676 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3504 22:24:20.680766 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3505 22:24:20.680862 # ok 1777 Set SVE VL 7104
3506 22:24:20.680949 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3507 22:24:20.681048 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3508 22:24:20.681141 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3509 22:24:20.681225 # ok 1781 Set SVE VL 7120
3510 22:24:20.681316 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3511 22:24:20.681410 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3512 22:24:20.681493 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3513 22:24:20.681601 # ok 1785 Set SVE VL 7136
3514 22:24:20.681720 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3515 22:24:20.681825 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3516 22:24:20.681908 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3517 22:24:20.681993 # ok 1789 Set SVE VL 7152
3518 22:24:20.682085 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3519 22:24:20.682414 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3520 22:24:20.682520 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3521 22:24:20.682606 # ok 1793 Set SVE VL 7168
3522 22:24:20.682697 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3523 22:24:20.682776 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3524 22:24:20.682865 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3525 22:24:20.682944 # ok 1797 Set SVE VL 7184
3526 22:24:20.683031 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3527 22:24:20.683398 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3528 22:24:20.683695 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3529 22:24:20.683798 # ok 1801 Set SVE VL 7200
3530 22:24:20.683889 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3531 22:24:20.683971 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3532 22:24:20.684087 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3533 22:24:20.684161 # ok 1805 Set SVE VL 7216
3534 22:24:20.684251 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3535 22:24:20.684357 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3536 22:24:20.684463 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3537 22:24:20.684718 # ok 1809 Set SVE VL 7232
3538 22:24:20.684812 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3539 22:24:20.684903 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3540 22:24:20.684980 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3541 22:24:20.685065 # ok 1813 Set SVE VL 7248
3542 22:24:20.685341 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3543 22:24:20.685435 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3544 22:24:20.685558 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3545 22:24:20.685656 # ok 1817 Set SVE VL 7264
3546 22:24:20.685758 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3547 22:24:20.685845 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3548 22:24:20.685940 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3549 22:24:20.686026 # ok 1821 Set SVE VL 7280
3550 22:24:20.686122 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3551 22:24:20.686228 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3552 22:24:20.686371 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3553 22:24:20.686454 # ok 1825 Set SVE VL 7296
3554 22:24:20.686542 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3555 22:24:20.686636 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3556 22:24:20.686737 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3557 22:24:20.686837 # ok 1829 Set SVE VL 7312
3558 22:24:20.686924 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3559 22:24:20.687209 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3560 22:24:20.687307 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3561 22:24:20.687396 # ok 1833 Set SVE VL 7328
3562 22:24:20.687499 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3563 22:24:20.687790 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3564 22:24:20.687898 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3565 22:24:20.687998 # ok 1837 Set SVE VL 7344
3566 22:24:20.688117 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3567 22:24:20.688211 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3568 22:24:20.688332 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3569 22:24:20.688418 # ok 1841 Set SVE VL 7360
3570 22:24:20.688511 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3571 22:24:20.688617 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3572 22:24:20.688715 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3573 22:24:20.688984 # ok 1845 Set SVE VL 7376
3574 22:24:20.689055 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3575 22:24:20.689145 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3576 22:24:20.689234 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3577 22:24:20.689329 # ok 1849 Set SVE VL 7392
3578 22:24:20.689413 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3579 22:24:20.689523 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3580 22:24:20.689820 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3581 22:24:20.689911 # ok 1853 Set SVE VL 7408
3582 22:24:20.690000 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3583 22:24:20.690096 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3584 22:24:20.690191 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3585 22:24:20.690282 # ok 1857 Set SVE VL 7424
3586 22:24:20.690367 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3587 22:24:20.693713 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3588 22:24:20.693825 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3589 22:24:20.693909 # ok 1861 Set SVE VL 7440
3590 22:24:20.693989 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3591 22:24:20.694068 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3592 22:24:20.694148 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3593 22:24:20.694226 # ok 1865 Set SVE VL 7456
3594 22:24:20.694305 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3595 22:24:20.694384 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3596 22:24:20.694462 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3597 22:24:20.694540 # ok 1869 Set SVE VL 7472
3598 22:24:20.694624 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3599 22:24:20.694703 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3600 22:24:20.694782 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3601 22:24:20.694861 # ok 1873 Set SVE VL 7488
3602 22:24:20.694939 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3603 22:24:20.695017 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3604 22:24:20.695096 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3605 22:24:20.695175 # ok 1877 Set SVE VL 7504
3606 22:24:20.695253 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3607 22:24:20.695332 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3608 22:24:20.695410 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3609 22:24:20.695489 # ok 1881 Set SVE VL 7520
3610 22:24:20.695567 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3611 22:24:20.695646 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3612 22:24:20.695724 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3613 22:24:20.695803 # ok 1885 Set SVE VL 7536
3614 22:24:20.695881 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3615 22:24:20.695960 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3616 22:24:20.696039 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3617 22:24:20.696137 # ok 1889 Set SVE VL 7552
3618 22:24:20.696219 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3619 22:24:20.696299 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3620 22:24:20.696378 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3621 22:24:20.696456 # ok 1893 Set SVE VL 7568
3622 22:24:20.696534 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3623 22:24:20.696839 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3624 22:24:20.696991 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3625 22:24:20.697114 # ok 1897 Set SVE VL 7584
3626 22:24:20.697233 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3627 22:24:20.697357 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3628 22:24:20.697482 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3629 22:24:20.697582 # ok 1901 Set SVE VL 7600
3630 22:24:20.697673 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3631 22:24:20.697751 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3632 22:24:20.697829 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3633 22:24:20.697928 # ok 1905 Set SVE VL 7616
3634 22:24:20.698024 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3635 22:24:20.698093 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3636 22:24:20.698157 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3637 22:24:20.698222 # ok 1909 Set SVE VL 7632
3638 22:24:20.698301 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3639 22:24:20.698379 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3640 22:24:20.698448 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3641 22:24:20.698515 # ok 1913 Set SVE VL 7648
3642 22:24:20.698588 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3643 22:24:20.698660 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3644 22:24:20.698743 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3645 22:24:20.698842 # ok 1917 Set SVE VL 7664
3646 22:24:20.698939 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3647 22:24:20.699042 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3648 22:24:20.699122 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3649 22:24:20.699200 # ok 1921 Set SVE VL 7680
3650 22:24:20.699280 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3651 22:24:20.699374 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3652 22:24:20.699471 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3653 22:24:20.699556 # ok 1925 Set SVE VL 7696
3654 22:24:20.699633 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3655 22:24:20.699701 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3656 22:24:20.699770 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3657 22:24:20.699846 # ok 1929 Set SVE VL 7712
3658 22:24:20.699923 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3659 22:24:20.699996 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3660 22:24:20.700072 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3661 22:24:20.700148 # ok 1933 Set SVE VL 7728
3662 22:24:20.700221 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3663 22:24:20.700310 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3664 22:24:20.700380 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3665 22:24:20.700455 # ok 1937 Set SVE VL 7744
3666 22:24:20.700742 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3667 22:24:20.700853 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3668 22:24:20.700953 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3669 22:24:20.701031 # ok 1941 Set SVE VL 7760
3670 22:24:20.701106 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3671 22:24:20.701183 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3672 22:24:20.701259 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3673 22:24:20.701335 # ok 1945 Set SVE VL 7776
3674 22:24:20.701395 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3675 22:24:20.701452 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3676 22:24:20.701509 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3677 22:24:20.701568 # ok 1949 Set SVE VL 7792
3678 22:24:20.701627 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3679 22:24:20.701707 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3680 22:24:20.701768 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3681 22:24:20.701826 # ok 1953 Set SVE VL 7808
3682 22:24:20.701883 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3683 22:24:20.701940 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3684 22:24:20.705406 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3685 22:24:20.705506 # ok 1957 Set SVE VL 7824
3686 22:24:20.705599 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3687 22:24:20.705690 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3688 22:24:20.705800 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3689 22:24:20.705890 # ok 1961 Set SVE VL 7840
3690 22:24:20.706012 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3691 22:24:20.706129 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3692 22:24:20.706230 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3693 22:24:20.706335 # ok 1965 Set SVE VL 7856
3694 22:24:20.706439 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3695 22:24:20.706543 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3696 22:24:20.706860 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3697 22:24:20.706953 # ok 1969 Set SVE VL 7872
3698 22:24:20.707042 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3699 22:24:20.708260 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3700 22:24:20.708558 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3701 22:24:20.708661 # ok 1973 Set SVE VL 7888
3702 22:24:20.708940 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3703 22:24:20.709038 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3704 22:24:20.709116 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3705 22:24:20.709192 # ok 1977 Set SVE VL 7904
3706 22:24:20.709281 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3707 22:24:20.709359 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3708 22:24:20.709447 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3709 22:24:20.709537 # ok 1981 Set SVE VL 7920
3710 22:24:20.709637 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3711 22:24:20.709932 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3712 22:24:20.710042 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3713 22:24:20.710123 # ok 1985 Set SVE VL 7936
3714 22:24:20.710211 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3715 22:24:20.710300 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3716 22:24:20.710558 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3717 22:24:20.710658 # ok 1989 Set SVE VL 7952
3718 22:24:20.710755 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3719 22:24:20.710859 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3720 22:24:20.710986 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3721 22:24:20.711098 # ok 1993 Set SVE VL 7968
3722 22:24:20.711371 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3723 22:24:20.711481 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3724 22:24:20.711802 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3725 22:24:20.711901 # ok 1997 Set SVE VL 7984
3726 22:24:20.712023 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3727 22:24:20.712119 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3728 22:24:20.712237 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3729 22:24:20.712338 # ok 2001 Set SVE VL 8000
3730 22:24:20.712434 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3731 22:24:20.712536 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3732 22:24:20.712837 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3733 22:24:20.712942 # ok 2005 Set SVE VL 8016
3734 22:24:20.713038 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3735 22:24:20.713117 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3736 22:24:20.713405 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3737 22:24:20.713517 # ok 2009 Set SVE VL 8032
3738 22:24:20.713638 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3739 22:24:20.713756 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3740 22:24:20.713867 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3741 22:24:20.713986 # ok 2013 Set SVE VL 8048
3742 22:24:20.714070 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3743 22:24:20.714161 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3744 22:24:20.714255 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3745 22:24:20.714353 # ok 2017 Set SVE VL 8064
3746 22:24:20.714446 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3747 22:24:20.714548 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3748 22:24:20.714828 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3749 22:24:20.714939 # ok 2021 Set SVE VL 8080
3750 22:24:20.715042 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3751 22:24:20.715142 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3752 22:24:20.715623 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3753 22:24:20.715731 # ok 2025 Set SVE VL 8096
3754 22:24:20.715854 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3755 22:24:20.715965 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3756 22:24:20.716085 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3757 22:24:20.716201 # ok 2029 Set SVE VL 8112
3758 22:24:20.716299 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3759 22:24:20.716595 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3760 22:24:20.716691 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3761 22:24:20.716792 # ok 2033 Set SVE VL 8128
3762 22:24:20.716861 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3763 22:24:20.716949 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3764 22:24:20.717227 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3765 22:24:20.717309 # ok 2037 Set SVE VL 8144
3766 22:24:20.717397 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3767 22:24:20.717489 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3768 22:24:20.717746 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3769 22:24:20.717837 # ok 2041 Set SVE VL 8160
3770 22:24:20.717910 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3771 22:24:20.718139 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3772 22:24:20.718231 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3773 22:24:20.718315 # ok 2045 Set SVE VL 8176
3774 22:24:20.718410 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3775 22:24:20.718677 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3776 22:24:20.718787 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3777 22:24:20.718892 # ok 2049 Set SVE VL 8192
3778 22:24:20.719005 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3779 22:24:20.719466 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3780 22:24:20.719753 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3781 22:24:20.719873 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3782 22:24:20.719998 # ok 2054 Streaming SVE get_fpsimd() gave same state
3783 22:24:20.720108 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3784 22:24:20.720214 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3785 22:24:20.720314 # ok 2057 Set Streaming SVE VL 16
3786 22:24:20.720418 # ok 2058 Set and get Streaming SVE data for VL 16
3787 22:24:20.720711 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3788 22:24:20.720818 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3789 22:24:20.720916 # ok 2061 Set Streaming SVE VL 32
3790 22:24:20.721198 # ok 2062 Set and get Streaming SVE data for VL 32
3791 22:24:20.721292 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3792 22:24:20.721385 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3793 22:24:20.721463 # ok 2065 Set Streaming SVE VL 48
3794 22:24:20.721581 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3795 22:24:20.721903 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3796 22:24:20.722004 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3797 22:24:20.722098 # ok 2069 Set Streaming SVE VL 64
3798 22:24:20.722189 # ok 2070 Set and get Streaming SVE data for VL 64
3799 22:24:20.722279 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3800 22:24:20.722643 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3801 22:24:20.722738 # ok 2073 Set Streaming SVE VL 80
3802 22:24:20.722834 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3803 22:24:20.722921 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3804 22:24:20.723234 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3805 22:24:20.723330 # ok 2077 Set Streaming SVE VL 96
3806 22:24:20.723624 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3807 22:24:20.723734 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3808 22:24:20.723842 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3809 22:24:20.724125 # ok 2081 Set Streaming SVE VL 112
3810 22:24:20.724241 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3811 22:24:20.724320 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3812 22:24:20.724605 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3813 22:24:20.724691 # ok 2085 Set Streaming SVE VL 128
3814 22:24:20.724781 # ok 2086 Set and get Streaming SVE data for VL 128
3815 22:24:20.725088 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3816 22:24:20.725178 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3817 22:24:20.725276 # ok 2089 Set Streaming SVE VL 144
3818 22:24:20.725371 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3819 22:24:20.725676 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3820 22:24:20.725784 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3821 22:24:20.725885 # ok 2093 Set Streaming SVE VL 160
3822 22:24:20.725982 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3823 22:24:20.726156 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3824 22:24:20.726461 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3825 22:24:20.726552 # ok 2097 Set Streaming SVE VL 176
3826 22:24:20.726637 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3827 22:24:20.726727 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3828 22:24:20.726975 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3829 22:24:20.727069 # ok 2101 Set Streaming SVE VL 192
3830 22:24:20.727358 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3831 22:24:20.727494 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3832 22:24:20.727621 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3833 22:24:20.727921 # ok 2105 Set Streaming SVE VL 208
3834 22:24:20.728044 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3835 22:24:20.728178 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3836 22:24:20.728297 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3837 22:24:20.728393 # ok 2109 Set Streaming SVE VL 224
3838 22:24:20.728683 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3839 22:24:20.728787 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3840 22:24:20.728880 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3841 22:24:20.729138 # ok 2113 Set Streaming SVE VL 240
3842 22:24:20.729233 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3843 22:24:20.729358 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3844 22:24:20.729623 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3845 22:24:20.729729 # ok 2117 Set Streaming SVE VL 256
3846 22:24:20.729828 # ok 2118 Set and get Streaming SVE data for VL 256
3847 22:24:20.730121 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3848 22:24:20.730216 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3849 22:24:20.730301 # ok 2121 Set Streaming SVE VL 272
3850 22:24:20.730578 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3851 22:24:20.730683 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3852 22:24:20.730778 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3853 22:24:20.730882 # ok 2125 Set Streaming SVE VL 288
3854 22:24:20.737591 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3855 22:24:20.737718 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3856 22:24:20.737830 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3857 22:24:20.737942 # ok 2129 Set Streaming SVE VL 304
3858 22:24:20.738242 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3859 22:24:20.738345 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3860 22:24:20.738453 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3861 22:24:20.738579 # ok 2133 Set Streaming SVE VL 320
3862 22:24:20.738704 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3863 22:24:20.738821 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3864 22:24:20.739115 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3865 22:24:20.739393 # ok 2137 Set Streaming SVE VL 336
3866 22:24:20.739665 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3867 22:24:20.739770 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3868 22:24:20.739868 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3869 22:24:20.739965 # ok 2141 Set Streaming SVE VL 352
3870 22:24:20.740084 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3871 22:24:20.740206 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3872 22:24:20.740331 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3873 22:24:20.740422 # ok 2145 Set Streaming SVE VL 368
3874 22:24:20.740529 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3875 22:24:20.740816 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3876 22:24:20.740978 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3877 22:24:20.741099 # ok 2149 Set Streaming SVE VL 384
3878 22:24:20.741228 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3879 22:24:20.741357 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3880 22:24:20.741507 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3881 22:24:20.741628 # ok 2153 Set Streaming SVE VL 400
3882 22:24:20.741739 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3883 22:24:20.741834 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3884 22:24:20.742114 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3885 22:24:20.742207 # ok 2157 Set Streaming SVE VL 416
3886 22:24:20.742298 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3887 22:24:20.742391 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3888 22:24:20.742677 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3889 22:24:20.742768 # ok 2161 Set Streaming SVE VL 432
3890 22:24:20.742862 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3891 22:24:20.742956 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3892 22:24:20.743595 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3893 22:24:20.743685 # ok 2165 Set Streaming SVE VL 448
3894 22:24:20.743775 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3895 22:24:20.743874 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3896 22:24:20.743968 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3897 22:24:20.744065 # ok 2169 Set Streaming SVE VL 464
3898 22:24:20.744353 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3899 22:24:20.744681 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3900 22:24:20.744793 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3901 22:24:20.744918 # ok 2173 Set Streaming SVE VL 480
3902 22:24:20.745037 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3903 22:24:20.745124 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3904 22:24:20.745222 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3905 22:24:20.745306 # ok 2177 Set Streaming SVE VL 496
3906 22:24:20.745405 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3907 22:24:20.745682 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3908 22:24:20.745804 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3909 22:24:20.745903 # ok 2181 Set Streaming SVE VL 512
3910 22:24:20.745996 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3911 22:24:20.746301 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3912 22:24:20.746400 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3913 22:24:20.746492 # ok 2185 Set Streaming SVE VL 528
3914 22:24:20.746780 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3915 22:24:20.746878 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3916 22:24:20.746970 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3917 22:24:20.747060 # ok 2189 Set Streaming SVE VL 544
3918 22:24:20.747503 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3919 22:24:20.747802 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3920 22:24:20.747898 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3921 22:24:20.747988 # ok 2193 Set Streaming SVE VL 560
3922 22:24:20.750188 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3923 22:24:20.750289 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3924 22:24:20.750372 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3925 22:24:20.750449 # ok 2197 Set Streaming SVE VL 576
3926 22:24:20.750524 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3927 22:24:20.750599 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3928 22:24:20.750679 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3929 22:24:20.750755 # ok 2201 Set Streaming SVE VL 592
3930 22:24:20.750830 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3931 22:24:20.750907 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3932 22:24:20.750982 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3933 22:24:20.751058 # ok 2205 Set Streaming SVE VL 608
3934 22:24:20.751132 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3935 22:24:20.751207 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3936 22:24:20.751281 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3937 22:24:20.751594 # ok 2209 Set Streaming SVE VL 624
3938 22:24:20.751695 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3939 22:24:20.751776 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3940 22:24:20.751852 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3941 22:24:20.751928 # ok 2213 Set Streaming SVE VL 640
3942 22:24:20.752004 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3943 22:24:20.752079 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3944 22:24:20.752154 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3945 22:24:20.752245 # ok 2217 Set Streaming SVE VL 656
3946 22:24:20.752323 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3947 22:24:20.752399 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3948 22:24:20.752474 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3949 22:24:20.752550 # ok 2221 Set Streaming SVE VL 672
3950 22:24:20.752639 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3951 22:24:20.752717 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3952 22:24:20.752793 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3953 22:24:20.752881 # ok 2225 Set Streaming SVE VL 688
3954 22:24:20.752972 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3955 22:24:20.753068 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3956 22:24:20.753355 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3957 22:24:20.753449 # ok 2229 Set Streaming SVE VL 704
3958 22:24:20.753551 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3959 22:24:20.753644 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3960 22:24:20.753770 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3961 22:24:20.753889 # ok 2233 Set Streaming SVE VL 720
3962 22:24:20.754157 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3963 22:24:20.754268 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3964 22:24:20.754369 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3965 22:24:20.754466 # ok 2237 Set Streaming SVE VL 736
3966 22:24:20.754562 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3967 22:24:20.754847 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3968 22:24:20.754970 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3969 22:24:20.755080 # ok 2241 Set Streaming SVE VL 752
3970 22:24:20.755473 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3971 22:24:20.755785 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3972 22:24:20.755878 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3973 22:24:20.755965 # ok 2245 Set Streaming SVE VL 768
3974 22:24:20.756059 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3975 22:24:20.756170 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3976 22:24:20.756285 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3977 22:24:20.756381 # ok 2249 Set Streaming SVE VL 784
3978 22:24:20.756668 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3979 22:24:20.756806 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3980 22:24:20.756913 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3981 22:24:20.757015 # ok 2253 Set Streaming SVE VL 800
3982 22:24:20.757113 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3983 22:24:20.757381 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3984 22:24:20.757491 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3985 22:24:20.757575 # ok 2257 Set Streaming SVE VL 816
3986 22:24:20.757680 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3987 22:24:20.757838 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3988 22:24:20.758145 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3989 22:24:20.758245 # ok 2261 Set Streaming SVE VL 832
3990 22:24:20.758343 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3991 22:24:20.758631 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3992 22:24:20.758727 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3993 22:24:20.758827 # ok 2265 Set Streaming SVE VL 848
3994 22:24:20.758914 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3995 22:24:20.759010 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3996 22:24:20.759489 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3997 22:24:20.759841 # ok 2269 Set Streaming SVE VL 864
3998 22:24:20.759954 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
3999 22:24:20.760060 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
4000 22:24:20.760141 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4001 22:24:20.760234 # ok 2273 Set Streaming SVE VL 880
4002 22:24:20.760329 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4003 22:24:20.760612 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4004 22:24:20.760710 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4005 22:24:20.760809 # ok 2277 Set Streaming SVE VL 896
4006 22:24:20.760882 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4007 22:24:20.769106 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4008 22:24:20.769231 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4009 22:24:20.769325 # ok 2281 Set Streaming SVE VL 912
4010 22:24:20.769693 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4011 22:24:20.769800 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4012 22:24:20.769890 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4013 22:24:20.769980 # ok 2285 Set Streaming SVE VL 928
4014 22:24:20.770067 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4015 22:24:20.770361 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4016 22:24:20.770456 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4017 22:24:20.770533 # ok 2289 Set Streaming SVE VL 944
4018 22:24:20.770803 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4019 22:24:20.770889 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4020 22:24:20.770993 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4021 22:24:20.771380 # ok 2293 Set Streaming SVE VL 960
4022 22:24:20.771652 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4023 22:24:20.771766 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4024 22:24:20.771859 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4025 22:24:20.771963 # ok 2297 Set Streaming SVE VL 976
4026 22:24:20.772054 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4027 22:24:20.772352 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4028 22:24:20.772465 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4029 22:24:20.772549 # ok 2301 Set Streaming SVE VL 992
4030 22:24:20.772646 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4031 22:24:20.772947 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4032 22:24:20.773058 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4033 22:24:20.773146 # ok 2305 Set Streaming SVE VL 1008
4034 22:24:20.773445 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4035 22:24:20.773543 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4036 22:24:20.773638 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4037 22:24:20.773747 # ok 2309 Set Streaming SVE VL 1024
4038 22:24:20.773835 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4039 22:24:20.774127 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4040 22:24:20.774237 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4041 22:24:20.774330 # ok 2313 Set Streaming SVE VL 1040
4042 22:24:20.774605 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4043 22:24:20.774700 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4044 22:24:20.774995 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4045 22:24:20.775092 # ok 2317 Set Streaming SVE VL 1056
4046 22:24:20.775430 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4047 22:24:20.775706 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4048 22:24:20.775784 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4049 22:24:20.775857 # ok 2321 Set Streaming SVE VL 1072
4050 22:24:20.776109 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4051 22:24:20.776358 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4052 22:24:20.776423 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4053 22:24:20.776494 # ok 2325 Set Streaming SVE VL 1088
4054 22:24:20.776744 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4055 22:24:20.776819 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4056 22:24:20.777066 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4057 22:24:20.777130 # ok 2329 Set Streaming SVE VL 1104
4058 22:24:20.777200 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4059 22:24:20.777452 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4060 22:24:20.777527 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4061 22:24:20.777785 # ok 2333 Set Streaming SVE VL 1120
4062 22:24:20.777865 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4063 22:24:20.778114 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4064 22:24:20.778191 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4065 22:24:20.778262 # ok 2337 Set Streaming SVE VL 1136
4066 22:24:20.778509 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4067 22:24:20.778583 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4068 22:24:20.778655 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4069 22:24:20.778906 # ok 2341 Set Streaming SVE VL 1152
4070 22:24:20.778983 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4071 22:24:20.779398 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4072 22:24:20.779649 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4073 22:24:20.779714 # ok 2345 Set Streaming SVE VL 1168
4074 22:24:20.779962 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4075 22:24:20.780036 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4076 22:24:20.780281 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4077 22:24:20.780356 # ok 2349 Set Streaming SVE VL 1184
4078 22:24:20.780594 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4079 22:24:20.780668 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4080 22:24:20.780913 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4081 22:24:20.780988 # ok 2353 Set Streaming SVE VL 1200
4082 22:24:20.781234 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4083 22:24:20.781481 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4084 22:24:20.781546 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4085 22:24:20.781616 # ok 2357 Set Streaming SVE VL 1216
4086 22:24:20.781913 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4087 22:24:20.782015 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4088 22:24:20.782118 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4089 22:24:20.782207 # ok 2361 Set Streaming SVE VL 1232
4090 22:24:20.782301 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4091 22:24:20.782393 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4092 22:24:20.782489 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4093 22:24:20.782781 # ok 2365 Set Streaming SVE VL 1248
4094 22:24:20.782882 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4095 22:24:20.782984 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4096 22:24:20.783250 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4097 22:24:20.783348 # ok 2369 Set Streaming SVE VL 1264
4098 22:24:20.783425 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4099 22:24:20.783706 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4100 22:24:20.783803 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4101 22:24:20.783901 # ok 2373 Set Streaming SVE VL 1280
4102 22:24:20.783987 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4103 22:24:20.784082 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4104 22:24:20.784373 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4105 22:24:20.784458 # ok 2377 Set Streaming SVE VL 1296
4106 22:24:20.784546 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4107 22:24:20.784838 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4108 22:24:20.784935 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4109 22:24:20.785032 # ok 2381 Set Streaming SVE VL 1312
4110 22:24:20.785116 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4111 22:24:20.785216 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4112 22:24:20.785312 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4113 22:24:20.785405 # ok 2385 Set Streaming SVE VL 1328
4114 22:24:20.785677 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4115 22:24:20.785777 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4116 22:24:20.785865 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4117 22:24:20.786121 # ok 2389 Set Streaming SVE VL 1344
4118 22:24:20.786198 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4119 22:24:20.786446 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4120 22:24:20.786551 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4121 22:24:20.786649 # ok 2393 Set Streaming SVE VL 1360
4122 22:24:20.786744 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4123 22:24:20.787022 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4124 22:24:20.787102 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4125 22:24:20.787394 # ok 2397 Set Streaming SVE VL 1376
4126 22:24:20.787510 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4127 22:24:20.787610 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4128 22:24:20.787710 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4129 22:24:20.787802 # ok 2401 Set Streaming SVE VL 1392
4130 22:24:20.813784 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4131 22:24:20.814004 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4132 22:24:20.814095 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4133 22:24:20.814186 # ok 2405 Set Streaming SVE VL 1408
4134 22:24:20.814271 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4135 22:24:20.814359 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4136 22:24:20.814447 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4137 22:24:20.814537 # ok 2409 Set Streaming SVE VL 1424
4138 22:24:20.814626 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4139 22:24:20.814711 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4140 22:24:20.814795 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4141 22:24:20.814879 # ok 2413 Set Streaming SVE VL 1440
4142 22:24:20.814962 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4143 22:24:20.815045 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4144 22:24:20.815125 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4145 22:24:20.815205 # ok 2417 Set Streaming SVE VL 1456
4146 22:24:20.815283 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4147 22:24:20.815362 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4148 22:24:20.815439 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4149 22:24:20.815515 # ok 2421 Set Streaming SVE VL 1472
4150 22:24:20.815589 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4151 22:24:20.815661 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4152 22:24:20.815732 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4153 22:24:20.815807 # ok 2425 Set Streaming SVE VL 1488
4154 22:24:20.815879 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4155 22:24:20.815951 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4156 22:24:20.816022 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4157 22:24:20.816097 # ok 2429 Set Streaming SVE VL 1504
4158 22:24:20.816172 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4159 22:24:20.816250 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4160 22:24:20.816551 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4161 22:24:20.816642 # ok 2433 Set Streaming SVE VL 1520
4162 22:24:20.816716 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4163 22:24:20.816787 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4164 22:24:20.816857 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4165 22:24:20.816933 # ok 2437 Set Streaming SVE VL 1536
4166 22:24:20.817002 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4167 22:24:20.817074 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4168 22:24:20.817145 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4169 22:24:20.817214 # ok 2441 Set Streaming SVE VL 1552
4170 22:24:20.817283 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4171 22:24:20.817352 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4172 22:24:20.817424 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4173 22:24:20.817496 # ok 2445 Set Streaming SVE VL 1568
4174 22:24:20.817567 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4175 22:24:20.817637 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4176 22:24:20.817718 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4177 22:24:20.817789 # ok 2449 Set Streaming SVE VL 1584
4178 22:24:20.817869 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4179 22:24:20.817954 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4180 22:24:20.818037 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4181 22:24:20.818110 # ok 2453 Set Streaming SVE VL 1600
4182 22:24:20.818181 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4183 22:24:20.818257 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4184 22:24:20.818332 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4185 22:24:20.818411 # ok 2457 Set Streaming SVE VL 1616
4186 22:24:20.818486 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4187 22:24:20.818567 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4188 22:24:20.818652 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4189 22:24:20.818736 # ok 2461 Set Streaming SVE VL 1632
4190 22:24:20.818820 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4191 22:24:20.818894 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4192 22:24:20.818964 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4193 22:24:20.819033 # ok 2465 Set Streaming SVE VL 1648
4194 22:24:20.819112 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4195 22:24:20.819192 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4196 22:24:20.819471 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4197 22:24:20.819553 # ok 2469 Set Streaming SVE VL 1664
4198 22:24:20.819625 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4199 22:24:20.819697 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4200 22:24:20.819773 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4201 22:24:20.819850 # ok 2473 Set Streaming SVE VL 1680
4202 22:24:20.819921 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4203 22:24:20.819995 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4204 22:24:20.820067 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4205 22:24:20.820140 # ok 2477 Set Streaming SVE VL 1696
4206 22:24:20.820211 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4207 22:24:20.820281 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4208 22:24:20.820358 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4209 22:24:20.820433 # ok 2481 Set Streaming SVE VL 1712
4210 22:24:20.820510 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4211 22:24:20.820587 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4212 22:24:20.820672 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4213 22:24:20.820756 # ok 2485 Set Streaming SVE VL 1728
4214 22:24:20.820833 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4215 22:24:20.820919 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4216 22:24:20.821002 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4217 22:24:20.821087 # ok 2489 Set Streaming SVE VL 1744
4218 22:24:20.821171 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4219 22:24:20.821263 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4220 22:24:20.821346 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4221 22:24:20.821430 # ok 2493 Set Streaming SVE VL 1760
4222 22:24:20.821513 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4223 22:24:20.821599 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4224 22:24:20.821693 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4225 22:24:20.821779 # ok 2497 Set Streaming SVE VL 1776
4226 22:24:20.821861 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4227 22:24:20.821945 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4228 22:24:20.822028 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4229 22:24:20.822112 # ok 2501 Set Streaming SVE VL 1792
4230 22:24:20.822195 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4231 22:24:20.822494 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4232 22:24:20.822598 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4233 22:24:20.822683 # ok 2505 Set Streaming SVE VL 1808
4234 22:24:20.822764 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4235 22:24:20.822844 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4236 22:24:20.822924 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4237 22:24:20.823005 # ok 2509 Set Streaming SVE VL 1824
4238 22:24:20.823085 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4239 22:24:20.823165 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4240 22:24:20.823242 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4241 22:24:20.823324 # ok 2513 Set Streaming SVE VL 1840
4242 22:24:20.823404 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4243 22:24:20.823485 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4244 22:24:20.823565 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4245 22:24:20.823646 # ok 2517 Set Streaming SVE VL 1856
4246 22:24:20.823725 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4247 22:24:20.823805 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4248 22:24:20.823887 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4249 22:24:20.823968 # ok 2521 Set Streaming SVE VL 1872
4250 22:24:20.824051 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4251 22:24:20.824132 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4252 22:24:20.824215 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4253 22:24:20.824295 # ok 2525 Set Streaming SVE VL 1888
4254 22:24:20.824376 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4255 22:24:20.824456 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4256 22:24:20.824540 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4257 22:24:20.824621 # ok 2529 Set Streaming SVE VL 1904
4258 22:24:20.824702 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4259 22:24:20.824782 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4260 22:24:20.824863 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4261 22:24:20.824945 # ok 2533 Set Streaming SVE VL 1920
4262 22:24:20.825028 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4263 22:24:20.825111 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4264 22:24:20.825194 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4265 22:24:20.825279 # ok 2537 Set Streaming SVE VL 1936
4266 22:24:20.825566 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4267 22:24:20.825661 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4268 22:24:20.825731 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4269 22:24:20.825799 # ok 2541 Set Streaming SVE VL 1952
4270 22:24:20.825902 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4271 22:24:20.826001 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4272 22:24:20.826093 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4273 22:24:20.826181 # ok 2545 Set Streaming SVE VL 1968
4274 22:24:20.826251 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4275 22:24:20.826317 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4276 22:24:20.826407 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4277 22:24:20.826482 # ok 2549 Set Streaming SVE VL 1984
4278 22:24:20.826555 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4279 22:24:20.826628 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4280 22:24:20.826701 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4281 22:24:20.826779 # ok 2553 Set Streaming SVE VL 2000
4282 22:24:20.826867 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4283 22:24:20.826937 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4284 22:24:20.827007 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4285 22:24:20.827068 # ok 2557 Set Streaming SVE VL 2016
4286 22:24:20.827138 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4287 22:24:20.827208 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4288 22:24:20.827280 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4289 22:24:20.827346 # ok 2561 Set Streaming SVE VL 2032
4290 22:24:20.827412 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4291 22:24:20.827512 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4292 22:24:20.827611 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4293 22:24:20.827715 # ok 2565 Set Streaming SVE VL 2048
4294 22:24:20.827810 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4295 22:24:20.827908 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4296 22:24:20.827996 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4297 22:24:20.828072 # ok 2569 Set Streaming SVE VL 2064
4298 22:24:20.828169 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4299 22:24:20.828241 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4300 22:24:20.828300 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4301 22:24:20.828359 # ok 2573 Set Streaming SVE VL 2080
4302 22:24:20.828638 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4303 22:24:20.828724 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4304 22:24:20.828821 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4305 22:24:20.828906 # ok 2577 Set Streaming SVE VL 2096
4306 22:24:20.828970 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4307 22:24:20.829049 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4308 22:24:20.829148 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4309 22:24:20.829227 # ok 2581 Set Streaming SVE VL 2112
4310 22:24:20.829301 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4311 22:24:20.829374 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4312 22:24:20.829446 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4313 22:24:20.829519 # ok 2585 Set Streaming SVE VL 2128
4314 22:24:20.829592 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4315 22:24:20.829674 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4316 22:24:20.829748 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4317 22:24:20.829820 # ok 2589 Set Streaming SVE VL 2144
4318 22:24:20.829898 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4319 22:24:20.829970 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4320 22:24:20.830061 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4321 22:24:20.830156 # ok 2593 Set Streaming SVE VL 2160
4322 22:24:20.830253 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4323 22:24:20.830349 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4324 22:24:20.830457 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4325 22:24:20.830549 # ok 2597 Set Streaming SVE VL 2176
4326 22:24:20.830625 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4327 22:24:20.830687 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4328 22:24:20.830758 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4329 22:24:20.830846 # ok 2601 Set Streaming SVE VL 2192
4330 22:24:20.830915 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4331 22:24:20.830973 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4332 22:24:20.831031 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4333 22:24:20.831089 # ok 2605 Set Streaming SVE VL 2208
4334 22:24:20.831159 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4335 22:24:20.831225 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4336 22:24:20.831285 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4337 22:24:20.831546 # ok 2609 Set Streaming SVE VL 2224
4338 22:24:20.831636 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4339 22:24:20.831708 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4340 22:24:20.831772 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4341 22:24:20.831839 # ok 2613 Set Streaming SVE VL 2240
4342 22:24:20.831900 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4343 22:24:20.831960 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4344 22:24:20.832021 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4345 22:24:20.832081 # ok 2617 Set Streaming SVE VL 2256
4346 22:24:20.832141 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4347 22:24:20.832202 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4348 22:24:20.832263 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4349 22:24:20.832323 # ok 2621 Set Streaming SVE VL 2272
4350 22:24:20.832383 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4351 22:24:20.832443 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4352 22:24:20.832503 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4353 22:24:20.832563 # ok 2625 Set Streaming SVE VL 2288
4354 22:24:20.832623 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4355 22:24:20.832683 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4356 22:24:20.832743 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4357 22:24:20.832803 # ok 2629 Set Streaming SVE VL 2304
4358 22:24:20.832867 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4359 22:24:20.832927 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4360 22:24:20.832987 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4361 22:24:20.833046 # ok 2633 Set Streaming SVE VL 2320
4362 22:24:20.833105 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4363 22:24:20.833165 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4364 22:24:20.833225 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4365 22:24:20.833285 # ok 2637 Set Streaming SVE VL 2336
4366 22:24:20.833344 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4367 22:24:20.833404 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4368 22:24:20.833463 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4369 22:24:20.833522 # ok 2641 Set Streaming SVE VL 2352
4370 22:24:20.833582 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4371 22:24:20.833642 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4372 22:24:20.833940 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4373 22:24:20.834035 # ok 2645 Set Streaming SVE VL 2368
4374 22:24:20.834106 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4375 22:24:20.834183 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4376 22:24:20.834263 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4377 22:24:20.834345 # ok 2649 Set Streaming SVE VL 2384
4378 22:24:20.834430 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4379 22:24:20.834500 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4380 22:24:20.834596 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4381 22:24:20.834690 # ok 2653 Set Streaming SVE VL 2400
4382 22:24:20.834778 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4383 22:24:20.834876 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4384 22:24:20.834959 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4385 22:24:20.835052 # ok 2657 Set Streaming SVE VL 2416
4386 22:24:20.835142 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4387 22:24:20.835215 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4388 22:24:20.835287 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4389 22:24:20.835368 # ok 2661 Set Streaming SVE VL 2432
4390 22:24:20.835440 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4391 22:24:20.835502 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4392 22:24:20.835566 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4393 22:24:20.835645 # ok 2665 Set Streaming SVE VL 2448
4394 22:24:20.835726 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4395 22:24:20.835802 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4396 22:24:20.835898 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4397 22:24:20.835991 # ok 2669 Set Streaming SVE VL 2464
4398 22:24:20.836086 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4399 22:24:20.836180 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4400 22:24:20.836276 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4401 22:24:20.836349 # ok 2673 Set Streaming SVE VL 2480
4402 22:24:20.836427 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4403 22:24:20.836562 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4404 22:24:20.836654 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4405 22:24:20.836721 # ok 2677 Set Streaming SVE VL 2496
4406 22:24:20.836783 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4407 22:24:20.837048 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4408 22:24:20.837134 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4409 22:24:20.837212 # ok 2681 Set Streaming SVE VL 2512
4410 22:24:20.837292 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4411 22:24:20.837377 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4412 22:24:20.837448 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4413 22:24:20.837513 # ok 2685 Set Streaming SVE VL 2528
4414 22:24:20.837577 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4415 22:24:20.837677 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4416 22:24:20.837756 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4417 22:24:20.837853 # ok 2689 Set Streaming SVE VL 2544
4418 22:24:20.837948 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4419 22:24:20.838021 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4420 22:24:20.838087 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4421 22:24:20.838155 # ok 2693 Set Streaming SVE VL 2560
4422 22:24:20.838221 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4423 22:24:20.838286 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4424 22:24:20.838348 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4425 22:24:20.838430 # ok 2697 Set Streaming SVE VL 2576
4426 22:24:20.838498 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4427 22:24:20.838564 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4428 22:24:20.838628 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4429 22:24:20.838691 # ok 2701 Set Streaming SVE VL 2592
4430 22:24:20.838756 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4431 22:24:20.838820 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4432 22:24:20.838887 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4433 22:24:20.838950 # ok 2705 Set Streaming SVE VL 2608
4434 22:24:20.839012 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4435 22:24:20.839075 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4436 22:24:20.839139 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4437 22:24:20.839217 # ok 2709 Set Streaming SVE VL 2624
4438 22:24:20.839283 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4439 22:24:20.839347 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4440 22:24:20.839412 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4441 22:24:20.839474 # ok 2713 Set Streaming SVE VL 2640
4442 22:24:20.839747 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4443 22:24:20.839844 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4444 22:24:20.839936 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4445 22:24:20.840010 # ok 2717 Set Streaming SVE VL 2656
4446 22:24:20.840089 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4447 22:24:20.840191 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4448 22:24:20.840307 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4449 22:24:20.840411 # ok 2721 Set Streaming SVE VL 2672
4450 22:24:20.840513 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4451 22:24:20.840598 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4452 22:24:20.840675 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4453 22:24:20.840770 # ok 2725 Set Streaming SVE VL 2688
4454 22:24:20.840852 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4455 22:24:20.840930 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4456 22:24:20.843839 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4457 22:24:20.843980 # ok 2729 Set Streaming SVE VL 2704
4458 22:24:20.844083 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4459 22:24:20.844183 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4460 22:24:20.844300 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4461 22:24:20.844413 # ok 2733 Set Streaming SVE VL 2720
4462 22:24:20.844534 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4463 22:24:20.844661 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4464 22:24:20.844768 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4465 22:24:20.844889 # ok 2737 Set Streaming SVE VL 2736
4466 22:24:20.845085 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4467 22:24:20.845203 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4468 22:24:20.845369 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4469 22:24:20.845488 # ok 2741 Set Streaming SVE VL 2752
4470 22:24:20.845786 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4471 22:24:20.845908 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4472 22:24:20.846231 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4473 22:24:20.846334 # ok 2745 Set Streaming SVE VL 2768
4474 22:24:20.846443 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4475 22:24:20.846525 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4476 22:24:20.846647 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4477 22:24:20.846732 # ok 2749 Set Streaming SVE VL 2784
4478 22:24:20.846824 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4479 22:24:20.846920 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4480 22:24:20.847190 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4481 22:24:20.847303 # ok 2753 Set Streaming SVE VL 2800
4482 22:24:20.847404 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4483 22:24:20.847766 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4484 22:24:20.847852 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4485 22:24:20.847934 # ok 2757 Set Streaming SVE VL 2816
4486 22:24:20.848016 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4487 22:24:20.848173 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4488 22:24:20.848466 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4489 22:24:20.848555 # ok 2761 Set Streaming SVE VL 2832
4490 22:24:20.848642 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4491 22:24:20.848743 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4492 22:24:20.848840 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4493 22:24:20.849133 # ok 2765 Set Streaming SVE VL 2848
4494 22:24:20.849217 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4495 22:24:20.849313 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4496 22:24:20.849404 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4497 22:24:20.849497 # ok 2769 Set Streaming SVE VL 2864
4498 22:24:20.849586 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4499 22:24:20.849703 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4500 22:24:20.853893 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4501 22:24:20.853986 # ok 2773 Set Streaming SVE VL 2880
4502 22:24:20.854067 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4503 22:24:20.854142 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4504 22:24:20.854236 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4505 22:24:20.854323 # ok 2777 Set Streaming SVE VL 2896
4506 22:24:20.854432 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4507 22:24:20.854529 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4508 22:24:20.854632 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4509 22:24:20.854720 # ok 2781 Set Streaming SVE VL 2912
4510 22:24:20.854814 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4511 22:24:20.854906 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4512 22:24:20.854979 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4513 22:24:20.855075 # ok 2785 Set Streaming SVE VL 2928
4514 22:24:20.855163 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4515 22:24:20.855244 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4516 22:24:20.855326 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4517 22:24:20.855408 # ok 2789 Set Streaming SVE VL 2944
4518 22:24:20.855487 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4519 22:24:20.855586 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4520 22:24:20.855690 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4521 22:24:20.855783 # ok 2793 Set Streaming SVE VL 2960
4522 22:24:20.855874 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4523 22:24:20.855977 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4524 22:24:20.856078 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4525 22:24:20.856172 # ok 2797 Set Streaming SVE VL 2976
4526 22:24:20.856272 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4527 22:24:20.856372 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4528 22:24:20.856468 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4529 22:24:20.856555 # ok 2801 Set Streaming SVE VL 2992
4530 22:24:20.856636 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4531 22:24:20.856707 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4532 22:24:20.856973 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4533 22:24:20.857060 # ok 2805 Set Streaming SVE VL 3008
4534 22:24:20.857142 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4535 22:24:20.857223 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4536 22:24:20.857306 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4537 22:24:20.857402 # ok 2809 Set Streaming SVE VL 3024
4538 22:24:20.857480 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4539 22:24:20.857560 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4540 22:24:20.857637 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4541 22:24:20.857719 # ok 2813 Set Streaming SVE VL 3040
4542 22:24:20.857810 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4543 22:24:20.857899 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4544 22:24:20.857973 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4545 22:24:20.858033 # ok 2817 Set Streaming SVE VL 3056
4546 22:24:20.858098 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4547 22:24:20.858175 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4548 22:24:20.858248 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4549 22:24:20.858324 # ok 2821 Set Streaming SVE VL 3072
4550 22:24:20.858400 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4551 22:24:20.858476 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4552 22:24:20.858550 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4553 22:24:20.858625 # ok 2825 Set Streaming SVE VL 3088
4554 22:24:20.858696 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4555 22:24:20.858789 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4556 22:24:20.858858 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4557 22:24:20.858919 # ok 2829 Set Streaming SVE VL 3104
4558 22:24:20.858978 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4559 22:24:20.859037 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4560 22:24:20.859113 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4561 22:24:20.859192 # ok 2833 Set Streaming SVE VL 3120
4562 22:24:20.859266 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4563 22:24:20.859332 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4564 22:24:20.859397 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4565 22:24:20.859458 # ok 2837 Set Streaming SVE VL 3136
4566 22:24:20.859520 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4567 22:24:20.859580 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4568 22:24:20.859858 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4569 22:24:20.859972 # ok 2841 Set Streaming SVE VL 3152
4570 22:24:20.860068 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4571 22:24:20.860162 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4572 22:24:20.860256 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4573 22:24:20.860341 # ok 2845 Set Streaming SVE VL 3168
4574 22:24:20.860438 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4575 22:24:20.860538 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4576 22:24:20.860628 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4577 22:24:20.860704 # ok 2849 Set Streaming SVE VL 3184
4578 22:24:20.860797 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4579 22:24:20.860868 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4580 22:24:20.860942 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4581 22:24:20.861016 # ok 2853 Set Streaming SVE VL 3200
4582 22:24:20.861115 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4583 22:24:20.861187 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4584 22:24:20.861267 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4585 22:24:20.861344 # ok 2857 Set Streaming SVE VL 3216
4586 22:24:20.861439 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4587 22:24:20.861519 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4588 22:24:20.861593 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4589 22:24:20.861699 # ok 2861 Set Streaming SVE VL 3232
4590 22:24:20.861814 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4591 22:24:20.861891 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4592 22:24:20.862008 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4593 22:24:20.862140 # ok 2865 Set Streaming SVE VL 3248
4594 22:24:20.862258 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4595 22:24:20.862392 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4596 22:24:20.862500 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4597 22:24:20.862607 # ok 2869 Set Streaming SVE VL 3264
4598 22:24:20.862721 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4599 22:24:20.862846 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4600 22:24:20.862985 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4601 22:24:20.863117 # ok 2873 Set Streaming SVE VL 3280
4602 22:24:20.863237 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4603 22:24:20.863548 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4604 22:24:20.863646 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4605 22:24:20.863733 # ok 2877 Set Streaming SVE VL 3296
4606 22:24:20.878082 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4607 22:24:20.878315 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4608 22:24:20.878423 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4609 22:24:20.878511 # ok 2881 Set Streaming SVE VL 3312
4610 22:24:20.878615 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4611 22:24:20.878718 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4612 22:24:20.878821 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4613 22:24:20.878922 # ok 2885 Set Streaming SVE VL 3328
4614 22:24:20.886274 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4615 22:24:20.886741 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4616 22:24:20.886843 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4617 22:24:20.886933 # ok 2889 Set Streaming SVE VL 3344
4618 22:24:20.887048 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4619 22:24:20.887132 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4620 22:24:20.894399 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4621 22:24:20.894855 # ok 2893 Set Streaming SVE VL 3360
4622 22:24:20.894961 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4623 22:24:20.895040 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4624 22:24:20.895128 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4625 22:24:20.895203 # ok 2897 Set Streaming SVE VL 3376
4626 22:24:20.902671 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4627 22:24:20.902911 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4628 22:24:20.903018 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4629 22:24:20.903106 # ok 2901 Set Streaming SVE VL 3392
4630 22:24:20.904619 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4631 22:24:20.904970 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4632 22:24:20.905105 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4633 22:24:20.905238 # ok 2905 Set Streaming SVE VL 3408
4634 22:24:20.905394 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4635 22:24:20.905530 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4636 22:24:20.905695 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4637 22:24:20.905823 # ok 2909 Set Streaming SVE VL 3424
4638 22:24:20.905967 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4639 22:24:20.906089 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4640 22:24:20.906240 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4641 22:24:20.906389 # ok 2913 Set Streaming SVE VL 3440
4642 22:24:20.906502 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4643 22:24:20.906642 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4644 22:24:20.906789 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4645 22:24:20.906932 # ok 2917 Set Streaming SVE VL 3456
4646 22:24:20.912656 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4647 22:24:20.913165 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4648 22:24:20.913356 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4649 22:24:20.913494 # ok 2921 Set Streaming SVE VL 3472
4650 22:24:20.913709 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4651 22:24:20.913863 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4652 22:24:20.914018 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4653 22:24:20.914166 # ok 2925 Set Streaming SVE VL 3488
4654 22:24:20.914327 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4655 22:24:20.914491 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4656 22:24:20.914656 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4657 22:24:20.914825 # ok 2929 Set Streaming SVE VL 3504
4658 22:24:20.914957 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4659 22:24:20.915075 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4660 22:24:20.915188 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4661 22:24:20.915280 # ok 2933 Set Streaming SVE VL 3520
4662 22:24:20.915366 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4663 22:24:20.915452 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4664 22:24:20.920708 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4665 22:24:20.921183 # ok 2937 Set Streaming SVE VL 3536
4666 22:24:20.921327 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4667 22:24:20.921432 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4668 22:24:20.921546 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4669 22:24:20.921711 # ok 2941 Set Streaming SVE VL 3552
4670 22:24:20.921829 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4671 22:24:20.921943 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4672 22:24:20.922072 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4673 22:24:20.922233 # ok 2945 Set Streaming SVE VL 3568
4674 22:24:20.922409 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4675 22:24:20.922531 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4676 22:24:20.922638 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4677 22:24:20.922764 # ok 2949 Set Streaming SVE VL 3584
4678 22:24:20.922899 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4679 22:24:20.923071 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4680 22:24:20.923193 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4681 22:24:20.923305 # ok 2953 Set Streaming SVE VL 3600
4682 22:24:20.923413 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4683 22:24:20.928971 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4684 22:24:20.929240 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4685 22:24:20.929690 # ok 2957 Set Streaming SVE VL 3616
4686 22:24:20.929825 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4687 22:24:20.929936 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4688 22:24:20.930039 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4689 22:24:20.930129 # ok 2961 Set Streaming SVE VL 3632
4690 22:24:20.930239 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4691 22:24:20.930332 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4692 22:24:20.930423 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4693 22:24:20.930530 # ok 2965 Set Streaming SVE VL 3648
4694 22:24:20.930621 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4695 22:24:20.930710 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4696 22:24:20.930815 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4697 22:24:20.930907 # ok 2969 Set Streaming SVE VL 3664
4698 22:24:20.931012 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4699 22:24:20.931938 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4700 22:24:20.932228 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4701 22:24:20.932329 # ok 2973 Set Streaming SVE VL 3680
4702 22:24:20.932411 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4703 22:24:20.932502 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4704 22:24:20.932621 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4705 22:24:20.932726 # ok 2977 Set Streaming SVE VL 3696
4706 22:24:20.932839 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4707 22:24:20.932950 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4708 22:24:20.933098 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4709 22:24:20.933204 # ok 2981 Set Streaming SVE VL 3712
4710 22:24:20.933311 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4711 22:24:20.933612 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4712 22:24:20.933738 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4713 22:24:20.933854 # ok 2985 Set Streaming SVE VL 3728
4714 22:24:20.933952 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4715 22:24:20.934261 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4716 22:24:20.934353 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4717 22:24:20.934446 # ok 2989 Set Streaming SVE VL 3744
4718 22:24:20.934749 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4719 22:24:20.934841 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4720 22:24:20.934943 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4721 22:24:20.935039 # ok 2993 Set Streaming SVE VL 3760
4722 22:24:20.944186 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4723 22:24:20.944674 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4724 22:24:20.944785 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4725 22:24:20.944875 # ok 2997 Set Streaming SVE VL 3776
4726 22:24:20.944976 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4727 22:24:20.945791 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4728 22:24:20.945896 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4729 22:24:20.945986 # ok 3001 Set Streaming SVE VL 3792
4730 22:24:20.946073 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4731 22:24:20.946157 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4732 22:24:20.946242 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4733 22:24:20.946327 # ok 3005 Set Streaming SVE VL 3808
4734 22:24:20.946602 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4735 22:24:20.946696 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4736 22:24:20.946785 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4737 22:24:20.946871 # ok 3009 Set Streaming SVE VL 3824
4738 22:24:20.946954 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4739 22:24:20.947037 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4740 22:24:20.947135 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4741 22:24:20.947220 # ok 3013 Set Streaming SVE VL 3840
4742 22:24:20.947297 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4743 22:24:20.952705 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4744 22:24:20.953130 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4745 22:24:20.953282 # ok 3017 Set Streaming SVE VL 3856
4746 22:24:20.953410 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4747 22:24:20.953570 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4748 22:24:20.953735 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4749 22:24:20.953866 # ok 3021 Set Streaming SVE VL 3872
4750 22:24:20.954005 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4751 22:24:20.954136 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4752 22:24:20.954264 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4753 22:24:20.954358 # ok 3025 Set Streaming SVE VL 3888
4754 22:24:20.954467 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4755 22:24:20.961655 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4756 22:24:20.962142 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4757 22:24:20.962253 # ok 3029 Set Streaming SVE VL 3904
4758 22:24:20.962358 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4759 22:24:20.962490 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4760 22:24:20.962607 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4761 22:24:20.962715 # ok 3033 Set Streaming SVE VL 3920
4762 22:24:20.962817 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4763 22:24:20.964357 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4764 22:24:20.964487 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4765 22:24:20.964585 # ok 3037 Set Streaming SVE VL 3936
4766 22:24:20.968727 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4767 22:24:20.969149 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4768 22:24:20.969235 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4769 22:24:20.969302 # ok 3041 Set Streaming SVE VL 3952
4770 22:24:20.969364 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4771 22:24:20.969438 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4772 22:24:20.969502 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4773 22:24:20.969574 # ok 3045 Set Streaming SVE VL 3968
4774 22:24:20.969689 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4775 22:24:20.969760 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4776 22:24:20.969833 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4777 22:24:20.969906 # ok 3049 Set Streaming SVE VL 3984
4778 22:24:20.969967 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4779 22:24:20.970217 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4780 22:24:20.970283 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4781 22:24:20.970344 # ok 3053 Set Streaming SVE VL 4000
4782 22:24:20.970415 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4783 22:24:20.970488 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4784 22:24:20.970736 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4785 22:24:20.970802 # ok 3057 Set Streaming SVE VL 4016
4786 22:24:20.970875 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4787 22:24:20.970949 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4788 22:24:20.976397 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4789 22:24:20.976731 # ok 3061 Set Streaming SVE VL 4032
4790 22:24:20.976798 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4791 22:24:20.976860 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4792 22:24:20.976931 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4793 22:24:20.977212 # ok 3065 Set Streaming SVE VL 4048
4794 22:24:20.977281 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4795 22:24:20.977537 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4796 22:24:20.977624 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4797 22:24:20.977696 # ok 3069 Set Streaming SVE VL 4064
4798 22:24:20.977770 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4799 22:24:20.977832 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4800 22:24:20.977904 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4801 22:24:20.977967 # ok 3073 Set Streaming SVE VL 4080
4802 22:24:20.978232 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4803 22:24:20.978321 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4804 22:24:20.978423 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4805 22:24:20.978507 # ok 3077 Set Streaming SVE VL 4096
4806 22:24:20.978608 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4807 22:24:20.978860 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4808 22:24:20.978946 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4809 22:24:20.979039 # ok 3081 Set Streaming SVE VL 4112
4810 22:24:20.984736 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4811 22:24:20.985186 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4812 22:24:20.985332 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4813 22:24:20.985451 # ok 3085 Set Streaming SVE VL 4128
4814 22:24:20.985585 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4815 22:24:20.985722 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4816 22:24:20.985861 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4817 22:24:20.985996 # ok 3089 Set Streaming SVE VL 4144
4818 22:24:20.986137 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4819 22:24:20.986262 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4820 22:24:20.986406 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4821 22:24:20.986526 # ok 3093 Set Streaming SVE VL 4160
4822 22:24:20.986673 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4823 22:24:20.986816 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4824 22:24:20.986943 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4825 22:24:20.987121 # ok 3097 Set Streaming SVE VL 4176
4826 22:24:20.987653 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4827 22:24:20.988025 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4828 22:24:20.988154 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4829 22:24:20.988279 # ok 3101 Set Streaming SVE VL 4192
4830 22:24:20.988406 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4831 22:24:20.988527 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4832 22:24:20.988670 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4833 22:24:20.988771 # ok 3105 Set Streaming SVE VL 4208
4834 22:24:20.989119 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4835 22:24:20.989265 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4836 22:24:20.989386 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4837 22:24:20.989504 # ok 3109 Set Streaming SVE VL 4224
4838 22:24:20.989862 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4839 22:24:20.990000 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4840 22:24:20.990121 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4841 22:24:20.990235 # ok 3113 Set Streaming SVE VL 4240
4842 22:24:20.990346 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4843 22:24:20.990464 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4844 22:24:20.990597 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4845 22:24:20.990729 # ok 3117 Set Streaming SVE VL 4256
4846 22:24:20.990876 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4847 22:24:20.991007 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4848 22:24:20.991111 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4849 22:24:20.991218 # ok 3121 Set Streaming SVE VL 4272
4850 22:24:20.991358 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4851 22:24:20.991479 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4852 22:24:20.996825 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4853 22:24:20.997058 # ok 3125 Set Streaming SVE VL 4288
4854 22:24:20.997422 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4855 22:24:20.997616 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4856 22:24:20.997797 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4857 22:24:20.997967 # ok 3129 Set Streaming SVE VL 4304
4858 22:24:20.998128 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4859 22:24:20.998340 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4860 22:24:20.998536 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4861 22:24:20.998758 # ok 3133 Set Streaming SVE VL 4320
4862 22:24:20.998939 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4863 22:24:20.999107 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4864 22:24:20.999238 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4865 22:24:20.999355 # ok 3137 Set Streaming SVE VL 4336
4866 22:24:20.999502 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4867 22:24:20.999628 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4868 22:24:20.999747 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4869 22:24:20.999866 # ok 3141 Set Streaming SVE VL 4352
4870 22:24:20.999984 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4871 22:24:21.008804 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4872 22:24:21.009263 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4873 22:24:21.009365 # ok 3145 Set Streaming SVE VL 4368
4874 22:24:21.009453 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4875 22:24:21.009554 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4876 22:24:21.009643 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4877 22:24:21.009749 # ok 3149 Set Streaming SVE VL 4384
4878 22:24:21.009858 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4879 22:24:21.010148 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4880 22:24:21.010265 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4881 22:24:21.010588 # ok 3153 Set Streaming SVE VL 4400
4882 22:24:21.010780 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4883 22:24:21.010969 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4884 22:24:21.011113 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4885 22:24:21.011236 # ok 3157 Set Streaming SVE VL 4416
4886 22:24:21.011377 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4887 22:24:21.016643 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4888 22:24:21.016952 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4889 22:24:21.017218 # ok 3161 Set Streaming SVE VL 4432
4890 22:24:21.017407 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4891 22:24:21.017593 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4892 22:24:21.017822 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4893 22:24:21.018025 # ok 3165 Set Streaming SVE VL 4448
4894 22:24:21.018298 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4895 22:24:21.018522 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4896 22:24:21.018742 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4897 22:24:21.018906 # ok 3169 Set Streaming SVE VL 4464
4898 22:24:21.019036 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4899 22:24:21.019154 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4900 22:24:21.019269 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4901 22:24:21.019413 # ok 3173 Set Streaming SVE VL 4480
4902 22:24:21.019535 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4903 22:24:21.019651 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4904 22:24:21.019764 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4905 22:24:21.029681 # ok 3177 Set Streaming SVE VL 4496
4906 22:24:21.030246 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4907 22:24:21.030391 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4908 22:24:21.036291 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4909 22:24:21.036741 # ok 3181 Set Streaming SVE VL 4512
4910 22:24:21.036844 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4911 22:24:21.036928 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4912 22:24:21.037028 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4913 22:24:21.037113 # ok 3185 Set Streaming SVE VL 4528
4914 22:24:21.037197 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4915 22:24:21.037299 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4916 22:24:21.037398 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4917 22:24:21.037505 # ok 3189 Set Streaming SVE VL 4544
4918 22:24:21.037838 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4919 22:24:21.038045 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4920 22:24:21.038212 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4921 22:24:21.038402 # ok 3193 Set Streaming SVE VL 4560
4922 22:24:21.038558 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4923 22:24:21.038709 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4924 22:24:21.038900 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4925 22:24:21.039042 # ok 3197 Set Streaming SVE VL 4576
4926 22:24:21.039161 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4927 22:24:21.039328 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4928 22:24:21.039494 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4929 22:24:21.052158 # ok 3201 Set Streaming SVE VL 4592
4930 22:24:21.052498 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4931 22:24:21.052740 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4932 22:24:21.052938 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4933 22:24:21.053143 # ok 3205 Set Streaming SVE VL 4608
4934 22:24:21.053331 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4935 22:24:21.053539 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4936 22:24:21.053719 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4937 22:24:21.053865 # ok 3209 Set Streaming SVE VL 4624
4938 22:24:21.054023 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4939 22:24:21.054181 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4940 22:24:21.054387 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4941 22:24:21.054620 # ok 3213 Set Streaming SVE VL 4640
4942 22:24:21.054822 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4943 22:24:21.055019 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4944 22:24:21.055186 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4945 22:24:21.055314 # ok 3217 Set Streaming SVE VL 4656
4946 22:24:21.055430 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4947 22:24:21.055547 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4948 22:24:21.055698 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4949 22:24:21.055820 # ok 3221 Set Streaming SVE VL 4672
4950 22:24:21.070384 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4951 22:24:21.070975 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4952 22:24:21.071135 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4953 22:24:21.071261 # ok 3225 Set Streaming SVE VL 4688
4954 22:24:21.071383 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4955 22:24:21.071502 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4956 22:24:21.076600 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4957 22:24:21.076912 # ok 3229 Set Streaming SVE VL 4704
4958 22:24:21.077323 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4959 22:24:21.077513 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4960 22:24:21.077682 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4961 22:24:21.077856 # ok 3233 Set Streaming SVE VL 4720
4962 22:24:21.078032 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4963 22:24:21.078282 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4964 22:24:21.078498 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4965 22:24:21.078696 # ok 3237 Set Streaming SVE VL 4736
4966 22:24:21.078894 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4967 22:24:21.079075 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4968 22:24:21.079215 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4969 22:24:21.079333 # ok 3241 Set Streaming SVE VL 4752
4970 22:24:21.079477 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4971 22:24:21.079599 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4972 22:24:21.079716 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4973 22:24:21.079831 # ok 3245 Set Streaming SVE VL 4768
4974 22:24:21.079945 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4975 22:24:21.080059 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4976 22:24:21.096693 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4977 22:24:21.096941 # ok 3249 Set Streaming SVE VL 4784
4978 22:24:21.097245 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4979 22:24:21.097347 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4980 22:24:21.097434 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4981 22:24:21.097532 # ok 3253 Set Streaming SVE VL 4800
4982 22:24:21.097617 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4983 22:24:21.097723 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4984 22:24:21.097824 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4985 22:24:21.097924 # ok 3257 Set Streaming SVE VL 4816
4986 22:24:21.098185 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4987 22:24:21.098504 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4988 22:24:21.098606 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4989 22:24:21.098709 # ok 3261 Set Streaming SVE VL 4832
4990 22:24:21.098797 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4991 22:24:21.098896 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4992 22:24:21.112495 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4993 22:24:21.112743 # ok 3265 Set Streaming SVE VL 4848
4994 22:24:21.113051 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4995 22:24:21.113155 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4996 22:24:21.113242 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4997 22:24:21.113336 # ok 3269 Set Streaming SVE VL 4864
4998 22:24:21.113438 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
4999 22:24:21.113530 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
5000 22:24:21.113628 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5001 22:24:21.113729 # ok 3273 Set Streaming SVE VL 4880
5002 22:24:21.113833 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5003 22:24:21.113936 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5004 22:24:21.114248 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5005 22:24:21.115039 # ok 3277 Set Streaming SVE VL 4896
5006 22:24:21.115148 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5007 22:24:21.115240 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5008 22:24:21.115330 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5009 22:24:21.115417 # ok 3281 Set Streaming SVE VL 4912
5010 22:24:21.115505 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5011 22:24:21.115595 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5012 22:24:21.115683 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5013 22:24:21.115962 # ok 3285 Set Streaming SVE VL 4928
5014 22:24:21.128080 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5015 22:24:21.128526 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5016 22:24:21.128613 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5017 22:24:21.128681 # ok 3289 Set Streaming SVE VL 4944
5018 22:24:21.128759 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5019 22:24:21.128832 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5020 22:24:21.128954 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5021 22:24:21.129046 # ok 3293 Set Streaming SVE VL 4960
5022 22:24:21.129172 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5023 22:24:21.129282 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5024 22:24:21.129410 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5025 22:24:21.129533 # ok 3297 Set Streaming SVE VL 4976
5026 22:24:21.129662 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5027 22:24:21.129860 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5028 22:24:21.130171 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5029 22:24:21.130258 # ok 3301 Set Streaming SVE VL 4992
5030 22:24:21.130577 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5031 22:24:21.130676 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5032 22:24:21.130760 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5033 22:24:21.130832 # ok 3305 Set Streaming SVE VL 5008
5034 22:24:21.130907 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5035 22:24:21.130970 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5036 22:24:21.131041 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5037 22:24:21.141363 # ok 3309 Set Streaming SVE VL 5024
5038 22:24:21.141834 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5039 22:24:21.141955 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5040 22:24:21.142083 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5041 22:24:21.142199 # ok 3313 Set Streaming SVE VL 5040
5042 22:24:21.142317 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5043 22:24:21.142416 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5044 22:24:21.142495 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5045 22:24:21.142587 # ok 3317 Set Streaming SVE VL 5056
5046 22:24:21.142665 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5047 22:24:21.142755 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5048 22:24:21.142845 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5049 22:24:21.142934 # ok 3321 Set Streaming SVE VL 5072
5050 22:24:21.148287 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5051 22:24:21.148664 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5052 22:24:21.148751 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5053 22:24:21.148818 # ok 3325 Set Streaming SVE VL 5088
5054 22:24:21.148891 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5055 22:24:21.149821 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5056 22:24:21.149929 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5057 22:24:21.150015 # ok 3329 Set Streaming SVE VL 5104
5058 22:24:21.150107 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5059 22:24:21.150366 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5060 22:24:21.150448 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5061 22:24:21.150528 # ok 3333 Set Streaming SVE VL 5120
5062 22:24:21.150620 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5063 22:24:21.150727 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5064 22:24:21.151022 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5065 22:24:21.151122 # ok 3337 Set Streaming SVE VL 5136
5066 22:24:21.152984 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5067 22:24:21.153293 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5068 22:24:21.153393 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5069 22:24:21.153490 # ok 3341 Set Streaming SVE VL 5152
5070 22:24:21.153569 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5071 22:24:21.153670 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5072 22:24:21.153770 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5073 22:24:21.153864 # ok 3345 Set Streaming SVE VL 5168
5074 22:24:21.153961 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5075 22:24:21.154239 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5076 22:24:21.154753 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5077 22:24:21.154857 # ok 3349 Set Streaming SVE VL 5184
5078 22:24:21.154938 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5079 22:24:21.155014 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5080 22:24:21.155092 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5081 22:24:21.155169 # ok 3353 Set Streaming SVE VL 5200
5082 22:24:21.155430 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5083 22:24:21.155513 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5084 22:24:21.161437 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5085 22:24:21.161639 # ok 3357 Set Streaming SVE VL 5216
5086 22:24:21.161948 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5087 22:24:21.162052 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5088 22:24:21.162133 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5089 22:24:21.162226 # ok 3361 Set Streaming SVE VL 5232
5090 22:24:21.162305 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5091 22:24:21.162386 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5092 22:24:21.162478 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5093 22:24:21.162750 # ok 3365 Set Streaming SVE VL 5248
5094 22:24:21.162834 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5095 22:24:21.162914 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5096 22:24:21.163005 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5097 22:24:21.163085 # ok 3369 Set Streaming SVE VL 5264
5098 22:24:21.170283 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5099 22:24:21.170745 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5100 22:24:21.170850 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5101 22:24:21.170939 # ok 3373 Set Streaming SVE VL 5280
5102 22:24:21.171040 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5103 22:24:21.171131 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5104 22:24:21.171224 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5105 22:24:21.172607 # ok 3377 Set Streaming SVE VL 5296
5106 22:24:21.172899 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5107 22:24:21.173006 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5108 22:24:21.173093 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5109 22:24:21.173195 # ok 3381 Set Streaming SVE VL 5312
5110 22:24:21.173296 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5111 22:24:21.173584 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5112 22:24:21.173697 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5113 22:24:21.173799 # ok 3385 Set Streaming SVE VL 5328
5114 22:24:21.173899 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5115 22:24:21.174181 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5116 22:24:21.174271 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5117 22:24:21.174377 # ok 3389 Set Streaming SVE VL 5344
5118 22:24:21.174477 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5119 22:24:21.174762 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5120 22:24:21.174865 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5121 22:24:21.174950 # ok 3393 Set Streaming SVE VL 5360
5122 22:24:21.175047 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5123 22:24:21.180367 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5124 22:24:21.180790 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5125 22:24:21.180885 # ok 3397 Set Streaming SVE VL 5376
5126 22:24:21.180972 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5127 22:24:21.181071 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5128 22:24:21.181156 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5129 22:24:21.181253 # ok 3401 Set Streaming SVE VL 5392
5130 22:24:21.181354 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5131 22:24:21.181667 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5132 22:24:21.181769 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5133 22:24:21.181867 # ok 3405 Set Streaming SVE VL 5408
5134 22:24:21.181994 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5135 22:24:21.182094 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5136 22:24:21.182183 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5137 22:24:21.182271 # ok 3409 Set Streaming SVE VL 5424
5138 22:24:21.182356 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5139 22:24:21.182442 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5140 22:24:21.182547 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5141 22:24:21.182812 # ok 3413 Set Streaming SVE VL 5440
5142 22:24:21.182884 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5143 22:24:21.182981 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5144 22:24:21.183090 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5145 22:24:21.188465 # ok 3417 Set Streaming SVE VL 5456
5146 22:24:21.188855 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5147 22:24:21.188939 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5148 22:24:21.189031 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5149 22:24:21.189126 # ok 3421 Set Streaming SVE VL 5472
5150 22:24:21.189198 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5151 22:24:21.189289 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5152 22:24:21.189361 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5153 22:24:21.189451 # ok 3425 Set Streaming SVE VL 5488
5154 22:24:21.189526 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5155 22:24:21.189617 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5156 22:24:21.189739 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5157 22:24:21.189812 # ok 3429 Set Streaming SVE VL 5504
5158 22:24:21.190107 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5159 22:24:21.190199 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5160 22:24:21.190279 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5161 22:24:21.190370 # ok 3433 Set Streaming SVE VL 5520
5162 22:24:21.190451 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5163 22:24:21.190542 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5164 22:24:21.190622 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5165 22:24:21.190700 # ok 3437 Set Streaming SVE VL 5536
5166 22:24:21.190790 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5167 22:24:21.191057 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5168 22:24:21.196845 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5169 22:24:21.197242 # ok 3441 Set Streaming SVE VL 5552
5170 22:24:21.197327 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5171 22:24:21.197404 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5172 22:24:21.197496 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5173 22:24:21.197575 # ok 3445 Set Streaming SVE VL 5568
5174 22:24:21.197696 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5175 22:24:21.197790 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5176 22:24:21.197882 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5177 22:24:21.197975 # ok 3449 Set Streaming SVE VL 5584
5178 22:24:21.198269 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5179 22:24:21.198374 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5180 22:24:21.198467 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5181 22:24:21.198567 # ok 3453 Set Streaming SVE VL 5600
5182 22:24:21.198658 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5183 22:24:21.198948 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5184 22:24:21.199049 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5185 22:24:21.199747 # ok 3457 Set Streaming SVE VL 5616
5186 22:24:21.200030 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5187 22:24:21.200115 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5188 22:24:21.200222 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5189 22:24:21.200311 # ok 3461 Set Streaming SVE VL 5632
5190 22:24:21.200389 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5191 22:24:21.200646 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5192 22:24:21.200728 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5193 22:24:21.200794 # ok 3465 Set Streaming SVE VL 5648
5194 22:24:21.200890 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5195 22:24:21.201194 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5196 22:24:21.201288 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5197 22:24:21.201362 # ok 3469 Set Streaming SVE VL 5664
5198 22:24:21.201453 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5199 22:24:21.201544 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5200 22:24:21.201633 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5201 22:24:21.201715 # ok 3473 Set Streaming SVE VL 5680
5202 22:24:21.201806 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5203 22:24:21.202072 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5204 22:24:21.210204 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5205 22:24:21.210604 # ok 3477 Set Streaming SVE VL 5696
5206 22:24:21.210702 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5207 22:24:21.210792 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5208 22:24:21.210878 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5209 22:24:21.210946 # ok 3481 Set Streaming SVE VL 5712
5210 22:24:21.211031 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5211 22:24:21.211127 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5212 22:24:21.217368 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5213 22:24:21.217785 # ok 3485 Set Streaming SVE VL 5728
5214 22:24:21.217890 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5215 22:24:21.217979 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5216 22:24:21.218078 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5217 22:24:21.218177 # ok 3489 Set Streaming SVE VL 5744
5218 22:24:21.218274 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5219 22:24:21.218612 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5220 22:24:21.218817 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5221 22:24:21.219001 # ok 3493 Set Streaming SVE VL 5760
5222 22:24:21.219135 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5223 22:24:21.224407 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5224 22:24:21.224930 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5225 22:24:21.225124 # ok 3497 Set Streaming SVE VL 5776
5226 22:24:21.225355 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5227 22:24:21.225539 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5228 22:24:21.225798 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5229 22:24:21.226015 # ok 3501 Set Streaming SVE VL 5792
5230 22:24:21.226194 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5231 22:24:21.226383 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5232 22:24:21.226603 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5233 22:24:21.226828 # ok 3505 Set Streaming SVE VL 5808
5234 22:24:21.227070 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5235 22:24:21.227274 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5236 22:24:21.227405 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5237 22:24:21.227524 # ok 3509 Set Streaming SVE VL 5824
5238 22:24:21.227640 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5239 22:24:21.227753 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5240 22:24:21.227866 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5241 22:24:21.227980 # ok 3513 Set Streaming SVE VL 5840
5242 22:24:21.228093 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5243 22:24:21.232580 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5244 22:24:21.233146 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5245 22:24:21.233345 # ok 3517 Set Streaming SVE VL 5856
5246 22:24:21.233560 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5247 22:24:21.233765 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5248 22:24:21.234031 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5249 22:24:21.234224 # ok 3521 Set Streaming SVE VL 5872
5250 22:24:21.234408 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5251 22:24:21.234579 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5252 22:24:21.234731 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5253 22:24:21.234887 # ok 3525 Set Streaming SVE VL 5888
5254 22:24:21.235030 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5255 22:24:21.235178 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5256 22:24:21.235299 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5257 22:24:21.235414 # ok 3529 Set Streaming SVE VL 5904
5258 22:24:21.235530 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5259 22:24:21.235645 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5260 22:24:21.235759 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5261 22:24:21.235873 # ok 3533 Set Streaming SVE VL 5920
5262 22:24:21.239597 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5263 22:24:21.239991 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5264 22:24:21.240094 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5265 22:24:21.240174 # ok 3537 Set Streaming SVE VL 5936
5266 22:24:21.240265 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5267 22:24:21.240345 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5268 22:24:21.240436 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5269 22:24:21.240515 # ok 3541 Set Streaming SVE VL 5952
5270 22:24:21.240604 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5271 22:24:21.240836 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5272 22:24:21.240952 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5273 22:24:21.241035 # ok 3545 Set Streaming SVE VL 5968
5274 22:24:21.241128 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5275 22:24:21.241219 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5276 22:24:21.241963 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5277 22:24:21.242066 # ok 3549 Set Streaming SVE VL 5984
5278 22:24:21.242145 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5279 22:24:21.242221 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5280 22:24:21.242312 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5281 22:24:21.242390 # ok 3553 Set Streaming SVE VL 6000
5282 22:24:21.242466 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5283 22:24:21.242554 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5284 22:24:21.242638 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5285 22:24:21.242726 # ok 3557 Set Streaming SVE VL 6016
5286 22:24:21.242815 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5287 22:24:21.242905 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5288 22:24:21.250902 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5289 22:24:21.251325 # ok 3561 Set Streaming SVE VL 6032
5290 22:24:21.252087 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5291 22:24:21.252361 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5292 22:24:21.252469 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5293 22:24:21.252569 # ok 3565 Set Streaming SVE VL 6048
5294 22:24:21.252848 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5295 22:24:21.252952 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5296 22:24:21.253251 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5297 22:24:21.253345 # ok 3569 Set Streaming SVE VL 6064
5298 22:24:21.253626 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5299 22:24:21.253766 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5300 22:24:21.254057 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5301 22:24:21.254210 # ok 3573 Set Streaming SVE VL 6080
5302 22:24:21.254360 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5303 22:24:21.254532 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5304 22:24:21.254745 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5305 22:24:21.255055 # ok 3577 Set Streaming SVE VL 6096
5306 22:24:21.267060 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5307 22:24:21.268372 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5308 22:24:21.268496 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5309 22:24:21.268589 # ok 3581 Set Streaming SVE VL 6112
5310 22:24:21.268887 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5311 22:24:21.269004 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5312 22:24:21.269098 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5313 22:24:21.269192 # ok 3585 Set Streaming SVE VL 6128
5314 22:24:21.269284 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5315 22:24:21.269596 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5316 22:24:21.269721 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5317 22:24:21.269803 # ok 3589 Set Streaming SVE VL 6144
5318 22:24:21.269893 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5319 22:24:21.269991 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5320 22:24:21.270291 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5321 22:24:21.270391 # ok 3593 Set Streaming SVE VL 6160
5322 22:24:21.270482 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5323 22:24:21.270573 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5324 22:24:21.270666 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5325 22:24:21.270757 # ok 3597 Set Streaming SVE VL 6176
5326 22:24:21.271044 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5327 22:24:21.280675 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5328 22:24:21.280999 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5329 22:24:21.281437 # ok 3601 Set Streaming SVE VL 6192
5330 22:24:21.281631 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5331 22:24:21.281824 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5332 22:24:21.281989 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5333 22:24:21.282225 # ok 3605 Set Streaming SVE VL 6208
5334 22:24:21.282411 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5335 22:24:21.282578 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5336 22:24:21.282757 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5337 22:24:21.282904 # ok 3609 Set Streaming SVE VL 6224
5338 22:24:21.283031 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5339 22:24:21.283182 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5340 22:24:21.283302 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5341 22:24:21.283416 # ok 3613 Set Streaming SVE VL 6240
5342 22:24:21.283529 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5343 22:24:21.283641 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5344 22:24:21.283755 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5345 22:24:21.283865 # ok 3617 Set Streaming SVE VL 6256
5346 22:24:21.292889 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5347 22:24:21.293333 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5348 22:24:21.293436 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5349 22:24:21.293527 # ok 3621 Set Streaming SVE VL 6272
5350 22:24:21.293627 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5351 22:24:21.293726 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5352 22:24:21.293828 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5353 22:24:21.293926 # ok 3625 Set Streaming SVE VL 6288
5354 22:24:21.305504 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5355 22:24:21.305759 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5356 22:24:21.305865 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5357 22:24:21.305952 # ok 3629 Set Streaming SVE VL 6304
5358 22:24:21.306036 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5359 22:24:21.306134 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5360 22:24:21.306460 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5361 22:24:21.306620 # ok 3633 Set Streaming SVE VL 6320
5362 22:24:21.306808 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5363 22:24:21.306948 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5364 22:24:21.307092 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5365 22:24:21.307265 # ok 3637 Set Streaming SVE VL 6336
5366 22:24:21.307403 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5367 22:24:21.307546 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5368 22:24:21.316452 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5369 22:24:21.316720 # ok 3641 Set Streaming SVE VL 6352
5370 22:24:21.316943 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5371 22:24:21.317090 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5372 22:24:21.317238 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5373 22:24:21.317385 # ok 3645 Set Streaming SVE VL 6368
5374 22:24:21.317530 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5375 22:24:21.317731 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5376 22:24:21.317869 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5377 22:24:21.318012 # ok 3649 Set Streaming SVE VL 6384
5378 22:24:21.318154 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5379 22:24:21.318297 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5380 22:24:21.318476 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5381 22:24:21.318612 # ok 3653 Set Streaming SVE VL 6400
5382 22:24:21.318756 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5383 22:24:21.318900 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5384 22:24:21.319042 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5385 22:24:21.319184 # ok 3657 Set Streaming SVE VL 6416
5386 22:24:21.319326 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5387 22:24:21.319469 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5388 22:24:21.319611 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5389 22:24:21.319753 # ok 3661 Set Streaming SVE VL 6432
5390 22:24:21.319932 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5391 22:24:21.320069 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5392 22:24:21.320213 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5393 22:24:21.320356 # ok 3665 Set Streaming SVE VL 6448
5394 22:24:21.332210 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5395 22:24:21.332760 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5396 22:24:21.332918 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5397 22:24:21.333071 # ok 3669 Set Streaming SVE VL 6464
5398 22:24:21.333219 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5399 22:24:21.333364 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5400 22:24:21.333544 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5401 22:24:21.333719 # ok 3673 Set Streaming SVE VL 6480
5402 22:24:21.333890 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5403 22:24:21.334068 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5404 22:24:21.334215 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5405 22:24:21.334356 # ok 3677 Set Streaming SVE VL 6496
5406 22:24:21.334497 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5407 22:24:21.334678 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5408 22:24:21.334814 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5409 22:24:21.334998 # ok 3681 Set Streaming SVE VL 6512
5410 22:24:21.335169 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5411 22:24:21.335319 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5412 22:24:21.335463 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5413 22:24:21.335610 # ok 3685 Set Streaming SVE VL 6528
5414 22:24:21.335758 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5415 22:24:21.335867 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5416 22:24:21.336000 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5417 22:24:21.336116 # ok 3689 Set Streaming SVE VL 6544
5418 22:24:21.344322 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5419 22:24:21.344890 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5420 22:24:21.345092 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5421 22:24:21.345247 # ok 3693 Set Streaming SVE VL 6560
5422 22:24:21.345412 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5423 22:24:21.345551 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5424 22:24:21.345760 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5425 22:24:21.345916 # ok 3697 Set Streaming SVE VL 6576
5426 22:24:21.346078 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5427 22:24:21.346229 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5428 22:24:21.346371 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5429 22:24:21.346564 # ok 3701 Set Streaming SVE VL 6592
5430 22:24:21.346710 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5431 22:24:21.346874 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5432 22:24:21.347012 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5433 22:24:21.347170 # ok 3705 Set Streaming SVE VL 6608
5434 22:24:21.347317 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5435 22:24:21.347458 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5436 22:24:21.347646 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5437 22:24:21.347792 # ok 3709 Set Streaming SVE VL 6624
5438 22:24:21.347952 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5439 22:24:21.348093 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5440 22:24:21.356620 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5441 22:24:21.357057 # ok 3713 Set Streaming SVE VL 6640
5442 22:24:21.357263 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5443 22:24:21.357445 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5444 22:24:21.357641 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5445 22:24:21.357811 # ok 3717 Set Streaming SVE VL 6656
5446 22:24:21.357963 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5447 22:24:21.358122 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5448 22:24:21.358304 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5449 22:24:21.358499 # ok 3721 Set Streaming SVE VL 6672
5450 22:24:21.358661 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5451 22:24:21.358814 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5452 22:24:21.358953 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5453 22:24:21.359068 # ok 3725 Set Streaming SVE VL 6688
5454 22:24:21.359179 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5455 22:24:21.359290 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5456 22:24:21.359424 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5457 22:24:21.359539 # ok 3729 Set Streaming SVE VL 6704
5458 22:24:21.365026 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5459 22:24:21.365403 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5460 22:24:21.365560 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5461 22:24:21.365748 # ok 3733 Set Streaming SVE VL 6720
5462 22:24:21.365876 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5463 22:24:21.366096 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5464 22:24:21.366261 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5465 22:24:21.366429 # ok 3737 Set Streaming SVE VL 6736
5466 22:24:21.366613 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5467 22:24:21.366776 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5468 22:24:21.366932 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5469 22:24:21.367072 # ok 3741 Set Streaming SVE VL 6752
5470 22:24:21.367209 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5471 22:24:21.367321 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5472 22:24:21.378220 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5473 22:24:21.378918 # ok 3745 Set Streaming SVE VL 6768
5474 22:24:21.381561 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5475 22:24:21.381984 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5476 22:24:21.382161 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5477 22:24:21.382413 # ok 3749 Set Streaming SVE VL 6784
5478 22:24:21.382603 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5479 22:24:21.382781 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5480 22:24:21.383020 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5481 22:24:21.383175 # ok 3753 Set Streaming SVE VL 6800
5482 22:24:21.383319 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5483 22:24:21.383482 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5484 22:24:21.383980 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5485 22:24:21.384140 # ok 3757 Set Streaming SVE VL 6816
5486 22:24:21.384489 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5487 22:24:21.384684 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5488 22:24:21.384869 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5489 22:24:21.385008 # ok 3761 Set Streaming SVE VL 6832
5490 22:24:21.385131 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5491 22:24:21.385267 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5492 22:24:21.385822 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5493 22:24:21.386045 # ok 3765 Set Streaming SVE VL 6848
5494 22:24:21.386226 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5495 22:24:21.386392 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5496 22:24:21.386536 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5497 22:24:21.386673 # ok 3769 Set Streaming SVE VL 6864
5498 22:24:21.386809 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5499 22:24:21.386945 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5500 22:24:21.387294 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5501 22:24:21.387429 # ok 3773 Set Streaming SVE VL 6880
5502 22:24:21.387570 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5503 22:24:21.429331 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5504 22:24:21.429830 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5505 22:24:21.430032 # ok 3777 Set Streaming SVE VL 6896
5506 22:24:21.430204 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5507 22:24:21.430413 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5508 22:24:21.430594 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5509 22:24:21.430790 # ok 3781 Set Streaming SVE VL 6912
5510 22:24:21.430959 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5511 22:24:21.431147 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5512 22:24:21.431306 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5513 22:24:21.431450 # ok 3785 Set Streaming SVE VL 6928
5514 22:24:21.431587 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5515 22:24:21.431723 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5516 22:24:21.440792 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5517 22:24:21.441198 # ok 3789 Set Streaming SVE VL 6944
5518 22:24:21.441343 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5519 22:24:21.441514 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5520 22:24:21.441659 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5521 22:24:21.441799 # ok 3793 Set Streaming SVE VL 6960
5522 22:24:21.441968 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5523 22:24:21.442101 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5524 22:24:21.442269 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5525 22:24:21.442401 # ok 3797 Set Streaming SVE VL 6976
5526 22:24:21.442538 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5527 22:24:21.442722 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5528 22:24:21.442871 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5529 22:24:21.443039 # ok 3801 Set Streaming SVE VL 6992
5530 22:24:21.443213 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5531 22:24:21.443346 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5532 22:24:21.444563 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5533 22:24:21.444970 # ok 3805 Set Streaming SVE VL 7008
5534 22:24:21.445122 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5535 22:24:21.445266 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5536 22:24:21.445436 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5537 22:24:21.445569 # ok 3809 Set Streaming SVE VL 7024
5538 22:24:21.445722 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5539 22:24:21.445893 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5540 22:24:21.446023 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5541 22:24:21.446189 # ok 3813 Set Streaming SVE VL 7040
5542 22:24:21.446349 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5543 22:24:21.446525 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5544 22:24:21.446713 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5545 22:24:21.446931 # ok 3817 Set Streaming SVE VL 7056
5546 22:24:21.447080 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5547 22:24:21.447863 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5548 22:24:21.448285 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5549 22:24:21.448479 # ok 3821 Set Streaming SVE VL 7072
5550 22:24:21.448645 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5551 22:24:21.448828 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5552 22:24:21.448983 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5553 22:24:21.449132 # ok 3825 Set Streaming SVE VL 7088
5554 22:24:21.449279 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5555 22:24:21.449452 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5556 22:24:21.449635 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5557 22:24:21.449813 # ok 3829 Set Streaming SVE VL 7104
5558 22:24:21.449963 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5559 22:24:21.450156 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5560 22:24:21.450309 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5561 22:24:21.450457 # ok 3833 Set Streaming SVE VL 7120
5562 22:24:21.450611 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5563 22:24:21.450748 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5564 22:24:21.450878 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5565 22:24:21.450994 # ok 3837 Set Streaming SVE VL 7136
5566 22:24:21.451131 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5567 22:24:21.451246 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5568 22:24:21.451355 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5569 22:24:21.451463 # ok 3841 Set Streaming SVE VL 7152
5570 22:24:21.451570 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5571 22:24:21.451679 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5572 22:24:21.456066 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5573 22:24:21.456451 # ok 3845 Set Streaming SVE VL 7168
5574 22:24:21.456633 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5575 22:24:21.456809 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5576 22:24:21.457010 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5577 22:24:21.457148 # ok 3849 Set Streaming SVE VL 7184
5578 22:24:21.457295 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5579 22:24:21.457450 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5580 22:24:21.457583 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5581 22:24:21.457741 # ok 3853 Set Streaming SVE VL 7200
5582 22:24:21.461333 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5583 22:24:21.461491 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5584 22:24:21.461615 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5585 22:24:21.461744 # ok 3857 Set Streaming SVE VL 7216
5586 22:24:21.461860 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5587 22:24:21.461972 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5588 22:24:21.462090 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5589 22:24:21.462206 # ok 3861 Set Streaming SVE VL 7232
5590 22:24:21.462317 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5591 22:24:21.462427 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5592 22:24:21.462535 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5593 22:24:21.462644 # ok 3865 Set Streaming SVE VL 7248
5594 22:24:21.467754 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5595 22:24:21.467943 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5596 22:24:21.468356 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5597 22:24:21.468557 # ok 3869 Set Streaming SVE VL 7264
5598 22:24:21.468738 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5599 22:24:21.468965 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5600 22:24:21.469176 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5601 22:24:21.469348 # ok 3873 Set Streaming SVE VL 7280
5602 22:24:21.469548 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5603 22:24:21.469727 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5604 22:24:21.469929 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5605 22:24:21.470105 # ok 3877 Set Streaming SVE VL 7296
5606 22:24:21.470267 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5607 22:24:21.470404 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5608 22:24:21.470536 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5609 22:24:21.470685 # ok 3881 Set Streaming SVE VL 7312
5610 22:24:21.470839 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5611 22:24:21.470998 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5612 22:24:21.471176 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5613 22:24:21.471319 # ok 3885 Set Streaming SVE VL 7328
5614 22:24:21.471435 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5615 22:24:21.471545 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5616 22:24:21.471654 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5617 22:24:21.471763 # ok 3889 Set Streaming SVE VL 7344
5618 22:24:21.471876 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5619 22:24:21.471985 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5620 22:24:21.472098 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5621 22:24:21.472207 # ok 3893 Set Streaming SVE VL 7360
5622 22:24:21.472315 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5623 22:24:21.472424 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5624 22:24:21.476147 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5625 22:24:21.476337 # ok 3897 Set Streaming SVE VL 7376
5626 22:24:21.476501 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5627 22:24:21.476687 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5628 22:24:21.476848 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5629 22:24:21.477008 # ok 3901 Set Streaming SVE VL 7392
5630 22:24:21.477165 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5631 22:24:21.477333 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5632 22:24:21.477470 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5633 22:24:21.477603 # ok 3905 Set Streaming SVE VL 7408
5634 22:24:21.477781 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5635 22:24:21.477939 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5636 22:24:21.478092 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5637 22:24:21.478241 # ok 3909 Set Streaming SVE VL 7424
5638 22:24:21.478410 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5639 22:24:21.478542 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5640 22:24:21.478683 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5641 22:24:21.478807 # ok 3913 Set Streaming SVE VL 7440
5642 22:24:21.478945 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5643 22:24:21.479064 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5644 22:24:21.479174 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5645 22:24:21.479284 # ok 3917 Set Streaming SVE VL 7456
5646 22:24:21.484658 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5647 22:24:21.485097 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5648 22:24:21.485276 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5649 22:24:21.485434 # ok 3921 Set Streaming SVE VL 7472
5650 22:24:21.485597 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5651 22:24:21.485733 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5652 22:24:21.485845 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5653 22:24:21.505245 # ok 3925 Set Streaming SVE VL 7488
5654 22:24:21.505757 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5655 22:24:21.505980 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5656 22:24:21.506159 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5657 22:24:21.506313 # ok 3929 Set Streaming SVE VL 7504
5658 22:24:21.506493 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5659 22:24:21.506642 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5660 22:24:21.506798 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5661 22:24:21.506998 # ok 3933 Set Streaming SVE VL 7520
5662 22:24:21.507159 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5663 22:24:21.507284 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5664 22:24:21.507429 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5665 22:24:21.507547 # ok 3937 Set Streaming SVE VL 7536
5666 22:24:21.507658 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5667 22:24:21.507768 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5668 22:24:21.507878 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5669 22:24:21.507986 # ok 3941 Set Streaming SVE VL 7552
5670 22:24:21.516153 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5671 22:24:21.516583 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5672 22:24:21.516752 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5673 22:24:21.516905 # ok 3945 Set Streaming SVE VL 7568
5674 22:24:21.517059 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5675 22:24:21.517248 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5676 22:24:21.517406 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5677 22:24:21.517558 # ok 3949 Set Streaming SVE VL 7584
5678 22:24:21.517718 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5679 22:24:21.517847 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5680 22:24:21.518082 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5681 22:24:21.518268 # ok 3953 Set Streaming SVE VL 7600
5682 22:24:21.518438 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5683 22:24:21.518572 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5684 22:24:21.518730 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5685 22:24:21.518872 # ok 3957 Set Streaming SVE VL 7616
5686 22:24:21.519016 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5687 22:24:21.519130 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5688 22:24:21.519268 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5689 22:24:21.519385 # ok 3961 Set Streaming SVE VL 7632
5690 22:24:21.519493 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5691 22:24:21.519599 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5692 22:24:21.519706 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5693 22:24:21.519813 # ok 3965 Set Streaming SVE VL 7648
5694 22:24:21.519918 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5695 22:24:21.520024 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5696 22:24:21.520130 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5697 22:24:21.520235 # ok 3969 Set Streaming SVE VL 7664
5698 22:24:21.524057 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5699 22:24:21.524294 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5700 22:24:21.524593 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5701 22:24:21.524683 # ok 3973 Set Streaming SVE VL 7680
5702 22:24:21.524769 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5703 22:24:21.524852 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5704 22:24:21.524952 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5705 22:24:21.525036 # ok 3977 Set Streaming SVE VL 7696
5706 22:24:21.525133 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5707 22:24:21.525230 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5708 22:24:21.525517 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5709 22:24:21.525605 # ok 3981 Set Streaming SVE VL 7712
5710 22:24:21.525712 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5711 22:24:21.525989 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5712 22:24:21.526156 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5713 22:24:21.526287 # ok 3985 Set Streaming SVE VL 7728
5714 22:24:21.526443 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5715 22:24:21.526574 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5716 22:24:21.526703 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5717 22:24:21.526831 # ok 3989 Set Streaming SVE VL 7744
5718 22:24:21.526980 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5719 22:24:21.527118 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5720 22:24:21.527235 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5721 22:24:21.527355 # ok 3993 Set Streaming SVE VL 7760
5722 22:24:21.527491 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5723 22:24:21.531522 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5724 22:24:21.531960 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5725 22:24:21.532104 # ok 3997 Set Streaming SVE VL 7776
5726 22:24:21.532230 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5727 22:24:21.532358 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5728 22:24:21.532511 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5729 22:24:21.532638 # ok 4001 Set Streaming SVE VL 7792
5730 22:24:21.532769 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5731 22:24:21.532891 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5732 22:24:21.533016 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5733 22:24:21.533149 # ok 4005 Set Streaming SVE VL 7808
5734 22:24:21.533303 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5735 22:24:21.533436 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5736 22:24:21.533561 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5737 22:24:21.533696 # ok 4009 Set Streaming SVE VL 7824
5738 22:24:21.533835 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5739 22:24:21.533961 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5740 22:24:21.534083 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5741 22:24:21.534207 # ok 4013 Set Streaming SVE VL 7840
5742 22:24:21.534361 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5743 22:24:21.534489 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5744 22:24:21.534611 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5745 22:24:21.534735 # ok 4017 Set Streaming SVE VL 7856
5746 22:24:21.534858 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5747 22:24:21.534987 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5748 22:24:21.535107 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5749 22:24:21.535220 # ok 4021 Set Streaming SVE VL 7872
5750 22:24:21.535334 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5751 22:24:21.535476 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5752 22:24:21.535595 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5753 22:24:21.535709 # ok 4025 Set Streaming SVE VL 7888
5754 22:24:21.535825 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5755 22:24:21.535937 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5756 22:24:21.536060 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5757 22:24:21.536174 # ok 4029 Set Streaming SVE VL 7904
5758 22:24:21.539711 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5759 22:24:21.539937 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5760 22:24:21.540071 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5761 22:24:21.540220 # ok 4033 Set Streaming SVE VL 7920
5762 22:24:21.540373 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5763 22:24:21.540500 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5764 22:24:21.540625 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5765 22:24:21.540772 # ok 4037 Set Streaming SVE VL 7936
5766 22:24:21.540897 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5767 22:24:21.541020 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5768 22:24:21.541166 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5769 22:24:21.541294 # ok 4041 Set Streaming SVE VL 7952
5770 22:24:21.541418 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5771 22:24:21.541539 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5772 22:24:21.541674 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5773 22:24:21.541826 # ok 4045 Set Streaming SVE VL 7968
5774 22:24:21.541952 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5775 22:24:21.542073 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5776 22:24:21.542194 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5777 22:24:21.542316 # ok 4049 Set Streaming SVE VL 7984
5778 22:24:21.542437 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5779 22:24:21.542586 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5780 22:24:21.542717 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5781 22:24:21.542839 # ok 4053 Set Streaming SVE VL 8000
5782 22:24:21.542961 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5783 22:24:21.543082 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5784 22:24:21.543199 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5785 22:24:21.543313 # ok 4057 Set Streaming SVE VL 8016
5786 22:24:21.543451 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5787 22:24:21.543571 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5788 22:24:21.543686 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5789 22:24:21.543799 # ok 4061 Set Streaming SVE VL 8032
5790 22:24:21.547238 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5791 22:24:21.547630 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5792 22:24:21.547801 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5793 22:24:21.547987 # ok 4065 Set Streaming SVE VL 8048
5794 22:24:21.548227 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5795 22:24:21.548387 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5796 22:24:21.548534 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5797 22:24:21.548677 # ok 4069 Set Streaming SVE VL 8064
5798 22:24:21.548819 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5799 22:24:21.548994 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5800 22:24:21.549130 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5801 22:24:21.549276 # ok 4073 Set Streaming SVE VL 8080
5802 22:24:21.549472 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5803 22:24:21.549679 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5804 22:24:21.549883 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5805 22:24:21.550064 # ok 4077 Set Streaming SVE VL 8096
5806 22:24:21.550249 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5807 22:24:21.550431 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5808 22:24:21.550574 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5809 22:24:21.550752 # ok 4081 Set Streaming SVE VL 8112
5810 22:24:21.550903 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5811 22:24:21.551049 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5812 22:24:21.555133 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5813 22:24:21.555540 # ok 4085 Set Streaming SVE VL 8128
5814 22:24:21.555652 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5815 22:24:21.555735 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5816 22:24:21.555813 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5817 22:24:21.555905 # ok 4089 Set Streaming SVE VL 8144
5818 22:24:21.555984 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5819 22:24:21.556074 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5820 22:24:21.556154 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5821 22:24:21.556243 # ok 4093 Set Streaming SVE VL 8160
5822 22:24:21.556334 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5823 22:24:21.556601 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5824 22:24:21.556719 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5825 22:24:21.556815 # ok 4097 Set Streaming SVE VL 8176
5826 22:24:21.557074 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5827 22:24:21.557189 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5828 22:24:21.557285 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5829 22:24:21.557377 # ok 4101 Set Streaming SVE VL 8192
5830 22:24:21.557672 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5831 22:24:21.557773 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5832 22:24:21.557880 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5833 22:24:21.557962 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5834 22:24:21.558054 ok 30 selftests: arm64: sve-ptrace
5835 22:24:21.558147 # selftests: arm64: sve-probe-vls
5836 22:24:21.558244 # TAP version 13
5837 22:24:21.558335 # 1..2
5838 22:24:21.558414 # ok 1 Enumerated 16 vector lengths
5839 22:24:21.558507 # ok 2 All vector lengths valid
5840 22:24:21.558586 # # 16
5841 22:24:21.558662 # # 32
5842 22:24:21.558737 # # 48
5843 22:24:21.558827 # # 64
5844 22:24:21.558904 # # 80
5845 22:24:21.558980 # # 96
5846 22:24:21.559056 # # 112
5847 22:24:21.559130 # # 128
5848 22:24:21.559205 # # 144
5849 22:24:21.559280 # # 160
5850 22:24:21.559354 # # 176
5851 22:24:21.559429 # # 192
5852 22:24:21.559504 # # 208
5853 22:24:21.559579 # # 224
5854 22:24:21.559654 # # 240
5855 22:24:21.559743 # # 256
5856 22:24:21.563145 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5857 22:24:21.563515 ok 31 selftests: arm64: sve-probe-vls
5858 22:24:21.660128 # selftests: arm64: vec-syscfg
5859 22:24:22.670021 # TAP version 13
5860 22:24:22.670551 # 1..20
5861 22:24:22.670722 # ok 1 SVE default vector length 64
5862 22:24:22.670864 # ok 2 SVE minimum vector length 16
5863 22:24:22.670991 # ok 3 SVE maximum vector length 256
5864 22:24:22.671115 # ok 4 SVE current VL is 64
5865 22:24:22.671240 # ok 5 SVE set VL 64 and have VL 64
5866 22:24:22.671368 # ok 6 SVE prctl() set min/max
5867 22:24:22.671494 # ok 7 SVE vector length used default
5868 22:24:22.671646 # ok 8 SVE vector length was inherited
5869 22:24:22.671778 # ok 9 SVE vector length set on exec
5870 22:24:22.671915 # ok 10 SVE prctl() set all VLs, 0 errors
5871 22:24:22.677047 # ok 11 SME default vector length 32
5872 22:24:22.677566 # ok 12 SME minimum vector length 16
5873 22:24:22.677749 # ok 13 SME maximum vector length 256
5874 22:24:22.677886 # ok 14 SME current VL is 32
5875 22:24:22.678004 # ok 15 SME set VL 32 and have VL 32
5876 22:24:22.678119 # ok 16 SME prctl() set min/max
5877 22:24:22.678234 # ok 17 SME vector length used default
5878 22:24:22.678346 # ok 18 SME vector length was inherited
5879 22:24:22.678481 # ok 19 SME vector length set on exec
5880 22:24:22.678598 # ok 20 SME prctl() set all VLs, 0 errors
5881 22:24:22.678712 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5882 22:24:22.691947 ok 32 selftests: arm64: vec-syscfg
5883 22:24:22.796375 # selftests: arm64: za-fork
5884 22:24:23.017705 # TAP version 13
5885 22:24:23.017943 # 1..1
5886 22:24:23.018227 # # PID: 1013
5887 22:24:23.018327 # ok 1 fork_test
5888 22:24:23.018419 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5889 22:24:23.049352 ok 33 selftests: arm64: za-fork
5890 22:24:23.228631 # selftests: arm64: za-ptrace
5891 22:24:23.436201 # TAP version 13
5892 22:24:23.436455 # 1..1536
5893 22:24:23.436734 # # Parent is 1031, child is 1032
5894 22:24:23.436850 # ok 1 Set VL 16
5895 22:24:23.436940 # ok 2 Disabled ZA for VL 16
5896 22:24:23.437026 # ok 3 Data match for VL 16
5897 22:24:23.437113 # ok 4 Set VL 32
5898 22:24:23.437199 # ok 5 Disabled ZA for VL 32
5899 22:24:23.437285 # ok 6 Data match for VL 32
5900 22:24:23.437372 # ok 7 Set VL 48
5901 22:24:23.437478 # ok 8 # SKIP Disabled ZA for VL 48
5902 22:24:23.437575 # ok 9 # SKIP Get and set data for VL 48
5903 22:24:23.437674 # ok 10 Set VL 64
5904 22:24:23.437763 # ok 11 Disabled ZA for VL 64
5905 22:24:23.437852 # ok 12 Data match for VL 64
5906 22:24:23.437939 # ok 13 Set VL 80
5907 22:24:23.438024 # ok 14 # SKIP Disabled ZA for VL 80
5908 22:24:23.438112 # ok 15 # SKIP Get and set data for VL 80
5909 22:24:23.438217 # ok 16 Set VL 96
5910 22:24:23.438305 # ok 17 # SKIP Disabled ZA for VL 96
5911 22:24:23.438391 # ok 18 # SKIP Get and set data for VL 96
5912 22:24:23.438476 # ok 19 Set VL 112
5913 22:24:23.438558 # ok 20 # SKIP Disabled ZA for VL 112
5914 22:24:23.438648 # ok 21 # SKIP Get and set data for VL 112
5915 22:24:23.438741 # ok 22 Set VL 128
5916 22:24:23.438835 # ok 23 Disabled ZA for VL 128
5917 22:24:23.438911 # ok 24 Data match for VL 128
5918 22:24:23.438983 # ok 25 Set VL 144
5919 22:24:23.439052 # ok 26 # SKIP Disabled ZA for VL 144
5920 22:24:23.439122 # ok 27 # SKIP Get and set data for VL 144
5921 22:24:23.439191 # ok 28 Set VL 160
5922 22:24:23.445125 # ok 29 # SKIP Disabled ZA for VL 160
5923 22:24:23.445448 # ok 30 # SKIP Get and set data for VL 160
5924 22:24:23.445632 # ok 31 Set VL 176
5925 22:24:23.445810 # ok 32 # SKIP Disabled ZA for VL 176
5926 22:24:23.446004 # ok 33 # SKIP Get and set data for VL 176
5927 22:24:23.446170 # ok 34 Set VL 192
5928 22:24:23.446328 # ok 35 # SKIP Disabled ZA for VL 192
5929 22:24:23.446467 # ok 36 # SKIP Get and set data for VL 192
5930 22:24:23.446637 # ok 37 Set VL 208
5931 22:24:23.446831 # ok 38 # SKIP Disabled ZA for VL 208
5932 22:24:23.447007 # ok 39 # SKIP Get and set data for VL 208
5933 22:24:23.447156 # ok 40 Set VL 224
5934 22:24:23.447300 # ok 41 # SKIP Disabled ZA for VL 224
5935 22:24:23.447496 # ok 42 # SKIP Get and set data for VL 224
5936 22:24:23.447667 # ok 43 Set VL 240
5937 22:24:23.447818 # ok 44 # SKIP Disabled ZA for VL 240
5938 22:24:23.447961 # ok 45 # SKIP Get and set data for VL 240
5939 22:24:23.448103 # ok 46 Set VL 256
5940 22:24:23.448246 # ok 47 Disabled ZA for VL 256
5941 22:24:23.448388 # ok 48 Data match for VL 256
5942 22:24:23.448531 # ok 49 Set VL 272
5943 22:24:23.448672 # ok 50 # SKIP Disabled ZA for VL 272
5944 22:24:23.448854 # ok 51 # SKIP Get and set data for VL 272
5945 22:24:23.449006 # ok 52 Set VL 288
5946 22:24:23.449152 # ok 53 # SKIP Disabled ZA for VL 288
5947 22:24:23.449295 # ok 54 # SKIP Get and set data for VL 288
5948 22:24:23.449440 # ok 55 Set VL 304
5949 22:24:23.449582 # ok 56 # SKIP Disabled ZA for VL 304
5950 22:24:23.449750 # ok 57 # SKIP Get and set data for VL 304
5951 22:24:23.449945 # ok 58 Set VL 320
5952 22:24:23.450112 # ok 59 # SKIP Disabled ZA for VL 320
5953 22:24:23.450276 # ok 60 # SKIP Get and set data for VL 320
5954 22:24:23.450436 # ok 61 Set VL 336
5955 22:24:23.450619 # ok 62 # SKIP Disabled ZA for VL 336
5956 22:24:23.450810 # ok 63 # SKIP Get and set data for VL 336
5957 22:24:23.450980 # ok 64 Set VL 352
5958 22:24:23.451110 # ok 65 # SKIP Disabled ZA for VL 352
5959 22:24:23.451226 # ok 66 # SKIP Get and set data for VL 352
5960 22:24:23.451341 # ok 67 Set VL 368
5961 22:24:23.451455 # ok 68 # SKIP Disabled ZA for VL 368
5962 22:24:23.451570 # ok 69 # SKIP Get and set data for VL 368
5963 22:24:23.451683 # ok 70 Set VL 384
5964 22:24:23.451796 # ok 71 # SKIP Disabled ZA for VL 384
5965 22:24:23.451910 # ok 72 # SKIP Get and set data for VL 384
5966 22:24:23.452023 # ok 73 Set VL 400
5967 22:24:23.452136 # ok 74 # SKIP Disabled ZA for VL 400
5968 22:24:23.452250 # ok 75 # SKIP Get and set data for VL 400
5969 22:24:23.452362 # ok 76 Set VL 416
5970 22:24:23.452474 # ok 77 # SKIP Disabled ZA for VL 416
5971 22:24:23.452587 # ok 78 # SKIP Get and set data for VL 416
5972 22:24:23.452729 # ok 79 Set VL 432
5973 22:24:23.452853 # ok 80 # SKIP Disabled ZA for VL 432
5974 22:24:23.459857 # ok 81 # SKIP Get and set data for VL 432
5975 22:24:23.459962 # ok 82 Set VL 448
5976 22:24:23.460050 # ok 83 # SKIP Disabled ZA for VL 448
5977 22:24:23.460144 # ok 84 # SKIP Get and set data for VL 448
5978 22:24:23.460227 # ok 85 Set VL 464
5979 22:24:23.460305 # ok 86 # SKIP Disabled ZA for VL 464
5980 22:24:23.460381 # ok 87 # SKIP Get and set data for VL 464
5981 22:24:23.460457 # ok 88 Set VL 480
5982 22:24:23.460548 # ok 89 # SKIP Disabled ZA for VL 480
5983 22:24:23.460627 # ok 90 # SKIP Get and set data for VL 480
5984 22:24:23.460704 # ok 91 Set VL 496
5985 22:24:23.460779 # ok 92 # SKIP Disabled ZA for VL 496
5986 22:24:23.460869 # ok 93 # SKIP Get and set data for VL 496
5987 22:24:23.460948 # ok 94 Set VL 512
5988 22:24:23.461024 # ok 95 # SKIP Disabled ZA for VL 512
5989 22:24:23.461113 # ok 96 # SKIP Get and set data for VL 512
5990 22:24:23.461192 # ok 97 Set VL 528
5991 22:24:23.461268 # ok 98 # SKIP Disabled ZA for VL 528
5992 22:24:23.461358 # ok 99 # SKIP Get and set data for VL 528
5993 22:24:23.461436 # ok 100 Set VL 544
5994 22:24:23.461513 # ok 101 # SKIP Disabled ZA for VL 544
5995 22:24:23.461601 # ok 102 # SKIP Get and set data for VL 544
5996 22:24:23.461690 # ok 103 Set VL 560
5997 22:24:23.461767 # ok 104 # SKIP Disabled ZA for VL 560
5998 22:24:23.461868 # ok 105 # SKIP Get and set data for VL 560
5999 22:24:23.461950 # ok 106 Set VL 576
6000 22:24:23.462039 # ok 107 # SKIP Disabled ZA for VL 576
6001 22:24:23.462117 # ok 108 # SKIP Get and set data for VL 576
6002 22:24:23.462194 # ok 109 Set VL 592
6003 22:24:23.462282 # ok 110 # SKIP Disabled ZA for VL 592
6004 22:24:23.462361 # ok 111 # SKIP Get and set data for VL 592
6005 22:24:23.462438 # ok 112 Set VL 608
6006 22:24:23.462527 # ok 113 # SKIP Disabled ZA for VL 608
6007 22:24:23.462607 # ok 114 # SKIP Get and set data for VL 608
6008 22:24:23.462683 # ok 115 Set VL 624
6009 22:24:23.462759 # ok 116 # SKIP Disabled ZA for VL 624
6010 22:24:23.462853 # ok 117 # SKIP Get and set data for VL 624
6011 22:24:23.462932 # ok 118 Set VL 640
6012 22:24:23.472759 # ok 119 # SKIP Disabled ZA for VL 640
6013 22:24:23.473191 # ok 120 # SKIP Get and set data for VL 640
6014 22:24:23.473352 # ok 121 Set VL 656
6015 22:24:23.473480 # ok 122 # SKIP Disabled ZA for VL 656
6016 22:24:23.473601 # ok 123 # SKIP Get and set data for VL 656
6017 22:24:23.473742 # ok 124 Set VL 672
6018 22:24:23.478203 # ok 125 # SKIP Disabled ZA for VL 672
6019 22:24:23.478785 # ok 126 # SKIP Get and set data for VL 672
6020 22:24:23.478964 # ok 127 Set VL 688
6021 22:24:23.479108 # ok 128 # SKIP Disabled ZA for VL 688
6022 22:24:23.479229 # ok 129 # SKIP Get and set data for VL 688
6023 22:24:23.479347 # ok 130 Set VL 704
6024 22:24:23.486781 # ok 131 # SKIP Disabled ZA for VL 704
6025 22:24:23.487065 # ok 132 # SKIP Get and set data for VL 704
6026 22:24:23.487520 # ok 133 Set VL 720
6027 22:24:23.487951 # ok 134 # SKIP Disabled ZA for VL 720
6028 22:24:23.488151 # ok 135 # SKIP Get and set data for VL 720
6029 22:24:23.488320 # ok 136 Set VL 736
6030 22:24:23.488482 # ok 137 # SKIP Disabled ZA for VL 736
6031 22:24:23.488642 # ok 138 # SKIP Get and set data for VL 736
6032 22:24:23.488825 # ok 139 Set VL 752
6033 22:24:23.488997 # ok 140 # SKIP Disabled ZA for VL 752
6034 22:24:23.489159 # ok 141 # SKIP Get and set data for VL 752
6035 22:24:23.489316 # ok 142 Set VL 768
6036 22:24:23.489477 # ok 143 # SKIP Disabled ZA for VL 768
6037 22:24:23.489636 # ok 144 # SKIP Get and set data for VL 768
6038 22:24:23.489812 # ok 145 Set VL 784
6039 22:24:23.489978 # ok 146 # SKIP Disabled ZA for VL 784
6040 22:24:23.490137 # ok 147 # SKIP Get and set data for VL 784
6041 22:24:23.490341 # ok 148 Set VL 800
6042 22:24:23.490511 # ok 149 # SKIP Disabled ZA for VL 800
6043 22:24:23.490669 # ok 150 # SKIP Get and set data for VL 800
6044 22:24:23.490803 # ok 151 Set VL 816
6045 22:24:23.490920 # ok 152 # SKIP Disabled ZA for VL 816
6046 22:24:23.491034 # ok 153 # SKIP Get and set data for VL 816
6047 22:24:23.491148 # ok 154 Set VL 832
6048 22:24:23.491260 # ok 155 # SKIP Disabled ZA for VL 832
6049 22:24:23.491374 # ok 156 # SKIP Get and set data for VL 832
6050 22:24:23.491487 # ok 157 Set VL 848
6051 22:24:23.491599 # ok 158 # SKIP Disabled ZA for VL 848
6052 22:24:23.491711 # ok 159 # SKIP Get and set data for VL 848
6053 22:24:23.491824 # ok 160 Set VL 864
6054 22:24:23.491936 # ok 161 # SKIP Disabled ZA for VL 864
6055 22:24:23.492050 # ok 162 # SKIP Get and set data for VL 864
6056 22:24:23.492164 # ok 163 Set VL 880
6057 22:24:23.492277 # ok 164 # SKIP Disabled ZA for VL 880
6058 22:24:23.492419 # ok 165 # SKIP Get and set data for VL 880
6059 22:24:23.492538 # ok 166 Set VL 896
6060 22:24:23.492651 # ok 167 # SKIP Disabled ZA for VL 896
6061 22:24:23.492765 # ok 168 # SKIP Get and set data for VL 896
6062 22:24:23.492882 # ok 169 Set VL 912
6063 22:24:23.502822 # ok 170 # SKIP Disabled ZA for VL 912
6064 22:24:23.503805 # ok 171 # SKIP Get and set data for VL 912
6065 22:24:23.504000 # ok 172 Set VL 928
6066 22:24:23.504428 # ok 173 # SKIP Disabled ZA for VL 928
6067 22:24:23.504577 # ok 174 # SKIP Get and set data for VL 928
6068 22:24:23.504725 # ok 175 Set VL 944
6069 22:24:23.504869 # ok 176 # SKIP Disabled ZA for VL 944
6070 22:24:23.505630 # ok 177 # SKIP Get and set data for VL 944
6071 22:24:23.505848 # ok 178 Set VL 960
6072 22:24:23.506055 # ok 179 # SKIP Disabled ZA for VL 960
6073 22:24:23.506254 # ok 180 # SKIP Get and set data for VL 960
6074 22:24:23.506429 # ok 181 Set VL 976
6075 22:24:23.506579 # ok 182 # SKIP Disabled ZA for VL 976
6076 22:24:23.506726 # ok 183 # SKIP Get and set data for VL 976
6077 22:24:23.506867 # ok 184 Set VL 992
6078 22:24:23.507027 # ok 185 # SKIP Disabled ZA for VL 992
6079 22:24:23.507183 # ok 186 # SKIP Get and set data for VL 992
6080 22:24:23.507318 # ok 187 Set VL 1008
6081 22:24:23.507482 # ok 188 # SKIP Disabled ZA for VL 1008
6082 22:24:23.507622 # ok 189 # SKIP Get and set data for VL 1008
6083 22:24:23.507772 # ok 190 Set VL 1024
6084 22:24:23.507918 # ok 191 # SKIP Disabled ZA for VL 1024
6085 22:24:23.508092 # ok 192 # SKIP Get and set data for VL 1024
6086 22:24:23.508254 # ok 193 Set VL 1040
6087 22:24:23.508421 # ok 194 # SKIP Disabled ZA for VL 1040
6088 22:24:23.509375 # ok 195 # SKIP Get and set data for VL 1040
6089 22:24:23.509586 # ok 196 Set VL 1056
6090 22:24:23.509776 # ok 197 # SKIP Disabled ZA for VL 1056
6091 22:24:23.509941 # ok 198 # SKIP Get and set data for VL 1056
6092 22:24:23.510111 # ok 199 Set VL 1072
6093 22:24:23.510275 # ok 200 # SKIP Disabled ZA for VL 1072
6094 22:24:23.510436 # ok 201 # SKIP Get and set data for VL 1072
6095 22:24:23.510592 # ok 202 Set VL 1088
6096 22:24:23.510751 # ok 203 # SKIP Disabled ZA for VL 1088
6097 22:24:23.510906 # ok 204 # SKIP Get and set data for VL 1088
6098 22:24:23.511062 # ok 205 Set VL 1104
6099 22:24:23.511211 # ok 206 # SKIP Disabled ZA for VL 1104
6100 22:24:23.511349 # ok 207 # SKIP Get and set data for VL 1104
6101 22:24:23.511472 # ok 208 Set VL 1120
6102 22:24:23.511590 # ok 209 # SKIP Disabled ZA for VL 1120
6103 22:24:23.511748 # ok 210 # SKIP Get and set data for VL 1120
6104 22:24:23.511871 # ok 211 Set VL 1136
6105 22:24:23.511987 # ok 212 # SKIP Disabled ZA for VL 1136
6106 22:24:23.512102 # ok 213 # SKIP Get and set data for VL 1136
6107 22:24:23.512217 # ok 214 Set VL 1152
6108 22:24:23.512332 # ok 215 # SKIP Disabled ZA for VL 1152
6109 22:24:23.512448 # ok 216 # SKIP Get and set data for VL 1152
6110 22:24:23.512565 # ok 217 Set VL 1168
6111 22:24:23.512681 # ok 218 # SKIP Disabled ZA for VL 1168
6112 22:24:23.512796 # ok 219 # SKIP Get and set data for VL 1168
6113 22:24:23.512913 # ok 220 Set VL 1184
6114 22:24:23.513028 # ok 221 # SKIP Disabled ZA for VL 1184
6115 22:24:23.513145 # ok 222 # SKIP Get and set data for VL 1184
6116 22:24:23.513261 # ok 223 Set VL 1200
6117 22:24:23.513376 # ok 224 # SKIP Disabled ZA for VL 1200
6118 22:24:23.513491 # ok 225 # SKIP Get and set data for VL 1200
6119 22:24:23.513606 # ok 226 Set VL 1216
6120 22:24:23.513734 # ok 227 # SKIP Disabled ZA for VL 1216
6121 22:24:23.513851 # ok 228 # SKIP Get and set data for VL 1216
6122 22:24:23.513964 # ok 229 Set VL 1232
6123 22:24:23.514076 # ok 230 # SKIP Disabled ZA for VL 1232
6124 22:24:23.514220 # ok 231 # SKIP Get and set data for VL 1232
6125 22:24:23.514341 # ok 232 Set VL 1248
6126 22:24:23.514455 # ok 233 # SKIP Disabled ZA for VL 1248
6127 22:24:23.514568 # ok 234 # SKIP Get and set data for VL 1248
6128 22:24:23.514681 # ok 235 Set VL 1264
6129 22:24:23.514792 # ok 236 # SKIP Disabled ZA for VL 1264
6130 22:24:23.514905 # ok 237 # SKIP Get and set data for VL 1264
6131 22:24:23.515017 # ok 238 Set VL 1280
6132 22:24:23.515128 # ok 239 # SKIP Disabled ZA for VL 1280
6133 22:24:23.515240 # ok 240 # SKIP Get and set data for VL 1280
6134 22:24:23.515353 # ok 241 Set VL 1296
6135 22:24:23.515465 # ok 242 # SKIP Disabled ZA for VL 1296
6136 22:24:23.515577 # ok 243 # SKIP Get and set data for VL 1296
6137 22:24:23.515740 # ok 244 Set VL 1312
6138 22:24:23.515873 # ok 245 # SKIP Disabled ZA for VL 1312
6139 22:24:23.515992 # ok 246 # SKIP Get and set data for VL 1312
6140 22:24:23.516109 # ok 247 Set VL 1328
6141 22:24:23.516226 # ok 248 # SKIP Disabled ZA for VL 1328
6142 22:24:23.516556 # ok 249 # SKIP Get and set data for VL 1328
6143 22:24:23.516687 # ok 250 Set VL 1344
6144 22:24:23.516806 # ok 251 # SKIP Disabled ZA for VL 1344
6145 22:24:23.516927 # ok 252 # SKIP Get and set data for VL 1344
6146 22:24:23.517045 # ok 253 Set VL 1360
6147 22:24:23.517162 # ok 254 # SKIP Disabled ZA for VL 1360
6148 22:24:23.525103 # ok 255 # SKIP Get and set data for VL 1360
6149 22:24:23.525631 # ok 256 Set VL 1376
6150 22:24:23.525937 # ok 257 # SKIP Disabled ZA for VL 1376
6151 22:24:23.526135 # ok 258 # SKIP Get and set data for VL 1376
6152 22:24:23.526325 # ok 259 Set VL 1392
6153 22:24:23.526499 # ok 260 # SKIP Disabled ZA for VL 1392
6154 22:24:23.526647 # ok 261 # SKIP Get and set data for VL 1392
6155 22:24:23.526836 # ok 262 Set VL 1408
6156 22:24:23.527002 # ok 263 # SKIP Disabled ZA for VL 1408
6157 22:24:23.527184 # ok 264 # SKIP Get and set data for VL 1408
6158 22:24:23.527332 # ok 265 Set VL 1424
6159 22:24:23.527475 # ok 266 # SKIP Disabled ZA for VL 1424
6160 22:24:23.527616 # ok 267 # SKIP Get and set data for VL 1424
6161 22:24:23.527758 # ok 268 Set VL 1440
6162 22:24:23.527898 # ok 269 # SKIP Disabled ZA for VL 1440
6163 22:24:23.528043 # ok 270 # SKIP Get and set data for VL 1440
6164 22:24:23.528184 # ok 271 Set VL 1456
6165 22:24:23.528324 # ok 272 # SKIP Disabled ZA for VL 1456
6166 22:24:23.528463 # ok 273 # SKIP Get and set data for VL 1456
6167 22:24:23.528604 # ok 274 Set VL 1472
6168 22:24:23.528745 # ok 275 # SKIP Disabled ZA for VL 1472
6169 22:24:23.528885 # ok 276 # SKIP Get and set data for VL 1472
6170 22:24:23.529025 # ok 277 Set VL 1488
6171 22:24:23.529212 # ok 278 # SKIP Disabled ZA for VL 1488
6172 22:24:23.529359 # ok 279 # SKIP Get and set data for VL 1488
6173 22:24:23.529523 # ok 280 Set VL 1504
6174 22:24:23.529701 # ok 281 # SKIP Disabled ZA for VL 1504
6175 22:24:23.529864 # ok 282 # SKIP Get and set data for VL 1504
6176 22:24:23.530006 # ok 283 Set VL 1520
6177 22:24:23.530129 # ok 284 # SKIP Disabled ZA for VL 1520
6178 22:24:23.530334 # ok 285 # SKIP Get and set data for VL 1520
6179 22:24:23.530489 # ok 286 Set VL 1536
6180 22:24:23.530632 # ok 287 # SKIP Disabled ZA for VL 1536
6181 22:24:23.530788 # ok 288 # SKIP Get and set data for VL 1536
6182 22:24:23.530964 # ok 289 Set VL 1552
6183 22:24:23.531109 # ok 290 # SKIP Disabled ZA for VL 1552
6184 22:24:23.531250 # ok 291 # SKIP Get and set data for VL 1552
6185 22:24:23.531391 # ok 292 Set VL 1568
6186 22:24:23.531531 # ok 293 # SKIP Disabled ZA for VL 1568
6187 22:24:23.531672 # ok 294 # SKIP Get and set data for VL 1568
6188 22:24:23.531813 # ok 295 Set VL 1584
6189 22:24:23.531953 # ok 296 # SKIP Disabled ZA for VL 1584
6190 22:24:23.532097 # ok 297 # SKIP Get and set data for VL 1584
6191 22:24:23.532237 # ok 298 Set VL 1600
6192 22:24:23.532376 # ok 299 # SKIP Disabled ZA for VL 1600
6193 22:24:23.532516 # ok 300 # SKIP Get and set data for VL 1600
6194 22:24:23.532702 # ok 301 Set VL 1616
6195 22:24:23.532837 # ok 302 # SKIP Disabled ZA for VL 1616
6196 22:24:23.532979 # ok 303 # SKIP Get and set data for VL 1616
6197 22:24:23.533121 # ok 304 Set VL 1632
6198 22:24:23.533260 # ok 305 # SKIP Disabled ZA for VL 1632
6199 22:24:23.533401 # ok 306 # SKIP Get and set data for VL 1632
6200 22:24:23.533543 # ok 307 Set VL 1648
6201 22:24:23.533698 # ok 308 # SKIP Disabled ZA for VL 1648
6202 22:24:23.533842 # ok 309 # SKIP Get and set data for VL 1648
6203 22:24:23.534214 # ok 310 Set VL 1664
6204 22:24:23.534352 # ok 311 # SKIP Disabled ZA for VL 1664
6205 22:24:23.534496 # ok 312 # SKIP Get and set data for VL 1664
6206 22:24:23.534638 # ok 313 Set VL 1680
6207 22:24:23.534780 # ok 314 # SKIP Disabled ZA for VL 1680
6208 22:24:23.534921 # ok 315 # SKIP Get and set data for VL 1680
6209 22:24:23.535064 # ok 316 Set VL 1696
6210 22:24:23.535204 # ok 317 # SKIP Disabled ZA for VL 1696
6211 22:24:23.541312 # ok 318 # SKIP Get and set data for VL 1696
6212 22:24:23.541683 # ok 319 Set VL 1712
6213 22:24:23.542120 # ok 320 # SKIP Disabled ZA for VL 1712
6214 22:24:23.542234 # ok 321 # SKIP Get and set data for VL 1712
6215 22:24:23.542327 # ok 322 Set VL 1728
6216 22:24:23.542419 # ok 323 # SKIP Disabled ZA for VL 1728
6217 22:24:23.542503 # ok 324 # SKIP Get and set data for VL 1728
6218 22:24:23.542590 # ok 325 Set VL 1744
6219 22:24:23.542677 # ok 326 # SKIP Disabled ZA for VL 1744
6220 22:24:23.542785 # ok 327 # SKIP Get and set data for VL 1744
6221 22:24:23.542877 # ok 328 Set VL 1760
6222 22:24:23.542964 # ok 329 # SKIP Disabled ZA for VL 1760
6223 22:24:23.543050 # ok 330 # SKIP Get and set data for VL 1760
6224 22:24:23.543136 # ok 331 Set VL 1776
6225 22:24:23.569554 # ok 332 # SKIP Disabled ZA for VL 1776
6226 22:24:23.570057 # ok 333 # SKIP Get and set data for VL 1776
6227 22:24:23.570253 # ok 334 Set VL 1792
6228 22:24:23.570421 # ok 335 # SKIP Disabled ZA for VL 1792
6229 22:24:23.570591 # ok 336 # SKIP Get and set data for VL 1792
6230 22:24:23.570728 # ok 337 Set VL 1808
6231 22:24:23.570845 # ok 338 # SKIP Disabled ZA for VL 1808
6232 22:24:23.570987 # ok 339 # SKIP Get and set data for VL 1808
6233 22:24:23.571109 # ok 340 Set VL 1824
6234 22:24:23.571224 # ok 341 # SKIP Disabled ZA for VL 1824
6235 22:24:23.571338 # ok 342 # SKIP Get and set data for VL 1824
6236 22:24:23.571452 # ok 343 Set VL 1840
6237 22:24:23.571566 # ok 344 # SKIP Disabled ZA for VL 1840
6238 22:24:23.606114 # ok 345 # SKIP Get and set data for VL 1840
6239 22:24:23.606590 # ok 346 Set VL 1856
6240 22:24:23.606756 # ok 347 # SKIP Disabled ZA for VL 1856
6241 22:24:23.606882 # ok 348 # SKIP Get and set data for VL 1856
6242 22:24:23.607000 # ok 349 Set VL 1872
6243 22:24:23.607118 # ok 350 # SKIP Disabled ZA for VL 1872
6244 22:24:23.607235 # ok 351 # SKIP Get and set data for VL 1872
6245 22:24:23.607375 # ok 352 Set VL 1888
6246 22:24:23.630702 # ok 353 # SKIP Disabled ZA for VL 1888
6247 22:24:23.630870 # ok 354 # SKIP Get and set data for VL 1888
6248 22:24:23.631025 # ok 355 Set VL 1904
6249 22:24:23.636859 # ok 356 # SKIP Disabled ZA for VL 1904
6250 22:24:23.637256 # ok 357 # SKIP Get and set data for VL 1904
6251 22:24:23.637394 # ok 358 Set VL 1920
6252 22:24:23.638599 # ok 359 # SKIP Disabled ZA for VL 1920
6253 22:24:23.638789 # ok 360 # SKIP Get and set data for VL 1920
6254 22:24:23.638916 # ok 361 Set VL 1936
6255 22:24:23.639035 # ok 362 # SKIP Disabled ZA for VL 1936
6256 22:24:23.639153 # ok 363 # SKIP Get and set data for VL 1936
6257 22:24:23.639270 # ok 364 Set VL 1952
6258 22:24:23.639385 # ok 365 # SKIP Disabled ZA for VL 1952
6259 22:24:23.639707 # ok 366 # SKIP Get and set data for VL 1952
6260 22:24:23.639834 # ok 367 Set VL 1968
6261 22:24:23.650137 # ok 368 # SKIP Disabled ZA for VL 1968
6262 22:24:23.650528 # ok 369 # SKIP Get and set data for VL 1968
6263 22:24:23.650637 # ok 370 Set VL 1984
6264 22:24:23.650729 # ok 371 # SKIP Disabled ZA for VL 1984
6265 22:24:23.650818 # ok 372 # SKIP Get and set data for VL 1984
6266 22:24:23.650906 # ok 373 Set VL 2000
6267 22:24:23.651010 # ok 374 # SKIP Disabled ZA for VL 2000
6268 22:24:23.657976 # ok 375 # SKIP Get and set data for VL 2000
6269 22:24:23.658435 # ok 376 Set VL 2016
6270 22:24:23.658643 # ok 377 # SKIP Disabled ZA for VL 2016
6271 22:24:23.658807 # ok 378 # SKIP Get and set data for VL 2016
6272 22:24:23.658942 # ok 379 Set VL 2032
6273 22:24:23.659061 # ok 380 # SKIP Disabled ZA for VL 2032
6274 22:24:23.659207 # ok 381 # SKIP Get and set data for VL 2032
6275 22:24:23.659333 # ok 382 Set VL 2048
6276 22:24:23.659452 # ok 383 # SKIP Disabled ZA for VL 2048
6277 22:24:23.660244 # ok 384 # SKIP Get and set data for VL 2048
6278 22:24:23.660443 # ok 385 Set VL 2064
6279 22:24:23.660806 # ok 386 # SKIP Disabled ZA for VL 2064
6280 22:24:23.660910 # ok 387 # SKIP Get and set data for VL 2064
6281 22:24:23.660991 # ok 388 Set VL 2080
6282 22:24:23.661069 # ok 389 # SKIP Disabled ZA for VL 2080
6283 22:24:23.661145 # ok 390 # SKIP Get and set data for VL 2080
6284 22:24:23.661221 # ok 391 Set VL 2096
6285 22:24:23.661312 # ok 392 # SKIP Disabled ZA for VL 2096
6286 22:24:23.661390 # ok 393 # SKIP Get and set data for VL 2096
6287 22:24:23.661467 # ok 394 Set VL 2112
6288 22:24:23.661543 # ok 395 # SKIP Disabled ZA for VL 2112
6289 22:24:23.661618 # ok 396 # SKIP Get and set data for VL 2112
6290 22:24:23.661704 # ok 397 Set VL 2128
6291 22:24:23.661796 # ok 398 # SKIP Disabled ZA for VL 2128
6292 22:24:23.661886 # ok 399 # SKIP Get and set data for VL 2128
6293 22:24:23.661966 # ok 400 Set VL 2144
6294 22:24:23.662042 # ok 401 # SKIP Disabled ZA for VL 2144
6295 22:24:23.662116 # ok 402 # SKIP Get and set data for VL 2144
6296 22:24:23.662213 # ok 403 Set VL 2160
6297 22:24:23.662292 # ok 404 # SKIP Disabled ZA for VL 2160
6298 22:24:23.662368 # ok 405 # SKIP Get and set data for VL 2160
6299 22:24:23.662444 # ok 406 Set VL 2176
6300 22:24:23.662534 # ok 407 # SKIP Disabled ZA for VL 2176
6301 22:24:23.662613 # ok 408 # SKIP Get and set data for VL 2176
6302 22:24:23.662689 # ok 409 Set VL 2192
6303 22:24:23.662764 # ok 410 # SKIP Disabled ZA for VL 2192
6304 22:24:23.662839 # ok 411 # SKIP Get and set data for VL 2192
6305 22:24:23.662914 # ok 412 Set VL 2208
6306 22:24:23.663003 # ok 413 # SKIP Disabled ZA for VL 2208
6307 22:24:23.663081 # ok 414 # SKIP Get and set data for VL 2208
6308 22:24:23.668165 # ok 415 Set VL 2224
6309 22:24:23.668581 # ok 416 # SKIP Disabled ZA for VL 2224
6310 22:24:23.668778 # ok 417 # SKIP Get and set data for VL 2224
6311 22:24:23.668934 # ok 418 Set VL 2240
6312 22:24:23.669093 # ok 419 # SKIP Disabled ZA for VL 2240
6313 22:24:23.669259 # ok 420 # SKIP Get and set data for VL 2240
6314 22:24:23.669393 # ok 421 Set VL 2256
6315 22:24:23.669521 # ok 422 # SKIP Disabled ZA for VL 2256
6316 22:24:23.669665 # ok 423 # SKIP Get and set data for VL 2256
6317 22:24:23.669846 # ok 424 Set VL 2272
6318 22:24:23.670011 # ok 425 # SKIP Disabled ZA for VL 2272
6319 22:24:23.670136 # ok 426 # SKIP Get and set data for VL 2272
6320 22:24:23.670293 # ok 427 Set VL 2288
6321 22:24:23.670537 # ok 428 # SKIP Disabled ZA for VL 2288
6322 22:24:23.670718 # ok 429 # SKIP Get and set data for VL 2288
6323 22:24:23.670845 # ok 430 Set VL 2304
6324 22:24:23.670960 # ok 431 # SKIP Disabled ZA for VL 2304
6325 22:24:23.671073 # ok 432 # SKIP Get and set data for VL 2304
6326 22:24:23.671185 # ok 433 Set VL 2320
6327 22:24:23.671298 # ok 434 # SKIP Disabled ZA for VL 2320
6328 22:24:23.671409 # ok 435 # SKIP Get and set data for VL 2320
6329 22:24:23.671546 # ok 436 Set VL 2336
6330 22:24:23.671663 # ok 437 # SKIP Disabled ZA for VL 2336
6331 22:24:23.676326 # ok 438 # SKIP Get and set data for VL 2336
6332 22:24:23.676456 # ok 439 Set VL 2352
6333 22:24:23.676780 # ok 440 # SKIP Disabled ZA for VL 2352
6334 22:24:23.676881 # ok 441 # SKIP Get and set data for VL 2352
6335 22:24:23.676979 # ok 442 Set VL 2368
6336 22:24:23.677057 # ok 443 # SKIP Disabled ZA for VL 2368
6337 22:24:23.677161 # ok 444 # SKIP Get and set data for VL 2368
6338 22:24:23.677241 # ok 445 Set VL 2384
6339 22:24:23.677335 # ok 446 # SKIP Disabled ZA for VL 2384
6340 22:24:23.677414 # ok 447 # SKIP Get and set data for VL 2384
6341 22:24:23.677523 # ok 448 Set VL 2400
6342 22:24:23.677605 # ok 449 # SKIP Disabled ZA for VL 2400
6343 22:24:23.677690 # ok 450 # SKIP Get and set data for VL 2400
6344 22:24:23.677782 # ok 451 Set VL 2416
6345 22:24:23.677882 # ok 452 # SKIP Disabled ZA for VL 2416
6346 22:24:23.677983 # ok 453 # SKIP Get and set data for VL 2416
6347 22:24:23.678060 # ok 454 Set VL 2432
6348 22:24:23.678161 # ok 455 # SKIP Disabled ZA for VL 2432
6349 22:24:23.678258 # ok 456 # SKIP Get and set data for VL 2432
6350 22:24:23.678355 # ok 457 Set VL 2448
6351 22:24:23.678431 # ok 458 # SKIP Disabled ZA for VL 2448
6352 22:24:23.678524 # ok 459 # SKIP Get and set data for VL 2448
6353 22:24:23.678615 # ok 460 Set VL 2464
6354 22:24:23.678717 # ok 461 # SKIP Disabled ZA for VL 2464
6355 22:24:23.678793 # ok 462 # SKIP Get and set data for VL 2464
6356 22:24:23.678889 # ok 463 Set VL 2480
6357 22:24:23.678966 # ok 464 # SKIP Disabled ZA for VL 2480
6358 22:24:23.679067 # ok 465 # SKIP Get and set data for VL 2480
6359 22:24:23.679147 # ok 466 Set VL 2496
6360 22:24:23.684671 # ok 467 # SKIP Disabled ZA for VL 2496
6361 22:24:23.685137 # ok 468 # SKIP Get and set data for VL 2496
6362 22:24:23.685351 # ok 469 Set VL 2512
6363 22:24:23.685593 # ok 470 # SKIP Disabled ZA for VL 2512
6364 22:24:23.685836 # ok 471 # SKIP Get and set data for VL 2512
6365 22:24:23.686049 # ok 472 Set VL 2528
6366 22:24:23.686264 # ok 473 # SKIP Disabled ZA for VL 2528
6367 22:24:23.686482 # ok 474 # SKIP Get and set data for VL 2528
6368 22:24:23.686685 # ok 475 Set VL 2544
6369 22:24:23.686856 # ok 476 # SKIP Disabled ZA for VL 2544
6370 22:24:23.686985 # ok 477 # SKIP Get and set data for VL 2544
6371 22:24:23.687101 # ok 478 Set VL 2560
6372 22:24:23.687238 # ok 479 # SKIP Disabled ZA for VL 2560
6373 22:24:23.687379 # ok 480 # SKIP Get and set data for VL 2560
6374 22:24:23.687568 # ok 481 Set VL 2576
6375 22:24:23.687746 # ok 482 # SKIP Disabled ZA for VL 2576
6376 22:24:23.687903 # ok 483 # SKIP Get and set data for VL 2576
6377 22:24:23.688067 # ok 484 Set VL 2592
6378 22:24:23.688220 # ok 485 # SKIP Disabled ZA for VL 2592
6379 22:24:23.688362 # ok 486 # SKIP Get and set data for VL 2592
6380 22:24:23.688504 # ok 487 Set VL 2608
6381 22:24:23.688679 # ok 488 # SKIP Disabled ZA for VL 2608
6382 22:24:23.688824 # ok 489 # SKIP Get and set data for VL 2608
6383 22:24:23.688979 # ok 490 Set VL 2624
6384 22:24:23.689134 # ok 491 # SKIP Disabled ZA for VL 2624
6385 22:24:23.689284 # ok 492 # SKIP Get and set data for VL 2624
6386 22:24:23.689444 # ok 493 Set VL 2640
6387 22:24:23.689606 # ok 494 # SKIP Disabled ZA for VL 2640
6388 22:24:23.690583 # ok 495 # SKIP Get and set data for VL 2640
6389 22:24:23.690777 # ok 496 Set VL 2656
6390 22:24:23.690947 # ok 497 # SKIP Disabled ZA for VL 2656
6391 22:24:23.691120 # ok 498 # SKIP Get and set data for VL 2656
6392 22:24:23.691267 # ok 499 Set VL 2672
6393 22:24:23.691409 # ok 500 # SKIP Disabled ZA for VL 2672
6394 22:24:23.691549 # ok 501 # SKIP Get and set data for VL 2672
6395 22:24:23.691690 # ok 502 Set VL 2688
6396 22:24:23.691831 # ok 503 # SKIP Disabled ZA for VL 2688
6397 22:24:23.691971 # ok 504 # SKIP Get and set data for VL 2688
6398 22:24:23.692112 # ok 505 Set VL 2704
6399 22:24:23.692294 # ok 506 # SKIP Disabled ZA for VL 2704
6400 22:24:23.692428 # ok 507 # SKIP Get and set data for VL 2704
6401 22:24:23.692570 # ok 508 Set VL 2720
6402 22:24:23.692710 # ok 509 # SKIP Disabled ZA for VL 2720
6403 22:24:23.692851 # ok 510 # SKIP Get and set data for VL 2720
6404 22:24:23.692991 # ok 511 Set VL 2736
6405 22:24:23.693131 # ok 512 # SKIP Disabled ZA for VL 2736
6406 22:24:23.693274 # ok 513 # SKIP Get and set data for VL 2736
6407 22:24:23.693416 # ok 514 Set VL 2752
6408 22:24:23.693557 # ok 515 # SKIP Disabled ZA for VL 2752
6409 22:24:23.693710 # ok 516 # SKIP Get and set data for VL 2752
6410 22:24:23.693854 # ok 517 Set VL 2768
6411 22:24:23.693996 # ok 518 # SKIP Disabled ZA for VL 2768
6412 22:24:23.694138 # ok 519 # SKIP Get and set data for VL 2768
6413 22:24:23.694279 # ok 520 Set VL 2784
6414 22:24:23.694419 # ok 521 # SKIP Disabled ZA for VL 2784
6415 22:24:23.694778 # ok 522 # SKIP Get and set data for VL 2784
6416 22:24:23.694916 # ok 523 Set VL 2800
6417 22:24:23.695061 # ok 524 # SKIP Disabled ZA for VL 2800
6418 22:24:23.695204 # ok 525 # SKIP Get and set data for VL 2800
6419 22:24:23.695347 # ok 526 Set VL 2816
6420 22:24:23.695489 # ok 527 # SKIP Disabled ZA for VL 2816
6421 22:24:23.695630 # ok 528 # SKIP Get and set data for VL 2816
6422 22:24:23.700964 # ok 529 Set VL 2832
6423 22:24:23.701471 # ok 530 # SKIP Disabled ZA for VL 2832
6424 22:24:23.701629 # ok 531 # SKIP Get and set data for VL 2832
6425 22:24:23.701819 # ok 532 Set VL 2848
6426 22:24:23.701975 # ok 533 # SKIP Disabled ZA for VL 2848
6427 22:24:23.702163 # ok 534 # SKIP Get and set data for VL 2848
6428 22:24:23.702309 # ok 535 Set VL 2864
6429 22:24:23.702436 # ok 536 # SKIP Disabled ZA for VL 2864
6430 22:24:23.702547 # ok 537 # SKIP Get and set data for VL 2864
6431 22:24:23.702666 # ok 538 Set VL 2880
6432 22:24:23.702762 # ok 539 # SKIP Disabled ZA for VL 2880
6433 22:24:23.702850 # ok 540 # SKIP Get and set data for VL 2880
6434 22:24:23.702959 # ok 541 Set VL 2896
6435 22:24:23.703051 # ok 542 # SKIP Disabled ZA for VL 2896
6436 22:24:23.703140 # ok 543 # SKIP Get and set data for VL 2896
6437 22:24:23.703228 # ok 544 Set VL 2912
6438 22:24:23.703316 # ok 545 # SKIP Disabled ZA for VL 2912
6439 22:24:23.703403 # ok 546 # SKIP Get and set data for VL 2912
6440 22:24:23.709265 # ok 547 Set VL 2928
6441 22:24:23.709589 # ok 548 # SKIP Disabled ZA for VL 2928
6442 22:24:23.710013 # ok 549 # SKIP Get and set data for VL 2928
6443 22:24:23.710191 # ok 550 Set VL 2944
6444 22:24:23.710320 # ok 551 # SKIP Disabled ZA for VL 2944
6445 22:24:23.710484 # ok 552 # SKIP Get and set data for VL 2944
6446 22:24:23.710638 # ok 553 Set VL 2960
6447 22:24:23.710755 # ok 554 # SKIP Disabled ZA for VL 2960
6448 22:24:23.710846 # ok 555 # SKIP Get and set data for VL 2960
6449 22:24:23.710932 # ok 556 Set VL 2976
6450 22:24:23.711039 # ok 557 # SKIP Disabled ZA for VL 2976
6451 22:24:23.711130 # ok 558 # SKIP Get and set data for VL 2976
6452 22:24:23.711217 # ok 559 Set VL 2992
6453 22:24:23.711315 # ok 560 # SKIP Disabled ZA for VL 2992
6454 22:24:23.711400 # ok 561 # SKIP Get and set data for VL 2992
6455 22:24:23.711484 # ok 562 Set VL 3008
6456 22:24:23.711570 # ok 563 # SKIP Disabled ZA for VL 3008
6457 22:24:23.712232 # ok 564 # SKIP Get and set data for VL 3008
6458 22:24:23.712384 # ok 565 Set VL 3024
6459 22:24:23.712587 # ok 566 # SKIP Disabled ZA for VL 3024
6460 22:24:23.712726 # ok 567 # SKIP Get and set data for VL 3024
6461 22:24:23.712848 # ok 568 Set VL 3040
6462 22:24:23.712985 # ok 569 # SKIP Disabled ZA for VL 3040
6463 22:24:23.713086 # ok 570 # SKIP Get and set data for VL 3040
6464 22:24:23.713186 # ok 571 Set VL 3056
6465 22:24:23.713280 # ok 572 # SKIP Disabled ZA for VL 3056
6466 22:24:23.713395 # ok 573 # SKIP Get and set data for VL 3056
6467 22:24:23.713519 # ok 574 Set VL 3072
6468 22:24:23.713655 # ok 575 # SKIP Disabled ZA for VL 3072
6469 22:24:23.713813 # ok 576 # SKIP Get and set data for VL 3072
6470 22:24:23.713987 # ok 577 Set VL 3088
6471 22:24:23.714094 # ok 578 # SKIP Disabled ZA for VL 3088
6472 22:24:23.714204 # ok 579 # SKIP Get and set data for VL 3088
6473 22:24:23.714315 # ok 580 Set VL 3104
6474 22:24:23.714432 # ok 581 # SKIP Disabled ZA for VL 3104
6475 22:24:23.714611 # ok 582 # SKIP Get and set data for VL 3104
6476 22:24:23.714755 # ok 583 Set VL 3120
6477 22:24:23.714854 # ok 584 # SKIP Disabled ZA for VL 3120
6478 22:24:23.714941 # ok 585 # SKIP Get and set data for VL 3120
6479 22:24:23.715027 # ok 586 Set VL 3136
6480 22:24:23.715112 # ok 587 # SKIP Disabled ZA for VL 3136
6481 22:24:23.715196 # ok 588 # SKIP Get and set data for VL 3136
6482 22:24:23.715302 # ok 589 Set VL 3152
6483 22:24:23.740754 # ok 590 # SKIP Disabled ZA for VL 3152
6484 22:24:23.741344 # ok 591 # SKIP Get and set data for VL 3152
6485 22:24:23.741574 # ok 592 Set VL 3168
6486 22:24:23.741769 # ok 593 # SKIP Disabled ZA for VL 3168
6487 22:24:23.741939 # ok 594 # SKIP Get and set data for VL 3168
6488 22:24:23.742119 # ok 595 Set VL 3184
6489 22:24:23.742359 # ok 596 # SKIP Disabled ZA for VL 3184
6490 22:24:23.742538 # ok 597 # SKIP Get and set data for VL 3184
6491 22:24:23.742716 # ok 598 Set VL 3200
6492 22:24:23.742842 # ok 599 # SKIP Disabled ZA for VL 3200
6493 22:24:23.742960 # ok 600 # SKIP Get and set data for VL 3200
6494 22:24:23.743075 # ok 601 Set VL 3216
6495 22:24:23.743187 # ok 602 # SKIP Disabled ZA for VL 3216
6496 22:24:23.743300 # ok 603 # SKIP Get and set data for VL 3216
6497 22:24:23.743415 # ok 604 Set VL 3232
6498 22:24:23.743527 # ok 605 # SKIP Disabled ZA for VL 3232
6499 22:24:23.743640 # ok 606 # SKIP Get and set data for VL 3232
6500 22:24:23.743753 # ok 607 Set VL 3248
6501 22:24:23.743866 # ok 608 # SKIP Disabled ZA for VL 3248
6502 22:24:23.743979 # ok 609 # SKIP Get and set data for VL 3248
6503 22:24:23.744116 # ok 610 Set VL 3264
6504 22:24:23.753153 # ok 611 # SKIP Disabled ZA for VL 3264
6505 22:24:23.753502 # ok 612 # SKIP Get and set data for VL 3264
6506 22:24:23.753734 # ok 613 Set VL 3280
6507 22:24:23.753929 # ok 614 # SKIP Disabled ZA for VL 3280
6508 22:24:23.754121 # ok 615 # SKIP Get and set data for VL 3280
6509 22:24:23.754316 # ok 616 Set VL 3296
6510 22:24:23.754500 # ok 617 # SKIP Disabled ZA for VL 3296
6511 22:24:23.754727 # ok 618 # SKIP Get and set data for VL 3296
6512 22:24:23.754905 # ok 619 Set VL 3312
6513 22:24:23.755034 # ok 620 # SKIP Disabled ZA for VL 3312
6514 22:24:23.755153 # ok 621 # SKIP Get and set data for VL 3312
6515 22:24:23.755268 # ok 622 Set VL 3328
6516 22:24:23.755381 # ok 623 # SKIP Disabled ZA for VL 3328
6517 22:24:23.755496 # ok 624 # SKIP Get and set data for VL 3328
6518 22:24:23.755610 # ok 625 Set VL 3344
6519 22:24:23.755724 # ok 626 # SKIP Disabled ZA for VL 3344
6520 22:24:23.756545 # ok 627 # SKIP Get and set data for VL 3344
6521 22:24:23.756980 # ok 628 Set VL 3360
6522 22:24:23.757164 # ok 629 # SKIP Disabled ZA for VL 3360
6523 22:24:23.757335 # ok 630 # SKIP Get and set data for VL 3360
6524 22:24:23.757482 # ok 631 Set VL 3376
6525 22:24:23.757712 # ok 632 # SKIP Disabled ZA for VL 3376
6526 22:24:23.757873 # ok 633 # SKIP Get and set data for VL 3376
6527 22:24:23.758050 # ok 634 Set VL 3392
6528 22:24:23.758206 # ok 635 # SKIP Disabled ZA for VL 3392
6529 22:24:23.758353 # ok 636 # SKIP Get and set data for VL 3392
6530 22:24:23.758509 # ok 637 Set VL 3408
6531 22:24:23.758669 # ok 638 # SKIP Disabled ZA for VL 3408
6532 22:24:23.758835 # ok 639 # SKIP Get and set data for VL 3408
6533 22:24:23.758959 # ok 640 Set VL 3424
6534 22:24:23.759073 # ok 641 # SKIP Disabled ZA for VL 3424
6535 22:24:23.759187 # ok 642 # SKIP Get and set data for VL 3424
6536 22:24:23.759299 # ok 643 Set VL 3440
6537 22:24:23.759411 # ok 644 # SKIP Disabled ZA for VL 3440
6538 22:24:23.759524 # ok 645 # SKIP Get and set data for VL 3440
6539 22:24:23.759637 # ok 646 Set VL 3456
6540 22:24:23.759749 # ok 647 # SKIP Disabled ZA for VL 3456
6541 22:24:23.760195 # ok 648 # SKIP Get and set data for VL 3456
6542 22:24:23.760416 # ok 649 Set VL 3472
6543 22:24:23.760622 # ok 650 # SKIP Disabled ZA for VL 3472
6544 22:24:23.760845 # ok 651 # SKIP Get and set data for VL 3472
6545 22:24:23.761023 # ok 652 Set VL 3488
6546 22:24:23.761185 # ok 653 # SKIP Disabled ZA for VL 3488
6547 22:24:23.761346 # ok 654 # SKIP Get and set data for VL 3488
6548 22:24:23.761511 # ok 655 Set VL 3504
6549 22:24:23.761683 # ok 656 # SKIP Disabled ZA for VL 3504
6550 22:24:23.761872 # ok 657 # SKIP Get and set data for VL 3504
6551 22:24:23.762035 # ok 658 Set VL 3520
6552 22:24:23.762180 # ok 659 # SKIP Disabled ZA for VL 3520
6553 22:24:23.762341 # ok 660 # SKIP Get and set data for VL 3520
6554 22:24:23.762514 # ok 661 Set VL 3536
6555 22:24:23.762736 # ok 662 # SKIP Disabled ZA for VL 3536
6556 22:24:23.762879 # ok 663 # SKIP Get and set data for VL 3536
6557 22:24:23.762999 # ok 664 Set VL 3552
6558 22:24:23.763114 # ok 665 # SKIP Disabled ZA for VL 3552
6559 22:24:23.763259 # ok 666 # SKIP Get and set data for VL 3552
6560 22:24:23.763380 # ok 667 Set VL 3568
6561 22:24:23.763496 # ok 668 # SKIP Disabled ZA for VL 3568
6562 22:24:23.763610 # ok 669 # SKIP Get and set data for VL 3568
6563 22:24:23.763723 # ok 670 Set VL 3584
6564 22:24:23.763836 # ok 671 # SKIP Disabled ZA for VL 3584
6565 22:24:23.763949 # ok 672 # SKIP Get and set data for VL 3584
6566 22:24:23.764062 # ok 673 Set VL 3600
6567 22:24:23.764175 # ok 674 # SKIP Disabled ZA for VL 3600
6568 22:24:23.769378 # ok 675 # SKIP Get and set data for VL 3600
6569 22:24:23.769661 # ok 676 Set VL 3616
6570 22:24:23.769867 # ok 677 # SKIP Disabled ZA for VL 3616
6571 22:24:23.770047 # ok 678 # SKIP Get and set data for VL 3616
6572 22:24:23.770217 # ok 679 Set VL 3632
6573 22:24:23.770363 # ok 680 # SKIP Disabled ZA for VL 3632
6574 22:24:23.770518 # ok 681 # SKIP Get and set data for VL 3632
6575 22:24:23.770693 # ok 682 Set VL 3648
6576 22:24:23.770818 # ok 683 # SKIP Disabled ZA for VL 3648
6577 22:24:23.770934 # ok 684 # SKIP Get and set data for VL 3648
6578 22:24:23.771049 # ok 685 Set VL 3664
6579 22:24:23.771163 # ok 686 # SKIP Disabled ZA for VL 3664
6580 22:24:23.771277 # ok 687 # SKIP Get and set data for VL 3664
6581 22:24:23.771389 # ok 688 Set VL 3680
6582 22:24:23.771502 # ok 689 # SKIP Disabled ZA for VL 3680
6583 22:24:23.777399 # ok 690 # SKIP Get and set data for VL 3680
6584 22:24:23.777946 # ok 691 Set VL 3696
6585 22:24:23.778116 # ok 692 # SKIP Disabled ZA for VL 3696
6586 22:24:23.778264 # ok 693 # SKIP Get and set data for VL 3696
6587 22:24:23.778422 # ok 694 Set VL 3712
6588 22:24:23.778555 # ok 695 # SKIP Disabled ZA for VL 3712
6589 22:24:23.778744 # ok 696 # SKIP Get and set data for VL 3712
6590 22:24:23.778881 # ok 697 Set VL 3728
6591 22:24:23.779045 # ok 698 # SKIP Disabled ZA for VL 3728
6592 22:24:23.779173 # ok 699 # SKIP Get and set data for VL 3728
6593 22:24:23.779289 # ok 700 Set VL 3744
6594 22:24:23.779441 # ok 701 # SKIP Disabled ZA for VL 3744
6595 22:24:23.779573 # ok 702 # SKIP Get and set data for VL 3744
6596 22:24:23.779717 # ok 703 Set VL 3760
6597 22:24:23.779931 # ok 704 # SKIP Disabled ZA for VL 3760
6598 22:24:23.780112 # ok 705 # SKIP Get and set data for VL 3760
6599 22:24:23.780314 # ok 706 Set VL 3776
6600 22:24:23.780541 # ok 707 # SKIP Disabled ZA for VL 3776
6601 22:24:23.780725 # ok 708 # SKIP Get and set data for VL 3776
6602 22:24:23.780938 # ok 709 Set VL 3792
6603 22:24:23.781117 # ok 710 # SKIP Disabled ZA for VL 3792
6604 22:24:23.781329 # ok 711 # SKIP Get and set data for VL 3792
6605 22:24:23.781493 # ok 712 Set VL 3808
6606 22:24:23.781664 # ok 713 # SKIP Disabled ZA for VL 3808
6607 22:24:23.781838 # ok 714 # SKIP Get and set data for VL 3808
6608 22:24:23.782011 # ok 715 Set VL 3824
6609 22:24:23.782182 # ok 716 # SKIP Disabled ZA for VL 3824
6610 22:24:23.782354 # ok 717 # SKIP Get and set data for VL 3824
6611 22:24:23.782550 # ok 718 Set VL 3840
6612 22:24:23.782673 # ok 719 # SKIP Disabled ZA for VL 3840
6613 22:24:23.782789 # ok 720 # SKIP Get and set data for VL 3840
6614 22:24:23.782904 # ok 721 Set VL 3856
6615 22:24:23.783059 # ok 722 # SKIP Disabled ZA for VL 3856
6616 22:24:23.783201 # ok 723 # SKIP Get and set data for VL 3856
6617 22:24:23.783320 # ok 724 Set VL 3872
6618 22:24:23.783434 # ok 725 # SKIP Disabled ZA for VL 3872
6619 22:24:23.783547 # ok 726 # SKIP Get and set data for VL 3872
6620 22:24:23.783661 # ok 727 Set VL 3888
6621 22:24:23.783774 # ok 728 # SKIP Disabled ZA for VL 3888
6622 22:24:23.783887 # ok 729 # SKIP Get and set data for VL 3888
6623 22:24:23.784030 # ok 730 Set VL 3904
6624 22:24:23.793220 # ok 731 # SKIP Disabled ZA for VL 3904
6625 22:24:23.793788 # ok 732 # SKIP Get and set data for VL 3904
6626 22:24:23.793945 # ok 733 Set VL 3920
6627 22:24:23.794089 # ok 734 # SKIP Disabled ZA for VL 3920
6628 22:24:23.794243 # ok 735 # SKIP Get and set data for VL 3920
6629 22:24:23.794396 # ok 736 Set VL 3936
6630 22:24:23.794585 # ok 737 # SKIP Disabled ZA for VL 3936
6631 22:24:23.794737 # ok 738 # SKIP Get and set data for VL 3936
6632 22:24:23.794857 # ok 739 Set VL 3952
6633 22:24:23.794971 # ok 740 # SKIP Disabled ZA for VL 3952
6634 22:24:23.795084 # ok 741 # SKIP Get and set data for VL 3952
6635 22:24:23.795196 # ok 742 Set VL 3968
6636 22:24:23.795309 # ok 743 # SKIP Disabled ZA for VL 3968
6637 22:24:23.795421 # ok 744 # SKIP Get and set data for VL 3968
6638 22:24:23.795533 # ok 745 Set VL 3984
6639 22:24:23.796257 # ok 746 # SKIP Disabled ZA for VL 3984
6640 22:24:23.796630 # ok 747 # SKIP Get and set data for VL 3984
6641 22:24:23.796775 # ok 748 Set VL 4000
6642 22:24:23.796921 # ok 749 # SKIP Disabled ZA for VL 4000
6643 22:24:23.797065 # ok 750 # SKIP Get and set data for VL 4000
6644 22:24:23.797234 # ok 751 Set VL 4016
6645 22:24:23.797393 # ok 752 # SKIP Disabled ZA for VL 4016
6646 22:24:23.797556 # ok 753 # SKIP Get and set data for VL 4016
6647 22:24:23.797731 # ok 754 Set VL 4032
6648 22:24:23.797872 # ok 755 # SKIP Disabled ZA for VL 4032
6649 22:24:23.798026 # ok 756 # SKIP Get and set data for VL 4032
6650 22:24:23.798146 # ok 757 Set VL 4048
6651 22:24:23.798280 # ok 758 # SKIP Disabled ZA for VL 4048
6652 22:24:23.798394 # ok 759 # SKIP Get and set data for VL 4048
6653 22:24:23.798507 # ok 760 Set VL 4064
6654 22:24:23.798638 # ok 761 # SKIP Disabled ZA for VL 4064
6655 22:24:23.798758 # ok 762 # SKIP Get and set data for VL 4064
6656 22:24:23.798871 # ok 763 Set VL 4080
6657 22:24:23.799010 # ok 764 # SKIP Disabled ZA for VL 4080
6658 22:24:23.799127 # ok 765 # SKIP Get and set data for VL 4080
6659 22:24:23.799241 # ok 766 Set VL 4096
6660 22:24:23.799354 # ok 767 # SKIP Disabled ZA for VL 4096
6661 22:24:23.799467 # ok 768 # SKIP Get and set data for VL 4096
6662 22:24:23.799585 # ok 769 Set VL 4112
6663 22:24:23.808746 # ok 770 # SKIP Disabled ZA for VL 4112
6664 22:24:23.809283 # ok 771 # SKIP Get and set data for VL 4112
6665 22:24:23.809422 # ok 772 Set VL 4128
6666 22:24:23.809546 # ok 773 # SKIP Disabled ZA for VL 4128
6667 22:24:23.809678 # ok 774 # SKIP Get and set data for VL 4128
6668 22:24:23.809807 # ok 775 Set VL 4144
6669 22:24:23.809969 # ok 776 # SKIP Disabled ZA for VL 4144
6670 22:24:23.810092 # ok 777 # SKIP Get and set data for VL 4144
6671 22:24:23.810215 # ok 778 Set VL 4160
6672 22:24:23.810333 # ok 779 # SKIP Disabled ZA for VL 4160
6673 22:24:23.810480 # ok 780 # SKIP Get and set data for VL 4160
6674 22:24:23.810623 # ok 781 Set VL 4176
6675 22:24:23.810751 # ok 782 # SKIP Disabled ZA for VL 4176
6676 22:24:23.810893 # ok 783 # SKIP Get and set data for VL 4176
6677 22:24:23.811011 # ok 784 Set VL 4192
6678 22:24:23.811123 # ok 785 # SKIP Disabled ZA for VL 4192
6679 22:24:23.811236 # ok 786 # SKIP Get and set data for VL 4192
6680 22:24:23.811349 # ok 787 Set VL 4208
6681 22:24:23.811461 # ok 788 # SKIP Disabled ZA for VL 4208
6682 22:24:23.821033 # ok 789 # SKIP Get and set data for VL 4208
6683 22:24:23.821541 # ok 790 Set VL 4224
6684 22:24:23.821690 # ok 791 # SKIP Disabled ZA for VL 4224
6685 22:24:23.821821 # ok 792 # SKIP Get and set data for VL 4224
6686 22:24:23.821939 # ok 793 Set VL 4240
6687 22:24:23.822053 # ok 794 # SKIP Disabled ZA for VL 4240
6688 22:24:23.822214 # ok 795 # SKIP Get and set data for VL 4240
6689 22:24:23.822425 # ok 796 Set VL 4256
6690 22:24:23.822583 # ok 797 # SKIP Disabled ZA for VL 4256
6691 22:24:23.822712 # ok 798 # SKIP Get and set data for VL 4256
6692 22:24:23.822827 # ok 799 Set VL 4272
6693 22:24:23.822940 # ok 800 # SKIP Disabled ZA for VL 4272
6694 22:24:23.823053 # ok 801 # SKIP Get and set data for VL 4272
6695 22:24:23.823166 # ok 802 Set VL 4288
6696 22:24:23.823306 # ok 803 # SKIP Disabled ZA for VL 4288
6697 22:24:23.823427 # ok 804 # SKIP Get and set data for VL 4288
6698 22:24:23.823543 # ok 805 Set VL 4304
6699 22:24:23.823657 # ok 806 # SKIP Disabled ZA for VL 4304
6700 22:24:23.833503 # ok 807 # SKIP Get and set data for VL 4304
6701 22:24:23.834042 # ok 808 Set VL 4320
6702 22:24:23.834172 # ok 809 # SKIP Disabled ZA for VL 4320
6703 22:24:23.834290 # ok 810 # SKIP Get and set data for VL 4320
6704 22:24:23.834427 # ok 811 Set VL 4336
6705 22:24:23.834558 # ok 812 # SKIP Disabled ZA for VL 4336
6706 22:24:23.834730 # ok 813 # SKIP Get and set data for VL 4336
6707 22:24:23.834855 # ok 814 Set VL 4352
6708 22:24:23.834968 # ok 815 # SKIP Disabled ZA for VL 4352
6709 22:24:23.835081 # ok 816 # SKIP Get and set data for VL 4352
6710 22:24:23.835194 # ok 817 Set VL 4368
6711 22:24:23.835308 # ok 818 # SKIP Disabled ZA for VL 4368
6712 22:24:23.835422 # ok 819 # SKIP Get and set data for VL 4368
6713 22:24:23.845555 # ok 820 Set VL 4384
6714 22:24:23.846075 # ok 821 # SKIP Disabled ZA for VL 4384
6715 22:24:23.872120 # ok 822 # SKIP Get and set data for VL 4384
6716 22:24:23.872410 # ok 823 Set VL 4400
6717 22:24:23.872593 # ok 824 # SKIP Disabled ZA for VL 4400
6718 22:24:23.872742 # ok 825 # SKIP Get and set data for VL 4400
6719 22:24:23.872863 # ok 826 Set VL 4416
6720 22:24:23.872981 # ok 827 # SKIP Disabled ZA for VL 4416
6721 22:24:23.873118 # ok 828 # SKIP Get and set data for VL 4416
6722 22:24:23.873276 # ok 829 Set VL 4432
6723 22:24:23.873481 # ok 830 # SKIP Disabled ZA for VL 4432
6724 22:24:23.873718 # ok 831 # SKIP Get and set data for VL 4432
6725 22:24:23.873922 # ok 832 Set VL 4448
6726 22:24:23.874142 # ok 833 # SKIP Disabled ZA for VL 4448
6727 22:24:23.874347 # ok 834 # SKIP Get and set data for VL 4448
6728 22:24:23.874559 # ok 835 Set VL 4464
6729 22:24:23.874755 # ok 836 # SKIP Disabled ZA for VL 4464
6730 22:24:23.874919 # ok 837 # SKIP Get and set data for VL 4464
6731 22:24:23.875042 # ok 838 Set VL 4480
6732 22:24:23.875157 # ok 839 # SKIP Disabled ZA for VL 4480
6733 22:24:23.875272 # ok 840 # SKIP Get and set data for VL 4480
6734 22:24:23.875386 # ok 841 Set VL 4496
6735 22:24:23.875498 # ok 842 # SKIP Disabled ZA for VL 4496
6736 22:24:23.875613 # ok 843 # SKIP Get and set data for VL 4496
6737 22:24:23.875728 # ok 844 Set VL 4512
6738 22:24:23.875841 # ok 845 # SKIP Disabled ZA for VL 4512
6739 22:24:23.875955 # ok 846 # SKIP Get and set data for VL 4512
6740 22:24:23.876066 # ok 847 Set VL 4528
6741 22:24:23.876179 # ok 848 # SKIP Disabled ZA for VL 4528
6742 22:24:23.876296 # ok 849 # SKIP Get and set data for VL 4528
6743 22:24:23.876411 # ok 850 Set VL 4544
6744 22:24:23.880599 # ok 851 # SKIP Disabled ZA for VL 4544
6745 22:24:23.880789 # ok 852 # SKIP Get and set data for VL 4544
6746 22:24:23.880912 # ok 853 Set VL 4560
6747 22:24:23.881006 # ok 854 # SKIP Disabled ZA for VL 4560
6748 22:24:23.881117 # ok 855 # SKIP Get and set data for VL 4560
6749 22:24:23.881211 # ok 856 Set VL 4576
6750 22:24:23.881320 # ok 857 # SKIP Disabled ZA for VL 4576
6751 22:24:23.881414 # ok 858 # SKIP Get and set data for VL 4576
6752 22:24:23.881523 # ok 859 Set VL 4592
6753 22:24:23.881638 # ok 860 # SKIP Disabled ZA for VL 4592
6754 22:24:23.881740 # ok 861 # SKIP Get and set data for VL 4592
6755 22:24:23.881848 # ok 862 Set VL 4608
6756 22:24:23.881956 # ok 863 # SKIP Disabled ZA for VL 4608
6757 22:24:23.882065 # ok 864 # SKIP Get and set data for VL 4608
6758 22:24:23.882365 # ok 865 Set VL 4624
6759 22:24:23.882475 # ok 866 # SKIP Disabled ZA for VL 4624
6760 22:24:23.882569 # ok 867 # SKIP Get and set data for VL 4624
6761 22:24:23.882678 # ok 868 Set VL 4640
6762 22:24:23.882772 # ok 869 # SKIP Disabled ZA for VL 4640
6763 22:24:23.882864 # ok 870 # SKIP Get and set data for VL 4640
6764 22:24:23.882955 # ok 871 Set VL 4656
6765 22:24:23.883685 # ok 872 # SKIP Disabled ZA for VL 4656
6766 22:24:23.883991 # ok 873 # SKIP Get and set data for VL 4656
6767 22:24:23.884101 # ok 874 Set VL 4672
6768 22:24:23.884211 # ok 875 # SKIP Disabled ZA for VL 4672
6769 22:24:23.884306 # ok 876 # SKIP Get and set data for VL 4672
6770 22:24:23.884414 # ok 877 Set VL 4688
6771 22:24:23.884531 # ok 878 # SKIP Disabled ZA for VL 4688
6772 22:24:23.884626 # ok 879 # SKIP Get and set data for VL 4688
6773 22:24:23.884737 # ok 880 Set VL 4704
6774 22:24:23.884830 # ok 881 # SKIP Disabled ZA for VL 4704
6775 22:24:23.884938 # ok 882 # SKIP Get and set data for VL 4704
6776 22:24:23.885047 # ok 883 Set VL 4720
6777 22:24:23.885139 # ok 884 # SKIP Disabled ZA for VL 4720
6778 22:24:23.885247 # ok 885 # SKIP Get and set data for VL 4720
6779 22:24:23.885340 # ok 886 Set VL 4736
6780 22:24:23.885448 # ok 887 # SKIP Disabled ZA for VL 4736
6781 22:24:23.885761 # ok 888 # SKIP Get and set data for VL 4736
6782 22:24:23.885871 # ok 889 Set VL 4752
6783 22:24:23.885964 # ok 890 # SKIP Disabled ZA for VL 4752
6784 22:24:23.886072 # ok 891 # SKIP Get and set data for VL 4752
6785 22:24:23.886165 # ok 892 Set VL 4768
6786 22:24:23.886254 # ok 893 # SKIP Disabled ZA for VL 4768
6787 22:24:23.886357 # ok 894 # SKIP Get and set data for VL 4768
6788 22:24:23.886450 # ok 895 Set VL 4784
6789 22:24:23.886558 # ok 896 # SKIP Disabled ZA for VL 4784
6790 22:24:23.886649 # ok 897 # SKIP Get and set data for VL 4784
6791 22:24:23.886755 # ok 898 Set VL 4800
6792 22:24:23.886848 # ok 899 # SKIP Disabled ZA for VL 4800
6793 22:24:23.892388 # ok 900 # SKIP Get and set data for VL 4800
6794 22:24:23.892637 # ok 901 Set VL 4816
6795 22:24:23.893068 # ok 902 # SKIP Disabled ZA for VL 4816
6796 22:24:23.893275 # ok 903 # SKIP Get and set data for VL 4816
6797 22:24:23.893465 # ok 904 Set VL 4832
6798 22:24:23.893629 # ok 905 # SKIP Disabled ZA for VL 4832
6799 22:24:23.893798 # ok 906 # SKIP Get and set data for VL 4832
6800 22:24:23.893953 # ok 907 Set VL 4848
6801 22:24:23.894453 # ok 908 # SKIP Disabled ZA for VL 4848
6802 22:24:23.894690 # ok 909 # SKIP Get and set data for VL 4848
6803 22:24:23.894831 # ok 910 Set VL 4864
6804 22:24:23.894945 # ok 911 # SKIP Disabled ZA for VL 4864
6805 22:24:23.895056 # ok 912 # SKIP Get and set data for VL 4864
6806 22:24:23.895168 # ok 913 Set VL 4880
6807 22:24:23.895278 # ok 914 # SKIP Disabled ZA for VL 4880
6808 22:24:23.895389 # ok 915 # SKIP Get and set data for VL 4880
6809 22:24:23.895500 # ok 916 Set VL 4896
6810 22:24:23.895609 # ok 917 # SKIP Disabled ZA for VL 4896
6811 22:24:23.895719 # ok 918 # SKIP Get and set data for VL 4896
6812 22:24:23.895828 # ok 919 Set VL 4912
6813 22:24:23.896075 # ok 920 # SKIP Disabled ZA for VL 4912
6814 22:24:23.896278 # ok 921 # SKIP Get and set data for VL 4912
6815 22:24:23.904203 # ok 922 Set VL 4928
6816 22:24:23.904418 # ok 923 # SKIP Disabled ZA for VL 4928
6817 22:24:23.904522 # ok 924 # SKIP Get and set data for VL 4928
6818 22:24:23.904612 # ok 925 Set VL 4944
6819 22:24:23.904732 # ok 926 # SKIP Disabled ZA for VL 4944
6820 22:24:23.904850 # ok 927 # SKIP Get and set data for VL 4944
6821 22:24:23.904939 # ok 928 Set VL 4960
6822 22:24:23.905035 # ok 929 # SKIP Disabled ZA for VL 4960
6823 22:24:23.905152 # ok 930 # SKIP Get and set data for VL 4960
6824 22:24:23.905249 # ok 931 Set VL 4976
6825 22:24:23.905347 # ok 932 # SKIP Disabled ZA for VL 4976
6826 22:24:23.905510 # ok 933 # SKIP Get and set data for VL 4976
6827 22:24:23.905597 # ok 934 Set VL 4992
6828 22:24:23.905702 # ok 935 # SKIP Disabled ZA for VL 4992
6829 22:24:23.905798 # ok 936 # SKIP Get and set data for VL 4992
6830 22:24:23.905904 # ok 937 Set VL 5008
6831 22:24:23.906205 # ok 938 # SKIP Disabled ZA for VL 5008
6832 22:24:23.906307 # ok 939 # SKIP Get and set data for VL 5008
6833 22:24:23.906387 # ok 940 Set VL 5024
6834 22:24:23.906458 # ok 941 # SKIP Disabled ZA for VL 5024
6835 22:24:23.906528 # ok 942 # SKIP Get and set data for VL 5024
6836 22:24:23.906611 # ok 943 Set VL 5040
6837 22:24:23.906682 # ok 944 # SKIP Disabled ZA for VL 5040
6838 22:24:23.906742 # ok 945 # SKIP Get and set data for VL 5040
6839 22:24:23.906813 # ok 946 Set VL 5056
6840 22:24:23.920620 # ok 947 # SKIP Disabled ZA for VL 5056
6841 22:24:23.921189 # ok 948 # SKIP Get and set data for VL 5056
6842 22:24:23.921378 # ok 949 Set VL 5072
6843 22:24:23.921556 # ok 950 # SKIP Disabled ZA for VL 5072
6844 22:24:23.921727 # ok 951 # SKIP Get and set data for VL 5072
6845 22:24:23.921871 # ok 952 Set VL 5088
6846 22:24:23.922094 # ok 953 # SKIP Disabled ZA for VL 5088
6847 22:24:23.922269 # ok 954 # SKIP Get and set data for VL 5088
6848 22:24:23.922440 # ok 955 Set VL 5104
6849 22:24:23.922624 # ok 956 # SKIP Disabled ZA for VL 5104
6850 22:24:23.922777 # ok 957 # SKIP Get and set data for VL 5104
6851 22:24:23.922892 # ok 958 Set VL 5120
6852 22:24:23.923007 # ok 959 # SKIP Disabled ZA for VL 5120
6853 22:24:23.923120 # ok 960 # SKIP Get and set data for VL 5120
6854 22:24:23.923234 # ok 961 Set VL 5136
6855 22:24:23.923345 # ok 962 # SKIP Disabled ZA for VL 5136
6856 22:24:23.923486 # ok 963 # SKIP Get and set data for VL 5136
6857 22:24:23.923605 # ok 964 Set VL 5152
6858 22:24:23.923718 # ok 965 # SKIP Disabled ZA for VL 5152
6859 22:24:23.923831 # ok 966 # SKIP Get and set data for VL 5152
6860 22:24:23.923943 # ok 967 Set VL 5168
6861 22:24:23.932751 # ok 968 # SKIP Disabled ZA for VL 5168
6862 22:24:23.933255 # ok 969 # SKIP Get and set data for VL 5168
6863 22:24:23.933402 # ok 970 Set VL 5184
6864 22:24:23.933562 # ok 971 # SKIP Disabled ZA for VL 5184
6865 22:24:23.933787 # ok 972 # SKIP Get and set data for VL 5184
6866 22:24:23.934048 # ok 973 Set VL 5200
6867 22:24:23.934296 # ok 974 # SKIP Disabled ZA for VL 5200
6868 22:24:23.934474 # ok 975 # SKIP Get and set data for VL 5200
6869 22:24:23.934661 # ok 976 Set VL 5216
6870 22:24:23.934817 # ok 977 # SKIP Disabled ZA for VL 5216
6871 22:24:23.934936 # ok 978 # SKIP Get and set data for VL 5216
6872 22:24:23.935051 # ok 979 Set VL 5232
6873 22:24:23.935167 # ok 980 # SKIP Disabled ZA for VL 5232
6874 22:24:23.935277 # ok 981 # SKIP Get and set data for VL 5232
6875 22:24:23.935387 # ok 982 Set VL 5248
6876 22:24:23.935525 # ok 983 # SKIP Disabled ZA for VL 5248
6877 22:24:23.935642 # ok 984 # SKIP Get and set data for VL 5248
6878 22:24:23.935755 # ok 985 Set VL 5264
6879 22:24:23.935866 # ok 986 # SKIP Disabled ZA for VL 5264
6880 22:24:23.948830 # ok 987 # SKIP Get and set data for VL 5264
6881 22:24:23.949373 # ok 988 Set VL 5280
6882 22:24:23.949547 # ok 989 # SKIP Disabled ZA for VL 5280
6883 22:24:23.949706 # ok 990 # SKIP Get and set data for VL 5280
6884 22:24:23.949930 # ok 991 Set VL 5296
6885 22:24:23.950154 # ok 992 # SKIP Disabled ZA for VL 5296
6886 22:24:23.950343 # ok 993 # SKIP Get and set data for VL 5296
6887 22:24:23.950511 # ok 994 Set VL 5312
6888 22:24:23.950720 # ok 995 # SKIP Disabled ZA for VL 5312
6889 22:24:23.950870 # ok 996 # SKIP Get and set data for VL 5312
6890 22:24:23.950990 # ok 997 Set VL 5328
6891 22:24:23.951103 # ok 998 # SKIP Disabled ZA for VL 5328
6892 22:24:23.951217 # ok 999 # SKIP Get and set data for VL 5328
6893 22:24:23.951330 # ok 1000 Set VL 5344
6894 22:24:23.951443 # ok 1001 # SKIP Disabled ZA for VL 5344
6895 22:24:23.951585 # ok 1002 # SKIP Get and set data for VL 5344
6896 22:24:23.951704 # ok 1003 Set VL 5360
6897 22:24:23.951822 # ok 1004 # SKIP Disabled ZA for VL 5360
6898 22:24:23.964854 # ok 1005 # SKIP Get and set data for VL 5360
6899 22:24:23.965183 # ok 1006 Set VL 5376
6900 22:24:23.965600 # ok 1007 # SKIP Disabled ZA for VL 5376
6901 22:24:23.965793 # ok 1008 # SKIP Get and set data for VL 5376
6902 22:24:23.965965 # ok 1009 Set VL 5392
6903 22:24:23.966123 # ok 1010 # SKIP Disabled ZA for VL 5392
6904 22:24:23.966303 # ok 1011 # SKIP Get and set data for VL 5392
6905 22:24:23.966546 # ok 1012 Set VL 5408
6906 22:24:23.966790 # ok 1013 # SKIP Disabled ZA for VL 5408
6907 22:24:23.966929 # ok 1014 # SKIP Get and set data for VL 5408
6908 22:24:23.967046 # ok 1015 Set VL 5424
6909 22:24:23.967162 # ok 1016 # SKIP Disabled ZA for VL 5424
6910 22:24:23.967276 # ok 1017 # SKIP Get and set data for VL 5424
6911 22:24:23.967390 # ok 1018 Set VL 5440
6912 22:24:23.967501 # ok 1019 # SKIP Disabled ZA for VL 5440
6913 22:24:23.967614 # ok 1020 # SKIP Get and set data for VL 5440
6914 22:24:23.967726 # ok 1021 Set VL 5456
6915 22:24:23.967842 # ok 1022 # SKIP Disabled ZA for VL 5456
6916 22:24:23.977185 # ok 1023 # SKIP Get and set data for VL 5456
6917 22:24:23.977499 # ok 1024 Set VL 5472
6918 22:24:23.977693 # ok 1025 # SKIP Disabled ZA for VL 5472
6919 22:24:23.977877 # ok 1026 # SKIP Get and set data for VL 5472
6920 22:24:23.978033 # ok 1027 Set VL 5488
6921 22:24:23.978181 # ok 1028 # SKIP Disabled ZA for VL 5488
6922 22:24:23.978327 # ok 1029 # SKIP Get and set data for VL 5488
6923 22:24:23.978479 # ok 1030 Set VL 5504
6924 22:24:23.978630 # ok 1031 # SKIP Disabled ZA for VL 5504
6925 22:24:23.978780 # ok 1032 # SKIP Get and set data for VL 5504
6926 22:24:23.978901 # ok 1033 Set VL 5520
6927 22:24:23.979017 # ok 1034 # SKIP Disabled ZA for VL 5520
6928 22:24:23.979132 # ok 1035 # SKIP Get and set data for VL 5520
6929 22:24:23.979249 # ok 1036 Set VL 5536
6930 22:24:23.979365 # ok 1037 # SKIP Disabled ZA for VL 5536
6931 22:24:23.979481 # ok 1038 # SKIP Get and set data for VL 5536
6932 22:24:23.979597 # ok 1039 Set VL 5552
6933 22:24:23.979712 # ok 1040 # SKIP Disabled ZA for VL 5552
6934 22:24:23.993376 # ok 1041 # SKIP Get and set data for VL 5552
6935 22:24:23.993662 # ok 1042 Set VL 5568
6936 22:24:23.993905 # ok 1043 # SKIP Disabled ZA for VL 5568
6937 22:24:23.994126 # ok 1044 # SKIP Get and set data for VL 5568
6938 22:24:23.994281 # ok 1045 Set VL 5584
6939 22:24:23.994416 # ok 1046 # SKIP Disabled ZA for VL 5584
6940 22:24:23.994537 # ok 1047 # SKIP Get and set data for VL 5584
6941 22:24:23.994678 # ok 1048 Set VL 5600
6942 22:24:23.994801 # ok 1049 # SKIP Disabled ZA for VL 5600
6943 22:24:23.994919 # ok 1050 # SKIP Get and set data for VL 5600
6944 22:24:23.995036 # ok 1051 Set VL 5616
6945 22:24:23.995154 # ok 1052 # SKIP Disabled ZA for VL 5616
6946 22:24:24.024418 # ok 1053 # SKIP Get and set data for VL 5616
6947 22:24:24.025001 # ok 1054 Set VL 5632
6948 22:24:24.025199 # ok 1055 # SKIP Disabled ZA for VL 5632
6949 22:24:24.025368 # ok 1056 # SKIP Get and set data for VL 5632
6950 22:24:24.025535 # ok 1057 Set VL 5648
6951 22:24:24.025744 # ok 1058 # SKIP Disabled ZA for VL 5648
6952 22:24:24.025905 # ok 1059 # SKIP Get and set data for VL 5648
6953 22:24:24.026030 # ok 1060 Set VL 5664
6954 22:24:24.026176 # ok 1061 # SKIP Disabled ZA for VL 5664
6955 22:24:24.026324 # ok 1062 # SKIP Get and set data for VL 5664
6956 22:24:24.026454 # ok 1063 Set VL 5680
6957 22:24:24.026600 # ok 1064 # SKIP Disabled ZA for VL 5680
6958 22:24:24.026719 # ok 1065 # SKIP Get and set data for VL 5680
6959 22:24:24.044372 # ok 1066 Set VL 5696
6960 22:24:24.044824 # ok 1067 # SKIP Disabled ZA for VL 5696
6961 22:24:24.044920 # ok 1068 # SKIP Get and set data for VL 5696
6962 22:24:24.045008 # ok 1069 Set VL 5712
6963 22:24:24.045092 # ok 1070 # SKIP Disabled ZA for VL 5712
6964 22:24:24.045176 # ok 1071 # SKIP Get and set data for VL 5712
6965 22:24:24.045277 # ok 1072 Set VL 5728
6966 22:24:24.045363 # ok 1073 # SKIP Disabled ZA for VL 5728
6967 22:24:24.045448 # ok 1074 # SKIP Get and set data for VL 5728
6968 22:24:24.045533 # ok 1075 Set VL 5744
6969 22:24:24.045618 # ok 1076 # SKIP Disabled ZA for VL 5744
6970 22:24:24.045729 # ok 1077 # SKIP Get and set data for VL 5744
6971 22:24:24.045819 # ok 1078 Set VL 5760
6972 22:24:24.045905 # ok 1079 # SKIP Disabled ZA for VL 5760
6973 22:24:24.045995 # ok 1080 # SKIP Get and set data for VL 5760
6974 22:24:24.046078 # ok 1081 Set VL 5776
6975 22:24:24.046178 # ok 1082 # SKIP Disabled ZA for VL 5776
6976 22:24:24.046266 # ok 1083 # SKIP Get and set data for VL 5776
6977 22:24:24.046350 # ok 1084 Set VL 5792
6978 22:24:24.046434 # ok 1085 # SKIP Disabled ZA for VL 5792
6979 22:24:24.046535 # ok 1086 # SKIP Get and set data for VL 5792
6980 22:24:24.046620 # ok 1087 Set VL 5808
6981 22:24:24.046697 # ok 1088 # SKIP Disabled ZA for VL 5808
6982 22:24:24.046786 # ok 1089 # SKIP Get and set data for VL 5808
6983 22:24:24.061737 # ok 1090 Set VL 5824
6984 22:24:24.061977 # ok 1091 # SKIP Disabled ZA for VL 5824
6985 22:24:24.062071 # ok 1092 # SKIP Get and set data for VL 5824
6986 22:24:24.062176 # ok 1093 Set VL 5840
6987 22:24:24.062263 # ok 1094 # SKIP Disabled ZA for VL 5840
6988 22:24:24.062347 # ok 1095 # SKIP Get and set data for VL 5840
6989 22:24:24.062433 # ok 1096 Set VL 5856
6990 22:24:24.062537 # ok 1097 # SKIP Disabled ZA for VL 5856
6991 22:24:24.062627 # ok 1098 # SKIP Get and set data for VL 5856
6992 22:24:24.062714 # ok 1099 Set VL 5872
6993 22:24:24.062801 # ok 1100 # SKIP Disabled ZA for VL 5872
6994 22:24:24.062902 # ok 1101 # SKIP Get and set data for VL 5872
6995 22:24:24.068515 # ok 1102 Set VL 5888
6996 22:24:24.068985 # ok 1103 # SKIP Disabled ZA for VL 5888
6997 22:24:24.069094 # ok 1104 # SKIP Get and set data for VL 5888
6998 22:24:24.069186 # ok 1105 Set VL 5904
6999 22:24:24.069273 # ok 1106 # SKIP Disabled ZA for VL 5904
7000 22:24:24.069363 # ok 1107 # SKIP Get and set data for VL 5904
7001 22:24:24.069469 # ok 1108 Set VL 5920
7002 22:24:24.069556 # ok 1109 # SKIP Disabled ZA for VL 5920
7003 22:24:24.069640 # ok 1110 # SKIP Get and set data for VL 5920
7004 22:24:24.069732 # ok 1111 Set VL 5936
7005 22:24:24.069833 # ok 1112 # SKIP Disabled ZA for VL 5936
7006 22:24:24.069921 # ok 1113 # SKIP Get and set data for VL 5936
7007 22:24:24.070011 # ok 1114 Set VL 5952
7008 22:24:24.070096 # ok 1115 # SKIP Disabled ZA for VL 5952
7009 22:24:24.070196 # ok 1116 # SKIP Get and set data for VL 5952
7010 22:24:24.070283 # ok 1117 Set VL 5968
7011 22:24:24.070382 # ok 1118 # SKIP Disabled ZA for VL 5968
7012 22:24:24.070468 # ok 1119 # SKIP Get and set data for VL 5968
7013 22:24:24.070568 # ok 1120 Set VL 5984
7014 22:24:24.070652 # ok 1121 # SKIP Disabled ZA for VL 5984
7015 22:24:24.070752 # ok 1122 # SKIP Get and set data for VL 5984
7016 22:24:24.070838 # ok 1123 Set VL 6000
7017 22:24:24.074678 # ok 1124 # SKIP Disabled ZA for VL 6000
7018 22:24:24.074879 # ok 1125 # SKIP Get and set data for VL 6000
7019 22:24:24.074976 # ok 1126 Set VL 6016
7020 22:24:24.080667 # ok 1127 # SKIP Disabled ZA for VL 6016
7021 22:24:24.081179 # ok 1128 # SKIP Get and set data for VL 6016
7022 22:24:24.081353 # ok 1129 Set VL 6032
7023 22:24:24.081510 # ok 1130 # SKIP Disabled ZA for VL 6032
7024 22:24:24.081682 # ok 1131 # SKIP Get and set data for VL 6032
7025 22:24:24.081882 # ok 1132 Set VL 6048
7026 22:24:24.082056 # ok 1133 # SKIP Disabled ZA for VL 6048
7027 22:24:24.082291 # ok 1134 # SKIP Get and set data for VL 6048
7028 22:24:24.082475 # ok 1135 Set VL 6064
7029 22:24:24.082692 # ok 1136 # SKIP Disabled ZA for VL 6064
7030 22:24:24.082855 # ok 1137 # SKIP Get and set data for VL 6064
7031 22:24:24.082983 # ok 1138 Set VL 6080
7032 22:24:24.083099 # ok 1139 # SKIP Disabled ZA for VL 6080
7033 22:24:24.083214 # ok 1140 # SKIP Get and set data for VL 6080
7034 22:24:24.083326 # ok 1141 Set VL 6096
7035 22:24:24.083439 # ok 1142 # SKIP Disabled ZA for VL 6096
7036 22:24:24.083552 # ok 1143 # SKIP Get and set data for VL 6096
7037 22:24:24.083694 # ok 1144 Set VL 6112
7038 22:24:24.083813 # ok 1145 # SKIP Disabled ZA for VL 6112
7039 22:24:24.083956 # ok 1146 # SKIP Get and set data for VL 6112
7040 22:24:24.084118 # ok 1147 Set VL 6128
7041 22:24:24.084983 # ok 1148 # SKIP Disabled ZA for VL 6128
7042 22:24:24.085153 # ok 1149 # SKIP Get and set data for VL 6128
7043 22:24:24.085308 # ok 1150 Set VL 6144
7044 22:24:24.085505 # ok 1151 # SKIP Disabled ZA for VL 6144
7045 22:24:24.085731 # ok 1152 # SKIP Get and set data for VL 6144
7046 22:24:24.085912 # ok 1153 Set VL 6160
7047 22:24:24.086061 # ok 1154 # SKIP Disabled ZA for VL 6160
7048 22:24:24.086210 # ok 1155 # SKIP Get and set data for VL 6160
7049 22:24:24.086354 # ok 1156 Set VL 6176
7050 22:24:24.086508 # ok 1157 # SKIP Disabled ZA for VL 6176
7051 22:24:24.086662 # ok 1158 # SKIP Get and set data for VL 6176
7052 22:24:24.086846 # ok 1159 Set VL 6192
7053 22:24:24.086973 # ok 1160 # SKIP Disabled ZA for VL 6192
7054 22:24:24.087089 # ok 1161 # SKIP Get and set data for VL 6192
7055 22:24:24.087203 # ok 1162 Set VL 6208
7056 22:24:24.087316 # ok 1163 # SKIP Disabled ZA for VL 6208
7057 22:24:24.087428 # ok 1164 # SKIP Get and set data for VL 6208
7058 22:24:24.087540 # ok 1165 Set VL 6224
7059 22:24:24.087652 # ok 1166 # SKIP Disabled ZA for VL 6224
7060 22:24:24.087764 # ok 1167 # SKIP Get and set data for VL 6224
7061 22:24:24.087875 # ok 1168 Set VL 6240
7062 22:24:24.087988 # ok 1169 # SKIP Disabled ZA for VL 6240
7063 22:24:24.088117 # ok 1170 # SKIP Get and set data for VL 6240
7064 22:24:24.088230 # ok 1171 Set VL 6256
7065 22:24:24.088398 # ok 1172 # SKIP Disabled ZA for VL 6256
7066 22:24:24.088532 # ok 1173 # SKIP Get and set data for VL 6256
7067 22:24:24.089125 # ok 1174 Set VL 6272
7068 22:24:24.089471 # ok 1175 # SKIP Disabled ZA for VL 6272
7069 22:24:24.089627 # ok 1176 # SKIP Get and set data for VL 6272
7070 22:24:24.089819 # ok 1177 Set VL 6288
7071 22:24:24.089956 # ok 1178 # SKIP Disabled ZA for VL 6288
7072 22:24:24.090129 # ok 1179 # SKIP Get and set data for VL 6288
7073 22:24:24.090267 # ok 1180 Set VL 6304
7074 22:24:24.090408 # ok 1181 # SKIP Disabled ZA for VL 6304
7075 22:24:24.090550 # ok 1182 # SKIP Get and set data for VL 6304
7076 22:24:24.090727 # ok 1183 Set VL 6320
7077 22:24:24.090860 # ok 1184 # SKIP Disabled ZA for VL 6320
7078 22:24:24.091003 # ok 1185 # SKIP Get and set data for VL 6320
7079 22:24:24.091145 # ok 1186 Set VL 6336
7080 22:24:24.091287 # ok 1187 # SKIP Disabled ZA for VL 6336
7081 22:24:24.091428 # ok 1188 # SKIP Get and set data for VL 6336
7082 22:24:24.091569 # ok 1189 Set VL 6352
7083 22:24:24.091710 # ok 1190 # SKIP Disabled ZA for VL 6352
7084 22:24:24.096845 # ok 1191 # SKIP Get and set data for VL 6352
7085 22:24:24.097105 # ok 1192 Set VL 6368
7086 22:24:24.097490 # ok 1193 # SKIP Disabled ZA for VL 6368
7087 22:24:24.097630 # ok 1194 # SKIP Get and set data for VL 6368
7088 22:24:24.097835 # ok 1195 Set VL 6384
7089 22:24:24.098044 # ok 1196 # SKIP Disabled ZA for VL 6384
7090 22:24:24.098269 # ok 1197 # SKIP Get and set data for VL 6384
7091 22:24:24.098469 # ok 1198 Set VL 6400
7092 22:24:24.098654 # ok 1199 # SKIP Disabled ZA for VL 6400
7093 22:24:24.098788 # ok 1200 # SKIP Get and set data for VL 6400
7094 22:24:24.098906 # ok 1201 Set VL 6416
7095 22:24:24.099054 # ok 1202 # SKIP Disabled ZA for VL 6416
7096 22:24:24.099180 # ok 1203 # SKIP Get and set data for VL 6416
7097 22:24:24.099298 # ok 1204 Set VL 6432
7098 22:24:24.099416 # ok 1205 # SKIP Disabled ZA for VL 6432
7099 22:24:24.099531 # ok 1206 # SKIP Get and set data for VL 6432
7100 22:24:24.099646 # ok 1207 Set VL 6448
7101 22:24:24.099761 # ok 1208 # SKIP Disabled ZA for VL 6448
7102 22:24:24.099876 # ok 1209 # SKIP Get and set data for VL 6448
7103 22:24:24.099993 # ok 1210 Set VL 6464
7104 22:24:24.100111 # ok 1211 # SKIP Disabled ZA for VL 6464
7105 22:24:24.100226 # ok 1212 # SKIP Get and set data for VL 6464
7106 22:24:24.100342 # ok 1213 Set VL 6480
7107 22:24:24.100459 # ok 1214 # SKIP Disabled ZA for VL 6480
7108 22:24:24.106167 # ok 1215 # SKIP Get and set data for VL 6480
7109 22:24:24.106513 # ok 1216 Set VL 6496
7110 22:24:24.106910 # ok 1217 # SKIP Disabled ZA for VL 6496
7111 22:24:24.107075 # ok 1218 # SKIP Get and set data for VL 6496
7112 22:24:24.107250 # ok 1219 Set VL 6512
7113 22:24:24.107397 # ok 1220 # SKIP Disabled ZA for VL 6512
7114 22:24:24.108351 # ok 1221 # SKIP Get and set data for VL 6512
7115 22:24:24.108455 # ok 1222 Set VL 6528
7116 22:24:24.108541 # ok 1223 # SKIP Disabled ZA for VL 6528
7117 22:24:24.108629 # ok 1224 # SKIP Get and set data for VL 6528
7118 22:24:24.108728 # ok 1225 Set VL 6544
7119 22:24:24.108814 # ok 1226 # SKIP Disabled ZA for VL 6544
7120 22:24:24.108899 # ok 1227 # SKIP Get and set data for VL 6544
7121 22:24:24.108998 # ok 1228 Set VL 6560
7122 22:24:24.109090 # ok 1229 # SKIP Disabled ZA for VL 6560
7123 22:24:24.109186 # ok 1230 # SKIP Get and set data for VL 6560
7124 22:24:24.109273 # ok 1231 Set VL 6576
7125 22:24:24.109371 # ok 1232 # SKIP Disabled ZA for VL 6576
7126 22:24:24.109471 # ok 1233 # SKIP Get and set data for VL 6576
7127 22:24:24.109571 # ok 1234 Set VL 6592
7128 22:24:24.109870 # ok 1235 # SKIP Disabled ZA for VL 6592
7129 22:24:24.109974 # ok 1236 # SKIP Get and set data for VL 6592
7130 22:24:24.110062 # ok 1237 Set VL 6608
7131 22:24:24.110159 # ok 1238 # SKIP Disabled ZA for VL 6608
7132 22:24:24.110245 # ok 1239 # SKIP Get and set data for VL 6608
7133 22:24:24.110343 # ok 1240 Set VL 6624
7134 22:24:24.110430 # ok 1241 # SKIP Disabled ZA for VL 6624
7135 22:24:24.110529 # ok 1242 # SKIP Get and set data for VL 6624
7136 22:24:24.110613 # ok 1243 Set VL 6640
7137 22:24:24.110709 # ok 1244 # SKIP Disabled ZA for VL 6640
7138 22:24:24.116104 # ok 1245 # SKIP Get and set data for VL 6640
7139 22:24:24.116589 # ok 1246 Set VL 6656
7140 22:24:24.116687 # ok 1247 # SKIP Disabled ZA for VL 6656
7141 22:24:24.116781 # ok 1248 # SKIP Get and set data for VL 6656
7142 22:24:24.116866 # ok 1249 Set VL 6672
7143 22:24:24.116949 # ok 1250 # SKIP Disabled ZA for VL 6672
7144 22:24:24.117031 # ok 1251 # SKIP Get and set data for VL 6672
7145 22:24:24.117114 # ok 1252 Set VL 6688
7146 22:24:24.117212 # ok 1253 # SKIP Disabled ZA for VL 6688
7147 22:24:24.117299 # ok 1254 # SKIP Get and set data for VL 6688
7148 22:24:24.117385 # ok 1255 Set VL 6704
7149 22:24:24.117469 # ok 1256 # SKIP Disabled ZA for VL 6704
7150 22:24:24.117554 # ok 1257 # SKIP Get and set data for VL 6704
7151 22:24:24.117638 # ok 1258 Set VL 6720
7152 22:24:24.117746 # ok 1259 # SKIP Disabled ZA for VL 6720
7153 22:24:24.117836 # ok 1260 # SKIP Get and set data for VL 6720
7154 22:24:24.117919 # ok 1261 Set VL 6736
7155 22:24:24.118003 # ok 1262 # SKIP Disabled ZA for VL 6736
7156 22:24:24.118087 # ok 1263 # SKIP Get and set data for VL 6736
7157 22:24:24.118171 # ok 1264 Set VL 6752
7158 22:24:24.118252 # ok 1265 # SKIP Disabled ZA for VL 6752
7159 22:24:24.118354 # ok 1266 # SKIP Get and set data for VL 6752
7160 22:24:24.118440 # ok 1267 Set VL 6768
7161 22:24:24.118523 # ok 1268 # SKIP Disabled ZA for VL 6768
7162 22:24:24.118608 # ok 1269 # SKIP Get and set data for VL 6768
7163 22:24:24.118694 # ok 1270 Set VL 6784
7164 22:24:24.118797 # ok 1271 # SKIP Disabled ZA for VL 6784
7165 22:24:24.118881 # ok 1272 # SKIP Get and set data for VL 6784
7166 22:24:24.118959 # ok 1273 Set VL 6800
7167 22:24:24.119036 # ok 1274 # SKIP Disabled ZA for VL 6800
7168 22:24:24.124362 # ok 1275 # SKIP Get and set data for VL 6800
7169 22:24:24.124598 # ok 1276 Set VL 6816
7170 22:24:24.124899 # ok 1277 # SKIP Disabled ZA for VL 6816
7171 22:24:24.125582 # ok 1278 # SKIP Get and set data for VL 6816
7172 22:24:24.125779 # ok 1279 Set VL 6832
7173 22:24:24.125971 # ok 1280 # SKIP Disabled ZA for VL 6832
7174 22:24:24.126182 # ok 1281 # SKIP Get and set data for VL 6832
7175 22:24:24.126325 # ok 1282 Set VL 6848
7176 22:24:24.126468 # ok 1283 # SKIP Disabled ZA for VL 6848
7177 22:24:24.126636 # ok 1284 # SKIP Get and set data for VL 6848
7178 22:24:24.126818 # ok 1285 Set VL 6864
7179 22:24:24.126962 # ok 1286 # SKIP Disabled ZA for VL 6864
7180 22:24:24.127122 # ok 1287 # SKIP Get and set data for VL 6864
7181 22:24:24.127230 # ok 1288 Set VL 6880
7182 22:24:24.127334 # ok 1289 # SKIP Disabled ZA for VL 6880
7183 22:24:24.127439 # ok 1290 # SKIP Get and set data for VL 6880
7184 22:24:24.136197 # ok 1291 Set VL 6896
7185 22:24:24.136661 # ok 1292 # SKIP Disabled ZA for VL 6896
7186 22:24:24.136748 # ok 1293 # SKIP Get and set data for VL 6896
7187 22:24:24.136822 # ok 1294 Set VL 6912
7188 22:24:24.136900 # ok 1295 # SKIP Disabled ZA for VL 6912
7189 22:24:24.136965 # ok 1296 # SKIP Get and set data for VL 6912
7190 22:24:24.137026 # ok 1297 Set VL 6928
7191 22:24:24.137139 # ok 1298 # SKIP Disabled ZA for VL 6928
7192 22:24:24.137223 # ok 1299 # SKIP Get and set data for VL 6928
7193 22:24:24.137311 # ok 1300 Set VL 6944
7194 22:24:24.137413 # ok 1301 # SKIP Disabled ZA for VL 6944
7195 22:24:24.137495 # ok 1302 # SKIP Get and set data for VL 6944
7196 22:24:24.137570 # ok 1303 Set VL 6960
7197 22:24:24.137713 # ok 1304 # SKIP Disabled ZA for VL 6960
7198 22:24:24.137802 # ok 1305 # SKIP Get and set data for VL 6960
7199 22:24:24.137894 # ok 1306 Set VL 6976
7200 22:24:24.137975 # ok 1307 # SKIP Disabled ZA for VL 6976
7201 22:24:24.138038 # ok 1308 # SKIP Get and set data for VL 6976
7202 22:24:24.138097 # ok 1309 Set VL 6992
7203 22:24:24.138166 # ok 1310 # SKIP Disabled ZA for VL 6992
7204 22:24:24.138236 # ok 1311 # SKIP Get and set data for VL 6992
7205 22:24:24.138306 # ok 1312 Set VL 7008
7206 22:24:24.138567 # ok 1313 # SKIP Disabled ZA for VL 7008
7207 22:24:24.138650 # ok 1314 # SKIP Get and set data for VL 7008
7208 22:24:24.138724 # ok 1315 Set VL 7024
7209 22:24:24.144474 # ok 1316 # SKIP Disabled ZA for VL 7024
7210 22:24:24.144689 # ok 1317 # SKIP Get and set data for VL 7024
7211 22:24:24.144783 # ok 1318 Set VL 7040
7212 22:24:24.145243 # ok 1319 # SKIP Disabled ZA for VL 7040
7213 22:24:24.145367 # ok 1320 # SKIP Get and set data for VL 7040
7214 22:24:24.145447 # ok 1321 Set VL 7056
7215 22:24:24.145534 # ok 1322 # SKIP Disabled ZA for VL 7056
7216 22:24:24.145623 # ok 1323 # SKIP Get and set data for VL 7056
7217 22:24:24.145708 # ok 1324 Set VL 7072
7218 22:24:24.145801 # ok 1325 # SKIP Disabled ZA for VL 7072
7219 22:24:24.145894 # ok 1326 # SKIP Get and set data for VL 7072
7220 22:24:24.145969 # ok 1327 Set VL 7088
7221 22:24:24.146216 # ok 1328 # SKIP Disabled ZA for VL 7088
7222 22:24:24.146288 # ok 1329 # SKIP Get and set data for VL 7088
7223 22:24:24.146351 # ok 1330 Set VL 7104
7224 22:24:24.146417 # ok 1331 # SKIP Disabled ZA for VL 7104
7225 22:24:24.146480 # ok 1332 # SKIP Get and set data for VL 7104
7226 22:24:24.146543 # ok 1333 Set VL 7120
7227 22:24:24.146604 # ok 1334 # SKIP Disabled ZA for VL 7120
7228 22:24:24.146668 # ok 1335 # SKIP Get and set data for VL 7120
7229 22:24:24.146745 # ok 1336 Set VL 7136
7230 22:24:24.146810 # ok 1337 # SKIP Disabled ZA for VL 7136
7231 22:24:24.146871 # ok 1338 # SKIP Get and set data for VL 7136
7232 22:24:24.146931 # ok 1339 Set VL 7152
7233 22:24:24.146990 # ok 1340 # SKIP Disabled ZA for VL 7152
7234 22:24:24.147050 # ok 1341 # SKIP Get and set data for VL 7152
7235 22:24:24.147112 # ok 1342 Set VL 7168
7236 22:24:24.151976 # ok 1343 # SKIP Disabled ZA for VL 7168
7237 22:24:24.152418 # ok 1344 # SKIP Get and set data for VL 7168
7238 22:24:24.152514 # ok 1345 Set VL 7184
7239 22:24:24.152600 # ok 1346 # SKIP Disabled ZA for VL 7184
7240 22:24:24.152701 # ok 1347 # SKIP Get and set data for VL 7184
7241 22:24:24.152788 # ok 1348 Set VL 7200
7242 22:24:24.152874 # ok 1349 # SKIP Disabled ZA for VL 7200
7243 22:24:24.152959 # ok 1350 # SKIP Get and set data for VL 7200
7244 22:24:24.153060 # ok 1351 Set VL 7216
7245 22:24:24.153149 # ok 1352 # SKIP Disabled ZA for VL 7216
7246 22:24:24.153238 # ok 1353 # SKIP Get and set data for VL 7216
7247 22:24:24.153321 # ok 1354 Set VL 7232
7248 22:24:24.153422 # ok 1355 # SKIP Disabled ZA for VL 7232
7249 22:24:24.153508 # ok 1356 # SKIP Get and set data for VL 7232
7250 22:24:24.153593 # ok 1357 Set VL 7248
7251 22:24:24.153701 # ok 1358 # SKIP Disabled ZA for VL 7248
7252 22:24:24.153787 # ok 1359 # SKIP Get and set data for VL 7248
7253 22:24:24.153872 # ok 1360 Set VL 7264
7254 22:24:24.153971 # ok 1361 # SKIP Disabled ZA for VL 7264
7255 22:24:24.154058 # ok 1362 # SKIP Get and set data for VL 7264
7256 22:24:24.154159 # ok 1363 Set VL 7280
7257 22:24:24.154246 # ok 1364 # SKIP Disabled ZA for VL 7280
7258 22:24:24.154345 # ok 1365 # SKIP Get and set data for VL 7280
7259 22:24:24.154445 # ok 1366 Set VL 7296
7260 22:24:24.154546 # ok 1367 # SKIP Disabled ZA for VL 7296
7261 22:24:24.154631 # ok 1368 # SKIP Get and set data for VL 7296
7262 22:24:24.154727 # ok 1369 Set VL 7312
7263 22:24:24.157481 # ok 1370 # SKIP Disabled ZA for VL 7312
7264 22:24:24.157630 # ok 1371 # SKIP Get and set data for VL 7312
7265 22:24:24.157936 # ok 1372 Set VL 7328
7266 22:24:24.158058 # ok 1373 # SKIP Disabled ZA for VL 7328
7267 22:24:24.158152 # ok 1374 # SKIP Get and set data for VL 7328
7268 22:24:24.158226 # ok 1375 Set VL 7344
7269 22:24:24.158287 # ok 1376 # SKIP Disabled ZA for VL 7344
7270 22:24:24.161793 # ok 1377 # SKIP Get and set data for VL 7344
7271 22:24:24.162000 # ok 1378 Set VL 7360
7272 22:24:24.162094 # ok 1379 # SKIP Disabled ZA for VL 7360
7273 22:24:24.162183 # ok 1380 # SKIP Get and set data for VL 7360
7274 22:24:24.162270 # ok 1381 Set VL 7376
7275 22:24:24.162357 # ok 1382 # SKIP Disabled ZA for VL 7376
7276 22:24:24.162443 # ok 1383 # SKIP Get and set data for VL 7376
7277 22:24:24.162529 # ok 1384 Set VL 7392
7278 22:24:24.165054 # ok 1385 # SKIP Disabled ZA for VL 7392
7279 22:24:24.165354 # ok 1386 # SKIP Get and set data for VL 7392
7280 22:24:24.165452 # ok 1387 Set VL 7408
7281 22:24:24.165524 # ok 1388 # SKIP Disabled ZA for VL 7408
7282 22:24:24.165634 # ok 1389 # SKIP Get and set data for VL 7408
7283 22:24:24.165734 # ok 1390 Set VL 7424
7284 22:24:24.165848 # ok 1391 # SKIP Disabled ZA for VL 7424
7285 22:24:24.165920 # ok 1392 # SKIP Get and set data for VL 7424
7286 22:24:24.165983 # ok 1393 Set VL 7440
7287 22:24:24.166055 # ok 1394 # SKIP Disabled ZA for VL 7440
7288 22:24:24.166117 # ok 1395 # SKIP Get and set data for VL 7440
7289 22:24:24.166177 # ok 1396 Set VL 7456
7290 22:24:24.166256 # ok 1397 # SKIP Disabled ZA for VL 7456
7291 22:24:24.166319 # ok 1398 # SKIP Get and set data for VL 7456
7292 22:24:24.166390 # ok 1399 Set VL 7472
7293 22:24:24.166453 # ok 1400 # SKIP Disabled ZA for VL 7472
7294 22:24:24.166526 # ok 1401 # SKIP Get and set data for VL 7472
7295 22:24:24.166600 # ok 1402 Set VL 7488
7296 22:24:24.172267 # ok 1403 # SKIP Disabled ZA for VL 7488
7297 22:24:24.172726 # ok 1404 # SKIP Get and set data for VL 7488
7298 22:24:24.172832 # ok 1405 Set VL 7504
7299 22:24:24.172922 # ok 1406 # SKIP Disabled ZA for VL 7504
7300 22:24:24.173009 # ok 1407 # SKIP Get and set data for VL 7504
7301 22:24:24.173096 # ok 1408 Set VL 7520
7302 22:24:24.173188 # ok 1409 # SKIP Disabled ZA for VL 7520
7303 22:24:24.173275 # ok 1410 # SKIP Get and set data for VL 7520
7304 22:24:24.173378 # ok 1411 Set VL 7536
7305 22:24:24.173466 # ok 1412 # SKIP Disabled ZA for VL 7536
7306 22:24:24.173553 # ok 1413 # SKIP Get and set data for VL 7536
7307 22:24:24.173639 # ok 1414 Set VL 7552
7308 22:24:24.173736 # ok 1415 # SKIP Disabled ZA for VL 7552
7309 22:24:24.173838 # ok 1416 # SKIP Get and set data for VL 7552
7310 22:24:24.173924 # ok 1417 Set VL 7568
7311 22:24:24.174006 # ok 1418 # SKIP Disabled ZA for VL 7568
7312 22:24:24.174091 # ok 1419 # SKIP Get and set data for VL 7568
7313 22:24:24.174177 # ok 1420 Set VL 7584
7314 22:24:24.174276 # ok 1421 # SKIP Disabled ZA for VL 7584
7315 22:24:24.174362 # ok 1422 # SKIP Get and set data for VL 7584
7316 22:24:24.174447 # ok 1423 Set VL 7600
7317 22:24:24.174531 # ok 1424 # SKIP Disabled ZA for VL 7600
7318 22:24:24.174631 # ok 1425 # SKIP Get and set data for VL 7600
7319 22:24:24.174718 # ok 1426 Set VL 7616
7320 22:24:24.174799 # ok 1427 # SKIP Disabled ZA for VL 7616
7321 22:24:24.174885 # ok 1428 # SKIP Get and set data for VL 7616
7322 22:24:24.174973 # ok 1429 Set VL 7632
7323 22:24:24.176726 # ok 1430 # SKIP Disabled ZA for VL 7632
7324 22:24:24.177053 # ok 1431 # SKIP Get and set data for VL 7632
7325 22:24:24.177155 # ok 1432 Set VL 7648
7326 22:24:24.177247 # ok 1433 # SKIP Disabled ZA for VL 7648
7327 22:24:24.177352 # ok 1434 # SKIP Get and set data for VL 7648
7328 22:24:24.177442 # ok 1435 Set VL 7664
7329 22:24:24.177530 # ok 1436 # SKIP Disabled ZA for VL 7664
7330 22:24:24.177634 # ok 1437 # SKIP Get and set data for VL 7664
7331 22:24:24.177736 # ok 1438 Set VL 7680
7332 22:24:24.177822 # ok 1439 # SKIP Disabled ZA for VL 7680
7333 22:24:24.177921 # ok 1440 # SKIP Get and set data for VL 7680
7334 22:24:24.178008 # ok 1441 Set VL 7696
7335 22:24:24.178092 # ok 1442 # SKIP Disabled ZA for VL 7696
7336 22:24:24.178177 # ok 1443 # SKIP Get and set data for VL 7696
7337 22:24:24.178278 # ok 1444 Set VL 7712
7338 22:24:24.178365 # ok 1445 # SKIP Disabled ZA for VL 7712
7339 22:24:24.178450 # ok 1446 # SKIP Get and set data for VL 7712
7340 22:24:24.178551 # ok 1447 Set VL 7728
7341 22:24:24.178638 # ok 1448 # SKIP Disabled ZA for VL 7728
7342 22:24:24.178723 # ok 1449 # SKIP Get and set data for VL 7728
7343 22:24:24.178807 # ok 1450 Set VL 7744
7344 22:24:24.178891 # ok 1451 # SKIP Disabled ZA for VL 7744
7345 22:24:24.178974 # ok 1452 # SKIP Get and set data for VL 7744
7346 22:24:24.179075 # ok 1453 Set VL 7760
7347 22:24:24.179562 # ok 1454 # SKIP Disabled ZA for VL 7760
7348 22:24:24.179655 # ok 1455 # SKIP Get and set data for VL 7760
7349 22:24:24.179920 # ok 1456 Set VL 7776
7350 22:24:24.180008 # ok 1457 # SKIP Disabled ZA for VL 7776
7351 22:24:24.180104 # ok 1458 # SKIP Get and set data for VL 7776
7352 22:24:24.180202 # ok 1459 Set VL 7792
7353 22:24:24.180309 # ok 1460 # SKIP Disabled ZA for VL 7792
7354 22:24:24.180383 # ok 1461 # SKIP Get and set data for VL 7792
7355 22:24:24.180458 # ok 1462 Set VL 7808
7356 22:24:24.180531 # ok 1463 # SKIP Disabled ZA for VL 7808
7357 22:24:24.180622 # ok 1464 # SKIP Get and set data for VL 7808
7358 22:24:24.180693 # ok 1465 Set VL 7824
7359 22:24:24.180767 # ok 1466 # SKIP Disabled ZA for VL 7824
7360 22:24:24.180841 # ok 1467 # SKIP Get and set data for VL 7824
7361 22:24:24.180914 # ok 1468 Set VL 7840
7362 22:24:24.181004 # ok 1469 # SKIP Disabled ZA for VL 7840
7363 22:24:24.181074 # ok 1470 # SKIP Get and set data for VL 7840
7364 22:24:24.181147 # ok 1471 Set VL 7856
7365 22:24:24.181220 # ok 1472 # SKIP Disabled ZA for VL 7856
7366 22:24:24.181293 # ok 1473 # SKIP Get and set data for VL 7856
7367 22:24:24.181366 # ok 1474 Set VL 7872
7368 22:24:24.181457 # ok 1475 # SKIP Disabled ZA for VL 7872
7369 22:24:24.181527 # ok 1476 # SKIP Get and set data for VL 7872
7370 22:24:24.181601 # ok 1477 Set VL 7888
7371 22:24:24.181696 # ok 1478 # SKIP Disabled ZA for VL 7888
7372 22:24:24.181791 # ok 1479 # SKIP Get and set data for VL 7888
7373 22:24:24.181873 # ok 1480 Set VL 7904
7374 22:24:24.181970 # ok 1481 # SKIP Disabled ZA for VL 7904
7375 22:24:24.182054 # ok 1482 # SKIP Get and set data for VL 7904
7376 22:24:24.182135 # ok 1483 Set VL 7920
7377 22:24:24.182218 # ok 1484 # SKIP Disabled ZA for VL 7920
7378 22:24:24.182297 # ok 1485 # SKIP Get and set data for VL 7920
7379 22:24:24.182376 # ok 1486 Set VL 7936
7380 22:24:24.182471 # ok 1487 # SKIP Disabled ZA for VL 7936
7381 22:24:24.182569 # ok 1488 # SKIP Get and set data for VL 7936
7382 22:24:24.182651 # ok 1489 Set VL 7952
7383 22:24:24.182723 # ok 1490 # SKIP Disabled ZA for VL 7952
7384 22:24:24.182800 # ok 1491 # SKIP Get and set data for VL 7952
7385 22:24:24.182884 # ok 1492 Set VL 7968
7386 22:24:24.182983 # ok 1493 # SKIP Disabled ZA for VL 7968
7387 22:24:24.183067 # ok 1494 # SKIP Get and set data for VL 7968
7388 22:24:24.187632 # ok 1495 Set VL 7984
7389 22:24:24.188086 # ok 1496 # SKIP Disabled ZA for VL 7984
7390 22:24:24.188189 # ok 1497 # SKIP Get and set data for VL 7984
7391 22:24:24.188277 # ok 1498 Set VL 8000
7392 22:24:24.188362 # ok 1499 # SKIP Disabled ZA for VL 8000
7393 22:24:24.188447 # ok 1500 # SKIP Get and set data for VL 8000
7394 22:24:24.188547 # ok 1501 Set VL 8016
7395 22:24:24.188634 # ok 1502 # SKIP Disabled ZA for VL 8016
7396 22:24:24.189254 # ok 1503 # SKIP Get and set data for VL 8016
7397 22:24:24.189550 # ok 1504 Set VL 8032
7398 22:24:24.189665 # ok 1505 # SKIP Disabled ZA for VL 8032
7399 22:24:24.189753 # ok 1506 # SKIP Get and set data for VL 8032
7400 22:24:24.189838 # ok 1507 Set VL 8048
7401 22:24:24.189937 # ok 1508 # SKIP Disabled ZA for VL 8048
7402 22:24:24.190024 # ok 1509 # SKIP Get and set data for VL 8048
7403 22:24:24.190108 # ok 1510 Set VL 8064
7404 22:24:24.190207 # ok 1511 # SKIP Disabled ZA for VL 8064
7405 22:24:24.190296 # ok 1512 # SKIP Get and set data for VL 8064
7406 22:24:24.190380 # ok 1513 Set VL 8080
7407 22:24:24.190477 # ok 1514 # SKIP Disabled ZA for VL 8080
7408 22:24:24.190562 # ok 1515 # SKIP Get and set data for VL 8080
7409 22:24:24.190645 # ok 1516 Set VL 8096
7410 22:24:24.190743 # ok 1517 # SKIP Disabled ZA for VL 8096
7411 22:24:24.190828 # ok 1518 # SKIP Get and set data for VL 8096
7412 22:24:24.190912 # ok 1519 Set VL 8112
7413 22:24:24.200870 # ok 1520 # SKIP Disabled ZA for VL 8112
7414 22:24:24.201326 # ok 1521 # SKIP Get and set data for VL 8112
7415 22:24:24.201424 # ok 1522 Set VL 8128
7416 22:24:24.201519 # ok 1523 # SKIP Disabled ZA for VL 8128
7417 22:24:24.201596 # ok 1524 # SKIP Get and set data for VL 8128
7418 22:24:24.201684 # ok 1525 Set VL 8144
7419 22:24:24.201759 # ok 1526 # SKIP Disabled ZA for VL 8144
7420 22:24:24.201854 # ok 1527 # SKIP Get and set data for VL 8144
7421 22:24:24.201925 # ok 1528 Set VL 8160
7422 22:24:24.201999 # ok 1529 # SKIP Disabled ZA for VL 8160
7423 22:24:24.202073 # ok 1530 # SKIP Get and set data for VL 8160
7424 22:24:24.202146 # ok 1531 Set VL 8176
7425 22:24:24.202236 # ok 1532 # SKIP Disabled ZA for VL 8176
7426 22:24:24.202306 # ok 1533 # SKIP Get and set data for VL 8176
7427 22:24:24.202380 # ok 1534 Set VL 8192
7428 22:24:24.202470 # ok 1535 # SKIP Disabled ZA for VL 8192
7429 22:24:24.202540 # ok 1536 # SKIP Get and set data for VL 8192
7430 22:24:24.202652 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7431 22:24:24.209773 ok 34 selftests: arm64: za-ptrace
7432 22:24:24.209988 # selftests: arm64: check_buffer_fill
7433 22:24:24.748587 # 1..20
7434 22:24:24.748906 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7435 22:24:24.749339 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7436 22:24:24.749449 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7437 22:24:24.749544 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7438 22:24:24.749631 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7439 22:24:24.749843 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7440 22:24:24.749942 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7441 22:24:24.750050 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7442 22:24:24.750159 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7443 22:24:24.750253 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7444 22:24:24.750551 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7445 22:24:24.750657 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7446 22:24:24.762417 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7447 22:24:24.762874 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7448 22:24:24.778199 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7449 22:24:24.778648 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7450 22:24:24.778753 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7451 22:24:24.785504 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7452 22:24:24.785972 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7453 22:24:24.786080 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7454 22:24:24.786170 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7455 22:24:24.791935 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7456 22:24:24.946738 # selftests: arm64: check_child_memory
7457 22:24:25.536535 # 1..12
7458 22:24:25.537145 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7459 22:24:25.537336 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7460 22:24:25.537513 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7461 22:24:25.537678 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7462 22:24:25.537925 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7463 22:24:25.538121 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7464 22:24:25.538296 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7465 22:24:25.538496 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7466 22:24:25.538673 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7467 22:24:25.538838 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7468 22:24:25.542242 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7469 22:24:25.542756 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7470 22:24:25.542914 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7471 22:24:25.574132 not ok 36 selftests: arm64: check_child_memory # exit=1
7472 22:24:25.741947 # selftests: arm64: check_gcr_el1_cswitch
7473 22:25:11.058224 <47>[ 100.407467] systemd-journald[105]: Sent WATCHDOG=1 notification.
7474 22:25:12.149053 <47>[ 101.499400] systemd-journald[105]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3328 of 4437 items, 2555904 file size, 768 bytes per hash table item), suggesting rotation.
7475 22:25:12.149551 <47>[ 101.500075] systemd-journald[105]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
7476 22:25:12.149725 <47>[ 101.500466] systemd-journald[105]: Rotating...
7477 22:25:12.224695 <47>[ 101.575351] systemd-journald[105]: Reserving 333 entries in field hash table.
7478 22:25:12.284504 <47>[ 101.635385] systemd-journald[105]: Reserving 4437 entries in data hash table.
7479 22:25:12.301342 <47>[ 101.652236] systemd-journald[105]: Vacuuming...
7480 22:25:12.322324 <47>[ 101.673088] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
7481 22:25:12.951945 # 1..1
7482 22:25:12.952188 # 1..1
7483 22:25:12.952270 # 1..1
7484 22:25:12.952348 # 1..1
7485 22:25:12.952423 # 1..1
7486 22:25:12.952757 # 1..1
7487 22:25:12.952984 # 1..1
7488 22:25:12.953180 # 1..1
7489 22:25:12.953408 # 1..1
7490 22:25:12.953628 # 1..1
7491 22:25:12.953836 # 1..1
7492 22:25:12.954026 # 1..1
7493 22:25:12.954234 # 1..1
7494 22:25:12.954420 # 1..1
7495 22:25:12.954606 # 1..1
7496 22:25:12.954796 # 1..1
7497 22:25:12.954981 # 1..1
7498 22:25:12.955167 # 1..1
7499 22:25:12.955354 # 1..1
7500 22:25:12.955539 # 1..1
7501 22:25:12.955728 # 1..1
7502 22:25:12.955913 # 1..1
7503 22:25:12.956097 # 1..1
7504 22:25:12.956282 # 1..1
7505 22:25:12.956466 # 1..1
7506 22:25:12.956650 # 1..1
7507 22:25:12.956840 # 1..1
7508 22:25:12.957026 # 1..1
7509 22:25:12.957212 # 1..1
7510 22:25:12.957395 # 1..1
7511 22:25:12.957577 # 1..1
7512 22:25:12.957784 # 1..1
7513 22:25:12.957954 # 1..1
7514 22:25:12.958198 # 1..1
7515 22:25:12.958384 # 1..1
7516 22:25:12.958520 # 1..1
7517 22:25:12.958639 # 1..1
7518 22:25:12.958756 # 1..1
7519 22:25:12.958909 # 1..1
7520 22:25:12.959039 # 1..1
7521 22:25:12.959156 # 1..1
7522 22:25:12.959271 # 1..1
7523 22:25:12.959385 # 1..1
7524 22:25:12.959499 # 1..1
7525 22:25:12.959611 # 1..1
7526 22:25:12.959726 # 1..1
7527 22:25:12.959839 # 1..1
7528 22:25:12.959954 # 1..1
7529 22:25:12.960068 # 1..1
7530 22:25:12.960186 # 1..1
7531 22:25:12.960301 # 1..1
7532 22:25:12.960415 # 1..1
7533 22:25:12.960528 # 1..1
7534 22:25:12.960641 # 1..1
7535 22:25:12.960756 # 1..1
7536 22:25:12.960869 # 1..1
7537 22:25:12.960982 # 1..1
7538 22:25:12.961094 # 1..1
7539 22:25:12.961210 # 1..1
7540 22:25:12.961322 # 1..1
7541 22:25:12.961435 # 1..1
7542 22:25:12.961548 # 1..1
7543 22:25:12.961674 # 1..1
7544 22:25:12.961792 # 1..1
7545 22:25:12.961906 # 1..1
7546 22:25:12.962020 # 1..1
7547 22:25:12.962194 # 1..1
7548 22:25:12.962362 # 1..1
7549 22:25:12.962519 # 1..1
7550 22:25:12.962640 # 1..1
7551 22:25:12.962757 # 1..1
7552 22:25:12.962916 # 1..1
7553 22:25:12.963040 # 1..1
7554 22:25:12.963155 # 1..1
7555 22:25:12.963281 # 1..1
7556 22:25:12.963446 # 1..1
7557 22:25:12.963565 # 1..1
7558 22:25:12.963680 # 1..1
7559 22:25:12.963798 # 1..1
7560 22:25:12.963913 # 1..1
7561 22:25:12.964026 # 1..1
7562 22:25:12.964142 # 1..1
7563 22:25:12.964258 # 1..1
7564 22:25:12.984386 # 1..1
7565 22:25:12.984631 # 1..1
7566 22:25:12.984723 # 1..1
7567 22:25:12.984803 # 1..1
7568 22:25:12.984876 # 1..1
7569 22:25:12.984954 # 1..1
7570 22:25:12.985264 # 1..1
7571 22:25:12.985365 # 1..1
7572 22:25:12.985449 # 1..1
7573 22:25:12.985535 # 1..1
7574 22:25:12.985621 # 1..1
7575 22:25:12.985717 # 1..1
7576 22:25:12.985812 # 1..1
7577 22:25:12.985891 # 1..1
7578 22:25:12.985953 # 1..1
7579 22:25:12.986012 # 1..1
7580 22:25:12.986071 # 1..1
7581 22:25:12.986130 # 1..1
7582 22:25:12.986189 # 1..1
7583 22:25:12.986249 # 1..1
7584 22:25:12.986309 # 1..1
7585 22:25:12.986368 # 1..1
7586 22:25:12.986428 # 1..1
7587 22:25:12.986487 # 1..1
7588 22:25:12.986547 # 1..1
7589 22:25:12.986606 # 1..1
7590 22:25:12.986665 # 1..1
7591 22:25:12.986724 # 1..1
7592 22:25:12.986783 # 1..1
7593 22:25:12.986842 # 1..1
7594 22:25:12.986900 # 1..1
7595 22:25:12.986959 # 1..1
7596 22:25:12.987018 # 1..1
7597 22:25:12.987077 # 1..1
7598 22:25:12.987137 # 1..1
7599 22:25:12.987195 # 1..1
7600 22:25:12.987255 # 1..1
7601 22:25:12.987318 # 1..1
7602 22:25:12.987401 # 1..1
7603 22:25:12.987464 # 1..1
7604 22:25:12.987524 # 1..1
7605 22:25:12.987583 # 1..1
7606 22:25:12.987642 # 1..1
7607 22:25:12.987702 # 1..1
7608 22:25:12.987763 # 1..1
7609 22:25:12.987821 # 1..1
7610 22:25:12.987888 # 1..1
7611 22:25:12.987989 # 1..1
7612 22:25:12.988088 # 1..1
7613 22:25:12.988170 # 1..1
7614 22:25:12.988270 # 1..1
7615 22:25:12.988360 # 1..1
7616 22:25:12.988449 # 1..1
7617 22:25:12.988540 # 1..1
7618 22:25:12.988632 # 1..1
7619 22:25:12.988724 # 1..1
7620 22:25:12.988819 # 1..1
7621 22:25:12.988917 # 1..1
7622 22:25:12.989009 # 1..1
7623 22:25:12.989085 # 1..1
7624 22:25:12.989147 # 1..1
7625 22:25:12.989207 # 1..1
7626 22:25:12.989266 # 1..1
7627 22:25:13.023710 # 1..1
7628 22:25:13.023902 # 1..1
7629 22:25:13.023962 # 1..1
7630 22:25:13.024023 # 1..1
7631 22:25:13.024085 # 1..1
7632 22:25:13.024179 # 1..1
7633 22:25:13.024496 # 1..1
7634 22:25:13.024601 # 1..1
7635 22:25:13.024686 # 1..1
7636 22:25:13.024769 # 1..1
7637 22:25:13.024915 # 1..1
7638 22:25:13.025075 # 1..1
7639 22:25:13.025234 # 1..1
7640 22:25:13.025391 # 1..1
7641 22:25:13.025547 # 1..1
7642 22:25:13.025717 # 1..1
7643 22:25:13.025883 # 1..1
7644 22:25:13.026055 # 1..1
7645 22:25:13.026224 # 1..1
7646 22:25:13.026377 # 1..1
7647 22:25:13.026497 # 1..1
7648 22:25:13.026613 # 1..1
7649 22:25:13.026727 # 1..1
7650 22:25:13.026838 # 1..1
7651 22:25:13.026949 # 1..1
7652 22:25:13.027061 # 1..1
7653 22:25:13.027213 # 1..1
7654 22:25:13.027332 # 1..1
7655 22:25:13.027446 # 1..1
7656 22:25:13.027557 # 1..1
7657 22:25:13.027669 # 1..1
7658 22:25:13.027781 # 1..1
7659 22:25:13.027896 # 1..1
7660 22:25:13.028006 # 1..1
7661 22:25:13.028118 # 1..1
7662 22:25:13.028229 # 1..1
7663 22:25:13.028340 # 1..1
7664 22:25:13.028451 # 1..1
7665 22:25:13.028561 # 1..1
7666 22:25:13.028672 # 1..1
7667 22:25:13.028781 # 1..1
7668 22:25:13.028892 # 1..1
7669 22:25:13.029002 # 1..1
7670 22:25:13.029113 # 1..1
7671 22:25:13.029223 # 1..1
7672 22:25:13.029334 # 1..1
7673 22:25:13.029445 # 1..1
7674 22:25:13.029556 # 1..1
7675 22:25:13.029680 # 1..1
7676 22:25:13.029796 # 1..1
7677 22:25:13.029910 # 1..1
7678 22:25:13.030024 # 1..1
7679 22:25:13.030139 # 1..1
7680 22:25:13.030253 # 1..1
7681 22:25:13.030365 # 1..1
7682 22:25:13.030476 # 1..1
7683 22:25:13.030587 # 1..1
7684 22:25:13.030698 # 1..1
7685 22:25:13.030809 # 1..1
7686 22:25:13.030919 # 1..1
7687 22:25:13.031030 # 1..1
7688 22:25:13.031140 # 1..1
7689 22:25:13.031251 # 1..1
7690 22:25:13.031362 # 1..1
7691 22:25:13.031473 # 1..1
7692 22:25:13.031583 # 1..1
7693 22:25:13.031694 # 1..1
7694 22:25:13.031804 # 1..1
7695 22:25:13.031915 # 1..1
7696 22:25:13.032025 # 1..1
7697 22:25:13.032135 # 1..1
7698 22:25:13.032246 # 1..1
7699 22:25:13.032356 # 1..1
7700 22:25:13.032467 # 1..1
7701 22:25:13.032577 # 1..1
7702 22:25:13.032687 # 1..1
7703 22:25:13.032799 # 1..1
7704 22:25:13.032910 # 1..1
7705 22:25:13.033021 # 1..1
7706 22:25:13.033132 # 1..1
7707 22:25:13.033242 # 1..1
7708 22:25:13.033354 # 1..1
7709 22:25:13.033465 # 1..1
7710 22:25:13.033576 # 1..1
7711 22:25:13.033701 # 1..1
7712 22:25:13.033815 # 1..1
7713 22:25:13.033925 # 1..1
7714 22:25:13.034035 # 1..1
7715 22:25:13.034145 # 1..1
7716 22:25:13.034256 # 1..1
7717 22:25:13.034368 # 1..1
7718 22:25:13.034479 # 1..1
7719 22:25:13.034591 # 1..1
7720 22:25:13.034701 # 1..1
7721 22:25:13.064834 # 1..1
7722 22:25:13.065077 # 1..1
7723 22:25:13.065167 # 1..1
7724 22:25:13.065250 # 1..1
7725 22:25:13.065580 # 1..1
7726 22:25:13.065787 # 1..1
7727 22:25:13.065966 # 1..1
7728 22:25:13.066094 # 1..1
7729 22:25:13.066211 # 1..1
7730 22:25:13.066327 # 1..1
7731 22:25:13.066442 # 1..1
7732 22:25:13.066557 # 1..1
7733 22:25:13.066673 # 1..1
7734 22:25:13.066789 # 1..1
7735 22:25:13.066904 # 1..1
7736 22:25:13.067020 # 1..1
7737 22:25:13.067134 # 1..1
7738 22:25:13.067248 # 1..1
7739 22:25:13.067362 # 1..1
7740 22:25:13.067476 # 1..1
7741 22:25:13.067590 # 1..1
7742 22:25:13.067704 # 1..1
7743 22:25:13.067818 # 1..1
7744 22:25:13.067932 # 1..1
7745 22:25:13.068045 # 1..1
7746 22:25:13.068160 # 1..1
7747 22:25:13.068276 # 1..1
7748 22:25:13.068391 # 1..1
7749 22:25:13.068506 # 1..1
7750 22:25:13.068621 # 1..1
7751 22:25:13.068771 # 1..1
7752 22:25:13.068896 # 1..1
7753 22:25:13.069015 # 1..1
7754 22:25:13.069131 # 1..1
7755 22:25:13.069248 # 1..1
7756 22:25:13.069363 # 1..1
7757 22:25:13.069478 # 1..1
7758 22:25:13.069593 # 1..1
7759 22:25:13.069725 # 1..1
7760 22:25:13.069841 # 1..1
7761 22:25:13.069958 # 1..1
7762 22:25:13.070070 # 1..1
7763 22:25:13.070181 # 1..1
7764 22:25:13.070293 # 1..1
7765 22:25:13.070404 # 1..1
7766 22:25:13.070516 # 1..1
7767 22:25:13.070627 # 1..1
7768 22:25:13.091993 # 1..1
7769 22:25:13.092324 # 1..1
7770 22:25:13.092502 # 1..1
7771 22:25:13.092956 # 1..1
7772 22:25:13.093143 # 1..1
7773 22:25:13.093307 # 1..1
7774 22:25:13.093470 # 1..1
7775 22:25:13.093624 # 1..1
7776 22:25:13.093804 # 1..1
7777 22:25:13.093993 # 1..1
7778 22:25:13.094127 # 1..1
7779 22:25:13.094243 # 1..1
7780 22:25:13.094356 # 1..1
7781 22:25:13.094469 # 1..1
7782 22:25:13.094582 # 1..1
7783 22:25:13.094693 # 1..1
7784 22:25:13.094805 # 1..1
7785 22:25:13.094917 # 1..1
7786 22:25:13.095032 # 1..1
7787 22:25:13.095144 # 1..1
7788 22:25:13.095258 # 1..1
7789 22:25:13.095370 # 1..1
7790 22:25:13.095482 # 1..1
7791 22:25:13.095595 # 1..1
7792 22:25:13.095709 # 1..1
7793 22:25:13.095821 # 1..1
7794 22:25:13.095934 # 1..1
7795 22:25:13.096050 # 1..1
7796 22:25:13.096162 # 1..1
7797 22:25:13.096275 # 1..1
7798 22:25:13.096389 # 1..1
7799 22:25:13.096501 # 1..1
7800 22:25:13.096613 # 1..1
7801 22:25:13.096726 # 1..1
7802 22:25:13.096838 # 1..1
7803 22:25:13.096950 # 1..1
7804 22:25:13.097064 # 1..1
7805 22:25:13.097176 # 1..1
7806 22:25:13.097289 # 1..1
7807 22:25:13.097402 # 1..1
7808 22:25:13.097515 # 1..1
7809 22:25:13.097627 # 1..1
7810 22:25:13.097919 # 1..1
7811 22:25:13.098116 # 1..1
7812 22:25:13.098299 # 1..1
7813 22:25:13.098481 # 1..1
7814 22:25:13.098661 # 1..1
7815 22:25:13.098841 # 1..1
7816 22:25:13.099023 # 1..1
7817 22:25:13.099210 # 1..1
7818 22:25:13.099352 # 1..1
7819 22:25:13.099493 # 1..1
7820 22:25:13.099634 # 1..1
7821 22:25:13.099776 # 1..1
7822 22:25:13.099917 # 1..1
7823 22:25:13.100058 # 1..1
7824 22:25:13.100199 # 1..1
7825 22:25:13.100338 # 1..1
7826 22:25:13.100478 # 1..1
7827 22:25:13.100618 # 1..1
7828 22:25:13.100758 # 1..1
7829 22:25:13.100896 # 1..1
7830 22:25:13.101036 # 1..1
7831 22:25:13.101174 # 1..1
7832 22:25:13.101313 # 1..1
7833 22:25:13.101454 # 1..1
7834 22:25:13.101592 # 1..1
7835 22:25:13.101743 # 1..1
7836 22:25:13.101884 # 1..1
7837 22:25:13.102025 # 1..1
7838 22:25:13.102164 # 1..1
7839 22:25:13.102304 # 1..1
7840 22:25:13.102444 # 1..1
7841 22:25:13.102584 # 1..1
7842 22:25:13.102724 # 1..1
7843 22:25:13.102865 # 1..1
7844 22:25:13.103005 # 1..1
7845 22:25:13.103144 # 1..1
7846 22:25:13.103283 # 1..1
7847 22:25:13.103421 # 1..1
7848 22:25:13.128750 #
7849 22:25:13.129260 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
7850 22:25:13.653973 # selftests: arm64: check_ksm_options
7851 22:25:14.244353 # 1..4
7852 22:25:14.244600 # # Invalid MTE synchronous exception caught!
7853 22:25:14.315818 not ok 38 selftests: arm64: check_ksm_options # exit=1
7854 22:25:14.988221 # selftests: arm64: check_mmap_options
7855 22:25:16.295259 # 1..22
7856 22:25:16.295517 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
7857 22:25:16.295822 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
7858 22:25:16.295940 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
7859 22:25:16.296045 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
7860 22:25:16.296142 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
7861 22:25:16.296436 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7862 22:25:16.296707 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
7863 22:25:16.296805 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7864 22:25:16.297058 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
7865 22:25:16.297158 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7866 22:25:16.297459 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
7867 22:25:16.297574 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7868 22:25:16.297909 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
7869 22:25:16.298076 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7870 22:25:16.363318 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
7871 22:25:16.363572 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7872 22:25:16.363666 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
7873 22:25:16.363945 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7874 22:25:16.364058 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
7875 22:25:16.364333 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7876 22:25:16.364649 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
7877 22:25:16.364747 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
7878 22:25:16.365030 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
7879 22:25:16.383707 not ok 39 selftests: arm64: check_mmap_options # exit=1
7880 22:25:16.763420 # selftests: arm64: check_prctl
7881 22:25:17.119521 # TAP version 13
7882 22:25:17.119771 # 1..5
7883 22:25:17.120068 # ok 1 check_basic_read
7884 22:25:17.120162 # ok 2 NONE
7885 22:25:17.120246 # ok 3 SYNC
7886 22:25:17.120324 # ok 4 ASYNC
7887 22:25:17.120402 # ok 5 SYNC+ASYNC
7888 22:25:17.120485 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
7889 22:25:17.171815 ok 40 selftests: arm64: check_prctl
7890 22:25:17.320743 # selftests: arm64: check_tags_inclusion
7891 22:25:17.475996 # 1..4
7892 22:25:17.476458 # # Unexpected fault recorded for 0x400ffff9f4bd000-0x400ffff9f4bd050 in mode 1
7893 22:25:17.476565 # not ok 1 Check an included tag value with sync mode
7894 22:25:17.476662 # # Unexpected fault recorded for 0xd00ffff9f4bd000-0xd00ffff9f4bd050 in mode 1
7895 22:25:17.476782 # not ok 2 Check different included tags value with sync mode
7896 22:25:17.476875 # ok 3 Check none included tags value with sync mode
7897 22:25:17.476994 # # Unexpected fault recorded for 0xa00ffff9f4bd000-0xa00ffff9f4bd050 in mode 1
7898 22:25:17.477095 # not ok 4 Check all included tags value with sync mode
7899 22:25:17.477196 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
7900 22:25:17.497602 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
7901 22:25:17.652167 # selftests: arm64: check_user_mem
7902 22:25:26.195788 # 1..64
7903 22:25:26.196529 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7904 22:25:26.196744 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7905 22:25:26.196926 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7906 22:25:26.197359 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7907 22:25:26.197566 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7908 22:25:26.197760 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7909 22:25:26.197933 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7910 22:25:26.198140 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7911 22:25:26.198310 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7912 22:25:26.198473 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7913 22:25:26.207104 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7914 22:25:26.207353 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7915 22:25:26.207669 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7916 22:25:26.207762 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7917 22:25:26.207853 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7918 22:25:26.208162 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7919 22:25:26.208255 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7920 22:25:26.208554 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7921 22:25:26.208656 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7922 22:25:26.209232 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7923 22:25:26.209340 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7924 22:25:26.209419 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7925 22:25:26.209901 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7926 22:25:26.210012 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7927 22:25:26.210103 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7928 22:25:26.215772 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7929 22:25:26.216253 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7930 22:25:26.216463 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7931 22:25:26.216678 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7932 22:25:26.216851 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7933 22:25:26.217053 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7934 22:25:26.217223 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7935 22:25:26.217416 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7936 22:25:26.217588 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7937 22:25:26.217810 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7938 22:25:26.217988 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7939 22:25:26.218190 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7940 22:25:26.223868 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7941 22:25:26.224211 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7942 22:25:26.224661 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7943 22:25:26.224866 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7944 22:25:26.225040 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7945 22:25:26.225207 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7946 22:25:26.225407 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7947 22:25:26.225580 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7948 22:25:26.225761 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7949 22:25:26.225961 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7950 22:25:26.226128 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7951 22:25:26.226290 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7952 22:25:26.231592 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7953 22:25:26.232030 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7954 22:25:28.496768 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7955 22:25:28.497988 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7956 22:25:28.498150 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7957 22:25:28.498272 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7958 22:25:28.498383 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7959 22:25:28.498489 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7960 22:25:28.498618 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7961 22:25:28.498729 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7962 22:25:28.504829 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7963 22:25:28.505310 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7964 22:25:28.505419 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7965 22:25:28.505529 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7966 22:25:28.505824 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7967 22:25:28.505931 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
7968 22:25:28.585054 ok 42 selftests: arm64: check_user_mem
7969 22:25:29.005474 # selftests: arm64: btitest
7970 22:25:29.442039 # TAP version 13
7971 22:25:29.442290 # 1..18
7972 22:25:29.442378 # # HWCAP_PACA present
7973 22:25:29.442456 # # HWCAP2_BTI present
7974 22:25:29.442533 # # Test binary built for BTI
7975 22:25:29.442610 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
7976 22:25:29.447840 # ok 1 nohint_func/call_using_br_x0
7977 22:25:29.448308 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
7978 22:25:29.448620 # ok 2 nohint_func/call_using_br_x16
7979 22:25:29.448719 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
7980 22:25:29.448802 # ok 3 nohint_func/call_using_blr
7981 22:25:29.448902 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
7982 22:25:29.448982 # ok 4 bti_none_func/call_using_br_x0
7983 22:25:29.449058 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
7984 22:25:29.449143 # ok 5 bti_none_func/call_using_br_x16
7985 22:25:29.449560 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
7986 22:25:29.449685 # ok 6 bti_none_func/call_using_blr
7987 22:25:29.449788 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
7988 22:25:29.449880 # ok 7 bti_c_func/call_using_br_x0
7989 22:25:29.449969 # ok 8 bti_c_func/call_using_br_x16
7990 22:25:29.450056 # ok 9 bti_c_func/call_using_blr
7991 22:25:29.450138 # ok 10 bti_j_func/call_using_br_x0
7992 22:25:29.450224 # ok 11 bti_j_func/call_using_br_x16
7993 22:25:29.450537 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
7994 22:25:29.450644 # ok 12 bti_j_func/call_using_blr
7995 22:25:29.450732 # ok 13 bti_jc_func/call_using_br_x0
7996 22:25:29.450820 # ok 14 bti_jc_func/call_using_br_x16
7997 22:25:29.473531 # ok 15 bti_jc_func/call_using_blr
7998 22:25:29.473801 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
7999 22:25:29.474115 # ok 16 paciasp_func/call_using_br_x0
8000 22:25:29.474324 # ok 17 paciasp_func/call_using_br_x16
8001 22:25:29.474508 # ok 18 paciasp_func/call_using_blr
8002 22:25:29.474675 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8003 22:25:29.528478 ok 43 selftests: arm64: btitest
8004 22:25:29.897903 # selftests: arm64: nobtitest
8005 22:25:30.136244 # TAP version 13
8006 22:25:30.136696 # 1..18
8007 22:25:30.136791 # # HWCAP_PACA present
8008 22:25:30.136869 # # HWCAP2_BTI present
8009 22:25:30.136941 # # Test binary not built for BTI
8010 22:25:30.137016 # ok 1 nohint_func/call_using_br_x0
8011 22:25:30.137099 # ok 2 nohint_func/call_using_br_x16
8012 22:25:30.137389 # ok 3 nohint_func/call_using_blr
8013 22:25:30.137493 # ok 4 bti_none_func/call_using_br_x0
8014 22:25:30.137577 # ok 5 bti_none_func/call_using_br_x16
8015 22:25:30.137662 # ok 6 bti_none_func/call_using_blr
8016 22:25:30.137744 # ok 7 bti_c_func/call_using_br_x0
8017 22:25:30.137820 # ok 8 bti_c_func/call_using_br_x16
8018 22:25:30.138123 # ok 9 bti_c_func/call_using_blr
8019 22:25:30.138219 # ok 10 bti_j_func/call_using_br_x0
8020 22:25:30.138285 # ok 11 bti_j_func/call_using_br_x16
8021 22:25:30.138348 # ok 12 bti_j_func/call_using_blr
8022 22:25:30.138410 # ok 13 bti_jc_func/call_using_br_x0
8023 22:25:30.138471 # ok 14 bti_jc_func/call_using_br_x16
8024 22:25:30.138531 # ok 15 bti_jc_func/call_using_blr
8025 22:25:30.138604 # ok 16 paciasp_func/call_using_br_x0
8026 22:25:30.165509 # ok 17 paciasp_func/call_using_br_x16
8027 22:25:30.165722 # ok 18 paciasp_func/call_using_blr
8028 22:25:30.165828 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8029 22:25:30.220841 ok 44 selftests: arm64: nobtitest
8030 22:25:30.744623 # selftests: arm64: hwcap
8031 22:25:31.190182 # TAP version 13
8032 22:25:31.190435 # 1..28
8033 22:25:31.190532 # # RNG present
8034 22:25:31.190619 # ok 1 cpuinfo_match_RNG
8035 22:25:31.190702 # ok 2 sigill_RNG
8036 22:25:31.190775 # # SME present
8037 22:25:31.190843 # ok 3 cpuinfo_match_SME
8038 22:25:31.190911 # ok 4 sigill_SME
8039 22:25:31.190980 # # SVE present
8040 22:25:31.191048 # ok 5 cpuinfo_match_SVE
8041 22:25:31.191121 # ok 6 sigill_SVE
8042 22:25:31.196466 # # SVE 2 present
8043 22:25:31.196725 # ok 7 cpuinfo_match_SVE 2
8044 22:25:31.196823 # ok 8 sigill_SVE 2
8045 22:25:31.196910 # # SVE AES present
8046 22:25:31.197258 # ok 9 cpuinfo_match_SVE AES
8047 22:25:31.197427 # ok 10 sigill_SVE AES
8048 22:25:31.197587 # # SVE2 PMULL present
8049 22:25:31.197739 # ok 11 cpuinfo_match_SVE2 PMULL
8050 22:25:31.197864 # ok 12 sigill_SVE2 PMULL
8051 22:25:31.197978 # # SVE2 BITPERM present
8052 22:25:31.198070 # ok 13 cpuinfo_match_SVE2 BITPERM
8053 22:25:31.198159 # ok 14 sigill_SVE2 BITPERM
8054 22:25:31.198272 # # SVE2 SHA3 present
8055 22:25:31.198364 # ok 15 cpuinfo_match_SVE2 SHA3
8056 22:25:31.198453 # ok 16 sigill_SVE2 SHA3
8057 22:25:31.198540 # # SVE2 SM4 present
8058 22:25:31.198627 # ok 17 cpuinfo_match_SVE2 SM4
8059 22:25:31.198714 # ok 18 sigill_SVE2 SM4
8060 22:25:31.198801 # # SVE2 I8MM present
8061 22:25:31.198887 # ok 19 cpuinfo_match_SVE2 I8MM
8062 22:25:31.201718 # ok 20 sigill_SVE2 I8MM
8063 22:25:31.201930 # # SVE2 F32MM present
8064 22:25:31.202221 # ok 21 cpuinfo_match_SVE2 F32MM
8065 22:25:31.202306 # ok 22 sigill_SVE2 F32MM
8066 22:25:31.202372 # # SVE2 F64MM present
8067 22:25:31.213255 # ok 23 cpuinfo_match_SVE2 F64MM
8068 22:25:31.213864 # ok 24 sigill_SVE2 F64MM
8069 22:25:31.214024 # # SVE2 BF16 present
8070 22:25:31.214197 # ok 25 cpuinfo_match_SVE2 BF16
8071 22:25:31.214376 # ok 26 sigill_SVE2 BF16
8072 22:25:31.214545 # ok 27 cpuinfo_match_SVE2 EBF16
8073 22:25:31.214706 # ok 28 # SKIP sigill_SVE2 EBF16
8074 22:25:31.214867 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8075 22:25:31.285995 ok 45 selftests: arm64: hwcap
8076 22:25:31.870085 # selftests: arm64: ptrace
8077 22:25:32.312748 # TAP version 13
8078 22:25:32.313005 # 1..7
8079 22:25:32.313319 # # Parent is 3469, child is 3470
8080 22:25:32.313416 # ok 1 read_tpidr_one
8081 22:25:32.313505 # ok 2 write_tpidr_one
8082 22:25:32.313590 # ok 3 verify_tpidr_one
8083 22:25:32.313681 # ok 4 count_tpidrs
8084 22:25:32.313762 # ok 5 tpidr2_write
8085 22:25:32.313841 # ok 6 tpidr2_read
8086 22:25:32.313917 # ok 7 write_tpidr_only
8087 22:25:32.313991 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8088 22:25:32.459985 ok 46 selftests: arm64: ptrace
8089 22:25:32.782082 # selftests: arm64: syscall-abi
8090 22:25:36.435070 # TAP version 13
8091 22:25:36.435422 # 1..514
8092 22:25:36.435876 # # SME with FA64
8093 22:25:36.436077 # ok 1 getpid() FPSIMD
8094 22:25:36.436222 # ok 2 getpid() SVE VL 256
8095 22:25:36.436354 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8096 22:25:36.436485 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8097 22:25:36.436604 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8098 22:25:36.436721 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8099 22:25:36.436837 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8100 22:25:36.436955 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8101 22:25:36.437104 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8102 22:25:36.437231 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8103 22:25:36.437349 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8104 22:25:36.437465 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8105 22:25:36.437580 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8106 22:25:36.437715 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8107 22:25:36.437829 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8108 22:25:36.437940 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8109 22:25:36.438057 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8110 22:25:36.438171 # ok 18 getpid() SVE VL 240
8111 22:25:36.438261 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8112 22:25:36.438350 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8113 22:25:36.438437 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8114 22:25:36.438514 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8115 22:25:36.438600 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8116 22:25:36.438690 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8117 22:25:36.438788 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8118 22:25:36.438852 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8119 22:25:36.438911 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8120 22:25:36.438969 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8121 22:25:36.439026 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8122 22:25:36.439083 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8123 22:25:36.439143 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8124 22:25:36.439202 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8125 22:25:36.439259 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8126 22:25:36.439316 # ok 34 getpid() SVE VL 224
8127 22:25:36.439373 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8128 22:25:36.439460 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8129 22:25:36.443376 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8130 22:25:36.443590 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8131 22:25:36.443894 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8132 22:25:36.443995 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8133 22:25:36.444076 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8134 22:25:36.444153 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8135 22:25:36.444235 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8136 22:25:36.444349 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8137 22:25:36.444456 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8138 22:25:36.444573 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8139 22:25:36.444674 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8140 22:25:36.444980 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8141 22:25:36.445096 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8142 22:25:36.445184 # ok 50 getpid() SVE VL 208
8143 22:25:36.445302 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8144 22:25:36.445415 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8145 22:25:36.445697 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8146 22:25:36.445813 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8147 22:25:36.445917 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8148 22:25:36.446019 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8149 22:25:36.454804 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8150 22:25:36.455033 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8151 22:25:36.455336 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8152 22:25:36.455422 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8153 22:25:36.455509 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8154 22:25:36.455592 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8155 22:25:36.455696 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8156 22:25:36.455829 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8157 22:25:36.455937 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8158 22:25:36.456043 # ok 66 getpid() SVE VL 192
8159 22:25:36.456150 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8160 22:25:36.456254 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8161 22:25:36.456368 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8162 22:25:36.456467 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8163 22:25:36.456576 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8164 22:25:36.456667 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8165 22:25:36.456771 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8166 22:25:36.456859 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8167 22:25:36.456940 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8168 22:25:36.457023 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8169 22:25:36.457122 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8170 22:25:36.457207 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8171 22:25:36.457305 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8172 22:25:36.457391 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8173 22:25:36.457512 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8174 22:25:36.457606 # ok 82 getpid() SVE VL 176
8175 22:25:36.457718 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8176 22:25:36.457822 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8177 22:25:36.457922 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8178 22:25:36.458840 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8179 22:25:36.459156 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8180 22:25:36.459265 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8181 22:25:36.459366 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8182 22:25:36.459452 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8183 22:25:36.459551 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8184 22:25:36.459837 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8185 22:25:36.459948 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8186 22:25:36.460050 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8187 22:25:36.460136 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8188 22:25:36.460220 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8189 22:25:36.460321 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8190 22:25:36.460404 # ok 98 getpid() SVE VL 160
8191 22:25:39.332666 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8192 22:25:39.332909 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8193 22:25:39.332997 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8194 22:25:39.333066 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8195 22:25:39.333151 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8196 22:25:39.333242 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8197 22:25:39.333312 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8198 22:25:39.333377 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8199 22:25:39.333440 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8200 22:25:39.333500 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8201 22:25:39.333605 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8202 22:25:39.333707 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8203 22:25:39.333791 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8204 22:25:39.333894 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8205 22:25:39.333981 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8206 22:25:39.334060 # ok 114 getpid() SVE VL 144
8207 22:25:39.334167 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8208 22:25:39.334256 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8209 22:25:39.335225 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8210 22:25:39.335608 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8211 22:25:39.335751 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8212 22:25:39.335881 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8213 22:25:39.336082 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8214 22:25:39.336257 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8215 22:25:39.336427 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8216 22:25:39.336594 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8217 22:25:39.336764 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8218 22:25:39.336932 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8219 22:25:39.337138 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8220 22:25:39.337316 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8221 22:25:39.337483 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8222 22:25:39.337606 # ok 130 getpid() SVE VL 128
8223 22:25:39.337806 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8224 22:25:39.338010 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8225 22:25:39.338184 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8226 22:25:39.338326 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8227 22:25:39.338469 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8228 22:25:39.338610 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8229 22:25:39.338795 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8230 22:25:39.338932 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8231 22:25:39.339073 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8232 22:25:39.339216 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8233 22:25:39.339358 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8234 22:25:39.339500 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8235 22:25:39.339642 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8236 22:25:39.339782 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8237 22:25:39.343636 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8238 22:25:39.343877 # ok 146 getpid() SVE VL 112
8239 22:25:39.344374 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8240 22:25:39.344596 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8241 22:25:39.344807 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8242 22:25:39.345003 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8243 22:25:39.345206 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8244 22:25:39.345388 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8245 22:25:39.345993 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8246 22:25:39.346163 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8247 22:25:39.346295 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8248 22:25:39.346413 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8249 22:25:39.346532 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8250 22:25:39.346650 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8251 22:25:39.346765 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8252 22:25:39.346882 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8253 22:25:39.346998 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8254 22:25:39.347114 # ok 162 getpid() SVE VL 96
8255 22:25:39.347231 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8256 22:25:39.347347 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8257 22:25:39.347464 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8258 22:25:39.347581 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8259 22:25:39.350936 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8260 22:25:39.351066 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8261 22:25:39.351368 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8262 22:25:39.351479 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8263 22:25:39.351568 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8264 22:25:39.351669 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8265 22:25:39.351756 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8266 22:25:39.351853 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8267 22:25:39.351959 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8268 22:25:39.352251 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8269 22:25:39.352370 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8270 22:25:39.352461 # ok 178 getpid() SVE VL 80
8271 22:25:39.352756 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8272 22:25:39.352861 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8273 22:25:39.352948 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8274 22:25:39.353048 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8275 22:25:39.353138 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8276 22:25:39.353239 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8277 22:25:39.353323 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8278 22:25:39.353423 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8279 22:25:39.353709 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8280 22:25:39.353815 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8281 22:25:39.353914 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8282 22:25:39.354008 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8283 22:25:39.358855 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8284 22:25:39.359031 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8285 22:25:39.359320 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8286 22:25:39.359416 # ok 194 getpid() SVE VL 64
8287 22:25:39.359494 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8288 22:25:42.008282 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8289 22:25:42.008697 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8290 22:25:42.008806 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8291 22:25:42.008896 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8292 22:25:42.008985 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8293 22:25:42.009278 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8294 22:25:42.009370 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8295 22:25:42.009443 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8296 22:25:42.009514 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8297 22:25:42.009583 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8298 22:25:42.009856 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8299 22:25:42.009947 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8300 22:25:42.010020 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8301 22:25:42.010089 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8302 22:25:42.010173 # ok 210 getpid() SVE VL 48
8303 22:25:42.018647 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8304 22:25:42.019082 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8305 22:25:42.019162 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8306 22:25:42.019243 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8307 22:25:42.019334 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8308 22:25:42.019443 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8309 22:25:42.019548 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8310 22:25:42.019668 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8311 22:25:42.019755 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8312 22:25:42.019855 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8313 22:25:42.019953 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8314 22:25:42.020054 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8315 22:25:42.020156 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8316 22:25:42.020274 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8317 22:25:42.020583 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8318 22:25:42.020685 # ok 226 getpid() SVE VL 32
8319 22:25:42.020771 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8320 22:25:42.020885 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8321 22:25:42.021000 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8322 22:25:42.021117 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8323 22:25:42.021221 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8324 22:25:42.021340 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8325 22:25:42.021466 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8326 22:25:42.021593 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8327 22:25:42.021718 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8328 22:25:42.021819 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8329 22:25:42.021918 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8330 22:25:42.027176 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8331 22:25:42.027634 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8332 22:25:42.027747 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8333 22:25:42.027843 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8334 22:25:42.027933 # ok 242 getpid() SVE VL 16
8335 22:25:42.028041 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8336 22:25:42.028135 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8337 22:25:42.028224 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8338 22:25:42.028703 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8339 22:25:42.028814 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8340 22:25:42.028924 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8341 22:25:42.029032 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8342 22:25:42.029137 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8343 22:25:42.029241 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8344 22:25:42.029346 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8345 22:25:42.029453 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8346 22:25:42.029565 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8347 22:25:42.029685 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8348 22:25:42.029798 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8349 22:25:42.029909 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8350 22:25:42.038733 # ok 258 sched_yield() FPSIMD
8351 22:25:42.039184 # ok 259 sched_yield() SVE VL 256
8352 22:25:42.039287 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8353 22:25:42.039376 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8354 22:25:42.039463 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8355 22:25:42.039569 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8356 22:25:42.039658 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8357 22:25:42.039744 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8358 22:25:42.039852 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8359 22:25:42.039958 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8360 22:25:42.040063 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8361 22:25:42.040168 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8362 22:25:42.040276 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8363 22:25:42.040383 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8364 22:25:42.040488 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8365 22:25:42.040611 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8366 22:25:42.040725 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8367 22:25:42.041017 # ok 275 sched_yield() SVE VL 240
8368 22:25:42.041125 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8369 22:25:42.041215 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8370 22:25:42.041317 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8371 22:25:42.041422 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8372 22:25:42.041544 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8373 22:25:42.041850 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8374 22:25:42.041948 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8375 22:25:42.042872 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8376 22:25:42.043183 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8377 22:25:42.043288 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8378 22:25:42.043388 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8379 22:25:42.043491 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8380 22:25:42.043591 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8381 22:25:42.043693 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8382 22:25:44.589721 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8383 22:25:44.590261 # ok 291 sched_yield() SVE VL 224
8384 22:25:44.590364 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8385 22:25:44.593971 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8386 22:25:44.594213 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8387 22:25:44.594294 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8388 22:25:44.594370 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8389 22:25:44.595291 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8390 22:25:44.595399 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8391 22:25:44.595768 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8392 22:25:44.595958 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8393 22:25:44.596152 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8394 22:25:44.596700 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8395 22:25:44.596912 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8396 22:25:44.597093 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8397 22:25:44.597268 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8398 22:25:44.597441 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8399 22:25:44.597615 # ok 307 sched_yield() SVE VL 208
8400 22:25:44.597794 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8401 22:25:44.598168 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8402 22:25:44.598266 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8403 22:25:44.598343 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8404 22:25:44.598417 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8405 22:25:44.598491 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8406 22:25:44.598563 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8407 22:25:44.598635 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8408 22:25:44.598707 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8409 22:25:44.598779 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8410 22:25:44.598850 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8411 22:25:44.603739 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8412 22:25:44.604382 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8413 22:25:44.604595 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8414 22:25:44.604780 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8415 22:25:44.604990 # ok 323 sched_yield() SVE VL 192
8416 22:25:44.605186 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8417 22:25:44.605405 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8418 22:25:44.605579 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8419 22:25:44.605729 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8420 22:25:44.605852 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8421 22:25:44.605965 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8422 22:25:44.606079 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8423 22:25:44.606220 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8424 22:25:44.606339 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8425 22:25:44.607162 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8426 22:25:44.607383 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8427 22:25:44.607565 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8428 22:25:44.607740 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8429 22:25:44.608202 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8430 22:25:44.608409 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8431 22:25:44.608586 # ok 339 sched_yield() SVE VL 176
8432 22:25:44.608755 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8433 22:25:44.608915 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8434 22:25:44.609073 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8435 22:25:44.609265 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8436 22:25:44.609436 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8437 22:25:44.609669 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8438 22:25:44.609867 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8439 22:25:44.610083 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8440 22:25:44.610272 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8441 22:25:44.610432 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8442 22:25:44.610589 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8443 22:25:44.610749 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8444 22:25:44.610908 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8445 22:25:44.611080 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8446 22:25:44.611248 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8447 22:25:44.611371 # ok 355 sched_yield() SVE VL 160
8448 22:25:44.611488 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8449 22:25:44.615305 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8450 22:25:44.615869 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8451 22:25:44.616026 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8452 22:25:44.616118 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8453 22:25:44.616213 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8454 22:25:44.616294 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8455 22:25:44.616551 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8456 22:25:44.616649 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8457 22:25:44.616734 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8458 22:25:44.616812 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8459 22:25:44.617081 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8460 22:25:44.617173 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8461 22:25:44.617255 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8462 22:25:44.617340 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8463 22:25:44.617697 # ok 371 sched_yield() SVE VL 144
8464 22:25:44.617853 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8465 22:25:44.617940 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8466 22:25:44.618032 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8467 22:25:44.618110 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8468 22:25:44.618188 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8469 22:25:47.278876 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8470 22:25:47.279124 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8471 22:25:47.281826 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8472 22:25:47.282038 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8473 22:25:47.282125 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8474 22:25:47.282204 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8475 22:25:47.282281 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8476 22:25:47.282356 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8477 22:25:47.282430 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8478 22:25:47.282505 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8479 22:25:47.282581 # ok 387 sched_yield() SVE VL 128
8480 22:25:47.282653 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8481 22:25:47.282725 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8482 22:25:47.282802 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8483 22:25:47.282882 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8484 22:25:47.282961 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8485 22:25:47.283042 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8486 22:25:47.283121 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8487 22:25:47.283200 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8488 22:25:47.283279 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8489 22:25:47.283358 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8490 22:25:47.283476 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8491 22:25:47.283562 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8492 22:25:47.287140 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8493 22:25:47.287384 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8494 22:25:47.287699 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8495 22:25:47.287808 # ok 403 sched_yield() SVE VL 112
8496 22:25:47.287898 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8497 22:25:47.288002 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8498 22:25:47.288092 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8499 22:25:47.288180 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8500 22:25:47.288489 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8501 22:25:47.288594 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8502 22:25:47.288682 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8503 22:25:47.288783 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8504 22:25:47.288884 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8505 22:25:47.288974 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8506 22:25:47.289075 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8507 22:25:47.289176 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8508 22:25:47.289482 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8509 22:25:47.289598 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8510 22:25:47.289700 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8511 22:25:47.289799 # ok 419 sched_yield() SVE VL 96
8512 22:25:47.295396 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8513 22:25:47.295869 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8514 22:25:47.295979 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8515 22:25:47.296085 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8516 22:25:47.296190 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8517 22:25:47.296486 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8518 22:25:47.296587 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8519 22:25:47.296688 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8520 22:25:47.296793 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8521 22:25:47.296893 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8522 22:25:47.296992 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8523 22:25:47.297931 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8524 22:25:47.298048 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8525 22:25:47.298126 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8526 22:25:47.298200 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8527 22:25:47.298274 # ok 435 sched_yield() SVE VL 80
8528 22:25:47.298348 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8529 22:25:47.302997 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8530 22:25:47.303500 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8531 22:25:47.303622 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8532 22:25:47.303724 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8533 22:25:47.303852 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8534 22:25:47.304175 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8535 22:25:47.304292 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8536 22:25:47.304402 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8537 22:25:47.304502 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8538 22:25:47.304601 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8539 22:25:47.304719 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8540 22:25:47.304827 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8541 22:25:47.304938 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8542 22:25:47.305036 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8543 22:25:47.305156 # ok 451 sched_yield() SVE VL 64
8544 22:25:47.305256 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8545 22:25:47.305357 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8546 22:25:47.305474 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8547 22:25:47.305571 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8548 22:25:47.305703 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8549 22:25:47.305833 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8550 22:25:47.311113 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8551 22:25:47.311598 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8552 22:25:47.311710 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8553 22:25:47.311793 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8554 22:25:47.311861 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8555 22:25:47.312128 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8556 22:25:48.314600 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8557 22:25:48.315071 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8558 22:25:48.315177 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8559 22:25:48.315269 # ok 467 sched_yield() SVE VL 48
8560 22:25:48.315356 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8561 22:25:48.315439 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8562 22:25:48.315540 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8563 22:25:48.315621 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8564 22:25:48.315696 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8565 22:25:48.315770 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8566 22:25:48.315858 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8567 22:25:48.315934 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8568 22:25:48.316022 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8569 22:25:48.316311 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8570 22:25:48.316404 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8571 22:25:48.316481 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8572 22:25:48.316568 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8573 22:25:48.316649 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8574 22:25:48.316743 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8575 22:25:48.316827 # ok 483 sched_yield() SVE VL 32
8576 22:25:48.316917 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8577 22:25:48.317003 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8578 22:25:48.317287 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8579 22:25:48.317398 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8580 22:25:48.317501 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8581 22:25:48.317780 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8582 22:25:48.317896 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8583 22:25:48.317992 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8584 22:25:48.323668 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8585 22:25:48.324137 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8586 22:25:48.324234 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8587 22:25:48.324310 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8588 22:25:48.324397 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8589 22:25:48.324471 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8590 22:25:48.324556 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8591 22:25:48.324634 # ok 499 sched_yield() SVE VL 16
8592 22:25:48.324720 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8593 22:25:48.325022 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8594 22:25:48.325130 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8595 22:25:48.325529 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8596 22:25:48.325626 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8597 22:25:48.325921 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8598 22:25:48.326017 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8599 22:25:48.326096 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8600 22:25:48.335301 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8601 22:25:48.335751 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8602 22:25:48.335836 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8603 22:25:48.336135 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8604 22:25:48.336232 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8605 22:25:48.336309 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8606 22:25:48.336383 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8607 22:25:48.336455 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8608 22:25:48.336540 ok 47 selftests: arm64: syscall-abi
8609 22:25:48.401608 # selftests: arm64: tpidr2
8610 22:25:48.567151 # TAP version 13
8611 22:25:48.567441 # 1..5
8612 22:25:48.567602 # # PID: 3504
8613 22:25:48.567744 # ok 1 default_value
8614 22:25:48.568097 # ok 2 write_read
8615 22:25:48.568240 # ok 3 write_sleep_read
8616 22:25:48.568383 # ok 4 write_fork_read
8617 22:25:48.568489 # ok 5 write_clone_read
8618 22:25:48.568581 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8619 22:25:48.584402 ok 48 selftests: arm64: tpidr2
8620 22:25:49.256114 arm64_tags_test pass
8621 22:25:49.256372 arm64_run_tags_test_sh pass
8622 22:25:49.256679 arm64_fake_sigreturn_bad_magic pass
8623 22:25:49.256771 arm64_fake_sigreturn_bad_size pass
8624 22:25:49.257842 arm64_fake_sigreturn_bad_size_for_magic0 pass
8625 22:25:49.257971 arm64_fake_sigreturn_duplicated_fpsimd pass
8626 22:25:49.258062 arm64_fake_sigreturn_misaligned_sp pass
8627 22:25:49.258148 arm64_fake_sigreturn_missing_fpsimd pass
8628 22:25:49.258230 arm64_fake_sigreturn_sme_change_vl pass
8629 22:25:49.258314 arm64_fake_sigreturn_sve_change_vl pass
8630 22:25:49.258396 arm64_mangle_pstate_invalid_compat_toggle pass
8631 22:25:49.258479 arm64_mangle_pstate_invalid_daif_bits pass
8632 22:25:49.258565 arm64_mangle_pstate_invalid_mode_el1h pass
8633 22:25:49.258647 arm64_mangle_pstate_invalid_mode_el1t pass
8634 22:25:49.258727 arm64_mangle_pstate_invalid_mode_el2h pass
8635 22:25:49.258809 arm64_mangle_pstate_invalid_mode_el2t pass
8636 22:25:49.258890 arm64_mangle_pstate_invalid_mode_el3h pass
8637 22:25:49.258964 arm64_mangle_pstate_invalid_mode_el3t pass
8638 22:25:49.259423 arm64_sme_trap_no_sm pass
8639 22:25:49.259523 arm64_sme_trap_non_streaming skip
8640 22:25:49.259822 arm64_sme_trap_za pass
8641 22:25:49.259915 arm64_sme_vl pass
8642 22:25:49.259988 arm64_ssve_regs pass
8643 22:25:49.260058 arm64_sve_regs pass
8644 22:25:49.260126 arm64_sve_vl pass
8645 22:25:49.260195 arm64_za_no_regs pass
8646 22:25:49.260265 arm64_za_regs pass
8647 22:25:49.260334 arm64_pac_global_corrupt_pac pass
8648 22:25:49.260403 arm64_pac_global_pac_instructions_not_nop pass
8649 22:25:49.260472 arm64_pac_global_pac_instructions_not_nop_generic pass
8650 22:25:49.260541 arm64_pac_global_single_thread_different_keys pass
8651 22:25:49.260610 arm64_pac_global_exec_changed_keys pass
8652 22:25:49.260679 arm64_pac_global_context_switch_keep_keys pass
8653 22:25:49.260748 arm64_pac_global_context_switch_keep_keys_generic pass
8654 22:25:49.260817 arm64_pac pass
8655 22:25:49.260885 arm64_fp-stress_FPSIMD-0-0 pass
8656 22:25:49.260954 arm64_fp-stress_SVE-VL-256-0 pass
8657 22:25:49.261023 arm64_fp-stress_SVE-VL-240-0 pass
8658 22:25:49.261091 arm64_fp-stress_SVE-VL-224-0 pass
8659 22:25:49.261179 arm64_fp-stress_SVE-VL-208-0 pass
8660 22:25:49.261251 arm64_fp-stress_SVE-VL-192-0 pass
8661 22:25:49.261320 arm64_fp-stress_SVE-VL-176-0 pass
8662 22:25:49.261389 arm64_fp-stress_SVE-VL-160-0 pass
8663 22:25:49.261458 arm64_fp-stress_SVE-VL-144-0 pass
8664 22:25:49.261527 arm64_fp-stress_SVE-VL-128-0 pass
8665 22:25:49.261596 arm64_fp-stress_SVE-VL-112-0 pass
8666 22:25:49.261677 arm64_fp-stress_SVE-VL-96-0 pass
8667 22:25:49.261758 arm64_fp-stress_SVE-VL-80-0 pass
8668 22:25:49.261838 arm64_fp-stress_SVE-VL-64-0 pass
8669 22:25:49.261919 arm64_fp-stress_SVE-VL-48-0 pass
8670 22:25:49.262001 arm64_fp-stress_SVE-VL-32-0 pass
8671 22:25:49.262082 arm64_fp-stress_SVE-VL-16-0 pass
8672 22:25:49.262165 arm64_fp-stress_SSVE-VL-256-0 pass
8673 22:25:49.262273 arm64_fp-stress_ZA-VL-256-0 pass
8674 22:25:49.262358 arm64_fp-stress_SSVE-VL-128-0 pass
8675 22:25:49.262439 arm64_fp-stress_ZA-VL-128-0 pass
8676 22:25:49.262516 arm64_fp-stress_SSVE-VL-64-0 pass
8677 22:25:49.262590 arm64_fp-stress_ZA-VL-64-0 pass
8678 22:25:49.262668 arm64_fp-stress_SSVE-VL-32-0 pass
8679 22:25:49.262747 arm64_fp-stress_ZA-VL-32-0 pass
8680 22:25:49.262829 arm64_fp-stress_SSVE-VL-16-0 pass
8681 22:25:49.262905 arm64_fp-stress_ZA-VL-16-0 pass
8682 22:25:49.266505 arm64_fp-stress pass
8683 22:25:49.267437 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8684 22:25:49.268416 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8685 22:25:49.268610 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8686 22:25:49.268770 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8687 22:25:49.269408 arm64_sve-ptrace_Set_SVE_VL_16 pass
8688 22:25:49.269858 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8689 22:25:49.270005 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8690 22:25:49.270109 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8691 22:25:49.270207 arm64_sve-ptrace_Set_SVE_VL_32 pass
8692 22:25:49.270318 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8693 22:25:49.270403 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8694 22:25:49.270485 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8695 22:25:49.270570 arm64_sve-ptrace_Set_SVE_VL_48 pass
8696 22:25:49.270636 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8697 22:25:49.270697 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8698 22:25:49.270758 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8699 22:25:49.270841 arm64_sve-ptrace_Set_SVE_VL_64 pass
8700 22:25:49.270925 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8701 22:25:49.271006 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8702 22:25:49.271087 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8703 22:25:49.271173 arm64_sve-ptrace_Set_SVE_VL_80 pass
8704 22:25:49.271249 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8705 22:25:49.271319 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8706 22:25:49.271407 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8707 22:25:49.271491 arm64_sve-ptrace_Set_SVE_VL_96 pass
8708 22:25:49.274606 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8709 22:25:49.274835 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8710 22:25:49.275130 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8711 22:25:49.275233 arm64_sve-ptrace_Set_SVE_VL_112 pass
8712 22:25:49.275333 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8713 22:25:49.275437 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8714 22:25:49.275549 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8715 22:25:49.275648 arm64_sve-ptrace_Set_SVE_VL_128 pass
8716 22:25:49.275742 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8717 22:25:49.275842 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8718 22:25:49.275930 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8719 22:25:49.276031 arm64_sve-ptrace_Set_SVE_VL_144 pass
8720 22:25:49.276132 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8721 22:25:49.276948 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8722 22:25:49.277236 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8723 22:25:49.277318 arm64_sve-ptrace_Set_SVE_VL_160 pass
8724 22:25:49.277390 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8725 22:25:49.277459 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8726 22:25:49.277531 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8727 22:25:49.277814 arm64_sve-ptrace_Set_SVE_VL_176 pass
8728 22:25:49.277908 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8729 22:25:49.277983 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8730 22:25:49.278058 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8731 22:25:49.278142 arm64_sve-ptrace_Set_SVE_VL_192 pass
8732 22:25:49.278242 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8733 22:25:49.278328 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8734 22:25:49.282717 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8735 22:25:49.282936 arm64_sve-ptrace_Set_SVE_VL_208 pass
8736 22:25:49.283479 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8737 22:25:49.283596 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8738 22:25:49.283696 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8739 22:25:49.283789 arm64_sve-ptrace_Set_SVE_VL_224 pass
8740 22:25:49.283872 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8741 22:25:49.283956 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8742 22:25:49.284384 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8743 22:25:49.284504 arm64_sve-ptrace_Set_SVE_VL_240 pass
8744 22:25:49.284611 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8745 22:25:49.284719 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8746 22:25:49.284957 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8747 22:25:49.285067 arm64_sve-ptrace_Set_SVE_VL_256 pass
8748 22:25:49.285173 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8749 22:25:49.285301 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8750 22:25:49.285400 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8751 22:25:49.285485 arm64_sve-ptrace_Set_SVE_VL_272 pass
8752 22:25:49.285569 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8753 22:25:49.285659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8754 22:25:49.285764 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8755 22:25:49.285849 arm64_sve-ptrace_Set_SVE_VL_288 pass
8756 22:25:49.285942 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8757 22:25:49.286042 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8758 22:25:49.286124 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8759 22:25:49.286188 arm64_sve-ptrace_Set_SVE_VL_304 pass
8760 22:25:49.286263 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8761 22:25:49.290519 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8762 22:25:49.291080 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8763 22:25:49.291184 arm64_sve-ptrace_Set_SVE_VL_320 pass
8764 22:25:49.291266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8765 22:25:49.291343 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8766 22:25:49.291418 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8767 22:25:49.291941 arm64_sve-ptrace_Set_SVE_VL_336 pass
8768 22:25:49.292073 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8769 22:25:49.292170 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8770 22:25:49.292277 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8771 22:25:49.292380 arm64_sve-ptrace_Set_SVE_VL_352 pass
8772 22:25:49.292493 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8773 22:25:49.292597 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8774 22:25:49.292684 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8775 22:25:49.292767 arm64_sve-ptrace_Set_SVE_VL_368 pass
8776 22:25:49.292848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8777 22:25:49.293863 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8778 22:25:49.293972 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8779 22:25:49.294056 arm64_sve-ptrace_Set_SVE_VL_384 pass
8780 22:25:49.294139 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8781 22:25:49.294220 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8782 22:25:49.294303 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8783 22:25:49.294386 arm64_sve-ptrace_Set_SVE_VL_400 pass
8784 22:25:49.294469 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8785 22:25:49.294553 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8786 22:25:49.294634 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8787 22:25:49.294715 arm64_sve-ptrace_Set_SVE_VL_416 pass
8788 22:25:49.295045 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8789 22:25:49.298654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8790 22:25:49.298877 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8791 22:25:49.298984 arm64_sve-ptrace_Set_SVE_VL_432 pass
8792 22:25:49.299073 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8793 22:25:49.299171 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8794 22:25:49.299254 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8795 22:25:49.299337 arm64_sve-ptrace_Set_SVE_VL_448 pass
8796 22:25:49.299434 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8797 22:25:49.299537 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8798 22:25:49.323592 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8799 22:25:49.323844 arm64_sve-ptrace_Set_SVE_VL_464 pass
8800 22:25:49.324136 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8801 22:25:49.324228 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8802 22:25:49.324314 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8803 22:25:49.324400 arm64_sve-ptrace_Set_SVE_VL_480 pass
8804 22:25:49.324486 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8805 22:25:49.324591 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8806 22:25:49.324686 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8807 22:25:49.324761 arm64_sve-ptrace_Set_SVE_VL_496 pass
8808 22:25:49.324843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8809 22:25:49.325124 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8810 22:25:49.325229 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8811 22:25:49.325304 arm64_sve-ptrace_Set_SVE_VL_512 pass
8812 22:25:49.325579 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8813 22:25:49.325700 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8814 22:25:49.325786 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8815 22:25:49.325869 arm64_sve-ptrace_Set_SVE_VL_528 pass
8816 22:25:49.330356 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8817 22:25:49.330810 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8818 22:25:49.330913 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8819 22:25:49.331004 arm64_sve-ptrace_Set_SVE_VL_544 pass
8820 22:25:49.331099 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8821 22:25:49.331177 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8822 22:25:49.331266 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8823 22:25:49.331353 arm64_sve-ptrace_Set_SVE_VL_560 pass
8824 22:25:49.331571 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8825 22:25:49.331684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8826 22:25:49.331775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8827 22:25:49.332062 arm64_sve-ptrace_Set_SVE_VL_576 pass
8828 22:25:49.332155 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8829 22:25:49.332245 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8830 22:25:49.332530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8831 22:25:49.332629 arm64_sve-ptrace_Set_SVE_VL_592 pass
8832 22:25:49.332717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
8833 22:25:49.332803 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
8834 22:25:49.333086 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
8835 22:25:49.333183 arm64_sve-ptrace_Set_SVE_VL_608 pass
8836 22:25:49.333280 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
8837 22:25:49.333380 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
8838 22:25:49.333480 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
8839 22:25:49.333765 arm64_sve-ptrace_Set_SVE_VL_624 pass
8840 22:25:49.333877 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
8841 22:25:49.338455 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
8842 22:25:49.338924 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
8843 22:25:49.339031 arm64_sve-ptrace_Set_SVE_VL_640 pass
8844 22:25:49.339120 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
8845 22:25:49.339205 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
8846 22:25:49.339309 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
8847 22:25:49.339397 arm64_sve-ptrace_Set_SVE_VL_656 pass
8848 22:25:49.339487 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
8849 22:25:49.339589 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
8850 22:25:49.339691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
8851 22:25:49.339792 arm64_sve-ptrace_Set_SVE_VL_672 pass
8852 22:25:49.339904 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
8853 22:25:49.340210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
8854 22:25:49.340329 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
8855 22:25:49.340432 arm64_sve-ptrace_Set_SVE_VL_688 pass
8856 22:25:49.340535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
8857 22:25:49.340837 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
8858 22:25:49.340956 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
8859 22:25:49.341810 arm64_sve-ptrace_Set_SVE_VL_704 pass
8860 22:25:49.341918 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
8861 22:25:49.342008 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
8862 22:25:49.342092 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
8863 22:25:49.342176 arm64_sve-ptrace_Set_SVE_VL_720 pass
8864 22:25:49.342260 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
8865 22:25:49.342341 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
8866 22:25:49.346399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
8867 22:25:49.346862 arm64_sve-ptrace_Set_SVE_VL_736 pass
8868 22:25:49.346969 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
8869 22:25:49.347056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
8870 22:25:49.347139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
8871 22:25:49.347240 arm64_sve-ptrace_Set_SVE_VL_752 pass
8872 22:25:49.347326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
8873 22:25:49.347425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
8874 22:25:49.347510 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
8875 22:25:49.347607 arm64_sve-ptrace_Set_SVE_VL_768 pass
8876 22:25:49.347932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
8877 22:25:49.348036 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
8878 22:25:49.348153 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
8879 22:25:49.348261 arm64_sve-ptrace_Set_SVE_VL_784 pass
8880 22:25:49.348375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
8881 22:25:49.348500 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
8882 22:25:49.348804 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
8883 22:25:49.348909 arm64_sve-ptrace_Set_SVE_VL_800 pass
8884 22:25:49.349014 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
8885 22:25:49.349102 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
8886 22:25:49.349202 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
8887 22:25:49.349309 arm64_sve-ptrace_Set_SVE_VL_816 pass
8888 22:25:49.349416 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
8889 22:25:49.349706 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
8890 22:25:49.349807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
8891 22:25:49.349904 arm64_sve-ptrace_Set_SVE_VL_832 pass
8892 22:25:49.354452 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
8893 22:25:49.354901 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
8894 22:25:49.354999 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
8895 22:25:49.355077 arm64_sve-ptrace_Set_SVE_VL_848 pass
8896 22:25:49.355165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
8897 22:25:49.355245 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
8898 22:25:49.355333 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
8899 22:25:49.355411 arm64_sve-ptrace_Set_SVE_VL_864 pass
8900 22:25:49.355496 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
8901 22:25:49.355782 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
8902 22:25:49.355876 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
8903 22:25:49.355966 arm64_sve-ptrace_Set_SVE_VL_880 pass
8904 22:25:49.356060 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
8905 22:25:49.356345 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
8906 22:25:49.356453 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
8907 22:25:49.356541 arm64_sve-ptrace_Set_SVE_VL_896 pass
8908 22:25:49.356630 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
8909 22:25:49.356823 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
8910 22:25:49.357131 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
8911 22:25:49.357229 arm64_sve-ptrace_Set_SVE_VL_912 pass
8912 22:25:49.357323 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
8913 22:25:49.357411 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
8914 22:25:49.357697 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
8915 22:25:49.357800 arm64_sve-ptrace_Set_SVE_VL_928 pass
8916 22:25:49.357896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
8917 22:25:49.358073 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
8918 22:25:49.362385 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
8919 22:25:49.362836 arm64_sve-ptrace_Set_SVE_VL_944 pass
8920 22:25:49.362935 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
8921 22:25:49.363014 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
8922 22:25:49.363103 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
8923 22:25:49.363181 arm64_sve-ptrace_Set_SVE_VL_960 pass
8924 22:25:49.363270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
8925 22:25:49.363356 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
8926 22:25:49.363651 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
8927 22:25:49.363748 arm64_sve-ptrace_Set_SVE_VL_976 pass
8928 22:25:49.363838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
8929 22:25:49.363914 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
8930 22:25:49.364191 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
8931 22:25:49.364286 arm64_sve-ptrace_Set_SVE_VL_992 pass
8932 22:25:49.364375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
8933 22:25:49.364461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
8934 22:25:49.364741 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
8935 22:25:49.364854 arm64_sve-ptrace_Set_SVE_VL_1008 pass
8936 22:25:49.364963 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
8937 22:25:49.365077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
8938 22:25:49.365368 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
8939 22:25:49.365471 arm64_sve-ptrace_Set_SVE_VL_1024 pass
8940 22:25:49.365568 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
8941 22:25:49.365670 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
8942 22:25:49.365955 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
8943 22:25:49.370624 arm64_sve-ptrace_Set_SVE_VL_1040 pass
8944 22:25:49.370857 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
8945 22:25:49.370953 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
8946 22:25:49.371030 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
8947 22:25:49.371117 arm64_sve-ptrace_Set_SVE_VL_1056 pass
8948 22:25:49.371205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
8949 22:25:49.371501 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
8950 22:25:49.371608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
8951 22:25:49.371714 arm64_sve-ptrace_Set_SVE_VL_1072 pass
8952 22:25:49.371817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
8953 22:25:49.372114 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
8954 22:25:49.372209 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
8955 22:25:49.372284 arm64_sve-ptrace_Set_SVE_VL_1088 pass
8956 22:25:49.372374 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
8957 22:25:49.372468 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
8958 22:25:49.372760 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
8959 22:25:49.372857 arm64_sve-ptrace_Set_SVE_VL_1104 pass
8960 22:25:49.393783 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
8961 22:25:49.394255 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
8962 22:25:49.394350 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
8963 22:25:49.394443 arm64_sve-ptrace_Set_SVE_VL_1120 pass
8964 22:25:49.394523 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
8965 22:25:49.394618 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
8966 22:25:49.394692 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
8967 22:25:49.394767 arm64_sve-ptrace_Set_SVE_VL_1136 pass
8968 22:25:49.394859 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
8969 22:25:49.394931 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
8970 22:25:49.395058 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
8971 22:25:49.395161 arm64_sve-ptrace_Set_SVE_VL_1152 pass
8972 22:25:49.395241 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
8973 22:25:49.395496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
8974 22:25:49.395575 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
8975 22:25:49.395639 arm64_sve-ptrace_Set_SVE_VL_1168 pass
8976 22:25:49.395714 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
8977 22:25:49.395962 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
8978 22:25:49.396052 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
8979 22:25:49.396140 arm64_sve-ptrace_Set_SVE_VL_1184 pass
8980 22:25:49.396205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
8981 22:25:49.396267 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
8982 22:25:49.396340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
8983 22:25:49.396414 arm64_sve-ptrace_Set_SVE_VL_1200 pass
8984 22:25:49.396659 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
8985 22:25:49.396755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
8986 22:25:49.396843 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
8987 22:25:49.396943 arm64_sve-ptrace_Set_SVE_VL_1216 pass
8988 22:25:49.397031 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
8989 22:25:49.397114 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
8990 22:25:49.397210 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
8991 22:25:49.397291 arm64_sve-ptrace_Set_SVE_VL_1232 pass
8992 22:25:49.397387 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
8993 22:25:49.397485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
8994 22:25:49.397584 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
8995 22:25:49.397695 arm64_sve-ptrace_Set_SVE_VL_1248 pass
8996 22:25:49.397810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
8997 22:25:49.402298 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
8998 22:25:49.402761 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
8999 22:25:49.402860 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9000 22:25:49.402947 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9001 22:25:49.403035 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9002 22:25:49.403140 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9003 22:25:49.403231 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9004 22:25:49.403333 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9005 22:25:49.403422 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9006 22:25:49.403525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9007 22:25:49.403627 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9008 22:25:49.403729 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9009 22:25:49.403949 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9010 22:25:49.404075 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9011 22:25:49.404180 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9012 22:25:49.404284 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9013 22:25:49.404388 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9014 22:25:49.404686 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9015 22:25:49.404786 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9016 22:25:49.404887 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9017 22:25:49.404975 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9018 22:25:49.405076 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9019 22:25:49.405176 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9020 22:25:49.405274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9021 22:25:49.405372 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9022 22:25:49.405697 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9023 22:25:49.406036 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9024 22:25:49.406149 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9025 22:25:49.406237 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9026 22:25:49.410342 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9027 22:25:49.410781 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9028 22:25:49.410890 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9029 22:25:49.410977 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9030 22:25:49.411079 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9031 22:25:49.411164 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9032 22:25:49.411265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9033 22:25:49.411365 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9034 22:25:49.411464 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9035 22:25:49.411573 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9036 22:25:49.411892 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9037 22:25:49.412014 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9038 22:25:49.412117 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9039 22:25:49.412218 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9040 22:25:49.412516 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9041 22:25:49.412634 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9042 22:25:49.412736 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9043 22:25:49.413026 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9044 22:25:49.413129 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9045 22:25:49.413229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9046 22:25:49.413525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9047 22:25:49.413628 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9048 22:25:49.413741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9049 22:25:49.413841 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9050 22:25:49.413940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9051 22:25:49.418506 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9052 22:25:49.418956 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9053 22:25:49.419056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9054 22:25:49.419142 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9055 22:25:49.419226 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9056 22:25:49.419308 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9057 22:25:49.419408 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9058 22:25:49.419500 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9059 22:25:49.419584 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9060 22:25:49.419668 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9061 22:25:49.419766 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9062 22:25:49.419858 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9063 22:25:49.419958 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9064 22:25:49.420058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9065 22:25:49.420437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9066 22:25:49.420544 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9067 22:25:49.420646 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9068 22:25:49.420747 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9069 22:25:49.420850 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9070 22:25:49.421060 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9071 22:25:49.421166 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9072 22:25:49.421467 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9073 22:25:49.421586 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9074 22:25:49.421885 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9075 22:25:49.421986 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9076 22:25:49.422070 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9077 22:25:49.422167 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9078 22:25:49.426597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9079 22:25:49.426823 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9080 22:25:49.426934 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9081 22:25:49.427024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9082 22:25:49.427128 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9083 22:25:49.427218 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9084 22:25:49.427304 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9085 22:25:49.427405 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9086 22:25:49.427514 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9087 22:25:49.427618 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9088 22:25:49.427722 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9089 22:25:49.427829 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9090 22:25:49.428126 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9091 22:25:49.428218 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9092 22:25:49.428320 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9093 22:25:49.428423 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9094 22:25:49.428728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9095 22:25:49.428836 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9096 22:25:49.428938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9097 22:25:49.429025 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9098 22:25:49.429122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9099 22:25:49.429229 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9100 22:25:49.429515 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9101 22:25:49.429619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9102 22:25:49.429732 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9103 22:25:49.429837 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9104 22:25:49.434445 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9105 22:25:49.434684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9106 22:25:49.435010 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9107 22:25:49.435117 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9108 22:25:49.435207 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9109 22:25:49.435292 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9110 22:25:49.435396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9111 22:25:49.435484 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9112 22:25:49.435585 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9113 22:25:49.435877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9114 22:25:49.435983 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9115 22:25:49.436087 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9116 22:25:49.436177 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9117 22:25:49.436278 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9118 22:25:49.436578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9119 22:25:49.436680 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9120 22:25:49.456506 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9121 22:25:49.456964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9122 22:25:49.457062 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9123 22:25:49.457136 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9124 22:25:49.457206 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9125 22:25:49.457275 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9126 22:25:49.457344 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9127 22:25:49.457412 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9128 22:25:49.457481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9129 22:25:49.457548 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9130 22:25:49.457616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9131 22:25:49.457694 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9132 22:25:49.457992 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9133 22:25:49.458076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9134 22:25:49.458141 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9135 22:25:49.458225 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9136 22:25:49.458311 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9137 22:25:49.458395 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9138 22:25:49.458681 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9139 22:25:49.458787 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9140 22:25:49.458907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9141 22:25:49.459007 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9142 22:25:49.459116 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9143 22:25:49.459206 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9144 22:25:49.459492 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9145 22:25:49.459602 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9146 22:25:49.459694 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9147 22:25:49.459795 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9148 22:25:49.459897 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9149 22:25:49.459990 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9150 22:25:49.460093 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9151 22:25:49.460213 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9152 22:25:49.460338 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9153 22:25:49.460464 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9154 22:25:49.460803 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9155 22:25:49.460907 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9156 22:25:49.461015 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9157 22:25:49.461103 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9158 22:25:49.461206 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9159 22:25:49.461305 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9160 22:25:49.461410 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9161 22:25:49.461720 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9162 22:25:49.461823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9163 22:25:49.461923 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9164 22:25:49.462006 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9165 22:25:49.466551 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9166 22:25:49.466777 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9167 22:25:49.466877 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9168 22:25:49.466986 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9169 22:25:49.467079 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9170 22:25:49.467185 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9171 22:25:49.467297 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9172 22:25:49.467413 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9173 22:25:49.467531 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9174 22:25:49.467657 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9175 22:25:49.467988 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9176 22:25:49.468105 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9177 22:25:49.468419 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9178 22:25:49.468523 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9179 22:25:49.468623 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9180 22:25:49.468704 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9181 22:25:49.468981 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9182 22:25:49.469088 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9183 22:25:49.469183 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9184 22:25:49.469275 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9185 22:25:49.469381 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9186 22:25:49.469745 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9187 22:25:49.469853 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9188 22:25:49.470031 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9189 22:25:49.470206 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9190 22:25:49.470357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9191 22:25:49.470537 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9192 22:25:49.474374 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9193 22:25:49.474996 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9194 22:25:49.475202 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9195 22:25:49.475381 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9196 22:25:49.475548 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9197 22:25:49.475720 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9198 22:25:49.475936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9199 22:25:49.476164 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9200 22:25:49.476377 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9201 22:25:49.476587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9202 22:25:49.476798 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9203 22:25:49.477021 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9204 22:25:49.477239 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9205 22:25:49.477470 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9206 22:25:49.477660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9207 22:25:49.477836 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9208 22:25:49.478004 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9209 22:25:49.478130 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9210 22:25:49.478246 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9211 22:25:49.478361 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9212 22:25:49.478478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9213 22:25:49.478593 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9214 22:25:49.478708 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9215 22:25:49.478824 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9216 22:25:49.478973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9217 22:25:49.479095 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9218 22:25:49.479210 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9219 22:25:49.482393 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9220 22:25:49.483028 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9221 22:25:49.483132 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9222 22:25:49.483221 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9223 22:25:49.483304 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9224 22:25:49.483387 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9225 22:25:49.483476 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9226 22:25:49.483951 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9227 22:25:49.484076 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9228 22:25:49.484159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9229 22:25:49.484242 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9230 22:25:49.484327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9231 22:25:49.484428 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9232 22:25:49.484510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9233 22:25:49.484591 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9234 22:25:49.486045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9235 22:25:49.486157 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9236 22:25:49.486242 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9237 22:25:49.486326 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9238 22:25:49.486411 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9239 22:25:49.486495 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9240 22:25:49.486578 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9241 22:25:49.486663 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9242 22:25:49.486746 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9243 22:25:49.486830 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9244 22:25:49.486918 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9245 22:25:49.487002 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9246 22:25:49.487086 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9247 22:25:49.494396 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9248 22:25:49.494636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9249 22:25:49.494962 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9250 22:25:49.495072 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9251 22:25:49.495159 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9252 22:25:49.495247 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9253 22:25:49.495348 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9254 22:25:49.495439 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9255 22:25:49.495547 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9256 22:25:49.495844 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9257 22:25:49.495965 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9258 22:25:49.496091 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9259 22:25:49.496202 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9260 22:25:49.496312 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9261 22:25:49.496430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9262 22:25:49.496767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9263 22:25:49.496881 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9264 22:25:49.497010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9265 22:25:49.497116 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9266 22:25:49.497241 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9267 22:25:49.497345 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9268 22:25:49.497701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9269 22:25:49.497830 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9270 22:25:49.497950 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9271 22:25:49.498039 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9272 22:25:49.502452 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9273 22:25:49.502708 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9274 22:25:49.503163 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9275 22:25:49.503366 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9276 22:25:49.503507 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9277 22:25:49.503683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9278 22:25:49.503912 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9279 22:25:49.504074 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9280 22:25:49.516391 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9281 22:25:49.516757 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9282 22:25:49.517360 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9283 22:25:49.517567 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9284 22:25:49.517780 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9285 22:25:49.518010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9286 22:25:49.518177 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9287 22:25:49.518374 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9288 22:25:49.518605 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9289 22:25:49.518799 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9290 22:25:49.518966 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9291 22:25:49.519129 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9292 22:25:49.519293 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9293 22:25:49.519454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9294 22:25:49.519629 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9295 22:25:49.519815 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9296 22:25:49.520084 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9297 22:25:49.520299 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9298 22:25:49.520500 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9299 22:25:49.520681 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9300 22:25:49.520910 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9301 22:25:49.521108 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9302 22:25:49.521304 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9303 22:25:49.521522 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9304 22:25:49.522323 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9305 22:25:49.522467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9306 22:25:49.522585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9307 22:25:49.522701 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9308 22:25:49.522816 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9309 22:25:49.522969 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9310 22:25:49.523097 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9311 22:25:49.523214 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9312 22:25:49.523330 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9313 22:25:49.523447 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9314 22:25:49.523608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9315 22:25:49.523739 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9316 22:25:49.523855 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9317 22:25:49.523972 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9318 22:25:49.524100 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9319 22:25:49.524216 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9320 22:25:49.524556 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9321 22:25:49.528370 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9322 22:25:49.528684 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9323 22:25:49.528868 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9324 22:25:49.529042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9325 22:25:49.529212 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9326 22:25:49.529384 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9327 22:25:49.529557 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9328 22:25:49.529744 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9329 22:25:49.529921 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9330 22:25:49.530086 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9331 22:25:49.530257 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9332 22:25:49.530394 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9333 22:25:49.530519 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9334 22:25:49.530874 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9335 22:25:49.530978 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9336 22:25:49.531066 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9337 22:25:49.531165 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9338 22:25:49.531251 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9339 22:25:49.531333 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9340 22:25:49.531411 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9341 22:25:49.531490 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9342 22:25:49.531571 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9343 22:25:49.531647 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9344 22:25:49.531722 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9345 22:25:49.534432 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9346 22:25:49.534825 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9347 22:25:49.534927 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9348 22:25:49.535010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9349 22:25:49.535088 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9350 22:25:49.535183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9351 22:25:49.535264 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9352 22:25:49.535808 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9353 22:25:49.535920 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9354 22:25:49.536015 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9355 22:25:49.536108 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9356 22:25:49.536210 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9357 22:25:49.536302 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9358 22:25:49.536389 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9359 22:25:49.536494 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9360 22:25:49.536596 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9361 22:25:49.536687 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9362 22:25:49.537003 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9363 22:25:49.537108 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9364 22:25:49.537428 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9365 22:25:49.537533 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9366 22:25:49.537621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9367 22:25:49.537729 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9368 22:25:49.538023 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9369 22:25:49.538125 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9370 22:25:49.542396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9371 22:25:49.542786 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9372 22:25:49.542896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9373 22:25:49.542984 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9374 22:25:49.543072 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9375 22:25:49.543175 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9376 22:25:49.543264 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9377 22:25:49.543366 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9378 22:25:49.543699 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9379 22:25:49.543812 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9380 22:25:49.543902 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9381 22:25:49.544005 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9382 22:25:49.544111 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9383 22:25:49.544214 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9384 22:25:49.544528 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9385 22:25:49.544633 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9386 22:25:49.544737 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9387 22:25:49.545056 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9388 22:25:49.545159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9389 22:25:49.545514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9390 22:25:49.545616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9391 22:25:49.545711 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9392 22:25:49.545810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9393 22:25:49.545907 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9394 22:25:49.557928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9395 22:25:49.558136 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9396 22:25:49.558203 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9397 22:25:49.558265 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9398 22:25:49.558327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9399 22:25:49.558389 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9400 22:25:49.558450 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9401 22:25:49.558512 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9402 22:25:49.558573 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9403 22:25:49.558635 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9404 22:25:49.558696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9405 22:25:49.558756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9406 22:25:49.558817 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9407 22:25:49.558878 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9408 22:25:49.558940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9409 22:25:49.559000 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9410 22:25:49.559060 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9411 22:25:49.559121 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9412 22:25:49.559182 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9413 22:25:49.559242 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9414 22:25:49.559303 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9415 22:25:49.559364 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9416 22:25:49.559425 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9417 22:25:49.559492 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9418 22:25:49.559961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9419 22:25:49.566425 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9420 22:25:49.566672 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9421 22:25:49.567008 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9422 22:25:49.567115 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9423 22:25:49.567203 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9424 22:25:49.567290 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9425 22:25:49.567395 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9426 22:25:49.567486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9427 22:25:49.567782 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9428 22:25:49.567887 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9429 22:25:49.567978 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9430 22:25:49.568082 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9431 22:25:49.568173 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9432 22:25:49.568275 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9433 22:25:49.568629 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9434 22:25:49.568734 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9435 22:25:49.568823 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9436 22:25:49.568927 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9437 22:25:49.569224 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9438 22:25:49.569328 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9439 22:25:49.569427 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9440 22:25:49.580665 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9441 22:25:49.581224 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9442 22:25:49.581332 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9443 22:25:49.581801 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9444 22:25:49.581980 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9445 22:25:49.582068 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9446 22:25:49.582154 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9447 22:25:49.582241 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9448 22:25:49.582326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9449 22:25:49.582413 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9450 22:25:49.582517 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9451 22:25:49.582607 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9452 22:25:49.583227 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9453 22:25:49.583584 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9454 22:25:49.583691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9455 22:25:49.583781 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9456 22:25:49.583866 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9457 22:25:49.583951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9458 22:25:49.584401 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9459 22:25:49.584757 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9460 22:25:49.584853 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9461 22:25:49.584943 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9462 22:25:49.585032 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9463 22:25:49.585121 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9464 22:25:49.585210 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9465 22:25:49.585317 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9466 22:25:49.585410 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9467 22:25:49.585500 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9468 22:25:49.585590 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9469 22:25:49.585909 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9470 22:25:49.586032 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9471 22:25:49.586121 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9472 22:25:49.586202 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9473 22:25:49.586282 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9474 22:25:49.586361 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9475 22:25:49.586437 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9476 22:25:49.586515 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9477 22:25:49.590659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9478 22:25:49.591457 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9479 22:25:49.591550 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9480 22:25:49.591850 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9481 22:25:49.591946 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9482 22:25:49.592023 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9483 22:25:49.592098 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9484 22:25:49.592172 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9485 22:25:49.592247 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9486 22:25:49.592319 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9487 22:25:49.593483 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9488 22:25:49.593582 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9489 22:25:49.593676 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9490 22:25:49.593753 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9491 22:25:49.593832 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9492 22:25:49.593909 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9493 22:25:49.593985 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9494 22:25:49.594066 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9495 22:25:49.594150 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9496 22:25:49.594226 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9497 22:25:49.594304 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9498 22:25:49.594573 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9499 22:25:49.594655 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9500 22:25:49.594732 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9501 22:25:49.598879 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9502 22:25:49.599094 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9503 22:25:49.599190 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9504 22:25:49.599270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9505 22:25:49.599562 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9506 22:25:49.599857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9507 22:25:49.599948 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9508 22:25:49.600025 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9509 22:25:49.600098 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9510 22:25:49.600172 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9511 22:25:49.600243 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9512 22:25:49.600332 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9513 22:25:49.600409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9514 22:25:49.600798 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9515 22:25:49.600894 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9516 22:25:49.600970 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9517 22:25:49.601045 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9518 22:25:49.601119 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9519 22:25:49.601199 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9520 22:25:49.601279 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9521 22:25:49.601570 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9522 22:25:49.601682 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9523 22:25:49.601767 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9524 22:25:49.601846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9525 22:25:49.601938 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9526 22:25:49.602022 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9527 22:25:49.602329 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9528 22:25:49.602429 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9529 22:25:49.602516 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9530 22:25:49.606578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9531 22:25:49.606810 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9532 22:25:49.607161 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9533 22:25:49.607266 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9534 22:25:49.607358 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9535 22:25:49.607445 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9536 22:25:49.607531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9537 22:25:49.607633 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9538 22:25:49.607738 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9539 22:25:49.607830 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9540 22:25:49.608233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9541 22:25:49.608410 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9542 22:25:49.609681 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9543 22:25:49.610107 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9544 22:25:49.610279 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9545 22:25:49.610376 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9546 22:25:49.610463 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9547 22:25:49.610550 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9548 22:25:49.610635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9549 22:25:49.610721 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9550 22:25:49.610807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9551 22:25:49.610910 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9552 22:25:49.610999 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9553 22:25:49.611085 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9554 22:25:49.611187 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9555 22:25:49.611528 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9556 22:25:49.611654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9557 22:25:49.611797 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9558 22:25:49.611936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9559 22:25:49.612070 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9560 22:25:49.612182 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9561 22:25:49.612270 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9562 22:25:49.612356 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9563 22:25:49.612439 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9564 22:25:49.612540 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9565 22:25:49.612626 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9566 22:25:49.612724 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9567 22:25:49.613252 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9568 22:25:49.613390 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9569 22:25:49.613496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9570 22:25:49.613580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9571 22:25:49.613881 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9572 22:25:49.613983 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9573 22:25:49.614070 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9574 22:25:49.626399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9575 22:25:49.626661 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9576 22:25:49.626992 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9577 22:25:49.627110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9578 22:25:49.627224 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9579 22:25:49.627341 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9580 22:25:49.627437 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9581 22:25:49.627535 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9582 22:25:49.627653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9583 22:25:49.627745 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9584 22:25:49.627830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9585 22:25:49.627932 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9586 22:25:49.628278 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9587 22:25:49.628397 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9588 22:25:49.628713 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9589 22:25:49.628818 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9590 22:25:49.628930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9591 22:25:49.629063 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9592 22:25:49.629176 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9593 22:25:49.629276 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9594 22:25:49.629398 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9595 22:25:49.629511 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9596 22:25:49.629644 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9597 22:25:49.629765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9598 22:25:49.629869 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9599 22:25:49.629939 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9600 22:25:49.643487 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9601 22:25:49.644067 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9602 22:25:49.644603 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9603 22:25:49.644818 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9604 22:25:49.645022 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9605 22:25:49.645964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9606 22:25:49.646070 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9607 22:25:49.646161 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9608 22:25:49.646245 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9609 22:25:49.646327 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9610 22:25:49.646390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9611 22:25:49.646450 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9612 22:25:49.646511 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9613 22:25:49.646572 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9614 22:25:49.646630 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9615 22:25:49.646689 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9616 22:25:49.646749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9617 22:25:49.646808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9618 22:25:49.650385 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9619 22:25:49.650914 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9620 22:25:49.651068 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9621 22:25:49.651159 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9622 22:25:49.651248 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9623 22:25:49.651352 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9624 22:25:49.651441 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9625 22:25:49.651543 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9626 22:25:49.651631 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9627 22:25:49.651732 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9628 22:25:49.651819 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9629 22:25:49.651920 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9630 22:25:49.652294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9631 22:25:49.652404 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9632 22:25:49.652767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9633 22:25:49.652866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9634 22:25:49.652950 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9635 22:25:49.653231 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9636 22:25:49.653327 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9637 22:25:49.653399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9638 22:25:49.653494 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9639 22:25:49.653568 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9640 22:25:49.653868 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9641 22:25:49.653964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9642 22:25:49.658425 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9643 22:25:49.658905 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9644 22:25:49.659025 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9645 22:25:49.659130 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9646 22:25:49.659234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9647 22:25:49.659356 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9648 22:25:49.659488 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9649 22:25:49.659629 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9650 22:25:49.659747 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9651 22:25:49.659865 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9652 22:25:49.659985 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9653 22:25:49.660088 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9654 22:25:49.660522 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9655 22:25:49.660636 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9656 22:25:49.660740 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9657 22:25:49.660837 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9658 22:25:49.660954 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9659 22:25:49.661050 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9660 22:25:49.661377 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9661 22:25:49.661492 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9662 22:25:49.661590 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9663 22:25:49.661692 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9664 22:25:49.661793 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9665 22:25:49.661893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9666 22:25:49.661994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9667 22:25:49.662105 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9668 22:25:49.666316 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9669 22:25:49.666720 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9670 22:25:49.666817 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9671 22:25:49.666899 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9672 22:25:49.667202 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9673 22:25:49.667300 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9674 22:25:49.667380 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9675 22:25:49.667482 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9676 22:25:49.667565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9677 22:25:49.667663 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9678 22:25:49.667975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9679 22:25:49.668072 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9680 22:25:49.668355 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9681 22:25:49.668449 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9682 22:25:49.668539 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9683 22:25:49.668614 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9684 22:25:49.668701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9685 22:25:49.668788 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9686 22:25:49.669069 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9687 22:25:49.669177 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9688 22:25:49.669493 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9689 22:25:49.669606 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9690 22:25:49.669902 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9691 22:25:49.670000 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9692 22:25:49.674326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9693 22:25:49.674765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9694 22:25:49.674873 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9695 22:25:49.674963 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9696 22:25:49.675065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9697 22:25:49.675257 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9698 22:25:49.675372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9699 22:25:49.675463 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9700 22:25:49.675566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9701 22:25:49.675669 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9702 22:25:49.675772 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9703 22:25:49.675876 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9704 22:25:49.676165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9705 22:25:49.676288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9706 22:25:49.676600 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9707 22:25:49.676750 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9708 22:25:49.676856 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9709 22:25:49.676955 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9710 22:25:49.677270 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9711 22:25:49.677374 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9712 22:25:49.677451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9713 22:25:49.677544 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9714 22:25:49.677635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9715 22:25:49.677946 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9716 22:25:49.678221 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9717 22:25:49.682561 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9718 22:25:49.682754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9719 22:25:49.686036 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9720 22:25:49.686204 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9721 22:25:49.686291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9722 22:25:49.686386 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9723 22:25:49.686461 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9724 22:25:49.686523 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9725 22:25:49.686585 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9726 22:25:49.686647 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9727 22:25:49.686709 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9728 22:25:49.686770 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9729 22:25:49.686831 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9730 22:25:49.686891 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9731 22:25:49.686951 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9732 22:25:49.687011 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9733 22:25:49.687076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9734 22:25:49.687168 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9735 22:25:49.687245 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9736 22:25:49.687321 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9737 22:25:49.687396 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9738 22:25:49.687470 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9739 22:25:49.687606 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9740 22:25:49.687684 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9741 22:25:49.687759 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9742 22:25:49.687834 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9743 22:25:49.687908 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9744 22:25:49.687981 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9745 22:25:49.688077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9746 22:25:49.690492 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9747 22:25:49.690718 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9748 22:25:49.691139 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9749 22:25:49.691574 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9750 22:25:49.691682 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9751 22:25:49.691773 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9752 22:25:49.691879 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9753 22:25:49.691970 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9754 22:25:49.692055 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9755 22:25:49.692141 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9756 22:25:49.692248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9757 22:25:49.692331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9758 22:25:49.692396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9759 22:25:49.692458 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9760 22:25:49.709369 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9761 22:25:49.709691 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9762 22:25:49.710011 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9763 22:25:49.710116 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9764 22:25:49.710202 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9765 22:25:49.710290 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9766 22:25:49.710383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9767 22:25:49.710484 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9768 22:25:49.710704 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9769 22:25:49.710826 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9770 22:25:49.710934 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9771 22:25:49.711221 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9772 22:25:49.711337 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9773 22:25:49.711632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9774 22:25:49.711735 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9775 22:25:49.711837 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9776 22:25:49.711935 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9777 22:25:49.712034 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9778 22:25:49.712320 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9779 22:25:49.712444 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9780 22:25:49.712547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9781 22:25:49.712844 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9782 22:25:49.713152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9783 22:25:49.713257 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9784 22:25:49.713346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9785 22:25:49.713450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9786 22:25:49.713550 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9787 22:25:49.713783 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9788 22:25:49.713891 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9789 22:25:49.713994 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9790 22:25:49.718482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9791 22:25:49.718763 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9792 22:25:49.719080 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9793 22:25:49.719185 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9794 22:25:49.719273 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9795 22:25:49.719377 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9796 22:25:49.719465 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9797 22:25:49.719722 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9798 22:25:49.719814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9799 22:25:49.719904 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9800 22:25:49.720005 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9801 22:25:49.720298 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9802 22:25:49.720409 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9803 22:25:49.720494 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9804 22:25:49.720591 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9805 22:25:49.720678 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9806 22:25:49.720779 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9807 22:25:49.720880 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9808 22:25:49.720979 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9809 22:25:49.721277 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9810 22:25:49.721396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9811 22:25:49.721483 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9812 22:25:49.721789 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9813 22:25:49.721937 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9814 22:25:49.722033 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9815 22:25:49.726447 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9816 22:25:49.726683 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9817 22:25:49.727003 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9818 22:25:49.727106 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9819 22:25:49.727194 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9820 22:25:49.727283 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9821 22:25:49.727580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9822 22:25:49.727676 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9823 22:25:49.727754 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9824 22:25:49.727827 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9825 22:25:49.727899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9826 22:25:49.728230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9827 22:25:49.728325 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9828 22:25:49.728405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9829 22:25:49.728480 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9830 22:25:49.728554 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9831 22:25:49.728633 arm64_sve-ptrace_Set_SVE_VL_4592 pass
9832 22:25:49.728933 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
9833 22:25:49.729031 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
9834 22:25:49.729114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
9835 22:25:49.729190 arm64_sve-ptrace_Set_SVE_VL_4608 pass
9836 22:25:49.729266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
9837 22:25:49.729350 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
9838 22:25:49.729659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
9839 22:25:49.729760 arm64_sve-ptrace_Set_SVE_VL_4624 pass
9840 22:25:49.729842 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
9841 22:25:49.729917 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
9842 22:25:49.729996 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
9843 22:25:49.730074 arm64_sve-ptrace_Set_SVE_VL_4640 pass
9844 22:25:49.730316 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
9845 22:25:49.730422 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
9846 22:25:49.734600 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
9847 22:25:49.734837 arm64_sve-ptrace_Set_SVE_VL_4656 pass
9848 22:25:49.734930 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
9849 22:25:49.735269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
9850 22:25:49.735512 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
9851 22:25:49.735612 arm64_sve-ptrace_Set_SVE_VL_4672 pass
9852 22:25:49.735697 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
9853 22:25:49.735800 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
9854 22:25:49.735887 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
9855 22:25:49.736523 arm64_sve-ptrace_Set_SVE_VL_4688 pass
9856 22:25:49.736630 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
9857 22:25:49.736719 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
9858 22:25:49.736801 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
9859 22:25:49.736884 arm64_sve-ptrace_Set_SVE_VL_4704 pass
9860 22:25:49.736967 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
9861 22:25:49.737052 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
9862 22:25:49.737137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
9863 22:25:49.737699 arm64_sve-ptrace_Set_SVE_VL_4720 pass
9864 22:25:49.737830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
9865 22:25:49.737918 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
9866 22:25:49.738004 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
9867 22:25:49.738086 arm64_sve-ptrace_Set_SVE_VL_4736 pass
9868 22:25:49.738167 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
9869 22:25:49.738237 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
9870 22:25:49.738317 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
9871 22:25:49.738400 arm64_sve-ptrace_Set_SVE_VL_4752 pass
9872 22:25:49.738501 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
9873 22:25:49.738584 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
9874 22:25:49.742461 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
9875 22:25:49.742696 arm64_sve-ptrace_Set_SVE_VL_4768 pass
9876 22:25:49.743029 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
9877 22:25:49.743132 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
9878 22:25:49.743238 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
9879 22:25:49.743329 arm64_sve-ptrace_Set_SVE_VL_4784 pass
9880 22:25:49.743446 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
9881 22:25:49.743532 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
9882 22:25:49.743825 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
9883 22:25:49.743931 arm64_sve-ptrace_Set_SVE_VL_4800 pass
9884 22:25:49.744018 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
9885 22:25:49.744107 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
9886 22:25:49.744227 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
9887 22:25:49.744542 arm64_sve-ptrace_Set_SVE_VL_4816 pass
9888 22:25:49.744657 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
9889 22:25:49.744759 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
9890 22:25:49.744870 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
9891 22:25:49.744984 arm64_sve-ptrace_Set_SVE_VL_4832 pass
9892 22:25:49.745109 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
9893 22:25:49.745213 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
9894 22:25:49.745343 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
9895 22:25:49.745456 arm64_sve-ptrace_Set_SVE_VL_4848 pass
9896 22:25:49.745830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
9897 22:25:49.745961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
9898 22:25:49.746033 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
9899 22:25:49.746096 arm64_sve-ptrace_Set_SVE_VL_4864 pass
9900 22:25:49.750408 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
9901 22:25:49.751095 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
9902 22:25:49.751256 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
9903 22:25:49.751391 arm64_sve-ptrace_Set_SVE_VL_4880 pass
9904 22:25:49.751517 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
9905 22:25:49.751645 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
9906 22:25:49.752019 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
9907 22:25:49.752170 arm64_sve-ptrace_Set_SVE_VL_4896 pass
9908 22:25:49.752295 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
9909 22:25:49.752426 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
9910 22:25:49.752561 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
9911 22:25:49.752684 arm64_sve-ptrace_Set_SVE_VL_4912 pass
9912 22:25:49.752817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
9913 22:25:49.753231 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
9914 22:25:49.753396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
9915 22:25:49.753765 arm64_sve-ptrace_Set_SVE_VL_4928 pass
9916 22:25:49.753945 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
9917 22:25:49.754095 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
9918 22:25:49.754240 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
9919 22:25:49.754437 arm64_sve-ptrace_Set_SVE_VL_4944 pass
9920 22:25:49.776388 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
9921 22:25:49.776680 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
9922 22:25:49.777058 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
9923 22:25:49.777158 arm64_sve-ptrace_Set_SVE_VL_4960 pass
9924 22:25:49.777248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
9925 22:25:49.777325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
9926 22:25:49.777417 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
9927 22:25:49.777494 arm64_sve-ptrace_Set_SVE_VL_4976 pass
9928 22:25:49.777787 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
9929 22:25:49.777896 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
9930 22:25:49.777993 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
9931 22:25:49.778077 arm64_sve-ptrace_Set_SVE_VL_4992 pass
9932 22:25:49.778161 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
9933 22:25:49.778249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
9934 22:25:49.778355 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
9935 22:25:49.778459 arm64_sve-ptrace_Set_SVE_VL_5008 pass
9936 22:25:49.778791 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
9937 22:25:49.778906 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
9938 22:25:49.779029 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
9939 22:25:49.779143 arm64_sve-ptrace_Set_SVE_VL_5024 pass
9940 22:25:49.779261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
9941 22:25:49.779556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
9942 22:25:49.779660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
9943 22:25:49.779779 arm64_sve-ptrace_Set_SVE_VL_5040 pass
9944 22:25:49.780125 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
9945 22:25:49.780229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
9946 22:25:49.780315 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
9947 22:25:49.780618 arm64_sve-ptrace_Set_SVE_VL_5056 pass
9948 22:25:49.780725 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
9949 22:25:49.780825 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
9950 22:25:49.781219 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
9951 22:25:49.781327 arm64_sve-ptrace_Set_SVE_VL_5072 pass
9952 22:25:49.781417 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
9953 22:25:49.781506 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
9954 22:25:49.781609 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
9955 22:25:49.781709 arm64_sve-ptrace_Set_SVE_VL_5088 pass
9956 22:25:49.781813 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
9957 22:25:49.781898 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
9958 22:25:49.786440 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
9959 22:25:49.786768 arm64_sve-ptrace_Set_SVE_VL_5104 pass
9960 22:25:49.787276 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
9961 22:25:49.787511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
9962 22:25:49.787702 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
9963 22:25:49.787834 arm64_sve-ptrace_Set_SVE_VL_5120 pass
9964 22:25:49.787950 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
9965 22:25:49.788065 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
9966 22:25:49.788706 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
9967 22:25:49.788893 arm64_sve-ptrace_Set_SVE_VL_5136 pass
9968 22:25:49.788982 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
9969 22:25:49.789065 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
9970 22:25:49.789152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
9971 22:25:49.789241 arm64_sve-ptrace_Set_SVE_VL_5152 pass
9972 22:25:49.789321 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
9973 22:25:49.789404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
9974 22:25:49.789488 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
9975 22:25:49.789773 arm64_sve-ptrace_Set_SVE_VL_5168 pass
9976 22:25:49.789884 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
9977 22:25:49.789997 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
9978 22:25:49.790087 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
9979 22:25:49.790187 arm64_sve-ptrace_Set_SVE_VL_5184 pass
9980 22:25:49.790274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
9981 22:25:49.790357 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
9982 22:25:49.790452 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
9983 22:25:49.794637 arm64_sve-ptrace_Set_SVE_VL_5200 pass
9984 22:25:49.794892 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
9985 22:25:49.795043 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
9986 22:25:49.795401 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
9987 22:25:49.795544 arm64_sve-ptrace_Set_SVE_VL_5216 pass
9988 22:25:49.795701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
9989 22:25:49.795860 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
9990 22:25:49.796025 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
9991 22:25:49.796174 arm64_sve-ptrace_Set_SVE_VL_5232 pass
9992 22:25:49.796569 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
9993 22:25:49.796673 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
9994 22:25:49.796786 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
9995 22:25:49.796896 arm64_sve-ptrace_Set_SVE_VL_5248 pass
9996 22:25:49.797008 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
9997 22:25:49.797115 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
9998 22:25:49.797225 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
9999 22:25:49.797355 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10000 22:25:49.797713 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10001 22:25:49.797828 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10002 22:25:49.797923 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10003 22:25:49.798012 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10004 22:25:49.798091 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10005 22:25:49.798173 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10006 22:25:49.798259 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10007 22:25:49.798341 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10008 22:25:49.798428 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10009 22:25:49.802371 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10010 22:25:49.803753 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10011 22:25:49.803909 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10012 22:25:49.803991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10013 22:25:49.804056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10014 22:25:49.804116 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10015 22:25:49.804175 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10016 22:25:49.804233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10017 22:25:49.804291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10018 22:25:49.804350 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10019 22:25:49.804408 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10020 22:25:49.804482 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10021 22:25:49.804549 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10022 22:25:49.804610 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10023 22:25:49.804682 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10024 22:25:49.804961 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10025 22:25:49.805269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10026 22:25:49.805366 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10027 22:25:49.805441 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10028 22:25:49.805533 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10029 22:25:49.805623 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10030 22:25:49.805928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10031 22:25:49.806030 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10032 22:25:49.810306 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10033 22:25:49.810753 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10034 22:25:49.810848 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10035 22:25:49.810935 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10036 22:25:49.811021 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10037 22:25:49.811122 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10038 22:25:49.811210 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10039 22:25:49.811296 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10040 22:25:49.811597 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10041 22:25:49.811702 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10042 22:25:49.811805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10043 22:25:49.811892 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10044 22:25:49.811993 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10045 22:25:49.812096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10046 22:25:49.812577 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10047 22:25:49.812681 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10048 22:25:49.812767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10049 22:25:49.812849 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10050 22:25:49.812948 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10051 22:25:49.813034 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10052 22:25:49.813117 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10053 22:25:49.813217 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10054 22:25:49.813317 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10055 22:25:49.813415 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10056 22:25:49.813740 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10057 22:25:49.813858 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10058 22:25:49.813961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10059 22:25:49.822417 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10060 22:25:49.822665 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10061 22:25:49.822966 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10062 22:25:49.823060 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10063 22:25:49.823147 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10064 22:25:49.823235 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10065 22:25:49.823320 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10066 22:25:49.823423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10067 22:25:49.823517 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10068 22:25:49.823612 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10069 22:25:49.823714 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10070 22:25:49.823801 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10071 22:25:49.823900 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10072 22:25:49.823989 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10073 22:25:49.824090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10074 22:25:49.824398 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10075 22:25:49.824504 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10076 22:25:49.824609 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10077 22:25:49.824711 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10078 22:25:49.824799 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10079 22:25:49.824899 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10080 22:25:49.838847 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10081 22:25:49.839097 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10082 22:25:49.839189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10083 22:25:49.839276 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10084 22:25:49.839361 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10085 22:25:49.839448 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10086 22:25:49.839747 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10087 22:25:49.839840 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10088 22:25:49.839927 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10089 22:25:49.840013 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10090 22:25:49.840101 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10091 22:25:49.840185 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10092 22:25:49.840270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10093 22:25:49.840373 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10094 22:25:49.840460 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10095 22:25:49.840546 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10096 22:25:49.840636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10097 22:25:49.840739 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10098 22:25:49.840826 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10099 22:25:49.840913 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10100 22:25:49.841011 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10101 22:25:49.841110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10102 22:25:49.841211 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10103 22:25:49.841311 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10104 22:25:49.841635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10105 22:25:49.841753 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10106 22:25:49.841843 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10107 22:25:49.841929 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10108 22:25:49.846543 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10109 22:25:49.846749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10110 22:25:49.846833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10111 22:25:49.846903 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10112 22:25:49.846983 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10113 22:25:49.847049 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10114 22:25:49.847168 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10115 22:25:49.847284 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10116 22:25:49.847390 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10117 22:25:49.847504 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10118 22:25:49.847814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10119 22:25:49.847906 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10120 22:25:49.847998 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10121 22:25:49.848092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10122 22:25:49.848185 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10123 22:25:49.848293 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10124 22:25:49.848413 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10125 22:25:49.848540 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10126 22:25:49.848846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10127 22:25:49.848930 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10128 22:25:49.849015 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10129 22:25:49.849100 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10130 22:25:49.849364 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10131 22:25:49.849452 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10132 22:25:49.849526 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10133 22:25:49.849782 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10134 22:25:49.849861 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10135 22:25:49.849946 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10136 22:25:49.854363 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10137 22:25:49.854787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10138 22:25:49.854868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10139 22:25:49.854941 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10140 22:25:49.855322 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10141 22:25:49.855420 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10142 22:25:49.855494 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10143 22:25:49.855567 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10144 22:25:49.855641 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10145 22:25:49.855939 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10146 22:25:49.856032 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10147 22:25:49.856106 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10148 22:25:49.856177 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10149 22:25:49.856247 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10150 22:25:49.856318 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10151 22:25:49.856402 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10152 22:25:49.856475 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10153 22:25:49.856547 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10154 22:25:49.856633 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10155 22:25:49.856708 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10156 22:25:49.856790 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10157 22:25:49.856884 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10158 22:25:49.857344 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10159 22:25:49.857634 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10160 22:25:49.857752 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10161 22:25:49.857836 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10162 22:25:49.858053 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10163 22:25:49.858157 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10164 22:25:49.858266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10165 22:25:49.862358 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10166 22:25:49.862852 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10167 22:25:49.862951 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10168 22:25:49.863027 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10169 22:25:49.863116 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10170 22:25:49.863190 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10171 22:25:49.863262 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10172 22:25:49.863346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10173 22:25:49.863430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10174 22:25:49.863741 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10175 22:25:49.863837 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10176 22:25:49.864171 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10177 22:25:49.864273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10178 22:25:49.864365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10179 22:25:49.864460 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10180 22:25:49.864558 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10181 22:25:49.864658 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10182 22:25:49.864954 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10183 22:25:49.865056 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10184 22:25:49.865149 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10185 22:25:49.865238 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10186 22:25:49.865335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10187 22:25:49.865423 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10188 22:25:49.865705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10189 22:25:49.865821 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10190 22:25:49.870520 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10191 22:25:49.870767 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10192 22:25:49.871069 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10193 22:25:49.871167 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10194 22:25:49.871262 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10195 22:25:49.871369 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10196 22:25:49.871477 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10197 22:25:49.871566 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10198 22:25:49.871655 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10199 22:25:49.871760 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10200 22:25:49.871860 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10201 22:25:49.871963 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10202 22:25:49.872069 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10203 22:25:49.872161 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10204 22:25:49.872429 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10205 22:25:49.872533 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10206 22:25:49.872801 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10207 22:25:49.872900 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10208 22:25:49.873022 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10209 22:25:49.873146 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10210 22:25:49.873258 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10211 22:25:49.873361 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10212 22:25:49.873464 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10213 22:25:49.873765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10214 22:25:49.873911 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10215 22:25:49.874018 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10216 22:25:49.878379 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10217 22:25:49.878844 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10218 22:25:49.878953 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10219 22:25:49.879040 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10220 22:25:49.879123 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10221 22:25:49.879223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10222 22:25:49.879307 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10223 22:25:49.879369 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10224 22:25:49.879443 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10225 22:25:49.879729 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10226 22:25:49.879826 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10227 22:25:49.879945 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10228 22:25:49.880037 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10229 22:25:49.880161 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10230 22:25:49.880245 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10231 22:25:49.880339 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10232 22:25:49.880427 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10233 22:25:49.880701 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10234 22:25:49.880806 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10235 22:25:49.880912 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10236 22:25:49.881044 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10237 22:25:49.881164 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10238 22:25:49.881289 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10239 22:25:49.881397 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10240 22:25:49.907527 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10241 22:25:49.907813 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10242 22:25:49.908153 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10243 22:25:49.908264 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10244 22:25:49.908375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10245 22:25:49.908481 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10246 22:25:49.908583 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10247 22:25:49.908709 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10248 22:25:49.908810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10249 22:25:49.908914 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10250 22:25:49.909045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10251 22:25:49.909154 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10252 22:25:49.909263 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10253 22:25:49.909393 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10254 22:25:49.909500 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10255 22:25:49.909624 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10256 22:25:49.909749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10257 22:25:49.909877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10258 22:25:49.909973 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10259 22:25:49.914376 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10260 22:25:49.914607 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10261 22:25:49.914917 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10262 22:25:49.915023 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10263 22:25:49.915117 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10264 22:25:49.915222 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10265 22:25:49.915312 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10266 22:25:49.915416 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10267 22:25:49.915511 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10268 22:25:49.915614 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10269 22:25:49.915718 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10270 22:25:49.916020 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10271 22:25:49.916141 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10272 22:25:49.916259 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10273 22:25:49.916372 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10274 22:25:49.916747 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10275 22:25:49.916850 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10276 22:25:49.916951 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10277 22:25:49.917257 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10278 22:25:49.917365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10279 22:25:49.917461 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10280 22:25:49.917787 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10281 22:25:49.917894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10282 22:25:49.922302 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10283 22:25:49.922745 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10284 22:25:49.922851 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10285 22:25:49.922937 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10286 22:25:49.923035 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10287 22:25:49.923117 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10288 22:25:49.923215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10289 22:25:49.923436 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10290 22:25:49.923532 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10291 22:25:49.923634 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10292 22:25:49.923958 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10293 22:25:49.924052 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10294 22:25:49.924127 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10295 22:25:49.924417 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10296 22:25:49.924511 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10297 22:25:49.924586 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10298 22:25:49.924673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10299 22:25:49.924749 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10300 22:25:49.924839 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10301 22:25:49.925186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10302 22:25:49.925333 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10303 22:25:49.925636 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10304 22:25:49.925745 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10305 22:25:49.925832 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10306 22:25:49.925922 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10307 22:25:49.925998 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10308 22:25:49.930322 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10309 22:25:49.930755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10310 22:25:49.930857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10311 22:25:49.930938 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10312 22:25:49.931033 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10313 22:25:49.931113 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10314 22:25:49.931204 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10315 22:25:49.931294 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10316 22:25:49.931597 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10317 22:25:49.931705 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10318 22:25:49.931984 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10319 22:25:49.932091 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10320 22:25:49.932243 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10321 22:25:49.932356 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10322 22:25:49.932447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10323 22:25:49.932634 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10324 22:25:49.932753 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10325 22:25:49.932854 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10326 22:25:49.933148 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10327 22:25:49.933828 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10328 22:25:49.933932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10329 22:25:49.934019 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10330 22:25:49.934104 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10331 22:25:49.934189 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10332 22:25:49.934269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10333 22:25:49.934348 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10334 22:25:49.938434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10335 22:25:49.938710 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10336 22:25:49.939012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10337 22:25:49.939119 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10338 22:25:49.939209 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10339 22:25:49.939295 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10340 22:25:49.939381 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10341 22:25:49.939482 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10342 22:25:49.939569 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10343 22:25:49.939672 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10344 22:25:49.939774 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10345 22:25:49.940090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10346 22:25:49.940197 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10347 22:25:49.940488 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10348 22:25:49.940597 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10349 22:25:49.940702 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10350 22:25:49.940807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10351 22:25:49.941278 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10352 22:25:49.941518 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10353 22:25:49.941634 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10354 22:25:49.941729 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10355 22:25:49.941811 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10356 22:25:49.941882 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10357 22:25:49.941969 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10358 22:25:49.942045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10359 22:25:49.946345 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10360 22:25:49.946806 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10361 22:25:49.946906 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10362 22:25:49.946990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10363 22:25:49.947087 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10364 22:25:49.947168 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10365 22:25:49.947464 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10366 22:25:49.947563 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10367 22:25:49.947654 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10368 22:25:49.947920 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10369 22:25:49.948030 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10370 22:25:49.948120 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10371 22:25:49.948280 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10372 22:25:49.948394 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10373 22:25:49.948729 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10374 22:25:49.948965 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10375 22:25:49.949153 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10376 22:25:49.949339 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10377 22:25:49.949536 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10378 22:25:49.949740 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10379 22:25:49.949956 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10380 22:25:49.950174 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10381 22:25:49.950307 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10382 22:25:49.954845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10383 22:25:49.955075 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10384 22:25:49.955170 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10385 22:25:49.955264 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10386 22:25:49.955579 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10387 22:25:49.955686 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10388 22:25:49.955778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10389 22:25:49.955869 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10390 22:25:49.955976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10391 22:25:49.956068 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10392 22:25:49.956158 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10393 22:25:49.956437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10394 22:25:49.956542 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10395 22:25:49.956627 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10396 22:25:49.956711 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10397 22:25:49.956793 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10398 22:25:49.956892 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10399 22:25:49.956982 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10400 22:25:49.968207 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10401 22:25:49.968457 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10402 22:25:49.968549 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10403 22:25:49.968923 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10404 22:25:49.969032 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10405 22:25:49.969121 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10406 22:25:49.969207 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10407 22:25:49.969308 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10408 22:25:49.969395 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10409 22:25:49.969479 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10410 22:25:49.969875 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10411 22:25:49.969981 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10412 22:25:49.970066 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10413 22:25:49.970383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10414 22:25:49.970493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10415 22:25:49.970597 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10416 22:25:49.970698 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10417 22:25:49.971132 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10418 22:25:49.971244 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10419 22:25:49.971410 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10420 22:25:49.971520 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10421 22:25:49.971622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10422 22:25:49.971723 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10423 22:25:49.972190 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10424 22:25:49.972305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10425 22:25:49.972409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10426 22:25:49.972497 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10427 22:25:49.972598 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10428 22:25:49.972699 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10429 22:25:49.973009 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10430 22:25:49.973113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10431 22:25:49.973213 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10432 22:25:49.973314 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10433 22:25:49.973635 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10434 22:25:49.973764 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10435 22:25:49.973864 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10436 22:25:49.978518 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10437 22:25:49.978778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10438 22:25:49.979182 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10439 22:25:49.979294 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10440 22:25:49.979385 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10441 22:25:49.979471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10442 22:25:49.979711 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10443 22:25:49.979981 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10444 22:25:49.980132 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10445 22:25:49.980245 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10446 22:25:49.980336 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10447 22:25:49.980538 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10448 22:25:49.980704 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10449 22:25:49.980800 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10450 22:25:49.980889 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10451 22:25:49.980975 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10452 22:25:49.981078 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10453 22:25:49.981182 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10454 22:25:49.981285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10455 22:25:49.981387 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10456 22:25:49.981698 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10457 22:25:49.981816 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10458 22:25:49.986377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10459 22:25:49.986603 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10460 22:25:49.986940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10461 22:25:49.987044 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10462 22:25:49.987197 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10463 22:25:49.987295 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10464 22:25:49.987404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10465 22:25:49.987599 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10466 22:25:49.987703 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10467 22:25:49.987810 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10468 22:25:49.987904 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10469 22:25:49.988008 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10470 22:25:49.988113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10471 22:25:49.993975 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10472 22:25:49.994082 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10473 22:25:49.994169 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10474 22:25:49.994253 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10475 22:25:49.994339 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10476 22:25:49.994427 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10477 22:25:49.994512 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10478 22:25:49.994599 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10479 22:25:49.994684 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10480 22:25:49.994771 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10481 22:25:49.994856 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10482 22:25:49.994942 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10483 22:25:49.995026 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10484 22:25:49.995134 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10485 22:25:49.995224 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10486 22:25:49.995311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10487 22:25:49.995398 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10488 22:25:49.995482 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10489 22:25:49.995583 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10490 22:25:49.995673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10491 22:25:49.995760 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10492 22:25:49.995861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10493 22:25:49.995951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10494 22:25:49.996054 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10495 22:25:49.996155 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10496 22:25:49.996264 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10497 22:25:49.997721 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10498 22:25:49.997833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10499 22:25:49.997941 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10500 22:25:49.998032 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10501 22:25:49.998115 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10502 22:25:49.998196 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10503 22:25:49.998279 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10504 22:25:49.998358 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10505 22:25:49.998439 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10506 22:25:49.998536 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10507 22:25:49.998622 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10508 22:25:50.006494 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10509 22:25:50.006749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10510 22:25:50.007074 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10511 22:25:50.007177 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10512 22:25:50.007277 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10513 22:25:50.007383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10514 22:25:50.007506 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10515 22:25:50.007607 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10516 22:25:50.007718 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10517 22:25:50.007842 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10518 22:25:50.007918 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10519 22:25:50.007994 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10520 22:25:50.008091 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10521 22:25:50.008211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10522 22:25:50.008569 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10523 22:25:50.008662 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10524 22:25:50.008778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10525 22:25:50.008866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10526 22:25:50.008972 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10527 22:25:50.009057 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10528 22:25:50.010092 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10529 22:25:50.010173 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10530 22:25:50.010235 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10531 22:25:50.010294 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10532 22:25:50.010353 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10533 22:25:50.010412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10534 22:25:50.010471 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10535 22:25:50.010530 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10536 22:25:50.010588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10537 22:25:50.014347 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10538 22:25:50.014781 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10539 22:25:50.014888 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10540 22:25:50.014979 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10541 22:25:50.015066 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10542 22:25:50.015170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10543 22:25:50.015259 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10544 22:25:50.015361 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10545 22:25:50.015525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10546 22:25:50.015645 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10547 22:25:50.015750 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10548 22:25:50.016076 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10549 22:25:50.016180 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10550 22:25:50.016284 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10551 22:25:50.016386 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10552 22:25:50.016740 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10553 22:25:50.016848 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10554 22:25:50.016959 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10555 22:25:50.017091 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10556 22:25:50.017209 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10557 22:25:50.017522 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10558 22:25:50.017666 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10559 22:25:50.017773 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10560 22:25:50.031766 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10561 22:25:50.032022 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10562 22:25:50.032357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10563 22:25:50.032479 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10564 22:25:50.032593 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10565 22:25:50.032707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10566 22:25:50.032842 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10567 22:25:50.032959 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10568 22:25:50.033072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10569 22:25:50.033168 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10570 22:25:50.033285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10571 22:25:50.033381 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10572 22:25:50.033682 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10573 22:25:50.033785 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10574 22:25:50.034119 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10575 22:25:50.034219 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10576 22:25:50.034501 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10577 22:25:50.034593 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10578 22:25:50.034670 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10579 22:25:50.034944 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10580 22:25:50.035043 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10581 22:25:50.035120 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10582 22:25:50.035475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10583 22:25:50.035592 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10584 22:25:50.035674 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10585 22:25:50.035951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10586 22:25:50.036042 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10587 22:25:50.036117 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10588 22:25:50.036820 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10589 22:25:50.036913 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10590 22:25:50.036989 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10591 22:25:50.037061 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10592 22:25:50.037150 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10593 22:25:50.037227 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10594 22:25:50.037300 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10595 22:25:50.037679 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10596 22:25:50.037775 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10597 22:25:50.037860 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10598 22:25:50.038137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10599 22:25:50.038234 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10600 22:25:50.038312 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10601 22:25:50.038392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10602 22:25:50.042439 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10603 22:25:50.042898 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10604 22:25:50.043003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10605 22:25:50.043083 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10606 22:25:50.043160 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10607 22:25:50.043258 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10608 22:25:50.043589 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10609 22:25:50.043738 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10610 22:25:50.043833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10611 22:25:50.043909 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10612 22:25:50.044003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10613 22:25:50.044092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10614 22:25:50.044392 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10615 22:25:50.044485 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10616 22:25:50.044580 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10617 22:25:50.044933 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10618 22:25:50.045070 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10619 22:25:50.045164 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10620 22:25:50.045244 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10621 22:25:50.045544 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10622 22:25:50.045641 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10623 22:25:50.045770 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10624 22:25:50.045888 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10625 22:25:50.054464 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10626 22:25:50.054885 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10627 22:25:50.054985 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10628 22:25:50.055071 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10629 22:25:50.055168 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10630 22:25:50.055254 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10631 22:25:50.055346 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10632 22:25:50.055445 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10633 22:25:50.055543 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10634 22:25:50.055868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10635 22:25:50.056023 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10636 22:25:50.056178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10637 22:25:50.056333 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10638 22:25:50.056465 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10639 22:25:50.056619 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10640 22:25:50.056798 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10641 22:25:50.056974 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10642 22:25:50.057134 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10643 22:25:50.057263 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10644 22:25:50.057414 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10645 22:25:50.057571 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10646 22:25:50.057734 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10647 22:25:50.057883 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10648 22:25:50.062592 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10649 22:25:50.063931 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10650 22:25:50.064361 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10651 22:25:50.064469 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10652 22:25:50.064557 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10653 22:25:50.064644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10654 22:25:50.064728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10655 22:25:50.064814 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10656 22:25:50.064899 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10657 22:25:50.064984 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10658 22:25:50.065074 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10659 22:25:50.065160 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10660 22:25:50.065244 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10661 22:25:50.065330 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10662 22:25:50.065434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10663 22:25:50.065523 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10664 22:25:50.065608 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10665 22:25:50.065706 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10666 22:25:50.065792 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10667 22:25:50.065876 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10668 22:25:50.065978 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10669 22:25:50.066065 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10670 22:25:50.066146 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10671 22:25:50.066228 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10672 22:25:50.070216 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10673 22:25:50.070580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10674 22:25:50.070685 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10675 22:25:50.070788 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10676 22:25:50.070889 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10677 22:25:50.070989 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10678 22:25:50.071308 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10679 22:25:50.071414 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10680 22:25:50.071803 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10681 22:25:50.071908 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10682 22:25:50.071998 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10683 22:25:50.072099 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10684 22:25:50.072292 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10685 22:25:50.072399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10686 22:25:50.072701 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10687 22:25:50.072806 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10688 22:25:50.072908 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10689 22:25:50.073010 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10690 22:25:50.073113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10691 22:25:50.073333 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10692 22:25:50.073453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10693 22:25:50.073751 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10694 22:25:50.073870 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10695 22:25:50.073979 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10696 22:25:50.078117 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10697 22:25:50.078447 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10698 22:25:50.078555 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10699 22:25:50.078678 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10700 22:25:50.078796 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10701 22:25:50.079089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10702 22:25:50.079196 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10703 22:25:50.079301 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10704 22:25:50.079392 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10705 22:25:50.079495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10706 22:25:50.079788 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10707 22:25:50.079892 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10708 22:25:50.079996 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10709 22:25:50.080099 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10710 22:25:50.080388 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10711 22:25:50.080485 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10712 22:25:50.080800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10713 22:25:50.080921 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10714 22:25:50.081027 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10715 22:25:50.081117 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10716 22:25:50.081418 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10717 22:25:50.081543 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10718 22:25:50.081673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10719 22:25:50.081775 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10720 22:25:50.092889 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10721 22:25:50.093347 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10722 22:25:50.093452 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10723 22:25:50.093540 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10724 22:25:50.093623 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10725 22:25:50.093733 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10726 22:25:50.093819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10727 22:25:50.093902 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10728 22:25:50.093997 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10729 22:25:50.094086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10730 22:25:50.094426 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10731 22:25:50.094715 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10732 22:25:50.094997 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10733 22:25:50.095388 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10734 22:25:50.095503 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10735 22:25:50.095599 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10736 22:25:50.095895 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10737 22:25:50.096013 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10738 22:25:50.096119 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10739 22:25:50.096412 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10740 22:25:50.096532 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10741 22:25:50.096863 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10742 22:25:50.096969 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10743 22:25:50.097076 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10744 22:25:50.097373 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10745 22:25:50.097496 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10746 22:25:50.097829 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10747 22:25:50.097928 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10748 22:25:50.102200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10749 22:25:50.102508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10750 22:25:50.102613 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10751 22:25:50.102743 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10752 22:25:50.102855 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10753 22:25:50.103203 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10754 22:25:50.103399 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10755 22:25:50.103594 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10756 22:25:50.103762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10757 22:25:50.103897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10758 22:25:50.104054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10759 22:25:50.104208 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10760 22:25:50.104383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10761 22:25:50.104554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10762 22:25:50.104997 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10763 22:25:50.105150 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10764 22:25:50.105300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10765 22:25:50.105476 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10766 22:25:50.105672 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10767 22:25:50.105833 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10768 22:25:50.106019 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10769 22:25:50.106156 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10770 22:25:50.110401 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10771 22:25:50.110843 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10772 22:25:50.111098 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10773 22:25:50.111231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10774 22:25:50.111341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10775 22:25:50.111456 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10776 22:25:50.111589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10777 22:25:50.111697 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10778 22:25:50.111821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10779 22:25:50.111930 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10780 22:25:50.112050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10781 22:25:50.112364 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10782 22:25:50.112491 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10783 22:25:50.112595 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10784 22:25:50.112921 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10785 22:25:50.113028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10786 22:25:50.113158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10787 22:25:50.113282 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10788 22:25:50.113408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10789 22:25:50.113714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10790 22:25:50.113854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10791 22:25:50.113980 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10792 22:25:50.118265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10793 22:25:50.118596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10794 22:25:50.118702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10795 22:25:50.119057 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10796 22:25:50.119199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10797 22:25:50.119334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10798 22:25:50.119707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10799 22:25:50.119862 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10800 22:25:50.120002 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10801 22:25:50.120414 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10802 22:25:50.120570 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10803 22:25:50.120706 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10804 22:25:50.120837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10805 22:25:50.121200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10806 22:25:50.121306 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10807 22:25:50.121399 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10808 22:25:50.121486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10809 22:25:50.121582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10810 22:25:50.121907 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10811 22:25:50.121996 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10812 22:25:50.122094 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10813 22:25:50.126256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10814 22:25:50.126608 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10815 22:25:50.126716 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10816 22:25:50.127027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10817 22:25:50.127136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10818 22:25:50.127237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10819 22:25:50.127337 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10820 22:25:50.127639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10821 22:25:50.127790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10822 22:25:50.128098 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10823 22:25:50.128218 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10824 22:25:50.128523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10825 22:25:50.128627 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10826 22:25:50.128930 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10827 22:25:50.129025 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10828 22:25:50.129116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10829 22:25:50.129450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10830 22:25:50.129811 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10831 22:25:50.129912 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
10832 22:25:50.129982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
10833 22:25:50.130069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
10834 22:25:50.134162 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
10835 22:25:50.134505 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
10836 22:25:50.134588 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
10837 22:25:50.134860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
10838 22:25:50.134964 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
10839 22:25:50.135054 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
10840 22:25:50.135155 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
10841 22:25:50.135257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
10842 22:25:50.135365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
10843 22:25:50.135648 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
10844 22:25:50.135777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
10845 22:25:50.136090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
10846 22:25:50.136202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
10847 22:25:50.136312 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
10848 22:25:50.136423 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
10849 22:25:50.136732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
10850 22:25:50.136846 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
10851 22:25:50.136973 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
10852 22:25:50.137083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
10853 22:25:50.137402 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
10854 22:25:50.137523 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
10855 22:25:50.137839 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
10856 22:25:50.137955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
10857 22:25:50.153040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
10858 22:25:50.153530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
10859 22:25:50.153638 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
10860 22:25:50.153736 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
10861 22:25:50.153840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
10862 22:25:50.154134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
10863 22:25:50.154250 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
10864 22:25:50.154545 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
10865 22:25:50.154671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
10866 22:25:50.155005 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
10867 22:25:50.155114 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
10868 22:25:50.155229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
10869 22:25:50.155352 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
10870 22:25:50.155664 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
10871 22:25:50.155785 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
10872 22:25:50.156143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
10873 22:25:50.156275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
10874 22:25:50.156833 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
10875 22:25:50.156968 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
10876 22:25:50.157309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
10877 22:25:50.157442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
10878 22:25:50.157786 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
10879 22:25:50.158089 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
10880 22:25:50.162144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
10881 22:25:50.162472 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
10882 22:25:50.162790 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
10883 22:25:50.162895 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
10884 22:25:50.163000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
10885 22:25:50.163355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
10886 22:25:50.163465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
10887 22:25:50.163568 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
10888 22:25:50.163869 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
10889 22:25:50.163979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
10890 22:25:50.164315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
10891 22:25:50.164422 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
10892 22:25:50.164525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
10893 22:25:50.165766 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
10894 22:25:50.165901 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
10895 22:25:50.165995 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
10896 22:25:50.166083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
10897 22:25:50.166169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
10898 22:25:50.166255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
10899 22:25:50.166340 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
10900 22:25:50.166422 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
10901 22:25:50.166707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
10902 22:25:50.170208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
10903 22:25:50.170564 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
10904 22:25:50.171206 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
10905 22:25:50.171432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
10906 22:25:50.171636 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
10907 22:25:50.171732 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
10908 22:25:50.171992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
10909 22:25:50.172095 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
10910 22:25:50.172196 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
10911 22:25:50.172280 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
10912 22:25:50.172360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
10913 22:25:50.172727 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
10914 22:25:50.172832 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
10915 22:25:50.172922 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
10916 22:25:50.173009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
10917 22:25:50.173307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
10918 22:25:50.173408 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
10919 22:25:50.173509 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
10920 22:25:50.173607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
10921 22:25:50.173721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
10922 22:25:50.174005 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
10923 22:25:50.174099 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
10924 22:25:50.178220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
10925 22:25:50.178582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
10926 22:25:50.178706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
10927 22:25:50.178816 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
10928 22:25:50.178918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
10929 22:25:50.179020 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
10930 22:25:50.179334 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
10931 22:25:50.179437 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
10932 22:25:50.179564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
10933 22:25:50.179859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
10934 22:25:50.180178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
10935 22:25:50.180287 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
10936 22:25:50.180393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
10937 22:25:50.180505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
10938 22:25:50.180815 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
10939 22:25:50.180932 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
10940 22:25:50.181034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
10941 22:25:50.181334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
10942 22:25:50.181657 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
10943 22:25:50.181765 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
10944 22:25:50.181870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
10945 22:25:50.186300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
10946 22:25:50.186688 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
10947 22:25:50.186794 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
10948 22:25:50.186901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
10949 22:25:50.187012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
10950 22:25:50.187140 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
10951 22:25:50.187334 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
10952 22:25:50.187506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
10953 22:25:50.187632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
10954 22:25:50.188145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
10955 22:25:50.188273 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
10956 22:25:50.188395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
10957 22:25:50.188512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
10958 22:25:50.188603 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
10959 22:25:50.188702 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
10960 22:25:50.189097 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
10961 22:25:50.189202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
10962 22:25:50.189306 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
10963 22:25:50.189405 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
10964 22:25:50.189795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
10965 22:25:50.189945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
10966 22:25:50.190050 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
10967 22:25:50.194127 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
10968 22:25:50.194445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
10969 22:25:50.194570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
10970 22:25:50.194885 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
10971 22:25:50.194987 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
10972 22:25:50.195113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
10973 22:25:50.195221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
10974 22:25:50.195565 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
10975 22:25:50.195881 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
10976 22:25:50.196007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
10977 22:25:50.196104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
10978 22:25:50.196203 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
10979 22:25:50.196292 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
10980 22:25:50.196408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
10981 22:25:50.197716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
10982 22:25:50.197819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
10983 22:25:50.197925 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
10984 22:25:50.198007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
10985 22:25:50.198080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
10986 22:25:50.198142 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
10987 22:25:50.198201 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
10988 22:25:50.198277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
10989 22:25:50.198342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
10990 22:25:50.206148 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
10991 22:25:50.206501 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
10992 22:25:50.206585 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
10993 22:25:50.212376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
10994 22:25:50.213516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
10995 22:25:50.213656 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
10996 22:25:50.213744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
10997 22:25:50.213824 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
10998 22:25:50.213900 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
10999 22:25:50.213978 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11000 22:25:50.214054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11001 22:25:50.214155 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11002 22:25:50.214239 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11003 22:25:50.214319 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11004 22:25:50.214413 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11005 22:25:50.214510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11006 22:25:50.214810 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11007 22:25:50.214909 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11008 22:25:50.215016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11009 22:25:50.215114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11010 22:25:50.215404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11011 22:25:50.215521 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11012 22:25:50.215615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11013 22:25:50.215901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11014 22:25:50.215995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11015 22:25:50.216084 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11016 22:25:50.216175 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11017 22:25:50.216448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11018 22:25:50.216727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11019 22:25:50.216832 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11020 22:25:50.217120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11021 22:25:50.217230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11022 22:25:50.217533 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11023 22:25:50.217656 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11024 22:25:50.217950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11025 22:25:50.222302 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11026 22:25:50.222742 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11027 22:25:50.222844 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11028 22:25:50.222953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11029 22:25:50.223064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11030 22:25:50.223366 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11031 22:25:50.223476 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11032 22:25:50.223571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11033 22:25:50.223862 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11034 22:25:50.224166 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11035 22:25:50.224260 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11036 22:25:50.224554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11037 22:25:50.224653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11038 22:25:50.224758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11039 22:25:50.224838 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11040 22:25:50.224934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11041 22:25:50.225219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11042 22:25:50.225335 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11043 22:25:50.225662 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11044 22:25:50.225784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11045 22:25:50.225892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11046 22:25:50.230235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11047 22:25:50.231053 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11048 22:25:50.231156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11049 22:25:50.231238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11050 22:25:50.231316 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11051 22:25:50.231393 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11052 22:25:50.231470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11053 22:25:50.231745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11054 22:25:50.231832 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11055 22:25:50.231933 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11056 22:25:50.232032 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11057 22:25:50.232150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11058 22:25:50.232245 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11059 22:25:50.232356 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11060 22:25:50.232442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11061 22:25:50.232710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11062 22:25:50.232993 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11063 22:25:50.233078 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11064 22:25:50.233196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11065 22:25:50.233305 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11066 22:25:50.233427 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11067 22:25:50.233546 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11068 22:25:50.233858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11069 22:25:50.238251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11070 22:25:50.238725 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11071 22:25:50.238846 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11072 22:25:50.238944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11073 22:25:50.239054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11074 22:25:50.239163 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11075 22:25:50.239469 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11076 22:25:50.239580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11077 22:25:50.239690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11078 22:25:50.239797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11079 22:25:50.239903 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11080 22:25:50.240009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11081 22:25:50.240321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11082 22:25:50.240450 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11083 22:25:50.240544 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11084 22:25:50.240650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11085 22:25:50.240792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11086 22:25:50.241087 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11087 22:25:50.241211 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11088 22:25:50.241320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11089 22:25:50.241431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11090 22:25:50.241706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11091 22:25:50.241818 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11092 22:25:50.241925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11093 22:25:50.246585 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11094 22:25:50.246809 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11095 22:25:50.246909 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11096 22:25:50.246988 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11097 22:25:50.247078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11098 22:25:50.247176 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11099 22:25:50.247269 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11100 22:25:50.247362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11101 22:25:50.247683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11102 22:25:50.247792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11103 22:25:50.247882 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11104 22:25:50.248154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11105 22:25:50.248249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11106 22:25:50.248340 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11107 22:25:50.248616 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11108 22:25:50.248723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11109 22:25:50.248803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11110 22:25:50.249078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11111 22:25:50.249181 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11112 22:25:50.249538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11113 22:25:50.249630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11114 22:25:50.249937 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11115 22:25:50.250041 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11116 22:25:50.250152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11117 22:25:50.250230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11118 22:25:50.250305 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11119 22:25:50.255265 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11120 22:25:50.255505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11121 22:25:50.255588 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11122 22:25:50.255838 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11123 22:25:50.255933 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11124 22:25:50.256010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11125 22:25:50.256083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11126 22:25:50.256155 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11127 22:25:50.269643 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11128 22:25:50.270004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11129 22:25:50.270477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11130 22:25:50.270724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11131 22:25:50.270981 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11132 22:25:50.271239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11133 22:25:50.271465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11134 22:25:50.271682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11135 22:25:50.271884 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11136 22:25:50.272062 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11137 22:25:50.272311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11138 22:25:50.272512 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11139 22:25:50.272709 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11140 22:25:50.272925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11141 22:25:50.273123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11142 22:25:50.273338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11143 22:25:50.273518 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11144 22:25:50.274335 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11145 22:25:50.274524 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11146 22:25:50.274660 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11147 22:25:50.274787 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11148 22:25:50.274913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11149 22:25:50.275037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11150 22:25:50.275160 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11151 22:25:50.275281 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11152 22:25:50.275403 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11153 22:25:50.275524 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11154 22:25:50.275645 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11155 22:25:50.275767 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11156 22:25:50.278632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11157 22:25:50.278893 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11158 22:25:50.279288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11159 22:25:50.279444 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11160 22:25:50.279557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11161 22:25:50.279647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11162 22:25:50.279734 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11163 22:25:50.279821 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11164 22:25:50.280115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11165 22:25:50.280218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11166 22:25:50.280308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11167 22:25:50.280396 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11168 22:25:50.280481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11169 22:25:50.280564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11170 22:25:50.280665 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11171 22:25:50.280754 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11172 22:25:50.280837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11173 22:25:50.280939 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11174 22:25:50.281026 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11175 22:25:50.281128 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11176 22:25:50.281231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11177 22:25:50.281342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11178 22:25:50.281704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11179 22:25:50.281819 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11180 22:25:50.281934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11181 22:25:50.282240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11182 22:25:50.286179 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11183 22:25:50.286634 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11184 22:25:50.286747 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11185 22:25:50.286840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11186 22:25:50.289958 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11187 22:25:50.290185 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11188 22:25:50.290280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11189 22:25:50.290368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11190 22:25:50.290456 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11191 22:25:50.290544 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11192 22:25:50.290633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11193 22:25:50.290721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11194 22:25:50.290809 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11195 22:25:50.290896 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11196 22:25:50.290983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11197 22:25:50.291070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11198 22:25:50.291158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11199 22:25:50.291244 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11200 22:25:50.291330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11201 22:25:50.291417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11202 22:25:50.291504 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11203 22:25:50.291590 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11204 22:25:50.291676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11205 22:25:50.291763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11206 22:25:50.291849 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11207 22:25:50.291937 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11208 22:25:50.292023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11209 22:25:50.292110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11210 22:25:50.292197 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11211 22:25:50.292283 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11212 22:25:50.294236 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11213 22:25:50.294635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11214 22:25:50.294747 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11215 22:25:50.294855 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11216 22:25:50.294945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11217 22:25:50.295049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11218 22:25:50.295154 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11219 22:25:50.295258 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11220 22:25:50.295566 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11221 22:25:50.295681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11222 22:25:50.295789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11223 22:25:50.295879 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11224 22:25:50.295981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11225 22:25:50.296288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11226 22:25:50.296399 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11227 22:25:50.296507 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11228 22:25:50.296615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11229 22:25:50.296909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11230 22:25:50.297004 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11231 22:25:50.297109 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11232 22:25:50.297215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11233 22:25:50.297506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11234 22:25:50.297616 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11235 22:25:50.297938 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11236 22:25:50.298051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11237 22:25:50.302292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11238 22:25:50.302757 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11239 22:25:50.302870 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11240 22:25:50.302965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11241 22:25:50.303065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11242 22:25:50.303151 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11243 22:25:50.303460 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11244 22:25:50.303572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11245 22:25:50.303666 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11246 22:25:50.303773 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11247 22:25:50.303880 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11248 22:25:50.304188 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11249 22:25:50.304299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11250 22:25:50.304406 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11251 22:25:50.304516 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11252 22:25:50.305007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11253 22:25:50.305120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11254 22:25:50.305230 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11255 22:25:50.305336 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11256 22:25:50.305440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11257 22:25:50.305754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11258 22:25:50.305880 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11259 22:25:50.305989 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11260 22:25:50.310430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11261 22:25:50.324737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11262 22:25:50.324988 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11263 22:25:50.325296 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11264 22:25:50.325394 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11265 22:25:50.325486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11266 22:25:50.325597 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11267 22:25:50.325719 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11268 22:25:50.325813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11269 22:25:50.325924 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11270 22:25:50.326236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11271 22:25:50.326562 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11272 22:25:50.326690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11273 22:25:50.326985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11274 22:25:50.327098 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11275 22:25:50.327206 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11276 22:25:50.327699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11277 22:25:50.327828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11278 22:25:50.327938 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11279 22:25:50.328243 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11280 22:25:50.328358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11281 22:25:50.328466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11282 22:25:50.328576 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11283 22:25:50.328882 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11284 22:25:50.329007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11285 22:25:50.329114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11286 22:25:50.329420 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11287 22:25:50.329535 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11288 22:25:50.329657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11289 22:25:50.329765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11290 22:25:50.330074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11291 22:25:50.334195 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11292 22:25:50.334645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11293 22:25:50.334757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11294 22:25:50.334864 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11295 22:25:50.334971 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11296 22:25:50.335085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11297 22:25:50.335403 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11298 22:25:50.335730 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11299 22:25:50.335840 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11300 22:25:50.335947 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11301 22:25:50.336058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11302 22:25:50.336392 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11303 22:25:50.336502 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11304 22:25:50.336612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11305 22:25:50.336917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11306 22:25:50.337028 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11307 22:25:50.337134 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11308 22:25:50.337239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11309 22:25:50.337455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11310 22:25:50.337782 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11311 22:25:50.338038 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11312 22:25:50.338149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11313 22:25:50.342403 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11314 22:25:50.342653 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11315 22:25:50.342748 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11316 22:25:50.342856 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11317 22:25:50.342963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11318 22:25:50.343281 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11319 22:25:50.343394 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11320 22:25:50.343507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11321 22:25:50.343613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11322 22:25:50.343908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11323 22:25:50.344022 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11324 22:25:50.344113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11325 22:25:50.344219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11326 22:25:50.344327 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11327 22:25:50.344515 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11328 22:25:50.344640 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11329 22:25:50.344746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11330 22:25:50.345056 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11331 22:25:50.345171 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11332 22:25:50.345931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11333 22:25:50.346092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11334 22:25:50.346190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11335 22:25:50.346280 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11336 22:25:50.346370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11337 22:25:50.350317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11338 22:25:50.350777 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11339 22:25:50.350881 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11340 22:25:50.350973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11341 22:25:50.351069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11342 22:25:50.351349 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11343 22:25:50.351460 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11344 22:25:50.351568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11345 22:25:50.351685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11346 22:25:50.351792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11347 22:25:50.351899 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11348 22:25:50.352212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11349 22:25:50.352341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11350 22:25:50.352449 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11351 22:25:50.352553 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11352 22:25:50.352871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11353 22:25:50.352985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11354 22:25:50.353092 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11355 22:25:50.353197 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11356 22:25:50.353508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11357 22:25:50.353619 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11358 22:25:50.353739 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11359 22:25:50.353845 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11360 22:25:50.358235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11361 22:25:50.358686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11362 22:25:50.358797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11363 22:25:50.358884 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11364 22:25:50.358984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11365 22:25:50.359069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11366 22:25:50.359168 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11367 22:25:50.359262 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11368 22:25:50.359361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11369 22:25:50.359663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11370 22:25:50.359982 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11371 22:25:50.360089 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11372 22:25:50.360189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11373 22:25:50.360274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11374 22:25:50.360371 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11375 22:25:50.360674 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11376 22:25:50.360795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11377 22:25:50.361087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11378 22:25:50.361210 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11379 22:25:50.361411 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11380 22:25:50.361521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11381 22:25:50.361631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11382 22:25:50.361947 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11383 22:25:50.366179 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11384 22:25:50.366648 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11385 22:25:50.366777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11386 22:25:50.366890 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11387 22:25:50.367022 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11388 22:25:50.367138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11389 22:25:50.367268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11390 22:25:50.367399 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11391 22:25:50.367716 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11392 22:25:50.367825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11393 22:25:50.367936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11394 22:25:50.368066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11395 22:25:50.379807 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11396 22:25:50.380272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11397 22:25:50.380383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11398 22:25:50.380476 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11399 22:25:50.380584 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11400 22:25:50.380683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11401 22:25:50.380790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11402 22:25:50.380889 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11403 22:25:50.380988 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11404 22:25:50.381308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11405 22:25:50.381411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11406 22:25:50.381511 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11407 22:25:50.381606 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11408 22:25:50.381912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11409 22:25:50.382028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11410 22:25:50.382782 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11411 22:25:50.382895 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11412 22:25:50.383217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11413 22:25:50.383344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11414 22:25:50.383468 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11415 22:25:50.383598 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11416 22:25:50.383723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11417 22:25:50.383844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11418 22:25:50.384156 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11419 22:25:50.384255 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11420 22:25:50.384343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11421 22:25:50.384437 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11422 22:25:50.384716 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11423 22:25:50.384809 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11424 22:25:50.385075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11425 22:25:50.385163 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11426 22:25:50.385425 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11427 22:25:50.385500 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11428 22:25:50.385583 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11429 22:25:50.385888 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11430 22:25:50.386194 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11431 22:25:50.386293 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11432 22:25:50.390426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11433 22:25:50.390638 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11434 22:25:50.390930 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11435 22:25:50.391016 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11436 22:25:50.391116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11437 22:25:50.391404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11438 22:25:50.391705 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11439 22:25:50.391809 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11440 22:25:50.391930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11441 22:25:50.392021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11442 22:25:50.392137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11443 22:25:50.392254 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11444 22:25:50.392557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11445 22:25:50.392662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11446 22:25:50.392973 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11447 22:25:50.393074 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11448 22:25:50.393178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11449 22:25:50.393276 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11450 22:25:50.393576 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11451 22:25:50.393714 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11452 22:25:50.393829 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11453 22:25:50.393939 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11454 22:25:50.398202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11455 22:25:50.398673 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11456 22:25:50.398783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11457 22:25:50.398875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11458 22:25:50.398978 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11459 22:25:50.399070 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11460 22:25:50.399321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11461 22:25:50.399446 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11462 22:25:50.399553 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11463 22:25:50.399863 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11464 22:25:50.399957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11465 22:25:50.400043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11466 22:25:50.400426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11467 22:25:50.400519 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11468 22:25:50.400606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11469 22:25:50.400691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11470 22:25:50.405850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11471 22:25:50.406079 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11472 22:25:50.406171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11473 22:25:50.406261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11474 22:25:50.406344 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11475 22:25:50.406428 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11476 22:25:50.406511 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11477 22:25:50.406589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11478 22:25:50.406669 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11479 22:25:50.406752 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11480 22:25:50.406834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11481 22:25:50.406917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11482 22:25:50.406999 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11483 22:25:50.407081 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11484 22:25:50.407165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11485 22:25:50.407247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11486 22:25:50.407330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11487 22:25:50.407410 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11488 22:25:50.407493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11489 22:25:50.407576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11490 22:25:50.407659 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11491 22:25:50.407742 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11492 22:25:50.407826 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11493 22:25:50.407908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11494 22:25:50.407992 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11495 22:25:50.408074 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11496 22:25:50.408158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11497 22:25:50.408242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11498 22:25:50.408326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11499 22:25:50.408409 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11500 22:25:50.418333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11501 22:25:50.418570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11502 22:25:50.418878 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11503 22:25:50.418972 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11504 22:25:50.419068 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11505 22:25:50.419184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11506 22:25:50.419277 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11507 22:25:50.419364 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11508 22:25:50.419465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11509 22:25:50.419559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11510 22:25:50.419660 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11511 22:25:50.419753 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11512 22:25:50.419848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11513 22:25:50.419927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11514 22:25:50.420216 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11515 22:25:50.420324 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11516 22:25:50.420445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11517 22:25:50.420748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11518 22:25:50.420862 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11519 22:25:50.421163 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11520 22:25:50.421277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11521 22:25:50.421558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11522 22:25:50.421674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11523 22:25:50.421763 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11524 22:25:50.421840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11525 22:25:50.421948 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11526 22:25:50.426252 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11527 22:25:50.426649 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11528 22:25:50.426723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11529 22:25:50.437288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11530 22:25:50.437785 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11531 22:25:50.437893 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11532 22:25:50.437979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11533 22:25:50.438072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11534 22:25:50.438172 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11535 22:25:50.438260 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11536 22:25:50.438546 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11537 22:25:50.438663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11538 22:25:50.439113 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11539 22:25:50.439384 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11540 22:25:50.439457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11541 22:25:50.439560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11542 22:25:50.439651 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11543 22:25:50.439919 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11544 22:25:50.440181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11545 22:25:50.440254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11546 22:25:50.440509 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11547 22:25:50.440579 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11548 22:25:50.440654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11549 22:25:50.440914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11550 22:25:50.441173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11551 22:25:50.441252 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11552 22:25:50.441328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11553 22:25:50.441580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11554 22:25:50.441682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11555 22:25:50.441963 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11556 22:25:50.446343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11557 22:25:50.446812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11558 22:25:50.446915 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11559 22:25:50.447015 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11560 22:25:50.447114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11561 22:25:50.447218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11562 22:25:50.447507 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11563 22:25:50.447636 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11564 22:25:50.447971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11565 22:25:50.448100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11566 22:25:50.448225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11567 22:25:50.448568 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11568 22:25:50.448684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11569 22:25:50.448978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11570 22:25:50.449275 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11571 22:25:50.449378 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11572 22:25:50.449670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11573 22:25:50.449772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11574 22:25:50.449869 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11575 22:25:50.449953 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11576 22:25:50.450223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11577 22:25:50.454303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11578 22:25:50.454728 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11579 22:25:50.454828 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11580 22:25:50.454902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11581 22:25:50.454986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11582 22:25:50.455271 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11583 22:25:50.455377 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11584 22:25:50.455463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11585 22:25:50.455565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11586 22:25:50.455850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11587 22:25:50.455959 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11588 22:25:50.456207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11589 22:25:50.456310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11590 22:25:50.456587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11591 22:25:50.456702 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11592 22:25:50.456801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11593 22:25:50.457098 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11594 22:25:50.457214 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11595 22:25:50.457311 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11596 22:25:50.457556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11597 22:25:50.457928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11598 22:25:50.458052 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11599 22:25:50.462375 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11600 22:25:50.462835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11601 22:25:50.462953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11602 22:25:50.463021 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11603 22:25:50.463121 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11604 22:25:50.463406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11605 22:25:50.463517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11606 22:25:50.463806 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11607 22:25:50.463913 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11608 22:25:50.464200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11609 22:25:50.464307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11610 22:25:50.464592 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11611 22:25:50.464683 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11612 22:25:50.464779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11613 22:25:50.465064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11614 22:25:50.465171 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11615 22:25:50.465474 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11616 22:25:50.465572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11617 22:25:50.465862 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11618 22:25:50.465978 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11619 22:25:50.466267 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11620 22:25:50.470327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11621 22:25:50.470741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11622 22:25:50.470817 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11623 22:25:50.470888 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11624 22:25:50.470991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11625 22:25:50.471259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11626 22:25:50.471969 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11627 22:25:50.472054 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11628 22:25:50.472121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11629 22:25:50.472198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11630 22:25:50.472466 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11631 22:25:50.472537 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11632 22:25:50.472602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11633 22:25:50.472677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11634 22:25:50.472925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11635 22:25:50.472993 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11636 22:25:50.473068 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11637 22:25:50.473496 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11638 22:25:50.473569 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11639 22:25:50.473840 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11640 22:25:50.473965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11641 22:25:50.474293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11642 22:25:50.482393 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11643 22:25:50.482855 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11644 22:25:50.482959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11645 22:25:50.483059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11646 22:25:50.483145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11647 22:25:50.483552 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11648 22:25:50.483857 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11649 22:25:50.483965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11650 22:25:50.484067 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11651 22:25:50.484348 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11652 22:25:50.484464 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11653 22:25:50.484767 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11654 22:25:50.484926 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11655 22:25:50.485248 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11656 22:25:50.485363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11657 22:25:50.485677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11658 22:25:50.485793 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11659 22:25:50.485898 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11660 22:25:50.490356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11661 22:25:50.490798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11662 22:25:50.490898 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11663 22:25:50.500759 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11664 22:25:50.501222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11665 22:25:50.501332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11666 22:25:50.501435 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11667 22:25:50.501524 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11668 22:25:50.501622 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11669 22:25:50.501938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11670 22:25:50.502249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11671 22:25:50.502338 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11672 22:25:50.502617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11673 22:25:50.502935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11674 22:25:50.503035 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11675 22:25:50.503141 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11676 22:25:50.503243 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11677 22:25:50.503526 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11678 22:25:50.503641 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11679 22:25:50.503742 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11680 22:25:50.503841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11681 22:25:50.504146 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11682 22:25:50.504263 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11683 22:25:50.504366 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11684 22:25:50.504654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11685 22:25:50.504769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11686 22:25:50.504870 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11687 22:25:50.504968 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11688 22:25:50.505069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11689 22:25:50.505381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11690 22:25:50.505506 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11691 22:25:50.505615 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11692 22:25:50.505733 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11693 22:25:50.506036 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11694 22:25:50.510304 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11695 22:25:50.510725 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11696 22:25:50.510839 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11697 22:25:50.510951 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11698 22:25:50.511061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11699 22:25:50.511167 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11700 22:25:50.511273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11701 22:25:50.511583 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11702 22:25:50.511705 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11703 22:25:50.511798 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11704 22:25:50.511902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11705 22:25:50.512218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11706 22:25:50.512343 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11707 22:25:50.512450 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11708 22:25:50.512764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11709 22:25:50.512890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11710 22:25:50.512997 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11711 22:25:50.513101 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11712 22:25:50.513204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11713 22:25:50.513511 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11714 22:25:50.513634 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11715 22:25:50.513753 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11716 22:25:50.513863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11717 22:25:50.514184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11718 22:25:50.518215 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11719 22:25:50.518652 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11720 22:25:50.518762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11721 22:25:50.518865 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11722 22:25:50.518956 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11723 22:25:50.519254 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11724 22:25:50.519371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11725 22:25:50.519457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11726 22:25:50.519556 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11727 22:25:50.519843 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11728 22:25:50.519948 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11729 22:25:50.520049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11730 22:25:50.520348 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11731 22:25:50.520450 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11732 22:25:50.520551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11733 22:25:50.520650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11734 22:25:50.521054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11735 22:25:50.521163 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11736 22:25:50.521450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11737 22:25:50.521551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11738 22:25:50.521663 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11739 22:25:50.521750 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11740 22:25:50.521847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11741 22:25:50.521952 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11742 22:25:50.527501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11743 22:25:50.527710 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11744 22:25:50.527804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11745 22:25:50.527885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11746 22:25:50.527986 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11747 22:25:50.528078 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11748 22:25:50.528156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11749 22:25:50.528232 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11750 22:25:50.528531 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11751 22:25:50.528633 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11752 22:25:50.528723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11753 22:25:50.528809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11754 22:25:50.528894 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11755 22:25:50.528978 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11756 22:25:50.529082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11757 22:25:50.529159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11758 22:25:50.529230 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11759 22:25:50.529313 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11760 22:25:50.529397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11761 22:25:50.529602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11762 22:25:50.529738 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11763 22:25:50.530015 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11764 22:25:50.534300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11765 22:25:50.534768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11766 22:25:50.534872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11767 22:25:50.534952 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11768 22:25:50.535055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11769 22:25:50.535136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11770 22:25:50.535226 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11771 22:25:50.535316 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11772 22:25:50.535607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11773 22:25:50.535716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11774 22:25:50.536003 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11775 22:25:50.536099 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11776 22:25:50.536190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11777 22:25:50.536473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11778 22:25:50.536582 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11779 22:25:50.536675 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11780 22:25:50.536774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11781 22:25:50.537065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11782 22:25:50.537176 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11783 22:25:50.537278 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11784 22:25:50.537566 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11785 22:25:50.537691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11786 22:25:50.537797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11787 22:25:50.542327 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11788 22:25:50.542562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11789 22:25:50.542852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11790 22:25:50.542949 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11791 22:25:50.543031 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11792 22:25:50.543126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11793 22:25:50.543212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11794 22:25:50.543309 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11795 22:25:50.543403 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11796 22:25:50.543504 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11797 22:25:50.561820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11798 22:25:50.562066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11799 22:25:50.562171 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11800 22:25:50.562505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11801 22:25:50.562612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11802 22:25:50.562713 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11803 22:25:50.563010 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11804 22:25:50.563124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11805 22:25:50.563429 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11806 22:25:50.563527 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11807 22:25:50.563624 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11808 22:25:50.563752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11809 22:25:50.564073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11810 22:25:50.564380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11811 22:25:50.564476 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11812 22:25:50.564558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11813 22:25:50.564654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11814 22:25:50.564942 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11815 22:25:50.565057 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11816 22:25:50.565369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11817 22:25:50.565479 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11818 22:25:50.565590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11819 22:25:50.565695 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11820 22:25:50.566086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11821 22:25:50.566196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11822 22:25:50.570421 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11823 22:25:50.570658 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11824 22:25:50.570966 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11825 22:25:50.571075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11826 22:25:50.571171 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11827 22:25:50.571252 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11828 22:25:50.571339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11829 22:25:50.571645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11830 22:25:50.571741 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11831 22:25:50.571830 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
11832 22:25:50.572118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
11833 22:25:50.572215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
11834 22:25:50.572310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
11835 22:25:50.572642 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
11836 22:25:50.572744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
11837 22:25:50.572823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
11838 22:25:50.572911 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
11839 22:25:50.573437 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
11840 22:25:50.573535 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
11841 22:25:50.573612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
11842 22:25:50.573703 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
11843 22:25:50.573780 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
11844 22:25:50.574094 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
11845 22:25:50.574192 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
11846 22:25:50.574279 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
11847 22:25:50.574357 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
11848 22:25:50.574434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
11849 22:25:50.578374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
11850 22:25:50.578808 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
11851 22:25:50.578929 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
11852 22:25:50.579047 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
11853 22:25:50.579169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
11854 22:25:50.579261 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
11855 22:25:50.579360 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
11856 22:25:50.579488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
11857 22:25:50.579587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
11858 22:25:50.579706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
11859 22:25:50.579831 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
11860 22:25:50.579934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
11861 22:25:50.580065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
11862 22:25:50.580199 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
11863 22:25:50.580313 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
11864 22:25:50.580440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
11865 22:25:50.580554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
11866 22:25:50.580683 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
11867 22:25:50.580790 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
11868 22:25:50.580896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
11869 22:25:50.581023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
11870 22:25:50.581121 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
11871 22:25:50.581243 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
11872 22:25:50.581832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
11873 22:25:50.581942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
11874 22:25:50.582061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
11875 22:25:50.582151 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
11876 22:25:50.582235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
11877 22:25:50.582344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
11878 22:25:50.582462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
11879 22:25:50.582587 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
11880 22:25:50.582687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
11881 22:25:50.582806 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
11882 22:25:50.582925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
11883 22:25:50.583033 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
11884 22:25:50.583157 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
11885 22:25:50.583281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
11886 22:25:50.583390 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
11887 22:25:50.583523 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
11888 22:25:50.583621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
11889 22:25:50.583726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
11890 22:25:50.583856 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
11891 22:25:50.583962 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
11892 22:25:50.584074 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
11893 22:25:50.584191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
11894 22:25:50.584311 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
11895 22:25:50.584433 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
11896 22:25:50.584992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
11897 22:25:50.585102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
11898 22:25:50.585211 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
11899 22:25:50.585331 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
11900 22:25:50.585423 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
11901 22:25:50.585525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
11902 22:25:50.585828 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
11903 22:25:50.585942 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
11904 22:25:50.586017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
11905 22:25:50.586110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
11906 22:25:50.586202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
11907 22:25:50.594720 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
11908 22:25:50.594982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
11909 22:25:50.595091 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
11910 22:25:50.595202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
11911 22:25:50.595636 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
11912 22:25:50.595739 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
11913 22:25:50.595843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
11914 22:25:50.595951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
11915 22:25:50.596057 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
11916 22:25:50.596180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
11917 22:25:50.596285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
11918 22:25:50.596383 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
11919 22:25:50.596491 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
11920 22:25:50.596580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
11921 22:25:50.596863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
11922 22:25:50.596967 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
11923 22:25:50.597075 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
11924 22:25:50.597938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
11925 22:25:50.598126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
11926 22:25:50.598225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
11927 22:25:50.598310 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
11928 22:25:50.598587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
11929 22:25:50.602663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
11930 22:25:50.602861 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
11931 22:25:50.621459 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
11932 22:25:50.621941 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
11933 22:25:50.622060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
11934 22:25:50.622168 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
11935 22:25:50.622294 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
11936 22:25:50.622385 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
11937 22:25:50.622506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
11938 22:25:50.622602 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
11939 22:25:50.622704 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
11940 22:25:50.622830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
11941 22:25:50.622933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
11942 22:25:50.623280 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
11943 22:25:50.623389 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
11944 22:25:50.623497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
11945 22:25:50.623612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
11946 22:25:50.623712 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
11947 22:25:50.623836 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
11948 22:25:50.623955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
11949 22:25:50.624060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
11950 22:25:50.624169 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
11951 22:25:50.624290 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
11952 22:25:50.624408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
11953 22:25:50.624532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
11954 22:25:50.624653 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
11955 22:25:50.624773 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
11956 22:25:50.624901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
11957 22:25:50.625221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
11958 22:25:50.625724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
11959 22:25:50.625836 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
11960 22:25:50.625930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
11961 22:25:50.626019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
11962 22:25:50.626109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
11963 22:25:50.626199 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
11964 22:25:50.626303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
11965 22:25:50.630507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
11966 22:25:50.630959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
11967 22:25:50.631071 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
11968 22:25:50.631165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
11969 22:25:50.631255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
11970 22:25:50.631359 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
11971 22:25:50.631467 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
11972 22:25:50.631562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
11973 22:25:50.631651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
11974 22:25:50.632019 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
11975 22:25:50.632129 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
11976 22:25:50.632222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
11977 22:25:50.632311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
11978 22:25:50.632400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
11979 22:25:50.632488 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
11980 22:25:50.632800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
11981 22:25:50.632909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
11982 22:25:50.633000 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
11983 22:25:50.633088 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
11984 22:25:50.633176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
11985 22:25:50.633263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
11986 22:25:50.633350 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
11987 22:25:50.633455 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
11988 22:25:50.633545 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
11989 22:25:50.633633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
11990 22:25:50.633732 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
11991 22:25:50.633820 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
11992 22:25:50.633908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
11993 22:25:50.634012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
11994 22:25:50.634103 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
11995 22:25:50.638397 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
11996 22:25:50.638910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
11997 22:25:50.639075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
11998 22:25:50.639251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
11999 22:25:50.639427 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12000 22:25:50.639558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12001 22:25:50.639679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12002 22:25:50.639854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12003 22:25:50.640012 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12004 22:25:50.640170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12005 22:25:50.640348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12006 22:25:50.640508 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12007 22:25:50.640684 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12008 22:25:50.640846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12009 22:25:50.641003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12010 22:25:50.641166 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12011 22:25:50.641316 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12012 22:25:50.641501 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12013 22:25:50.642118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12014 22:25:50.642243 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12015 22:25:50.642361 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12016 22:25:50.642459 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12017 22:25:50.646442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12018 22:25:50.646686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12019 22:25:50.647031 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12020 22:25:50.647136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12021 22:25:50.647426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12022 22:25:50.647530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12023 22:25:50.647615 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12024 22:25:50.647694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12025 22:25:50.648316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12026 22:25:50.648423 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12027 22:25:50.648513 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12028 22:25:50.648598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12029 22:25:50.648682 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12030 22:25:50.648765 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12031 22:25:50.649995 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12032 22:25:50.650116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12033 22:25:50.650403 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12034 22:25:50.650501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12035 22:25:50.650590 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12036 22:25:50.650677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12037 22:25:50.650762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12038 22:25:50.650848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12039 22:25:50.650933 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12040 22:25:50.651017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12041 22:25:50.651104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12042 22:25:50.651188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12043 22:25:50.654591 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12044 22:25:50.654805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12045 22:25:50.654895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12046 22:25:50.655373 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12047 22:25:50.655480 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12048 22:25:50.655569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12049 22:25:50.655656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12050 22:25:50.655741 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12051 22:25:50.655824 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12052 22:25:50.655908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12053 22:25:50.655991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12054 22:25:50.656094 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12055 22:25:50.656182 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12056 22:25:50.656265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12057 22:25:50.656349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12058 22:25:50.656451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12059 22:25:50.656540 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12060 22:25:50.656626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12061 22:25:50.656726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12062 22:25:50.657782 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12063 22:25:50.657895 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12064 22:25:50.657984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12065 22:25:50.680174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12066 22:25:50.680672 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12067 22:25:50.680783 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12068 22:25:50.680870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12069 22:25:50.680955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12070 22:25:50.681043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12071 22:25:50.681131 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12072 22:25:50.681216 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12073 22:25:50.681320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12074 22:25:50.681408 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12075 22:25:50.681777 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12076 22:25:50.681989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12077 22:25:50.682149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12078 22:25:50.682327 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12079 22:25:50.682468 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12080 22:25:50.682651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12081 22:25:50.682835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12082 22:25:50.682925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12083 22:25:50.683010 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12084 22:25:50.683094 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12085 22:25:50.683178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12086 22:25:50.683262 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12087 22:25:50.683368 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12088 22:25:50.683456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12089 22:25:50.683543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12090 22:25:50.683628 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12091 22:25:50.683711 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12092 22:25:50.683793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12093 22:25:50.683892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12094 22:25:50.683977 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12095 22:25:50.684062 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12096 22:25:50.684160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12097 22:25:50.684261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12098 22:25:50.684716 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12099 22:25:50.685329 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12100 22:25:50.686048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12101 22:25:50.689895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12102 22:25:50.690122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12103 22:25:50.690214 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12104 22:25:50.690594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12105 22:25:50.690777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12106 22:25:50.690871 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12107 22:25:50.690954 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12108 22:25:50.691038 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12109 22:25:50.691123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12110 22:25:50.691208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12111 22:25:50.692027 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12112 22:25:50.692138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12113 22:25:50.692228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12114 22:25:50.692315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12115 22:25:50.692400 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12116 22:25:50.692482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12117 22:25:50.692564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12118 22:25:50.692647 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12119 22:25:50.692732 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12120 22:25:50.692833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12121 22:25:50.692919 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12122 22:25:50.693295 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12123 22:25:50.693404 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12124 22:25:50.693494 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12125 22:25:50.693578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12126 22:25:50.693673 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12127 22:25:50.693760 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12128 22:25:50.693843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12129 22:25:50.693929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12130 22:25:50.694216 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12131 22:25:50.694316 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12132 22:25:50.694398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12133 22:25:50.694480 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12134 22:25:50.698421 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12135 22:25:50.698642 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12136 22:25:50.699042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12137 22:25:50.699142 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12138 22:25:50.699224 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12139 22:25:50.699300 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12140 22:25:50.699378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12141 22:25:50.699470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12142 22:25:50.699560 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12143 22:25:50.699848 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12144 22:25:50.699944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12145 22:25:50.700019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12146 22:25:50.700093 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12147 22:25:50.700166 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12148 22:25:50.700252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12149 22:25:50.700531 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12150 22:25:50.700626 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12151 22:25:50.700704 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12152 22:25:50.700791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12153 22:25:50.701493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12154 22:25:50.701738 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12155 22:25:50.701913 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12156 22:25:50.701998 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12157 22:25:50.702081 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12158 22:25:50.702360 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12159 22:25:50.702466 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12160 22:25:50.702551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12161 22:25:50.702634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12162 22:25:50.702711 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12163 22:25:50.706442 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12164 22:25:50.707043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12165 22:25:50.707145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12166 22:25:50.707227 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12167 22:25:50.707307 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12168 22:25:50.707389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12169 22:25:50.707468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12170 22:25:50.707570 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12171 22:25:50.707648 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12172 22:25:50.707726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12173 22:25:50.707817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12174 22:25:50.707897 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12175 22:25:50.708212 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12176 22:25:50.708314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12177 22:25:50.708413 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12178 22:25:50.708498 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12179 22:25:50.708781 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12180 22:25:50.708877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12181 22:25:50.708953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12182 22:25:50.709039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12183 22:25:50.709115 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12184 22:25:50.709202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12185 22:25:50.709290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12186 22:25:50.709592 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12187 22:25:50.709701 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12188 22:25:50.710032 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12189 22:25:50.710129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12190 22:25:50.710221 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12191 22:25:50.718530 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12192 22:25:50.718773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12193 22:25:50.719338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12194 22:25:50.719444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12195 22:25:50.719528 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12196 22:25:50.719606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12197 22:25:50.719681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12198 22:25:50.719771 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12199 22:25:50.737723 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12200 22:25:50.737961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12201 22:25:50.738361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12202 22:25:50.738648 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12203 22:25:50.739060 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12204 22:25:50.739531 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12205 22:25:50.741926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12206 22:25:50.742071 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12207 22:25:50.742153 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12208 22:25:50.742234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12209 22:25:50.742317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12210 22:25:50.742405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12211 22:25:50.742488 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12212 22:25:50.742569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12213 22:25:50.742653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12214 22:25:50.742735 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12215 22:25:50.742810 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12216 22:25:50.742887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12217 22:25:50.742962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12218 22:25:50.743039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12219 22:25:50.743123 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12220 22:25:50.743205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12221 22:25:50.743284 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12222 22:25:50.743361 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12223 22:25:50.743435 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12224 22:25:50.743510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12225 22:25:50.743589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12226 22:25:50.743666 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12227 22:25:50.743740 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12228 22:25:50.743813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12229 22:25:50.743886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12230 22:25:50.743960 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12231 22:25:50.744033 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12232 22:25:50.744107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12233 22:25:50.744398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12234 22:25:50.747432 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12235 22:25:50.747642 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12236 22:25:50.747738 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12237 22:25:50.747815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12238 22:25:50.747888 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12239 22:25:50.747961 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12240 22:25:50.748183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12241 22:25:50.748285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12242 22:25:50.748367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12243 22:25:50.748441 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12244 22:25:50.748518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12245 22:25:50.748592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12246 22:25:50.748666 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12247 22:25:50.748917 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12248 22:25:50.749000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12249 22:25:50.749075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12250 22:25:50.749154 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12251 22:25:50.749249 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12252 22:25:50.749326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12253 22:25:50.749405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12254 22:25:50.749487 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12255 22:25:50.749560 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12256 22:25:50.749661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12257 22:25:50.749742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12258 22:25:50.749817 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12259 22:25:50.749892 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12260 22:25:50.749967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12261 22:25:50.750265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12262 22:25:50.750378 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12263 22:25:50.750457 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12264 22:25:50.750531 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12265 22:25:50.750604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12266 22:25:50.754550 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12267 22:25:50.754775 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12268 22:25:50.755071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12269 22:25:50.755290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12270 22:25:50.756697 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12271 22:25:50.757298 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12272 22:25:50.757577 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12273 22:25:50.757795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12274 22:25:50.757966 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12275 22:25:50.758058 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12276 22:25:50.758140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12277 22:25:50.758216 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12278 22:25:50.758297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12279 22:25:50.758384 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12280 22:25:50.758462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12281 22:25:50.758536 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12282 22:25:50.758609 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12283 22:25:50.758681 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12284 22:25:50.758753 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12285 22:25:50.758825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12286 22:25:50.758923 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12287 22:25:50.759003 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12288 22:25:50.759076 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12289 22:25:50.759151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12290 22:25:50.759229 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12291 22:25:50.759307 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12292 22:25:50.759389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12293 22:25:50.759468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12294 22:25:50.762600 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12295 22:25:50.762842 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12296 22:25:50.763006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12297 22:25:50.763543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12298 22:25:50.763694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12299 22:25:50.763857 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12300 22:25:50.764018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12301 22:25:50.764179 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12302 22:25:50.764340 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12303 22:25:50.764498 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12304 22:25:50.764659 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12305 22:25:50.764789 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12306 22:25:50.765433 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12307 22:25:50.765578 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12308 22:25:50.765715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12309 22:25:50.765839 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12310 22:25:50.765969 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12311 22:25:50.766074 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12312 22:25:50.766167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12313 22:25:50.766257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12314 22:25:50.766347 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12315 22:25:50.766436 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12316 22:25:50.766526 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12317 22:25:50.766615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12318 22:25:50.766704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12319 22:25:50.766793 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12320 22:25:50.766881 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12321 22:25:50.767184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12322 22:25:50.767305 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12323 22:25:50.767399 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12324 22:25:50.767490 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12325 22:25:50.767581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12326 22:25:50.770564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12327 22:25:50.770783 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12328 22:25:50.770900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12329 22:25:50.771213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12330 22:25:50.771332 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12331 22:25:50.771429 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12332 22:25:50.771518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12333 22:25:50.794917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12334 22:25:50.795203 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12335 22:25:50.795568 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12336 22:25:50.795669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12337 22:25:50.795750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12338 22:25:50.795825 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12339 22:25:50.795900 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12340 22:25:50.795989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12341 22:25:50.796065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12342 22:25:50.796370 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12343 22:25:50.796469 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12344 22:25:50.796562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12345 22:25:50.796639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12346 22:25:50.797075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12347 22:25:50.797315 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12348 22:25:50.797417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12349 22:25:50.797499 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12350 22:25:50.797589 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12351 22:25:50.797675 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12352 22:25:50.797769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12353 22:25:50.798046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12354 22:25:50.798151 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12355 22:25:50.802625 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12356 22:25:50.802833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12357 22:25:50.803171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12358 22:25:50.803274 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12359 22:25:50.803359 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12360 22:25:50.803450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12361 22:25:50.803796 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12362 22:25:50.803977 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12363 22:25:50.804055 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12364 22:25:50.804144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12365 22:25:50.804221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12366 22:25:50.804308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12367 22:25:50.804588 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12368 22:25:50.804685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12369 22:25:50.804776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12370 22:25:50.804867 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12371 22:25:50.805153 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12372 22:25:50.805251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12373 22:25:50.805546 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12374 22:25:50.805660 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12375 22:25:50.805754 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12376 22:25:50.806026 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12377 22:25:50.810518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12378 22:25:50.810709 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12379 22:25:50.811011 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12380 22:25:50.811117 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12381 22:25:50.811198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12382 22:25:50.811271 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12383 22:25:50.811342 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12384 22:25:50.811431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12385 22:25:50.811530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12386 22:25:50.811606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12387 22:25:50.811691 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12388 22:25:50.811776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12389 22:25:50.811849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12390 22:25:50.812208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12391 22:25:50.812301 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12392 22:25:50.812687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12393 22:25:50.813038 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12394 22:25:50.813150 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12395 22:25:50.813285 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12396 22:25:50.813374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12397 22:25:50.813467 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12398 22:25:50.813554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12399 22:25:50.813660 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12400 22:25:50.813750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12401 22:25:50.813853 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12402 22:25:50.814188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12403 22:25:50.814262 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12404 22:25:50.818377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12405 22:25:50.818955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12406 22:25:50.819213 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12407 22:25:50.819499 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12408 22:25:50.819715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12409 22:25:50.819971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12410 22:25:50.820156 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12411 22:25:50.820323 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12412 22:25:50.820493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12413 22:25:50.820660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12414 22:25:50.820821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12415 22:25:50.820990 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12416 22:25:50.821161 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12417 22:25:50.821374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12418 22:25:50.821591 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12419 22:25:50.821808 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12420 22:25:50.821983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12421 22:25:50.822110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12422 22:25:50.822226 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12423 22:25:50.822341 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12424 22:25:50.822457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12425 22:25:50.822603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12426 22:25:50.822728 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12427 22:25:50.822846 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12428 22:25:50.822963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12429 22:25:50.823080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12430 22:25:50.826571 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12431 22:25:50.826834 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12432 22:25:50.827044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12433 22:25:50.827255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12434 22:25:50.827451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12435 22:25:50.827672 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12436 22:25:50.827910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12437 22:25:50.828100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12438 22:25:50.828865 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12439 22:25:50.829070 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12440 22:25:50.829314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12441 22:25:50.829500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12442 22:25:50.829723 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12443 22:25:50.829933 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12444 22:25:50.830149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12445 22:25:50.830303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12446 22:25:50.830426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12447 22:25:50.830577 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12448 22:25:50.830701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12449 22:25:50.830819 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12450 22:25:50.830937 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12451 22:25:50.831054 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12452 22:25:50.831171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12453 22:25:50.834307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12454 22:25:50.834722 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12455 22:25:50.834907 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12456 22:25:50.835010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12457 22:25:50.835367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12458 22:25:50.835475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12459 22:25:50.835574 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12460 22:25:50.835864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12461 22:25:50.835996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12462 22:25:50.836314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12463 22:25:50.836442 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12464 22:25:50.836551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12465 22:25:50.836925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12466 22:25:50.837052 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12467 22:25:50.859894 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12468 22:25:50.860253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12469 22:25:50.860469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12470 22:25:50.861050 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12471 22:25:50.861205 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12472 22:25:50.861341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12473 22:25:50.861475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12474 22:25:50.861601 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12475 22:25:50.861734 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12476 22:25:50.861855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12477 22:25:50.862000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12478 22:25:50.862122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12479 22:25:50.862242 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12480 22:25:50.862359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12481 22:25:50.862498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12482 22:25:50.866415 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12483 22:25:50.866634 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12484 22:25:50.866927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12485 22:25:50.867031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12486 22:25:50.867116 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12487 22:25:50.867197 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12488 22:25:50.867495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12489 22:25:50.867603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12490 22:25:50.867687 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12491 22:25:50.867782 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12492 22:25:50.867877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12493 22:25:50.868165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12494 22:25:50.868274 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12495 22:25:50.868368 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12496 22:25:50.868684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12497 22:25:50.868790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12498 22:25:50.868882 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12499 22:25:50.868970 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12500 22:25:50.869434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12501 22:25:50.869577 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12502 22:25:50.869683 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12503 22:25:50.869774 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12504 22:25:50.869867 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12505 22:25:50.870156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12506 22:25:50.870262 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12507 22:25:50.870351 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12508 22:25:50.870438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12509 22:25:50.874540 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12510 22:25:50.874995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12511 22:25:50.875099 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12512 22:25:50.875187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12513 22:25:50.875285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12514 22:25:50.876302 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12515 22:25:50.876412 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12516 22:25:50.876495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12517 22:25:50.876576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12518 22:25:50.876658 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12519 22:25:50.876740 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12520 22:25:50.876837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12521 22:25:50.877140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12522 22:25:50.877242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12523 22:25:50.877362 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12524 22:25:50.877455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12525 22:25:50.877763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12526 22:25:50.877872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12527 22:25:50.877962 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12528 22:25:50.878056 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12529 22:25:50.878151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12530 22:25:50.878237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12531 22:25:50.878356 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12532 22:25:50.878448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12533 22:25:50.878538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12534 22:25:50.878660 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12535 22:25:50.878775 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12536 22:25:50.886456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12537 22:25:50.886941 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12538 22:25:50.887045 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12539 22:25:50.887121 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12540 22:25:50.887201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12541 22:25:50.887556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12542 22:25:50.887677 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12543 22:25:50.887776 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12544 22:25:50.887861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12545 22:25:50.887958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12546 22:25:50.888042 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12547 22:25:50.888139 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12548 22:25:50.888220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12549 22:25:50.888330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12550 22:25:50.888445 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12551 22:25:50.888546 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12552 22:25:50.888848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12553 22:25:50.888945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12554 22:25:50.889256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12555 22:25:50.889358 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12556 22:25:50.889461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12557 22:25:50.889786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12558 22:25:50.889889 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12559 22:25:50.889971 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12560 22:25:50.890061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12561 22:25:50.890301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12562 22:25:50.890400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12563 22:25:50.890496 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12564 22:25:50.890582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12565 22:25:50.890683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12566 22:25:50.890798 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12567 22:25:50.891158 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12568 22:25:50.891263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12569 22:25:50.891662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12570 22:25:50.891772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12571 22:25:50.891857 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12572 22:25:50.891979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12573 22:25:50.892100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12574 22:25:50.892461 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12575 22:25:50.892567 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12576 22:25:50.892680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12577 22:25:50.892793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12578 22:25:50.892907 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12579 22:25:50.893032 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12580 22:25:50.893427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12581 22:25:50.893534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12582 22:25:50.893643 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12583 22:25:50.893770 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12584 22:25:50.893890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12585 22:25:50.893988 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12586 22:25:50.898608 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12587 22:25:50.898843 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12588 22:25:50.899171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12589 22:25:50.899289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12590 22:25:50.899400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12591 22:25:50.899569 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12592 22:25:50.899795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12593 22:25:50.899894 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12594 22:25:50.900215 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12595 22:25:50.900331 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12596 22:25:50.900443 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12597 22:25:50.900517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12598 22:25:50.900593 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12599 22:25:50.900658 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12600 22:25:50.900719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12601 22:25:50.922045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12602 22:25:50.922543 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12603 22:25:50.922642 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12604 22:25:50.922728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12605 22:25:50.923336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12606 22:25:50.923438 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12607 22:25:50.923519 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12608 22:25:50.923598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12609 22:25:50.923678 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12610 22:25:50.923759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12611 22:25:50.924083 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12612 22:25:50.924177 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12613 22:25:50.924256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12614 22:25:50.924338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12615 22:25:50.924418 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12616 22:25:50.924499 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12617 22:25:50.924789 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12618 22:25:50.924892 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12619 22:25:50.924973 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12620 22:25:50.925052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12621 22:25:50.925129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12622 22:25:50.925209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12623 22:25:50.925558 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12624 22:25:50.925674 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12625 22:25:50.925760 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12626 22:25:50.925845 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12627 22:25:50.925938 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12628 22:25:50.926016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12629 22:25:50.926288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12630 22:25:50.926372 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12631 22:25:50.926438 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12632 22:25:50.926502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12633 22:25:50.926565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12634 22:25:50.932228 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12635 22:25:50.932856 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12636 22:25:50.932953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12637 22:25:50.933037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12638 22:25:50.933119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12639 22:25:50.933202 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12640 22:25:50.933291 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12641 22:25:50.933376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12642 22:25:50.933461 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12643 22:25:50.933546 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12644 22:25:50.934085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12645 22:25:50.934194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12646 22:25:50.934273 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12647 22:25:50.934337 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12648 22:25:50.934399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12649 22:25:50.934460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12650 22:25:50.934520 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12651 22:25:50.934580 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12652 22:25:50.934640 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12653 22:25:50.934722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12654 22:25:50.934786 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12655 22:25:50.934847 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12656 22:25:50.934907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12657 22:25:50.934970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12658 22:25:50.935030 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12659 22:25:50.935089 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12660 22:25:50.935149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12661 22:25:50.935208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12662 22:25:50.935273 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12663 22:25:50.935340 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12664 22:25:50.939344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12665 22:25:50.940114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12666 22:25:50.940271 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12667 22:25:50.940367 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12668 22:25:50.940453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12669 22:25:50.941456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12670 22:25:50.941754 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12671 22:25:50.942010 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12672 22:25:50.942181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12673 22:25:50.942259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12674 22:25:50.942323 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12675 22:25:50.942384 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12676 22:25:50.942445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12677 22:25:50.942505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12678 22:25:50.942564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12679 22:25:50.942624 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12680 22:25:50.942684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12681 22:25:50.942744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12682 22:25:50.942803 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12683 22:25:50.942863 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12684 22:25:50.942923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12685 22:25:50.942983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12686 22:25:50.943075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12687 22:25:50.943139 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12688 22:25:50.943203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12689 22:25:50.943263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12690 22:25:50.943323 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12691 22:25:50.943382 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12692 22:25:50.943443 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12693 22:25:50.943516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12694 22:25:50.943594 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12695 22:25:50.946315 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12696 22:25:50.947673 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12697 22:25:50.947867 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12698 22:25:50.947961 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12699 22:25:50.948049 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12700 22:25:50.948132 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12701 22:25:50.948211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12702 22:25:50.948318 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12703 22:25:50.948421 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12704 22:25:50.948518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12705 22:25:50.948847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12706 22:25:50.948947 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12707 22:25:50.949027 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12708 22:25:50.949106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12709 22:25:50.949184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12710 22:25:50.949261 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12711 22:25:50.949336 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12712 22:25:50.949427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12713 22:25:50.949505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12714 22:25:50.949875 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12715 22:25:50.950012 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12716 22:25:50.950090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12717 22:25:50.950162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12718 22:25:50.950248 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12719 22:25:50.954420 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12720 22:25:50.954681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12721 22:25:50.955044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12722 22:25:50.955147 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12723 22:25:50.955233 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12724 22:25:50.955315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12725 22:25:50.955626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12726 22:25:50.955730 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12727 22:25:50.955817 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12728 22:25:50.955901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12729 22:25:50.956229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12730 22:25:50.956332 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12731 22:25:50.956417 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12732 22:25:50.956636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12733 22:25:50.956925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12734 22:25:50.957028 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12735 22:25:50.982933 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12736 22:25:50.983449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12737 22:25:50.983561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12738 22:25:50.983659 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12739 22:25:50.983745 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12740 22:25:50.984080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12741 22:25:50.984186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12742 22:25:50.984274 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12743 22:25:50.984359 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12744 22:25:50.984466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12745 22:25:50.984570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12746 22:25:50.984660 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12747 22:25:50.984768 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12748 22:25:50.984887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12749 22:25:50.985010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12750 22:25:50.985131 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12751 22:25:50.985442 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12752 22:25:50.985547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12753 22:25:50.985684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12754 22:25:50.985784 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12755 22:25:50.985912 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12756 22:25:50.986216 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12757 22:25:50.990445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12758 22:25:50.991847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12759 22:25:50.991972 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12760 22:25:50.992084 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12761 22:25:50.992168 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12762 22:25:50.992269 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12763 22:25:50.992367 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12764 22:25:50.992470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12765 22:25:50.992575 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12766 22:25:50.992682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12767 22:25:50.992787 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12768 22:25:50.992903 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12769 22:25:50.992992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12770 22:25:50.993076 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12771 22:25:50.993178 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12772 22:25:50.993284 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12773 22:25:50.993392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12774 22:25:50.993506 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12775 22:25:50.993594 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12776 22:25:50.993690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12777 22:25:50.993776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12778 22:25:50.993857 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12779 22:25:50.994150 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12780 22:25:50.994247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12781 22:25:50.994319 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12782 22:25:50.994381 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12783 22:25:50.998331 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12784 22:25:50.998793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12785 22:25:50.998902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12786 22:25:50.999007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12787 22:25:50.999110 arm64_sve-ptrace pass
12788 22:25:50.999232 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12789 22:25:50.999328 arm64_sve-probe-vls_All_vector_lengths_valid pass
12790 22:25:50.999419 arm64_sve-probe-vls pass
12791 22:25:50.999527 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12792 22:25:50.999634 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12793 22:25:50.999706 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12794 22:25:50.999772 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12795 22:25:50.999871 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12796 22:25:50.999968 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12797 22:25:51.000091 arm64_vec-syscfg_SVE_vector_length_used_default pass
12798 22:25:51.000217 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12799 22:25:51.000345 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12800 22:25:51.000464 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12801 22:25:51.000596 arm64_vec-syscfg_SME_default_vector_length_32 pass
12802 22:25:51.000715 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12803 22:25:51.000827 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12804 22:25:51.000948 arm64_vec-syscfg_SME_current_VL_is_32 pass
12805 22:25:51.001077 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12806 22:25:51.001200 arm64_vec-syscfg_SME_prctl_set_min_max pass
12807 22:25:51.001513 arm64_vec-syscfg_SME_vector_length_used_default pass
12808 22:25:51.001625 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12809 22:25:51.001733 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12810 22:25:51.001844 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12811 22:25:51.001968 arm64_vec-syscfg pass
12812 22:25:51.006396 arm64_za-fork_fork_test pass
12813 22:25:51.006631 arm64_za-fork pass
12814 22:25:51.009991 arm64_za-ptrace_Set_VL_16 pass
12815 22:25:51.010236 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12816 22:25:51.010338 arm64_za-ptrace_Data_match_for_VL_16 pass
12817 22:25:51.010435 arm64_za-ptrace_Set_VL_32 pass
12818 22:25:51.010531 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12819 22:25:51.010628 arm64_za-ptrace_Data_match_for_VL_32 pass
12820 22:25:51.010724 arm64_za-ptrace_Set_VL_48 pass
12821 22:25:51.010823 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12822 22:25:51.010921 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12823 22:25:51.011016 arm64_za-ptrace_Set_VL_64 pass
12824 22:25:51.011112 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12825 22:25:51.011208 arm64_za-ptrace_Data_match_for_VL_64 pass
12826 22:25:51.011303 arm64_za-ptrace_Set_VL_80 pass
12827 22:25:51.011398 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12828 22:25:51.011494 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12829 22:25:51.011598 arm64_za-ptrace_Set_VL_96 pass
12830 22:25:51.011677 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12831 22:25:51.011752 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
12832 22:25:51.011830 arm64_za-ptrace_Set_VL_112 pass
12833 22:25:51.011912 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
12834 22:25:51.012019 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
12835 22:25:51.012111 arm64_za-ptrace_Set_VL_128 pass
12836 22:25:51.012201 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
12837 22:25:51.012291 arm64_za-ptrace_Data_match_for_VL_128 pass
12838 22:25:51.012367 arm64_za-ptrace_Set_VL_144 pass
12839 22:25:51.012441 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
12840 22:25:51.012549 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
12841 22:25:51.012641 arm64_za-ptrace_Set_VL_160 pass
12842 22:25:51.012717 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
12843 22:25:51.012792 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
12844 22:25:51.012875 arm64_za-ptrace_Set_VL_176 pass
12845 22:25:51.012958 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
12846 22:25:51.013065 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
12847 22:25:51.013143 arm64_za-ptrace_Set_VL_192 pass
12848 22:25:51.013218 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
12849 22:25:51.013516 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
12850 22:25:51.014313 arm64_za-ptrace_Set_VL_208 pass
12851 22:25:51.014593 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
12852 22:25:51.014705 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
12853 22:25:51.014805 arm64_za-ptrace_Set_VL_224 pass
12854 22:25:51.015091 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
12855 22:25:51.015383 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
12856 22:25:51.015485 arm64_za-ptrace_Set_VL_240 pass
12857 22:25:51.015597 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
12858 22:25:51.015935 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
12859 22:25:51.016043 arm64_za-ptrace_Set_VL_256 pass
12860 22:25:51.016143 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
12861 22:25:51.017744 arm64_za-ptrace_Data_match_for_VL_256 pass
12862 22:25:51.017981 arm64_za-ptrace_Set_VL_272 pass
12863 22:25:51.018185 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
12864 22:25:51.018277 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
12865 22:25:51.018362 arm64_za-ptrace_Set_VL_288 pass
12866 22:25:51.018587 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
12867 22:25:51.018685 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
12868 22:25:51.018782 arm64_za-ptrace_Set_VL_304 pass
12869 22:25:51.018867 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
12870 22:25:51.018950 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
12871 22:25:51.019030 arm64_za-ptrace_Set_VL_320 pass
12872 22:25:51.019110 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
12873 22:25:51.019189 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
12874 22:25:51.019271 arm64_za-ptrace_Set_VL_336 pass
12875 22:25:51.021562 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
12876 22:25:51.022246 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
12877 22:25:51.022524 arm64_za-ptrace_Set_VL_352 pass
12878 22:25:51.022621 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
12879 22:25:51.022713 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
12880 22:25:51.022803 arm64_za-ptrace_Set_VL_368 pass
12881 22:25:51.022895 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
12882 22:25:51.023183 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
12883 22:25:51.023286 arm64_za-ptrace_Set_VL_384 pass
12884 22:25:51.023367 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
12885 22:25:51.023456 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
12886 22:25:51.023535 arm64_za-ptrace_Set_VL_400 pass
12887 22:25:51.023610 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
12888 22:25:51.023696 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
12889 22:25:51.023770 arm64_za-ptrace_Set_VL_416 pass
12890 22:25:51.023853 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
12891 22:25:51.023945 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
12892 22:25:51.024032 arm64_za-ptrace_Set_VL_432 pass
12893 22:25:51.024117 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
12894 22:25:51.024436 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
12895 22:25:51.024535 arm64_za-ptrace_Set_VL_448 pass
12896 22:25:51.024819 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
12897 22:25:51.024916 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
12898 22:25:51.024995 arm64_za-ptrace_Set_VL_464 pass
12899 22:25:51.025073 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
12900 22:25:51.025164 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
12901 22:25:51.025242 arm64_za-ptrace_Set_VL_480 pass
12902 22:25:51.025318 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
12903 22:25:51.025412 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
12904 22:25:51.025492 arm64_za-ptrace_Set_VL_496 pass
12905 22:25:51.025569 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
12906 22:25:51.050618 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
12907 22:25:51.050874 arm64_za-ptrace_Set_VL_512 pass
12908 22:25:51.051201 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
12909 22:25:51.051314 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
12910 22:25:51.051407 arm64_za-ptrace_Set_VL_528 pass
12911 22:25:51.051504 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
12912 22:25:51.051594 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
12913 22:25:51.051682 arm64_za-ptrace_Set_VL_544 pass
12914 22:25:51.051790 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
12915 22:25:51.051883 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
12916 22:25:51.051971 arm64_za-ptrace_Set_VL_560 pass
12917 22:25:51.052062 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
12918 22:25:51.052151 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
12919 22:25:51.052256 arm64_za-ptrace_Set_VL_576 pass
12920 22:25:51.052348 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
12921 22:25:51.052440 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
12922 22:25:51.052531 arm64_za-ptrace_Set_VL_592 pass
12923 22:25:51.052638 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
12924 22:25:51.052731 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
12925 22:25:51.052824 arm64_za-ptrace_Set_VL_608 pass
12926 22:25:51.052928 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
12927 22:25:51.053022 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
12928 22:25:51.053126 arm64_za-ptrace_Set_VL_624 pass
12929 22:25:51.053215 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
12930 22:25:51.053322 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
12931 22:25:51.053431 arm64_za-ptrace_Set_VL_640 pass
12932 22:25:51.053538 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
12933 22:25:51.053654 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
12934 22:25:51.053765 arm64_za-ptrace_Set_VL_656 pass
12935 22:25:51.053871 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
12936 22:25:51.053978 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
12937 22:25:51.058499 arm64_za-ptrace_Set_VL_672 pass
12938 22:25:51.058725 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
12939 22:25:51.058820 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
12940 22:25:51.059155 arm64_za-ptrace_Set_VL_688 pass
12941 22:25:51.059268 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
12942 22:25:51.059358 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
12943 22:25:51.059447 arm64_za-ptrace_Set_VL_704 pass
12944 22:25:51.059535 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
12945 22:25:51.059641 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
12946 22:25:51.059731 arm64_za-ptrace_Set_VL_720 pass
12947 22:25:51.059819 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
12948 22:25:51.059909 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
12949 22:25:51.059999 arm64_za-ptrace_Set_VL_736 pass
12950 22:25:51.060086 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
12951 22:25:51.060191 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
12952 22:25:51.060281 arm64_za-ptrace_Set_VL_752 pass
12953 22:25:51.060368 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
12954 22:25:51.060455 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
12955 22:25:51.060543 arm64_za-ptrace_Set_VL_768 pass
12956 22:25:51.060646 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
12957 22:25:51.060735 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
12958 22:25:51.060823 arm64_za-ptrace_Set_VL_784 pass
12959 22:25:51.060930 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
12960 22:25:51.061020 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
12961 22:25:51.061108 arm64_za-ptrace_Set_VL_800 pass
12962 22:25:51.061211 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
12963 22:25:51.061300 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
12964 22:25:51.061387 arm64_za-ptrace_Set_VL_816 pass
12965 22:25:51.061490 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
12966 22:25:51.061579 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
12967 22:25:51.061677 arm64_za-ptrace_Set_VL_832 pass
12968 22:25:51.061765 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
12969 22:25:51.061869 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
12970 22:25:51.061959 arm64_za-ptrace_Set_VL_848 pass
12971 22:25:51.062046 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
12972 22:25:51.062148 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
12973 22:25:51.066347 arm64_za-ptrace_Set_VL_864 pass
12974 22:25:51.066520 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
12975 22:25:51.066808 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
12976 22:25:51.066917 arm64_za-ptrace_Set_VL_880 pass
12977 22:25:51.067002 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
12978 22:25:51.067120 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
12979 22:25:51.067225 arm64_za-ptrace_Set_VL_896 pass
12980 22:25:51.067357 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
12981 22:25:51.067467 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
12982 22:25:51.067578 arm64_za-ptrace_Set_VL_912 pass
12983 22:25:51.067684 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
12984 22:25:51.067793 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
12985 22:25:51.067914 arm64_za-ptrace_Set_VL_928 pass
12986 22:25:51.068028 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
12987 22:25:51.068136 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
12988 22:25:51.068223 arm64_za-ptrace_Set_VL_944 pass
12989 22:25:51.068335 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
12990 22:25:51.068430 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
12991 22:25:51.068557 arm64_za-ptrace_Set_VL_960 pass
12992 22:25:51.068661 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
12993 22:25:51.068771 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
12994 22:25:51.068868 arm64_za-ptrace_Set_VL_976 pass
12995 22:25:51.068975 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
12996 22:25:51.069078 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
12997 22:25:51.069183 arm64_za-ptrace_Set_VL_992 pass
12998 22:25:51.069310 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
12999 22:25:51.069419 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13000 22:25:51.069529 arm64_za-ptrace_Set_VL_1008 pass
13001 22:25:51.069635 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13002 22:25:51.069750 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13003 22:25:51.069860 arm64_za-ptrace_Set_VL_1024 pass
13004 22:25:51.069962 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13005 22:25:51.070096 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13006 22:25:51.070192 arm64_za-ptrace_Set_VL_1040 pass
13007 22:25:51.070276 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13008 22:25:51.070343 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13009 22:25:51.070405 arm64_za-ptrace_Set_VL_1056 pass
13010 22:25:51.070467 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13011 22:25:51.070542 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13012 22:25:51.070609 arm64_za-ptrace_Set_VL_1072 pass
13013 22:25:51.074413 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13014 22:25:51.074826 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13015 22:25:51.074936 arm64_za-ptrace_Set_VL_1088 pass
13016 22:25:51.075055 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13017 22:25:51.075165 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13018 22:25:51.075275 arm64_za-ptrace_Set_VL_1104 pass
13019 22:25:51.075365 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13020 22:25:51.075447 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13021 22:25:51.075545 arm64_za-ptrace_Set_VL_1120 pass
13022 22:25:51.075632 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13023 22:25:51.075734 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13024 22:25:51.075837 arm64_za-ptrace_Set_VL_1136 pass
13025 22:25:51.075918 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13026 22:25:51.076008 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13027 22:25:51.076096 arm64_za-ptrace_Set_VL_1152 pass
13028 22:25:51.076187 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13029 22:25:51.076316 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13030 22:25:51.076413 arm64_za-ptrace_Set_VL_1168 pass
13031 22:25:51.076531 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13032 22:25:51.076651 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13033 22:25:51.076769 arm64_za-ptrace_Set_VL_1184 pass
13034 22:25:51.076890 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13035 22:25:51.077020 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13036 22:25:51.077135 arm64_za-ptrace_Set_VL_1200 pass
13037 22:25:51.077253 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13038 22:25:51.077404 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13039 22:25:51.077529 arm64_za-ptrace_Set_VL_1216 pass
13040 22:25:51.077677 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13041 22:25:51.077807 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13042 22:25:51.077935 arm64_za-ptrace_Set_VL_1232 pass
13043 22:25:51.078042 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13044 22:25:51.082486 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13045 22:25:51.082722 arm64_za-ptrace_Set_VL_1248 pass
13046 22:25:51.082842 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13047 22:25:51.082939 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13048 22:25:51.083029 arm64_za-ptrace_Set_VL_1264 pass
13049 22:25:51.083137 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13050 22:25:51.083233 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13051 22:25:51.083324 arm64_za-ptrace_Set_VL_1280 pass
13052 22:25:51.083431 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13053 22:25:51.083529 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13054 22:25:51.083636 arm64_za-ptrace_Set_VL_1296 pass
13055 22:25:51.083730 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13056 22:25:51.083837 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13057 22:25:51.083945 arm64_za-ptrace_Set_VL_1312 pass
13058 22:25:51.084269 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13059 22:25:51.084372 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13060 22:25:51.084449 arm64_za-ptrace_Set_VL_1328 pass
13061 22:25:51.084550 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13062 22:25:51.084635 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13063 22:25:51.084730 arm64_za-ptrace_Set_VL_1344 pass
13064 22:25:51.084828 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13065 22:25:51.084935 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13066 22:25:51.085030 arm64_za-ptrace_Set_VL_1360 pass
13067 22:25:51.085146 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13068 22:25:51.085254 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13069 22:25:51.085374 arm64_za-ptrace_Set_VL_1376 pass
13070 22:25:51.085505 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13071 22:25:51.085608 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13072 22:25:51.085743 arm64_za-ptrace_Set_VL_1392 pass
13073 22:25:51.086134 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13074 22:25:51.086216 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13075 22:25:51.086282 arm64_za-ptrace_Set_VL_1408 pass
13076 22:25:51.086345 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13077 22:25:51.090601 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13078 22:25:51.091177 arm64_za-ptrace_Set_VL_1424 pass
13079 22:25:51.091338 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13080 22:25:51.091470 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13081 22:25:51.091599 arm64_za-ptrace_Set_VL_1440 pass
13082 22:25:51.091720 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13083 22:25:51.091865 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13084 22:25:51.091993 arm64_za-ptrace_Set_VL_1456 pass
13085 22:25:51.092153 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13086 22:25:51.092292 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13087 22:25:51.092416 arm64_za-ptrace_Set_VL_1472 pass
13088 22:25:51.092535 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13089 22:25:51.092680 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13090 22:25:51.092846 arm64_za-ptrace_Set_VL_1488 pass
13091 22:25:51.092996 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13092 22:25:51.093168 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13093 22:25:51.093287 arm64_za-ptrace_Set_VL_1504 pass
13094 22:25:51.093379 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13095 22:25:51.093490 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13096 22:25:51.093584 arm64_za-ptrace_Set_VL_1520 pass
13097 22:25:51.093708 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13098 22:25:51.093834 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13099 22:25:51.093940 arm64_za-ptrace_Set_VL_1536 pass
13100 22:25:51.094054 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13101 22:25:51.118578 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13102 22:25:51.118825 arm64_za-ptrace_Set_VL_1552 pass
13103 22:25:51.118915 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13104 22:25:51.119223 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13105 22:25:51.119329 arm64_za-ptrace_Set_VL_1568 pass
13106 22:25:51.119417 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13107 22:25:51.119502 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13108 22:25:51.119579 arm64_za-ptrace_Set_VL_1584 pass
13109 22:25:51.119653 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13110 22:25:51.119739 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13111 22:25:51.119813 arm64_za-ptrace_Set_VL_1600 pass
13112 22:25:51.120739 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13113 22:25:51.121042 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13114 22:25:51.121304 arm64_za-ptrace_Set_VL_1616 pass
13115 22:25:51.121594 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13116 22:25:51.121695 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13117 22:25:51.121775 arm64_za-ptrace_Set_VL_1632 pass
13118 22:25:51.121855 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13119 22:25:51.121933 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13120 22:25:51.122264 arm64_za-ptrace_Set_VL_1648 pass
13121 22:25:51.122352 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13122 22:25:51.122427 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13123 22:25:51.122501 arm64_za-ptrace_Set_VL_1664 pass
13124 22:25:51.122779 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13125 22:25:51.122880 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13126 22:25:51.122973 arm64_za-ptrace_Set_VL_1680 pass
13127 22:25:51.123062 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13128 22:25:51.123141 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13129 22:25:51.123218 arm64_za-ptrace_Set_VL_1696 pass
13130 22:25:51.123292 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13131 22:25:51.123370 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13132 22:25:51.123450 arm64_za-ptrace_Set_VL_1712 pass
13133 22:25:51.123532 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13134 22:25:51.123608 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13135 22:25:51.123683 arm64_za-ptrace_Set_VL_1728 pass
13136 22:25:51.123757 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13137 22:25:51.126477 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13138 22:25:51.126647 arm64_za-ptrace_Set_VL_1744 pass
13139 22:25:51.126767 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13140 22:25:51.127166 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13141 22:25:51.127275 arm64_za-ptrace_Set_VL_1760 pass
13142 22:25:51.127383 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13143 22:25:51.127491 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13144 22:25:51.127592 arm64_za-ptrace_Set_VL_1776 pass
13145 22:25:51.127699 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13146 22:25:51.127811 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13147 22:25:51.127910 arm64_za-ptrace_Set_VL_1792 pass
13148 22:25:51.128045 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13149 22:25:51.128158 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13150 22:25:51.128242 arm64_za-ptrace_Set_VL_1808 pass
13151 22:25:51.128345 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13152 22:25:51.128452 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13153 22:25:51.128549 arm64_za-ptrace_Set_VL_1824 pass
13154 22:25:51.128654 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13155 22:25:51.128760 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13156 22:25:51.128867 arm64_za-ptrace_Set_VL_1840 pass
13157 22:25:51.129005 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13158 22:25:51.129109 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13159 22:25:51.129218 arm64_za-ptrace_Set_VL_1856 pass
13160 22:25:51.129325 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13161 22:25:51.129434 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13162 22:25:51.129546 arm64_za-ptrace_Set_VL_1872 pass
13163 22:25:51.129657 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13164 22:25:51.129757 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13165 22:25:51.129858 arm64_za-ptrace_Set_VL_1888 pass
13166 22:25:51.129971 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13167 22:25:51.130054 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13168 22:25:51.130136 arm64_za-ptrace_Set_VL_1904 pass
13169 22:25:51.130202 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13170 22:25:51.130263 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13171 22:25:51.130323 arm64_za-ptrace_Set_VL_1920 pass
13172 22:25:51.130383 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13173 22:25:51.130442 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13174 22:25:51.130502 arm64_za-ptrace_Set_VL_1936 pass
13175 22:25:51.134410 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13176 22:25:51.134880 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13177 22:25:51.134989 arm64_za-ptrace_Set_VL_1952 pass
13178 22:25:51.135076 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13179 22:25:51.135157 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13180 22:25:51.135253 arm64_za-ptrace_Set_VL_1968 pass
13181 22:25:51.135333 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13182 22:25:51.135412 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13183 22:25:51.135505 arm64_za-ptrace_Set_VL_1984 pass
13184 22:25:51.135584 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13185 22:25:51.135672 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13186 22:25:51.135746 arm64_za-ptrace_Set_VL_2000 pass
13187 22:25:51.135831 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13188 22:25:51.135907 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13189 22:25:51.135993 arm64_za-ptrace_Set_VL_2016 pass
13190 22:25:51.136069 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13191 22:25:51.136144 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13192 22:25:51.136234 arm64_za-ptrace_Set_VL_2032 pass
13193 22:25:51.136327 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13194 22:25:51.136422 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13195 22:25:51.136833 arm64_za-ptrace_Set_VL_2048 pass
13196 22:25:51.136932 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13197 22:25:51.137013 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13198 22:25:51.137094 arm64_za-ptrace_Set_VL_2064 pass
13199 22:25:51.137185 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13200 22:25:51.137262 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13201 22:25:51.137342 arm64_za-ptrace_Set_VL_2080 pass
13202 22:25:51.137418 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13203 22:25:51.137493 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13204 22:25:51.137581 arm64_za-ptrace_Set_VL_2096 pass
13205 22:25:51.137666 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13206 22:25:51.137740 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13207 22:25:51.137811 arm64_za-ptrace_Set_VL_2112 pass
13208 22:25:51.137908 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13209 22:25:51.137987 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13210 22:25:51.138067 arm64_za-ptrace_Set_VL_2128 pass
13211 22:25:51.138159 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13212 22:25:51.138235 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13213 22:25:51.138323 arm64_za-ptrace_Set_VL_2144 pass
13214 22:25:51.138398 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13215 22:25:51.138487 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13216 22:25:51.138582 arm64_za-ptrace_Set_VL_2160 pass
13217 22:25:51.138677 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13218 22:25:51.138769 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13219 22:25:51.138862 arm64_za-ptrace_Set_VL_2176 pass
13220 22:25:51.139185 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13221 22:25:51.139381 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13222 22:25:51.139559 arm64_za-ptrace_Set_VL_2192 pass
13223 22:25:51.139731 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13224 22:25:51.139859 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13225 22:25:51.139981 arm64_za-ptrace_Set_VL_2208 pass
13226 22:25:51.140099 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13227 22:25:51.140217 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13228 22:25:51.146485 arm64_za-ptrace_Set_VL_2224 pass
13229 22:25:51.146846 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13230 22:25:51.147271 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13231 22:25:51.147424 arm64_za-ptrace_Set_VL_2240 pass
13232 22:25:51.147553 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13233 22:25:51.147702 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13234 22:25:51.147905 arm64_za-ptrace_Set_VL_2256 pass
13235 22:25:51.148072 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13236 22:25:51.148206 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13237 22:25:51.148311 arm64_za-ptrace_Set_VL_2272 pass
13238 22:25:51.148414 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13239 22:25:51.148502 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13240 22:25:51.148590 arm64_za-ptrace_Set_VL_2288 pass
13241 22:25:51.148684 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13242 22:25:51.148772 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13243 22:25:51.148869 arm64_za-ptrace_Set_VL_2304 pass
13244 22:25:51.148973 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13245 22:25:51.149083 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13246 22:25:51.149201 arm64_za-ptrace_Set_VL_2320 pass
13247 22:25:51.149312 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13248 22:25:51.149431 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13249 22:25:51.149531 arm64_za-ptrace_Set_VL_2336 pass
13250 22:25:51.149633 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13251 22:25:51.149740 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13252 22:25:51.149841 arm64_za-ptrace_Set_VL_2352 pass
13253 22:25:51.149946 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13254 22:25:51.150044 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13255 22:25:51.150115 arm64_za-ptrace_Set_VL_2368 pass
13256 22:25:51.150192 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13257 22:25:51.150256 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13258 22:25:51.150316 arm64_za-ptrace_Set_VL_2384 pass
13259 22:25:51.150374 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13260 22:25:51.150433 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13261 22:25:51.150492 arm64_za-ptrace_Set_VL_2400 pass
13262 22:25:51.154450 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13263 22:25:51.154679 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13264 22:25:51.155019 arm64_za-ptrace_Set_VL_2416 pass
13265 22:25:51.155120 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13266 22:25:51.155204 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13267 22:25:51.155291 arm64_za-ptrace_Set_VL_2432 pass
13268 22:25:51.155375 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13269 22:25:51.155477 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13270 22:25:51.155562 arm64_za-ptrace_Set_VL_2448 pass
13271 22:25:51.155638 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13272 22:25:51.155711 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13273 22:25:51.155784 arm64_za-ptrace_Set_VL_2464 pass
13274 22:25:51.155870 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13275 22:25:51.155944 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13276 22:25:51.156018 arm64_za-ptrace_Set_VL_2480 pass
13277 22:25:51.156104 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13278 22:25:51.156179 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13279 22:25:51.156264 arm64_za-ptrace_Set_VL_2496 pass
13280 22:25:51.156606 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13281 22:25:51.156701 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13282 22:25:51.156776 arm64_za-ptrace_Set_VL_2512 pass
13283 22:25:51.156851 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13284 22:25:51.156940 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13285 22:25:51.157018 arm64_za-ptrace_Set_VL_2528 pass
13286 22:25:51.157095 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13287 22:25:51.157190 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13288 22:25:51.157271 arm64_za-ptrace_Set_VL_2544 pass
13289 22:25:51.157360 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13290 22:25:51.157451 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13291 22:25:51.157529 arm64_za-ptrace_Set_VL_2560 pass
13292 22:25:51.157618 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13293 22:25:51.162716 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13294 22:25:51.186774 arm64_za-ptrace_Set_VL_2576 pass
13295 22:25:51.187014 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13296 22:25:51.187094 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13297 22:25:51.187394 arm64_za-ptrace_Set_VL_2592 pass
13298 22:25:51.187506 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13299 22:25:51.187598 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13300 22:25:51.188347 arm64_za-ptrace_Set_VL_2608 pass
13301 22:25:51.188465 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13302 22:25:51.188559 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13303 22:25:51.188647 arm64_za-ptrace_Set_VL_2624 pass
13304 22:25:51.188734 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13305 22:25:51.188821 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13306 22:25:51.189114 arm64_za-ptrace_Set_VL_2640 pass
13307 22:25:51.189229 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13308 22:25:51.189320 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13309 22:25:51.189408 arm64_za-ptrace_Set_VL_2656 pass
13310 22:25:51.189495 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13311 22:25:51.189582 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13312 22:25:51.189683 arm64_za-ptrace_Set_VL_2672 pass
13313 22:25:51.189772 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13314 22:25:51.189864 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13315 22:25:51.189952 arm64_za-ptrace_Set_VL_2688 pass
13316 22:25:51.190040 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13317 22:25:51.190389 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13318 22:25:51.190496 arm64_za-ptrace_Set_VL_2704 pass
13319 22:25:51.190583 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13320 22:25:51.190661 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13321 22:25:51.190737 arm64_za-ptrace_Set_VL_2720 pass
13322 22:25:51.190812 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13323 22:25:51.190896 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13324 22:25:51.190972 arm64_za-ptrace_Set_VL_2736 pass
13325 22:25:51.191044 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13326 22:25:51.191117 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13327 22:25:51.191192 arm64_za-ptrace_Set_VL_2752 pass
13328 22:25:51.191263 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13329 22:25:51.191335 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13330 22:25:51.191411 arm64_za-ptrace_Set_VL_2768 pass
13331 22:25:51.191489 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13332 22:25:51.191565 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13333 22:25:51.191639 arm64_za-ptrace_Set_VL_2784 pass
13334 22:25:51.191710 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13335 22:25:51.191979 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13336 22:25:51.192063 arm64_za-ptrace_Set_VL_2800 pass
13337 22:25:51.194244 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13338 22:25:51.194612 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13339 22:25:51.194734 arm64_za-ptrace_Set_VL_2816 pass
13340 22:25:51.194852 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13341 22:25:51.194964 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13342 22:25:51.195366 arm64_za-ptrace_Set_VL_2832 pass
13343 22:25:51.195537 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13344 22:25:51.195713 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13345 22:25:51.195864 arm64_za-ptrace_Set_VL_2848 pass
13346 22:25:51.196275 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13347 22:25:51.196489 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13348 22:25:51.196708 arm64_za-ptrace_Set_VL_2864 pass
13349 22:25:51.196884 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13350 22:25:51.197036 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13351 22:25:51.197209 arm64_za-ptrace_Set_VL_2880 pass
13352 22:25:51.197397 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13353 22:25:51.197556 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13354 22:25:51.197768 arm64_za-ptrace_Set_VL_2896 pass
13355 22:25:51.197942 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13356 22:25:51.198099 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13357 22:25:51.198257 arm64_za-ptrace_Set_VL_2912 pass
13358 22:25:51.198380 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13359 22:25:51.198496 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13360 22:25:51.198612 arm64_za-ptrace_Set_VL_2928 pass
13361 22:25:51.198729 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13362 22:25:51.198844 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13363 22:25:51.198959 arm64_za-ptrace_Set_VL_2944 pass
13364 22:25:51.199073 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13365 22:25:51.199187 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13366 22:25:51.199302 arm64_za-ptrace_Set_VL_2960 pass
13367 22:25:51.199416 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13368 22:25:51.199530 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13369 22:25:51.199644 arm64_za-ptrace_Set_VL_2976 pass
13370 22:25:51.199785 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13371 22:25:51.202415 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13372 22:25:51.202693 arm64_za-ptrace_Set_VL_2992 pass
13373 22:25:51.203117 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13374 22:25:51.203274 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13375 22:25:51.203358 arm64_za-ptrace_Set_VL_3008 pass
13376 22:25:51.203440 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13377 22:25:51.203525 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13378 22:25:51.203619 arm64_za-ptrace_Set_VL_3024 pass
13379 22:25:51.203697 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13380 22:25:51.203771 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13381 22:25:51.203843 arm64_za-ptrace_Set_VL_3040 pass
13382 22:25:51.203929 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13383 22:25:51.204018 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13384 22:25:51.204093 arm64_za-ptrace_Set_VL_3056 pass
13385 22:25:51.204168 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13386 22:25:51.204261 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13387 22:25:51.204336 arm64_za-ptrace_Set_VL_3072 pass
13388 22:25:51.204421 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13389 22:25:51.204496 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13390 22:25:51.204868 arm64_za-ptrace_Set_VL_3088 pass
13391 22:25:51.204967 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13392 22:25:51.205051 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13393 22:25:51.205129 arm64_za-ptrace_Set_VL_3104 pass
13394 22:25:51.205510 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13395 22:25:51.205611 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13396 22:25:51.205711 arm64_za-ptrace_Set_VL_3120 pass
13397 22:25:51.205791 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13398 22:25:51.206088 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13399 22:25:51.206187 arm64_za-ptrace_Set_VL_3136 pass
13400 22:25:51.206270 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13401 22:25:51.206343 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13402 22:25:51.206418 arm64_za-ptrace_Set_VL_3152 pass
13403 22:25:51.206493 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13404 22:25:51.210442 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13405 22:25:51.210625 arm64_za-ptrace_Set_VL_3168 pass
13406 22:25:51.210938 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13407 22:25:51.211046 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13408 22:25:51.211136 arm64_za-ptrace_Set_VL_3184 pass
13409 22:25:51.211224 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13410 22:25:51.211310 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13411 22:25:51.211414 arm64_za-ptrace_Set_VL_3200 pass
13412 22:25:51.211503 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13413 22:25:51.211601 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13414 22:25:51.211680 arm64_za-ptrace_Set_VL_3216 pass
13415 22:25:51.211768 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13416 22:25:51.211843 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13417 22:25:51.211915 arm64_za-ptrace_Set_VL_3232 pass
13418 22:25:51.211984 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13419 22:25:51.212067 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13420 22:25:51.212138 arm64_za-ptrace_Set_VL_3248 pass
13421 22:25:51.212223 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13422 22:25:51.212307 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13423 22:25:51.212380 arm64_za-ptrace_Set_VL_3264 pass
13424 22:25:51.212450 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13425 22:25:51.212532 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13426 22:25:51.212604 arm64_za-ptrace_Set_VL_3280 pass
13427 22:25:51.212673 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13428 22:25:51.212754 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13429 22:25:51.212827 arm64_za-ptrace_Set_VL_3296 pass
13430 22:25:51.212908 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13431 22:25:51.212992 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13432 22:25:51.213064 arm64_za-ptrace_Set_VL_3312 pass
13433 22:25:51.213150 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13434 22:25:51.213643 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13435 22:25:51.213759 arm64_za-ptrace_Set_VL_3328 pass
13436 22:25:51.213848 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13437 22:25:51.213934 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13438 22:25:51.214020 arm64_za-ptrace_Set_VL_3344 pass
13439 22:25:51.214121 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13440 22:25:51.214209 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13441 22:25:51.214303 arm64_za-ptrace_Set_VL_3360 pass
13442 22:25:51.218293 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13443 22:25:51.218607 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13444 22:25:51.218760 arm64_za-ptrace_Set_VL_3376 pass
13445 22:25:51.218884 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13446 22:25:51.218976 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13447 22:25:51.219063 arm64_za-ptrace_Set_VL_3392 pass
13448 22:25:51.219164 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13449 22:25:51.221849 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13450 22:25:51.221987 arm64_za-ptrace_Set_VL_3408 pass
13451 22:25:51.222077 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13452 22:25:51.222163 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13453 22:25:51.222254 arm64_za-ptrace_Set_VL_3424 pass
13454 22:25:51.222338 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13455 22:25:51.222424 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13456 22:25:51.222508 arm64_za-ptrace_Set_VL_3440 pass
13457 22:25:51.222593 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13458 22:25:51.222678 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13459 22:25:51.222762 arm64_za-ptrace_Set_VL_3456 pass
13460 22:25:51.222847 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13461 22:25:51.222932 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13462 22:25:51.223017 arm64_za-ptrace_Set_VL_3472 pass
13463 22:25:51.223101 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13464 22:25:51.223186 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13465 22:25:51.223271 arm64_za-ptrace_Set_VL_3488 pass
13466 22:25:51.223356 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13467 22:25:51.223441 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13468 22:25:51.223529 arm64_za-ptrace_Set_VL_3504 pass
13469 22:25:51.223613 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13470 22:25:51.223701 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13471 22:25:51.223786 arm64_za-ptrace_Set_VL_3520 pass
13472 22:25:51.223871 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13473 22:25:51.223956 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13474 22:25:51.224040 arm64_za-ptrace_Set_VL_3536 pass
13475 22:25:51.224125 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13476 22:25:51.224434 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13477 22:25:51.224590 arm64_za-ptrace_Set_VL_3552 pass
13478 22:25:51.226314 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13479 22:25:51.226838 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13480 22:25:51.226946 arm64_za-ptrace_Set_VL_3568 pass
13481 22:25:51.227038 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13482 22:25:51.227125 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13483 22:25:51.227228 arm64_za-ptrace_Set_VL_3584 pass
13484 22:25:51.227325 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13485 22:25:51.227511 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13486 22:25:51.254008 arm64_za-ptrace_Set_VL_3600 pass
13487 22:25:51.256106 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13488 22:25:51.257098 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13489 22:25:51.257188 arm64_za-ptrace_Set_VL_3616 pass
13490 22:25:51.257704 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13491 22:25:51.257803 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13492 22:25:51.257899 arm64_za-ptrace_Set_VL_3632 pass
13493 22:25:51.257985 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13494 22:25:51.258069 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13495 22:25:51.258136 arm64_za-ptrace_Set_VL_3648 pass
13496 22:25:51.258197 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13497 22:25:51.258260 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13498 22:25:51.258324 arm64_za-ptrace_Set_VL_3664 pass
13499 22:25:51.258388 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13500 22:25:51.258449 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13501 22:25:51.258509 arm64_za-ptrace_Set_VL_3680 pass
13502 22:25:51.258571 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13503 22:25:51.258631 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13504 22:25:51.258692 arm64_za-ptrace_Set_VL_3696 pass
13505 22:25:51.258752 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13506 22:25:51.258811 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13507 22:25:51.258869 arm64_za-ptrace_Set_VL_3712 pass
13508 22:25:51.258930 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13509 22:25:51.258989 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13510 22:25:51.259048 arm64_za-ptrace_Set_VL_3728 pass
13511 22:25:51.259106 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13512 22:25:51.259165 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13513 22:25:51.259223 arm64_za-ptrace_Set_VL_3744 pass
13514 22:25:51.259287 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13515 22:25:51.259349 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13516 22:25:51.259408 arm64_za-ptrace_Set_VL_3760 pass
13517 22:25:51.259466 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13518 22:25:51.259565 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13519 22:25:51.259636 arm64_za-ptrace_Set_VL_3776 pass
13520 22:25:51.259696 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13521 22:25:51.259779 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13522 22:25:51.259845 arm64_za-ptrace_Set_VL_3792 pass
13523 22:25:51.259904 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13524 22:25:51.259974 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13525 22:25:51.260047 arm64_za-ptrace_Set_VL_3808 pass
13526 22:25:51.260108 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13527 22:25:51.260369 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13528 22:25:51.260450 arm64_za-ptrace_Set_VL_3824 pass
13529 22:25:51.260511 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13530 22:25:51.262422 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13531 22:25:51.263061 arm64_za-ptrace_Set_VL_3840 pass
13532 22:25:51.263804 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13533 22:25:51.264033 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13534 22:25:51.264156 arm64_za-ptrace_Set_VL_3856 pass
13535 22:25:51.264328 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13536 22:25:51.264550 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13537 22:25:51.264672 arm64_za-ptrace_Set_VL_3872 pass
13538 22:25:51.264782 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13539 22:25:51.264891 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13540 22:25:51.264974 arm64_za-ptrace_Set_VL_3888 pass
13541 22:25:51.265053 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13542 22:25:51.265152 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13543 22:25:51.265235 arm64_za-ptrace_Set_VL_3904 pass
13544 22:25:51.265318 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13545 22:25:51.265398 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13546 22:25:51.265477 arm64_za-ptrace_Set_VL_3920 pass
13547 22:25:51.265556 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13548 22:25:51.265637 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13549 22:25:51.265727 arm64_za-ptrace_Set_VL_3936 pass
13550 22:25:51.265807 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13551 22:25:51.265900 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13552 22:25:51.266009 arm64_za-ptrace_Set_VL_3952 pass
13553 22:25:51.266107 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13554 22:25:51.266201 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13555 22:25:51.266268 arm64_za-ptrace_Set_VL_3968 pass
13556 22:25:51.266333 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13557 22:25:51.266399 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13558 22:25:51.266483 arm64_za-ptrace_Set_VL_3984 pass
13559 22:25:51.266546 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13560 22:25:51.266605 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13561 22:25:51.266667 arm64_za-ptrace_Set_VL_4000 pass
13562 22:25:51.266726 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13563 22:25:51.270448 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13564 22:25:51.270807 arm64_za-ptrace_Set_VL_4016 pass
13565 22:25:51.270915 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13566 22:25:51.271020 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13567 22:25:51.271132 arm64_za-ptrace_Set_VL_4032 pass
13568 22:25:51.271247 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13569 22:25:51.271355 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13570 22:25:51.271462 arm64_za-ptrace_Set_VL_4048 pass
13571 22:25:51.271597 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13572 22:25:51.271698 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13573 22:25:51.271809 arm64_za-ptrace_Set_VL_4064 pass
13574 22:25:51.271909 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13575 22:25:51.272032 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13576 22:25:51.272137 arm64_za-ptrace_Set_VL_4080 pass
13577 22:25:51.272263 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13578 22:25:51.272369 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13579 22:25:51.272477 arm64_za-ptrace_Set_VL_4096 pass
13580 22:25:51.272605 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13581 22:25:51.272709 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13582 22:25:51.272836 arm64_za-ptrace_Set_VL_4112 pass
13583 22:25:51.272950 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13584 22:25:51.273078 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13585 22:25:51.273184 arm64_za-ptrace_Set_VL_4128 pass
13586 22:25:51.273298 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13587 22:25:51.273394 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13588 22:25:51.273491 arm64_za-ptrace_Set_VL_4144 pass
13589 22:25:51.273574 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13590 22:25:51.273693 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13591 22:25:51.273787 arm64_za-ptrace_Set_VL_4160 pass
13592 22:25:51.273896 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13593 22:25:51.274196 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13594 22:25:51.278306 arm64_za-ptrace_Set_VL_4176 pass
13595 22:25:51.278690 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13596 22:25:51.278805 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13597 22:25:51.278897 arm64_za-ptrace_Set_VL_4192 pass
13598 22:25:51.279196 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13599 22:25:51.279324 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13600 22:25:51.279428 arm64_za-ptrace_Set_VL_4208 pass
13601 22:25:51.279520 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13602 22:25:51.279636 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13603 22:25:51.279725 arm64_za-ptrace_Set_VL_4224 pass
13604 22:25:51.279812 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13605 22:25:51.279899 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13606 22:25:51.280008 arm64_za-ptrace_Set_VL_4240 pass
13607 22:25:51.280103 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13608 22:25:51.280202 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13609 22:25:51.280304 arm64_za-ptrace_Set_VL_4256 pass
13610 22:25:51.280391 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13611 22:25:51.280485 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13612 22:25:51.280566 arm64_za-ptrace_Set_VL_4272 pass
13613 22:25:51.280659 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13614 22:25:51.280954 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13615 22:25:51.281051 arm64_za-ptrace_Set_VL_4288 pass
13616 22:25:51.281135 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13617 22:25:51.281288 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13618 22:25:51.281375 arm64_za-ptrace_Set_VL_4304 pass
13619 22:25:51.283556 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13620 22:25:51.283658 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13621 22:25:51.283747 arm64_za-ptrace_Set_VL_4320 pass
13622 22:25:51.283833 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13623 22:25:51.283919 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13624 22:25:51.284004 arm64_za-ptrace_Set_VL_4336 pass
13625 22:25:51.286307 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13626 22:25:51.286861 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13627 22:25:51.287030 arm64_za-ptrace_Set_VL_4352 pass
13628 22:25:51.287117 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13629 22:25:51.287201 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13630 22:25:51.287283 arm64_za-ptrace_Set_VL_4368 pass
13631 22:25:51.287742 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13632 22:25:51.287845 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13633 22:25:51.287962 arm64_za-ptrace_Set_VL_4384 pass
13634 22:25:51.288051 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13635 22:25:51.288136 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13636 22:25:51.288214 arm64_za-ptrace_Set_VL_4400 pass
13637 22:25:51.288295 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13638 22:25:51.288375 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13639 22:25:51.288454 arm64_za-ptrace_Set_VL_4416 pass
13640 22:25:51.288532 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13641 22:25:51.288631 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13642 22:25:51.288714 arm64_za-ptrace_Set_VL_4432 pass
13643 22:25:51.288795 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13644 22:25:51.288875 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13645 22:25:51.288955 arm64_za-ptrace_Set_VL_4448 pass
13646 22:25:51.289034 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13647 22:25:51.289112 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13648 22:25:51.289191 arm64_za-ptrace_Set_VL_4464 pass
13649 22:25:51.289271 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13650 22:25:51.289355 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13651 22:25:51.289453 arm64_za-ptrace_Set_VL_4480 pass
13652 22:25:51.289534 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13653 22:25:51.289612 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13654 22:25:51.289696 arm64_za-ptrace_Set_VL_4496 pass
13655 22:25:51.289777 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13656 22:25:51.289889 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13657 22:25:51.290005 arm64_za-ptrace_Set_VL_4512 pass
13658 22:25:51.290096 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13659 22:25:51.290182 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13660 22:25:51.290260 arm64_za-ptrace_Set_VL_4528 pass
13661 22:25:51.294600 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13662 22:25:51.294796 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13663 22:25:51.294888 arm64_za-ptrace_Set_VL_4544 pass
13664 22:25:51.295190 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13665 22:25:51.295293 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13666 22:25:51.295382 arm64_za-ptrace_Set_VL_4560 pass
13667 22:25:51.295484 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13668 22:25:51.295584 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13669 22:25:51.295665 arm64_za-ptrace_Set_VL_4576 pass
13670 22:25:51.295739 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13671 22:25:51.295834 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13672 22:25:51.295926 arm64_za-ptrace_Set_VL_4592 pass
13673 22:25:51.296015 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13674 22:25:51.296104 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13675 22:25:51.296193 arm64_za-ptrace_Set_VL_4608 pass
13676 22:25:51.296481 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13677 22:25:51.296569 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13678 22:25:51.296659 arm64_za-ptrace_Set_VL_4624 pass
13679 22:25:51.320763 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13680 22:25:51.321002 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13681 22:25:51.321091 arm64_za-ptrace_Set_VL_4640 pass
13682 22:25:51.321407 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13683 22:25:51.321526 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13684 22:25:51.321623 arm64_za-ptrace_Set_VL_4656 pass
13685 22:25:51.321725 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13686 22:25:51.321819 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13687 22:25:51.321927 arm64_za-ptrace_Set_VL_4672 pass
13688 22:25:51.322020 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13689 22:25:51.322113 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13690 22:25:51.322205 arm64_za-ptrace_Set_VL_4688 pass
13691 22:25:51.322310 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13692 22:25:51.322417 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13693 22:25:51.322511 arm64_za-ptrace_Set_VL_4704 pass
13694 22:25:51.322615 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13695 22:25:51.322705 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13696 22:25:51.322793 arm64_za-ptrace_Set_VL_4720 pass
13697 22:25:51.322897 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13698 22:25:51.322987 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13699 22:25:51.323075 arm64_za-ptrace_Set_VL_4736 pass
13700 22:25:51.323180 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13701 22:25:51.323269 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13702 22:25:51.323356 arm64_za-ptrace_Set_VL_4752 pass
13703 22:25:51.323461 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13704 22:25:51.323551 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13705 22:25:51.323639 arm64_za-ptrace_Set_VL_4768 pass
13706 22:25:51.323755 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13707 22:25:51.323845 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13708 22:25:51.323931 arm64_za-ptrace_Set_VL_4784 pass
13709 22:25:51.324035 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13710 22:25:51.324141 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13711 22:25:51.324231 arm64_za-ptrace_Set_VL_4800 pass
13712 22:25:51.324334 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13713 22:25:51.324426 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13714 22:25:51.324529 arm64_za-ptrace_Set_VL_4816 pass
13715 22:25:51.324633 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13716 22:25:51.324737 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13717 22:25:51.324840 arm64_za-ptrace_Set_VL_4832 pass
13718 22:25:51.325150 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13719 22:25:51.325442 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13720 22:25:51.325539 arm64_za-ptrace_Set_VL_4848 pass
13721 22:25:51.325627 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13722 22:25:51.325752 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13723 22:25:51.325859 arm64_za-ptrace_Set_VL_4864 pass
13724 22:25:51.325949 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13725 22:25:51.326036 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13726 22:25:51.326138 arm64_za-ptrace_Set_VL_4880 pass
13727 22:25:51.330304 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13728 22:25:51.330642 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13729 22:25:51.330749 arm64_za-ptrace_Set_VL_4896 pass
13730 22:25:51.330854 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13731 22:25:51.331157 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13732 22:25:51.331264 arm64_za-ptrace_Set_VL_4912 pass
13733 22:25:51.331369 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13734 22:25:51.331667 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13735 22:25:51.331788 arm64_za-ptrace_Set_VL_4928 pass
13736 22:25:51.332132 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13737 22:25:51.332253 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13738 22:25:51.332377 arm64_za-ptrace_Set_VL_4944 pass
13739 22:25:51.332474 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13740 22:25:51.332565 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13741 22:25:51.332633 arm64_za-ptrace_Set_VL_4960 pass
13742 22:25:51.332918 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13743 22:25:51.333021 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13744 22:25:51.333111 arm64_za-ptrace_Set_VL_4976 pass
13745 22:25:51.333197 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13746 22:25:51.333301 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13747 22:25:51.333380 arm64_za-ptrace_Set_VL_4992 pass
13748 22:25:51.333470 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13749 22:25:51.333551 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13750 22:25:51.333632 arm64_za-ptrace_Set_VL_5008 pass
13751 22:25:51.333954 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13752 22:25:51.334053 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13753 22:25:51.334144 arm64_za-ptrace_Set_VL_5024 pass
13754 22:25:51.334239 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13755 22:25:51.338230 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13756 22:25:51.338550 arm64_za-ptrace_Set_VL_5040 pass
13757 22:25:51.338652 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13758 22:25:51.338757 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13759 22:25:51.338841 arm64_za-ptrace_Set_VL_5056 pass
13760 22:25:51.338930 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13761 22:25:51.339225 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13762 22:25:51.339330 arm64_za-ptrace_Set_VL_5072 pass
13763 22:25:51.339436 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13764 22:25:51.339540 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13765 22:25:51.339627 arm64_za-ptrace_Set_VL_5088 pass
13766 22:25:51.339707 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13767 22:25:51.339798 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13768 22:25:51.339883 arm64_za-ptrace_Set_VL_5104 pass
13769 22:25:51.339980 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13770 22:25:51.340080 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13771 22:25:51.340325 arm64_za-ptrace_Set_VL_5120 pass
13772 22:25:51.340450 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13773 22:25:51.340556 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13774 22:25:51.340688 arm64_za-ptrace_Set_VL_5136 pass
13775 22:25:51.340799 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13776 22:25:51.340919 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13777 22:25:51.341046 arm64_za-ptrace_Set_VL_5152 pass
13778 22:25:51.341158 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13779 22:25:51.341286 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13780 22:25:51.341408 arm64_za-ptrace_Set_VL_5168 pass
13781 22:25:51.341521 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13782 22:25:51.341659 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13783 22:25:51.341764 arm64_za-ptrace_Set_VL_5184 pass
13784 22:25:51.341897 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13785 22:25:51.341996 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13786 22:25:51.346202 arm64_za-ptrace_Set_VL_5200 pass
13787 22:25:51.346507 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13788 22:25:51.346620 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13789 22:25:51.346731 arm64_za-ptrace_Set_VL_5216 pass
13790 22:25:51.346844 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13791 22:25:51.346953 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13792 22:25:51.347051 arm64_za-ptrace_Set_VL_5232 pass
13793 22:25:51.347155 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13794 22:25:51.347228 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13795 22:25:51.347328 arm64_za-ptrace_Set_VL_5248 pass
13796 22:25:51.347413 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13797 22:25:51.347520 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13798 22:25:51.347613 arm64_za-ptrace_Set_VL_5264 pass
13799 22:25:51.347742 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13800 22:25:51.347840 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13801 22:25:51.347939 arm64_za-ptrace_Set_VL_5280 pass
13802 22:25:51.348016 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13803 22:25:51.348305 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13804 22:25:51.348415 arm64_za-ptrace_Set_VL_5296 pass
13805 22:25:51.348538 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13806 22:25:51.348646 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13807 22:25:51.348767 arm64_za-ptrace_Set_VL_5312 pass
13808 22:25:51.348889 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13809 22:25:51.348998 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13810 22:25:51.349091 arm64_za-ptrace_Set_VL_5328 pass
13811 22:25:51.349224 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13812 22:25:51.349334 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13813 22:25:51.349437 arm64_za-ptrace_Set_VL_5344 pass
13814 22:25:51.349543 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13815 22:25:51.349673 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13816 22:25:51.349770 arm64_za-ptrace_Set_VL_5360 pass
13817 22:25:51.349861 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13818 22:25:51.349954 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13819 22:25:51.350077 arm64_za-ptrace_Set_VL_5376 pass
13820 22:25:51.350151 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13821 22:25:51.354265 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13822 22:25:51.354589 arm64_za-ptrace_Set_VL_5392 pass
13823 22:25:51.355010 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13824 22:25:51.355121 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13825 22:25:51.355214 arm64_za-ptrace_Set_VL_5408 pass
13826 22:25:51.355302 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13827 22:25:51.355407 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13828 22:25:51.355539 arm64_za-ptrace_Set_VL_5424 pass
13829 22:25:51.355724 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13830 22:25:51.356025 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13831 22:25:51.356137 arm64_za-ptrace_Set_VL_5440 pass
13832 22:25:51.356229 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
13833 22:25:51.356318 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
13834 22:25:51.356406 arm64_za-ptrace_Set_VL_5456 pass
13835 22:25:51.356493 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
13836 22:25:51.356597 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
13837 22:25:51.356687 arm64_za-ptrace_Set_VL_5472 pass
13838 22:25:51.356779 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
13839 22:25:51.357227 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
13840 22:25:51.357417 arm64_za-ptrace_Set_VL_5488 pass
13841 22:25:51.357601 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
13842 22:25:51.357790 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
13843 22:25:51.357941 arm64_za-ptrace_Set_VL_5504 pass
13844 22:25:51.358087 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
13845 22:25:51.358232 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
13846 22:25:51.358376 arm64_za-ptrace_Set_VL_5520 pass
13847 22:25:51.358520 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
13848 22:25:51.358702 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
13849 22:25:51.358842 arm64_za-ptrace_Set_VL_5536 pass
13850 22:25:51.358987 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
13851 22:25:51.359132 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
13852 22:25:51.359276 arm64_za-ptrace_Set_VL_5552 pass
13853 22:25:51.359420 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
13854 22:25:51.359563 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
13855 22:25:51.359707 arm64_za-ptrace_Set_VL_5568 pass
13856 22:25:51.370249 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
13857 22:25:51.370749 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
13858 22:25:51.370947 arm64_za-ptrace_Set_VL_5584 pass
13859 22:25:51.371104 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
13860 22:25:51.371272 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
13861 22:25:51.371441 arm64_za-ptrace_Set_VL_5600 pass
13862 22:25:51.371635 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
13863 22:25:51.371776 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
13864 22:25:51.371907 arm64_za-ptrace_Set_VL_5616 pass
13865 22:25:51.372035 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
13866 22:25:51.372165 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
13867 22:25:51.372294 arm64_za-ptrace_Set_VL_5632 pass
13868 22:25:51.372421 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
13869 22:25:51.372573 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
13870 22:25:51.372705 arm64_za-ptrace_Set_VL_5648 pass
13871 22:25:51.392329 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
13872 22:25:51.392740 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
13873 22:25:51.392830 arm64_za-ptrace_Set_VL_5664 pass
13874 22:25:51.392939 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
13875 22:25:51.393049 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
13876 22:25:51.393178 arm64_za-ptrace_Set_VL_5680 pass
13877 22:25:51.393281 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
13878 22:25:51.393394 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
13879 22:25:51.393486 arm64_za-ptrace_Set_VL_5696 pass
13880 22:25:51.393601 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
13881 22:25:51.393701 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
13882 22:25:51.393801 arm64_za-ptrace_Set_VL_5712 pass
13883 22:25:51.393888 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
13884 22:25:51.393978 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
13885 22:25:51.394043 arm64_za-ptrace_Set_VL_5728 pass
13886 22:25:51.394104 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
13887 22:25:51.394384 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
13888 22:25:51.394478 arm64_za-ptrace_Set_VL_5744 pass
13889 22:25:51.394585 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
13890 22:25:51.394675 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
13891 22:25:51.394747 arm64_za-ptrace_Set_VL_5760 pass
13892 22:25:51.394838 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
13893 22:25:51.394924 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
13894 22:25:51.394996 arm64_za-ptrace_Set_VL_5776 pass
13895 22:25:51.395085 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
13896 22:25:51.395170 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
13897 22:25:51.395450 arm64_za-ptrace_Set_VL_5792 pass
13898 22:25:51.395580 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
13899 22:25:51.395766 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
13900 22:25:51.396278 arm64_za-ptrace_Set_VL_5808 pass
13901 22:25:51.396478 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
13902 22:25:51.396724 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
13903 22:25:51.396890 arm64_za-ptrace_Set_VL_5824 pass
13904 22:25:51.397052 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
13905 22:25:51.397218 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
13906 22:25:51.397388 arm64_za-ptrace_Set_VL_5840 pass
13907 22:25:51.397555 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
13908 22:25:51.397784 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
13909 22:25:51.398004 arm64_za-ptrace_Set_VL_5856 pass
13910 22:25:51.398213 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
13911 22:25:51.398420 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
13912 22:25:51.398599 arm64_za-ptrace_Set_VL_5872 pass
13913 22:25:51.398785 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
13914 22:25:51.398955 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
13915 22:25:51.399146 arm64_za-ptrace_Set_VL_5888 pass
13916 22:25:51.399333 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
13917 22:25:51.399522 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
13918 22:25:51.399701 arm64_za-ptrace_Set_VL_5904 pass
13919 22:25:51.399876 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
13920 22:25:51.400046 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
13921 22:25:51.400219 arm64_za-ptrace_Set_VL_5920 pass
13922 22:25:51.400436 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
13923 22:25:51.400611 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
13924 22:25:51.400784 arm64_za-ptrace_Set_VL_5936 pass
13925 22:25:51.400957 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
13926 22:25:51.401119 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
13927 22:25:51.401269 arm64_za-ptrace_Set_VL_5952 pass
13928 22:25:51.401430 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
13929 22:25:51.401601 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
13930 22:25:51.402427 arm64_za-ptrace_Set_VL_5968 pass
13931 22:25:51.402562 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
13932 22:25:51.402683 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
13933 22:25:51.402801 arm64_za-ptrace_Set_VL_5984 pass
13934 22:25:51.402917 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
13935 22:25:51.403032 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
13936 22:25:51.403148 arm64_za-ptrace_Set_VL_6000 pass
13937 22:25:51.403264 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
13938 22:25:51.403380 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
13939 22:25:51.403496 arm64_za-ptrace_Set_VL_6016 pass
13940 22:25:51.403611 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
13941 22:25:51.403727 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
13942 22:25:51.403843 arm64_za-ptrace_Set_VL_6032 pass
13943 22:25:51.403958 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
13944 22:25:51.404074 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
13945 22:25:51.404425 arm64_za-ptrace_Set_VL_6048 pass
13946 22:25:51.404585 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
13947 22:25:51.404711 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
13948 22:25:51.404829 arm64_za-ptrace_Set_VL_6064 pass
13949 22:25:51.404947 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
13950 22:25:51.405062 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
13951 22:25:51.405178 arm64_za-ptrace_Set_VL_6080 pass
13952 22:25:51.405294 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
13953 22:25:51.405411 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
13954 22:25:51.405527 arm64_za-ptrace_Set_VL_6096 pass
13955 22:25:51.405645 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
13956 22:25:51.405823 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
13957 22:25:51.405956 arm64_za-ptrace_Set_VL_6112 pass
13958 22:25:51.410427 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
13959 22:25:51.410718 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
13960 22:25:51.411197 arm64_za-ptrace_Set_VL_6128 pass
13961 22:25:51.411407 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
13962 22:25:51.411611 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
13963 22:25:51.411799 arm64_za-ptrace_Set_VL_6144 pass
13964 22:25:51.411967 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
13965 22:25:51.412136 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
13966 22:25:51.412302 arm64_za-ptrace_Set_VL_6160 pass
13967 22:25:51.412509 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
13968 22:25:51.412701 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
13969 22:25:51.412911 arm64_za-ptrace_Set_VL_6176 pass
13970 22:25:51.413089 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
13971 22:25:51.413252 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
13972 22:25:51.413413 arm64_za-ptrace_Set_VL_6192 pass
13973 22:25:51.413573 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
13974 22:25:51.413747 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
13975 22:25:51.413911 arm64_za-ptrace_Set_VL_6208 pass
13976 22:25:51.414073 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
13977 22:25:51.414195 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
13978 22:25:51.414310 arm64_za-ptrace_Set_VL_6224 pass
13979 22:25:51.414424 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
13980 22:25:51.414572 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
13981 22:25:51.414698 arm64_za-ptrace_Set_VL_6240 pass
13982 22:25:51.414814 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
13983 22:25:51.414930 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
13984 22:25:51.415046 arm64_za-ptrace_Set_VL_6256 pass
13985 22:25:51.415159 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
13986 22:25:51.415274 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
13987 22:25:51.415388 arm64_za-ptrace_Set_VL_6272 pass
13988 22:25:51.415520 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
13989 22:25:51.415674 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
13990 22:25:51.415795 arm64_za-ptrace_Set_VL_6288 pass
13991 22:25:51.415910 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
13992 22:25:51.416026 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
13993 22:25:51.416139 arm64_za-ptrace_Set_VL_6304 pass
13994 22:25:51.416250 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
13995 22:25:51.418257 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
13996 22:25:51.418372 arm64_za-ptrace_Set_VL_6320 pass
13997 22:25:51.418669 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
13998 22:25:51.419076 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
13999 22:25:51.419188 arm64_za-ptrace_Set_VL_6336 pass
14000 22:25:51.419277 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14001 22:25:51.419384 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14002 22:25:51.419476 arm64_za-ptrace_Set_VL_6352 pass
14003 22:25:51.419564 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14004 22:25:51.419651 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14005 22:25:51.419739 arm64_za-ptrace_Set_VL_6368 pass
14006 22:25:51.419826 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14007 22:25:51.419932 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14008 22:25:51.420023 arm64_za-ptrace_Set_VL_6384 pass
14009 22:25:51.420111 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14010 22:25:51.420199 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14011 22:25:51.420287 arm64_za-ptrace_Set_VL_6400 pass
14012 22:25:51.420375 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14013 22:25:51.420479 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14014 22:25:51.420568 arm64_za-ptrace_Set_VL_6416 pass
14015 22:25:51.420658 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14016 22:25:51.420761 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14017 22:25:51.420851 arm64_za-ptrace_Set_VL_6432 pass
14018 22:25:51.420938 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14019 22:25:51.421025 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14020 22:25:51.421128 arm64_za-ptrace_Set_VL_6448 pass
14021 22:25:51.421217 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14022 22:25:51.421304 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14023 22:25:51.421391 arm64_za-ptrace_Set_VL_6464 pass
14024 22:25:51.421493 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14025 22:25:51.421583 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14026 22:25:51.421684 arm64_za-ptrace_Set_VL_6480 pass
14027 22:25:51.422275 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14028 22:25:51.422389 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14029 22:25:51.422480 arm64_za-ptrace_Set_VL_6496 pass
14030 22:25:51.422567 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14031 22:25:51.422654 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14032 22:25:51.422741 arm64_za-ptrace_Set_VL_6512 pass
14033 22:25:51.422828 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14034 22:25:51.422916 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14035 22:25:51.423021 arm64_za-ptrace_Set_VL_6528 pass
14036 22:25:51.423110 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14037 22:25:51.423198 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14038 22:25:51.423285 arm64_za-ptrace_Set_VL_6544 pass
14039 22:25:51.423372 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14040 22:25:51.423459 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14041 22:25:51.423546 arm64_za-ptrace_Set_VL_6560 pass
14042 22:25:51.423652 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14043 22:25:51.423740 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14044 22:25:51.423827 arm64_za-ptrace_Set_VL_6576 pass
14045 22:25:51.423914 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14046 22:25:51.424000 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14047 22:25:51.424086 arm64_za-ptrace_Set_VL_6592 pass
14048 22:25:51.424191 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14049 22:25:51.424281 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14050 22:25:51.424368 arm64_za-ptrace_Set_VL_6608 pass
14051 22:25:51.424455 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14052 22:25:51.424540 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14053 22:25:51.424627 arm64_za-ptrace_Set_VL_6624 pass
14054 22:25:51.424713 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14055 22:25:51.424800 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14056 22:25:51.424886 arm64_za-ptrace_Set_VL_6640 pass
14057 22:25:51.424972 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14058 22:25:51.425059 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14059 22:25:51.425145 arm64_za-ptrace_Set_VL_6656 pass
14060 22:25:51.425248 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14061 22:25:51.425337 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14062 22:25:51.425424 arm64_za-ptrace_Set_VL_6672 pass
14063 22:25:51.425511 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14064 22:25:51.457513 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14065 22:25:51.457734 arm64_za-ptrace_Set_VL_6688 pass
14066 22:25:51.457822 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14067 22:25:51.458052 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14068 22:25:51.458143 arm64_za-ptrace_Set_VL_6704 pass
14069 22:25:51.458228 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14070 22:25:51.458315 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14071 22:25:51.458646 arm64_za-ptrace_Set_VL_6720 pass
14072 22:25:51.458786 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14073 22:25:51.458869 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14074 22:25:51.458966 arm64_za-ptrace_Set_VL_6736 pass
14075 22:25:51.459055 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14076 22:25:51.459137 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14077 22:25:51.459235 arm64_za-ptrace_Set_VL_6752 pass
14078 22:25:51.459320 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14079 22:25:51.459401 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14080 22:25:51.459508 arm64_za-ptrace_Set_VL_6768 pass
14081 22:25:51.459893 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14082 22:25:51.460007 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14083 22:25:51.460115 arm64_za-ptrace_Set_VL_6784 pass
14084 22:25:51.460216 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14085 22:25:51.460323 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14086 22:25:51.460432 arm64_za-ptrace_Set_VL_6800 pass
14087 22:25:51.460526 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14088 22:25:51.460608 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14089 22:25:51.460715 arm64_za-ptrace_Set_VL_6816 pass
14090 22:25:51.460825 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14091 22:25:51.460927 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14092 22:25:51.461014 arm64_za-ptrace_Set_VL_6832 pass
14093 22:25:51.461095 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14094 22:25:51.461174 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14095 22:25:51.461255 arm64_za-ptrace_Set_VL_6848 pass
14096 22:25:51.461335 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14097 22:25:51.461432 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14098 22:25:51.461515 arm64_za-ptrace_Set_VL_6864 pass
14099 22:25:51.461595 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14100 22:25:51.461890 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14101 22:25:51.462000 arm64_za-ptrace_Set_VL_6880 pass
14102 22:25:51.462112 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14103 22:25:51.462195 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14104 22:25:51.462270 arm64_za-ptrace_Set_VL_6896 pass
14105 22:25:51.462344 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14106 22:25:51.462416 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14107 22:25:51.462489 arm64_za-ptrace_Set_VL_6912 pass
14108 22:25:51.462562 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14109 22:25:51.462638 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14110 22:25:51.462721 arm64_za-ptrace_Set_VL_6928 pass
14111 22:25:51.462809 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14112 22:25:51.462897 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14113 22:25:51.466227 arm64_za-ptrace_Set_VL_6944 pass
14114 22:25:51.466576 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14115 22:25:51.466706 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14116 22:25:51.466816 arm64_za-ptrace_Set_VL_6960 pass
14117 22:25:51.466903 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14118 22:25:51.467002 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14119 22:25:51.467088 arm64_za-ptrace_Set_VL_6976 pass
14120 22:25:51.467184 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14121 22:25:51.467285 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14122 22:25:51.467390 arm64_za-ptrace_Set_VL_6992 pass
14123 22:25:51.467477 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14124 22:25:51.467593 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14125 22:25:51.467915 arm64_za-ptrace_Set_VL_7008 pass
14126 22:25:51.468015 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14127 22:25:51.468113 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14128 22:25:51.468415 arm64_za-ptrace_Set_VL_7024 pass
14129 22:25:51.468524 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14130 22:25:51.468616 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14131 22:25:51.468703 arm64_za-ptrace_Set_VL_7040 pass
14132 22:25:51.468807 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14133 22:25:51.468897 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14134 22:25:51.469000 arm64_za-ptrace_Set_VL_7056 pass
14135 22:25:51.469089 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14136 22:25:51.469176 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14137 22:25:51.469277 arm64_za-ptrace_Set_VL_7072 pass
14138 22:25:51.469366 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14139 22:25:51.469452 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14140 22:25:51.469554 arm64_za-ptrace_Set_VL_7088 pass
14141 22:25:51.469642 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14142 22:25:51.469743 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14143 22:25:51.469846 arm64_za-ptrace_Set_VL_7104 pass
14144 22:25:51.470130 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14145 22:25:51.470212 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14146 22:25:51.470278 arm64_za-ptrace_Set_VL_7120 pass
14147 22:25:51.470340 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14148 22:25:51.474320 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14149 22:25:51.474686 arm64_za-ptrace_Set_VL_7136 pass
14150 22:25:51.474780 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14151 22:25:51.474848 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14152 22:25:51.474910 arm64_za-ptrace_Set_VL_7152 pass
14153 22:25:51.474971 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14154 22:25:51.475248 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14155 22:25:51.475360 arm64_za-ptrace_Set_VL_7168 pass
14156 22:25:51.475463 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14157 22:25:51.475561 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14158 22:25:51.475667 arm64_za-ptrace_Set_VL_7184 pass
14159 22:25:51.475784 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14160 22:25:51.475904 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14161 22:25:51.475999 arm64_za-ptrace_Set_VL_7200 pass
14162 22:25:51.476098 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14163 22:25:51.476199 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14164 22:25:51.476299 arm64_za-ptrace_Set_VL_7216 pass
14165 22:25:51.476424 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14166 22:25:51.476527 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14167 22:25:51.476627 arm64_za-ptrace_Set_VL_7232 pass
14168 22:25:51.476730 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14169 22:25:51.476836 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14170 22:25:51.476936 arm64_za-ptrace_Set_VL_7248 pass
14171 22:25:51.477058 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14172 22:25:51.477152 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14173 22:25:51.477247 arm64_za-ptrace_Set_VL_7264 pass
14174 22:25:51.477344 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14175 22:25:51.477461 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14176 22:25:51.477560 arm64_za-ptrace_Set_VL_7280 pass
14177 22:25:51.477669 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14178 22:25:51.477774 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14179 22:25:51.478168 arm64_za-ptrace_Set_VL_7296 pass
14180 22:25:51.478241 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14181 22:25:51.478302 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14182 22:25:51.478362 arm64_za-ptrace_Set_VL_7312 pass
14183 22:25:51.478437 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14184 22:25:51.478501 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14185 22:25:51.482178 arm64_za-ptrace_Set_VL_7328 pass
14186 22:25:51.482618 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14187 22:25:51.482769 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14188 22:25:51.482868 arm64_za-ptrace_Set_VL_7344 pass
14189 22:25:51.482974 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14190 22:25:51.483065 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14191 22:25:51.483153 arm64_za-ptrace_Set_VL_7360 pass
14192 22:25:51.483239 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14193 22:25:51.483495 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14194 22:25:51.483582 arm64_za-ptrace_Set_VL_7376 pass
14195 22:25:51.483656 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14196 22:25:51.483728 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14197 22:25:51.483802 arm64_za-ptrace_Set_VL_7392 pass
14198 22:25:51.483886 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14199 22:25:51.483959 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14200 22:25:51.484028 arm64_za-ptrace_Set_VL_7408 pass
14201 22:25:51.484099 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14202 22:25:51.484181 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14203 22:25:51.484253 arm64_za-ptrace_Set_VL_7424 pass
14204 22:25:51.484335 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14205 22:25:51.484645 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14206 22:25:51.484743 arm64_za-ptrace_Set_VL_7440 pass
14207 22:25:51.484821 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14208 22:25:51.484903 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14209 22:25:51.484977 arm64_za-ptrace_Set_VL_7456 pass
14210 22:25:51.485047 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14211 22:25:51.485130 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14212 22:25:51.485212 arm64_za-ptrace_Set_VL_7472 pass
14213 22:25:51.485298 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14214 22:25:51.485384 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14215 22:25:51.485487 arm64_za-ptrace_Set_VL_7488 pass
14216 22:25:51.485576 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14217 22:25:51.485671 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14218 22:25:51.485780 arm64_za-ptrace_Set_VL_7504 pass
14219 22:25:51.485870 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14220 22:25:51.485971 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14221 22:25:51.486061 arm64_za-ptrace_Set_VL_7520 pass
14222 22:25:51.490354 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14223 22:25:51.490872 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14224 22:25:51.490982 arm64_za-ptrace_Set_VL_7536 pass
14225 22:25:51.491069 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14226 22:25:51.491151 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14227 22:25:51.491232 arm64_za-ptrace_Set_VL_7552 pass
14228 22:25:51.491315 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14229 22:25:51.491622 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14230 22:25:51.491730 arm64_za-ptrace_Set_VL_7568 pass
14231 22:25:51.491816 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14232 22:25:51.491898 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14233 22:25:51.491980 arm64_za-ptrace_Set_VL_7584 pass
14234 22:25:51.492078 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14235 22:25:51.492163 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14236 22:25:51.492245 arm64_za-ptrace_Set_VL_7600 pass
14237 22:25:51.492328 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14238 22:25:51.492410 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14239 22:25:51.492491 arm64_za-ptrace_Set_VL_7616 pass
14240 22:25:51.492572 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14241 22:25:51.492656 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14242 22:25:51.492755 arm64_za-ptrace_Set_VL_7632 pass
14243 22:25:51.492841 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14244 22:25:51.492923 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14245 22:25:51.493004 arm64_za-ptrace_Set_VL_7648 pass
14246 22:25:51.493101 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14247 22:25:51.493184 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14248 22:25:51.493266 arm64_za-ptrace_Set_VL_7664 pass
14249 22:25:51.493346 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14250 22:25:51.493427 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14251 22:25:51.493522 arm64_za-ptrace_Set_VL_7680 pass
14252 22:25:51.493606 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14253 22:25:51.493700 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14254 22:25:51.494167 arm64_za-ptrace_Set_VL_7696 pass
14255 22:25:51.494259 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14256 22:25:51.529690 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14257 22:25:51.529948 arm64_za-ptrace_Set_VL_7712 pass
14258 22:25:51.530264 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14259 22:25:51.530376 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14260 22:25:51.530468 arm64_za-ptrace_Set_VL_7728 pass
14261 22:25:51.530561 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14262 22:25:51.530653 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14263 22:25:51.530761 arm64_za-ptrace_Set_VL_7744 pass
14264 22:25:51.530856 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14265 22:25:51.530946 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14266 22:25:51.531350 arm64_za-ptrace_Set_VL_7760 pass
14267 22:25:51.531549 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14268 22:25:51.532148 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14269 22:25:51.533182 arm64_za-ptrace_Set_VL_7776 pass
14270 22:25:51.533438 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14271 22:25:51.533533 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14272 22:25:51.533643 arm64_za-ptrace_Set_VL_7792 pass
14273 22:25:51.533741 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14274 22:25:51.533830 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14275 22:25:51.533919 arm64_za-ptrace_Set_VL_7808 pass
14276 22:25:51.534007 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14277 22:25:51.534095 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14278 22:25:51.534186 arm64_za-ptrace_Set_VL_7824 pass
14279 22:25:51.534276 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14280 22:25:51.534366 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14281 22:25:51.534456 arm64_za-ptrace_Set_VL_7840 pass
14282 22:25:51.534545 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14283 22:25:51.534634 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14284 22:25:51.534723 arm64_za-ptrace_Set_VL_7856 pass
14285 22:25:51.534812 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14286 22:25:51.534901 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14287 22:25:51.534990 arm64_za-ptrace_Set_VL_7872 pass
14288 22:25:51.535079 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14289 22:25:51.535169 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14290 22:25:51.535258 arm64_za-ptrace_Set_VL_7888 pass
14291 22:25:51.535366 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14292 22:25:51.535458 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14293 22:25:51.535548 arm64_za-ptrace_Set_VL_7904 pass
14294 22:25:51.535636 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14295 22:25:51.538549 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14296 22:25:51.538939 arm64_za-ptrace_Set_VL_7920 pass
14297 22:25:51.539056 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14298 22:25:51.539152 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14299 22:25:51.539241 arm64_za-ptrace_Set_VL_7936 pass
14300 22:25:51.539328 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14301 22:25:51.539415 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14302 22:25:51.539521 arm64_za-ptrace_Set_VL_7952 pass
14303 22:25:51.539612 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14304 22:25:51.539701 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14305 22:25:51.539789 arm64_za-ptrace_Set_VL_7968 pass
14306 22:25:51.539876 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14307 22:25:51.539963 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14308 22:25:51.540067 arm64_za-ptrace_Set_VL_7984 pass
14309 22:25:51.540157 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14310 22:25:51.540515 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14311 22:25:51.540612 arm64_za-ptrace_Set_VL_8000 pass
14312 22:25:51.540700 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14313 22:25:51.540786 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14314 22:25:51.540874 arm64_za-ptrace_Set_VL_8016 pass
14315 22:25:51.540961 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14316 22:25:51.541047 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14317 22:25:51.541134 arm64_za-ptrace_Set_VL_8032 pass
14318 22:25:51.541239 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14319 22:25:51.541329 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14320 22:25:51.541417 arm64_za-ptrace_Set_VL_8048 pass
14321 22:25:51.541503 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14322 22:25:51.541590 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14323 22:25:51.541685 arm64_za-ptrace_Set_VL_8064 pass
14324 22:25:51.541772 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14325 22:25:51.541878 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14326 22:25:51.541968 arm64_za-ptrace_Set_VL_8080 pass
14327 22:25:51.542056 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14328 22:25:51.542143 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14329 22:25:51.542229 arm64_za-ptrace_Set_VL_8096 pass
14330 22:25:51.542315 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14331 22:25:51.542418 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14332 22:25:51.542508 arm64_za-ptrace_Set_VL_8112 pass
14333 22:25:51.542596 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14334 22:25:51.546256 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14335 22:25:51.546617 arm64_za-ptrace_Set_VL_8128 pass
14336 22:25:51.546729 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14337 22:25:51.546835 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14338 22:25:51.546927 arm64_za-ptrace_Set_VL_8144 pass
14339 22:25:51.547283 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14340 22:25:51.547452 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14341 22:25:51.547548 arm64_za-ptrace_Set_VL_8160 pass
14342 22:25:51.547636 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14343 22:25:51.547743 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14344 22:25:51.547835 arm64_za-ptrace_Set_VL_8176 pass
14345 22:25:51.547924 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14346 22:25:51.548014 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14347 22:25:51.548119 arm64_za-ptrace_Set_VL_8192 pass
14348 22:25:51.548209 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14349 22:25:51.548298 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14350 22:25:51.548387 arm64_za-ptrace pass
14351 22:25:51.548746 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14352 22:25:51.548877 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14353 22:25:51.549232 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14354 22:25:51.549398 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14355 22:25:51.549603 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14356 22:25:51.549772 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14357 22:25:51.554362 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14358 22:25:51.554654 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14359 22:25:51.555135 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14360 22:25:51.555251 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14361 22:25:51.555344 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14362 22:25:51.555450 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14363 22:25:51.555542 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14364 22:25:51.555869 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14365 22:25:51.556250 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14366 22:25:51.556362 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14367 22:25:51.556471 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14368 22:25:51.556577 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14369 22:25:51.556683 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14370 22:25:51.557017 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14371 22:25:51.557128 arm64_check_buffer_fill fail
14372 22:25:51.557234 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14373 22:25:51.557539 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14374 22:25:51.557973 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14375 22:25:51.562272 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14376 22:25:51.562685 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14377 22:25:51.562817 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14378 22:25:51.563313 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14379 22:25:51.563631 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14380 22:25:51.563845 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14381 22:25:51.563988 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14382 22:25:51.564422 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14383 22:25:51.565048 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14384 22:25:51.565165 arm64_check_child_memory fail
14385 22:25:51.565257 arm64_check_gcr_el1_cswitch fail
14386 22:25:51.565345 arm64_check_ksm_options fail
14387 22:25:51.565750 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14388 22:25:51.565906 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14389 22:25:51.570247 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14390 22:25:51.570578 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14391 22:25:51.571020 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14392 22:25:51.582977 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14393 22:25:51.583366 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14394 22:25:51.583542 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14395 22:25:51.583987 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14396 22:25:51.584244 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14397 22:25:51.584910 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14398 22:25:51.585267 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14399 22:25:51.585402 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14400 22:25:51.585498 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14401 22:25:51.585604 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14402 22:25:51.585721 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14403 22:25:51.590238 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14404 22:25:51.590806 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14405 22:25:51.590961 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14406 22:25:51.591276 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14407 22:25:51.591588 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14408 22:25:51.592012 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14409 22:25:51.592105 arm64_check_mmap_options fail
14410 22:25:51.592187 arm64_check_prctl_check_basic_read pass
14411 22:25:51.592492 arm64_check_prctl_NONE pass
14412 22:25:51.592624 arm64_check_prctl_SYNC pass
14413 22:25:51.592728 arm64_check_prctl_ASYNC pass
14414 22:25:51.592858 arm64_check_prctl_SYNC_ASYNC pass
14415 22:25:51.593040 arm64_check_prctl pass
14416 22:25:51.593164 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14417 22:25:51.593268 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14418 22:25:51.593370 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14419 22:25:51.593721 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14420 22:25:51.593832 arm64_check_tags_inclusion fail
14421 22:25:51.593985 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14422 22:25:51.594290 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14423 22:25:51.598216 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14424 22:25:51.598529 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14425 22:25:51.598882 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14426 22:25:51.599008 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14427 22:25:51.599335 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14428 22:25:51.599469 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14429 22:25:51.599700 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14430 22:25:51.599799 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14431 22:25:51.599912 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14432 22:25:51.600018 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14433 22:25:51.600360 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14434 22:25:51.600470 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14435 22:25:51.600578 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14436 22:25:51.600774 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14437 22:25:51.600875 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14438 22:25:51.601203 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14439 22:25:51.601313 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14440 22:25:51.601420 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14441 22:25:51.601526 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14442 22:25:51.601631 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14443 22:25:51.601911 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14444 22:25:51.606130 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14445 22:25:51.606446 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14446 22:25:51.606852 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14447 22:25:51.606964 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14448 22:25:51.607299 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14449 22:25:51.607678 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14450 22:25:51.607804 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14451 22:25:51.607930 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14452 22:25:51.608135 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14453 22:25:51.608248 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14454 22:25:51.608569 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14455 22:25:51.608695 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14456 22:25:51.609036 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14457 22:25:51.609160 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14458 22:25:51.609467 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14459 22:25:51.609588 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14460 22:25:51.609933 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14461 22:25:51.614645 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14462 22:25:51.614851 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14463 22:25:51.615174 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14464 22:25:51.615747 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14465 22:25:51.615929 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14466 22:25:51.616147 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14467 22:25:51.616407 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14468 22:25:51.616538 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14469 22:25:51.616855 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14470 22:25:51.617020 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14471 22:25:51.617124 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14472 22:25:51.617236 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14473 22:25:51.617329 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14474 22:25:51.617418 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14475 22:25:51.617507 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14476 22:25:51.617613 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14477 22:25:51.617714 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14478 22:25:51.617820 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14479 22:25:51.617911 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14480 22:25:51.618016 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14481 22:25:51.622668 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14482 22:25:51.622829 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14483 22:25:51.645736 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14484 22:25:51.646201 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14485 22:25:51.646308 arm64_check_user_mem pass
14486 22:25:51.646404 arm64_btitest_nohint_func_call_using_br_x0 pass
14487 22:25:51.646807 arm64_btitest_nohint_func_call_using_br_x16 pass
14488 22:25:51.647676 arm64_btitest_nohint_func_call_using_blr pass
14489 22:25:51.647860 arm64_btitest_bti_none_func_call_using_br_x0 pass
14490 22:25:51.647965 arm64_btitest_bti_none_func_call_using_br_x16 pass
14491 22:25:51.648205 arm64_btitest_bti_none_func_call_using_blr pass
14492 22:25:51.648304 arm64_btitest_bti_c_func_call_using_br_x0 pass
14493 22:25:51.648396 arm64_btitest_bti_c_func_call_using_br_x16 pass
14494 22:25:51.648487 arm64_btitest_bti_c_func_call_using_blr pass
14495 22:25:51.649359 arm64_btitest_bti_j_func_call_using_br_x0 pass
14496 22:25:51.649841 arm64_btitest_bti_j_func_call_using_br_x16 pass
14497 22:25:51.649984 arm64_btitest_bti_j_func_call_using_blr pass
14498 22:25:51.650084 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14499 22:25:51.650177 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14500 22:25:51.650267 arm64_btitest_bti_jc_func_call_using_blr pass
14501 22:25:51.650361 arm64_btitest_paciasp_func_call_using_br_x0 pass
14502 22:25:51.650445 arm64_btitest_paciasp_func_call_using_br_x16 pass
14503 22:25:51.650532 arm64_btitest_paciasp_func_call_using_blr pass
14504 22:25:51.650622 arm64_btitest pass
14505 22:25:51.650710 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14506 22:25:51.650800 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14507 22:25:51.651092 arm64_nobtitest_nohint_func_call_using_blr pass
14508 22:25:51.651202 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14509 22:25:51.651297 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14510 22:25:51.651387 arm64_nobtitest_bti_none_func_call_using_blr pass
14511 22:25:51.651479 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14512 22:25:51.651569 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14513 22:25:51.651660 arm64_nobtitest_bti_c_func_call_using_blr pass
14514 22:25:51.651748 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14515 22:25:51.651838 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14516 22:25:51.655383 arm64_nobtitest_bti_j_func_call_using_blr pass
14517 22:25:51.655499 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14518 22:25:51.655598 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14519 22:25:51.655693 arm64_nobtitest_bti_jc_func_call_using_blr pass
14520 22:25:51.655788 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14521 22:25:51.655882 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14522 22:25:51.655976 arm64_nobtitest_paciasp_func_call_using_blr pass
14523 22:25:51.656071 arm64_nobtitest pass
14524 22:25:51.656164 arm64_hwcap_cpuinfo_match_RNG pass
14525 22:25:51.656258 arm64_hwcap_sigill_RNG pass
14526 22:25:51.656352 arm64_hwcap_cpuinfo_match_SME pass
14527 22:25:51.656443 arm64_hwcap_sigill_SME pass
14528 22:25:51.656755 arm64_hwcap_cpuinfo_match_SVE pass
14529 22:25:51.656871 arm64_hwcap_sigill_SVE pass
14530 22:25:51.656967 arm64_hwcap_cpuinfo_match_SVE_2 pass
14531 22:25:51.657061 arm64_hwcap_sigill_SVE_2 pass
14532 22:25:51.657155 arm64_hwcap_cpuinfo_match_SVE_AES pass
14533 22:25:51.657247 arm64_hwcap_sigill_SVE_AES pass
14534 22:25:51.657340 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14535 22:25:51.657433 arm64_hwcap_sigill_SVE2_PMULL pass
14536 22:25:51.657526 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14537 22:25:51.657620 arm64_hwcap_sigill_SVE2_BITPERM pass
14538 22:25:51.657759 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14539 22:25:51.657860 arm64_hwcap_sigill_SVE2_SHA3 pass
14540 22:25:51.657953 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14541 22:25:51.658047 arm64_hwcap_sigill_SVE2_SM4 pass
14542 22:25:51.658140 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14543 22:25:51.658233 arm64_hwcap_sigill_SVE2_I8MM pass
14544 22:25:51.658349 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14545 22:25:51.658447 arm64_hwcap_sigill_SVE2_F32MM pass
14546 22:25:51.658540 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14547 22:25:51.658634 arm64_hwcap_sigill_SVE2_F64MM pass
14548 22:25:51.658727 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14549 22:25:51.658820 arm64_hwcap_sigill_SVE2_BF16 pass
14550 22:25:51.658913 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14551 22:25:51.659006 arm64_hwcap_sigill_SVE2_EBF16 skip
14552 22:25:51.659099 arm64_hwcap pass
14553 22:25:51.659191 arm64_ptrace_read_tpidr_one pass
14554 22:25:51.659284 arm64_ptrace_write_tpidr_one pass
14555 22:25:51.659378 arm64_ptrace_verify_tpidr_one pass
14556 22:25:51.659470 arm64_ptrace_count_tpidrs pass
14557 22:25:51.659563 arm64_ptrace_tpidr2_write pass
14558 22:25:51.659655 arm64_ptrace_tpidr2_read pass
14559 22:25:51.662299 arm64_ptrace_write_tpidr_only pass
14560 22:25:51.662468 arm64_ptrace pass
14561 22:25:51.662868 arm64_syscall-abi_getpid_FPSIMD pass
14562 22:25:51.662980 arm64_syscall-abi_getpid_SVE_VL_256 pass
14563 22:25:51.663077 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14564 22:25:51.663171 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14565 22:25:51.663281 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14566 22:25:51.663378 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14567 22:25:51.663473 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14568 22:25:51.663584 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14569 22:25:51.663695 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14570 22:25:51.663806 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14571 22:25:51.663902 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14572 22:25:51.664012 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14573 22:25:51.664107 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14574 22:25:51.664574 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14575 22:25:51.664689 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14576 22:25:51.664787 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14577 22:25:51.664881 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14578 22:25:51.664976 arm64_syscall-abi_getpid_SVE_VL_240 pass
14579 22:25:51.665088 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14580 22:25:51.665184 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14581 22:25:51.665279 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14582 22:25:51.665373 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14583 22:25:51.665483 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14584 22:25:51.665578 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14585 22:25:51.665704 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14586 22:25:51.665832 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14587 22:25:51.665930 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14588 22:25:51.666041 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14589 22:25:51.666134 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14590 22:25:51.670529 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14591 22:25:51.671167 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14592 22:25:51.671282 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14593 22:25:51.671379 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14594 22:25:51.671472 arm64_syscall-abi_getpid_SVE_VL_224 pass
14595 22:25:51.671564 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14596 22:25:51.671657 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14597 22:25:51.671767 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14598 22:25:51.671864 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14599 22:25:51.671956 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14600 22:25:51.672049 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14601 22:25:51.672163 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14602 22:25:51.672257 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14603 22:25:51.672367 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14604 22:25:51.672461 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14605 22:25:51.672554 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14606 22:25:51.672662 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14607 22:25:51.672773 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14608 22:25:51.672886 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14609 22:25:51.672995 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14610 22:25:51.673103 arm64_syscall-abi_getpid_SVE_VL_208 pass
14611 22:25:51.673212 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14612 22:25:51.673543 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14613 22:25:51.673666 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14614 22:25:51.673762 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14615 22:25:51.673871 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14616 22:25:51.673981 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14617 22:25:51.674076 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14618 22:25:51.679129 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14619 22:25:51.679342 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14620 22:25:51.679427 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14621 22:25:51.679504 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14622 22:25:51.679814 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14623 22:25:51.679920 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14624 22:25:51.680026 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14625 22:25:51.680139 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14626 22:25:51.680235 arm64_syscall-abi_getpid_SVE_VL_192 pass
14627 22:25:51.680331 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14628 22:25:51.680448 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14629 22:25:51.680543 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14630 22:25:51.680641 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14631 22:25:51.680738 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14632 22:25:51.680858 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14633 22:25:51.680947 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14634 22:25:51.681056 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14635 22:25:51.681153 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14636 22:25:51.681228 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14637 22:25:51.681320 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14638 22:25:51.681607 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14639 22:25:51.681715 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14640 22:25:51.681815 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14641 22:25:51.681935 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14642 22:25:51.682007 arm64_syscall-abi_getpid_SVE_VL_176 pass
14643 22:25:51.686580 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14644 22:25:51.686685 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14645 22:25:51.686818 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14646 22:25:51.686960 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14647 22:25:51.687106 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14648 22:25:51.687232 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14649 22:25:51.687364 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14650 22:25:51.687664 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14651 22:25:51.687965 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14652 22:25:51.688588 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14653 22:25:51.710016 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14654 22:25:51.710390 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14655 22:25:51.710506 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14656 22:25:51.710609 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14657 22:25:51.710709 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14658 22:25:51.710806 arm64_syscall-abi_getpid_SVE_VL_160 pass
14659 22:25:51.711112 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14660 22:25:51.711407 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14661 22:25:51.711515 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14662 22:25:51.711639 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14663 22:25:51.711738 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14664 22:25:51.711846 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14665 22:25:51.711931 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14666 22:25:51.712193 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14667 22:25:51.712299 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14668 22:25:51.712424 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14669 22:25:51.712548 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14670 22:25:51.712674 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14671 22:25:51.712796 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14672 22:25:51.713100 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14673 22:25:51.713397 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14674 22:25:51.713504 arm64_syscall-abi_getpid_SVE_VL_144 pass
14675 22:25:51.713596 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14676 22:25:51.713887 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14677 22:25:51.713995 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14678 22:25:51.714086 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14679 22:25:51.714202 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14680 22:25:51.714299 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14681 22:25:51.714402 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14682 22:25:51.714506 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14683 22:25:51.714807 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14684 22:25:51.714915 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14685 22:25:51.718226 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14686 22:25:51.718618 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14687 22:25:51.718744 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14688 22:25:51.718856 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14689 22:25:51.718949 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14690 22:25:51.719052 arm64_syscall-abi_getpid_SVE_VL_128 pass
14691 22:25:51.719158 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14692 22:25:51.719264 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14693 22:25:51.719591 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14694 22:25:51.719704 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14695 22:25:51.719798 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14696 22:25:51.720143 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14697 22:25:51.720367 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14698 22:25:51.720473 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14699 22:25:51.720560 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14700 22:25:51.720632 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14701 22:25:51.720719 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14702 22:25:51.721231 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14703 22:25:51.721366 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14704 22:25:51.721465 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14705 22:25:51.721542 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14706 22:25:51.721628 arm64_syscall-abi_getpid_SVE_VL_112 pass
14707 22:25:51.721713 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14708 22:25:51.721799 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14709 22:25:51.722083 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14710 22:25:51.726262 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14711 22:25:51.726638 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14712 22:25:51.726744 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14713 22:25:51.727149 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14714 22:25:51.727267 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14715 22:25:51.727360 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14716 22:25:51.727448 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14717 22:25:51.727552 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14718 22:25:51.727729 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14719 22:25:51.727822 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14720 22:25:51.727912 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14721 22:25:51.727987 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14722 22:25:51.728058 arm64_syscall-abi_getpid_SVE_VL_96 pass
14723 22:25:51.728140 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14724 22:25:51.728223 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14725 22:25:51.728576 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14726 22:25:51.728669 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14727 22:25:51.728755 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14728 22:25:51.728843 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14729 22:25:51.728917 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14730 22:25:51.729002 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14731 22:25:51.729087 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14732 22:25:51.729172 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14733 22:25:51.729260 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14734 22:25:51.729558 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14735 22:25:51.729673 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14736 22:25:51.729779 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14737 22:25:51.729867 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14738 22:25:51.729966 arm64_syscall-abi_getpid_SVE_VL_80 pass
14739 22:25:51.738181 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14740 22:25:51.738553 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14741 22:25:51.738661 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14742 22:25:51.738953 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14743 22:25:51.739061 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14744 22:25:51.739151 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14745 22:25:51.739254 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14746 22:25:51.739344 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14747 22:25:51.739447 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14748 22:25:51.739534 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14749 22:25:51.739634 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14750 22:25:51.739935 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14751 22:25:51.740042 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14752 22:25:51.740146 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14753 22:25:51.740249 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14754 22:25:51.740580 arm64_syscall-abi_getpid_SVE_VL_64 pass
14755 22:25:51.740687 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14756 22:25:51.740792 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14757 22:25:51.741117 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14758 22:25:51.741239 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14759 22:25:51.741558 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14760 22:25:51.741675 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14761 22:25:51.741974 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14762 22:25:51.742080 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14763 22:25:51.742171 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14764 22:25:51.742260 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14765 22:25:51.742349 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14766 22:25:51.747505 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14767 22:25:51.747773 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14768 22:25:51.747881 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14769 22:25:51.747972 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14770 22:25:51.748059 arm64_syscall-abi_getpid_SVE_VL_48 pass
14771 22:25:51.748146 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14772 22:25:51.748232 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14773 22:25:51.748326 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14774 22:25:51.748434 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14775 22:25:51.748525 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14776 22:25:51.748612 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14777 22:25:51.748699 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14778 22:25:51.748785 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14779 22:25:51.748872 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14780 22:25:51.748958 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14781 22:25:51.749044 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14782 22:25:51.749130 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14783 22:25:51.749235 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14784 22:25:51.749323 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14785 22:25:51.749411 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14786 22:25:51.749497 arm64_syscall-abi_getpid_SVE_VL_32 pass
14787 22:25:51.749584 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14788 22:25:51.749696 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14789 22:25:51.749786 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14790 22:25:51.749874 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14791 22:25:51.749960 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14792 22:25:51.750062 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14793 22:25:51.754288 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14794 22:25:51.754737 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14795 22:25:51.754846 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14796 22:25:51.754935 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14797 22:25:51.755039 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14798 22:25:51.755127 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14799 22:25:51.755230 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14800 22:25:51.755333 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14801 22:25:51.755435 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14802 22:25:51.755822 arm64_syscall-abi_getpid_SVE_VL_16 pass
14803 22:25:51.755930 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14804 22:25:51.756036 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14805 22:25:51.773965 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14806 22:25:51.774341 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14807 22:25:51.774475 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14808 22:25:51.774821 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14809 22:25:51.775008 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14810 22:25:51.775106 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14811 22:25:51.775213 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14812 22:25:51.775322 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14813 22:25:51.775443 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14814 22:25:51.775558 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14815 22:25:51.775683 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14816 22:25:51.775788 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14817 22:25:51.775909 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14818 22:25:51.776006 arm64_syscall-abi_sched_yield_FPSIMD pass
14819 22:25:51.776292 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14820 22:25:51.776401 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14821 22:25:51.776728 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14822 22:25:51.776827 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14823 22:25:51.776909 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14824 22:25:51.777193 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14825 22:25:51.777300 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14826 22:25:51.777400 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14827 22:25:51.777492 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14828 22:25:51.777595 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14829 22:25:51.777695 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14830 22:25:51.777997 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14831 22:25:51.778103 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
14832 22:25:51.782194 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
14833 22:25:51.782578 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
14834 22:25:51.782691 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
14835 22:25:51.782797 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
14836 22:25:51.783128 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
14837 22:25:51.783272 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
14838 22:25:51.783607 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
14839 22:25:51.783712 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
14840 22:25:51.783821 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
14841 22:25:51.783922 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
14842 22:25:51.784111 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
14843 22:25:51.784236 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
14844 22:25:51.784360 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
14845 22:25:51.784679 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
14846 22:25:51.784990 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
14847 22:25:51.785095 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
14848 22:25:51.785210 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
14849 22:25:51.785529 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
14850 22:25:51.785678 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
14851 22:25:51.785779 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
14852 22:25:51.785898 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
14853 22:25:51.786020 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
14854 22:25:51.786104 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
14855 22:25:51.786182 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
14856 22:25:51.790509 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
14857 22:25:51.790815 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
14858 22:25:51.790917 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
14859 22:25:51.791038 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
14860 22:25:51.791128 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
14861 22:25:51.791212 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
14862 22:25:51.791691 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
14863 22:25:51.791800 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
14864 22:25:51.792147 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
14865 22:25:51.792247 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
14866 22:25:51.792341 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
14867 22:25:51.792457 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
14868 22:25:51.792800 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
14869 22:25:51.793186 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
14870 22:25:51.793290 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
14871 22:25:51.793402 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
14872 22:25:51.793535 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
14873 22:25:51.793657 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
14874 22:25:51.793942 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
14875 22:25:51.794025 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
14876 22:25:51.798461 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
14877 22:25:51.798601 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
14878 22:25:51.798902 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
14879 22:25:51.799021 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
14880 22:25:51.799127 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
14881 22:25:51.799415 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
14882 22:25:51.799545 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
14883 22:25:51.799901 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
14884 22:25:51.800010 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
14885 22:25:51.800112 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
14886 22:25:51.800234 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
14887 22:25:51.800357 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
14888 22:25:51.800461 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
14889 22:25:51.800583 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
14890 22:25:51.800713 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
14891 22:25:51.800834 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
14892 22:25:51.801223 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
14893 22:25:51.801339 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
14894 22:25:51.801464 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
14895 22:25:51.801558 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
14896 22:25:51.801664 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
14897 22:25:51.801754 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
14898 22:25:51.801895 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
14899 22:25:51.802008 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
14900 22:25:51.806509 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
14901 22:25:51.806633 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
14902 22:25:51.806745 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
14903 22:25:51.806871 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
14904 22:25:51.807184 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
14905 22:25:51.807283 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
14906 22:25:51.807385 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
14907 22:25:51.807475 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
14908 22:25:51.807569 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
14909 22:25:51.807673 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
14910 22:25:51.807983 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
14911 22:25:51.808099 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
14912 22:25:51.808217 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
14913 22:25:51.808332 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
14914 22:25:51.808677 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
14915 22:25:51.808768 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
14916 22:25:51.808840 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
14917 22:25:51.808928 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
14918 22:25:51.809253 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
14919 22:25:51.809345 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
14920 22:25:51.809466 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
14921 22:25:51.809547 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
14922 22:25:51.809655 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
14923 22:25:51.809750 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
14924 22:25:51.809866 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
14925 22:25:51.809982 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
14926 22:25:51.814576 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
14927 22:25:51.817769 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
14928 22:25:51.817949 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
14929 22:25:51.818030 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
14930 22:25:51.818113 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
14931 22:25:51.818198 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
14932 22:25:51.818278 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
14933 22:25:51.818363 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
14934 22:25:51.818448 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
14935 22:25:51.818530 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
14936 22:25:51.818614 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
14937 22:25:51.818698 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
14938 22:25:51.818781 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
14939 22:25:51.818863 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
14940 22:25:51.818947 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
14941 22:25:51.819026 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
14942 22:25:51.819102 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
14943 22:25:51.819178 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
14944 22:25:51.819254 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
14945 22:25:51.836836 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
14946 22:25:51.838062 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
14947 22:25:51.838665 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
14948 22:25:51.838900 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
14949 22:25:51.838983 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
14950 22:25:51.839059 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
14951 22:25:51.839159 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
14952 22:25:51.839240 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
14953 22:25:51.839318 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
14954 22:25:51.839401 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
14955 22:25:51.839492 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
14956 22:25:51.839574 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
14957 22:25:51.839675 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
14958 22:25:51.839765 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
14959 22:25:51.839851 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
14960 22:25:51.839957 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
14961 22:25:51.840058 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
14962 22:25:51.840160 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
14963 22:25:51.840477 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
14964 22:25:51.840662 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
14965 22:25:51.840847 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
14966 22:25:51.840932 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
14967 22:25:51.841013 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
14968 22:25:51.841093 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
14969 22:25:51.841190 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
14970 22:25:51.841279 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
14971 22:25:51.841380 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
14972 22:25:51.841465 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
14973 22:25:51.841545 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
14974 22:25:51.841626 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
14975 22:25:51.841730 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
14976 22:25:51.841845 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
14977 22:25:51.841952 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
14978 22:25:51.842056 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
14979 22:25:51.842141 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
14980 22:25:51.842210 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
14981 22:25:51.842286 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
14982 22:25:51.842351 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
14983 22:25:51.842411 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
14984 22:25:51.842474 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
14985 22:25:51.842534 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
14986 22:25:51.846546 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
14987 22:25:51.848899 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
14988 22:25:51.849126 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
14989 22:25:51.849220 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
14990 22:25:51.849295 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
14991 22:25:51.849367 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
14992 22:25:51.849438 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
14993 22:25:51.849509 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
14994 22:25:51.849580 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
14995 22:25:51.849666 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
14996 22:25:51.849975 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
14997 22:25:51.850083 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
14998 22:25:51.850171 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
14999 22:25:51.850253 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15000 22:25:51.850334 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15001 22:25:51.850410 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15002 22:25:51.850485 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15003 22:25:51.850559 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15004 22:25:51.850638 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15005 22:25:51.850721 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15006 22:25:51.850808 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15007 22:25:51.850878 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15008 22:25:51.850940 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15009 22:25:51.851000 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15010 22:25:51.851081 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15011 22:25:51.851167 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15012 22:25:51.851272 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15013 22:25:51.854265 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15014 22:25:51.854621 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15015 22:25:51.854733 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15016 22:25:51.854808 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15017 22:25:51.854891 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15018 22:25:51.855149 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15019 22:25:51.855235 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15020 22:25:51.855303 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15021 22:25:51.855390 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15022 22:25:51.855693 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15023 22:25:51.855778 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15024 22:25:51.855894 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15025 22:25:51.855988 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15026 22:25:51.856104 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15027 22:25:51.856217 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15028 22:25:51.856512 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15029 22:25:51.856593 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15030 22:25:51.856688 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15031 22:25:51.856777 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15032 22:25:51.856864 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15033 22:25:51.857130 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15034 22:25:51.857233 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15035 22:25:51.857333 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15036 22:25:51.857424 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15037 22:25:51.857678 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15038 22:25:51.857767 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15039 22:25:51.857855 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15040 22:25:51.857942 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15041 22:25:51.862435 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15042 22:25:51.862648 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15043 22:25:51.862743 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15044 22:25:51.862848 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15045 22:25:51.862953 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15046 22:25:51.863056 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15047 22:25:51.863347 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15048 22:25:51.863456 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15049 22:25:51.863546 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15050 22:25:51.863648 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15051 22:25:51.863934 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15052 22:25:51.864215 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15053 22:25:51.864325 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15054 22:25:51.864412 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15055 22:25:51.864514 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15056 22:25:51.864614 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15057 22:25:51.864912 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15058 22:25:51.865031 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15059 22:25:51.865120 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15060 22:25:51.865226 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15061 22:25:51.865529 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15062 22:25:51.865653 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15063 22:25:51.865955 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15064 22:25:51.866053 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15065 22:25:51.870298 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15066 22:25:51.870692 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15067 22:25:51.870793 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15068 22:25:51.870901 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15069 22:25:51.870991 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15070 22:25:51.871096 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15071 22:25:51.871190 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15072 22:25:51.871462 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15073 22:25:51.871573 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15074 22:25:51.871875 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15075 22:25:51.871990 arm64_syscall-abi pass
15076 22:25:51.872096 arm64_tpidr2_default_value pass
15077 22:25:51.872225 arm64_tpidr2_write_read pass
15078 22:25:51.872317 arm64_tpidr2_write_sleep_read pass
15079 22:25:51.872407 arm64_tpidr2_write_fork_read pass
15080 22:25:51.872511 arm64_tpidr2_write_clone_read pass
15081 22:25:51.872610 arm64_tpidr2 pass
15082 22:25:51.895719 + ../../utils/send-to-lava.sh ./output/result.txt
15083 22:25:51.954031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15084 22:25:51.954990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15086 22:25:51.996128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15087 22:25:51.996785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15089 22:25:52.034665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15090 22:25:52.035155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15092 22:25:52.075617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15093 22:25:52.076179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15095 22:25:52.115869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15096 22:25:52.116281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15098 22:25:52.159634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15100 22:25:52.160364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15101 22:25:52.207426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15102 22:25:52.208000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15104 22:25:52.263026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15105 22:25:52.263548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15107 22:25:52.313396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15109 22:25:52.313915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15110 22:25:52.363141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15111 22:25:52.363527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15113 22:25:52.411635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15114 22:25:52.412143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15116 22:25:52.462884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15117 22:25:52.463331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15119 22:25:52.505174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15120 22:25:52.505576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15122 22:25:52.546347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15124 22:25:52.546813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15125 22:25:52.587687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15127 22:25:52.588159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15128 22:25:52.633814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15130 22:25:52.634544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15131 22:25:52.678028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15132 22:25:52.678580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15134 22:25:52.717956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15135 22:25:52.718478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15137 22:25:52.763635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15139 22:25:52.764089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15140 22:25:52.802697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15141 22:25:52.803132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15143 22:25:52.849844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15144 22:25:52.850301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15146 22:25:52.897697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15147 22:25:52.898139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15149 22:25:52.947139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15150 22:25:52.947583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15152 22:25:52.990056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15154 22:25:52.990534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15155 22:25:53.029585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15156 22:25:53.030040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15158 22:25:53.072460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15159 22:25:53.072912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15161 22:25:53.109353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15162 22:25:53.109804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15164 22:25:53.155396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15165 22:25:53.155827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15167 22:25:53.204041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15169 22:25:53.204499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15170 22:25:53.259679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15171 22:25:53.260122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15173 22:25:53.312874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15175 22:25:53.313286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15176 22:25:53.359807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15177 22:25:53.360245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15179 22:25:53.402323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15181 22:25:53.402978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15182 22:25:53.445253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15184 22:25:53.445740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15185 22:25:53.487249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15187 22:25:53.487730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15188 22:25:53.543256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15189 22:25:53.543669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15191 22:25:53.597534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15193 22:25:53.598032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15194 22:25:53.645198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15195 22:25:53.645641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15197 22:25:53.691229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15198 22:25:53.691676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15200 22:25:53.736931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15201 22:25:53.737362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15203 22:25:53.789176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15205 22:25:53.789588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15206 22:25:53.842146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15207 22:25:53.842581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15209 22:25:53.887378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15211 22:25:53.887837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15212 22:25:53.929509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15213 22:25:53.929938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15215 22:25:53.974473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15217 22:25:53.975049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15218 22:25:54.017174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15219 22:25:54.017603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15221 22:25:54.065131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15222 22:25:54.065573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15224 22:25:54.118517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15226 22:25:54.118985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15227 22:25:54.168830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15228 22:25:54.169276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15230 22:25:54.215000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15232 22:25:54.215424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15233 22:25:54.267495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15235 22:25:54.267976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15236 22:25:54.306836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15237 22:25:54.307219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15239 22:25:54.348946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15241 22:25:54.349410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15242 22:25:54.385734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15243 22:25:54.386169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15245 22:25:54.430091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15246 22:25:54.430515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15248 22:25:54.473718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15249 22:25:54.474176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15251 22:25:54.519395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15252 22:25:54.519834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15254 22:25:54.563445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15256 22:25:54.563915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15257 22:25:54.611554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15259 22:25:54.612085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15260 22:25:54.651086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15261 22:25:54.651541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15263 22:25:54.693662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15264 22:25:54.694113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15266 22:25:54.738215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15267 22:25:54.738664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15269 22:25:54.780818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15270 22:25:54.781262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15272 22:25:54.819010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15273 22:25:54.819388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15275 22:25:54.861930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15276 22:25:54.862340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15278 22:25:54.904573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15279 22:25:54.904939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15281 22:25:54.945669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15282 22:25:54.946103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15284 22:25:54.992426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15285 22:25:54.992907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15287 22:25:55.042062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15289 22:25:55.042525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15290 22:25:55.091911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15291 22:25:55.092284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15293 22:25:55.139150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15294 22:25:55.139553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15296 22:25:55.184174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15298 22:25:55.184640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15299 22:25:55.225411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15300 22:25:55.225966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15302 22:25:55.269564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15304 22:25:55.270046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15305 22:25:55.312689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15306 22:25:55.313096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15308 22:25:55.365322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15309 22:25:55.365677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15311 22:25:55.420520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15312 22:25:55.420952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15314 22:25:55.464138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15315 22:25:55.464571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15317 22:25:55.524722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15318 22:25:55.525133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15320 22:25:55.570559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15322 22:25:55.571015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15323 22:25:55.617721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15325 22:25:55.618193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15326 22:25:55.658426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15328 22:25:55.658895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15329 22:25:55.704123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15330 22:25:55.704549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15332 22:25:55.746911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15333 22:25:55.747367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15335 22:25:55.797267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15336 22:25:55.797767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15338 22:25:55.852799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15339 22:25:55.853342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15341 22:25:55.908540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15343 22:25:55.909018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15344 22:25:55.949237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15345 22:25:55.949675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15347 22:25:55.991449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15349 22:25:55.991850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15350 22:25:56.031850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15351 22:25:56.032279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15353 22:25:56.076111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15354 22:25:56.076517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15356 22:25:56.119763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15357 22:25:56.120181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15359 22:25:56.160638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15360 22:25:56.161006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15362 22:25:56.211518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15363 22:25:56.211971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15365 22:25:56.251377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15367 22:25:56.251840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15368 22:25:56.288853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15369 22:25:56.289241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15371 22:25:56.331966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15372 22:25:56.332395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15374 22:25:56.379416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15375 22:25:56.379839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15377 22:25:56.428082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15378 22:25:56.428534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15380 22:25:56.467697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15381 22:25:56.468059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15383 22:25:56.516170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15384 22:25:56.516659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15386 22:25:56.569198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15388 22:25:56.569691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15389 22:25:56.613354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15390 22:25:56.613781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15392 22:25:56.662458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15394 22:25:56.662904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15395 22:25:56.709141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15396 22:25:56.709564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15398 22:25:56.754277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15400 22:25:56.754765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15401 22:25:56.801534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15402 22:25:56.801924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15404 22:25:56.840120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15405 22:25:56.840542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15407 22:25:56.884094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15409 22:25:56.884570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15410 22:25:56.927384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15412 22:25:56.927849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15413 22:25:56.967156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15414 22:25:56.967578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15416 22:25:57.007623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15417 22:25:57.008065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15419 22:25:57.046938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15420 22:25:57.047393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15422 22:25:57.087287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15424 22:25:57.087751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15425 22:25:57.124043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15426 22:25:57.124559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15428 22:25:57.159303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15429 22:25:57.159756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15431 22:25:57.200006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15433 22:25:57.200475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15434 22:25:57.246146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15435 22:25:57.246693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15437 22:25:57.298417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15439 22:25:57.298850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15440 22:25:57.344316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15441 22:25:57.344749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15443 22:25:57.383595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15445 22:25:57.384070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15446 22:25:57.421823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15448 22:25:57.422307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15449 22:25:57.463735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15450 22:25:57.464156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15452 22:25:57.508935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15454 22:25:57.509700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15455 22:25:57.552500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15456 22:25:57.552921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15458 22:25:57.597719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15460 22:25:57.598189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15461 22:25:57.637731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15462 22:25:57.638156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15464 22:25:57.679677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15466 22:25:57.680186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15467 22:25:57.721349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15468 22:25:57.721768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15470 22:25:57.761579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15471 22:25:57.762000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15473 22:25:57.805442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15474 22:25:57.805961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15476 22:25:57.853018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15477 22:25:57.853403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15479 22:25:57.897200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15480 22:25:57.897596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15482 22:25:57.933951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15483 22:25:57.934428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15485 22:25:57.989475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15486 22:25:57.989893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15488 22:25:58.043975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15490 22:25:58.044396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15491 22:25:58.094468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15493 22:25:58.094929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15494 22:25:58.130368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15496 22:25:58.130843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15497 22:25:58.171510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15498 22:25:58.171931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15500 22:25:58.209585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15502 22:25:58.210038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15503 22:25:58.259039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15504 22:25:58.259462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15506 22:25:58.314920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15507 22:25:58.315298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15509 22:25:58.353200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15511 22:25:58.353579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15512 22:25:58.392468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15514 22:25:58.393062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15515 22:25:58.437239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15516 22:25:58.437663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15518 22:25:58.477500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15519 22:25:58.477890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15521 22:25:58.517331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15522 22:25:58.517839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15524 22:25:58.556394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15525 22:25:58.556992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15527 22:25:58.595918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15528 22:25:58.596401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15530 22:25:58.637446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15531 22:25:58.637876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15533 22:25:58.675993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15534 22:25:58.676413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15536 22:25:58.724064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15537 22:25:58.724489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15539 22:25:58.769160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15540 22:25:58.769586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15542 22:25:58.819067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15544 22:25:58.819518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15545 22:25:58.868540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15546 22:25:58.868961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15548 22:25:58.916589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15550 22:25:58.917052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15551 22:25:58.953355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15553 22:25:58.953806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15554 22:25:58.991209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15555 22:25:58.991612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15557 22:25:59.030414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15559 22:25:59.030857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15560 22:25:59.068046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15561 22:25:59.068469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15563 22:25:59.109992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15564 22:25:59.110423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15566 22:25:59.157387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15567 22:25:59.157806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15569 22:25:59.196204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15570 22:25:59.196636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15572 22:25:59.237230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15574 22:25:59.237605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15575 22:25:59.280966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15576 22:25:59.281445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15578 22:25:59.319152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15579 22:25:59.319525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15581 22:25:59.357173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15582 22:25:59.357720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15584 22:25:59.396787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15585 22:25:59.397191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15587 22:25:59.437504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15588 22:25:59.437931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15590 22:25:59.479323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15591 22:25:59.479712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15593 22:25:59.519901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15595 22:25:59.520602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15596 22:25:59.564635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15598 22:25:59.565105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15599 22:25:59.600471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15600 22:25:59.600958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15602 22:25:59.637485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15603 22:25:59.638021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15605 22:25:59.675497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15606 22:25:59.675902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15608 22:25:59.713357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15609 22:25:59.713849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15611 22:25:59.752585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15612 22:25:59.753071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15614 22:25:59.789602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15615 22:25:59.790169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15617 22:25:59.840264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15618 22:25:59.840745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15620 22:25:59.885312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15621 22:25:59.885805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15623 22:25:59.920364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15624 22:25:59.920763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15626 22:25:59.960874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15628 22:25:59.961327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15629 22:26:00.010392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15631 22:26:00.010888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15632 22:26:00.056340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15633 22:26:00.056747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15635 22:26:00.104286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15636 22:26:00.104680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15638 22:26:00.147471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15639 22:26:00.147903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15641 22:26:00.197150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15643 22:26:00.197598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15644 22:26:00.246867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15645 22:26:00.247250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15647 22:26:00.285876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15649 22:26:00.286272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15650 22:26:00.321521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15651 22:26:00.321950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15653 22:26:00.363838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15655 22:26:00.364265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15656 22:26:00.402188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15658 22:26:00.402671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15659 22:26:00.439060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15661 22:26:00.439516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15662 22:26:00.476715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15664 22:26:00.477172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15665 22:26:00.513128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15666 22:26:00.513554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15668 22:26:00.549123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15669 22:26:00.549544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15671 22:26:00.594204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15672 22:26:00.594771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15674 22:26:00.631314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15675 22:26:00.631713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15677 22:26:00.671977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15678 22:26:00.672403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15680 22:26:00.713167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15681 22:26:00.713592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15683 22:26:00.757903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15684 22:26:00.758350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15686 22:26:00.798332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15687 22:26:00.798761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15689 22:26:00.848851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15690 22:26:00.849269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15692 22:26:00.888874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15694 22:26:00.889267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15695 22:26:00.927421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15697 22:26:00.927870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15698 22:26:00.965334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15699 22:26:00.965766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15701 22:26:01.014607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15703 22:26:01.015083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15704 22:26:01.051360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15705 22:26:01.051861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15707 22:26:01.101221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15709 22:26:01.101713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15710 22:26:01.143394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15712 22:26:01.143845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15713 22:26:01.184417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15715 22:26:01.184888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15716 22:26:01.224965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15718 22:26:01.225362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15719 22:26:01.269161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15720 22:26:01.269600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15722 22:26:01.319265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15724 22:26:01.319718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15725 22:26:01.364528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15726 22:26:01.364902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15728 22:26:01.403942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15729 22:26:01.404370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15731 22:26:01.443739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15733 22:26:01.444201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15734 22:26:01.481860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15735 22:26:01.482381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15737 22:26:01.523694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15738 22:26:01.524192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15740 22:26:01.561269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15742 22:26:01.562007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15743 22:26:01.600120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15745 22:26:01.600863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15746 22:26:01.639381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15747 22:26:01.639872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15749 22:26:01.676466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15750 22:26:01.676949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15752 22:26:01.715323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15753 22:26:01.715755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15755 22:26:01.756559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15756 22:26:01.756979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15758 22:26:01.799235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15760 22:26:01.799698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15761 22:26:01.843748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15762 22:26:01.844170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15764 22:26:01.882190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15766 22:26:01.882757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15767 22:26:01.925420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15768 22:26:01.925962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15770 22:26:01.967480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15771 22:26:01.967902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15773 22:26:02.003540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15774 22:26:02.003964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15776 22:26:02.039136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15778 22:26:02.039595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15779 22:26:02.077909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15781 22:26:02.078396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15782 22:26:02.116287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15783 22:26:02.116728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15785 22:26:02.157884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15786 22:26:02.158329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15788 22:26:02.202470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15790 22:26:02.203116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15791 22:26:02.248640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15792 22:26:02.249206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15794 22:26:02.287041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15795 22:26:02.287578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15797 22:26:02.329091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15799 22:26:02.329564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15800 22:26:02.371905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15801 22:26:02.372336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15803 22:26:02.413961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15804 22:26:02.414383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15806 22:26:02.453314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15808 22:26:02.453798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15809 22:26:02.494056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15810 22:26:02.494496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15812 22:26:02.535641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15814 22:26:02.536119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15815 22:26:02.576484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15816 22:26:02.576903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15818 22:26:02.618189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15819 22:26:02.618626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15821 22:26:02.653841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15822 22:26:02.654300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15824 22:26:02.699682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15826 22:26:02.700172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15827 22:26:02.745853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15828 22:26:02.746246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15830 22:26:02.782365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
15832 22:26:02.782771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
15833 22:26:02.821520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
15834 22:26:02.821964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
15836 22:26:02.861129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
15837 22:26:02.861506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
15839 22:26:02.901550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
15840 22:26:02.901991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
15842 22:26:02.943823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
15843 22:26:02.944215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
15845 22:26:02.983123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
15846 22:26:02.983571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
15848 22:26:03.024097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
15849 22:26:03.024598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
15851 22:26:03.065065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
15852 22:26:03.065529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
15854 22:26:03.106424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
15856 22:26:03.107299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
15857 22:26:03.148336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
15859 22:26:03.148809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
15860 22:26:03.187659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
15861 22:26:03.188110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
15863 22:26:03.227881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
15865 22:26:03.228317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
15866 22:26:03.267737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
15867 22:26:03.268147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
15869 22:26:03.311086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
15871 22:26:03.311545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
15872 22:26:03.351983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
15874 22:26:03.352426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
15875 22:26:03.400614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
15876 22:26:03.401033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
15878 22:26:03.453583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
15879 22:26:03.454043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
15881 22:26:03.501133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
15883 22:26:03.501595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
15884 22:26:03.553365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
15885 22:26:03.553798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
15887 22:26:03.605299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
15888 22:26:03.605731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
15890 22:26:03.652836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
15891 22:26:03.653272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
15893 22:26:03.691701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
15894 22:26:03.692109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
15896 22:26:03.733328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
15898 22:26:03.733821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
15899 22:26:03.785292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
15900 22:26:03.785693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
15902 22:26:03.825550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
15903 22:26:03.825990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
15905 22:26:03.869210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
15906 22:26:03.869640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
15908 22:26:03.908834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
15909 22:26:03.909498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
15911 22:26:03.954432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
15913 22:26:03.955109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
15914 22:26:03.997503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
15915 22:26:03.997916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
15917 22:26:04.045810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
15918 22:26:04.046243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
15920 22:26:04.096117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
15921 22:26:04.096572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
15923 22:26:04.145966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
15925 22:26:04.146445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
15926 22:26:04.196769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
15927 22:26:04.197232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
15929 22:26:04.248832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
15930 22:26:04.249262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
15932 22:26:04.308917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
15934 22:26:04.309404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
15935 22:26:04.355764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
15936 22:26:04.356159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
15938 22:26:04.399573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
15939 22:26:04.399987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
15941 22:26:04.441318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
15942 22:26:04.441676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
15944 22:26:04.491127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
15946 22:26:04.491599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
15947 22:26:04.536301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
15948 22:26:04.536716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
15950 22:26:04.577327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
15952 22:26:04.577767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
15953 22:26:04.616381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
15954 22:26:04.616750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
15956 22:26:04.658106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
15958 22:26:04.658588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
15959 22:26:04.696934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
15960 22:26:04.697354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
15962 22:26:04.739206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
15963 22:26:04.739615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
15965 22:26:04.779683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
15967 22:26:04.780118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
15968 22:26:04.819035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
15970 22:26:04.819503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
15971 22:26:04.857736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
15972 22:26:04.858189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
15974 22:26:04.896719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
15975 22:26:04.897155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
15977 22:26:04.937993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
15978 22:26:04.938424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
15980 22:26:04.995072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
15981 22:26:04.995482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
15983 22:26:05.040339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
15984 22:26:05.040771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
15986 22:26:05.096477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
15987 22:26:05.096877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
15989 22:26:05.140100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
15990 22:26:05.140525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
15992 22:26:05.178789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
15993 22:26:05.179166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
15995 22:26:05.228839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
15996 22:26:05.229261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
15998 22:26:05.278814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
15999 22:26:05.279253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16001 22:26:05.330217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16002 22:26:05.330608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16004 22:26:05.383705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16005 22:26:05.384130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16007 22:26:05.423930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16009 22:26:05.424323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16010 22:26:05.465775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16011 22:26:05.466208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16013 22:26:05.506983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16015 22:26:05.507439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16016 22:26:05.542426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16018 22:26:05.542874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16019 22:26:05.579001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16020 22:26:05.579400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16022 22:26:05.619192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16023 22:26:05.619644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16025 22:26:05.659972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16026 22:26:05.660426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16028 22:26:05.700842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16029 22:26:05.701330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16031 22:26:05.755609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16033 22:26:05.756059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16034 22:26:05.798427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16036 22:26:05.798859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16037 22:26:05.839783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16039 22:26:05.840172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16040 22:26:05.882140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16041 22:26:05.882616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16043 22:26:05.932876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16044 22:26:05.933278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16046 22:26:05.975095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16047 22:26:05.975657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16049 22:26:06.013530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16051 22:26:06.014017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16052 22:26:06.060703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16053 22:26:06.061129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16055 22:26:06.112735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16056 22:26:06.113177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16058 22:26:06.165590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16059 22:26:06.166021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16061 22:26:06.217135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16062 22:26:06.217524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16064 22:26:06.268904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16065 22:26:06.269473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16067 22:26:06.320594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16068 22:26:06.321039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16070 22:26:06.373582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16072 22:26:06.374073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16073 22:26:06.429558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16074 22:26:06.429993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16076 22:26:06.487633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16077 22:26:06.488060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16079 22:26:06.540977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16080 22:26:06.541395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16082 22:26:06.593427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16083 22:26:06.593845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16085 22:26:06.646963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16086 22:26:06.647420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16088 22:26:06.699820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16089 22:26:06.700253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16091 22:26:06.755520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16092 22:26:06.755971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16094 22:26:06.812559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16095 22:26:06.812987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16097 22:26:06.869098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16098 22:26:06.869500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16100 22:26:06.915616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16102 22:26:06.916070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16103 22:26:06.949857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16104 22:26:06.950283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16106 22:26:06.988642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16107 22:26:06.989059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16109 22:26:07.023747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16110 22:26:07.024160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16112 22:26:07.058118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16114 22:26:07.058590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16115 22:26:07.093840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16116 22:26:07.094260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16118 22:26:07.128265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16119 22:26:07.128688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16121 22:26:07.167682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16123 22:26:07.168167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16124 22:26:07.214420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16126 22:26:07.214887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16127 22:26:07.252807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16128 22:26:07.253216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16130 22:26:07.288320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16131 22:26:07.288746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16133 22:26:07.337297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16134 22:26:07.337694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16136 22:26:07.384938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16138 22:26:07.385392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16139 22:26:07.420375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16140 22:26:07.420789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16142 22:26:07.455885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16143 22:26:07.456333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16145 22:26:07.490291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16147 22:26:07.490724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16148 22:26:07.524184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16150 22:26:07.524627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16151 22:26:07.559457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16153 22:26:07.559902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16154 22:26:07.597486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16155 22:26:07.597935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16157 22:26:07.637804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16158 22:26:07.638236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16160 22:26:07.678181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16162 22:26:07.678627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16163 22:26:07.719491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16164 22:26:07.719972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16166 22:26:07.759110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16167 22:26:07.759535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16169 22:26:07.798999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16171 22:26:07.799463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16172 22:26:07.839662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16173 22:26:07.840113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16175 22:26:07.884067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16177 22:26:07.885387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16178 22:26:07.924325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16179 22:26:07.924684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16181 22:26:07.959488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16183 22:26:07.959935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16184 22:26:07.994246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16186 22:26:07.994651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16187 22:26:08.029846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16188 22:26:08.030280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16190 22:26:08.077564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16191 22:26:08.078016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16193 22:26:08.126441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16195 22:26:08.127052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16196 22:26:08.177405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16197 22:26:08.177836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16199 22:26:08.226363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16201 22:26:08.226999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16202 22:26:08.275821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16203 22:26:08.276249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16205 22:26:08.309633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16206 22:26:08.310059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16208 22:26:08.348075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16209 22:26:08.348507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16211 22:26:08.393518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16212 22:26:08.393956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16214 22:26:08.433110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16216 22:26:08.433572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16217 22:26:08.468732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16219 22:26:08.469189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16220 22:26:08.504945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16222 22:26:08.505396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16223 22:26:08.540929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16224 22:26:08.541343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16226 22:26:08.575821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16227 22:26:08.576231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16229 22:26:08.619775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16230 22:26:08.620152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16232 22:26:08.668088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16233 22:26:08.668521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16235 22:26:08.713936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16236 22:26:08.714380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16238 22:26:08.765531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16239 22:26:08.765978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16241 22:26:08.814420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16243 22:26:08.814834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16244 22:26:08.850462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16246 22:26:08.850877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16247 22:26:08.888595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16248 22:26:08.889014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16250 22:26:08.931529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16251 22:26:08.931919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16253 22:26:08.972909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16254 22:26:08.973329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16256 22:26:09.013629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16257 22:26:09.014150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16259 22:26:09.052247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16260 22:26:09.052650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16262 22:26:09.096370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16263 22:26:09.096781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16265 22:26:09.135681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16267 22:26:09.136157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16268 22:26:09.175988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16270 22:26:09.176467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16271 22:26:09.231822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16272 22:26:09.232252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16274 22:26:09.289357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16276 22:26:09.289824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16277 22:26:09.348537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16278 22:26:09.348968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16280 22:26:09.400317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16282 22:26:09.400753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16283 22:26:09.439012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16284 22:26:09.439442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16286 22:26:09.477347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16287 22:26:09.477767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16289 22:26:09.518519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16291 22:26:09.518992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16292 22:26:09.556158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16293 22:26:09.556716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16295 22:26:09.597242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16296 22:26:09.597782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16298 22:26:09.635304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16299 22:26:09.635758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16301 22:26:09.673709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16302 22:26:09.674122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16304 22:26:09.711690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16306 22:26:09.712172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16307 22:26:09.747596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16308 22:26:09.748050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16310 22:26:09.785555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16311 22:26:09.785981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16313 22:26:09.841502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16314 22:26:09.841905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16316 22:26:09.897475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16317 22:26:09.897890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16319 22:26:09.955413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16320 22:26:09.955834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16322 22:26:10.011841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16324 22:26:10.012294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16325 22:26:10.066439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16327 22:26:10.067045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16328 22:26:10.105070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16329 22:26:10.105621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16331 22:26:10.146127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16332 22:26:10.146546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16334 22:26:10.197102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16335 22:26:10.197694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16337 22:26:10.243703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16339 22:26:10.244458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16340 22:26:10.284656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16341 22:26:10.285103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16343 22:26:10.331124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16345 22:26:10.331607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16346 22:26:10.379130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16348 22:26:10.379599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16349 22:26:10.421225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16350 22:26:10.421786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16352 22:26:10.463431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16353 22:26:10.464000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16355 22:26:10.509678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16356 22:26:10.510217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16358 22:26:10.561605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16359 22:26:10.561984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16361 22:26:10.611739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16362 22:26:10.612136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16364 22:26:10.661053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16365 22:26:10.661478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16367 22:26:10.709230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16369 22:26:10.709670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16370 22:26:10.753595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16371 22:26:10.754038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16373 22:26:10.803156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16374 22:26:10.803570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16376 22:26:10.853264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16377 22:26:10.853727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16379 22:26:10.899973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16380 22:26:10.900409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16382 22:26:10.949628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16383 22:26:10.950049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16385 22:26:11.000304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16386 22:26:11.000738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16388 22:26:11.044624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16389 22:26:11.045052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16391 22:26:11.087746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16392 22:26:11.088157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16394 22:26:11.133906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16395 22:26:11.134332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16397 22:26:11.171014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16398 22:26:11.171523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16400 22:26:11.218547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16402 22:26:11.218999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16403 22:26:11.260327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16404 22:26:11.260741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16406 22:26:11.302348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16408 22:26:11.302897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16409 22:26:11.348870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16410 22:26:11.349324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16412 22:26:11.393205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16414 22:26:11.393622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16415 22:26:11.441016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16416 22:26:11.441401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16418 22:26:11.483496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16419 22:26:11.483922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16421 22:26:11.518770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16422 22:26:11.519211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16424 22:26:11.561115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16425 22:26:11.561541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16427 22:26:11.609539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16429 22:26:11.610022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16430 22:26:11.655565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16431 22:26:11.656012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16433 22:26:11.698485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16435 22:26:11.698956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16436 22:26:11.740674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16437 22:26:11.741121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16439 22:26:11.787376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16440 22:26:11.787810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16442 22:26:11.830990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16443 22:26:11.831409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16445 22:26:11.871731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16446 22:26:11.872111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16448 22:26:11.920876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16449 22:26:11.921266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16451 22:26:11.972693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16452 22:26:11.973208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16454 22:26:12.027574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16456 22:26:12.028321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16457 22:26:12.070871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16458 22:26:12.071292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16460 22:26:12.113329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16461 22:26:12.113679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16463 22:26:12.155672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16464 22:26:12.156058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16466 22:26:12.195922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16468 22:26:12.196576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16469 22:26:12.237794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16471 22:26:12.238286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16472 22:26:12.280824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16473 22:26:12.281236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16475 22:26:12.323129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16477 22:26:12.323564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16478 22:26:12.364224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16479 22:26:12.364606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16481 22:26:12.400542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16483 22:26:12.401013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16484 22:26:12.436867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16485 22:26:12.437268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16487 22:26:12.482428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16489 22:26:12.482900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16490 22:26:12.525895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16492 22:26:12.526375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16493 22:26:12.563631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16494 22:26:12.564057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16496 22:26:12.609183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16497 22:26:12.609613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16499 22:26:12.651697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16500 22:26:12.652155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16502 22:26:12.692798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16504 22:26:12.693278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16505 22:26:12.739075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16507 22:26:12.739469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16508 22:26:12.776683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16510 22:26:12.777132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16511 22:26:12.813990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16512 22:26:12.814431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16514 22:26:12.859709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16515 22:26:12.860124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16517 22:26:12.906392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16519 22:26:12.906789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16520 22:26:12.943850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16521 22:26:12.944274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16523 22:26:12.987133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16525 22:26:12.987596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16526 22:26:13.027365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16527 22:26:13.027860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16529 22:26:13.066822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16530 22:26:13.067391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16532 22:26:13.109350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16533 22:26:13.109774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16535 22:26:13.150978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16536 22:26:13.151545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16538 22:26:13.191376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16539 22:26:13.191825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16541 22:26:13.227382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16543 22:26:13.227831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16544 22:26:13.264001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16546 22:26:13.264419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16547 22:26:13.308193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16548 22:26:13.308626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16550 22:26:13.353723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16551 22:26:13.354169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16553 22:26:13.405726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16554 22:26:13.406163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16556 22:26:13.457540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16557 22:26:13.458025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16559 22:26:13.506376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16561 22:26:13.506870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16562 22:26:13.547755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16563 22:26:13.548182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16565 22:26:13.595564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16566 22:26:13.596014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16568 22:26:13.644497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16569 22:26:13.644948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16571 22:26:13.696427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16572 22:26:13.696887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16574 22:26:13.736035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16576 22:26:13.736502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16577 22:26:13.793519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16578 22:26:13.793955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16580 22:26:13.852790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16581 22:26:13.853217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16583 22:26:13.904518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16584 22:26:13.904958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16586 22:26:13.948138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16587 22:26:13.948570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16589 22:26:13.994991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16590 22:26:13.995486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16592 22:26:14.036047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16594 22:26:14.036494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16595 22:26:14.081117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16596 22:26:14.081527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16598 22:26:14.123325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16600 22:26:14.123791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16601 22:26:14.161782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16602 22:26:14.162244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16604 22:26:14.218572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16606 22:26:14.219340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16607 22:26:14.276555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16608 22:26:14.277068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16610 22:26:14.324537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16611 22:26:14.324942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16613 22:26:14.363319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16614 22:26:14.363772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16616 22:26:14.402923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16618 22:26:14.403393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16619 22:26:14.441507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16621 22:26:14.441986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16622 22:26:14.481981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16624 22:26:14.482466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16625 22:26:14.521173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16626 22:26:14.521600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16628 22:26:14.563399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16630 22:26:14.563862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16631 22:26:14.607605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16632 22:26:14.608090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16634 22:26:14.651707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16635 22:26:14.652124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16637 22:26:14.696035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16639 22:26:14.696718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16640 22:26:14.746070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16642 22:26:14.746872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16643 22:26:14.798032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16644 22:26:14.798453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16646 22:26:14.844030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16647 22:26:14.844535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16649 22:26:14.885607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16650 22:26:14.886116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16652 22:26:14.940033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16654 22:26:14.940514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16655 22:26:14.992694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16657 22:26:14.993164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16658 22:26:15.041715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16659 22:26:15.042145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16661 22:26:15.080737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16662 22:26:15.081253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16664 22:26:15.131764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16665 22:26:15.132271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16667 22:26:15.180918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16669 22:26:15.181395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16670 22:26:15.239556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16671 22:26:15.240012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16673 22:26:15.299873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16675 22:26:15.300306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16676 22:26:15.362219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16678 22:26:15.362765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16679 22:26:15.413331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16681 22:26:15.413808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16682 22:26:15.461315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16684 22:26:15.461791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16685 22:26:15.501377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16686 22:26:15.501829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16688 22:26:15.538829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16689 22:26:15.539280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16691 22:26:15.580818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16693 22:26:15.581234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16694 22:26:15.625458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16695 22:26:15.625901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16697 22:26:15.672047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16699 22:26:15.672528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16700 22:26:15.723453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16702 22:26:15.723876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16703 22:26:15.767290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16704 22:26:15.767712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16706 22:26:15.810632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16708 22:26:15.811416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16709 22:26:15.856208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16711 22:26:15.856660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16712 22:26:15.904616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16714 22:26:15.905317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16715 22:26:15.955804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16717 22:26:15.956201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16718 22:26:16.007541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16719 22:26:16.008035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16721 22:26:16.052745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16722 22:26:16.053192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16724 22:26:16.101564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16725 22:26:16.101994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16727 22:26:16.145327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16728 22:26:16.145761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16730 22:26:16.195921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16732 22:26:16.196330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16733 22:26:16.242576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16735 22:26:16.243394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16736 22:26:16.284284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16737 22:26:16.284739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16739 22:26:16.325196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16740 22:26:16.325703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16742 22:26:16.372087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16744 22:26:16.372549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16745 22:26:16.415543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16747 22:26:16.415995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16748 22:26:16.458047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16749 22:26:16.458472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16751 22:26:16.502491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16753 22:26:16.503099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16754 22:26:16.553362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16755 22:26:16.553767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16757 22:26:16.602459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16759 22:26:16.603172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16760 22:26:16.652301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16762 22:26:16.652781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16763 22:26:16.703688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16764 22:26:16.704129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16766 22:26:16.755070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16767 22:26:16.755475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16769 22:26:16.804668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16770 22:26:16.805100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16772 22:26:16.855502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16773 22:26:16.855962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16775 22:26:16.900545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16776 22:26:16.900922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16778 22:26:16.943737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16779 22:26:16.944146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16781 22:26:16.987302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16783 22:26:16.987726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16784 22:26:17.032983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16785 22:26:17.033544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16787 22:26:17.079671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16789 22:26:17.080143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16790 22:26:17.125591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16791 22:26:17.126068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16793 22:26:17.169702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16795 22:26:17.170179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16796 22:26:17.221163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16797 22:26:17.221596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16799 22:26:17.274278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16801 22:26:17.274726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16802 22:26:17.320970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16803 22:26:17.321393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16805 22:26:17.364862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16807 22:26:17.365363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16808 22:26:17.407851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16809 22:26:17.408441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16811 22:26:17.452724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16813 22:26:17.453327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16814 22:26:17.498809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16816 22:26:17.499265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16817 22:26:17.548451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16818 22:26:17.548905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16820 22:26:17.594267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16822 22:26:17.594747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16823 22:26:17.643666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16824 22:26:17.644105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16826 22:26:17.692859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16827 22:26:17.693248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16829 22:26:17.730380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
16831 22:26:17.730844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16832 22:26:17.769364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
16833 22:26:17.769878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
16835 22:26:17.812016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
16836 22:26:17.812479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
16838 22:26:17.861714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
16839 22:26:17.862122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
16841 22:26:17.910067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
16842 22:26:17.910499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
16844 22:26:17.950080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
16845 22:26:17.950465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
16847 22:26:17.990071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
16848 22:26:17.990615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
16850 22:26:18.026559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
16852 22:26:18.027402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
16853 22:26:18.073234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
16854 22:26:18.073804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
16856 22:26:18.119319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
16857 22:26:18.119753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
16859 22:26:18.167305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
16860 22:26:18.167720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
16862 22:26:18.216565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
16863 22:26:18.217080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
16865 22:26:18.264059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
16867 22:26:18.264470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
16868 22:26:18.311056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
16869 22:26:18.311459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
16871 22:26:18.357378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
16872 22:26:18.357748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
16874 22:26:18.404475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
16875 22:26:18.404957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
16877 22:26:18.451996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
16878 22:26:18.452437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
16880 22:26:18.500561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
16881 22:26:18.500959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
16883 22:26:18.551582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
16884 22:26:18.552095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
16886 22:26:18.602288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
16888 22:26:18.603033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
16889 22:26:18.652368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
16890 22:26:18.652832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
16892 22:26:18.703708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
16893 22:26:18.704132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
16895 22:26:18.752358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
16897 22:26:18.752808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
16898 22:26:18.800321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
16899 22:26:18.800833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
16901 22:26:18.848402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
16902 22:26:18.848870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
16904 22:26:18.895256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
16905 22:26:18.895760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
16907 22:26:18.942868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
16908 22:26:18.943409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
16910 22:26:18.988031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
16911 22:26:18.988546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
16913 22:26:19.035809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
16914 22:26:19.036267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
16916 22:26:19.081608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
16917 22:26:19.082042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
16919 22:26:19.132615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
16920 22:26:19.132993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
16922 22:26:19.180650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
16923 22:26:19.181075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
16925 22:26:19.228490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
16926 22:26:19.228911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
16928 22:26:19.273534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
16930 22:26:19.274012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
16931 22:26:19.320369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
16932 22:26:19.320818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
16934 22:26:19.365760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
16935 22:26:19.366201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
16937 22:26:19.411578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
16938 22:26:19.412008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
16940 22:26:19.453632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
16942 22:26:19.454333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
16943 22:26:19.501593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
16944 22:26:19.502007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
16946 22:26:19.545072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
16947 22:26:19.545436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
16949 22:26:19.597563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
16950 22:26:19.597982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
16952 22:26:19.644217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
16954 22:26:19.644613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
16955 22:26:19.690093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
16956 22:26:19.690617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
16958 22:26:19.736127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
16959 22:26:19.736551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
16961 22:26:19.779899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
16963 22:26:19.780604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
16964 22:26:19.821896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
16965 22:26:19.822439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
16967 22:26:19.861524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
16968 22:26:19.862074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
16970 22:26:19.904696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
16971 22:26:19.905190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
16973 22:26:19.945712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
16974 22:26:19.946180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
16976 22:26:19.991754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
16977 22:26:19.992271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
16979 22:26:20.036643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
16980 22:26:20.037019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
16982 22:26:20.088958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
16984 22:26:20.089422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
16985 22:26:20.133934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
16986 22:26:20.134355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
16988 22:26:20.179166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
16989 22:26:20.179517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
16991 22:26:20.231770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
16992 22:26:20.232194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
16994 22:26:20.266175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
16995 22:26:20.266612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
16997 22:26:20.308189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
16998 22:26:20.308653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17000 22:26:20.354578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17002 22:26:20.355334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17003 22:26:20.395842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17004 22:26:20.396230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17006 22:26:20.443020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17007 22:26:20.443466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17009 22:26:20.491156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17010 22:26:20.491581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17012 22:26:20.526898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17013 22:26:20.527360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17015 22:26:20.573954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17016 22:26:20.574344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17018 22:26:20.620235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17020 22:26:20.620653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17021 22:26:20.661488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17022 22:26:20.662002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17024 22:26:20.704609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17026 22:26:20.705023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17027 22:26:20.754346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17029 22:26:20.754778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17030 22:26:20.795845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17031 22:26:20.796275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17033 22:26:20.833678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17035 22:26:20.834142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17036 22:26:20.878334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17038 22:26:20.878769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17039 22:26:20.925705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17040 22:26:20.927884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17042 22:26:20.975027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17044 22:26:20.975692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17045 22:26:21.029706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17046 22:26:21.030073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17048 22:26:21.086326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17050 22:26:21.086938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17051 22:26:21.189416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17052 22:26:21.189871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17054 22:26:21.245342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17055 22:26:21.245738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17057 22:26:21.291793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17058 22:26:21.292141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17060 22:26:21.343253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17062 22:26:21.343843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17063 22:26:21.393722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17064 22:26:21.394177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17066 22:26:21.448673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17067 22:26:21.449029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17069 22:26:21.499854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17070 22:26:21.500208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17072 22:26:21.554467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17074 22:26:21.554947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17075 22:26:21.605346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17077 22:26:21.605687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17078 22:26:21.659489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17079 22:26:21.659831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17081 22:26:21.712210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17082 22:26:21.712686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17084 22:26:21.764227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17085 22:26:21.764611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17087 22:26:21.818360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17089 22:26:21.818914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17090 22:26:21.878427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17092 22:26:21.878997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17093 22:26:21.930114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17094 22:26:21.930575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17096 22:26:21.987298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17097 22:26:21.988060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17099 22:26:22.040107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17100 22:26:22.040530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17102 22:26:22.096506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17104 22:26:22.096896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17105 22:26:22.152557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17106 22:26:22.153026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17108 22:26:22.210021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17109 22:26:22.210399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17111 22:26:22.264229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17112 22:26:22.264661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17114 22:26:22.318765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17116 22:26:22.319227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17117 22:26:22.368213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17118 22:26:22.368648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17120 22:26:22.415039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17121 22:26:22.415486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17123 22:26:22.461600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17124 22:26:22.461974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17126 22:26:22.513122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17127 22:26:22.513520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17129 22:26:22.564744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17130 22:26:22.565107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17132 22:26:22.619880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17134 22:26:22.620295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17135 22:26:22.674285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17136 22:26:22.674672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17138 22:26:22.725799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17139 22:26:22.726542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17141 22:26:22.772909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17143 22:26:22.773293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17144 22:26:22.820038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17145 22:26:22.820662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17147 22:26:22.869710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17148 22:26:22.870061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17150 22:26:22.920907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17151 22:26:22.921540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17153 22:26:22.968502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17154 22:26:22.968886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17156 22:26:23.019412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17157 22:26:23.019813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17159 22:26:23.069849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17160 22:26:23.070288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17162 22:26:23.120201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17163 22:26:23.120564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17165 22:26:23.171214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17166 22:26:23.171676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17168 22:26:23.215968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17169 22:26:23.216471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17171 22:26:23.269020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17172 22:26:23.269431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17174 22:26:23.307822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17175 22:26:23.308266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17177 22:26:23.351905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17179 22:26:23.352372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17180 22:26:23.396737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17182 22:26:23.397216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17183 22:26:23.439798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17184 22:26:23.440215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17186 22:26:23.487229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17187 22:26:23.487730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17189 22:26:23.527139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17190 22:26:23.527592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17192 22:26:23.563250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17194 22:26:23.563689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17195 22:26:23.607256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17196 22:26:23.607722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17198 22:26:23.663286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17199 22:26:23.663717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17201 22:26:23.719933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17202 22:26:23.720360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17204 22:26:23.777979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17205 22:26:23.778473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17207 22:26:23.832250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17208 22:26:23.832702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17210 22:26:23.885544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17211 22:26:23.885985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17213 22:26:23.941177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17214 22:26:23.941612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17216 22:26:23.996426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17218 22:26:23.997039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17219 22:26:24.051610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17220 22:26:24.052040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17222 22:26:24.102482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17224 22:26:24.102950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17225 22:26:24.140636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17226 22:26:24.141091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17228 22:26:24.179533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17229 22:26:24.179972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17231 22:26:24.221101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17232 22:26:24.221528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17234 22:26:24.273017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17235 22:26:24.273440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17237 22:26:24.331156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17238 22:26:24.331657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17240 22:26:24.381483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17242 22:26:24.381932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17243 22:26:24.432184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17244 22:26:24.432610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17246 22:26:24.481469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17247 22:26:24.482033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17249 22:26:24.529785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17250 22:26:24.530251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17252 22:26:24.576795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17254 22:26:24.577434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17255 22:26:24.622095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17256 22:26:24.622642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17258 22:26:24.666871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17259 22:26:24.667307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17261 22:26:24.704638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17262 22:26:24.705068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17264 22:26:24.756088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17265 22:26:24.756572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17267 22:26:24.806121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17268 22:26:24.806589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17270 22:26:24.858100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17271 22:26:24.858529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17273 22:26:24.909359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17274 22:26:24.909776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17276 22:26:24.952781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17278 22:26:24.953397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17279 22:26:24.991626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17281 22:26:24.992294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17282 22:26:25.028798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17284 22:26:25.029275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17285 22:26:25.075118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17286 22:26:25.075609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17288 22:26:25.115769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17289 22:26:25.116152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17291 22:26:25.169054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17292 22:26:25.169453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17294 22:26:25.216799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17295 22:26:25.217228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17297 22:26:25.260677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17298 22:26:25.261138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17300 22:26:25.304432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17301 22:26:25.304867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17303 22:26:25.351286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17304 22:26:25.351724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17306 22:26:25.397504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17307 22:26:25.397924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17309 22:26:25.441165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17310 22:26:25.441611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17312 22:26:25.478489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17314 22:26:25.478982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17315 22:26:25.533503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17316 22:26:25.533912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17318 22:26:25.581723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17319 22:26:25.582249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17321 22:26:25.630966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17322 22:26:25.631387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17324 22:26:25.681248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17326 22:26:25.681717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17327 22:26:25.732716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17328 22:26:25.733076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17330 22:26:25.787961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17332 22:26:25.788716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17333 22:26:25.841591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17334 22:26:25.842043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17336 22:26:25.885787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17337 22:26:25.886304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17339 22:26:25.930904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17340 22:26:25.931401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17342 22:26:25.975848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17343 22:26:25.976409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17345 22:26:26.023633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17346 22:26:26.024062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17348 22:26:26.073371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17349 22:26:26.073876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17351 22:26:26.115440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17352 22:26:26.115887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17354 22:26:26.157304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17355 22:26:26.157755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17357 22:26:26.209342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17358 22:26:26.209744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17360 22:26:26.300018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17361 22:26:26.300502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17363 22:26:26.351516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17365 22:26:26.352262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17366 22:26:26.394165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17367 22:26:26.394599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17369 22:26:26.437574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17370 22:26:26.438003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17372 22:26:26.488870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17373 22:26:26.489302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17375 22:26:26.538100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17376 22:26:26.538544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17378 22:26:26.581721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17379 22:26:26.582119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17381 22:26:26.630925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17382 22:26:26.631380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17384 22:26:26.679776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17385 22:26:26.680221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17387 22:26:26.721605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17388 22:26:26.722112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17390 22:26:26.776521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17392 22:26:26.776993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17393 22:26:26.825264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17394 22:26:26.825677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17396 22:26:26.871117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17398 22:26:26.871589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17399 22:26:26.918539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17401 22:26:26.919014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17402 22:26:26.973885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17403 22:26:26.974296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17405 22:26:27.016352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17406 22:26:27.016808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17408 22:26:27.058256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17410 22:26:27.058712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17411 22:26:27.110822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17412 22:26:27.111220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17414 22:26:27.159887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17415 22:26:27.160331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17417 22:26:27.204961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17418 22:26:27.205412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17420 22:26:27.259954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17421 22:26:27.260375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17423 22:26:27.303675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17425 22:26:27.304137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17426 22:26:27.347892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17427 22:26:27.348325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17429 22:26:27.389340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17430 22:26:27.389912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17432 22:26:27.433169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17433 22:26:27.433622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17435 22:26:27.476285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17437 22:26:27.476685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17438 22:26:27.530342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17440 22:26:27.530768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17441 22:26:27.587570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17443 22:26:27.588052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17444 22:26:27.643685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17446 22:26:27.644166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17447 22:26:27.700176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17448 22:26:27.700598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17450 22:26:27.756367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17451 22:26:27.756819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17453 22:26:27.808160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17455 22:26:27.808530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17456 22:26:27.849912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17458 22:26:27.850393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17459 22:26:27.895482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17461 22:26:27.895902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17462 22:26:27.940361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17463 22:26:27.940901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17465 22:26:27.980595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17466 22:26:27.981048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17468 22:26:28.028809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17469 22:26:28.029234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17471 22:26:28.075596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17472 22:26:28.076016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17474 22:26:28.117027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17475 22:26:28.117430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17477 22:26:28.156298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17478 22:26:28.156722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17480 22:26:28.198625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17481 22:26:28.199080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17483 22:26:28.240463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17485 22:26:28.240927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17486 22:26:28.281306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17488 22:26:28.281736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17489 22:26:28.318948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17490 22:26:28.319388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17492 22:26:28.360834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17494 22:26:28.361298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17495 22:26:28.402067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17496 22:26:28.402501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17498 22:26:28.444311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17499 22:26:28.444741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17501 22:26:28.484282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17502 22:26:28.484696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17504 22:26:28.521396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17505 22:26:28.521828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17507 22:26:28.561701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17508 22:26:28.562126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17510 22:26:28.617841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17511 22:26:28.618227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17513 22:26:28.655918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17515 22:26:28.656505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17516 22:26:28.695096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17517 22:26:28.695495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17519 22:26:28.741210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17520 22:26:28.741639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17522 22:26:28.787636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17523 22:26:28.788057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17525 22:26:28.833066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17526 22:26:28.833512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17528 22:26:28.881713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17530 22:26:28.882146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17531 22:26:28.929004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17533 22:26:28.929371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17534 22:26:28.973373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17535 22:26:28.973768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17537 22:26:29.019722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17538 22:26:29.020158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17540 22:26:29.061665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17542 22:26:29.062072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17543 22:26:29.109073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17544 22:26:29.109506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17546 22:26:29.159997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17547 22:26:29.160376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17549 22:26:29.199984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17550 22:26:29.200341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17552 22:26:29.239101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17553 22:26:29.239609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17555 22:26:29.279613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17556 22:26:29.280050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17558 22:26:29.322540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17560 22:26:29.322979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17561 22:26:29.361642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17562 22:26:29.362042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17564 22:26:29.405163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17565 22:26:29.405574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17567 22:26:29.445559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17568 22:26:29.446169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17570 22:26:29.489429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17571 22:26:29.489816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17573 22:26:29.526538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17575 22:26:29.527067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17576 22:26:29.569585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17577 22:26:29.570005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17579 22:26:29.609341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17580 22:26:29.609765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17582 22:26:29.655505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17583 22:26:29.655925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17585 22:26:29.700178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17587 22:26:29.700608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17588 22:26:29.744543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17590 22:26:29.744997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17591 22:26:29.782897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17592 22:26:29.783300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17594 22:26:29.836022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17595 22:26:29.836451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17597 22:26:29.884084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17598 22:26:29.884521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17600 22:26:29.928527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17602 22:26:29.928963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17603 22:26:29.979737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17604 22:26:29.980189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17606 22:26:30.029248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17607 22:26:30.029777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17609 22:26:30.078150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17610 22:26:30.078556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17612 22:26:30.128912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17614 22:26:30.129323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17615 22:26:30.173936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17617 22:26:30.174342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17618 22:26:30.222277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17620 22:26:30.222703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17621 22:26:30.261874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17622 22:26:30.262325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17624 22:26:30.306434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17626 22:26:30.306868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17627 22:26:30.352864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17628 22:26:30.353295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17630 22:26:30.403534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17631 22:26:30.403992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17633 22:26:30.444281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17634 22:26:30.444699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17636 22:26:30.491497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17638 22:26:30.491983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17639 22:26:30.539557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17640 22:26:30.540090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17642 22:26:30.588152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17643 22:26:30.588541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17645 22:26:30.628006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17647 22:26:30.628481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17648 22:26:30.665110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17649 22:26:30.665564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17651 22:26:30.703670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17652 22:26:30.704099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17654 22:26:30.743215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17656 22:26:30.743679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17657 22:26:30.788510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17658 22:26:30.788998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17660 22:26:30.835487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17661 22:26:30.835913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17663 22:26:30.876168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17665 22:26:30.876724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17666 22:26:30.918513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17668 22:26:30.918916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17669 22:26:30.955694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17670 22:26:30.956240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17672 22:26:31.002612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17674 22:26:31.003075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17675 22:26:31.044639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17677 22:26:31.045224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17678 22:26:31.096208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17679 22:26:31.096652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17681 22:26:31.143503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17682 22:26:31.143937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17684 22:26:31.182273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17686 22:26:31.183014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17687 22:26:31.228855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17688 22:26:31.229407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17690 22:26:31.271261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17692 22:26:31.271746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17693 22:26:31.309449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17694 22:26:31.309865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17696 22:26:31.352803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17697 22:26:31.353382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17699 22:26:31.396469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17700 22:26:31.397049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17702 22:26:31.445551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17703 22:26:31.446017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17705 22:26:31.495307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17707 22:26:31.495789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17708 22:26:31.541774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17709 22:26:31.542196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17711 22:26:31.592229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17712 22:26:31.592660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17714 22:26:31.638466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17716 22:26:31.638859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17717 22:26:31.681246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17718 22:26:31.681799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17720 22:26:31.720695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17722 22:26:31.721122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17723 22:26:31.767496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17724 22:26:31.767914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17726 22:26:31.818427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17728 22:26:31.818905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17729 22:26:31.865304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17730 22:26:31.865682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17732 22:26:31.905882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17733 22:26:31.906291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17735 22:26:31.948193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17736 22:26:31.948636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17738 22:26:32.002034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17739 22:26:32.002465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17741 22:26:32.059424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17742 22:26:32.059888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17744 22:26:32.113328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17745 22:26:32.113677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17747 22:26:32.153164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17748 22:26:32.153566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17750 22:26:32.197712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17751 22:26:32.198098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17753 22:26:32.236747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17755 22:26:32.237138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17756 22:26:32.273274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17757 22:26:32.273636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17759 22:26:32.318269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17761 22:26:32.318685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17762 22:26:32.366367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17764 22:26:32.366997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17765 22:26:32.416060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17767 22:26:32.416529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17768 22:26:32.458869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17769 22:26:32.459314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17771 22:26:32.501245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17772 22:26:32.501603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17774 22:26:32.547864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17775 22:26:32.548250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17777 22:26:32.596627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17778 22:26:32.597131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17780 22:26:32.645557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17781 22:26:32.646141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17783 22:26:32.692780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17785 22:26:32.693260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17786 22:26:32.743327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17787 22:26:32.743714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17789 22:26:32.792328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17790 22:26:32.792753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17792 22:26:32.843766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17793 22:26:32.844234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17795 22:26:32.888951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17796 22:26:32.889331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17798 22:26:32.928708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17799 22:26:32.929200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17801 22:26:32.975815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17803 22:26:32.976283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17804 22:26:33.018782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17805 22:26:33.019235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17807 22:26:33.063562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17808 22:26:33.064005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17810 22:26:33.105838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17811 22:26:33.106245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17813 22:26:33.153800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17815 22:26:33.154271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17816 22:26:33.208066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17818 22:26:33.208442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17819 22:26:33.251497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17820 22:26:33.251931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17822 22:26:33.300394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17823 22:26:33.300823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17825 22:26:33.350179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17827 22:26:33.350944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17828 22:26:33.401004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17829 22:26:33.401494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17831 22:26:33.445570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
17832 22:26:33.446026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
17834 22:26:33.487280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
17835 22:26:33.487660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
17837 22:26:33.527580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
17838 22:26:33.527970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
17840 22:26:33.568345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
17841 22:26:33.568790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
17843 22:26:33.621668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
17844 22:26:33.622096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
17846 22:26:33.672626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
17847 22:26:33.673052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
17849 22:26:33.718312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
17851 22:26:33.718736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
17852 22:26:33.756580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
17853 22:26:33.756995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
17855 22:26:33.795584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
17857 22:26:33.796224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
17858 22:26:33.840094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
17860 22:26:33.840724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
17861 22:26:33.882219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
17863 22:26:33.882905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
17864 22:26:33.924893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
17865 22:26:33.925352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
17867 22:26:33.969939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
17868 22:26:33.970418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
17870 22:26:34.010444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
17872 22:26:34.010838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
17873 22:26:34.048487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
17874 22:26:34.048902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
17876 22:26:34.095882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
17877 22:26:34.096331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
17879 22:26:34.141201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
17880 22:26:34.141664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
17882 22:26:34.184578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
17883 22:26:34.184990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
17885 22:26:34.220848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
17886 22:26:34.221258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
17888 22:26:34.268642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
17889 22:26:34.269039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
17891 22:26:34.315387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
17892 22:26:34.315795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
17894 22:26:34.354283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
17896 22:26:34.354708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
17897 22:26:34.403792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
17898 22:26:34.404220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
17900 22:26:34.445520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
17901 22:26:34.445938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
17903 22:26:34.489590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
17904 22:26:34.489994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
17906 22:26:34.535947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
17907 22:26:34.536369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
17909 22:26:34.583455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
17911 22:26:34.583874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
17912 22:26:34.630826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
17913 22:26:34.631319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
17915 22:26:34.669956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
17916 22:26:34.670406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
17918 22:26:34.714037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
17919 22:26:34.714471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
17921 22:26:34.760036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
17922 22:26:34.760477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
17924 22:26:34.809450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
17925 22:26:34.809914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
17927 22:26:34.860787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
17928 22:26:34.861248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
17930 22:26:34.901892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
17931 22:26:34.902322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
17933 22:26:34.946170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
17935 22:26:34.946624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
17936 22:26:34.989976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
17938 22:26:34.990635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
17939 22:26:35.037098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
17941 22:26:35.037665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
17942 22:26:35.093156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
17943 22:26:35.093593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
17945 22:26:35.136667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
17946 22:26:35.137103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
17948 22:26:35.174941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
17949 22:26:35.175400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
17951 22:26:35.214136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
17952 22:26:35.214556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
17954 22:26:35.257099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
17956 22:26:35.257511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
17957 22:26:35.296112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
17959 22:26:35.296584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
17960 22:26:35.335654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
17961 22:26:35.336105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
17963 22:26:35.373438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
17964 22:26:35.373844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
17966 22:26:35.413519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
17967 22:26:35.413951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
17969 22:26:35.452750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
17970 22:26:35.453166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
17972 22:26:35.489810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
17973 22:26:35.490301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
17975 22:26:35.535948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
17976 22:26:35.536364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
17978 22:26:35.575866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
17979 22:26:35.576283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
17981 22:26:35.613945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
17983 22:26:35.614392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
17984 22:26:35.652285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
17986 22:26:35.653023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
17987 22:26:35.697268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
17989 22:26:35.697641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
17990 22:26:35.744337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
17992 22:26:35.744876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
17993 22:26:35.782799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
17994 22:26:35.783230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
17996 22:26:35.826266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
17998 22:26:35.826744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
17999 22:26:35.872947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18000 22:26:35.873402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18002 22:26:35.921102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18003 22:26:35.921522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18005 22:26:35.966965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18006 22:26:35.967416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18008 22:26:36.004186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18010 22:26:36.004632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18011 22:26:36.041076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18013 22:26:36.041515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18014 22:26:36.079474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18016 22:26:36.080220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18017 22:26:36.117054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18018 22:26:36.117524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18020 22:26:36.157532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18022 22:26:36.158176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18023 22:26:36.199660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18024 22:26:36.200082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18026 22:26:36.239563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18027 22:26:36.239991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18029 22:26:36.278222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18031 22:26:36.278680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18032 22:26:36.315242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18034 22:26:36.315898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18035 22:26:36.356476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18036 22:26:36.357025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18038 22:26:36.400314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18039 22:26:36.400720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18041 22:26:36.438521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18043 22:26:36.438977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18044 22:26:36.486794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18045 22:26:36.487150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18047 22:26:36.532398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18048 22:26:36.532825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18050 22:26:36.577044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18051 22:26:36.577407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18053 22:26:36.617912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18055 22:26:36.618395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18056 22:26:36.655748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18058 22:26:36.656169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18059 22:26:36.697698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18060 22:26:36.698133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18062 22:26:36.745724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18063 22:26:36.746148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18065 22:26:36.793784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18066 22:26:36.794211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18068 22:26:36.839161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18069 22:26:36.839654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18071 22:26:36.888239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18072 22:26:36.888676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18074 22:26:36.934199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18076 22:26:36.934679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18077 22:26:36.984151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18078 22:26:36.984615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18080 22:26:37.031968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18081 22:26:37.032446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18083 22:26:37.075269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18084 22:26:37.075714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18086 22:26:37.120547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18088 22:26:37.120975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18089 22:26:37.163255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18090 22:26:37.163679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18092 22:26:37.207553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18094 22:26:37.208025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18095 22:26:37.251902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18096 22:26:37.252302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18098 22:26:37.293467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18099 22:26:37.294025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18101 22:26:37.343196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18103 22:26:37.343657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18104 22:26:37.390715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18105 22:26:37.391121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18107 22:26:37.435981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18108 22:26:37.436423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18110 22:26:37.479637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18111 22:26:37.480071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18113 22:26:37.531207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18114 22:26:37.531608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18116 22:26:37.583893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18117 22:26:37.584296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18119 22:26:37.634942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18120 22:26:37.635358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18122 22:26:37.683479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18123 22:26:37.683914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18125 22:26:37.728160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18127 22:26:37.728661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18128 22:26:37.772034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18129 22:26:37.772445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18131 22:26:37.819670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18132 22:26:37.820123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18134 22:26:37.865005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18135 22:26:37.865431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18137 22:26:37.907430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18138 22:26:37.907881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18140 22:26:37.948182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18142 22:26:37.948605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18143 22:26:37.989957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18144 22:26:37.990397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18146 22:26:38.036296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18147 22:26:38.036740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18149 22:26:38.074467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18151 22:26:38.075068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18152 22:26:38.123693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18153 22:26:38.124120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18155 22:26:38.167976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18156 22:26:38.168393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18158 22:26:38.212415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18159 22:26:38.212837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18161 22:26:38.262406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18163 22:26:38.262881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18164 22:26:38.319670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18165 22:26:38.320055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18167 22:26:38.375655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18168 22:26:38.376188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18170 22:26:38.429894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18171 22:26:38.430291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18173 22:26:38.476687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18174 22:26:38.477266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18176 22:26:38.513344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18177 22:26:38.513795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18179 22:26:38.557915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18180 22:26:38.558311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18182 22:26:38.608247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18184 22:26:38.608622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18185 22:26:38.655606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18187 22:26:38.656153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18188 22:26:38.697081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18189 22:26:38.697500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18191 22:26:38.732444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18192 22:26:38.732839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18194 22:26:38.768923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18195 22:26:38.769368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18197 22:26:38.805596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18198 22:26:38.806049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18200 22:26:38.860702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18201 22:26:38.861207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18203 22:26:38.912050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18204 22:26:38.912520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18206 22:26:38.952483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18208 22:26:38.953101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18209 22:26:38.993695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18211 22:26:38.994409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18212 22:26:39.034023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18214 22:26:39.034427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18215 22:26:39.071232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18216 22:26:39.071761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18218 22:26:39.124830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18219 22:26:39.125210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18221 22:26:39.180729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18223 22:26:39.181267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18224 22:26:39.223838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18226 22:26:39.224301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18227 22:26:39.264994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18228 22:26:39.265457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18230 22:26:39.307412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18232 22:26:39.308060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18233 22:26:39.345364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18234 22:26:39.345769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18236 22:26:39.385614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18238 22:26:39.386067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18239 22:26:39.429381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18240 22:26:39.429801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18242 22:26:39.468510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18244 22:26:39.468931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18245 22:26:39.508492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18246 22:26:39.509024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18248 22:26:39.553754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18250 22:26:39.554186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18251 22:26:39.589707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18253 22:26:39.590332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18254 22:26:39.631633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18255 22:26:39.632055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18257 22:26:39.672818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18258 22:26:39.673240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18260 22:26:39.715203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18262 22:26:39.715638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18263 22:26:39.756681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18264 22:26:39.757104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18266 22:26:39.796517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18268 22:26:39.797093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18269 22:26:39.839909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18270 22:26:39.840380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18272 22:26:39.876531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18273 22:26:39.877029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18275 22:26:39.919767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18277 22:26:39.920522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18278 22:26:39.963842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18279 22:26:39.964304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18281 22:26:40.004219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18283 22:26:40.004674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18284 22:26:40.047676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18285 22:26:40.048063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18287 22:26:40.087360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18288 22:26:40.087784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18290 22:26:40.128817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18291 22:26:40.129271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18293 22:26:40.177160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18294 22:26:40.177588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18296 22:26:40.226810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18297 22:26:40.227267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18299 22:26:40.275317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18300 22:26:40.275747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18302 22:26:40.327098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18303 22:26:40.327494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18305 22:26:40.376941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18307 22:26:40.377607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18308 22:26:40.422867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18309 22:26:40.423314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18311 22:26:40.467466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18312 22:26:40.468013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18314 22:26:40.515881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18316 22:26:40.516351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18317 22:26:40.557544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18319 22:26:40.558032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18320 22:26:40.597310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18321 22:26:40.597733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18323 22:26:40.641723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18324 22:26:40.642162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18326 22:26:40.680746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18328 22:26:40.681213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18329 22:26:40.725135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18331 22:26:40.725682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18332 22:26:40.768977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18333 22:26:40.769425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18335 22:26:40.808933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18337 22:26:40.809586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18338 22:26:40.847930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18339 22:26:40.848352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18341 22:26:40.884544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18343 22:26:40.884979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18344 22:26:40.927377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18346 22:26:40.928105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18347 22:26:40.977970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18348 22:26:40.978402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18350 22:26:41.034394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18352 22:26:41.035153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18353 22:26:41.084667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18355 22:26:41.085273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18356 22:26:41.122065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18357 22:26:41.122519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18359 22:26:41.159553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18360 22:26:41.159991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18362 22:26:41.200388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18363 22:26:41.200815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18365 22:26:41.244841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18366 22:26:41.245607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18368 22:26:41.295435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18369 22:26:41.295837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18371 22:26:41.345785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18372 22:26:41.346196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18374 22:26:41.391158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18375 22:26:41.391564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18377 22:26:41.439368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18378 22:26:41.439857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18380 22:26:41.487500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18382 22:26:41.487969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18383 22:26:41.540553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18384 22:26:41.540974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18386 22:26:41.591732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18387 22:26:41.592157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18389 22:26:41.633869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18390 22:26:41.634236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18392 22:26:41.675461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18394 22:26:41.675890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18395 22:26:41.716269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18397 22:26:41.716698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18398 22:26:41.754291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18400 22:26:41.754785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18401 22:26:41.795220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18402 22:26:41.795648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18404 22:26:41.839325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18405 22:26:41.839700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18407 22:26:41.888515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18408 22:26:41.888942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18410 22:26:41.930111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18411 22:26:41.930569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18413 22:26:41.973888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18414 22:26:41.974389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18416 22:26:42.019797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18417 22:26:42.020223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18419 22:26:42.057129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18420 22:26:42.057547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18422 22:26:42.092199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18424 22:26:42.092698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18425 22:26:42.129817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18426 22:26:42.130332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18428 22:26:42.169139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18429 22:26:42.169582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18431 22:26:42.212389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18432 22:26:42.212810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18434 22:26:42.261563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18435 22:26:42.262074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18437 22:26:42.307914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18438 22:26:42.308385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18440 22:26:42.348902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18441 22:26:42.349348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18443 22:26:42.391989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18444 22:26:42.392409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18446 22:26:42.435320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18447 22:26:42.435771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18449 22:26:42.475642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18450 22:26:42.476022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18452 22:26:42.518403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18454 22:26:42.518951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18455 22:26:42.564105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18456 22:26:42.564538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18458 22:26:42.604407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18459 22:26:42.604831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18461 22:26:42.652414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18462 22:26:42.652977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18464 22:26:42.704530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18465 22:26:42.704981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18467 22:26:42.748381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18468 22:26:42.748820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18470 22:26:42.791526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18471 22:26:42.791913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18473 22:26:42.833764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18475 22:26:42.834202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18476 22:26:42.870182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18478 22:26:42.870607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18479 22:26:42.912164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18480 22:26:42.912645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18482 22:26:42.961693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18483 22:26:42.962121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18485 22:26:43.011561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18486 22:26:43.011995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18488 22:26:43.059772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18490 22:26:43.060187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18491 22:26:43.115245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18492 22:26:43.115683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18494 22:26:43.162152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18496 22:26:43.162580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18497 22:26:43.199560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18499 22:26:43.200021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18500 22:26:43.240250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18502 22:26:43.240886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18503 22:26:43.288082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18504 22:26:43.288461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18506 22:26:43.335105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18508 22:26:43.335585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18509 22:26:43.383799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18510 22:26:43.384221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18512 22:26:43.436454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18513 22:26:43.436879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18515 22:26:43.489211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18516 22:26:43.489792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18518 22:26:43.531747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18519 22:26:43.532170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18521 22:26:43.569481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18523 22:26:43.569959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18524 22:26:43.611640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18525 22:26:43.612096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18527 22:26:43.649859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18529 22:26:43.650614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18530 22:26:43.689031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18531 22:26:43.689605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18533 22:26:43.734850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18534 22:26:43.735283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18536 22:26:43.776572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18537 22:26:43.777018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18539 22:26:43.833076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18540 22:26:43.833490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18542 22:26:43.893271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18543 22:26:43.893692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18545 22:26:43.951941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18547 22:26:43.952372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18548 22:26:43.995257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18549 22:26:43.995683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18551 22:26:44.036390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18552 22:26:44.036793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18554 22:26:44.077041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18555 22:26:44.077461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18557 22:26:44.124498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18558 22:26:44.124937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18560 22:26:44.163009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18561 22:26:44.163421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18563 22:26:44.201434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18564 22:26:44.201894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18566 22:26:44.243956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18567 22:26:44.244424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18569 22:26:44.283295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18570 22:26:44.283655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18572 22:26:44.324435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18574 22:26:44.324819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18575 22:26:44.364515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18576 22:26:44.364929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18578 22:26:44.408079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18579 22:26:44.408517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18581 22:26:44.459728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18582 22:26:44.460067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18584 22:26:44.504842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18585 22:26:44.505241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18587 22:26:44.543548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18588 22:26:44.543973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18590 22:26:44.593330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18591 22:26:44.593769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18593 22:26:44.647393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18594 22:26:44.647835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18596 22:26:44.700768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18598 22:26:44.701193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18599 22:26:44.747849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18600 22:26:44.748255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18602 22:26:44.785881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18604 22:26:44.786337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18605 22:26:44.832210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18606 22:26:44.832638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18608 22:26:44.885113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18609 22:26:44.885568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18611 22:26:44.938824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18612 22:26:44.939310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18614 22:26:44.983981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18615 22:26:44.984314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18617 22:26:45.022453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18619 22:26:45.022809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18620 22:26:45.070530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18622 22:26:45.070995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18623 22:26:45.109281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18624 22:26:45.109680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18626 22:26:45.152141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18627 22:26:45.152543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18629 22:26:45.198864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18630 22:26:45.199384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18632 22:26:45.236676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18633 22:26:45.237149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18635 22:26:45.278387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18637 22:26:45.279013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18638 22:26:45.327681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18639 22:26:45.328108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18641 22:26:45.376032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18642 22:26:45.376471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18644 22:26:45.420961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18645 22:26:45.421384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18647 22:26:45.459395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18649 22:26:45.459844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18650 22:26:45.498509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18652 22:26:45.498919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18653 22:26:45.539383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18654 22:26:45.540105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18656 22:26:45.587279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18657 22:26:45.587702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18659 22:26:45.635582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18661 22:26:45.636036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18662 22:26:45.685434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18663 22:26:45.685882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18665 22:26:45.731194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18666 22:26:45.731624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18668 22:26:45.774096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18669 22:26:45.774494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18671 22:26:45.821056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18673 22:26:45.821476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18674 22:26:45.864284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18676 22:26:45.865035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18677 22:26:45.909239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18678 22:26:45.909677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18680 22:26:45.967481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18681 22:26:45.967979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18683 22:26:46.022463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18685 22:26:46.022950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18686 22:26:46.080459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18687 22:26:46.080895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18689 22:26:46.137118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18690 22:26:46.137580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18692 22:26:46.194888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18694 22:26:46.195370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18695 22:26:46.250555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18697 22:26:46.251154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18698 22:26:46.307578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18700 22:26:46.307987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18701 22:26:46.352326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18702 22:26:46.352713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18704 22:26:46.395339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18705 22:26:46.395753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18707 22:26:46.437949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18708 22:26:46.438342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18710 22:26:46.482064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18712 22:26:46.482453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18713 22:26:46.534525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18715 22:26:46.535543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18716 22:26:46.587800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18718 22:26:46.588260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18719 22:26:46.637038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18721 22:26:46.637490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18722 22:26:46.696469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18723 22:26:46.696844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18725 22:26:46.756086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18727 22:26:46.756553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18728 22:26:46.801388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18729 22:26:46.801775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18731 22:26:46.855021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18732 22:26:46.855434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18734 22:26:46.913622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18735 22:26:46.914074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18737 22:26:46.968808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18739 22:26:46.969240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18740 22:26:47.017519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18742 22:26:47.017953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18743 22:26:47.064165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18744 22:26:47.064589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18746 22:26:47.103971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18747 22:26:47.104427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18749 22:26:47.151979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18750 22:26:47.152389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18752 22:26:47.195559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18754 22:26:47.195976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18755 22:26:47.242207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18756 22:26:47.242710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18758 22:26:47.288119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18760 22:26:47.288603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18761 22:26:47.329593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18763 22:26:47.330076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18764 22:26:47.372247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18766 22:26:47.372886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18767 22:26:47.415093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18769 22:26:47.415583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18770 22:26:47.454411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18772 22:26:47.454990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18773 22:26:47.499507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18775 22:26:47.499922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18776 22:26:47.545714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18777 22:26:47.546171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18779 22:26:47.591985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18780 22:26:47.592395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18782 22:26:47.631964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18783 22:26:47.632423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18785 22:26:47.677100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18786 22:26:47.677514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18788 22:26:47.724275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18789 22:26:47.724664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18791 22:26:47.772623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18792 22:26:47.773044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18794 22:26:47.811830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18795 22:26:47.812280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18797 22:26:47.853552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18798 22:26:47.853986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18800 22:26:47.898011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18801 22:26:47.898435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18803 22:26:47.940077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18804 22:26:47.940479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18806 22:26:47.981604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18808 22:26:47.982000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18809 22:26:48.034457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18811 22:26:48.034884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18812 22:26:48.079347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18813 22:26:48.079782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18815 22:26:48.123141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18816 22:26:48.123576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18818 22:26:48.172115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18819 22:26:48.172529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18821 22:26:48.212928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18822 22:26:48.213361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18824 22:26:48.249744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18825 22:26:48.250195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18827 22:26:48.299955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18829 22:26:48.300424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18830 22:26:48.339547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
18831 22:26:48.339968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
18833 22:26:48.380197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
18834 22:26:48.380763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
18836 22:26:48.428772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
18837 22:26:48.429194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
18839 22:26:48.476479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
18841 22:26:48.476860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
18842 22:26:48.521586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
18843 22:26:48.522000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
18845 22:26:48.573217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
18846 22:26:48.573632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
18848 22:26:48.620225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
18850 22:26:48.620666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
18851 22:26:48.672060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
18852 22:26:48.672473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
18854 22:26:48.715566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
18855 22:26:48.715991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
18857 22:26:48.760375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
18858 22:26:48.760781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
18860 22:26:48.800967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
18862 22:26:48.801727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
18863 22:26:48.851861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
18864 22:26:48.852288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
18866 22:26:48.896816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
18867 22:26:48.897202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
18869 22:26:48.938394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
18871 22:26:48.938864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
18872 22:26:48.984271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
18873 22:26:48.984685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
18875 22:26:49.034411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
18877 22:26:49.034815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
18878 22:26:49.078339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
18880 22:26:49.078959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
18881 22:26:49.120902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
18882 22:26:49.121298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
18884 22:26:49.161232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
18886 22:26:49.161708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
18887 22:26:49.213834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
18888 22:26:49.214235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
18890 22:26:49.260700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
18891 22:26:49.261212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
18893 22:26:49.308057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
18894 22:26:49.308488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
18896 22:26:49.363206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
18897 22:26:49.363622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
18899 22:26:49.414037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
18900 22:26:49.414457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
18902 22:26:49.456228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
18903 22:26:49.456649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
18905 22:26:49.503446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
18907 22:26:49.503902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
18908 22:26:49.552481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
18910 22:26:49.552936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
18911 22:26:49.596471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
18913 22:26:49.596941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
18914 22:26:49.636944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
18915 22:26:49.637357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
18917 22:26:49.688562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
18919 22:26:49.689271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
18920 22:26:49.732633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
18921 22:26:49.733064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
18923 22:26:49.778941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
18924 22:26:49.779385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
18926 22:26:49.820206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
18927 22:26:49.820721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
18929 22:26:49.864495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
18930 22:26:49.864913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
18932 22:26:49.907706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
18934 22:26:49.908104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
18935 22:26:49.952811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
18937 22:26:49.953272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
18938 22:26:49.990048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
18939 22:26:49.990482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
18941 22:26:50.030455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
18943 22:26:50.031084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
18944 22:26:50.072887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
18946 22:26:50.073336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
18947 22:26:50.116377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
18949 22:26:50.116855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
18950 22:26:50.158431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
18952 22:26:50.158901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
18953 22:26:50.204770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
18954 22:26:50.205193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
18956 22:26:50.251201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
18958 22:26:50.251678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
18959 22:26:50.295551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
18960 22:26:50.295970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
18962 22:26:50.348994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
18963 22:26:50.349420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
18965 22:26:50.395924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
18966 22:26:50.396359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
18968 22:26:50.441991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
18969 22:26:50.442426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
18971 22:26:50.499296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
18972 22:26:50.499756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
18974 22:26:50.544594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
18976 22:26:50.545077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
18977 22:26:50.587805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
18978 22:26:50.588305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
18980 22:26:50.631743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
18981 22:26:50.632201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
18983 22:26:50.676537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
18984 22:26:50.676975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
18986 22:26:50.725071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
18988 22:26:50.725569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
18989 22:26:50.780131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
18990 22:26:50.780547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
18992 22:26:50.825211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
18993 22:26:50.825720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
18995 22:26:50.868118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
18996 22:26:50.868501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
18998 22:26:50.908989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
18999 22:26:50.909414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19001 22:26:50.956053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19002 22:26:50.956431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19004 22:26:51.007628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19005 22:26:51.008139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19007 22:26:51.062544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19009 22:26:51.063048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19010 22:26:51.110906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19011 22:26:51.111285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19013 22:26:51.165568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19015 22:26:51.166029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19016 22:26:51.204127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19017 22:26:51.204579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19019 22:26:51.251057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19020 22:26:51.251452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19022 22:26:51.301141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19024 22:26:51.301613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19025 22:26:51.341048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19026 22:26:51.341525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19028 22:26:51.389628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19030 22:26:51.390131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19031 22:26:51.447350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19033 22:26:51.447808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19034 22:26:51.491506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19036 22:26:51.492277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19037 22:26:51.533922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19038 22:26:51.534358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19040 22:26:51.571329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19041 22:26:51.571840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19043 22:26:51.611892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19044 22:26:51.612390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19046 22:26:51.653276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19047 22:26:51.653777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19049 22:26:51.698566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19051 22:26:51.698956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19052 22:26:51.743310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19053 22:26:51.743677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19055 22:26:51.781931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19056 22:26:51.782405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19058 22:26:51.829131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19059 22:26:51.829583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19061 22:26:51.875227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19063 22:26:51.875697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19064 22:26:51.917131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19065 22:26:51.917583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19067 22:26:51.968986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19068 22:26:51.969412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19070 22:26:52.020110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19071 22:26:52.020525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19073 22:26:52.076674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19074 22:26:52.077100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19076 22:26:52.132748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19077 22:26:52.133153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19079 22:26:52.181830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19080 22:26:52.182293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19082 22:26:52.237326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19083 22:26:52.237735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19085 22:26:52.281497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19086 22:26:52.281926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19088 22:26:52.326513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19090 22:26:52.327238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19091 22:26:52.368528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19092 22:26:52.368973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19094 22:26:52.416755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19095 22:26:52.417157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19097 22:26:52.467743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19098 22:26:52.468199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19100 22:26:52.518008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19102 22:26:52.518544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19103 22:26:52.563049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19105 22:26:52.563666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19106 22:26:52.607797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19107 22:26:52.608188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19109 22:26:52.655825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19110 22:26:52.656244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19112 22:26:52.695847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19113 22:26:52.696347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19115 22:26:52.741091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19117 22:26:52.741546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19118 22:26:52.786506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19120 22:26:52.786985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19121 22:26:52.829187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19122 22:26:52.829590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19124 22:26:52.878865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19125 22:26:52.879320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19127 22:26:52.921323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19128 22:26:52.921678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19130 22:26:52.967435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19132 22:26:52.967903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19133 22:26:53.011561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19134 22:26:53.011959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19136 22:26:53.052446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19138 22:26:53.052928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19139 22:26:53.101838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19140 22:26:53.102277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19142 22:26:53.150566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19144 22:26:53.151318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19145 22:26:53.198277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19147 22:26:53.198849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19148 22:26:53.248677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19149 22:26:53.249123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19151 22:26:53.290523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19153 22:26:53.291002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19154 22:26:53.333971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19156 22:26:53.334452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19157 22:26:53.374502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19159 22:26:53.375025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19160 22:26:53.420235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19162 22:26:53.420653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19163 22:26:53.460878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19164 22:26:53.461325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19166 22:26:53.504473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19168 22:26:53.505225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19169 22:26:53.549478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19170 22:26:53.549924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19172 22:26:53.596543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19174 22:26:53.597005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19175 22:26:53.642931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19177 22:26:53.643420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19178 22:26:53.688693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19179 22:26:53.689145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19181 22:26:53.735698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19183 22:26:53.736128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19184 22:26:53.779465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19185 22:26:53.779931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19187 22:26:53.829718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19189 22:26:53.830196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19190 22:26:53.877076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19191 22:26:53.877504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19193 22:26:53.929335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19194 22:26:53.929748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19196 22:26:53.971277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19197 22:26:53.971736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19199 22:26:54.024319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19200 22:26:54.024766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19202 22:26:54.072083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19204 22:26:54.072547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19205 22:26:54.123929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19206 22:26:54.124326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19208 22:26:54.179538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19210 22:26:54.179918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19211 22:26:54.240379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19212 22:26:54.240789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19214 22:26:54.299848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19216 22:26:54.300313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19217 22:26:54.360614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19218 22:26:54.361043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19220 22:26:54.421825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19222 22:26:54.422313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19223 22:26:54.483258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19224 22:26:54.483711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19226 22:26:54.544809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19227 22:26:54.545223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19229 22:26:54.608136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19230 22:26:54.608566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19232 22:26:54.673257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19233 22:26:54.673686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19235 22:26:54.733720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19236 22:26:54.734177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19238 22:26:54.796390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19240 22:26:54.796864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19241 22:26:54.858422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19243 22:26:54.858900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19244 22:26:54.920774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19245 22:26:54.921218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19247 22:26:54.983428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19248 22:26:54.983863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19250 22:26:55.043794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19251 22:26:55.044228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19253 22:26:55.105267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19254 22:26:55.105707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19256 22:26:55.165948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19257 22:26:55.166388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19259 22:26:55.224643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19260 22:26:55.225148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19262 22:26:55.284947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19263 22:26:55.285468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19265 22:26:55.346360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19267 22:26:55.346785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19268 22:26:55.408459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19269 22:26:55.408873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19271 22:26:55.469559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19272 22:26:55.470004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19274 22:26:55.530424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19276 22:26:55.530893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19277 22:26:55.591999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19279 22:26:55.592419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19280 22:26:55.653892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19281 22:26:55.654314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19283 22:26:55.713494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19284 22:26:55.714058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19286 22:26:55.774412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19288 22:26:55.775027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19289 22:26:55.834062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19291 22:26:55.834627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19292 22:26:55.895946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19294 22:26:55.896518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19295 22:26:55.956290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19296 22:26:55.956735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19298 22:26:56.015857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19300 22:26:56.016330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19301 22:26:56.074443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19303 22:26:56.074890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19304 22:26:56.132830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19306 22:26:56.133491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19307 22:26:56.193179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19308 22:26:56.193568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19310 22:26:56.254931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19311 22:26:56.255463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19313 22:26:56.313723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19314 22:26:56.314182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19316 22:26:56.372700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19317 22:26:56.373156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19319 22:26:56.432439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19320 22:26:56.432862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19322 22:26:56.493292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19324 22:26:56.493927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19325 22:26:56.555695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19326 22:26:56.556120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19328 22:26:56.620072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19330 22:26:56.620503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19331 22:26:56.681620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19333 22:26:56.682112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19334 22:26:56.740557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19335 22:26:56.740964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19337 22:26:56.799542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19338 22:26:56.799939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19340 22:26:56.859551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19341 22:26:56.860084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19343 22:26:56.921076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19344 22:26:56.921615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19346 22:26:57.006571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19348 22:26:57.007047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19349 22:26:57.051825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19350 22:26:57.052252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19352 22:26:57.091918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19354 22:26:57.092306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19355 22:26:57.140524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19356 22:26:57.141106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19358 22:26:57.188588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19359 22:26:57.188994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19361 22:26:57.236081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19362 22:26:57.236522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19364 22:26:57.278163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19366 22:26:57.278654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19367 22:26:57.317395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19369 22:26:57.317883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19370 22:26:57.360562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19371 22:26:57.361013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19373 22:26:57.406074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19374 22:26:57.406517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19376 22:26:57.449536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19377 22:26:57.449977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19379 22:26:57.496393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19380 22:26:57.496809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19382 22:26:57.542246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19383 22:26:57.542716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19385 22:26:57.586498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19387 22:26:57.586960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19388 22:26:57.633706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19389 22:26:57.634113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19391 22:26:57.678544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19393 22:26:57.679166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19394 22:26:57.730591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19396 22:26:57.731043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19397 22:26:57.777820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19399 22:26:57.778294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19400 22:26:57.833445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19401 22:26:57.833868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19403 22:26:57.883838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19404 22:26:57.884228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19406 22:26:57.933776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19408 22:26:57.934178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19409 22:26:57.985890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19410 22:26:57.986308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19412 22:26:58.037245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19413 22:26:58.037768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19415 22:26:58.089636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19416 22:26:58.090064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19418 22:26:58.135060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19419 22:26:58.135470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19421 22:26:58.185622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19422 22:26:58.186120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19424 22:26:58.227130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19425 22:26:58.227558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19427 22:26:58.265442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19428 22:26:58.265874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19430 22:26:58.303583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19432 22:26:58.304057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19433 22:26:58.341882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19434 22:26:58.342345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19436 22:26:58.380701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19438 22:26:58.381170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19439 22:26:58.418328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19441 22:26:58.418801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19442 22:26:58.456552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19443 22:26:58.456971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19445 22:26:58.494342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19447 22:26:58.494775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19448 22:26:58.535798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19450 22:26:58.536253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19451 22:26:58.573106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19452 22:26:58.573663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19454 22:26:58.611779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19456 22:26:58.612256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19457 22:26:58.650146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19459 22:26:58.650619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19460 22:26:58.695848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19462 22:26:58.696311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19463 22:26:58.748155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19465 22:26:58.748630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19466 22:26:58.800296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19468 22:26:58.800925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19469 22:26:58.840467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19470 22:26:58.840856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19472 22:26:58.876403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19473 22:26:58.876819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19475 22:26:58.923897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19476 22:26:58.924328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19478 22:26:58.973808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19479 22:26:58.974316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19481 22:26:59.013087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19483 22:26:59.013498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19484 22:26:59.053661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19485 22:26:59.054091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19487 22:26:59.100839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19488 22:26:59.101275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19490 22:26:59.142295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19492 22:26:59.142692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19493 22:26:59.186452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19495 22:26:59.186896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19496 22:26:59.224649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19498 22:26:59.225099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19499 22:26:59.262511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19501 22:26:59.263256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19502 22:26:59.311813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19503 22:26:59.312192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19505 22:26:59.369012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19506 22:26:59.369488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19508 22:26:59.423135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19510 22:26:59.423807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19511 22:26:59.472158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19512 22:26:59.472583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19514 22:26:59.509574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19516 22:26:59.510005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19517 22:26:59.553583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19518 22:26:59.554014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19520 22:26:59.600147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19521 22:26:59.600635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19523 22:26:59.648126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19524 22:26:59.648648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19526 22:26:59.695269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19527 22:26:59.695770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19529 22:26:59.731200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19530 22:26:59.731650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19532 22:26:59.772902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19533 22:26:59.773443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19535 22:26:59.813061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19536 22:26:59.813623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19538 22:26:59.855378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19539 22:26:59.855773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19541 22:26:59.897317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19542 22:26:59.897747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19544 22:26:59.936268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19545 22:26:59.936665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19547 22:26:59.975213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19548 22:26:59.975713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19550 22:27:00.016095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19551 22:27:00.016523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19553 22:27:00.055866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19554 22:27:00.056300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19556 22:27:00.099243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19557 22:27:00.099680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19559 22:27:00.141202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19561 22:27:00.141672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19562 22:27:00.182973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19563 22:27:00.183381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19565 22:27:00.222971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19567 22:27:00.223673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19568 22:27:00.265405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19569 22:27:00.265853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19571 22:27:00.301348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19573 22:27:00.301812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19574 22:27:00.336566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19575 22:27:00.336968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19577 22:27:00.373251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19578 22:27:00.373680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19580 22:27:00.411693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19582 22:27:00.412128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19583 22:27:00.452951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19584 22:27:00.453343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19586 22:27:00.492172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19587 22:27:00.492538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19589 22:27:00.527841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19591 22:27:00.528253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19592 22:27:00.561660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19593 22:27:00.562116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19595 22:27:00.599820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19596 22:27:00.600245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19598 22:27:00.635434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19600 22:27:00.635891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19601 22:27:00.672078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19603 22:27:00.672529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19604 22:27:00.708283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19606 22:27:00.708761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19607 22:27:00.743510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19608 22:27:00.743935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19610 22:27:00.780530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19611 22:27:00.780946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19613 22:27:00.815928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19614 22:27:00.816341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19616 22:27:00.855231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19617 22:27:00.855699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19619 22:27:00.892659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19620 22:27:00.893113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19622 22:27:00.931518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19624 22:27:00.931970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19625 22:27:00.971867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19627 22:27:00.972356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19628 22:27:01.011475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19630 22:27:01.012198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19631 22:27:01.056874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19632 22:27:01.057328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19634 22:27:01.093697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19635 22:27:01.094117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19637 22:27:01.131345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19638 22:27:01.131734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19640 22:27:01.177227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19642 22:27:01.177700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19643 22:27:01.225216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19644 22:27:01.225657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19646 22:27:01.263170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19647 22:27:01.263561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19649 22:27:01.305514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19650 22:27:01.305933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19652 22:27:01.346032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19653 22:27:01.346563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19655 22:27:01.395750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19656 22:27:01.396173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19658 22:27:01.443814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19659 22:27:01.444254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19661 22:27:01.492030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19662 22:27:01.492451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19664 22:27:01.534087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19665 22:27:01.534515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19667 22:27:01.574230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19669 22:27:01.575054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19670 22:27:01.614495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19672 22:27:01.614973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19673 22:27:01.651977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19674 22:27:01.652393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19676 22:27:01.695605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19678 22:27:01.696075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19679 22:27:01.732955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19680 22:27:01.733328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19682 22:27:01.783600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19684 22:27:01.784168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19685 22:27:01.840055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19686 22:27:01.840459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19688 22:27:01.896613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19689 22:27:01.897020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19691 22:27:01.952612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19692 22:27:01.953118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19694 22:27:02.009204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19695 22:27:02.009612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19697 22:27:02.062495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19699 22:27:02.070472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19700 22:27:02.118301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19702 22:27:02.118769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19703 22:27:02.155719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19704 22:27:02.156132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19706 22:27:02.192968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19708 22:27:02.193424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19709 22:27:02.229299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19710 22:27:02.229685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19712 22:27:02.267691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19713 22:27:02.268142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19715 22:27:02.312987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19716 22:27:02.313362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19718 22:27:02.359773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19719 22:27:02.360294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19721 22:27:02.419788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19722 22:27:02.420197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19724 22:27:02.477170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19726 22:27:02.477617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19727 22:27:02.521748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19728 22:27:02.522134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19730 22:27:02.568537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19731 22:27:02.568941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19733 22:27:02.607739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19734 22:27:02.608155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19736 22:27:02.645206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19738 22:27:02.645681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19739 22:27:02.682413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19741 22:27:02.683091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19742 22:27:02.721238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19744 22:27:02.721866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19745 22:27:02.759687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19747 22:27:02.760363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19748 22:27:02.800529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19749 22:27:02.801072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19751 22:27:02.840126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19752 22:27:02.840552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19754 22:27:02.877684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19755 22:27:02.878090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19757 22:27:02.914015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19759 22:27:02.914485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19760 22:27:02.950424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19762 22:27:02.951011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19763 22:27:03.003252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19764 22:27:03.003675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19766 22:27:03.040977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19767 22:27:03.041391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19769 22:27:03.076478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19770 22:27:03.076915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19772 22:27:03.117256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19773 22:27:03.117683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19775 22:27:03.160396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19776 22:27:03.160794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19778 22:27:03.207900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19779 22:27:03.208336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19781 22:27:03.247056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19782 22:27:03.247463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19784 22:27:03.284164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19785 22:27:03.284544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19787 22:27:03.320496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19789 22:27:03.321171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19790 22:27:03.357422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19791 22:27:03.357860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19793 22:27:03.395567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19795 22:27:03.396022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19796 22:27:03.432816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19797 22:27:03.433263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19799 22:27:03.470316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19801 22:27:03.470778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19802 22:27:03.508823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19803 22:27:03.509241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19805 22:27:03.546385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19807 22:27:03.547007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19808 22:27:03.587892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19809 22:27:03.588291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19811 22:27:03.636596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19812 22:27:03.637029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19814 22:27:03.681690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19816 22:27:03.682152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19817 22:27:03.719904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19818 22:27:03.720351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19820 22:27:03.758360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19822 22:27:03.758832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19823 22:27:03.796993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19824 22:27:03.797410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19826 22:27:03.839646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19827 22:27:03.840084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19829 22:27:03.887207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19830 22:27:03.887633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
19832 22:27:03.934020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
19834 22:27:03.934501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
19835 22:27:03.983545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
19836 22:27:03.983972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
19838 22:27:04.043263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
19839 22:27:04.043684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
19841 22:27:04.089706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
19843 22:27:04.090146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
19844 22:27:04.134964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
19846 22:27:04.135431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
19847 22:27:04.185540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
19848 22:27:04.185978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
19850 22:27:04.245879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
19851 22:27:04.246321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
19853 22:27:04.299774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
19855 22:27:04.300231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
19856 22:27:04.352182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
19858 22:27:04.352536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
19859 22:27:04.399690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
19860 22:27:04.400060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
19862 22:27:04.443552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
19863 22:27:04.443967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
19865 22:27:04.487617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
19867 22:27:04.488274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
19868 22:27:04.528801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
19870 22:27:04.529247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
19871 22:27:04.569601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
19873 22:27:04.570072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
19874 22:27:04.613942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
19875 22:27:04.614386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
19877 22:27:04.659795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
19879 22:27:04.660253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
19880 22:27:04.700829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
19882 22:27:04.701183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
19883 22:27:04.739194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
19885 22:27:04.739653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
19886 22:27:04.779337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
19887 22:27:04.779782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
19889 22:27:04.817398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
19890 22:27:04.817834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
19892 22:27:04.856824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
19893 22:27:04.857327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
19895 22:27:04.899473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
19897 22:27:04.899958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
19898 22:27:04.937469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
19899 22:27:04.937905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
19901 22:27:04.977875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
19903 22:27:04.978350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
19904 22:27:05.016484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
19906 22:27:05.016875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
19907 22:27:05.053669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
19908 22:27:05.054077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
19910 22:27:05.091001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
19911 22:27:05.091402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
19913 22:27:05.127806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
19914 22:27:05.128180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
19916 22:27:05.167151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
19917 22:27:05.167593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
19919 22:27:05.221211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
19920 22:27:05.221665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
19922 22:27:05.257350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
19923 22:27:05.257827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
19925 22:27:05.293464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
19927 22:27:05.293938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
19928 22:27:05.329753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
19929 22:27:05.330174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
19931 22:27:05.368937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
19932 22:27:05.369352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
19934 22:27:05.409212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
19936 22:27:05.409913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
19937 22:27:05.452611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
19938 22:27:05.453025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
19940 22:27:05.491540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
19942 22:27:05.491995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
19943 22:27:05.529490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
19944 22:27:05.529924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
19946 22:27:05.566005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
19948 22:27:05.566665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
19949 22:27:05.609656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
19950 22:27:05.610104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
19952 22:27:05.648700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
19953 22:27:05.649252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
19955 22:27:05.688227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
19956 22:27:05.688660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
19958 22:27:05.725371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
19959 22:27:05.725796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
19961 22:27:05.761689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
19962 22:27:05.762117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
19964 22:27:05.800472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
19966 22:27:05.800933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
19967 22:27:05.842579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
19969 22:27:05.843051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
19970 22:27:05.880141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
19971 22:27:05.880517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
19973 22:27:05.928896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
19975 22:27:05.929356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
19976 22:27:05.965716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
19977 22:27:05.966198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
19979 22:27:06.008659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
19981 22:27:06.009406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
19982 22:27:06.047144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
19984 22:27:06.047526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
19985 22:27:06.084484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
19986 22:27:06.084898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
19988 22:27:06.123439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
19990 22:27:06.123803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
19991 22:27:06.160221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
19992 22:27:06.160674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
19994 22:27:06.198883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
19995 22:27:06.199316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
19997 22:27:06.236001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
19998 22:27:06.236408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20000 22:27:06.272410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20001 22:27:06.272850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20003 22:27:06.309133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20005 22:27:06.309596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20006 22:27:06.346047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20007 22:27:06.346469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20009 22:27:06.383446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20011 22:27:06.383907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20012 22:27:06.420374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20014 22:27:06.420980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20015 22:27:06.468657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20016 22:27:06.469091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20018 22:27:06.529430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20020 22:27:06.529914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20021 22:27:06.584324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20022 22:27:06.584748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20024 22:27:06.639787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20026 22:27:06.640248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20027 22:27:06.697461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20028 22:27:06.697858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20030 22:27:06.754366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20032 22:27:06.754840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20033 22:27:06.810526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20035 22:27:06.811004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20036 22:27:06.870322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20038 22:27:06.871119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20039 22:27:06.928919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20040 22:27:06.929387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20042 22:27:06.985680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20043 22:27:06.986061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20045 22:27:07.036651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20047 22:27:07.037077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20048 22:27:07.085489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20049 22:27:07.085939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20051 22:27:07.132997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20052 22:27:07.133413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20054 22:27:07.181108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20055 22:27:07.181545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20057 22:27:07.252049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20058 22:27:07.252479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20060 22:27:07.291301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20062 22:27:07.291761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20063 22:27:07.331925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20064 22:27:07.332364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20066 22:27:07.373195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20068 22:27:07.373677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20069 22:27:07.414920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20071 22:27:07.415380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20072 22:27:07.456916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20073 22:27:07.457328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20075 22:27:07.500687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20076 22:27:07.501123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20078 22:27:07.541686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20079 22:27:07.542250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20081 22:27:07.581597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20082 22:27:07.582060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20084 22:27:07.627660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20086 22:27:07.628046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20087 22:27:07.681731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20088 22:27:07.682166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20090 22:27:07.736620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20091 22:27:07.737049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20093 22:27:07.792867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20094 22:27:07.793301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20096 22:27:07.847567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20097 22:27:07.848032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20099 22:27:07.901952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20100 22:27:07.902375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20102 22:27:07.957110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20103 22:27:07.957523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20105 22:27:08.012045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20107 22:27:08.012509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20108 22:27:08.065712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20109 22:27:08.066116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20111 22:27:08.122617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20113 22:27:08.123128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20114 22:27:08.179687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20115 22:27:08.180134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20117 22:27:08.236091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20118 22:27:08.236525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20120 22:27:08.280204 <47>[ 217.630967] systemd-journald[105]: Sent WATCHDOG=1 notification.
20121 22:27:08.300772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20123 22:27:08.301242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20124 22:27:08.356499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20125 22:27:08.356956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20127 22:27:08.412502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20128 22:27:08.412936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20130 22:27:08.467403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20131 22:27:08.467816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20133 22:27:08.512120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20135 22:27:08.512596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20136 22:27:08.560793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20137 22:27:08.561228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20139 22:27:08.603937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20140 22:27:08.604353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20142 22:27:08.640825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20143 22:27:08.641259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20145 22:27:08.676601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20147 22:27:08.677256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20148 22:27:08.712507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20149 22:27:08.713014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20151 22:27:08.749118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20153 22:27:08.749572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20154 22:27:08.786146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20156 22:27:08.786594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20157 22:27:08.828316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20158 22:27:08.828768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20160 22:27:08.881583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20161 22:27:08.882030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20163 22:27:08.933803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20164 22:27:08.934225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20166 22:27:08.987746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20167 22:27:08.988196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20169 22:27:09.034096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20171 22:27:09.034589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20172 22:27:09.084184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20173 22:27:09.084634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20175 22:27:09.129378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20176 22:27:09.129727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20178 22:27:09.173269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20179 22:27:09.173642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20181 22:27:09.222442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20183 22:27:09.222840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20184 22:27:09.263979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20185 22:27:09.264397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20187 22:27:09.304937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20188 22:27:09.305368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20190 22:27:09.355808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20191 22:27:09.356247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20193 22:27:09.404748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20195 22:27:09.405232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20196 22:27:09.455727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20198 22:27:09.456201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20199 22:27:09.503200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20200 22:27:09.503635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20202 22:27:09.552147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20203 22:27:09.552558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20205 22:27:09.593802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20206 22:27:09.594196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20208 22:27:09.643911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20209 22:27:09.644356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20211 22:27:09.683734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20212 22:27:09.684157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20214 22:27:09.723778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20215 22:27:09.724198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20217 22:27:09.771868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20218 22:27:09.772281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20220 22:27:09.816148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20221 22:27:09.816568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20223 22:27:09.861602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20224 22:27:09.862061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20226 22:27:09.901808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20227 22:27:09.902236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20229 22:27:09.945116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20230 22:27:09.945526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20232 22:27:09.992588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20233 22:27:09.993046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20235 22:27:10.039665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20236 22:27:10.040100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20238 22:27:10.079556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20239 22:27:10.080007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20241 22:27:10.124670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20242 22:27:10.125088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20244 22:27:10.164414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20246 22:27:10.164896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20247 22:27:10.210538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20249 22:27:10.211045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20250 22:27:10.254488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20252 22:27:10.254950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20253 22:27:10.296276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20254 22:27:10.296698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20256 22:27:10.339064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20258 22:27:10.339531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20259 22:27:10.376413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20261 22:27:10.376886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20262 22:27:10.417181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20264 22:27:10.417670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20265 22:27:10.461166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20266 22:27:10.461586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20268 22:27:10.509519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20269 22:27:10.509898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20271 22:27:10.561123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20273 22:27:10.561690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20274 22:27:10.610996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20275 22:27:10.611404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20277 22:27:10.655044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20279 22:27:10.655460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20280 22:27:10.701414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20282 22:27:10.701982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20283 22:27:10.751858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20284 22:27:10.752269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20286 22:27:10.797011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20287 22:27:10.797458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20289 22:27:10.845924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20290 22:27:10.846375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20292 22:27:10.889883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20293 22:27:10.890344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20295 22:27:10.936590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20297 22:27:10.937078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20298 22:27:10.988195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20299 22:27:10.988625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20301 22:27:11.035917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20302 22:27:11.036354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20304 22:27:11.083014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20306 22:27:11.083498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20307 22:27:11.135140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20308 22:27:11.135577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20310 22:27:11.191454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20311 22:27:11.191867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20313 22:27:11.241606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20315 22:27:11.242084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20316 22:27:11.281938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20317 22:27:11.282426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20319 22:27:11.323924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20320 22:27:11.324356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20322 22:27:11.363456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20324 22:27:11.363934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20325 22:27:11.405013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20326 22:27:11.405461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20328 22:27:11.449081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20329 22:27:11.449509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20331 22:27:11.504091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20333 22:27:11.504566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20334 22:27:11.546298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20335 22:27:11.546756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20337 22:27:11.593210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20339 22:27:11.593690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20340 22:27:11.639720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20342 22:27:11.640175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20343 22:27:11.684733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20344 22:27:11.685163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20346 22:27:11.736284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20347 22:27:11.736728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20349 22:27:11.787986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20350 22:27:11.788411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20352 22:27:11.826914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20353 22:27:11.827344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20355 22:27:11.881240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20356 22:27:11.882745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20358 22:27:11.921799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20359 22:27:11.922241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20361 22:27:11.965910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20362 22:27:11.966318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20364 22:27:12.024348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20365 22:27:12.024778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20367 22:27:12.087269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20369 22:27:12.087765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20370 22:27:12.143637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20371 22:27:12.143999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20373 22:27:12.201464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20375 22:27:12.202017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20376 22:27:12.261662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20377 22:27:12.262118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20379 22:27:12.340907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20380 22:27:12.341360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20382 22:27:12.404223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20383 22:27:12.404638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20385 22:27:12.463325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20386 22:27:12.463763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20388 22:27:12.521382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20389 22:27:12.521890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20391 22:27:12.577858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20392 22:27:12.578288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20394 22:27:12.632088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20395 22:27:12.632588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20397 22:27:12.687763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20399 22:27:12.688246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20400 22:27:12.742345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20402 22:27:12.742774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20403 22:27:12.796896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20404 22:27:12.797348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20406 22:27:12.852096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20407 22:27:12.852521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20409 22:27:12.906210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20411 22:27:12.906689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20412 22:27:12.960381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20414 22:27:12.960858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20415 22:27:13.013562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20416 22:27:13.014089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20418 22:27:13.064045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20419 22:27:13.064497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20421 22:27:13.109525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20423 22:27:13.110014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20424 22:27:13.156548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20426 22:27:13.156976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20427 22:27:13.208509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20429 22:27:13.208887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20430 22:27:13.256365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20431 22:27:13.256800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20433 22:27:13.295568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20434 22:27:13.296000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20436 22:27:13.333084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20438 22:27:13.333511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20439 22:27:13.377164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20441 22:27:13.377638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20442 22:27:13.437375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20444 22:27:13.437870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20445 22:27:13.494201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20447 22:27:13.494679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20448 22:27:13.548890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20450 22:27:13.549366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20451 22:27:13.601006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20452 22:27:13.601469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20454 22:27:13.647310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20455 22:27:13.647717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20457 22:27:13.689711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20459 22:27:13.690166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20460 22:27:13.735781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20461 22:27:13.736214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20463 22:27:13.781561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20464 22:27:13.782007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20466 22:27:13.832001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20467 22:27:13.832433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20469 22:27:13.878433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20471 22:27:13.878907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20472 22:27:13.920035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20473 22:27:13.920482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20475 22:27:13.960737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20476 22:27:13.961160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20478 22:27:14.019623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20479 22:27:14.020074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20481 22:27:14.063756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20482 22:27:14.064196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20484 22:27:14.108423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20485 22:27:14.108848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20487 22:27:14.154922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20488 22:27:14.155393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20490 22:27:14.212582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20491 22:27:14.213009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20493 22:27:14.269228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20495 22:27:14.269703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20496 22:27:14.322015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20497 22:27:14.322473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20499 22:27:14.362170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20501 22:27:14.362647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20502 22:27:14.408454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20503 22:27:14.408889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20505 22:27:14.457909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20506 22:27:14.458345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20508 22:27:14.501254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20509 22:27:14.501654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20511 22:27:14.548190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20512 22:27:14.548624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20514 22:27:14.604837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20515 22:27:14.605279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20517 22:27:14.666096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20519 22:27:14.666538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20520 22:27:14.725082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20521 22:27:14.725517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20523 22:27:14.785114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20525 22:27:14.785592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20526 22:27:14.844129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20527 22:27:14.844559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20529 22:27:14.901838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20530 22:27:14.902282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20532 22:27:14.956290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20533 22:27:14.956760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20535 22:27:15.000858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20536 22:27:15.001274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20538 22:27:15.061961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20539 22:27:15.062392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20541 22:27:15.119886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20542 22:27:15.120344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20544 22:27:15.168365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20546 22:27:15.168802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20547 22:27:15.214623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20549 22:27:15.215100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20550 22:27:15.258553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20552 22:27:15.259013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20553 22:27:15.300778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20554 22:27:15.301319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20556 22:27:15.347865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20558 22:27:15.348308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20559 22:27:15.397481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20560 22:27:15.397921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20562 22:27:15.448127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20563 22:27:15.448693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20565 22:27:15.499450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20566 22:27:15.499904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20568 22:27:15.542896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20570 22:27:15.543411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20571 22:27:15.582943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20572 22:27:15.583343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20574 22:27:15.627602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20575 22:27:15.628031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20577 22:27:15.671436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20578 22:27:15.671883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20580 22:27:15.710078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20581 22:27:15.710505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20583 22:27:15.752205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20584 22:27:15.752592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20586 22:27:15.791996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20588 22:27:15.792483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20589 22:27:15.832853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20591 22:27:15.833333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20592 22:27:15.877962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20593 22:27:15.878410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20595 22:27:15.922839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20596 22:27:15.923256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20598 22:27:15.971253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20599 22:27:15.971655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20601 22:27:16.017218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20602 22:27:16.017666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20604 22:27:16.061279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20605 22:27:16.061700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20607 22:27:16.112129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20608 22:27:16.112582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20610 22:27:16.160733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20611 22:27:16.161163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20613 22:27:16.211333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20614 22:27:16.211791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20616 22:27:16.250044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20617 22:27:16.250496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20619 22:27:16.293363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20621 22:27:16.293853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20622 22:27:16.345883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20623 22:27:16.346351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20625 22:27:16.398017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20626 22:27:16.398477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20628 22:27:16.448924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20630 22:27:16.449372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20631 22:27:16.493051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20632 22:27:16.493538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20634 22:27:16.542175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20636 22:27:16.542668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20637 22:27:16.594000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20638 22:27:16.594426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20640 22:27:16.637715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20642 22:27:16.638177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20643 22:27:16.686026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20645 22:27:16.686920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20646 22:27:16.743520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20647 22:27:16.744092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20649 22:27:16.799860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20650 22:27:16.800270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20652 22:27:16.857592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20653 22:27:16.858099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20655 22:27:16.915273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20657 22:27:16.915742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20658 22:27:16.971021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20659 22:27:16.971516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20661 22:27:17.017509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20662 22:27:17.017928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20664 22:27:17.064622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20665 22:27:17.065019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20667 22:27:17.109778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20668 22:27:17.110223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20670 22:27:17.157472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20672 22:27:17.157965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20673 22:27:17.212189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20674 22:27:17.212655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20676 22:27:17.261798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20677 22:27:17.262248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20679 22:27:17.315192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20681 22:27:17.315646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20682 22:27:17.368817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20683 22:27:17.369271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20685 22:27:17.413674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20686 22:27:17.414246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20688 22:27:17.481223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20689 22:27:17.481674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20691 22:27:17.530331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20693 22:27:17.530779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20694 22:27:17.580163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20695 22:27:17.580601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20697 22:27:17.625522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20698 22:27:17.626018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20700 22:27:17.683383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20701 22:27:17.683827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20703 22:27:17.729467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20704 22:27:17.729921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20706 22:27:17.780653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20707 22:27:17.781077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20709 22:27:17.827802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20711 22:27:17.828225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20712 22:27:17.871309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20713 22:27:17.871726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20715 22:27:17.915617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20716 22:27:17.916010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20718 22:27:17.959694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20719 22:27:17.960116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20721 22:27:18.004085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20722 22:27:18.004526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20724 22:27:18.058974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20725 22:27:18.059371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20727 22:27:18.107982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20728 22:27:18.108410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20730 22:27:18.156861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20732 22:27:18.157295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20733 22:27:18.210450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20735 22:27:18.211637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20736 22:27:18.271126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20737 22:27:18.271507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20739 22:27:18.327493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20741 22:27:18.327884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20742 22:27:18.386067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20743 22:27:18.386603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20745 22:27:18.429718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20747 22:27:18.430189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20748 22:27:18.467042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20750 22:27:18.467442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20751 22:27:18.505634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20752 22:27:18.506052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20754 22:27:18.544190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20755 22:27:18.544612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20757 22:27:18.582740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20758 22:27:18.583160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20760 22:27:18.623699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20761 22:27:18.624091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20763 22:27:18.669523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20764 22:27:18.669936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20766 22:27:18.717137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20767 22:27:18.717541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20769 22:27:18.764487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20770 22:27:18.764924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20772 22:27:18.808459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20773 22:27:18.808854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20775 22:27:18.852403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20777 22:27:18.852876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20778 22:27:18.904552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20779 22:27:18.904988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20781 22:27:18.941427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20783 22:27:18.941856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20784 22:27:18.983590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20785 22:27:18.984019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20787 22:27:19.027884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20788 22:27:19.028309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20790 22:27:19.073334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20791 22:27:19.073766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20793 22:27:19.123664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20794 22:27:19.124108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20796 22:27:19.169490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20797 22:27:19.169909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20799 22:27:19.215869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20800 22:27:19.216354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20802 22:27:19.261453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20803 22:27:19.261941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20805 22:27:19.309108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20806 22:27:19.309569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20808 22:27:19.356455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20809 22:27:19.356852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20811 22:27:19.392375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20813 22:27:19.393235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20814 22:27:19.428873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20815 22:27:19.429348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20817 22:27:19.466881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20818 22:27:19.467444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20820 22:27:19.507193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20822 22:27:19.507769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20823 22:27:19.544228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20825 22:27:19.544695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20826 22:27:19.585200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20827 22:27:19.585591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20829 22:27:19.624389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
20830 22:27:19.624790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20832 22:27:19.672356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
20833 22:27:19.672778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
20835 22:27:19.717265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
20837 22:27:19.717731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
20838 22:27:19.753803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
20839 22:27:19.754177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
20841 22:27:19.791080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
20842 22:27:19.791532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
20844 22:27:19.830464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
20846 22:27:19.830909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
20847 22:27:19.868062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
20848 22:27:19.868470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
20850 22:27:19.907884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
20851 22:27:19.908314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
20853 22:27:19.952276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
20854 22:27:19.952744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
20856 22:27:20.001701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
20857 22:27:20.002145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
20859 22:27:20.043464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
20860 22:27:20.043864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
20862 22:27:20.080372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
20863 22:27:20.080807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
20865 22:27:20.121374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
20866 22:27:20.121784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
20868 22:27:20.160382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
20870 22:27:20.160761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
20871 22:27:20.200425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
20872 22:27:20.200840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
20874 22:27:20.235872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
20876 22:27:20.236292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
20877 22:27:20.272993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
20879 22:27:20.273449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
20880 22:27:20.315633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
20881 22:27:20.316055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
20883 22:27:20.355311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
20885 22:27:20.355736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
20886 22:27:20.392818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
20888 22:27:20.393285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
20889 22:27:20.429899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
20890 22:27:20.430330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
20892 22:27:20.468459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
20894 22:27:20.468928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
20895 22:27:20.509706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
20896 22:27:20.510135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
20898 22:27:20.548660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
20900 22:27:20.549089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
20901 22:27:20.586772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
20903 22:27:20.587293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
20904 22:27:20.636806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
20905 22:27:20.637230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
20907 22:27:20.683813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
20908 22:27:20.684223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
20910 22:27:20.729240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
20911 22:27:20.729640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
20913 22:27:20.774502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
20915 22:27:20.774963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
20916 22:27:20.811943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
20917 22:27:20.812355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
20919 22:27:20.855290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
20920 22:27:20.855795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
20922 22:27:20.894195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
20924 22:27:20.894935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
20925 22:27:20.941050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
20926 22:27:20.941432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
20928 22:27:20.985434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
20929 22:27:20.985843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
20931 22:27:21.025906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
20933 22:27:21.026266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
20934 22:27:21.081781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
20935 22:27:21.082237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
20937 22:27:21.131983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
20939 22:27:21.132400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
20940 22:27:21.171391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
20941 22:27:21.171814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
20943 22:27:21.215745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
20944 22:27:21.216193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
20946 22:27:21.261214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
20947 22:27:21.261616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
20949 22:27:21.311824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
20951 22:27:21.312222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
20952 22:27:21.348926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
20953 22:27:21.349349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
20955 22:27:21.395764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
20956 22:27:21.396185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
20958 22:27:21.438346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
20959 22:27:21.438767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
20961 22:27:21.474862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
20963 22:27:21.475317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
20964 22:27:21.520877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
20965 22:27:21.521272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
20967 22:27:21.575925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
20968 22:27:21.576344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
20970 22:27:21.632880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
20971 22:27:21.633344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
20973 22:27:21.677679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
20974 22:27:21.678143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
20976 22:27:21.726363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
20978 22:27:21.726786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
20979 22:27:21.763231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
20981 22:27:21.763933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
20982 22:27:21.799711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
20983 22:27:21.800089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
20985 22:27:21.834951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
20986 22:27:21.835378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
20988 22:27:21.872521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
20989 22:27:21.872903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
20991 22:27:21.922412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
20993 22:27:21.922825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
20994 22:27:21.963782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
20995 22:27:21.964178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
20997 22:27:22.003323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
20999 22:27:22.003779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21000 22:27:22.051988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21001 22:27:22.052391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21003 22:27:22.099186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21005 22:27:22.099823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21006 22:27:22.148151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21007 22:27:22.148530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21009 22:27:22.201456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21010 22:27:22.201911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21012 22:27:22.241027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21013 22:27:22.241475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21015 22:27:22.281497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21016 22:27:22.281915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21018 22:27:22.326562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21020 22:27:22.329844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21021 22:27:22.368694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21022 22:27:22.369102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21024 22:27:22.409216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21026 22:27:22.409918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21027 22:27:22.452555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21029 22:27:22.453050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21030 22:27:22.493179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21031 22:27:22.493590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21033 22:27:22.536815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21034 22:27:22.537386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21036 22:27:22.605383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21037 22:27:22.605801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21039 22:27:22.647035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21040 22:27:22.647464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21042 22:27:22.683917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21043 22:27:22.684355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21045 22:27:22.720759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21047 22:27:22.721205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21048 22:27:22.757185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21050 22:27:22.757860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21051 22:27:22.794907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21053 22:27:22.795364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21054 22:27:22.837573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21055 22:27:22.837979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21057 22:27:22.876681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21058 22:27:22.877129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21060 22:27:22.915841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21061 22:27:22.916256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21063 22:27:22.958477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21065 22:27:22.958895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21066 22:27:23.011116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21067 22:27:23.011500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21069 22:27:23.067300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21070 22:27:23.067718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21072 22:27:23.122085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21074 22:27:23.122711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21075 22:27:23.173700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21076 22:27:23.174151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21078 22:27:23.223614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21080 22:27:23.224088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21081 22:27:23.284123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21082 22:27:23.284934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21084 22:27:23.334334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21086 22:27:23.334799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21087 22:27:23.376983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21088 22:27:23.377406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21090 22:27:23.420171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21091 22:27:23.420595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21093 22:27:23.459478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21095 22:27:23.459946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21096 22:27:23.507379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21097 22:27:23.507803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21099 22:27:23.549596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21100 22:27:23.550038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21102 22:27:23.591264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21104 22:27:23.591679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21105 22:27:23.638942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21106 22:27:23.639530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21108 22:27:23.676997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21109 22:27:23.677417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21111 22:27:23.718514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21113 22:27:23.719055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21114 22:27:23.761686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21115 22:27:23.762096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21117 22:27:23.805191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21118 22:27:23.805697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21120 22:27:23.849242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21121 22:27:23.849629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21123 22:27:23.892412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21124 22:27:23.892874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21126 22:27:23.936661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21127 22:27:23.937166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21129 22:27:23.981524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21131 22:27:23.982275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21132 22:27:24.019825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21133 22:27:24.020258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21135 22:27:24.056186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21136 22:27:24.056562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21138 22:27:24.108677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21139 22:27:24.109106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21141 22:27:24.147308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21143 22:27:24.147782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21144 22:27:24.197102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21146 22:27:24.197580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21147 22:27:24.236414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21148 22:27:24.236836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21150 22:27:24.279917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21151 22:27:24.280343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21153 22:27:24.326731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21154 22:27:24.327148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21156 22:27:24.373943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21157 22:27:24.374357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21159 22:27:24.424620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21160 22:27:24.425159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21162 22:27:24.472427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21163 22:27:24.472812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21165 22:27:24.509076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21167 22:27:24.509503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21168 22:27:24.544723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21170 22:27:24.545398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21171 22:27:24.579334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21172 22:27:24.579781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21174 22:27:24.614782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21176 22:27:24.615342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21177 22:27:24.649237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21178 22:27:24.649674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21180 22:27:24.692864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21181 22:27:24.693261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21183 22:27:24.729060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21185 22:27:24.729833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21186 22:27:24.764424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21187 22:27:24.764842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21189 22:27:24.800095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21191 22:27:24.800552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21192 22:27:24.844655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21193 22:27:24.845147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21195 22:27:24.881986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21196 22:27:24.882416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21198 22:27:24.924595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21199 22:27:24.924997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21201 22:27:24.965356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21203 22:27:24.965805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21204 22:27:25.019770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21206 22:27:25.020229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21207 22:27:25.074235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21208 22:27:25.074656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21210 22:27:25.127639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21211 22:27:25.128113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21213 22:27:25.181414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21214 22:27:25.181812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21216 22:27:25.236000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21218 22:27:25.236394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21219 22:27:25.292131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21221 22:27:25.292876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21222 22:27:25.339346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21224 22:27:25.339826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21225 22:27:25.375976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21227 22:27:25.376396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21228 22:27:25.412356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21229 22:27:25.412707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21231 22:27:25.450953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21232 22:27:25.451364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21234 22:27:25.493374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21235 22:27:25.493756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21237 22:27:25.540204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21238 22:27:25.540625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21240 22:27:25.578946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21241 22:27:25.579451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21243 22:27:25.629936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21244 22:27:25.630391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21246 22:27:25.687404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21247 22:27:25.687831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21249 22:27:25.734354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21251 22:27:25.734975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21252 22:27:25.776392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21253 22:27:25.776799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21255 22:27:25.819543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21256 22:27:25.820105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21258 22:27:25.864035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21259 22:27:25.864594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21261 22:27:25.910346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21263 22:27:25.910767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21264 22:27:25.959113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21266 22:27:25.959572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21267 22:27:26.007966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21269 22:27:26.008488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21270 22:27:26.048244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21271 22:27:26.048676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21273 22:27:26.092044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21274 22:27:26.092474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21276 22:27:26.140263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21277 22:27:26.140703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21279 22:27:26.181748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21280 22:27:26.182200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21282 22:27:26.219798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21283 22:27:26.220152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21285 22:27:26.256175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21286 22:27:26.256601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21288 22:27:26.301348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21290 22:27:26.301814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21291 22:27:26.344381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21292 22:27:26.344823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21294 22:27:26.396908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21295 22:27:26.397344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21297 22:27:26.451376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21298 22:27:26.451886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21300 22:27:26.507005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21301 22:27:26.507397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21303 22:27:26.557943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21305 22:27:26.558577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21306 22:27:26.603501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21307 22:27:26.603927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21309 22:27:26.653778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21310 22:27:26.654209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21312 22:27:26.691685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21314 22:27:26.692127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21315 22:27:26.735462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21316 22:27:26.735870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21318 22:27:26.775457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21319 22:27:26.775837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21321 22:27:26.811225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21323 22:27:26.811804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21324 22:27:26.859740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21325 22:27:26.860145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21327 22:27:26.909142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21328 22:27:26.909527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21330 22:27:26.961433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21331 22:27:26.961832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21333 22:27:27.011906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21335 22:27:27.012338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21336 22:27:27.063992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21337 22:27:27.064390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21339 22:27:27.117080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21340 22:27:27.117467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21342 22:27:27.171940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21344 22:27:27.172317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21345 22:27:27.229986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21346 22:27:27.230422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21348 22:27:27.288584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21350 22:27:27.289046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21351 22:27:27.329568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21352 22:27:27.329978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21354 22:27:27.365361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21356 22:27:27.365807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21357 22:27:27.401567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21359 22:27:27.402051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21360 22:27:27.440589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21361 22:27:27.441018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21363 22:27:27.480508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21364 22:27:27.480979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21366 22:27:27.521878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21367 22:27:27.522305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21369 22:27:27.563922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21370 22:27:27.564360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21372 22:27:27.600699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21374 22:27:27.601363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21375 22:27:27.641786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21376 22:27:27.642246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21378 22:27:27.701165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21380 22:27:27.701639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21381 22:27:27.743720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21382 22:27:27.744168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21384 22:27:27.784588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21386 22:27:27.785018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21387 22:27:27.820404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21388 22:27:27.820780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21390 22:27:27.858103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21391 22:27:27.858501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21393 22:27:27.904896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21394 22:27:27.905291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21396 22:27:27.949619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21398 22:27:27.950068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21399 22:27:27.990395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21401 22:27:27.990781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21402 22:27:28.039412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21403 22:27:28.039974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21405 22:27:28.085751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21406 22:27:28.086338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21408 22:27:28.127864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21409 22:27:28.128364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21411 22:27:28.171096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21413 22:27:28.171538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21414 22:27:28.212190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21415 22:27:28.212604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21417 22:27:28.256285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21419 22:27:28.256718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21420 22:27:28.304367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21422 22:27:28.305064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21423 22:27:28.351625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21424 22:27:28.352014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21426 22:27:28.397436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21427 22:27:28.397890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21429 22:27:28.437952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21430 22:27:28.438402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21432 22:27:28.476455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21433 22:27:28.476885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21435 22:27:28.513887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21436 22:27:28.514352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21438 22:27:28.557432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21439 22:27:28.557914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21441 22:27:28.598023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21442 22:27:28.598396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21444 22:27:28.647803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21445 22:27:28.648218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21447 22:27:28.691505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21448 22:27:28.691877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21450 22:27:28.729810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21451 22:27:28.730238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21453 22:27:28.772388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21454 22:27:28.772863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21456 22:27:28.809684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21457 22:27:28.810116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21459 22:27:28.865458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21460 22:27:28.865883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21462 22:27:28.921121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21463 22:27:28.921536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21465 22:27:28.977221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21467 22:27:28.977598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21468 22:27:29.034013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21469 22:27:29.034454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21471 22:27:29.088682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21472 22:27:29.089116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21474 22:27:29.128953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21475 22:27:29.129410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21477 22:27:29.175564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21478 22:27:29.175986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21480 22:27:29.221052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21481 22:27:29.221476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21483 22:27:29.261483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21484 22:27:29.261923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21486 22:27:29.307906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21488 22:27:29.308292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21489 22:27:29.348626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21491 22:27:29.349103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21492 22:27:29.388045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21493 22:27:29.388505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21495 22:27:29.430523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21497 22:27:29.430986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21498 22:27:29.486183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21500 22:27:29.486643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21501 22:27:29.529137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21502 22:27:29.529522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21504 22:27:29.567271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21505 22:27:29.567659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21507 22:27:29.607412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21508 22:27:29.607964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21510 22:27:29.648820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21512 22:27:29.649300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21513 22:27:29.704386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21515 22:27:29.704850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21516 22:27:29.755684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21517 22:27:29.756128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21519 22:27:29.813967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21520 22:27:29.814394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21522 22:27:29.873338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21523 22:27:29.873688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21525 22:27:29.919962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21526 22:27:29.920361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21528 22:27:29.962997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21529 22:27:29.963412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21531 22:27:30.004260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21533 22:27:30.004704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21534 22:27:30.044802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21535 22:27:30.045203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21537 22:27:30.085110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21538 22:27:30.085541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21540 22:27:30.123673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21541 22:27:30.124058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21543 22:27:30.164234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21544 22:27:30.164802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21546 22:27:30.208286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21547 22:27:30.208790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21549 22:27:30.249931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21550 22:27:30.250311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21552 22:27:30.298094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21553 22:27:30.298513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21555 22:27:30.335415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21556 22:27:30.335799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21558 22:27:30.373067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21559 22:27:30.373457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21561 22:27:30.409413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21562 22:27:30.409818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21564 22:27:30.449312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21565 22:27:30.449690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21567 22:27:30.496986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21568 22:27:30.497410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21570 22:27:30.547100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21571 22:27:30.547528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21573 22:27:30.590374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21575 22:27:30.591028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21576 22:27:30.633778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21578 22:27:30.634276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21579 22:27:30.682431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21581 22:27:30.682908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21582 22:27:30.727905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21583 22:27:30.728337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21585 22:27:30.774003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21586 22:27:30.774437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21588 22:27:30.818420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21590 22:27:30.818906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21591 22:27:30.871055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21592 22:27:30.871499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21594 22:27:30.920108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21595 22:27:30.920539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21597 22:27:30.956487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21598 22:27:30.956908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21600 22:27:31.002294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21602 22:27:31.002701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21603 22:27:31.058045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21604 22:27:31.058459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21606 22:27:31.114107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21607 22:27:31.114588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21609 22:27:31.169047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21610 22:27:31.169497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21612 22:27:31.218523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21614 22:27:31.219171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21615 22:27:31.268608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21617 22:27:31.269090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21618 22:27:31.311977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21619 22:27:31.312421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21621 22:27:31.352664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21622 22:27:31.353155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21624 22:27:31.402073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21625 22:27:31.402509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21627 22:27:31.440972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21628 22:27:31.441398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21630 22:27:31.481029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21631 22:27:31.481456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21633 22:27:31.520756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21634 22:27:31.521306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21636 22:27:31.565418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21637 22:27:31.565867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21639 22:27:31.607416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21640 22:27:31.607808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21642 22:27:31.647993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21643 22:27:31.648389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21645 22:27:31.688616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21646 22:27:31.689017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21648 22:27:31.736625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21649 22:27:31.737049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21651 22:27:31.784471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21652 22:27:31.784891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21654 22:27:31.831589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21655 22:27:31.832038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21657 22:27:31.879818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21658 22:27:31.880272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21660 22:27:31.923936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21661 22:27:31.924328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21663 22:27:31.965255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21664 22:27:31.965667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21666 22:27:32.010041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21667 22:27:32.010527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21669 22:27:32.053991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21671 22:27:32.054476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21672 22:27:32.095391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21674 22:27:32.095841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21675 22:27:32.137859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21676 22:27:32.138295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21678 22:27:32.195900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21679 22:27:32.196295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21681 22:27:32.244786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21682 22:27:32.245229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21684 22:27:32.292489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21686 22:27:32.293867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21687 22:27:32.345163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21688 22:27:32.345604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21690 22:27:32.395824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21691 22:27:32.396244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21693 22:27:32.445606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21694 22:27:32.446001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21696 22:27:32.493511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21698 22:27:32.493995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21699 22:27:32.541466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21700 22:27:32.541877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21702 22:27:32.597335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21703 22:27:32.597744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21705 22:27:32.659670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21706 22:27:32.660119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21708 22:27:32.720223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21709 22:27:32.720694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21711 22:27:32.768666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21713 22:27:32.769151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21714 22:27:32.839641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21715 22:27:32.840075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21717 22:27:32.891751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21719 22:27:32.892217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21720 22:27:32.936107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21722 22:27:32.936588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21723 22:27:32.976747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21724 22:27:32.977184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21726 22:27:33.028399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21727 22:27:33.028772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21729 22:27:33.075521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21730 22:27:33.075948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21732 22:27:33.111565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21733 22:27:33.112039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21735 22:27:33.159371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21736 22:27:33.159801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21738 22:27:33.208205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21739 22:27:33.208721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21741 22:27:33.251882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21743 22:27:33.252359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21744 22:27:33.302418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21746 22:27:33.303149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21747 22:27:33.352926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21748 22:27:33.353352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21750 22:27:33.389107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21751 22:27:33.389493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21753 22:27:33.427835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21754 22:27:33.428257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21756 22:27:33.471499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21757 22:27:33.471939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21759 22:27:33.524236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21760 22:27:33.524628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21762 22:27:33.572506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21763 22:27:33.572848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21765 22:27:33.615887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21766 22:27:33.616304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21768 22:27:33.652934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21769 22:27:33.653350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21771 22:27:33.697713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21772 22:27:33.698168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21774 22:27:33.741257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21776 22:27:33.741744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21777 22:27:33.779688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21778 22:27:33.780135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21780 22:27:33.820129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21782 22:27:33.820603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21783 22:27:33.863213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21784 22:27:33.863606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21786 22:27:33.905893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21787 22:27:33.906337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21789 22:27:33.955011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21790 22:27:33.955470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21792 22:27:33.999307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21793 22:27:33.999745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21795 22:27:34.039673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21796 22:27:34.040116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21798 22:27:34.083431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21799 22:27:34.083861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21801 22:27:34.124757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21802 22:27:34.125190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21804 22:27:34.170387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21806 22:27:34.170872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21807 22:27:34.221576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21808 22:27:34.222024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21810 22:27:34.270396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21812 22:27:34.270869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21813 22:27:34.317544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21814 22:27:34.317985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21816 22:27:34.359935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21817 22:27:34.360353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21819 22:27:34.396770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21820 22:27:34.397186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21822 22:27:34.438900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21823 22:27:34.439285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21825 22:27:34.487599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21826 22:27:34.488056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21828 22:27:34.524756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21829 22:27:34.525224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21831 22:27:34.567052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
21832 22:27:34.567469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
21834 22:27:34.602244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
21836 22:27:34.602712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
21837 22:27:34.639766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
21839 22:27:34.640187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
21840 22:27:34.678399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
21842 22:27:34.678816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
21843 22:27:34.713569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
21844 22:27:34.714070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
21846 22:27:34.748853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
21847 22:27:34.749278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
21849 22:27:34.784674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
21850 22:27:34.785165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
21852 22:27:34.832282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
21853 22:27:34.832820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
21855 22:27:34.876891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
21856 22:27:34.877377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
21858 22:27:34.915865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
21860 22:27:34.916620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
21861 22:27:34.963046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
21862 22:27:34.963462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
21864 22:27:35.004209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
21865 22:27:35.004633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
21867 22:27:35.045850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
21869 22:27:35.046612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
21870 22:27:35.088374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
21871 22:27:35.088768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
21873 22:27:35.128735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
21874 22:27:35.129173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
21876 22:27:35.169856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
21877 22:27:35.170297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
21879 22:27:35.221718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
21880 22:27:35.222135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
21882 22:27:35.273191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
21883 22:27:35.273573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
21885 22:27:35.316534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
21886 22:27:35.316915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
21888 22:27:35.352403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
21889 22:27:35.352843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
21891 22:27:35.409121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
21892 22:27:35.409596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
21894 22:27:35.459869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
21896 22:27:35.460295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
21897 22:27:35.499734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
21898 22:27:35.500138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
21900 22:27:35.535763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
21901 22:27:35.536184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
21903 22:27:35.571672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
21904 22:27:35.572083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
21906 22:27:35.612049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
21907 22:27:35.612448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
21909 22:27:35.649777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
21910 22:27:35.650216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
21912 22:27:35.691822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
21913 22:27:35.692245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
21915 22:27:35.727991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
21917 22:27:35.728404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
21918 22:27:35.767200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
21919 22:27:35.767656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
21921 22:27:35.808382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
21922 22:27:35.808804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
21924 22:27:35.845423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
21925 22:27:35.845864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
21927 22:27:35.885038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
21928 22:27:35.885446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
21930 22:27:35.921561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
21931 22:27:35.921989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
21933 22:27:35.957322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
21935 22:27:35.957785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
21936 22:27:35.992186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
21937 22:27:35.992602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
21939 22:27:36.027659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
21940 22:27:36.028077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
21942 22:27:36.063173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
21943 22:27:36.063589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
21945 22:27:36.104671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
21947 22:27:36.105100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
21948 22:27:36.148289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
21950 22:27:36.148870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
21951 22:27:36.190921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
21952 22:27:36.191345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
21954 22:27:36.240641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
21955 22:27:36.241058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
21957 22:27:36.283807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
21958 22:27:36.284357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
21960 22:27:36.330578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
21962 22:27:36.331040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
21963 22:27:36.369894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
21965 22:27:36.370544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
21966 22:27:36.408473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
21967 22:27:36.408979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
21969 22:27:36.446981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
21971 22:27:36.447459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
21972 22:27:36.480866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
21973 22:27:36.481404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
21975 22:27:36.518145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
21976 22:27:36.518625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
21978 22:27:36.565675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
21979 22:27:36.566131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
21981 22:27:36.605781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
21983 22:27:36.606296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
21984 22:27:36.650508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
21986 22:27:36.650933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
21987 22:27:36.711047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
21988 22:27:36.711451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
21990 22:27:36.760042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
21991 22:27:36.760422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
21993 22:27:36.795606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
21994 22:27:36.796056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
21996 22:27:36.837076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
21998 22:27:36.837535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
21999 22:27:36.878183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22000 22:27:36.878646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22002 22:27:36.915609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22003 22:27:36.916038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22005 22:27:36.951058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22007 22:27:36.951537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22008 22:27:36.986563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22009 22:27:36.987024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22011 22:27:37.023020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22012 22:27:37.023454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22014 22:27:37.060243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22015 22:27:37.060619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22017 22:27:37.097269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22018 22:27:37.097686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22020 22:27:37.132940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22021 22:27:37.133331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22023 22:27:37.178338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22025 22:27:37.178782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22026 22:27:37.218080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22027 22:27:37.218509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22029 22:27:37.256419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22030 22:27:37.256951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22032 22:27:37.298244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22033 22:27:37.298675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22035 22:27:37.343183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22036 22:27:37.343558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22038 22:27:37.379809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22039 22:27:37.380232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22041 22:27:37.415709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22043 22:27:37.416171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22044 22:27:37.451606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22045 22:27:37.452002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22047 22:27:37.490047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22048 22:27:37.490612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22050 22:27:37.531127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22052 22:27:37.531540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22053 22:27:37.583716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22054 22:27:37.584099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22056 22:27:37.624669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22057 22:27:37.625047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22059 22:27:37.671872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22061 22:27:37.672356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22062 22:27:37.717927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22063 22:27:37.718416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22065 22:27:37.764029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22066 22:27:37.764522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22068 22:27:37.807842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22070 22:27:37.808445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22071 22:27:37.855962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22072 22:27:37.856541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22074 22:27:37.900077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22075 22:27:37.900526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22077 22:27:37.961716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22079 22:27:37.962193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22080 22:27:38.007586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22081 22:27:38.007977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22083 22:27:38.051798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22084 22:27:38.052315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22086 22:27:38.093923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22087 22:27:38.094332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22089 22:27:38.131013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22090 22:27:38.131436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22092 22:27:38.167358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22093 22:27:38.167811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22095 22:27:38.204276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22097 22:27:38.204713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22098 22:27:38.239379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22099 22:27:38.239952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22101 22:27:38.292603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22102 22:27:38.293042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22104 22:27:38.346213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22105 22:27:38.346682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22107 22:27:38.399704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22108 22:27:38.400111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22110 22:27:38.441922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22111 22:27:38.442363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22113 22:27:38.477118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22114 22:27:38.477500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22116 22:27:38.520541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22117 22:27:38.520989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22119 22:27:38.555535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22120 22:27:38.555916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22122 22:27:38.592528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22123 22:27:38.592904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22125 22:27:38.629033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22126 22:27:38.629538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22128 22:27:38.672967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22129 22:27:38.673394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22131 22:27:38.716120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22132 22:27:38.716511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22134 22:27:38.755795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22135 22:27:38.756207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22137 22:27:38.791000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22138 22:27:38.791430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22140 22:27:38.826655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22142 22:27:38.827467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22143 22:27:38.867938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22145 22:27:38.868400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22146 22:27:38.904532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22147 22:27:38.904946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22149 22:27:38.941782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22150 22:27:38.942210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22152 22:27:38.981425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22153 22:27:38.981814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22155 22:27:39.024497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22157 22:27:39.024888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22158 22:27:39.059423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22159 22:27:39.059781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22161 22:27:39.094736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22162 22:27:39.095121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22164 22:27:39.133684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22166 22:27:39.134111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22167 22:27:39.170019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22168 22:27:39.170556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22170 22:27:39.214127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22171 22:27:39.214673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22173 22:27:39.253206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22174 22:27:39.253761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22176 22:27:39.288899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22177 22:27:39.289374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22179 22:27:39.327752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22180 22:27:39.328253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22182 22:27:39.367712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22183 22:27:39.368149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22185 22:27:39.407693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22186 22:27:39.408137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22188 22:27:39.443206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22189 22:27:39.443625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22191 22:27:39.479240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22193 22:27:39.479829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22194 22:27:39.515238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22195 22:27:39.515719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22197 22:27:39.553602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22199 22:27:39.554075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22200 22:27:39.589790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22201 22:27:39.590293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22203 22:27:39.623378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22204 22:27:39.623799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22206 22:27:39.659786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22207 22:27:39.660158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22209 22:27:39.699339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22210 22:27:39.699731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22212 22:27:39.736126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22213 22:27:39.736608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22215 22:27:39.779524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22216 22:27:39.779991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22218 22:27:39.816564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22219 22:27:39.817016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22221 22:27:39.861729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22222 22:27:39.862201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22224 22:27:39.908472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22225 22:27:39.908865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22227 22:27:39.956327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22228 22:27:39.956779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22230 22:27:40.005294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22231 22:27:40.005660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22233 22:27:40.053203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22234 22:27:40.053751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22236 22:27:40.101052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22237 22:27:40.101496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22239 22:27:40.139681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22240 22:27:40.140095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22242 22:27:40.181518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22243 22:27:40.181956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22245 22:27:40.228108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22246 22:27:40.228477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22248 22:27:40.286063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22249 22:27:40.286469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22251 22:27:40.339163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22252 22:27:40.339592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22254 22:27:40.385492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22255 22:27:40.385890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22257 22:27:40.421794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22259 22:27:40.422260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22260 22:27:40.459719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22261 22:27:40.460153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22263 22:27:40.502387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22265 22:27:40.502881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22266 22:27:40.547756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22267 22:27:40.548240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22269 22:27:40.596286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22270 22:27:40.596690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22272 22:27:40.632832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22273 22:27:40.633324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22275 22:27:40.667981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22276 22:27:40.668545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22278 22:27:40.704852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22279 22:27:40.705231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22281 22:27:40.739977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22282 22:27:40.740400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22284 22:27:40.785903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22285 22:27:40.786374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22287 22:27:40.828710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22289 22:27:40.829118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22290 22:27:40.866388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22292 22:27:40.866871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22293 22:27:40.913667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22294 22:27:40.914051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22296 22:27:40.955128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22297 22:27:40.955523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22299 22:27:41.003750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22300 22:27:41.004150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22302 22:27:41.043825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22303 22:27:41.044275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22305 22:27:41.079916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22306 22:27:41.080349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22308 22:27:41.115831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22309 22:27:41.116370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22311 22:27:41.155814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22312 22:27:41.156212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22314 22:27:41.199388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22315 22:27:41.199825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22317 22:27:41.243540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22318 22:27:41.243976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22320 22:27:41.280685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22322 22:27:41.281143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22323 22:27:41.323602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22324 22:27:41.324160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22326 22:27:41.360056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22327 22:27:41.360474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22329 22:27:41.396500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22331 22:27:41.396962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22332 22:27:41.432837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22333 22:27:41.433237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22335 22:27:41.469293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22336 22:27:41.469701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22338 22:27:41.512338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22339 22:27:41.512837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22341 22:27:41.553317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22342 22:27:41.553754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22344 22:27:41.602243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22345 22:27:41.602678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22347 22:27:41.650063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22348 22:27:41.650552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22350 22:27:41.693189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22352 22:27:41.693849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22353 22:27:41.742082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22354 22:27:41.742512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22356 22:27:41.792351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22357 22:27:41.792710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22359 22:27:41.839148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22360 22:27:41.839533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22362 22:27:41.888250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22364 22:27:41.889764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22365 22:27:41.935520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22367 22:27:41.936131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22368 22:27:41.982157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22370 22:27:41.982637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22371 22:27:42.028435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22372 22:27:42.028904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22374 22:27:42.073321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22375 22:27:42.073788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22377 22:27:42.127832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22379 22:27:42.128266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22380 22:27:42.180364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22381 22:27:42.180796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22383 22:27:42.234455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22385 22:27:42.234931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22386 22:27:42.278117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22388 22:27:42.278589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22389 22:27:42.328425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22391 22:27:42.328892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22392 22:27:42.373187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22393 22:27:42.373627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22395 22:27:42.420966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22396 22:27:42.421345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22398 22:27:42.468594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22399 22:27:42.468985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22401 22:27:42.520976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22402 22:27:42.521431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22404 22:27:42.570176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22405 22:27:42.570594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22407 22:27:42.617189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22408 22:27:42.617635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22410 22:27:42.662945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22411 22:27:42.663395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22413 22:27:42.700088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22414 22:27:42.700479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22416 22:27:42.742566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22418 22:27:42.743050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22419 22:27:42.787957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22421 22:27:42.788439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22422 22:27:42.832340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22423 22:27:42.832730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22425 22:27:42.876156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22427 22:27:42.876573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22428 22:27:42.920057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22429 22:27:42.920479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22431 22:27:42.959997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22432 22:27:42.960423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22434 22:27:43.003516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22435 22:27:43.003937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22437 22:27:43.063013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22438 22:27:43.063496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22440 22:27:43.112158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22441 22:27:43.112618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22443 22:27:43.168791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22444 22:27:43.169225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22446 22:27:43.220229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22447 22:27:43.220663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22449 22:27:43.259487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22451 22:27:43.259976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22452 22:27:43.299576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22454 22:27:43.299964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22455 22:27:43.337217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22456 22:27:43.337667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22458 22:27:43.378406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22460 22:27:43.378870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22461 22:27:43.417900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22463 22:27:43.418443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22464 22:27:43.455507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22465 22:27:43.455929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22467 22:27:43.493816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22468 22:27:43.494260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22470 22:27:43.535768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22471 22:27:43.536196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22473 22:27:43.576342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22475 22:27:43.576795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22476 22:27:43.620140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22478 22:27:43.620526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22479 22:27:43.666472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22481 22:27:43.666942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22482 22:27:43.714004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22483 22:27:43.714439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22485 22:27:43.764955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22486 22:27:43.765374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22488 22:27:43.815148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22489 22:27:43.815575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22491 22:27:43.864281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22493 22:27:43.864704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22494 22:27:43.917953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22495 22:27:43.918395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22497 22:27:43.968150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22498 22:27:43.968715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22500 22:27:44.019341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22501 22:27:44.019758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22503 22:27:44.068059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22505 22:27:44.068491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22506 22:27:44.111348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22508 22:27:44.111800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22509 22:27:44.154495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22511 22:27:44.154893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22512 22:27:44.203757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22513 22:27:44.204209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22515 22:27:44.247837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22517 22:27:44.248291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22518 22:27:44.295719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22519 22:27:44.296148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22521 22:27:44.338607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22523 22:27:44.339142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22524 22:27:44.381389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22526 22:27:44.381903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22527 22:27:44.418004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22528 22:27:44.418438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22530 22:27:44.456831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22531 22:27:44.457225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22533 22:27:44.493565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22535 22:27:44.494017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22536 22:27:44.539057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22537 22:27:44.539442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22539 22:27:44.587768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22540 22:27:44.588172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22542 22:27:44.637718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22543 22:27:44.638150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22545 22:27:44.688641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22547 22:27:44.689108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22548 22:27:44.739406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22550 22:27:44.739807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22551 22:27:44.780525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22553 22:27:44.781000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22554 22:27:44.827852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22555 22:27:44.828287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22557 22:27:44.876759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22558 22:27:44.877141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22560 22:27:44.927350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22561 22:27:44.927753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22563 22:27:44.977629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22565 22:27:44.978123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22566 22:27:45.028575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22567 22:27:45.029002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22569 22:27:45.067547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22571 22:27:45.068054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22572 22:27:45.115366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22573 22:27:45.115812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22575 22:27:45.157171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22576 22:27:45.157623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22578 22:27:45.203496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22579 22:27:45.203926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22581 22:27:45.254377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22583 22:27:45.254982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22584 22:27:45.301599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22585 22:27:45.302041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22587 22:27:45.348385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22588 22:27:45.348820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22590 22:27:45.391983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22591 22:27:45.392408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22593 22:27:45.428761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22595 22:27:45.429235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22596 22:27:45.472838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22597 22:27:45.473268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22599 22:27:45.523229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22600 22:27:45.523728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22602 22:27:45.569716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22603 22:27:45.570160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22605 22:27:45.618933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22607 22:27:45.619330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22608 22:27:45.663157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22610 22:27:45.663628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22611 22:27:45.701988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22612 22:27:45.702413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22614 22:27:45.740914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22615 22:27:45.741295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22617 22:27:45.789462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22618 22:27:45.789923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22620 22:27:45.827919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22621 22:27:45.828363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22623 22:27:45.876550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22624 22:27:45.876969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22626 22:27:45.919746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22627 22:27:45.920126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22629 22:27:45.957356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22630 22:27:45.957800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22632 22:27:46.002287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22634 22:27:46.002912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22635 22:27:46.041926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22636 22:27:46.042352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22638 22:27:46.087372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22640 22:27:46.087831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22641 22:27:46.133141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22642 22:27:46.133549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22644 22:27:46.177168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22645 22:27:46.177610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22647 22:27:46.225640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22648 22:27:46.226060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22650 22:27:46.276153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22651 22:27:46.276628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22653 22:27:46.324261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22654 22:27:46.324716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22656 22:27:46.371690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22657 22:27:46.372092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22659 22:27:46.418057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22660 22:27:46.418494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22662 22:27:46.463694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22664 22:27:46.464164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22665 22:27:46.504267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22666 22:27:46.504707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22668 22:27:46.551808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22670 22:27:46.552265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22671 22:27:46.600317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22672 22:27:46.600878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22674 22:27:46.648762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22675 22:27:46.649182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22677 22:27:46.692685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22678 22:27:46.693160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22680 22:27:46.736124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22681 22:27:46.736553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22683 22:27:46.772641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22684 22:27:46.773067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22686 22:27:46.809509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22688 22:27:46.809976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22689 22:27:46.852229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22690 22:27:46.852679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22692 22:27:46.898784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22694 22:27:46.899649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22695 22:27:46.952917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22696 22:27:46.953340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22698 22:27:47.000045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22699 22:27:47.000465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22701 22:27:47.047409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22702 22:27:47.047872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22704 22:27:47.090926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22705 22:27:47.091350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22707 22:27:47.132410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22708 22:27:47.132844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22710 22:27:47.173406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22711 22:27:47.173821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22713 22:27:47.222499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22715 22:27:47.222959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22716 22:27:47.272794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22717 22:27:47.273203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22719 22:27:47.321492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22720 22:27:47.321957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22722 22:27:47.367178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22723 22:27:47.367538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22725 22:27:47.405593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22726 22:27:47.406033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22728 22:27:47.443649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22729 22:27:47.444087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22731 22:27:47.480922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22732 22:27:47.481311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22734 22:27:47.522993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22735 22:27:47.523439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22737 22:27:47.580701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22738 22:27:47.581098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22740 22:27:47.629732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22741 22:27:47.630186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22743 22:27:47.680376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22745 22:27:47.680852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22746 22:27:47.724219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22747 22:27:47.724602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22749 22:27:47.769970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22750 22:27:47.770414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22752 22:27:47.816023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22754 22:27:47.816784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22755 22:27:47.858471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22757 22:27:47.858970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22758 22:27:47.904375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22760 22:27:47.904847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22761 22:27:47.946371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22763 22:27:47.946832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22764 22:27:47.988931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22765 22:27:47.989317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22767 22:27:48.033908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22768 22:27:48.034341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22770 22:27:48.080691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22771 22:27:48.081139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22773 22:27:48.129880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22775 22:27:48.130344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22776 22:27:48.187337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22777 22:27:48.187759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22779 22:27:48.224416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22781 22:27:48.224855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22782 22:27:48.273851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22784 22:27:48.274332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22785 22:27:48.328528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22786 22:27:48.328963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22788 22:27:48.382450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22790 22:27:48.382997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22791 22:27:48.430392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22793 22:27:48.430855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22794 22:27:48.476639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22796 22:27:48.477083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22797 22:27:48.515868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22798 22:27:48.516304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22800 22:27:48.553498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22801 22:27:48.553984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22803 22:27:48.596048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22804 22:27:48.596446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22806 22:27:48.642460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22808 22:27:48.642930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22809 22:27:48.687192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22810 22:27:48.687610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22812 22:27:48.737480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22813 22:27:48.737932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22815 22:27:48.787244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22816 22:27:48.787645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22818 22:27:48.839023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22819 22:27:48.839493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22821 22:27:48.885633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22823 22:27:48.886192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22824 22:27:48.928255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22825 22:27:48.928742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22827 22:27:48.973718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22828 22:27:48.974144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22830 22:27:49.020035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22831 22:27:49.020478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
22833 22:27:49.067994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
22834 22:27:49.068435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
22836 22:27:49.114344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
22838 22:27:49.114799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
22839 22:27:49.163604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
22840 22:27:49.164042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
22842 22:27:49.212011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
22843 22:27:49.212493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
22845 22:27:49.254902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
22846 22:27:49.255335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
22848 22:27:49.300561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
22849 22:27:49.300996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
22851 22:27:49.348012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
22852 22:27:49.348435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
22854 22:27:49.392547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
22856 22:27:49.393022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
22857 22:27:49.436036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
22858 22:27:49.436482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
22860 22:27:49.484792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
22861 22:27:49.485180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
22863 22:27:49.535623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
22864 22:27:49.536180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
22866 22:27:49.577401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
22867 22:27:49.577877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
22869 22:27:49.620433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
22871 22:27:49.620855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
22872 22:27:49.663692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
22873 22:27:49.664143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
22875 22:27:49.707962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
22876 22:27:49.708383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
22878 22:27:49.749060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
22879 22:27:49.749579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
22881 22:27:49.795315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
22883 22:27:49.795801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
22884 22:27:49.832328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
22885 22:27:49.832709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
22887 22:27:49.871265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
22889 22:27:49.871728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
22890 22:27:49.912929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
22891 22:27:49.913339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
22893 22:27:49.961118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
22895 22:27:49.961595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
22896 22:27:50.005669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
22898 22:27:50.006151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
22899 22:27:50.044061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
22900 22:27:50.044466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
22902 22:27:50.087771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
22903 22:27:50.088210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
22905 22:27:50.133337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
22906 22:27:50.133781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
22908 22:27:50.184456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
22909 22:27:50.184857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
22911 22:27:50.234637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
22912 22:27:50.235100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
22914 22:27:50.272605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
22915 22:27:50.273030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
22917 22:27:50.310938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
22919 22:27:50.311326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
22920 22:27:50.351885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
22921 22:27:50.352315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
22923 22:27:50.400340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
22924 22:27:50.400724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
22926 22:27:50.444181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
22927 22:27:50.444609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
22929 22:27:50.489158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
22930 22:27:50.489606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
22932 22:27:50.537806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
22933 22:27:50.538225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
22935 22:27:50.584579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
22936 22:27:50.584982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
22938 22:27:50.626035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
22939 22:27:50.626429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
22941 22:27:50.669992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
22942 22:27:50.670422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
22944 22:27:50.713181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
22945 22:27:50.713577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
22947 22:27:50.757736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
22949 22:27:50.758236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
22950 22:27:50.807183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
22951 22:27:50.807570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
22953 22:27:50.853791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
22954 22:27:50.854194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
22956 22:27:50.901928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
22957 22:27:50.902467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
22959 22:27:50.951834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
22961 22:27:50.952572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
22962 22:27:51.002311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
22964 22:27:51.002768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
22965 22:27:51.047651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
22966 22:27:51.048083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
22968 22:27:51.083873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
22969 22:27:51.084291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
22971 22:27:51.125619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
22972 22:27:51.126079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
22974 22:27:51.174514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
22976 22:27:51.174995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
22977 22:27:51.213785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
22978 22:27:51.214228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
22980 22:27:51.262462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
22982 22:27:51.263097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
22983 22:27:51.301590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
22984 22:27:51.302063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
22986 22:27:51.342110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
22987 22:27:51.342536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
22989 22:27:51.384205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
22990 22:27:51.384586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
22992 22:27:51.425944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
22993 22:27:51.426365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
22995 22:27:51.469157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
22996 22:27:51.469584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
22998 22:27:51.511717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
22999 22:27:51.512116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23001 22:27:51.551606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23002 22:27:51.552026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23004 22:27:51.593104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23006 22:27:51.593579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23007 22:27:51.636202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23008 22:27:51.636656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23010 22:27:51.682748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23011 22:27:51.683201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23013 22:27:51.725605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23014 22:27:51.726045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23016 22:27:51.763970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23018 22:27:51.764359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23019 22:27:51.804646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23020 22:27:51.805058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23022 22:27:51.849586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23023 22:27:51.849982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23025 22:27:51.888203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23026 22:27:51.888624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23028 22:27:51.937325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23029 22:27:51.937815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23031 22:27:51.984391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23032 22:27:51.984930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23034 22:27:52.031186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23036 22:27:52.031653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23037 22:27:52.068088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23038 22:27:52.068516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23040 22:27:52.113812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23041 22:27:52.114268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23043 22:27:52.152059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23044 22:27:52.152514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23046 22:27:52.196695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23047 22:27:52.197163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23049 22:27:52.237667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23051 22:27:52.238430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23052 22:27:52.284539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23053 22:27:52.284945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23055 22:27:52.328256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23056 22:27:52.328664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23058 22:27:52.376003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23059 22:27:52.376421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23061 22:27:52.417495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23062 22:27:52.418084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23064 22:27:52.460221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23065 22:27:52.460643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23067 22:27:52.497242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23069 22:27:52.497723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23070 22:27:52.536394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23072 22:27:52.537159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23073 22:27:52.582249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23075 22:27:52.582736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23076 22:27:52.628078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23077 22:27:52.628483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23079 22:27:52.671554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23080 22:27:52.671934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23082 22:27:52.717094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23083 22:27:52.717483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23085 22:27:52.764442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23086 22:27:52.764889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23088 22:27:52.815097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23089 22:27:52.815520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23091 22:27:52.863043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23092 22:27:52.863518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23094 22:27:52.904746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23095 22:27:52.905164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23097 22:27:52.941948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23098 22:27:52.942401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23100 22:27:52.982243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23102 22:27:52.982703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23103 22:27:53.019356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23104 22:27:53.019770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23106 22:27:53.059996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23107 22:27:53.060432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23109 22:27:53.097421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23110 22:27:53.097854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23112 22:27:53.135983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23113 22:27:53.136384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23115 22:27:53.175521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23116 22:27:53.175953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23118 22:27:53.214400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23120 22:27:53.214868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23121 22:27:53.256986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23122 22:27:53.257436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23124 22:27:53.333899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23126 22:27:53.334378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23127 22:27:53.387216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23128 22:27:53.387666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23130 22:27:53.436504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23131 22:27:53.436949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23133 22:27:53.475766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23135 22:27:53.476307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23136 22:27:53.525730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23137 22:27:53.526152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23139 22:27:53.577921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23140 22:27:53.578383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23142 22:27:53.623440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23143 22:27:53.623813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23145 22:27:53.668095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23146 22:27:53.668492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23148 22:27:53.716614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23149 22:27:53.717003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23151 22:27:53.763806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23153 22:27:53.764236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23154 22:27:53.811787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23155 22:27:53.812212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23157 22:27:53.860471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23158 22:27:53.860897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23160 22:27:53.908121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23161 22:27:53.908513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23163 22:27:53.957870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23165 22:27:53.958248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23166 22:27:54.009542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23167 22:27:54.010014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23169 22:27:54.048912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23170 22:27:54.049355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23172 22:27:54.086938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23173 22:27:54.087366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23175 22:27:54.125631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23176 22:27:54.126164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23178 22:27:54.181845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23180 22:27:54.182275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23181 22:27:54.225893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23182 22:27:54.226353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23184 22:27:54.264163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23185 22:27:54.264689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23187 22:27:54.305712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23188 22:27:54.306217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23190 22:27:54.355792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23191 22:27:54.356283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23193 22:27:54.404175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23194 22:27:54.404621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23196 22:27:54.441526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23197 22:27:54.441957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23199 22:27:54.480025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23200 22:27:54.480409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23202 22:27:54.519089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23203 22:27:54.519497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23205 22:27:54.557040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23206 22:27:54.557610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23208 22:27:54.595936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23210 22:27:54.596660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23211 22:27:54.632714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23212 22:27:54.633248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23214 22:27:54.680539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23216 22:27:54.681217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23217 22:27:54.727711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23219 22:27:54.728380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23220 22:27:54.772577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23221 22:27:54.772999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23223 22:27:54.813633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23225 22:27:54.814414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23226 22:27:54.859702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23228 22:27:54.860449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23229 22:27:54.898060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23231 22:27:54.898708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23232 22:27:54.934992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23233 22:27:54.935458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23235 22:27:54.972168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23237 22:27:54.972756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23238 22:27:55.007710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23239 22:27:55.008186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23241 22:27:55.047673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23242 22:27:55.048196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23244 22:27:55.089553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23245 22:27:55.089998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23247 22:27:55.128925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23248 22:27:55.129314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23250 22:27:55.171816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23251 22:27:55.172258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23253 22:27:55.215309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23255 22:27:55.216014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23256 22:27:55.258117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23257 22:27:55.258672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23259 22:27:55.297128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23260 22:27:55.297661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23262 22:27:55.337267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23264 22:27:55.338038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23265 22:27:55.380292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23266 22:27:55.380786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23268 22:27:55.428783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23270 22:27:55.429351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23271 22:27:55.467672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23272 22:27:55.468101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23274 22:27:55.513809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23276 22:27:55.514582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23277 22:27:55.559063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23279 22:27:55.559825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23280 22:27:55.599721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23281 22:27:55.600117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23283 22:27:55.637773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23284 22:27:55.638206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23286 22:27:55.681238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23287 22:27:55.681696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23289 22:27:55.722035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23291 22:27:55.722589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23292 22:27:55.767761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23293 22:27:55.768143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23295 22:27:55.806360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23297 22:27:55.807020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23298 22:27:55.845152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23299 22:27:55.845551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23301 22:27:55.889479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23303 22:27:55.889961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23304 22:27:55.928478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23305 22:27:55.928899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23307 22:27:55.966913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23308 22:27:55.967345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23310 22:27:56.003954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23311 22:27:56.004424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23313 22:27:56.051065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23315 22:27:56.051558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23316 22:27:56.099357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23317 22:27:56.099801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23319 22:27:56.137096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23321 22:27:56.137888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23322 22:27:56.187519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23323 22:27:56.187907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23325 22:27:56.237544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23326 22:27:56.237958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23328 22:27:56.286477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23330 22:27:56.286890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23331 22:27:56.335590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23332 22:27:56.336005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23334 22:27:56.385599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23335 22:27:56.386052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23337 22:27:56.437145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23338 22:27:56.437549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23340 22:27:56.488323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23341 22:27:56.488863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23343 22:27:56.539967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23344 22:27:56.540363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23346 22:27:56.589817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23347 22:27:56.590239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23349 22:27:56.632183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23350 22:27:56.632615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23352 22:27:56.672131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23353 22:27:56.672518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23355 22:27:56.721306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23356 22:27:56.721786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23358 22:27:56.761034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23359 22:27:56.761454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23361 22:27:56.799024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23363 22:27:56.799789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23364 22:27:56.840067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23365 22:27:56.840645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23367 22:27:56.885950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23369 22:27:56.886700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23370 22:27:56.932187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23371 22:27:56.932655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23373 22:27:56.972535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23375 22:27:56.972913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23376 22:27:57.020064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23377 22:27:57.020483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23379 22:27:57.068664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23380 22:27:57.069076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23382 22:27:57.104254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23384 22:27:57.104710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23385 22:27:57.139850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23386 22:27:57.140299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23388 22:27:57.178702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23389 22:27:57.179131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23391 22:27:57.230748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23393 22:27:57.231181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23394 22:27:57.267178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23395 22:27:57.267561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23397 22:27:57.305676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23398 22:27:57.306126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23400 22:27:57.350156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23401 22:27:57.350603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23403 22:27:57.400930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23404 22:27:57.401312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23406 22:27:57.448002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23407 22:27:57.448442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23409 22:27:57.491771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23410 22:27:57.492223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23412 22:27:57.529111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23414 22:27:57.529575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23415 22:27:57.567158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23416 22:27:57.567513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23418 22:27:57.605852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23419 22:27:57.606342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23421 22:27:57.655718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23423 22:27:57.656230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23424 22:27:57.708389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23426 22:27:57.708870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23427 22:27:57.759280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23428 22:27:57.759695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23430 22:27:57.803485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23431 22:27:57.803931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23433 22:27:57.851970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23434 22:27:57.852491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23436 22:27:57.899725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23437 22:27:57.900210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23439 22:27:57.936966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23441 22:27:57.937451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23442 22:27:57.978118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23444 22:27:57.978705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23445 22:27:58.024643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23447 22:27:58.025093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23448 22:27:58.075133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23450 22:27:58.075613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23451 22:27:58.109947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23452 22:27:58.110368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23454 22:27:58.146679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23455 22:27:58.147170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23457 22:27:58.182114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23458 22:27:58.182535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23460 22:27:58.216726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23461 22:27:58.217147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23463 22:27:58.251824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23464 22:27:58.252240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23466 22:27:58.295863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23467 22:27:58.296308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23469 22:27:58.341915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23470 22:27:58.342366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23472 22:27:58.392819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23473 22:27:58.393220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23475 22:27:58.447974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23476 22:27:58.448425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23478 22:27:58.483538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23479 22:27:58.484496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23481 22:27:58.521461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23482 22:27:58.521845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23484 22:27:58.561718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23485 22:27:58.562153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23487 22:27:58.614840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23489 22:27:58.615313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23490 22:27:58.654378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23492 22:27:58.654796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23493 22:27:58.688400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23494 22:27:58.688792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23496 22:27:58.737287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23497 22:27:58.737690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23499 22:27:58.776526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23500 22:27:58.776945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23502 22:27:58.811555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23503 22:27:58.811960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23505 22:27:58.848884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23507 22:27:58.849346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23508 22:27:58.894208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23509 22:27:58.894641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23511 22:27:58.942136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23513 22:27:58.942610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23514 22:27:58.982948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23515 22:27:58.983449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23517 22:27:59.025841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23518 22:27:59.026391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23520 22:27:59.064045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23521 22:27:59.064450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23523 22:27:59.104870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23524 22:27:59.105261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23526 22:27:59.142827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23527 22:27:59.143232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23529 22:27:59.180006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23530 22:27:59.180388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23532 22:27:59.216347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23534 22:27:59.216802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23535 22:27:59.259210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23536 22:27:59.259657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23538 22:27:59.299312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23539 22:27:59.299753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23541 22:27:59.347771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23542 22:27:59.348147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23544 22:27:59.384658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23545 22:27:59.385075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23547 22:27:59.421541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23549 22:27:59.421921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23550 22:27:59.459420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23551 22:27:59.459907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23553 22:27:59.497435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23554 22:27:59.497843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23556 22:27:59.535761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23558 22:27:59.536506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23559 22:27:59.578038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23560 22:27:59.578475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23562 22:27:59.617512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23563 22:27:59.617945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23565 22:27:59.669585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23567 22:27:59.670060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23568 22:27:59.719742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23569 22:27:59.720210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23571 22:27:59.772331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23572 22:27:59.772656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23574 22:27:59.816446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23576 22:27:59.816972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23577 22:27:59.865815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23579 22:27:59.866516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23580 22:27:59.918563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23582 22:27:59.919155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23583 22:27:59.963911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23585 22:27:59.964308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23586 22:28:00.005508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23587 22:28:00.006019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23589 22:28:00.045895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23590 22:28:00.046382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23592 22:28:00.087970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23593 22:28:00.088417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23595 22:28:00.127724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23596 22:28:00.128271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23598 22:28:00.165449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23600 22:28:00.166069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23601 22:28:00.205998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23602 22:28:00.206423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23604 22:28:00.246469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23606 22:28:00.246931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23607 22:28:00.288173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23608 22:28:00.288605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23610 22:28:00.328796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23611 22:28:00.329234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23613 22:28:00.371849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23614 22:28:00.372296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23616 22:28:00.411393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23618 22:28:00.411866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23619 22:28:00.450564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23621 22:28:00.450984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23622 22:28:00.489447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23623 22:28:00.489868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23625 22:28:00.545896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23626 22:28:00.546293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23628 22:28:00.603730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23629 22:28:00.604126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23631 22:28:00.657169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23632 22:28:00.657599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23634 22:28:00.701800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23635 22:28:00.702220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23637 22:28:00.740557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23638 22:28:00.741022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23640 22:28:00.781375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23641 22:28:00.781882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23643 22:28:00.820615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23644 22:28:00.821118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23646 22:28:00.859504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23647 22:28:00.859913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23649 22:28:00.899321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23650 22:28:00.899755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23652 22:28:00.942430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23654 22:28:00.942910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23655 22:28:00.980737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23657 22:28:00.981221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23658 22:28:01.020752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23659 22:28:01.021153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23661 22:28:01.068570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23663 22:28:01.068956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23664 22:28:01.111713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23665 22:28:01.112133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23667 22:28:01.156253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23668 22:28:01.156793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23670 22:28:01.193894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23672 22:28:01.194591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23673 22:28:01.229389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23674 22:28:01.229940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23676 22:28:01.267107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23678 22:28:01.267851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23679 22:28:01.303343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23681 22:28:01.303774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23682 22:28:01.341100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23683 22:28:01.341570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23685 22:28:01.386356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23687 22:28:01.386853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23688 22:28:01.425806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23690 22:28:01.426280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23691 22:28:01.467864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23692 22:28:01.468273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23694 22:28:01.521305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23696 22:28:01.521787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23697 22:28:01.556326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23698 22:28:01.556746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23700 22:28:01.592932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23702 22:28:01.593529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23703 22:28:01.630960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23704 22:28:01.631373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23706 22:28:01.667930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23708 22:28:01.668404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23709 22:28:01.713482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23710 22:28:01.713914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23712 22:28:01.760091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23713 22:28:01.760535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23715 22:28:01.796508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23716 22:28:01.796956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23718 22:28:01.833034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23719 22:28:01.833607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23721 22:28:01.868678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23722 22:28:01.869143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23724 22:28:01.911566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23726 22:28:01.911986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23727 22:28:01.953502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23728 22:28:01.953860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23730 22:28:01.995619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23731 22:28:01.995993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23733 22:28:02.032803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23734 22:28:02.033291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23736 22:28:02.079845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23737 22:28:02.080356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23739 22:28:02.130508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23741 22:28:02.131276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23742 22:28:02.169080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23743 22:28:02.169463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23745 22:28:02.207838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23746 22:28:02.208279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23748 22:28:02.248346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23749 22:28:02.248793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23751 22:28:02.296710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23752 22:28:02.297123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23754 22:28:02.351163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23755 22:28:02.351641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23757 22:28:02.411843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23758 22:28:02.412232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23760 22:28:02.458501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23762 22:28:02.459274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23763 22:28:02.495919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23764 22:28:02.496332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23766 22:28:02.535131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23768 22:28:02.535594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23769 22:28:02.579278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23770 22:28:02.579707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23772 22:28:02.616781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23773 22:28:02.617208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23775 22:28:02.661090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23776 22:28:02.661537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23778 22:28:02.697434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23779 22:28:02.697865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23781 22:28:02.739439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23783 22:28:02.739869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23784 22:28:02.776593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23785 22:28:02.777007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23787 22:28:02.817446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23788 22:28:02.817882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23790 22:28:02.863711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23791 22:28:02.864088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23793 22:28:02.904754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23794 22:28:02.905128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23796 22:28:02.951742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23797 22:28:02.952198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23799 22:28:02.991084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23800 22:28:02.991499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23802 22:28:03.032340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23804 22:28:03.032965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23805 22:28:03.073022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23806 22:28:03.073376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23808 22:28:03.113434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23809 22:28:03.113763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23811 22:28:03.153695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23812 22:28:03.154014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23814 22:28:03.193920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23815 22:28:03.194348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23817 22:28:03.236273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23819 22:28:03.236734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23820 22:28:03.273573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23821 22:28:03.274019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23823 22:28:03.312783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23825 22:28:03.313239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23826 22:28:03.353449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23827 22:28:03.354060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23829 22:28:03.396802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
23830 22:28:03.397254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23832 22:28:03.436359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
23833 22:28:03.436811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
23835 22:28:03.477716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
23837 22:28:03.478217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
23838 22:28:03.539427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
23839 22:28:03.539817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
23841 22:28:03.581498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
23843 22:28:03.582156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
23844 22:28:03.624318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
23846 22:28:03.624742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
23847 22:28:03.667475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
23849 22:28:03.667937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
23850 22:28:03.718806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
23851 22:28:03.719203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
23853 22:28:03.758729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
23854 22:28:03.759131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
23856 22:28:03.798401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
23858 22:28:03.799170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
23859 22:28:03.841376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
23861 22:28:03.841812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
23862 22:28:03.879171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
23864 22:28:03.879800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
23865 22:28:03.934961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
23867 22:28:03.935414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
23868 22:28:03.972818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
23870 22:28:03.973397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
23871 22:28:04.011419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
23872 22:28:04.011888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
23874 22:28:04.050792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
23876 22:28:04.051256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
23877 22:28:04.091586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
23878 22:28:04.092100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
23880 22:28:04.130987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
23882 22:28:04.131461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
23883 22:28:04.172301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
23884 22:28:04.172715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
23886 22:28:04.209726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
23887 22:28:04.210155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
23889 22:28:04.246358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
23891 22:28:04.246849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
23892 22:28:04.284869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
23894 22:28:04.285329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
23895 22:28:04.328466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
23897 22:28:04.328949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
23898 22:28:04.365953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
23900 22:28:04.366342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
23901 22:28:04.404406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
23903 22:28:04.404866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
23904 22:28:04.441472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
23905 22:28:04.441902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
23907 22:28:04.479283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
23909 22:28:04.479710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
23910 22:28:04.518926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
23911 22:28:04.519488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
23913 22:28:04.554758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
23914 22:28:04.555182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
23916 22:28:04.591001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
23917 22:28:04.591416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
23919 22:28:04.628350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
23920 22:28:04.628873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
23922 22:28:04.666492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
23924 22:28:04.667179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
23925 22:28:04.704314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
23927 22:28:04.704975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
23928 22:28:04.743715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
23929 22:28:04.744138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
23931 22:28:04.779981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
23932 22:28:04.780401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
23934 22:28:04.816623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
23935 22:28:04.817081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
23937 22:28:04.855360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
23939 22:28:04.856003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
23940 22:28:04.899221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
23941 22:28:04.899666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
23943 22:28:04.937557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
23944 22:28:04.937946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
23946 22:28:04.973677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
23947 22:28:04.974107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
23949 22:28:05.010576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
23951 22:28:05.011187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
23952 22:28:05.047371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
23954 22:28:05.047831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
23955 22:28:05.088835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
23956 22:28:05.089325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
23958 22:28:05.132277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
23959 22:28:05.132717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
23961 22:28:05.178934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
23963 22:28:05.179356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
23964 22:28:05.218281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
23966 22:28:05.218742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
23967 22:28:05.256987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
23968 22:28:05.257377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
23970 22:28:05.293854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
23971 22:28:05.294252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
23973 22:28:05.333519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
23974 22:28:05.333929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
23976 22:28:05.372122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
23977 22:28:05.372540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
23979 22:28:05.412714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
23980 22:28:05.413139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
23982 22:28:05.451656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
23983 22:28:05.452037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
23985 22:28:05.488441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
23986 22:28:05.488816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
23988 22:28:05.525300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
23989 22:28:05.525683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
23991 22:28:05.563581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
23992 22:28:05.564009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
23994 22:28:05.606011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
23995 22:28:05.606388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
23997 22:28:05.643898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
23999 22:28:05.644266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24000 22:28:05.681665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24001 22:28:05.682043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24003 22:28:05.718912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24005 22:28:05.719379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24006 22:28:05.757162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24007 22:28:05.757578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24009 22:28:05.793810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24011 22:28:05.794283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24012 22:28:05.832589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24013 22:28:05.833005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24015 22:28:05.885769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24016 22:28:05.886168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24018 22:28:05.944033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24019 22:28:05.944421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24021 22:28:05.987299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24022 22:28:05.987716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24024 22:28:06.044966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24025 22:28:06.045430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24027 22:28:06.099936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24028 22:28:06.100387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24030 22:28:06.149383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24031 22:28:06.149851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24033 22:28:06.192198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24034 22:28:06.192583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24036 22:28:06.246056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24037 22:28:06.246496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24039 22:28:06.284028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24040 22:28:06.284442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24042 22:28:06.323928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24043 22:28:06.324350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24045 22:28:06.364361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24047 22:28:06.365156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24048 22:28:06.401567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24049 22:28:06.402092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24051 22:28:06.439908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24052 22:28:06.440319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24054 22:28:06.479839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24055 22:28:06.480265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24057 22:28:06.517927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24058 22:28:06.518381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24060 22:28:06.556904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24062 22:28:06.557299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24063 22:28:06.599401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24064 22:28:06.599800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24066 22:28:06.636903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24068 22:28:06.637361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24069 22:28:06.676150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24070 22:28:06.676552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24072 22:28:06.716470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24074 22:28:06.716938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24075 22:28:06.752716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24076 22:28:06.753155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24078 22:28:06.791728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24079 22:28:06.792144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24081 22:28:06.832551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24082 22:28:06.832996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24084 22:28:06.876658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24085 22:28:06.877105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24087 22:28:06.924437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24089 22:28:06.924900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24090 22:28:06.967422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24091 22:28:06.967840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24093 22:28:07.012604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24094 22:28:07.012983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24096 22:28:07.058169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24098 22:28:07.058669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24099 22:28:07.101020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24101 22:28:07.101484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24102 22:28:07.147762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24103 22:28:07.148201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24105 22:28:07.197005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24106 22:28:07.197448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24108 22:28:07.239276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24109 22:28:07.239721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24111 22:28:07.277902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24112 22:28:07.278332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24114 22:28:07.316125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24115 22:28:07.316552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24117 22:28:07.369929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24118 22:28:07.370345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24120 22:28:07.432249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24121 22:28:07.432706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24123 22:28:07.481457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24124 22:28:07.481841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24126 22:28:07.521551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24127 22:28:07.521993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24129 22:28:07.559304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24131 22:28:07.559745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24132 22:28:07.599063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24133 22:28:07.599511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24135 22:28:07.639491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24136 22:28:07.639920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24138 22:28:07.676921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24139 22:28:07.677352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24141 22:28:07.713678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24142 22:28:07.714100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24144 22:28:07.751840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24145 22:28:07.752276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24147 22:28:07.804740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24148 22:28:07.805174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24150 22:28:07.847256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24151 22:28:07.847679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24153 22:28:07.886279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24155 22:28:07.886735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24156 22:28:07.928292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24158 22:28:07.928719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24159 22:28:07.969273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24160 22:28:07.969697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24162 22:28:08.028476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24163 22:28:08.028807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24165 22:28:08.085399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24166 22:28:08.085877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24168 22:28:08.123305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24169 22:28:08.123855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24171 22:28:08.162265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24173 22:28:08.162735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24174 22:28:08.199846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24176 22:28:08.200561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24177 22:28:08.254109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24178 22:28:08.254511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24180 22:28:08.311802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24181 22:28:08.312198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24183 22:28:08.354381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24185 22:28:08.354826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24186 22:28:08.406340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24188 22:28:08.406813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24189 22:28:08.449361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24190 22:28:08.449767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24192 22:28:08.491955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24193 22:28:08.492377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24195 22:28:08.545243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24197 22:28:08.545695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24198 22:28:08.591569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24199 22:28:08.591997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24201 22:28:08.644687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24203 22:28:08.645168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24204 22:28:08.692148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24206 22:28:08.692626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24207 22:28:08.739314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24208 22:28:08.739760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24210 22:28:08.780077 <47>[ 278.130991] systemd-journald[105]: Sent WATCHDOG=1 notification.
24211 22:28:08.795915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24213 22:28:08.796392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24214 22:28:08.839532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24215 22:28:08.839930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24217 22:28:08.887197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24218 22:28:08.887621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24220 22:28:08.933254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24221 22:28:08.933685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24223 22:28:08.981054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24225 22:28:08.981531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24226 22:28:09.029457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24227 22:28:09.029909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24229 22:28:09.072146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24230 22:28:09.072563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24232 22:28:09.111619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24233 22:28:09.112123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24235 22:28:09.149666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24236 22:28:09.150211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24238 22:28:09.187665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24239 22:28:09.188121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24241 22:28:09.227613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24242 22:28:09.228049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24244 22:28:09.268699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24245 22:28:09.269094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24247 22:28:09.312367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24248 22:28:09.312772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24250 22:28:09.361651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24251 22:28:09.362018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24253 22:28:09.402911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24254 22:28:09.403265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24256 22:28:09.446153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24258 22:28:09.446579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24259 22:28:09.484346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24260 22:28:09.484732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24262 22:28:09.524746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24263 22:28:09.525168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24265 22:28:09.573500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24267 22:28:09.574098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24268 22:28:09.634574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24270 22:28:09.635239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24271 22:28:09.688947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24272 22:28:09.689435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24274 22:28:09.733357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24276 22:28:09.733837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24277 22:28:09.788076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24278 22:28:09.788438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24280 22:28:09.843842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24281 22:28:09.844362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24283 22:28:09.883143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24284 22:28:09.883586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24286 22:28:09.923713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24287 22:28:09.924141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24289 22:28:09.963681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24290 22:28:09.964094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24292 22:28:10.003755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24293 22:28:10.004176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24295 22:28:10.043590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24296 22:28:10.043985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24298 22:28:10.095241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24299 22:28:10.095721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24301 22:28:10.145078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24302 22:28:10.145493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24304 22:28:10.194473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24306 22:28:10.195258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24307 22:28:10.244627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24308 22:28:10.245061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24310 22:28:10.290380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24312 22:28:10.290845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24313 22:28:10.337586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24314 22:28:10.338030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24316 22:28:10.385254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24318 22:28:10.385715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24319 22:28:10.425933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24320 22:28:10.426472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24322 22:28:10.475069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24324 22:28:10.475451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24325 22:28:10.517497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24326 22:28:10.517919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24328 22:28:10.565223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24329 22:28:10.565655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24331 22:28:10.624804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24332 22:28:10.625231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24334 22:28:10.668092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24335 22:28:10.668511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24337 22:28:10.719405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24338 22:28:10.719816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24340 22:28:10.769744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24342 22:28:10.770312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24343 22:28:10.815646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24344 22:28:10.816041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24346 22:28:10.865880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24347 22:28:10.866283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24349 22:28:10.920334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24350 22:28:10.920742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24352 22:28:10.959093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24353 22:28:10.959518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24355 22:28:11.009842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24356 22:28:11.010278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24358 22:28:11.062869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24359 22:28:11.063307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24361 22:28:11.113859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24362 22:28:11.114295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24364 22:28:11.165191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24365 22:28:11.165622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24367 22:28:11.217445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24369 22:28:11.217931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24370 22:28:11.271885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24372 22:28:11.272345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24373 22:28:11.310936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24374 22:28:11.311365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24376 22:28:11.351668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24377 22:28:11.352095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24379 22:28:11.395312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24381 22:28:11.395803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24382 22:28:11.440350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24383 22:28:11.440805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24385 22:28:11.480228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24386 22:28:11.480670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24388 22:28:11.520607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24390 22:28:11.521085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24391 22:28:11.571184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24393 22:28:11.571660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24394 22:28:11.614417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24396 22:28:11.615120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24397 22:28:11.657003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24398 22:28:11.657571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24400 22:28:11.696751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24401 22:28:11.697140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24403 22:28:11.735868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24404 22:28:11.736306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24406 22:28:11.792088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24407 22:28:11.792520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24409 22:28:11.845457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24410 22:28:11.845864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24412 22:28:11.888519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24413 22:28:11.888946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24415 22:28:11.933443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24416 22:28:11.933910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24418 22:28:11.978138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24419 22:28:11.978579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24421 22:28:12.037068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24423 22:28:12.037555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24424 22:28:12.092935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24425 22:28:12.093392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24427 22:28:12.143831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24428 22:28:12.144276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24430 22:28:12.183532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24431 22:28:12.183953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24433 22:28:12.226411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24435 22:28:12.227181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24436 22:28:12.268236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24437 22:28:12.268703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24439 22:28:12.311527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24440 22:28:12.311953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24442 22:28:12.353075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24443 22:28:12.357773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24445 22:28:12.409344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24447 22:28:12.409810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24448 22:28:12.470530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24450 22:28:12.470953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24451 22:28:12.528867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24452 22:28:12.529292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24454 22:28:12.579392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24455 22:28:12.579822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24457 22:28:12.627890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24459 22:28:12.628381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24460 22:28:12.673328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24462 22:28:12.673980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24463 22:28:12.717128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24464 22:28:12.717560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24466 22:28:12.760477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24467 22:28:12.760896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24469 22:28:12.800198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24470 22:28:12.800595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24472 22:28:12.851554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24474 22:28:12.852042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24475 22:28:12.892608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24476 22:28:12.893071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24478 22:28:12.939268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24480 22:28:12.939633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24481 22:28:12.977783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24482 22:28:12.978359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24484 22:28:13.021161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24485 22:28:13.021702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24487 22:28:13.063892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24488 22:28:13.064377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24490 22:28:13.111531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24491 22:28:13.111981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24493 22:28:13.153160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24494 22:28:13.153622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24496 22:28:13.207893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24497 22:28:13.208300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24499 22:28:13.255929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24500 22:28:13.256345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24502 22:28:13.309420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24504 22:28:13.309903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24505 22:28:13.356823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24506 22:28:13.357280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24508 22:28:13.409071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24510 22:28:13.409568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24511 22:28:13.470948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24512 22:28:13.471395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24514 22:28:13.517979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24516 22:28:13.518461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24517 22:28:13.564849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24518 22:28:13.565238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24520 22:28:13.604950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24521 22:28:13.605380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24523 22:28:13.657603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24524 22:28:13.658000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24526 22:28:13.704076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24528 22:28:13.704554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24529 22:28:13.760203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24531 22:28:13.760662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24532 22:28:13.809018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24533 22:28:13.809435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24535 22:28:13.853095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24536 22:28:13.853522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24538 22:28:13.897485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24539 22:28:13.897884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24541 22:28:13.946830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24542 22:28:13.947215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24544 22:28:13.995989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24545 22:28:13.996392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24547 22:28:14.046362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24549 22:28:14.046831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24550 22:28:14.106017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24552 22:28:14.106367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24553 22:28:14.164047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24554 22:28:14.164519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24556 22:28:14.222573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24558 22:28:14.223023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24559 22:28:14.281832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24560 22:28:14.282260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24562 22:28:14.337723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24563 22:28:14.338227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24565 22:28:14.395591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24566 22:28:14.396005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24568 22:28:14.452659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24569 22:28:14.453041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24571 22:28:14.508847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24572 22:28:14.509224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24574 22:28:14.567605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24576 22:28:14.568076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24577 22:28:14.624653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24578 22:28:14.625050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24580 22:28:14.681300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24581 22:28:14.681749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24583 22:28:14.738368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24585 22:28:14.738830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24586 22:28:14.782575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24588 22:28:14.783117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24589 22:28:14.825824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24591 22:28:14.826291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24592 22:28:14.872860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24593 22:28:14.873295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24595 22:28:14.924978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24596 22:28:14.925407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24598 22:28:14.969323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24599 22:28:14.969753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24601 22:28:15.029387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24603 22:28:15.029839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24604 22:28:15.079853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24605 22:28:15.080240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24607 22:28:15.119277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24608 22:28:15.119731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24610 22:28:15.159664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24611 22:28:15.160115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24613 22:28:15.199575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24614 22:28:15.200009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24616 22:28:15.244251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24617 22:28:15.244708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24619 22:28:15.291390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24621 22:28:15.291875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24622 22:28:15.343219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24623 22:28:15.343626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24625 22:28:15.402450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24627 22:28:15.402943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24628 22:28:15.461888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24629 22:28:15.462308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24631 22:28:15.515432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24632 22:28:15.515820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24634 22:28:15.572339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24635 22:28:15.572826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24637 22:28:15.620364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24638 22:28:15.620753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24640 22:28:15.665830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24641 22:28:15.666331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24643 22:28:15.705340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24644 22:28:15.705756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24646 22:28:15.745589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24647 22:28:15.746050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24649 22:28:15.787425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24650 22:28:15.787859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24652 22:28:15.831422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24653 22:28:15.831857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24655 22:28:15.878084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24656 22:28:15.878488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24658 22:28:15.921242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24659 22:28:15.921694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24661 22:28:15.974074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24662 22:28:15.974543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24664 22:28:16.019165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24665 22:28:16.019609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24667 22:28:16.061899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24668 22:28:16.062351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24670 22:28:16.110059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24672 22:28:16.110526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24673 22:28:16.162134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24675 22:28:16.162549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24676 22:28:16.207491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24677 22:28:16.207894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24679 22:28:16.260770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24680 22:28:16.261277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24682 22:28:16.305258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24684 22:28:16.305921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24685 22:28:16.345959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24687 22:28:16.346687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24688 22:28:16.399385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24689 22:28:16.399917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24691 22:28:16.450591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24693 22:28:16.451097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24694 22:28:16.497356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24695 22:28:16.497791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24697 22:28:16.552998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24699 22:28:16.553461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24700 22:28:16.604974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24701 22:28:16.605408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24703 22:28:16.651372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24704 22:28:16.651747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24706 22:28:16.695137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24707 22:28:16.695509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24709 22:28:16.738110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24711 22:28:16.738571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24712 22:28:16.783250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24714 22:28:16.783723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24715 22:28:16.825513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24717 22:28:16.826008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24718 22:28:16.881325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24720 22:28:16.882093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24721 22:28:16.928072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24722 22:28:16.928505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24724 22:28:16.969161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24725 22:28:16.969606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24727 22:28:17.018497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24729 22:28:17.018982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24730 22:28:17.057115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24731 22:28:17.057508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24733 22:28:17.094969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24734 22:28:17.095402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24736 22:28:17.136593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24737 22:28:17.136988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24739 22:28:17.184464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24741 22:28:17.184945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24742 22:28:17.239245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24743 22:28:17.239684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24745 22:28:17.277329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24746 22:28:17.277834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24748 22:28:17.325717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24749 22:28:17.326135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24751 22:28:17.378501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24753 22:28:17.379036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24754 22:28:17.437122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24755 22:28:17.437559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24757 22:28:17.496328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24759 22:28:17.496698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24760 22:28:17.543533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24761 22:28:17.543967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24763 22:28:17.583343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24764 22:28:17.583768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24766 22:28:17.636015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24767 22:28:17.636399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24769 22:28:17.689343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24770 22:28:17.689761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24772 22:28:17.734735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24773 22:28:17.735155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24775 22:28:17.775052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24777 22:28:17.775525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24778 22:28:17.819062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24780 22:28:17.819554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24781 22:28:17.868555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24782 22:28:17.868945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24784 22:28:17.921161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24785 22:28:17.921524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24787 22:28:17.981121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24788 22:28:17.981519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24790 22:28:18.026434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24792 22:28:18.026909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24793 22:28:18.077640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24794 22:28:18.078038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24796 22:28:18.124471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24797 22:28:18.124929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24799 22:28:18.180800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24800 22:28:18.181190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24802 22:28:18.237169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24803 22:28:18.237596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24805 22:28:18.283011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24806 22:28:18.283445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24808 22:28:18.320143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24810 22:28:18.320562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24811 22:28:18.366489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24813 22:28:18.367100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24814 22:28:18.404241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24815 22:28:18.404683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24817 22:28:18.444210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24818 22:28:18.444600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24820 22:28:18.492341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24821 22:28:18.492774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24823 22:28:18.542882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24824 22:28:18.543310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24826 22:28:18.589243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24828 22:28:18.589844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24829 22:28:18.632793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24830 22:28:18.633166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24832 22:28:18.677813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
24833 22:28:18.678311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
24835 22:28:18.733050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
24836 22:28:18.733508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
24838 22:28:18.777599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
24839 22:28:18.778170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
24841 22:28:18.822052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
24842 22:28:18.822491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
24844 22:28:18.885089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
24845 22:28:18.885503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
24847 22:28:18.931663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
24848 22:28:18.932082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
24850 22:28:18.969351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
24852 22:28:18.969823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
24853 22:28:19.013960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
24855 22:28:19.014437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
24856 22:28:19.051576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
24858 22:28:19.051991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
24859 22:28:19.088863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
24860 22:28:19.089283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
24862 22:28:19.125862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
24863 22:28:19.126296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
24865 22:28:19.162413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
24867 22:28:19.162901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
24868 22:28:19.209720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
24869 22:28:19.210142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
24871 22:28:19.255485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
24873 22:28:19.255868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
24874 22:28:19.293640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
24876 22:28:19.294311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
24877 22:28:19.332920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
24878 22:28:19.333323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
24880 22:28:19.369827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
24881 22:28:19.370200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
24883 22:28:19.408715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
24884 22:28:19.409095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
24886 22:28:19.443449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
24888 22:28:19.443851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
24889 22:28:19.479142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
24890 22:28:19.479564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
24892 22:28:19.513475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
24893 22:28:19.513931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
24895 22:28:19.548252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
24897 22:28:19.549034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
24898 22:28:19.589342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
24899 22:28:19.589781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
24901 22:28:19.622878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
24902 22:28:19.623296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
24904 22:28:19.665582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
24905 22:28:19.666007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
24907 22:28:19.706915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
24908 22:28:19.707377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
24910 22:28:19.757403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
24912 22:28:19.757848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
24913 22:28:19.791177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
24915 22:28:19.791628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
24916 22:28:19.826555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
24918 22:28:19.827032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
24919 22:28:19.862833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
24920 22:28:19.863272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
24922 22:28:19.901486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
24923 22:28:19.901936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
24925 22:28:19.947298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
24926 22:28:19.947719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
24928 22:28:19.983337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
24929 22:28:19.983778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
24931 22:28:20.020354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
24932 22:28:20.020796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
24934 22:28:20.062362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
24936 22:28:20.062834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
24937 22:28:20.099211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
24938 22:28:20.099638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
24940 22:28:20.139796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
24941 22:28:20.140244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
24943 22:28:20.177888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
24944 22:28:20.178320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
24946 22:28:20.214610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
24947 22:28:20.215062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
24949 22:28:20.251352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
24950 22:28:20.251794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
24952 22:28:20.288768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
24953 22:28:20.289235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
24955 22:28:20.327595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
24957 22:28:20.328056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
24958 22:28:20.367334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
24959 22:28:20.367828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
24961 22:28:20.403314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
24962 22:28:20.403750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
24964 22:28:20.439812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
24965 22:28:20.440198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
24967 22:28:20.480356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
24968 22:28:20.480813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
24970 22:28:20.522937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
24971 22:28:20.523362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
24973 22:28:20.561764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
24974 22:28:20.562247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
24976 22:28:20.608788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
24977 22:28:20.609143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
24979 22:28:20.653706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
24980 22:28:20.654192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
24982 22:28:20.700040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
24984 22:28:20.700596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
24985 22:28:20.737746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
24986 22:28:20.738229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
24988 22:28:20.786949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
24989 22:28:20.787374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
24991 22:28:20.834460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
24993 22:28:20.835116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
24994 22:28:20.887301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
24996 22:28:20.887753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
24997 22:28:20.936362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
24998 22:28:20.936905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25000 22:28:20.979843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25001 22:28:20.980175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25003 22:28:21.020467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25004 22:28:21.020936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25006 22:28:21.059517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25007 22:28:21.059964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25009 22:28:21.097049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25011 22:28:21.097675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25012 22:28:21.146145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25013 22:28:21.146590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25015 22:28:21.204022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25016 22:28:21.204505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25018 22:28:21.260806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25019 22:28:21.261245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25021 22:28:21.297494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25023 22:28:21.297963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25024 22:28:21.333711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25025 22:28:21.334143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25027 22:28:21.369591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25028 22:28:21.369991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25030 22:28:21.423503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25031 22:28:21.423966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25033 22:28:21.471532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25034 22:28:21.471951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25036 22:28:21.508847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25037 22:28:21.509390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25039 22:28:21.548806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25040 22:28:21.549262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25042 22:28:21.585697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25043 22:28:21.586077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25045 22:28:21.621661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25046 22:28:21.622080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25048 22:28:21.664913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25049 22:28:21.665309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25051 22:28:21.704326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25053 22:28:21.704895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25054 22:28:21.747771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25056 22:28:21.748413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25057 22:28:21.790480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25059 22:28:21.791077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25060 22:28:21.825619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25061 22:28:21.826088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25063 22:28:21.861637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25065 22:28:21.862241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25066 22:28:21.897401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25068 22:28:21.898002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25069 22:28:21.935634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25071 22:28:21.936279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25072 22:28:21.973561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25073 22:28:21.973986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25075 22:28:22.011280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25076 22:28:22.011710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25078 22:28:22.051365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25079 22:28:22.051767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25081 22:28:22.096175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25082 22:28:22.096533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25084 22:28:22.139508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25086 22:28:22.139900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25087 22:28:22.177456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25088 22:28:22.177942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25090 22:28:22.215484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25091 22:28:22.215892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25093 22:28:22.253097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25095 22:28:22.253556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25096 22:28:22.301964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25097 22:28:22.302412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25099 22:28:22.359665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25100 22:28:22.360081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25102 22:28:22.409623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25103 22:28:22.412893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25105 22:28:22.456911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25106 22:28:22.457348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25108 22:28:22.500113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25109 22:28:22.500534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25111 22:28:22.539432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25113 22:28:22.539883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25114 22:28:22.577261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25116 22:28:22.577726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25117 22:28:22.623930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25118 22:28:22.624309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25120 22:28:22.668669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25121 22:28:22.669082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25123 22:28:22.708315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25124 22:28:22.708788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25126 22:28:22.751926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25127 22:28:22.752460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25129 22:28:22.804271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25131 22:28:22.804836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25132 22:28:22.849117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25133 22:28:22.849654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25135 22:28:22.886485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25137 22:28:22.887146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25138 22:28:22.923657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25139 22:28:22.924098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25141 22:28:22.960419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25142 22:28:22.960811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25144 22:28:23.005233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25145 22:28:23.005677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25147 22:28:23.040496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25148 22:28:23.040944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25150 22:28:23.075572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25151 22:28:23.076000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25153 22:28:23.112039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25154 22:28:23.112439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25156 22:28:23.148764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25157 22:28:23.149243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25159 22:28:23.189033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25160 22:28:23.189412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25162 22:28:23.227416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25163 22:28:23.227800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25165 22:28:23.272756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25166 22:28:23.273176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25168 22:28:23.308685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25170 22:28:23.309341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25171 22:28:23.343002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25173 22:28:23.343778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25174 22:28:23.378537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25175 22:28:23.378983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25177 22:28:23.414337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25179 22:28:23.414794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25180 22:28:23.454386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25182 22:28:23.454799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25183 22:28:23.502045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25184 22:28:23.502592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25186 22:28:23.546055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25187 22:28:23.546502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25189 22:28:23.589551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25190 22:28:23.589962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25192 22:28:23.629016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25193 22:28:23.629415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25195 22:28:23.665841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25196 22:28:23.666271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25198 22:28:23.713553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25199 22:28:23.713953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25201 22:28:23.761597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25202 22:28:23.762050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25204 22:28:23.808265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25206 22:28:23.808893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25207 22:28:23.847945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25208 22:28:23.848509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25210 22:28:23.890420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25212 22:28:23.890827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25213 22:28:23.931513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25214 22:28:23.931954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25216 22:28:23.970356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25218 22:28:23.971000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25219 22:28:24.028976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25220 22:28:24.029451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25222 22:28:24.065588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25224 22:28:24.066317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25225 22:28:24.111747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25226 22:28:24.112140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25228 22:28:24.157070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25229 22:28:24.157416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25231 22:28:24.191183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25232 22:28:24.191600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25234 22:28:24.225546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25236 22:28:24.226008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25237 22:28:24.260473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25238 22:28:24.260907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25240 22:28:24.294795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25241 22:28:24.295196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25243 22:28:24.329642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25244 22:28:24.330144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25246 22:28:24.372377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25247 22:28:24.372819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25249 22:28:24.408250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25250 22:28:24.408660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25252 22:28:24.448244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25254 22:28:24.448684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25255 22:28:24.487130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25257 22:28:24.487603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25258 22:28:24.521399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25260 22:28:24.521887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25261 22:28:24.558108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25262 22:28:24.558495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25264 22:28:24.604387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25265 22:28:24.604801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25267 22:28:24.642789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25268 22:28:24.643304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25270 22:28:24.677642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25271 22:28:24.678149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25273 22:28:24.716421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25274 22:28:24.716877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25276 22:28:24.773089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25278 22:28:24.773587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25279 22:28:24.815355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25281 22:28:24.816016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25282 22:28:24.850101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25283 22:28:24.850665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25285 22:28:24.884721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25286 22:28:24.885163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25288 22:28:24.920202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25290 22:28:24.920940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25291 22:28:24.961593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25292 22:28:24.962093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25294 22:28:25.005993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25296 22:28:25.006469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25297 22:28:25.046356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25299 22:28:25.046874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25300 22:28:25.097787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25301 22:28:25.098216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25303 22:28:25.135827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25304 22:28:25.136318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25306 22:28:25.172541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25307 22:28:25.172995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25309 22:28:25.211199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25310 22:28:25.211595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25312 22:28:25.247878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25313 22:28:25.248394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25315 22:28:25.287891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25316 22:28:25.288277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25318 22:28:25.331768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25319 22:28:25.332264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25321 22:28:25.376326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25323 22:28:25.376899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25324 22:28:25.421661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25325 22:28:25.422090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25327 22:28:25.469785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25329 22:28:25.470254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25330 22:28:25.508475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25331 22:28:25.508872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25333 22:28:25.544823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25334 22:28:25.545361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25336 22:28:25.585442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25337 22:28:25.585998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25339 22:28:25.628530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25340 22:28:25.629037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25342 22:28:25.671410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25343 22:28:25.671821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25345 22:28:25.720038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25346 22:28:25.720504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25348 22:28:25.763832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25349 22:28:25.764367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25351 22:28:25.801085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25352 22:28:25.801529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25354 22:28:25.843360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25355 22:28:25.843811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25357 22:28:25.883689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25358 22:28:25.884065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25360 22:28:25.929592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25361 22:28:25.929987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25363 22:28:25.968261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25364 22:28:25.968684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25366 22:28:26.014388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25368 22:28:26.014810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25369 22:28:26.059804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25370 22:28:26.060188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25372 22:28:26.097990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25373 22:28:26.098388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25375 22:28:26.145115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25376 22:28:26.145583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25378 22:28:26.189809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25379 22:28:26.190184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25381 22:28:26.237082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25382 22:28:26.237484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25384 22:28:26.281918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25385 22:28:26.282327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25387 22:28:26.328147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25388 22:28:26.328512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25390 22:28:26.364183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25391 22:28:26.364605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25393 22:28:26.403903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25394 22:28:26.404357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25396 22:28:26.441546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25397 22:28:26.441942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25399 22:28:26.482530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25401 22:28:26.482965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25402 22:28:26.520934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25403 22:28:26.521495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25405 22:28:26.561708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25406 22:28:26.562277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25408 22:28:26.604652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25409 22:28:26.605082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25411 22:28:26.652490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25412 22:28:26.652914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25414 22:28:26.705136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25415 22:28:26.705506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25417 22:28:26.752864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25419 22:28:26.753338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25420 22:28:26.788298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25422 22:28:26.788706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25423 22:28:26.826152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25424 22:28:26.826578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25426 22:28:26.875628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25427 22:28:26.875995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25429 22:28:26.915790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25430 22:28:26.916337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25432 22:28:26.957819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25434 22:28:26.958271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25435 22:28:27.000581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25436 22:28:27.000974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25438 22:28:27.050764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25439 22:28:27.051198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25441 22:28:27.088922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25442 22:28:27.089356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25444 22:28:27.127727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25446 22:28:27.128317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25447 22:28:27.161664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25448 22:28:27.162087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25450 22:28:27.195745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25451 22:28:27.196221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25453 22:28:27.230493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25455 22:28:27.231146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25456 22:28:27.283470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25457 22:28:27.283906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25459 22:28:27.324421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25461 22:28:27.324874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25462 22:28:27.359651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25463 22:28:27.360066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25465 22:28:27.400137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25466 22:28:27.400561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25468 22:28:27.443248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25469 22:28:27.443688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25471 22:28:27.484616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25472 22:28:27.485085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25474 22:28:27.524996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25475 22:28:27.525429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25477 22:28:27.566499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25479 22:28:27.566980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25480 22:28:27.604863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25481 22:28:27.605333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25483 22:28:27.648411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25484 22:28:27.648901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25486 22:28:27.685363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25488 22:28:27.685867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25489 22:28:27.728697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25490 22:28:27.729112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25492 22:28:27.769642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25493 22:28:27.770151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25495 22:28:27.807575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25496 22:28:27.808144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25498 22:28:27.848830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25500 22:28:27.849460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25501 22:28:27.887189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25502 22:28:27.887650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25504 22:28:27.936685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25506 22:28:27.937215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25507 22:28:27.983630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25508 22:28:27.984133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25510 22:28:28.031012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25511 22:28:28.031542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25513 22:28:28.075700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25515 22:28:28.076347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25516 22:28:28.118281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25518 22:28:28.118665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25519 22:28:28.154619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25520 22:28:28.155074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25522 22:28:28.197849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25523 22:28:28.198265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25525 22:28:28.237950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25526 22:28:28.238364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25528 22:28:28.293423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25529 22:28:28.293856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25531 22:28:28.349197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25532 22:28:28.349603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25534 22:28:28.397285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25535 22:28:28.397659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25537 22:28:28.436765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25538 22:28:28.437234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25540 22:28:28.472853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25542 22:28:28.473433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25543 22:28:28.525197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25544 22:28:28.525618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25546 22:28:28.573547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25547 22:28:28.574002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25549 22:28:28.616175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25551 22:28:28.616668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25552 22:28:28.669866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25553 22:28:28.670295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25555 22:28:28.715962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25556 22:28:28.716368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25558 22:28:28.758420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25560 22:28:28.758901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25561 22:28:28.794037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25562 22:28:28.794565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25564 22:28:28.830104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25565 22:28:28.830600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25567 22:28:28.868292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25569 22:28:28.868985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25570 22:28:28.904090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25571 22:28:28.904514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25573 22:28:28.955367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25574 22:28:28.955809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25576 22:28:28.991699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25577 22:28:28.992240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25579 22:28:29.032970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25580 22:28:29.033388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25582 22:28:29.074060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25584 22:28:29.074484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25585 22:28:29.148169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25586 22:28:29.148542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25588 22:28:29.185162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25589 22:28:29.185621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25591 22:28:29.229170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25593 22:28:29.229628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25594 22:28:29.273141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25595 22:28:29.273567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25597 22:28:29.315170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25598 22:28:29.315574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25600 22:28:29.356129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25601 22:28:29.356618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25603 22:28:29.400402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25604 22:28:29.400753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25606 22:28:29.440880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25608 22:28:29.441333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25609 22:28:29.479314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25611 22:28:29.479703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25612 22:28:29.518448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25614 22:28:29.519007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25615 22:28:29.555680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25616 22:28:29.556150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25618 22:28:29.595928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25620 22:28:29.596294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25621 22:28:29.637321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25622 22:28:29.637683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25624 22:28:29.676990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25625 22:28:29.677362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25627 22:28:29.731679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25628 22:28:29.732097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25630 22:28:29.776145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25632 22:28:29.776883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25633 22:28:29.815724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25635 22:28:29.816485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25636 22:28:29.857007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25637 22:28:29.857377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25639 22:28:29.897763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25640 22:28:29.898151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25642 22:28:29.937608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25644 22:28:29.938292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25645 22:28:29.977335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25647 22:28:29.977749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25648 22:28:30.017280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25650 22:28:30.017877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25651 22:28:30.069379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25652 22:28:30.069823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25654 22:28:30.116067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25655 22:28:30.116433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25657 22:28:30.156516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25658 22:28:30.156921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25660 22:28:30.196427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25661 22:28:30.196856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25663 22:28:30.233292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25664 22:28:30.233691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25666 22:28:30.272749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25667 22:28:30.273179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25669 22:28:30.311875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25670 22:28:30.312261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25672 22:28:30.354900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25673 22:28:30.355287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25675 22:28:30.393018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25676 22:28:30.393396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25678 22:28:30.431317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25679 22:28:30.431815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25681 22:28:30.466823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25682 22:28:30.467302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25684 22:28:30.512782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25685 22:28:30.513154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25687 22:28:30.560114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25688 22:28:30.560537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25690 22:28:30.608234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25691 22:28:30.608666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25693 22:28:30.647283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25695 22:28:30.648078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25696 22:28:30.685708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25697 22:28:30.686087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25699 22:28:30.724461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25700 22:28:30.724890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25702 22:28:30.763815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25703 22:28:30.764262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25705 22:28:30.816169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25707 22:28:30.816914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25708 22:28:30.852322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25709 22:28:30.852734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25711 22:28:30.889143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25712 22:28:30.889566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25714 22:28:30.927694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25715 22:28:30.928066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25717 22:28:30.975807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25719 22:28:30.976259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25720 22:28:31.014113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25722 22:28:31.014723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25723 22:28:31.054355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25725 22:28:31.055084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25726 22:28:31.095376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25727 22:28:31.095771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25729 22:28:31.134272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25731 22:28:31.134705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25732 22:28:31.181303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25733 22:28:31.181698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25735 22:28:31.221679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25736 22:28:31.222108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25738 22:28:31.265129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25740 22:28:31.265482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25741 22:28:31.308335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25742 22:28:31.308805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25744 22:28:31.352550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25745 22:28:31.353022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25747 22:28:31.396554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25749 22:28:31.397041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25750 22:28:31.437299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25751 22:28:31.437679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25753 22:28:31.483517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25754 22:28:31.483904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25756 22:28:31.523355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25758 22:28:31.523800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25759 22:28:31.567979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25760 22:28:31.568436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25762 22:28:31.615836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25763 22:28:31.616238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25765 22:28:31.660406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25766 22:28:31.660770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25768 22:28:31.709731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25769 22:28:31.710276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25771 22:28:31.750019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25772 22:28:31.750454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25774 22:28:31.792286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25775 22:28:31.792732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25777 22:28:31.840015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25779 22:28:31.840396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25780 22:28:31.889765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25781 22:28:31.890175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25783 22:28:31.945380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25784 22:28:31.945783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25786 22:28:31.988855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25787 22:28:31.989259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25789 22:28:32.027542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25790 22:28:32.027942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25792 22:28:32.064673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25793 22:28:32.065128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25795 22:28:32.102008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25796 22:28:32.102509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25798 22:28:32.139533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25800 22:28:32.139971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25801 22:28:32.177719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25802 22:28:32.178128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25804 22:28:32.219788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25805 22:28:32.220205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25807 22:28:32.257603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25808 22:28:32.258048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25810 22:28:32.295991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25811 22:28:32.296407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25813 22:28:32.336092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25814 22:28:32.336524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25816 22:28:32.377789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25817 22:28:32.378235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25819 22:28:32.415778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25821 22:28:32.416162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25822 22:28:32.459416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25823 22:28:32.459823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25825 22:28:32.500944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25826 22:28:32.501361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25828 22:28:32.543039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25829 22:28:32.543479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25831 22:28:32.583948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
25832 22:28:32.584389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
25834 22:28:32.621688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
25836 22:28:32.622161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
25837 22:28:32.659395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
25838 22:28:32.659960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
25840 22:28:32.696257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
25841 22:28:32.696651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
25843 22:28:32.732701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
25844 22:28:32.733137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
25846 22:28:32.769281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
25848 22:28:32.769912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
25849 22:28:32.806017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
25850 22:28:32.806566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
25852 22:28:32.844652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
25853 22:28:32.845041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
25855 22:28:32.882879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
25857 22:28:32.883441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
25858 22:28:32.919509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
25859 22:28:32.919971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
25861 22:28:32.956457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
25862 22:28:32.957010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
25864 22:28:32.994959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
25865 22:28:32.995498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
25867 22:28:33.032728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
25869 22:28:33.033474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
25870 22:28:33.085974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
25872 22:28:33.086713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
25873 22:28:33.124412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
25874 22:28:33.124829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
25876 22:28:33.161904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
25877 22:28:33.162326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
25879 22:28:33.200118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
25881 22:28:33.200576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
25882 22:28:33.247654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
25883 22:28:33.248192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
25885 22:28:33.288599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
25886 22:28:33.289035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
25888 22:28:33.333510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
25890 22:28:33.334269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
25891 22:28:33.385380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
25892 22:28:33.385890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
25894 22:28:33.443204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
25895 22:28:33.443731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
25897 22:28:33.499757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
25898 22:28:33.500202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
25900 22:28:33.543859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
25901 22:28:33.544312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
25903 22:28:33.585530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
25904 22:28:33.586016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
25906 22:28:33.628900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
25908 22:28:33.629388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
25909 22:28:33.685363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
25910 22:28:33.685783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
25912 22:28:33.735919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
25913 22:28:33.736323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
25915 22:28:33.776847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
25916 22:28:33.777271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
25918 22:28:33.817059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
25920 22:28:33.817533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
25921 22:28:33.855809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
25922 22:28:33.856231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
25924 22:28:33.893798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
25926 22:28:33.894272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
25927 22:28:33.932416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
25928 22:28:33.932831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
25930 22:28:33.976825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
25931 22:28:33.977222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
25933 22:28:34.023991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
25935 22:28:34.024481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
25936 22:28:34.073446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
25937 22:28:34.073880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
25939 22:28:34.113821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
25940 22:28:34.114258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
25942 22:28:34.152099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
25943 22:28:34.152485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
25945 22:28:34.189766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
25946 22:28:34.190179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
25948 22:28:34.249716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
25949 22:28:34.250108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
25951 22:28:34.285826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
25953 22:28:34.286315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
25954 22:28:34.319851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
25955 22:28:34.320282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
25957 22:28:34.355154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
25958 22:28:34.355536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
25960 22:28:34.392721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
25961 22:28:34.393145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
25963 22:28:34.439910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
25964 22:28:34.440289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
25966 22:28:34.476455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
25967 22:28:34.476897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
25969 22:28:34.528003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
25970 22:28:34.528435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
25972 22:28:34.575971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
25973 22:28:34.576397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
25975 22:28:34.614370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
25977 22:28:34.614836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
25978 22:28:34.661010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
25980 22:28:34.661460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
25981 22:28:34.695220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
25982 22:28:34.695740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
25984 22:28:34.730270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
25986 22:28:34.730743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
25987 22:28:34.765417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
25988 22:28:34.765851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
25990 22:28:34.801812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
25991 22:28:34.802248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
25993 22:28:34.837163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
25994 22:28:34.837593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
25996 22:28:34.871188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
25997 22:28:34.871670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
25999 22:28:34.905842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26000 22:28:34.906320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26002 22:28:34.939793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26003 22:28:34.940299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26005 22:28:34.975979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26006 22:28:34.976437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26008 22:28:35.023016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26009 22:28:35.023393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26011 22:28:35.057362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26012 22:28:35.057740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26014 22:28:35.090382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26016 22:28:35.090769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26017 22:28:35.128937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26018 22:28:35.129504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26020 22:28:35.180939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26021 22:28:35.181341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26023 22:28:35.236207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26024 22:28:35.236639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26026 22:28:35.277640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26028 22:28:35.278128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26029 22:28:35.319376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26031 22:28:35.319841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26032 22:28:35.358478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26034 22:28:35.358953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26035 22:28:35.404836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26036 22:28:35.405225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26038 22:28:35.442787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26040 22:28:35.443245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26041 22:28:35.476370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26042 22:28:35.476896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26044 22:28:35.514326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26046 22:28:35.514728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26047 22:28:35.549916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26048 22:28:35.550325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26050 22:28:35.585670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26051 22:28:35.586059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26053 22:28:35.619242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26055 22:28:35.619968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26056 22:28:35.657818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26057 22:28:35.658361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26059 22:28:35.694694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26060 22:28:35.695132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26062 22:28:35.728607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26064 22:28:35.729309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26065 22:28:35.765843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26067 22:28:35.766500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26068 22:28:35.812680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26069 22:28:35.813240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26071 22:28:35.852034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26072 22:28:35.852424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26074 22:28:35.887602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26075 22:28:35.888008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26077 22:28:35.922888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26078 22:28:35.923307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26080 22:28:35.959557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26081 22:28:35.960025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26083 22:28:35.994954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26085 22:28:35.995670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26086 22:28:36.028796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26087 22:28:36.029267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26089 22:28:36.064176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26090 22:28:36.064654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26092 22:28:36.100787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26093 22:28:36.101257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26095 22:28:36.137768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26096 22:28:36.138179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26098 22:28:36.176239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26099 22:28:36.176816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26101 22:28:36.215685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26103 22:28:36.216432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26104 22:28:36.256036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26105 22:28:36.256472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26107 22:28:36.297095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26108 22:28:36.297470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26110 22:28:36.336246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26111 22:28:36.336639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26113 22:28:36.376040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26114 22:28:36.376460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26116 22:28:36.417375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26117 22:28:36.417825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26119 22:28:36.457226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26120 22:28:36.457663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26122 22:28:36.495574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26124 22:28:36.496044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26125 22:28:36.528983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26126 22:28:36.529360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26128 22:28:36.563244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26129 22:28:36.563663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26131 22:28:36.600090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26133 22:28:36.600554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26134 22:28:36.635266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26135 22:28:36.635648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26137 22:28:36.669677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26139 22:28:36.670130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26140 22:28:36.705535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26141 22:28:36.705917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26143 22:28:36.741291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26144 22:28:36.741693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26146 22:28:36.775169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26147 22:28:36.775705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26149 22:28:36.810403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26151 22:28:36.810879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26152 22:28:36.845385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26153 22:28:36.845794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26155 22:28:36.878986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26156 22:28:36.879556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26158 22:28:36.928033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26159 22:28:36.928445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26161 22:28:36.962407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26163 22:28:36.962877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26164 22:28:37.006345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26166 22:28:37.006733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26167 22:28:37.052579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26168 22:28:37.052984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26170 22:28:37.101778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26171 22:28:37.102158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26173 22:28:37.136557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26174 22:28:37.136969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26176 22:28:37.173603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26177 22:28:37.174043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26179 22:28:37.207543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26180 22:28:37.207938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26182 22:28:37.241335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26183 22:28:37.241676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26185 22:28:37.277628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26186 22:28:37.278206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26188 22:28:37.320192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26189 22:28:37.320608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26191 22:28:37.355121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26192 22:28:37.355586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26194 22:28:37.391871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26195 22:28:37.392285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26197 22:28:37.429974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26198 22:28:37.430405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26200 22:28:37.469568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26201 22:28:37.469970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26203 22:28:37.508145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26205 22:28:37.508936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26206 22:28:37.551743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26207 22:28:37.552102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26209 22:28:37.592613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26211 22:28:37.593114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26212 22:28:37.636912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26213 22:28:37.637313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26215 22:28:37.672164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26216 22:28:37.672579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26218 22:28:37.718172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26219 22:28:37.718634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26221 22:28:37.756352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26222 22:28:37.756768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26224 22:28:37.800071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26225 22:28:37.800492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26227 22:28:37.841535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26229 22:28:37.842021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26230 22:28:37.891118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26231 22:28:37.891512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26233 22:28:37.929719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26234 22:28:37.930155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26236 22:28:37.972650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26237 22:28:37.973083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26239 22:28:38.008950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26240 22:28:38.009469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26242 22:28:38.043143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26244 22:28:38.043653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26245 22:28:38.076984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26247 22:28:38.077742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26248 22:28:38.118741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26250 22:28:38.119121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26251 22:28:38.151945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26252 22:28:38.152336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26254 22:28:38.187149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26255 22:28:38.187568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26257 22:28:38.227094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26258 22:28:38.227525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26260 22:28:38.262372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26262 22:28:38.262837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26263 22:28:38.300625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26264 22:28:38.301042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26266 22:28:38.335808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26267 22:28:38.336253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26269 22:28:38.373361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26271 22:28:38.373812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26272 22:28:38.412237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26273 22:28:38.412619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26275 22:28:38.459584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26276 22:28:38.459962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26278 22:28:38.501076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26279 22:28:38.501461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26281 22:28:38.549683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26282 22:28:38.550171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26284 22:28:38.609123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26285 22:28:38.609571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26287 22:28:38.648959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26288 22:28:38.649368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26290 22:28:38.692015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26291 22:28:38.692434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26293 22:28:38.732512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26294 22:28:38.732971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26296 22:28:38.776046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26298 22:28:38.776515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26299 22:28:38.816890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26300 22:28:38.817305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26302 22:28:38.864475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26303 22:28:38.864857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26305 22:28:38.900396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26307 22:28:38.900858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26308 22:28:38.934913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26309 22:28:38.935333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26311 22:28:38.971621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26312 22:28:38.972005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26314 22:28:39.010774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26315 22:28:39.011151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26317 22:28:39.052997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26319 22:28:39.053756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26320 22:28:39.093386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26322 22:28:39.094129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26323 22:28:39.134338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26325 22:28:39.134986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26326 22:28:39.168841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26327 22:28:39.169302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26329 22:28:39.204943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26331 22:28:39.205570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26332 22:28:39.249777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26333 22:28:39.250199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26335 22:28:39.291533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26336 22:28:39.291989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26338 22:28:39.329331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26340 22:28:39.329995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26341 22:28:39.391414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26342 22:28:39.391854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26344 22:28:39.427666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26345 22:28:39.428061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26347 22:28:39.464484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26348 22:28:39.465041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26350 22:28:39.499709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26352 22:28:39.500265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26353 22:28:39.547065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26355 22:28:39.547551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26356 22:28:39.583654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26357 22:28:39.584079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26359 22:28:39.627880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26361 22:28:39.628488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26362 22:28:39.675856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26363 22:28:39.676251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26365 22:28:39.712863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26366 22:28:39.713305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26368 22:28:39.749302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26369 22:28:39.749831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26371 22:28:39.784947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26372 22:28:39.785394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26374 22:28:39.830180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26376 22:28:39.830603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26377 22:28:39.865703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26379 22:28:39.866123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26380 22:28:39.910953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26381 22:28:39.911336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26383 22:28:39.949903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26384 22:28:39.950329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26386 22:28:39.984323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26387 22:28:39.984772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26389 22:28:40.018551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26391 22:28:40.019301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26392 22:28:40.055677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26393 22:28:40.056057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26395 22:28:40.088268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26396 22:28:40.088691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26398 22:28:40.125722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26399 22:28:40.126149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26401 22:28:40.168496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26402 22:28:40.168885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26404 22:28:40.203290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26405 22:28:40.203727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26407 22:28:40.241180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26408 22:28:40.241584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26410 22:28:40.278725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26411 22:28:40.279149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26413 22:28:40.320136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26414 22:28:40.320633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26416 22:28:40.359418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26417 22:28:40.359869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26419 22:28:40.401283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26420 22:28:40.401682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26422 22:28:40.436790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26423 22:28:40.437296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26425 22:28:40.469640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26426 22:28:40.470088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26428 22:28:40.514994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26429 22:28:40.515463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26431 22:28:40.564404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26432 22:28:40.564969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26434 22:28:40.605478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26435 22:28:40.605979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26437 22:28:40.643878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26438 22:28:40.644438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26440 22:28:40.680212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26441 22:28:40.680575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26443 22:28:40.715581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26445 22:28:40.716236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26446 22:28:40.766354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26448 22:28:40.766975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26449 22:28:40.819607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26450 22:28:40.819988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26452 22:28:40.857713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26454 22:28:40.858178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26455 22:28:40.893771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26456 22:28:40.894164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26458 22:28:40.931744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26459 22:28:40.932216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26461 22:28:40.965821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26462 22:28:40.966211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26464 22:28:41.004690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26465 22:28:41.005174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26467 22:28:41.052210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26468 22:28:41.052589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26470 22:28:41.100889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26471 22:28:41.101308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26473 22:28:41.147093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26474 22:28:41.147482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26476 22:28:41.184099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26477 22:28:41.184603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26479 22:28:41.220883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26480 22:28:41.221310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26482 22:28:41.257168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26483 22:28:41.257703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26485 22:28:41.299046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26486 22:28:41.299475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26488 22:28:41.342233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26490 22:28:41.342675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26491 22:28:41.377617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26492 22:28:41.378018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26494 22:28:41.421119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26496 22:28:41.421573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26497 22:28:41.458306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26499 22:28:41.458869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26500 22:28:41.492712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26501 22:28:41.493118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26503 22:28:41.537280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26504 22:28:41.537791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26506 22:28:41.580636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26508 22:28:41.581252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26509 22:28:41.616288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26510 22:28:41.616797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26512 22:28:41.651568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26513 22:28:41.652006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26515 22:28:41.687544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26516 22:28:41.687957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26518 22:28:41.725033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26519 22:28:41.725479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26521 22:28:41.761203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26522 22:28:41.761657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26524 22:28:41.795545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26525 22:28:41.795987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26527 22:28:41.831648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26528 22:28:41.832219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26530 22:28:41.873901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26531 22:28:41.874332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26533 22:28:41.912279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26534 22:28:41.912811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26536 22:28:41.951994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26537 22:28:41.952418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26539 22:28:41.986321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26541 22:28:41.986791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26542 22:28:42.021629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26544 22:28:42.022310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26545 22:28:42.056634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26546 22:28:42.057094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26548 22:28:42.090450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26550 22:28:42.091068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26551 22:28:42.124653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26552 22:28:42.125118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26554 22:28:42.159605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26556 22:28:42.160061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26557 22:28:42.194626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26558 22:28:42.195120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26560 22:28:42.229028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26561 22:28:42.229499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26563 22:28:42.283270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26565 22:28:42.283767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26566 22:28:42.322700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26567 22:28:42.323139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26569 22:28:42.360832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26570 22:28:42.361290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26572 22:28:42.399404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26573 22:28:42.399822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26575 22:28:42.435321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26577 22:28:42.436103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26578 22:28:42.476185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26579 22:28:42.476753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26581 22:28:42.529955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26582 22:28:42.530457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26584 22:28:42.585498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26585 22:28:42.585942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26587 22:28:42.635761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26588 22:28:42.636187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26590 22:28:42.679804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26591 22:28:42.680187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26593 22:28:42.717083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26594 22:28:42.717513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26596 22:28:42.757377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26597 22:28:42.757834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26599 22:28:42.801774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26600 22:28:42.802214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26602 22:28:42.836914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26604 22:28:42.837385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26605 22:28:42.870610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26606 22:28:42.871119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26608 22:28:42.905173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26609 22:28:42.905588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26611 22:28:42.939562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26612 22:28:42.939977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26614 22:28:42.973084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26616 22:28:42.973525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26617 22:28:43.006390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26619 22:28:43.006867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26620 22:28:43.039676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26622 22:28:43.040268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26623 22:28:43.080080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26624 22:28:43.080555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26626 22:28:43.117599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26627 22:28:43.118181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26629 22:28:43.152284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26630 22:28:43.152739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26632 22:28:43.186999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26633 22:28:43.187504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26635 22:28:43.222387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26637 22:28:43.223147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26638 22:28:43.258786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26639 22:28:43.259244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26641 22:28:43.293045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26643 22:28:43.293476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26644 22:28:43.329461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26645 22:28:43.329853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26647 22:28:43.366337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26649 22:28:43.366748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26650 22:28:43.401195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26652 22:28:43.401656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26653 22:28:43.435092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26654 22:28:43.435515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26656 22:28:43.471820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26657 22:28:43.472201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26659 22:28:43.507508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26660 22:28:43.507942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26662 22:28:43.545527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26664 22:28:43.546313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26665 22:28:43.583577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26666 22:28:43.584034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26668 22:28:43.621292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26670 22:28:43.622103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26671 22:28:43.672135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26673 22:28:43.672544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26674 22:28:43.711898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26675 22:28:43.712279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26677 22:28:43.757739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26679 22:28:43.758159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26680 22:28:43.795643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26681 22:28:43.796013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26683 22:28:43.830710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26685 22:28:43.831121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26686 22:28:43.867796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26688 22:28:43.868222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26689 22:28:43.903703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26691 22:28:43.904187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26692 22:28:43.939782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26693 22:28:43.940204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26695 22:28:43.976212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26696 22:28:43.976601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26698 22:28:44.011367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26699 22:28:44.011787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26701 22:28:44.048905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26703 22:28:44.049671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26704 22:28:44.088893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26706 22:28:44.089463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26707 22:28:44.123438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26708 22:28:44.123941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26710 22:28:44.157816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26711 22:28:44.158233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26713 22:28:44.193599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26714 22:28:44.193995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26716 22:28:44.227702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26717 22:28:44.228105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26719 22:28:44.270421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26721 22:28:44.270916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26722 22:28:44.308566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26723 22:28:44.308947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26725 22:28:44.342277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26727 22:28:44.342699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26728 22:28:44.377991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26729 22:28:44.378412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26731 22:28:44.413558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26732 22:28:44.413959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26734 22:28:44.461076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26735 22:28:44.461499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26737 22:28:44.520852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26738 22:28:44.521341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26740 22:28:44.565971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26741 22:28:44.566471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26743 22:28:44.603079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26744 22:28:44.603512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26746 22:28:44.637683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26747 22:28:44.638118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26749 22:28:44.672845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26750 22:28:44.673224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26752 22:28:44.709769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26753 22:28:44.710235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26755 22:28:44.745193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26756 22:28:44.745609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26758 22:28:44.781087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26759 22:28:44.781535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26761 22:28:44.814996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26762 22:28:44.815374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26764 22:28:44.851643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26765 22:28:44.852026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26767 22:28:44.887248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26769 22:28:44.887711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26770 22:28:44.928038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26771 22:28:44.928523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26773 22:28:44.968832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26774 22:28:44.969209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26776 22:28:45.001786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26777 22:28:45.002232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26779 22:28:45.039142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26781 22:28:45.039606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26782 22:28:45.075508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26783 22:28:45.075900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26785 22:28:45.111296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26786 22:28:45.111798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26788 22:28:45.145575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26789 22:28:45.145992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26791 22:28:45.187809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26792 22:28:45.188213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26794 22:28:45.225669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26795 22:28:45.226167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26797 22:28:45.263027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26799 22:28:45.263625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26800 22:28:45.299624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26801 22:28:45.300054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26803 22:28:45.334699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26804 22:28:45.335123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26806 22:28:45.369458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26807 22:28:45.369882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26809 22:28:45.403518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26810 22:28:45.403993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26812 22:28:45.438083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26813 22:28:45.438509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26815 22:28:45.475288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26816 22:28:45.475787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26818 22:28:45.511462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26819 22:28:45.511948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26821 22:28:45.550910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26823 22:28:45.551504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26824 22:28:45.586400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26826 22:28:45.586821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26827 22:28:45.628649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26828 22:28:45.629099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26830 22:28:45.667756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
26832 22:28:45.668174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26833 22:28:45.704929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
26835 22:28:45.705358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
26836 22:28:45.743744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
26837 22:28:45.744119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
26839 22:28:45.785358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
26840 22:28:45.785780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
26842 22:28:45.824969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
26844 22:28:45.825424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
26845 22:28:45.862346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
26847 22:28:45.862781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
26848 22:28:45.899614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
26849 22:28:45.900017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
26851 22:28:45.937194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
26853 22:28:45.937671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
26854 22:28:45.973798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
26856 22:28:45.974374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
26857 22:28:46.008681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
26859 22:28:46.009138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
26860 22:28:46.045424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
26862 22:28:46.045902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
26863 22:28:46.087685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
26864 22:28:46.088098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
26866 22:28:46.123319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
26867 22:28:46.123738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
26869 22:28:46.164063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
26871 22:28:46.164492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
26872 22:28:46.203278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
26873 22:28:46.203699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
26875 22:28:46.256364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
26876 22:28:46.256788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
26878 22:28:46.295919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
26879 22:28:46.296405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
26881 22:28:46.335846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
26883 22:28:46.336320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
26884 22:28:46.374501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
26886 22:28:46.374959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
26887 22:28:46.419804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
26888 22:28:46.420316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
26890 22:28:46.456477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
26892 22:28:46.456851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
26893 22:28:46.494897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
26894 22:28:46.495295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
26896 22:28:46.535552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
26897 22:28:46.535971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
26899 22:28:46.574915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
26900 22:28:46.575287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
26902 22:28:46.616752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
26903 22:28:46.617118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
26905 22:28:46.665823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
26907 22:28:46.666456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
26908 22:28:46.715715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
26910 22:28:46.716050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
26911 22:28:46.764773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
26912 22:28:46.765230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
26914 22:28:46.813146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
26915 22:28:46.813584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
26917 22:28:46.855578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
26919 22:28:46.856333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
26920 22:28:46.902009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
26921 22:28:46.902435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
26923 22:28:46.944639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
26924 22:28:46.945059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
26926 22:28:46.984310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
26927 22:28:46.984730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
26929 22:28:47.024713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
26931 22:28:47.025084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
26932 22:28:47.064838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
26933 22:28:47.065252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
26935 22:28:47.109105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
26936 22:28:47.109496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
26938 22:28:47.155721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
26939 22:28:47.156130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
26941 22:28:47.195427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
26942 22:28:47.195857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
26944 22:28:47.242384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
26946 22:28:47.243012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
26947 22:28:47.279478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
26949 22:28:47.279931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
26950 22:28:47.320503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
26952 22:28:47.320868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
26953 22:28:47.360682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
26954 22:28:47.361064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
26956 22:28:47.403053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
26957 22:28:47.403477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
26959 22:28:47.458450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
26961 22:28:47.459008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
26962 22:28:47.516297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
26963 22:28:47.516698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
26965 22:28:47.575245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
26967 22:28:47.575667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
26968 22:28:47.633135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
26969 22:28:47.633533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
26971 22:28:47.685655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
26972 22:28:47.686014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
26974 22:28:47.722878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
26975 22:28:47.723275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
26977 22:28:47.759486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
26979 22:28:47.759904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
26980 22:28:47.795947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
26982 22:28:47.796362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
26983 22:28:47.832345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
26984 22:28:47.832728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
26986 22:28:47.868611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
26987 22:28:47.868966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
26989 22:28:47.904745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
26990 22:28:47.905160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
26992 22:28:47.941559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
26993 22:28:47.941910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
26995 22:28:47.978634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
26996 22:28:47.979086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
26998 22:28:48.014904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27000 22:28:48.015323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27001 22:28:48.051995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27003 22:28:48.052445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27004 22:28:48.089668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27005 22:28:48.090118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27007 22:28:48.127391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27008 22:28:48.127841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27010 22:28:48.164293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27012 22:28:48.164748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27013 22:28:48.201097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27015 22:28:48.201555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27016 22:28:48.241256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27017 22:28:48.241703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27019 22:28:48.277769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27021 22:28:48.278214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27022 22:28:48.314003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27023 22:28:48.314450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27025 22:28:48.350750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27027 22:28:48.351209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27028 22:28:48.390826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27029 22:28:48.391252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27031 22:28:48.427954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27033 22:28:48.428406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27034 22:28:48.466420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27036 22:28:48.466900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27037 22:28:48.503329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27038 22:28:48.503739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27040 22:28:48.539777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27041 22:28:48.540175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27043 22:28:48.581733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27044 22:28:48.582213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27046 22:28:48.642388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27048 22:28:48.643160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27049 22:28:48.707031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27050 22:28:48.707456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27052 22:28:48.754960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27053 22:28:48.755440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27055 22:28:48.793488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27057 22:28:48.793947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27058 22:28:48.843741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27059 22:28:48.844277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27061 22:28:48.884195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27062 22:28:48.884643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27064 22:28:48.928476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27066 22:28:48.929227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27067 22:28:48.969983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27068 22:28:48.970387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27070 22:28:49.009663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27071 22:28:49.010025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27073 22:28:49.049197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27075 22:28:49.049783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27076 22:28:49.087544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27077 22:28:49.088058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27079 22:28:49.127837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27080 22:28:49.128155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27082 22:28:49.176341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27083 22:28:49.176720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27085 22:28:49.215998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27087 22:28:49.216410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27088 22:28:49.269658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27089 22:28:49.270078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27091 22:28:49.318896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27092 22:28:49.319448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27094 22:28:49.356727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27095 22:28:49.357151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27097 22:28:49.391016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27098 22:28:49.391458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27100 22:28:49.425805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27102 22:28:49.426556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27103 22:28:49.461834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27104 22:28:49.462331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27106 22:28:49.499498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27108 22:28:49.499931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27109 22:28:49.535715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27110 22:28:49.536136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27112 22:28:49.571512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27114 22:28:49.571949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27115 22:28:49.628852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27117 22:28:49.629555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27118 22:28:49.668815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27119 22:28:49.669217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27121 22:28:49.706103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27122 22:28:49.706531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27124 22:28:49.748282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27125 22:28:49.748670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27127 22:28:49.801381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27129 22:28:49.801853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27130 22:28:49.839577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27131 22:28:49.839978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27133 22:28:49.876470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27134 22:28:49.876884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27136 22:28:49.911978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27137 22:28:49.912420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27139 22:28:49.948416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27141 22:28:49.948883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27142 22:28:49.985265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27143 22:28:49.985685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27145 22:28:50.023297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27146 22:28:50.023706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27148 22:28:50.057926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27149 22:28:50.058340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27151 22:28:50.093934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27153 22:28:50.094412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27154 22:28:50.132677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27155 22:28:50.133065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27157 22:28:50.170385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27159 22:28:50.170869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27160 22:28:50.223882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27161 22:28:50.224329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27163 22:28:50.263868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27165 22:28:50.264291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27166 22:28:50.304178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27167 22:28:50.304605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27169 22:28:50.345439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27171 22:28:50.345931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27172 22:28:50.391932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27174 22:28:50.392401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27175 22:28:50.445501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27176 22:28:50.445934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27178 22:28:50.495286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27180 22:28:50.496090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27181 22:28:50.543845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27182 22:28:50.544328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27184 22:28:50.582910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27185 22:28:50.583329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27187 22:28:50.628058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27188 22:28:50.628484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27190 22:28:50.668577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27192 22:28:50.669037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27193 22:28:50.709115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27194 22:28:50.709530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27196 22:28:50.748240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27198 22:28:50.749012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27199 22:28:50.788739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27200 22:28:50.789130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27202 22:28:50.832564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27203 22:28:50.832981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27205 22:28:50.870408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27207 22:28:50.871094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27208 22:28:50.915475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27209 22:28:50.915865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27211 22:28:50.961519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27213 22:28:50.961985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27214 22:28:51.001091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27216 22:28:51.001524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27217 22:28:51.049236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27218 22:28:51.049666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27220 22:28:51.096029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27221 22:28:51.096442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27223 22:28:51.132822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27224 22:28:51.133187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27226 22:28:51.169906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27228 22:28:51.170298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27229 22:28:51.207523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27230 22:28:51.207930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27232 22:28:51.244630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27234 22:28:51.245072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27235 22:28:51.281371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27237 22:28:51.281839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27238 22:28:51.319952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27239 22:28:51.320517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27241 22:28:51.369368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27242 22:28:51.369762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27244 22:28:51.426577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27246 22:28:51.427048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27247 22:28:51.470368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27249 22:28:51.470898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27250 22:28:51.508688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27251 22:28:51.509102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27253 22:28:51.549478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27254 22:28:51.549943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27256 22:28:51.591260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27257 22:28:51.591673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27259 22:28:51.639514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27261 22:28:51.639965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27262 22:28:51.674965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27263 22:28:51.675400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27265 22:28:51.715649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27266 22:28:51.716081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27268 22:28:51.761503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27269 22:28:51.761949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27271 22:28:51.820748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27272 22:28:51.821154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27274 22:28:51.861162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27275 22:28:51.861571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27277 22:28:51.907416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27278 22:28:51.907762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27280 22:28:51.949285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27281 22:28:51.949682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27283 22:28:51.992119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27284 22:28:51.992550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27286 22:28:52.038150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27287 22:28:52.038520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27289 22:28:52.072712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27290 22:28:52.073090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27292 22:28:52.111122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27293 22:28:52.111471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27295 22:28:52.152020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27296 22:28:52.152365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27298 22:28:52.203055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27299 22:28:52.203513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27301 22:28:52.244537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27303 22:28:52.245019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27304 22:28:52.281973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27306 22:28:52.282551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27307 22:28:52.332715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27309 22:28:52.333172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27310 22:28:52.376303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27312 22:28:52.376761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27313 22:28:52.415532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27314 22:28:52.415910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27316 22:28:52.461973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27318 22:28:52.462545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27319 22:28:52.504427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27320 22:28:52.504849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27322 22:28:52.541275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27324 22:28:52.541747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27325 22:28:52.597625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27327 22:28:52.598255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27328 22:28:52.645579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27329 22:28:52.646013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27331 22:28:52.689662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27333 22:28:52.690079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27334 22:28:52.728985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27335 22:28:52.729420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27337 22:28:52.771158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27338 22:28:52.771585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27340 22:28:52.820891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27342 22:28:52.821398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27343 22:28:52.860393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27344 22:28:52.860821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27346 22:28:52.902323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27348 22:28:52.902802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27349 22:28:52.941060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27350 22:28:52.941510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27352 22:28:52.985624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27353 22:28:52.986060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27355 22:28:53.030608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27357 22:28:53.031075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27358 22:28:53.072436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27360 22:28:53.072900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27361 22:28:53.117835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27362 22:28:53.118343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27364 22:28:53.177172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27365 22:28:53.177709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27367 22:28:53.225896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27368 22:28:53.226330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27370 22:28:53.284488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27371 22:28:53.284929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27373 22:28:53.323698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27374 22:28:53.324147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27376 22:28:53.365403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27377 22:28:53.365854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27379 22:28:53.405690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27380 22:28:53.406107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27382 22:28:53.447558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27383 22:28:53.448005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27385 22:28:53.494185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27387 22:28:53.494602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27388 22:28:53.556952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27389 22:28:53.557340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27391 22:28:53.621193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27392 22:28:53.621682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27394 22:28:53.663730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27396 22:28:53.664147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27397 22:28:53.704693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27398 22:28:53.705143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27400 22:28:53.743883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27401 22:28:53.744278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27403 22:28:53.782568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27405 22:28:53.783176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27406 22:28:53.824316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27408 22:28:53.824745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27409 22:28:53.863112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27411 22:28:53.863590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27412 22:28:53.903295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27413 22:28:53.903732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27415 22:28:53.961620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27416 22:28:53.962077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27418 22:28:54.004559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27419 22:28:54.005104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27421 22:28:54.043624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27423 22:28:54.044085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27424 22:28:54.082306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27426 22:28:54.082765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27427 22:28:54.122084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27428 22:28:54.122521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27430 22:28:54.162508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27432 22:28:54.163101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27433 22:28:54.202106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27435 22:28:54.202585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27436 22:28:54.255330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27437 22:28:54.255758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27439 22:28:54.317840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27441 22:28:54.318319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27442 22:28:54.357226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27443 22:28:54.357665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27445 22:28:54.397800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27446 22:28:54.398225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27448 22:28:54.461933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27449 22:28:54.462371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27451 22:28:54.501497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27453 22:28:54.501873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27454 22:28:54.543703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27455 22:28:54.544143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27457 22:28:54.583105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27459 22:28:54.583590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27460 22:28:54.625689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27461 22:28:54.626119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27463 22:28:54.675787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27464 22:28:54.676170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27466 22:28:54.746562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27468 22:28:54.747038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27469 22:28:54.785268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27470 22:28:54.785685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27472 22:28:54.828490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27473 22:28:54.828924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27475 22:28:54.869640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27476 22:28:54.870027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27478 22:28:54.914421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27480 22:28:54.914818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27481 22:28:54.961755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27482 22:28:54.962222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27484 22:28:54.998000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27485 22:28:54.998451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27487 22:28:55.042958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27488 22:28:55.043426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27490 22:28:55.089597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27491 22:28:55.090030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27493 22:28:55.142419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27495 22:28:55.142918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27496 22:28:55.184454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27497 22:28:55.184899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27499 22:28:55.220967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27501 22:28:55.221389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27502 22:28:55.268007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27503 22:28:55.268441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27505 22:28:55.309348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27506 22:28:55.309779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27508 22:28:55.355457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27509 22:28:55.355881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27511 22:28:55.396081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27512 22:28:55.396530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27514 22:28:55.443650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27515 22:28:55.444106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27517 22:28:55.483636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27518 22:28:55.484012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27520 22:28:55.543275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27521 22:28:55.543704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27523 22:28:55.598166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27525 22:28:55.598904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27526 22:28:55.637722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27528 22:28:55.638203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27529 22:28:55.676885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27531 22:28:55.677264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27532 22:28:55.720403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27534 22:28:55.720999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27535 22:28:55.776963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27536 22:28:55.777389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27538 22:28:55.814972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27539 22:28:55.815411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27541 22:28:55.858934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27542 22:28:55.859323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27544 22:28:55.896634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27546 22:28:55.897058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27547 22:28:55.933904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27549 22:28:55.934395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27550 22:28:55.972892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27551 22:28:55.973347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27553 22:28:56.014220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27554 22:28:56.014662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27556 22:28:56.057678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27557 22:28:56.058142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27559 22:28:56.103705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27560 22:28:56.104122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27562 22:28:56.143441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27563 22:28:56.143918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27565 22:28:56.201344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27567 22:28:56.201806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27568 22:28:56.251322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27569 22:28:56.251773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27571 22:28:56.285850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27572 22:28:56.286433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27574 22:28:56.321499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27575 22:28:56.321905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27577 22:28:56.365203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27578 22:28:56.365609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27580 22:28:56.409580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27581 22:28:56.410028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27583 22:28:56.448989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27584 22:28:56.449415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27586 22:28:56.488898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27587 22:28:56.489328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27589 22:28:56.527864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27591 22:28:56.528325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27592 22:28:56.568235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27594 22:28:56.568705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27595 22:28:56.619765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27597 22:28:56.620232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27598 22:28:56.665887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27600 22:28:56.666298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27601 22:28:56.699583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27602 22:28:56.700040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27604 22:28:56.739349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27606 22:28:56.740044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27607 22:28:56.781457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27609 22:28:56.781985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27610 22:28:56.835431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27612 22:28:56.835865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27613 22:28:56.883972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27614 22:28:56.884379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27616 22:28:56.932347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27617 22:28:56.932779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27619 22:28:56.971457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27620 22:28:56.971829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27622 22:28:57.015729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27623 22:28:57.016162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27625 22:28:57.053642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27626 22:28:57.054067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27628 22:28:57.089682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27629 22:28:57.090070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27631 22:28:57.126021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27632 22:28:57.126450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27634 22:28:57.164134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27636 22:28:57.164621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27637 22:28:57.202115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27639 22:28:57.202593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27640 22:28:57.239694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27641 22:28:57.240186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27643 22:28:57.275803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27644 22:28:57.276300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27646 22:28:57.312146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27647 22:28:57.312557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27649 22:28:57.360086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27650 22:28:57.360470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27652 22:28:57.395812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27654 22:28:57.396255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27655 22:28:57.431744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27657 22:28:57.432204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27658 22:28:57.467527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27660 22:28:57.468170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27661 22:28:57.506813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27662 22:28:57.507246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27664 22:28:57.545892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27666 22:28:57.546611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27667 22:28:57.591424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27668 22:28:57.591830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27670 22:28:57.639352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27672 22:28:57.639980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27673 22:28:57.688071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27675 22:28:57.688484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27676 22:28:57.734135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27678 22:28:57.734598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27679 22:28:57.778163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27681 22:28:57.778724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27682 22:28:57.822482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27684 22:28:57.822936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27685 22:28:57.859506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27686 22:28:57.859956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27688 22:28:57.895813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27690 22:28:57.896270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27691 22:28:57.936212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27692 22:28:57.936648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27694 22:28:57.973569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27695 22:28:57.974120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27697 22:28:58.012573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27698 22:28:58.013094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27700 22:28:58.053651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27702 22:28:58.054070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27703 22:28:58.104718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27705 22:28:58.105259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27706 22:28:58.149940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27707 22:28:58.150464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27709 22:28:58.187413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27710 22:28:58.187785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27712 22:28:58.225091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27713 22:28:58.225406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27715 22:28:58.262777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27716 22:28:58.263170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27718 22:28:58.301199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27719 22:28:58.301629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27721 22:28:58.337854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27722 22:28:58.338362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27724 22:28:58.373675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27726 22:28:58.374331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27727 22:28:58.409197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27728 22:28:58.409688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27730 22:28:58.444652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27732 22:28:58.445292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27733 22:28:58.480331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27734 22:28:58.480803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27736 22:28:58.516564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27737 22:28:58.516992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27739 22:28:58.556396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27740 22:28:58.556809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27742 22:28:58.594991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27744 22:28:58.595589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27745 22:28:58.631507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27746 22:28:58.632056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27748 22:28:58.672675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27750 22:28:58.673103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27751 22:28:58.713968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27753 22:28:58.714441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27754 22:28:58.758101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27755 22:28:58.758533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27757 22:28:58.807684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27759 22:28:58.808131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27760 22:28:58.845598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27761 22:28:58.846015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27763 22:28:58.884115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27764 22:28:58.884524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27766 22:28:58.919938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27767 22:28:58.920412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27769 22:28:58.955666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27770 22:28:58.956157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27772 22:28:58.991513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27774 22:28:58.992169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27775 22:28:59.032220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27777 22:28:59.032705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27778 22:28:59.068659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27779 22:28:59.069107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27781 22:28:59.104955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27783 22:28:59.105440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27784 22:28:59.140191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27785 22:28:59.140627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27787 22:28:59.175796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27788 22:28:59.176271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27790 22:28:59.211898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27792 22:28:59.212599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27793 22:28:59.248478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27794 22:28:59.248919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27796 22:28:59.284301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27798 22:28:59.284858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27799 22:28:59.323450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27800 22:28:59.323958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27802 22:28:59.364923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27803 22:28:59.365415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27805 22:28:59.412689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27806 22:28:59.413265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27808 22:28:59.456179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27809 22:28:59.456632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27811 22:28:59.497723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27812 22:28:59.498273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27814 22:28:59.547373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27816 22:28:59.548028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27817 22:28:59.597876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27818 22:28:59.598403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27820 22:28:59.637343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27821 22:28:59.637817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27823 22:28:59.675558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27824 22:28:59.675986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27826 22:28:59.711404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27827 22:28:59.711833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27829 22:28:59.747069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27831 22:28:59.747484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27832 22:28:59.783500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
27834 22:28:59.784200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
27835 22:28:59.819312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
27837 22:28:59.819878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
27838 22:28:59.876210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
27839 22:28:59.876655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
27841 22:28:59.911796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
27842 22:28:59.912238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
27844 22:28:59.951494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
27845 22:28:59.952052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
27847 22:29:00.006309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
27849 22:29:00.006955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
27850 22:29:00.055795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
27851 22:29:00.056348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
27853 22:29:00.095981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
27854 22:29:00.096372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
27856 22:29:00.140257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
27858 22:29:00.140718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
27859 22:29:00.181793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
27860 22:29:00.183986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
27862 22:29:00.216979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
27863 22:29:00.217419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
27865 22:29:00.268036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
27866 22:29:00.268468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
27868 22:29:00.306703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
27869 22:29:00.307101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
27871 22:29:00.349680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
27873 22:29:00.350124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
27874 22:29:00.391760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
27876 22:29:00.392140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
27877 22:29:00.435483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
27878 22:29:00.435879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
27880 22:29:00.477883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
27881 22:29:00.478286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
27883 22:29:00.523939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
27885 22:29:00.524396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
27886 22:29:00.559528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
27887 22:29:00.560018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
27889 22:29:00.595421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
27891 22:29:00.595989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
27892 22:29:00.631447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
27893 22:29:00.631872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
27895 22:29:00.684096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
27896 22:29:00.684501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
27898 22:29:00.723899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
27900 22:29:00.724315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
27901 22:29:00.759956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
27902 22:29:00.760346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
27904 22:29:00.801173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
27905 22:29:00.801621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
27907 22:29:00.853528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
27908 22:29:00.854029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
27910 22:29:00.892846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
27911 22:29:00.893281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
27913 22:29:00.929711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
27914 22:29:00.930164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
27916 22:29:00.964328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
27917 22:29:00.964781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
27919 22:29:00.997338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
27921 22:29:00.997934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
27922 22:29:01.045955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
27923 22:29:01.046554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
27925 22:29:01.086019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
27927 22:29:01.086408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
27928 22:29:01.120383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
27930 22:29:01.120843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
27931 22:29:01.155814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
27932 22:29:01.156249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
27934 22:29:01.194406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
27936 22:29:01.194802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
27937 22:29:01.239703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
27939 22:29:01.240166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
27940 22:29:01.275364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
27941 22:29:01.275821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
27943 22:29:01.310530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
27945 22:29:01.311000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
27946 22:29:01.344537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
27947 22:29:01.345039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
27949 22:29:01.381467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
27951 22:29:01.381881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
27952 22:29:01.421953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
27954 22:29:01.422446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
27955 22:29:01.459970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
27957 22:29:01.460339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
27958 22:29:01.496389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
27959 22:29:01.496809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
27961 22:29:01.541583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
27962 22:29:01.541937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
27964 22:29:01.596532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
27965 22:29:01.596922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
27967 22:29:01.634738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
27969 22:29:01.635100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
27970 22:29:01.667937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
27971 22:29:01.668323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
27973 22:29:01.701917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
27974 22:29:01.702339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
27976 22:29:01.751435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
27978 22:29:01.752190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
27979 22:29:01.786847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
27980 22:29:01.787295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
27982 22:29:01.829534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
27983 22:29:01.829946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
27985 22:29:01.865204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
27987 22:29:01.865791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
27988 22:29:01.900248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
27989 22:29:01.900669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
27991 22:29:01.935165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
27993 22:29:01.935546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
27994 22:29:01.970669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
27996 22:29:01.971228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
27997 22:29:02.005458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
27999 22:29:02.005859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28000 22:29:02.041231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28001 22:29:02.041612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28003 22:29:02.077296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28005 22:29:02.077906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28006 22:29:02.113767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28007 22:29:02.114283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28009 22:29:02.149321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28010 22:29:02.149763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28012 22:29:02.185454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28014 22:29:02.185888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28015 22:29:02.220388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28016 22:29:02.220780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28018 22:29:02.255687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28019 22:29:02.256092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28021 22:29:02.291681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28023 22:29:02.292267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28024 22:29:02.326074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28025 22:29:02.326501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28027 22:29:02.372087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28028 22:29:02.372519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28030 22:29:02.416815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28031 22:29:02.417198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28033 22:29:02.456966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28034 22:29:02.457291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28036 22:29:02.500357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28038 22:29:02.500744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28039 22:29:02.542538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28041 22:29:02.542990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28042 22:29:02.576582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28043 22:29:02.576961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28045 22:29:02.611319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28047 22:29:02.611675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28048 22:29:02.647266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28050 22:29:02.647763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28051 22:29:02.687701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28052 22:29:02.688113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28054 22:29:02.724939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28055 22:29:02.725363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28057 22:29:02.764445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28058 22:29:02.764868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28060 22:29:02.804610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28061 22:29:02.805021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28063 22:29:02.844914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28064 22:29:02.845290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28066 22:29:02.889256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28067 22:29:02.889762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28069 22:29:02.922912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28070 22:29:02.923432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28072 22:29:02.956810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28074 22:29:02.957284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28075 22:29:02.994152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28076 22:29:02.994627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28078 22:29:03.033224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28079 22:29:03.033700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28081 22:29:03.084224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28082 22:29:03.084703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28084 22:29:03.129502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28086 22:29:03.130261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28087 22:29:03.171040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28088 22:29:03.171477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28090 22:29:03.210892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28092 22:29:03.211349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28093 22:29:03.247378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28094 22:29:03.247796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28096 22:29:03.283595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28097 22:29:03.284011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28099 22:29:03.320622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28100 22:29:03.321036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28102 22:29:03.357151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28104 22:29:03.357605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28105 22:29:03.391518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28106 22:29:03.391923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28108 22:29:03.439764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28109 22:29:03.440134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28111 22:29:03.476707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28112 22:29:03.477130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28114 22:29:03.516053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28115 22:29:03.516400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28117 22:29:03.556677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28118 22:29:03.557094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28120 22:29:03.599575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28122 22:29:03.600042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28123 22:29:03.648741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28124 22:29:03.649194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28126 22:29:03.695167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28127 22:29:03.695749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28129 22:29:03.732112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28130 22:29:03.732535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28132 22:29:03.773508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28133 22:29:03.773977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28135 22:29:03.806720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28137 22:29:03.807095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28138 22:29:03.839662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28139 22:29:03.840039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28141 22:29:03.876379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28143 22:29:03.876929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28144 22:29:03.911500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28145 22:29:03.911967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28147 22:29:03.951385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28148 22:29:03.951840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28150 22:29:03.986100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28151 22:29:03.986527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28153 22:29:04.023886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28155 22:29:04.024329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28156 22:29:04.058332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28158 22:29:04.058814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28159 22:29:04.093219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28161 22:29:04.093842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28162 22:29:04.125954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28164 22:29:04.126428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28165 22:29:04.160226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28166 22:29:04.160682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28168 22:29:04.200557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28169 22:29:04.201076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28171 22:29:04.235843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28172 22:29:04.236356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28174 22:29:04.269506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28176 22:29:04.270043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28177 22:29:04.303081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28178 22:29:04.303497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28180 22:29:04.335482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28181 22:29:04.336040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28183 22:29:04.369859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28184 22:29:04.370393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28186 22:29:04.405959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28188 22:29:04.406563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28189 22:29:04.439392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28191 22:29:04.440165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28192 22:29:04.473652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28193 22:29:04.474029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28195 22:29:04.507633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28197 22:29:04.508182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28198 22:29:04.541503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28199 22:29:04.542023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28201 22:29:04.577953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28203 22:29:04.578434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28204 22:29:04.614849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28206 22:29:04.615225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28207 22:29:04.649717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28208 22:29:04.650071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28210 22:29:04.688085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28211 22:29:04.688515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28213 22:29:04.733717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28214 22:29:04.734130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28216 22:29:04.767352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28217 22:29:04.767723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28219 22:29:04.800903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28220 22:29:04.801244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28222 22:29:04.836214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28224 22:29:04.836649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28225 22:29:04.871061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28227 22:29:04.871746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28228 22:29:04.905578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28230 22:29:04.906055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28231 22:29:04.952242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28232 22:29:04.952677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28234 22:29:05.010470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28236 22:29:05.010866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28237 22:29:05.065698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28238 22:29:05.066146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28240 22:29:05.106916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28241 22:29:05.107323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28243 22:29:05.144115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28244 22:29:05.144536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28246 22:29:05.183262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28248 22:29:05.183697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28249 22:29:05.221804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28250 22:29:05.222230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28252 22:29:05.260456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28253 22:29:05.260933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28255 22:29:05.298342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28257 22:29:05.299012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28258 22:29:05.336042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28260 22:29:05.336492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28261 22:29:05.373716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28262 22:29:05.374111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28264 22:29:05.413680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28265 22:29:05.414111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28267 22:29:05.451694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28268 22:29:05.452145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28270 22:29:05.488503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28272 22:29:05.488958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28273 22:29:05.525348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28274 22:29:05.525770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28276 22:29:05.564778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28278 22:29:05.565530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28279 22:29:05.602885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28280 22:29:05.603298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28282 22:29:05.639641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28284 22:29:05.640019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28285 22:29:05.677411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28286 22:29:05.677852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28288 22:29:05.717834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28289 22:29:05.718292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28291 22:29:05.758076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28293 22:29:05.758474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28294 22:29:05.797956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28295 22:29:05.798389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28297 22:29:05.836303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28299 22:29:05.837010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28300 22:29:05.877416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28301 22:29:05.877803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28303 22:29:05.917394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28304 22:29:05.917872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28306 22:29:05.956908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28307 22:29:05.957341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28309 22:29:06.005575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28311 22:29:06.006043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28312 22:29:06.045018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28314 22:29:06.045459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28315 22:29:06.083324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28316 22:29:06.083825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28318 22:29:06.124163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28320 22:29:06.124638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28321 22:29:06.172238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28322 22:29:06.172619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28324 22:29:06.211989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28326 22:29:06.212416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28327 22:29:06.263770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28328 22:29:06.264183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28330 22:29:06.305206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28331 22:29:06.305628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28333 22:29:06.344431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28334 22:29:06.344889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28336 22:29:06.390207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28337 22:29:06.390690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28339 22:29:06.436998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28340 22:29:06.437395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28342 22:29:06.473067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28344 22:29:06.473546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28345 22:29:06.516700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28346 22:29:06.517122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28348 22:29:06.572052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28349 22:29:06.572492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28351 22:29:06.631039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28353 22:29:06.631472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28354 22:29:06.683438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28355 22:29:06.683867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28357 22:29:06.722076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28358 22:29:06.722509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28360 22:29:06.768281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28362 22:29:06.768748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28363 22:29:06.819293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28364 22:29:06.819708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28366 22:29:06.861451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28368 22:29:06.862077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28369 22:29:06.901413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28371 22:29:06.901914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28372 22:29:06.939722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28373 22:29:06.940126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28375 22:29:06.977637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28377 22:29:06.978130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28378 22:29:07.023084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28380 22:29:07.023557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28381 22:29:07.079459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28383 22:29:07.079948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28384 22:29:07.141387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28385 22:29:07.141831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28387 22:29:07.185088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28388 22:29:07.185497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28390 22:29:07.222452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28392 22:29:07.222933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28393 22:29:07.260316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28394 22:29:07.260761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28396 22:29:07.300196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28397 22:29:07.300619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28399 22:29:07.343518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28400 22:29:07.343914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28402 22:29:07.382144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28403 22:29:07.382584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28405 22:29:07.429606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28407 22:29:07.430096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28408 22:29:07.477802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28409 22:29:07.478223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28411 22:29:07.516606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28412 22:29:07.517013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28414 22:29:07.561349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28415 22:29:07.561678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28417 22:29:07.604416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28418 22:29:07.604813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28420 22:29:07.641564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28421 22:29:07.642013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28423 22:29:07.695801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28424 22:29:07.696249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28426 22:29:07.752250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28427 22:29:07.752687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28429 22:29:07.809324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28431 22:29:07.809771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28432 22:29:07.869331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28433 22:29:07.869763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28435 22:29:07.907021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28436 22:29:07.907454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28438 22:29:07.943928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28439 22:29:07.944358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28441 22:29:07.980661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28443 22:29:07.981112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28444 22:29:08.017331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28445 22:29:08.017769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28447 22:29:08.055619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28448 22:29:08.056033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28450 22:29:08.092577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28451 22:29:08.093017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28453 22:29:08.128936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28455 22:29:08.129389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28456 22:29:08.172613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28457 22:29:08.173397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28459 22:29:08.225723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28460 22:29:08.226285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28462 22:29:08.281720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28463 22:29:08.282137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28465 22:29:08.337852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28466 22:29:08.338265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28468 22:29:08.383697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28469 22:29:08.384123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28471 22:29:08.422182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28472 22:29:08.422615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28474 22:29:08.479059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28476 22:29:08.479519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28477 22:29:08.523556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28479 22:29:08.524024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28480 22:29:08.568169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28481 22:29:08.568601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28483 22:29:08.606102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28485 22:29:08.606576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28486 22:29:08.643340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28487 22:29:08.643784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28489 22:29:08.686943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28491 22:29:08.687410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28492 22:29:08.725997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28493 22:29:08.726439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28495 22:29:08.770304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28497 22:29:08.770700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28498 22:29:08.814300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28500 22:29:08.814766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28501 22:29:08.851606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28502 22:29:08.852019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28504 22:29:08.888507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28506 22:29:08.888968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28507 22:29:08.936158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28508 22:29:08.936580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28510 22:29:08.995467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28512 22:29:08.995917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28513 22:29:09.048029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28515 22:29:09.048491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28516 22:29:09.093805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28518 22:29:09.094240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28519 22:29:09.130410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28521 22:29:09.131054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28522 22:29:09.167731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28524 22:29:09.168334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28525 22:29:09.206831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28526 22:29:09.207273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28528 22:29:09.261518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28529 22:29:09.261979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28531 22:29:09.312746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28532 22:29:09.313189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28534 22:29:09.356775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28535 22:29:09.357179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28537 22:29:09.395811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28538 22:29:09.396194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28540 22:29:09.433893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28541 22:29:09.434316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28543 22:29:09.474371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28545 22:29:09.474802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28546 22:29:09.520306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28547 22:29:09.520705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28549 22:29:09.559402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28550 22:29:09.559842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28552 22:29:09.608225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28553 22:29:09.608582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28555 22:29:09.661921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28556 22:29:09.662627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28558 22:29:09.708157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28559 22:29:09.708699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28561 22:29:09.756324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28562 22:29:09.756798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28564 22:29:09.801741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28565 22:29:09.802292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28567 22:29:09.845099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28568 22:29:09.845528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28570 22:29:09.890379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28572 22:29:09.890833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28573 22:29:09.930913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28575 22:29:09.931389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28576 22:29:09.970008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28577 22:29:09.970389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28579 22:29:10.011030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28580 22:29:10.011468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28582 22:29:10.052883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28584 22:29:10.053368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28585 22:29:10.129284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28587 22:29:10.129879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28588 22:29:10.176289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28589 22:29:10.176685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28591 22:29:10.216120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28593 22:29:10.216590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28594 22:29:10.253868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28595 22:29:10.254324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28597 22:29:10.292424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28598 22:29:10.292862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28600 22:29:10.330378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28602 22:29:10.330952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28603 22:29:10.378320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28605 22:29:10.378718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28606 22:29:10.420113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28607 22:29:10.420532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28609 22:29:10.464834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28611 22:29:10.465303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28612 22:29:10.511759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28614 22:29:10.512221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28615 22:29:10.552263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28616 22:29:10.552706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28618 22:29:10.609473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28619 22:29:10.609906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28621 22:29:10.668149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28623 22:29:10.668601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28624 22:29:10.714772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28625 22:29:10.715182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28627 22:29:10.752703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28628 22:29:10.753130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28630 22:29:10.791766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28631 22:29:10.792166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28633 22:29:10.828772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28634 22:29:10.829253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28636 22:29:10.865206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28637 22:29:10.865754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28639 22:29:10.902103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28641 22:29:10.902766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28642 22:29:10.940602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28643 22:29:10.941036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28645 22:29:10.985097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28646 22:29:10.985481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28648 22:29:11.035045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28650 22:29:11.035478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28651 22:29:11.086920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28652 22:29:11.087326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28654 22:29:11.126180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28656 22:29:11.126662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28657 22:29:11.164507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28659 22:29:11.164966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28660 22:29:11.200551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28661 22:29:11.200973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28663 22:29:11.237116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28665 22:29:11.237584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28666 22:29:11.277865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28668 22:29:11.278333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28669 22:29:11.332546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28670 22:29:11.332994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28672 22:29:11.372780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28674 22:29:11.373247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28675 22:29:11.415211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28676 22:29:11.415622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28678 22:29:11.455038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28679 22:29:11.455428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28681 22:29:11.493539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28682 22:29:11.493974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28684 22:29:11.542991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28685 22:29:11.543415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28687 22:29:11.586031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28689 22:29:11.586527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28690 22:29:11.625200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28692 22:29:11.625912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28693 22:29:11.664822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28695 22:29:11.665298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28696 22:29:11.707472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28698 22:29:11.707916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28699 22:29:11.746337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28701 22:29:11.746747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28702 22:29:11.792788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28703 22:29:11.793253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28705 22:29:11.831357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28707 22:29:11.831824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28708 22:29:11.867164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28709 22:29:11.867571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28711 22:29:11.905196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28712 22:29:11.905603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28714 22:29:11.950569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28716 22:29:11.951069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28717 22:29:12.000217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28718 22:29:12.000653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28720 22:29:12.043589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28722 22:29:12.044234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28723 22:29:12.088879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28725 22:29:12.089351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28726 22:29:12.133693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28728 22:29:12.134168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28729 22:29:12.172174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28731 22:29:12.172621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28732 22:29:12.217590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28733 22:29:12.218012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28735 22:29:12.258458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28737 22:29:12.258942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28738 22:29:12.299502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28739 22:29:12.299878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28741 22:29:12.335111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28742 22:29:12.335473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28744 22:29:12.370009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28746 22:29:12.370769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28747 22:29:12.407073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28748 22:29:12.407638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28750 22:29:12.446110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28752 22:29:12.446553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28753 22:29:12.491362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28754 22:29:12.491792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28756 22:29:12.542958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28758 22:29:12.543427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28759 22:29:12.582056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28761 22:29:12.582467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28762 22:29:12.627831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28763 22:29:12.628262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28765 22:29:12.668848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28767 22:29:12.669269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28768 22:29:12.728089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28769 22:29:12.728526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28771 22:29:12.782345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28773 22:29:12.782792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28774 22:29:12.839950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28775 22:29:12.840346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28777 22:29:12.878980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28778 22:29:12.879407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28780 22:29:12.921809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28781 22:29:12.922226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28783 22:29:12.971896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28784 22:29:12.972335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28786 22:29:13.027485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28788 22:29:13.027981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28789 22:29:13.089907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28790 22:29:13.090375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28792 22:29:13.140613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28793 22:29:13.141058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28795 22:29:13.181238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28797 22:29:13.181640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28798 22:29:13.221205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28800 22:29:13.221689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28801 22:29:13.271882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28802 22:29:13.272306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28804 22:29:13.320340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28805 22:29:13.320803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28807 22:29:13.364188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28809 22:29:13.364633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28810 22:29:13.423833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28811 22:29:13.424378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28813 22:29:13.480864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28814 22:29:13.481265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28816 22:29:13.528003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28817 22:29:13.528514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28819 22:29:13.574010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28821 22:29:13.574479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28822 22:29:13.625514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28824 22:29:13.626256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28825 22:29:13.680501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28826 22:29:13.680973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28828 22:29:13.730292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28830 22:29:13.730768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28831 22:29:13.791735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
28832 22:29:13.792207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
28834 22:29:13.829183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
28835 22:29:13.829640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
28837 22:29:13.881092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
28838 22:29:13.881543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
28840 22:29:13.937803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
28841 22:29:13.938213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
28843 22:29:13.980257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
28844 22:29:13.980674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
28846 22:29:14.027493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
28847 22:29:14.027910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
28849 22:29:14.087154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
28850 22:29:14.087557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
28852 22:29:14.143683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
28854 22:29:14.144061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
28855 22:29:14.189450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
28857 22:29:14.189924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
28858 22:29:14.228641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
28859 22:29:14.229092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
28861 22:29:14.266503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
28863 22:29:14.267137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
28864 22:29:14.304622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
28865 22:29:14.305168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
28867 22:29:14.341712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
28868 22:29:14.342157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
28870 22:29:14.380988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
28872 22:29:14.381663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
28873 22:29:14.420115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
28874 22:29:14.420525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
28876 22:29:14.463877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
28877 22:29:14.464336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
28879 22:29:14.501667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
28880 22:29:14.502243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
28882 22:29:14.540110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
28883 22:29:14.540559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
28885 22:29:14.578216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
28887 22:29:14.578862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
28888 22:29:14.619565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
28889 22:29:14.619980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
28891 22:29:14.656167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
28892 22:29:14.656595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
28894 22:29:14.695393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
28896 22:29:14.695799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
28897 22:29:14.741759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
28899 22:29:14.742190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
28900 22:29:14.789074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
28901 22:29:14.789548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
28903 22:29:14.830471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
28905 22:29:14.831095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
28906 22:29:14.876628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
28907 22:29:14.877183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
28909 22:29:14.920474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
28911 22:29:14.920932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
28912 22:29:14.961411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
28914 22:29:14.961872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
28915 22:29:15.015927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
28916 22:29:15.016353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
28918 22:29:15.055707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
28919 22:29:15.056128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
28921 22:29:15.105365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
28922 22:29:15.105762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
28924 22:29:15.147476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
28925 22:29:15.147942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
28927 22:29:15.205923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
28928 22:29:15.206385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
28930 22:29:15.262051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
28931 22:29:15.262568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
28933 22:29:15.320010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
28935 22:29:15.320496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
28936 22:29:15.369998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
28938 22:29:15.370488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
28939 22:29:15.425908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
28941 22:29:15.426406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
28942 22:29:15.467793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
28943 22:29:15.468183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
28945 22:29:15.508485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
28946 22:29:15.508915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
28948 22:29:15.548069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
28950 22:29:15.548760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
28951 22:29:15.588176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
28953 22:29:15.588653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
28954 22:29:15.637132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
28955 22:29:15.637540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
28957 22:29:15.684549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
28958 22:29:15.684970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
28960 22:29:15.744433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
28962 22:29:15.744905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
28963 22:29:15.793153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
28964 22:29:15.793568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
28966 22:29:15.854166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
28967 22:29:15.854597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
28969 22:29:15.892051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
28970 22:29:15.892480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
28972 22:29:15.927114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
28973 22:29:15.927514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
28975 22:29:15.966535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
28977 22:29:15.967202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
28978 22:29:16.005227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
28980 22:29:16.005708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
28981 22:29:16.047316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
28982 22:29:16.047780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
28984 22:29:16.085877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
28985 22:29:16.086340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
28987 22:29:16.123894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
28988 22:29:16.124309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
28990 22:29:16.161861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
28991 22:29:16.162311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
28993 22:29:16.200810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
28995 22:29:16.201284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
28996 22:29:16.242577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
28998 22:29:16.243040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
28999 22:29:16.286841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29000 22:29:16.287313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29002 22:29:16.327442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29004 22:29:16.327890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29005 22:29:16.376082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29006 22:29:16.376437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29008 22:29:16.412876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29010 22:29:16.413579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29011 22:29:16.454170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29013 22:29:16.454585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29014 22:29:16.496723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29015 22:29:16.497186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29017 22:29:16.551473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29018 22:29:16.551931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29020 22:29:16.602270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29022 22:29:16.602768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29023 22:29:16.649590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29024 22:29:16.650056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29026 22:29:16.685680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29027 22:29:16.686212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29029 22:29:16.725713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29030 22:29:16.726167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29032 22:29:16.776182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29033 22:29:16.776586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29035 22:29:16.812154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29036 22:29:16.812556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29038 22:29:16.860701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29039 22:29:16.861081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29041 22:29:16.908650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29042 22:29:16.909082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29044 22:29:16.962853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29045 22:29:16.963307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29047 22:29:17.008080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29048 22:29:17.008498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29050 22:29:17.048395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29051 22:29:17.048795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29053 22:29:17.090985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29054 22:29:17.091527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29056 22:29:17.132564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29057 22:29:17.133031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29059 22:29:17.176849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29060 22:29:17.177300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29062 22:29:17.213527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29063 22:29:17.214027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29065 22:29:17.251517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29066 22:29:17.252103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29068 22:29:17.289630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29069 22:29:17.290106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29071 22:29:17.325339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29072 22:29:17.325779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29074 22:29:17.365660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29075 22:29:17.366105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29077 22:29:17.406512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29079 22:29:17.406979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29080 22:29:17.455932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29081 22:29:17.456356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29083 22:29:17.495370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29084 22:29:17.495795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29086 22:29:17.532480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29087 22:29:17.532944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29089 22:29:17.572271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29090 22:29:17.572856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29092 22:29:17.608862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29093 22:29:17.609362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29095 22:29:17.645529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29096 22:29:17.645973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29098 22:29:17.688803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29099 22:29:17.689173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29101 22:29:17.747227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29102 22:29:17.747625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29104 22:29:17.793959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29105 22:29:17.794408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29107 22:29:17.831095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29109 22:29:17.831550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29110 22:29:17.873111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29112 22:29:17.873605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29113 22:29:17.916332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29114 22:29:17.916749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29116 22:29:17.964287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29117 22:29:17.964744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29119 22:29:18.021744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29120 22:29:18.022188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29122 22:29:18.059691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29124 22:29:18.060075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29125 22:29:18.103101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29126 22:29:18.103528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29128 22:29:18.147561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29129 22:29:18.147950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29131 22:29:18.193063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29132 22:29:18.193484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29134 22:29:18.240427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29136 22:29:18.240831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29137 22:29:18.275311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29139 22:29:18.275776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29140 22:29:18.311652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29141 22:29:18.311994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29143 22:29:18.347758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29145 22:29:18.348187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29146 22:29:18.393046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29147 22:29:18.393466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29149 22:29:18.437161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29150 22:29:18.437721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29152 22:29:18.481386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29153 22:29:18.481869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29155 22:29:18.522576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29157 22:29:18.523026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29158 22:29:18.560618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29159 22:29:18.560978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29161 22:29:18.591623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29162 22:29:18.592053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29164 22:29:18.625148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29166 22:29:18.625600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29167 22:29:18.658972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29168 22:29:18.659424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29170 22:29:18.698463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29172 22:29:18.698880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29173 22:29:18.741422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29175 22:29:18.741886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29176 22:29:18.791437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29177 22:29:18.791843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29179 22:29:18.831509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29181 22:29:18.831974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29182 22:29:18.870885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29183 22:29:18.871265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29185 22:29:18.921490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29186 22:29:18.921900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29188 22:29:18.971705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29190 22:29:18.972086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29191 22:29:19.005799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29192 22:29:19.006138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29194 22:29:19.040959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29195 22:29:19.041381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29197 22:29:19.077520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29198 22:29:19.077972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29200 22:29:19.115449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29201 22:29:19.115901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29203 22:29:19.151921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29205 22:29:19.152682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29206 22:29:19.189960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29207 22:29:19.190381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29209 22:29:19.240973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29210 22:29:19.241435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29212 22:29:19.280078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29213 22:29:19.280484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29215 22:29:19.327597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29216 22:29:19.328090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29218 22:29:19.363088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29219 22:29:19.363648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29221 22:29:19.405395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29223 22:29:19.405881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29224 22:29:19.442906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29225 22:29:19.443418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29227 22:29:19.487190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29228 22:29:19.487637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29230 22:29:19.521779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29231 22:29:19.522233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29233 22:29:19.559320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29235 22:29:19.559789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29236 22:29:19.608305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29238 22:29:19.609049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29239 22:29:19.644391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29240 22:29:19.644948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29242 22:29:19.680373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29243 22:29:19.680817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29245 22:29:19.716070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29246 22:29:19.716634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29248 22:29:19.753060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29249 22:29:19.753509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29251 22:29:19.795109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29253 22:29:19.795589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29254 22:29:19.832845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29255 22:29:19.833398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29257 22:29:19.877744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29258 22:29:19.878236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29260 22:29:19.931716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29262 22:29:19.932459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29263 22:29:19.976652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29265 22:29:19.977286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29266 22:29:20.028415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29268 22:29:20.028775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29269 22:29:20.065166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29271 22:29:20.065550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29272 22:29:20.109960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29274 22:29:20.110437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29275 22:29:20.153796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29276 22:29:20.154194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29278 22:29:20.206473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29280 22:29:20.206952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29281 22:29:20.251932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29282 22:29:20.252369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29284 22:29:20.299879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29286 22:29:20.300600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29287 22:29:20.363124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29288 22:29:20.363548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29290 22:29:20.407318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29291 22:29:20.407780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29293 22:29:20.452392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29294 22:29:20.452859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29296 22:29:20.488229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29297 22:29:20.488697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29299 22:29:20.525199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29300 22:29:20.525637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29302 22:29:20.565603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29303 22:29:20.566015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29305 22:29:20.607626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29307 22:29:20.608293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29308 22:29:20.644539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29310 22:29:20.645006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29311 22:29:20.684651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29313 22:29:20.685367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29314 22:29:20.723949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29315 22:29:20.724331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29317 22:29:20.761309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29318 22:29:20.761671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29320 22:29:20.796225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29322 22:29:20.796689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29323 22:29:20.830709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29325 22:29:20.831129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29326 22:29:20.865397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29328 22:29:20.865852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29329 22:29:20.900075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29330 22:29:20.900478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29332 22:29:20.937435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29333 22:29:20.938014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29335 22:29:20.973952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29336 22:29:20.974494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29338 22:29:21.018291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29340 22:29:21.018712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29341 22:29:21.063021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29342 22:29:21.063470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29344 22:29:21.099861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29345 22:29:21.100326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29347 22:29:21.139030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29348 22:29:21.139508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29350 22:29:21.176310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29352 22:29:21.176919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29353 22:29:21.212300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29354 22:29:21.212858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29356 22:29:21.250186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29357 22:29:21.250709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29359 22:29:21.285695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29361 22:29:21.286170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29362 22:29:21.317267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29363 22:29:21.317662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29365 22:29:21.351611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29367 22:29:21.352176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29368 22:29:21.386062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29369 22:29:21.386599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29371 22:29:21.422431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29373 22:29:21.422904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29374 22:29:21.468237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29375 22:29:21.468671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29377 22:29:21.522379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29379 22:29:21.522782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29380 22:29:21.564937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29381 22:29:21.565352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29383 22:29:21.605054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29384 22:29:21.605506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29386 22:29:21.648707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29387 22:29:21.649146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29389 22:29:21.685423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29391 22:29:21.686061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29392 22:29:21.721747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29394 22:29:21.722510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29395 22:29:21.756627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29397 22:29:21.757000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29398 22:29:21.798191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29400 22:29:21.798677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29401 22:29:21.835295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29402 22:29:21.835783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29404 22:29:21.877812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29405 22:29:21.878217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29407 22:29:21.935030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29409 22:29:21.935444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29410 22:29:21.975398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29411 22:29:21.975901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29413 22:29:22.016455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29415 22:29:22.017035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29416 22:29:22.054852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29417 22:29:22.055384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29419 22:29:22.091421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29420 22:29:22.091842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29422 22:29:22.126683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29423 22:29:22.127064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29425 22:29:22.164757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29426 22:29:22.165204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29428 22:29:22.202742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29429 22:29:22.203291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29431 22:29:22.238476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29433 22:29:22.239118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29434 22:29:22.286014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29436 22:29:22.286590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29437 22:29:22.323693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29438 22:29:22.324236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29440 22:29:22.359519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29441 22:29:22.359914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29443 22:29:22.393430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29444 22:29:22.393815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29446 22:29:22.428467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29447 22:29:22.428904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29449 22:29:22.463864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29450 22:29:22.464313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29452 22:29:22.503691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29454 22:29:22.504059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29455 22:29:22.553034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29456 22:29:22.553466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29458 22:29:22.597956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29459 22:29:22.598380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29461 22:29:22.633603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29463 22:29:22.634046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29464 22:29:22.673538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29465 22:29:22.673962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29467 22:29:22.712073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29468 22:29:22.712465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29470 22:29:22.752501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29471 22:29:22.752927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29473 22:29:22.789184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29475 22:29:22.789633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29476 22:29:22.825998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29477 22:29:22.826543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29479 22:29:22.863886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29481 22:29:22.864234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29482 22:29:22.896913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29483 22:29:22.897317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29485 22:29:22.931104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29487 22:29:22.931668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29488 22:29:22.963965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29489 22:29:22.964478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29491 22:29:23.004533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29492 22:29:23.005040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29494 22:29:23.055916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29495 22:29:23.056394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29497 22:29:23.090669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29498 22:29:23.091128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29500 22:29:23.125445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29501 22:29:23.125950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29503 22:29:23.159772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29504 22:29:23.160310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29506 22:29:23.193806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29508 22:29:23.194278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29509 22:29:23.229954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29510 22:29:23.230462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29512 22:29:23.270983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29513 22:29:23.271380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29515 22:29:23.305545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29517 22:29:23.306103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29518 22:29:23.340128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29520 22:29:23.340559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29521 22:29:23.374563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29522 22:29:23.375008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29524 22:29:23.412775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29525 22:29:23.413253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29527 22:29:23.452538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29528 22:29:23.452967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29530 22:29:23.489468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29531 22:29:23.489969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29533 22:29:23.531409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29534 22:29:23.531867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29536 22:29:23.571689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29537 22:29:23.572087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29539 22:29:23.614530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29541 22:29:23.615000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29542 22:29:23.663781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29543 22:29:23.664212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29545 22:29:23.700286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29546 22:29:23.700738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29548 22:29:23.753590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29549 22:29:23.754054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29551 22:29:23.798846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29552 22:29:23.799287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29554 22:29:23.851583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29555 22:29:23.851991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29557 22:29:23.900534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29558 22:29:23.901028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29560 22:29:23.936214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29561 22:29:23.936620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29563 22:29:23.969576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29565 22:29:23.970056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29566 22:29:24.005351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29567 22:29:24.005838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29569 22:29:24.044186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29571 22:29:24.044756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29572 22:29:24.079318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29573 22:29:24.079752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29575 22:29:24.115195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29577 22:29:24.115675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29578 22:29:24.157459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29580 22:29:24.157946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29581 22:29:24.197595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29582 22:29:24.197991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29584 22:29:24.234676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29585 22:29:24.235123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29587 22:29:24.271030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29588 22:29:24.271611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29590 22:29:24.316572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29591 22:29:24.316967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29593 22:29:24.360338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29594 22:29:24.360733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29596 22:29:24.404790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29597 22:29:24.405234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29599 22:29:24.449802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29600 22:29:24.450256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29602 22:29:24.502075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29604 22:29:24.502546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29605 22:29:24.543750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29607 22:29:24.544118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29608 22:29:24.579096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29609 22:29:24.579485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29611 22:29:24.611401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29612 22:29:24.611946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29614 22:29:24.652392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29615 22:29:24.652950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29617 22:29:24.687408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29618 22:29:24.687875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29620 22:29:24.723122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29622 22:29:24.723575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29623 22:29:24.757899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29624 22:29:24.758349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29626 22:29:24.793997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29628 22:29:24.794783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29629 22:29:24.831211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29630 22:29:24.831618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29632 22:29:24.869234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29634 22:29:24.869604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29635 22:29:24.917864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29636 22:29:24.918286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29638 22:29:24.953830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29639 22:29:24.954212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29641 22:29:24.989890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29642 22:29:24.990386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29644 22:29:25.034861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29645 22:29:25.035283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29647 22:29:25.076504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29648 22:29:25.076953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29650 22:29:25.110621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29651 22:29:25.111035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29653 22:29:25.151002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29654 22:29:25.151442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29656 22:29:25.191941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29658 22:29:25.192460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29659 22:29:25.233136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29660 22:29:25.233570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29662 22:29:25.276942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29663 22:29:25.277391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29665 22:29:25.319415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29667 22:29:25.319784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29668 22:29:25.364139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29669 22:29:25.364595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29671 22:29:25.407856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29672 22:29:25.408232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29674 22:29:25.477603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29675 22:29:25.478100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29677 22:29:25.517482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29678 22:29:25.518084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29680 22:29:25.560772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29681 22:29:25.561222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29683 22:29:25.599948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29684 22:29:25.600389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29686 22:29:25.644566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29688 22:29:25.645120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29689 22:29:25.683624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29690 22:29:25.684056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29692 22:29:25.723403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29693 22:29:25.723954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29695 22:29:25.762867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29696 22:29:25.763316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29698 22:29:25.801101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29699 22:29:25.801539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29701 22:29:25.839484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29702 22:29:25.839909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29704 22:29:25.874772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29705 22:29:25.875172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29707 22:29:25.909898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29709 22:29:25.910615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29710 22:29:25.945436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29712 22:29:25.946169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29713 22:29:25.986309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29715 22:29:25.986724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29716 22:29:26.025636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29717 22:29:26.026073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29719 22:29:26.058590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29720 22:29:26.058991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29722 22:29:26.097332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29723 22:29:26.097777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29725 22:29:26.137327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29726 22:29:26.137803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29728 22:29:26.171479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29729 22:29:26.171885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29731 22:29:26.216642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29733 22:29:26.217111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29734 22:29:26.257789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29735 22:29:26.258298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29737 22:29:26.303716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29738 22:29:26.304138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29740 22:29:26.356006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29741 22:29:26.356388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29743 22:29:26.392138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29745 22:29:26.392543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29746 22:29:26.431865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29747 22:29:26.432271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29749 22:29:26.469641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29751 22:29:26.470406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29752 22:29:26.504372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29753 22:29:26.504915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29755 22:29:26.544178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29757 22:29:26.544754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29758 22:29:26.600200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29759 22:29:26.600657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29761 22:29:26.645267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29762 22:29:26.645742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29764 22:29:26.688027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29765 22:29:26.688475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29767 22:29:26.728636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29768 22:29:26.729084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29770 22:29:26.773394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29772 22:29:26.773891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29773 22:29:26.817029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29775 22:29:26.817499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29776 22:29:26.869573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29777 22:29:26.870002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29779 22:29:26.921879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29780 22:29:26.922331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29782 22:29:26.961038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29784 22:29:26.961474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29785 22:29:27.004203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29786 22:29:27.004689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29788 22:29:27.052119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29789 22:29:27.052566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29791 22:29:27.097394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29792 22:29:27.097826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29794 22:29:27.136546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29795 22:29:27.136950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29797 22:29:27.175212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29799 22:29:27.175686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29800 22:29:27.218882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29801 22:29:27.219320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29803 22:29:27.264126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29804 22:29:27.264607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29806 22:29:27.309828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29807 22:29:27.310264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29809 22:29:27.345787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29810 22:29:27.346207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29812 22:29:27.380932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29814 22:29:27.381712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29815 22:29:27.415793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29816 22:29:27.416218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29818 22:29:27.461776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29819 22:29:27.462230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29821 22:29:27.496066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29823 22:29:27.496514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29824 22:29:27.529579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29825 22:29:27.530012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29827 22:29:27.572395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29829 22:29:27.572830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29830 22:29:27.608825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
29832 22:29:27.609229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29833 22:29:27.641586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
29834 22:29:27.642041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
29836 22:29:27.676808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
29838 22:29:27.677182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
29839 22:29:27.727342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
29840 22:29:27.727753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
29842 22:29:27.773468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
29843 22:29:27.773920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
29845 22:29:27.817191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
29846 22:29:27.817608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
29848 22:29:27.859511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
29849 22:29:27.859929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
29851 22:29:27.900863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
29852 22:29:27.901286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
29854 22:29:27.935264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
29855 22:29:27.935710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
29857 22:29:27.971148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
29859 22:29:27.971595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
29860 22:29:28.007745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
29861 22:29:28.008165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
29863 22:29:28.044616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
29864 22:29:28.045018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
29866 22:29:28.080881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
29867 22:29:28.081265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
29869 22:29:28.125337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
29871 22:29:28.125825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
29872 22:29:28.168364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
29873 22:29:28.168786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
29875 22:29:28.212866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
29877 22:29:28.213338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
29878 22:29:28.251669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
29880 22:29:28.252150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
29881 22:29:28.298291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
29883 22:29:28.298948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
29884 22:29:28.352661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
29885 22:29:28.353094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
29887 22:29:28.397383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
29888 22:29:28.397762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
29890 22:29:28.433916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
29891 22:29:28.434344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
29893 22:29:28.471315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
29894 22:29:28.471736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
29896 22:29:28.507816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
29898 22:29:28.508258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
29899 22:29:28.547220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
29900 22:29:28.547712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
29902 22:29:28.583158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
29904 22:29:28.583586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
29905 22:29:28.621009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
29906 22:29:28.621418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
29908 22:29:28.657516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
29910 22:29:28.657998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
29911 22:29:28.695945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
29913 22:29:28.696434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
29914 22:29:28.733907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
29915 22:29:28.734302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
29917 22:29:28.787167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
29918 22:29:28.787566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
29920 22:29:28.833772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
29921 22:29:28.834203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
29923 22:29:28.880518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
29924 22:29:28.881068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
29926 22:29:28.921538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
29927 22:29:28.922142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
29929 22:29:28.960041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
29930 22:29:28.960432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
29932 22:29:28.999684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
29934 22:29:29.000102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
29935 22:29:29.035416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
29936 22:29:29.035838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
29938 22:29:29.071392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
29939 22:29:29.071770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
29941 22:29:29.121004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
29942 22:29:29.121437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
29944 22:29:29.173688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
29945 22:29:29.174087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
29947 22:29:29.231031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
29949 22:29:29.231469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
29950 22:29:29.275963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
29951 22:29:29.276421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
29953 22:29:29.315626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
29955 22:29:29.316002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
29956 22:29:29.356172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
29957 22:29:29.356617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
29959 22:29:29.399833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
29960 22:29:29.400266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
29962 22:29:29.449801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
29963 22:29:29.450248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
29965 22:29:29.493516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
29966 22:29:29.493946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
29968 22:29:29.539240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
29969 22:29:29.539645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
29971 22:29:29.594549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
29973 22:29:29.594964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
29974 22:29:29.633439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
29975 22:29:29.633964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
29977 22:29:29.675206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
29979 22:29:29.675998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
29980 22:29:29.712291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
29981 22:29:29.712689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
29983 22:29:29.766304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
29985 22:29:29.766775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
29986 22:29:29.801163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
29987 22:29:29.801564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
29989 22:29:29.840449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
29990 22:29:29.841013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
29992 22:29:29.876925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
29993 22:29:29.877383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
29995 22:29:29.924798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
29996 22:29:29.925198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
29998 22:29:29.973984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30000 22:29:29.974456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30001 22:29:30.013037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30002 22:29:30.013526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30004 22:29:30.061264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30005 22:29:30.061686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30007 22:29:30.104158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30009 22:29:30.104629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30010 22:29:30.143347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30011 22:29:30.143761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30013 22:29:30.186265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30015 22:29:30.186740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30016 22:29:30.224668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30017 22:29:30.225045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30019 22:29:30.260989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30021 22:29:30.261480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30022 22:29:30.312003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30024 22:29:30.312493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30025 22:29:30.360238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30026 22:29:30.360735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30028 22:29:30.399884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30030 22:29:30.400357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30031 22:29:30.436966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30033 22:29:30.437422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30034 22:29:30.481724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30035 22:29:30.482264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30037 22:29:30.531000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30038 22:29:30.531466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30040 22:29:30.595508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30041 22:29:30.595960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30043 22:29:30.635052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30044 22:29:30.635505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30046 22:29:30.681305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30048 22:29:30.681771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30049 22:29:30.722218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30050 22:29:30.722647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30052 22:29:30.767935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30053 22:29:30.768322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30055 22:29:30.805126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30057 22:29:30.805585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30058 22:29:30.843772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30059 22:29:30.844201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30061 22:29:30.895085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30062 22:29:30.895479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30064 22:29:30.942588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30066 22:29:30.943077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30067 22:29:30.983975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30068 22:29:30.984391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30070 22:29:31.029763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30072 22:29:31.030494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30073 22:29:31.078117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30074 22:29:31.078666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30076 22:29:31.116976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30077 22:29:31.117459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30079 22:29:31.156165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30080 22:29:31.156661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30082 22:29:31.197364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30083 22:29:31.197800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30085 22:29:31.237190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30086 22:29:31.237555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30088 22:29:31.288597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30089 22:29:31.289026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30091 22:29:31.343905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30092 22:29:31.344411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30094 22:29:31.391722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30096 22:29:31.392455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30097 22:29:31.427337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30098 22:29:31.427862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30100 22:29:31.463704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30102 22:29:31.464269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30103 22:29:31.503085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30104 22:29:31.503518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30106 22:29:31.542457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30108 22:29:31.542888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30109 22:29:31.580297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30110 22:29:31.580771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30112 22:29:31.615627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30114 22:29:31.616089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30115 22:29:31.650921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30116 22:29:31.651344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30118 22:29:31.688852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30119 22:29:31.689206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30121 22:29:31.730030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30122 22:29:31.730426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30124 22:29:31.775822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30125 22:29:31.776265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30127 22:29:31.813213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30128 22:29:31.813672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30130 22:29:31.852336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30132 22:29:31.852800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30133 22:29:31.891716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30134 22:29:31.892141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30136 22:29:31.931479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30137 22:29:31.931881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30139 22:29:31.980606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30140 22:29:31.981014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30142 22:29:32.019919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30143 22:29:32.020338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30145 22:29:32.061010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30146 22:29:32.061453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30148 22:29:32.098805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30150 22:29:32.099247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30151 22:29:32.152648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30153 22:29:32.153122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30154 22:29:32.200141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30155 22:29:32.200541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30157 22:29:32.240637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30158 22:29:32.241107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30160 22:29:32.284562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30162 22:29:32.284991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30163 22:29:32.341114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30164 22:29:32.341506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30166 22:29:32.388995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30168 22:29:32.389455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30169 22:29:32.438468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30171 22:29:32.438957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30172 22:29:32.478435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30174 22:29:32.478891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30175 22:29:32.525214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30177 22:29:32.525697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30178 22:29:32.561856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30179 22:29:32.562445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30181 22:29:32.601605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30183 22:29:32.602100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30184 22:29:32.642573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30186 22:29:32.643017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30187 22:29:32.683242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30188 22:29:32.683685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30190 22:29:32.740490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30192 22:29:32.740866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30193 22:29:32.789585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30194 22:29:32.790061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30196 22:29:32.829705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30197 22:29:32.830140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30199 22:29:32.875112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30201 22:29:32.875527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30202 22:29:32.925109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30204 22:29:32.925534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30205 22:29:32.967808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30207 22:29:32.968288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30208 22:29:33.005174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30209 22:29:33.005597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30211 22:29:33.043732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30213 22:29:33.044207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30214 22:29:33.082044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30215 22:29:33.082429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30217 22:29:33.124224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30218 22:29:33.124634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30220 22:29:33.160582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30222 22:29:33.160960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30223 22:29:33.202445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30225 22:29:33.202917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30226 22:29:33.244683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30228 22:29:33.245156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30229 22:29:33.293617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30231 22:29:33.294105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30232 22:29:33.330764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30233 22:29:33.331150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30235 22:29:33.372609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30237 22:29:33.373101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30238 22:29:33.410593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30240 22:29:33.411071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30241 22:29:33.447692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30243 22:29:33.448285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30244 22:29:33.484373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30245 22:29:33.484855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30247 22:29:33.520339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30248 22:29:33.520896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30250 22:29:33.560612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30252 22:29:33.561452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30253 22:29:33.596858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30254 22:29:33.597407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30256 22:29:33.636705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30257 22:29:33.637093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30259 22:29:33.671358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30260 22:29:33.671804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30262 22:29:33.708786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30264 22:29:33.709260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30265 22:29:33.748960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30266 22:29:33.749368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30268 22:29:33.796737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30269 22:29:33.797132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30271 22:29:33.842050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30273 22:29:33.842485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30274 22:29:33.884214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30275 22:29:33.884663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30277 22:29:33.927564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30279 22:29:33.927953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30280 22:29:33.966363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30282 22:29:33.966759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30283 22:29:34.003295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30284 22:29:34.003764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30286 22:29:34.039509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30288 22:29:34.040165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30289 22:29:34.080201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30291 22:29:34.080837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30292 22:29:34.119468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30293 22:29:34.119945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30295 22:29:34.166435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30297 22:29:34.167164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30298 22:29:34.214027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30299 22:29:34.214595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30301 22:29:34.251457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30302 22:29:34.251885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30304 22:29:34.287301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30305 22:29:34.287755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30307 22:29:34.323534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30308 22:29:34.323968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30310 22:29:34.365816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30311 22:29:34.366269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30313 22:29:34.407193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30314 22:29:34.407598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30316 22:29:34.449707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30318 22:29:34.450472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30319 22:29:34.500338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30321 22:29:34.500803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30322 22:29:34.539700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30323 22:29:34.540134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30325 22:29:34.574841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30327 22:29:34.575309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30328 22:29:34.612425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30329 22:29:34.612841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30331 22:29:34.648527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30333 22:29:34.649011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30334 22:29:34.695663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30336 22:29:34.696283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30337 22:29:34.731921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30338 22:29:34.732367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30340 22:29:34.771420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30341 22:29:34.771921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30343 22:29:34.811310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30345 22:29:34.811700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30346 22:29:34.852553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30347 22:29:34.853000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30349 22:29:34.887179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30351 22:29:34.887645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30352 22:29:34.929033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30353 22:29:34.929439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30355 22:29:34.964886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30357 22:29:34.965308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30358 22:29:35.000071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30359 22:29:35.000490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30361 22:29:35.041975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30363 22:29:35.042453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30364 22:29:35.077290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30366 22:29:35.077961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30367 22:29:35.118684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30368 22:29:35.119131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30370 22:29:35.156582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30371 22:29:35.157018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30373 22:29:35.190890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30374 22:29:35.191356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30376 22:29:35.224820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30378 22:29:35.225460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30379 22:29:35.261176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30380 22:29:35.261679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30382 22:29:35.308171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30383 22:29:35.308570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30385 22:29:35.344512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30386 22:29:35.344949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30388 22:29:35.380807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30389 22:29:35.381240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30391 22:29:35.426012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30392 22:29:35.426480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30394 22:29:35.467957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30396 22:29:35.468412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30397 22:29:35.509685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30398 22:29:35.510110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30400 22:29:35.555820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30401 22:29:35.556221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30403 22:29:35.602464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30405 22:29:35.603039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30406 22:29:35.641481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30407 22:29:35.641983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30409 22:29:35.704043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30411 22:29:35.704660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30412 22:29:35.749895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30414 22:29:35.750377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30415 22:29:35.787556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30417 22:29:35.788027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30418 22:29:35.820723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30419 22:29:35.821180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30421 22:29:35.854486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30423 22:29:35.854917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30424 22:29:35.894960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30426 22:29:35.895569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30427 22:29:35.929345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30429 22:29:35.930097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30430 22:29:35.963399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30431 22:29:35.963967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30433 22:29:35.997266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30434 22:29:35.997694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30436 22:29:36.036394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30437 22:29:36.036799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30439 22:29:36.072296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30441 22:29:36.072713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30442 22:29:36.110193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30443 22:29:36.110595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30445 22:29:36.153702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30446 22:29:36.154055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30448 22:29:36.192705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30450 22:29:36.193167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30451 22:29:36.232563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30453 22:29:36.233040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30454 22:29:36.269347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30455 22:29:36.269747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30457 22:29:36.314522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30459 22:29:36.315168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30460 22:29:36.349335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30462 22:29:36.350075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30463 22:29:36.384842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30465 22:29:36.385429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30466 22:29:36.418842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30467 22:29:36.419319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30469 22:29:36.453450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30471 22:29:36.454212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30472 22:29:36.491775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30473 22:29:36.492194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30475 22:29:36.536323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30476 22:29:36.536935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30478 22:29:36.577149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30480 22:29:36.577810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30481 22:29:36.612059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30483 22:29:36.612477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30484 22:29:36.655514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30485 22:29:36.656083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30487 22:29:36.696501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30489 22:29:36.697259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30490 22:29:36.735383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30492 22:29:36.736028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30493 22:29:36.769824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30494 22:29:36.770288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30496 22:29:36.811786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30497 22:29:36.812233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30499 22:29:36.860258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30500 22:29:36.860676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30502 22:29:36.907240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30503 22:29:36.907705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30505 22:29:36.955724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30506 22:29:36.956104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30508 22:29:37.003663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30509 22:29:37.004109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30511 22:29:37.045913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30513 22:29:37.046309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30514 22:29:37.088249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30515 22:29:37.088584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30517 22:29:37.123496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30518 22:29:37.123924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30520 22:29:37.157957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30521 22:29:37.158402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30523 22:29:37.193542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30524 22:29:37.194066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30526 22:29:37.236305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30528 22:29:37.236771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30529 22:29:37.272375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30531 22:29:37.272757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30532 22:29:37.306533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30534 22:29:37.307003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30535 22:29:37.340755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30537 22:29:37.341383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30538 22:29:37.376124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30539 22:29:37.376657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30541 22:29:37.423077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30542 22:29:37.423457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30544 22:29:37.459046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30545 22:29:37.459462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30547 22:29:37.491350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30548 22:29:37.491712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30550 22:29:37.523787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30551 22:29:37.524224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30553 22:29:37.559701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30554 22:29:37.560119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30556 22:29:37.605093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30557 22:29:37.605468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30559 22:29:37.640343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30561 22:29:37.640790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30562 22:29:37.673770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30564 22:29:37.674248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30565 22:29:37.708362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30567 22:29:37.708823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30568 22:29:37.743742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30569 22:29:37.744268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30571 22:29:37.780852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30572 22:29:37.781268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30574 22:29:37.817033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30575 22:29:37.817445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30577 22:29:37.852137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30578 22:29:37.852567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30580 22:29:37.901167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30581 22:29:37.901609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30583 22:29:37.948818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30585 22:29:37.949214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30586 22:29:37.991955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30587 22:29:37.992382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30589 22:29:38.043130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30590 22:29:38.043522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30592 22:29:38.083917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30593 22:29:38.084306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30595 22:29:38.122231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30597 22:29:38.122658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30598 22:29:38.167411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30600 22:29:38.167988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30601 22:29:38.209190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30602 22:29:38.209700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30604 22:29:38.250114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30606 22:29:38.250862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30607 22:29:38.296241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30608 22:29:38.296645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30610 22:29:38.343495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30612 22:29:38.343975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30613 22:29:38.387073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30615 22:29:38.387493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30616 22:29:38.420217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30617 22:29:38.420699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30619 22:29:38.453443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30620 22:29:38.453943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30622 22:29:38.494673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30624 22:29:38.495470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30625 22:29:38.530397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30627 22:29:38.531144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30628 22:29:38.565574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30629 22:29:38.566005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30631 22:29:38.602362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30633 22:29:38.602827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30634 22:29:38.644137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30635 22:29:38.644545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30637 22:29:38.684856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30639 22:29:38.685273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30640 22:29:38.724901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30642 22:29:38.725481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30643 22:29:38.769682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30644 22:29:38.770148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30646 22:29:38.819312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30647 22:29:38.819857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30649 22:29:38.867124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30650 22:29:38.867567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30652 22:29:38.900216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30653 22:29:38.900637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30655 22:29:38.935926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30657 22:29:38.936307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30658 22:29:38.971177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30660 22:29:38.971933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30661 22:29:39.006342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30663 22:29:39.006975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30664 22:29:39.041077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30665 22:29:39.041632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30667 22:29:39.076049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30668 22:29:39.076494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30670 22:29:39.112506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30672 22:29:39.112970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30673 22:29:39.165605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30674 22:29:39.166102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30676 22:29:39.207190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30677 22:29:39.207561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30679 22:29:39.261894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30681 22:29:39.262194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30682 22:29:39.307450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30683 22:29:39.307883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30685 22:29:39.345985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30686 22:29:39.346409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30688 22:29:39.384515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30690 22:29:39.384973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30691 22:29:39.421341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30692 22:29:39.421806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30694 22:29:39.461732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30696 22:29:39.462401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30697 22:29:39.500843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30698 22:29:39.501305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30700 22:29:39.549846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30701 22:29:39.550314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30703 22:29:39.595152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30705 22:29:39.595606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30706 22:29:39.632511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30708 22:29:39.632965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30709 22:29:39.669537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30710 22:29:39.669960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30712 22:29:39.706268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30714 22:29:39.706744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30715 22:29:39.744189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30717 22:29:39.744650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30718 22:29:39.781780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30720 22:29:39.782253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30721 22:29:39.821944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30723 22:29:39.822417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30724 22:29:39.869353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30725 22:29:39.869779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30727 22:29:39.925446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30729 22:29:39.925920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30730 22:29:39.964178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30732 22:29:39.964646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30733 22:29:40.000859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30734 22:29:40.001311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30736 22:29:40.039243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30737 22:29:40.039683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30739 22:29:40.076564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30740 22:29:40.077096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30742 22:29:40.117644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30744 22:29:40.118097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30745 22:29:40.158359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30747 22:29:40.158819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30748 22:29:40.200957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30750 22:29:40.201429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30751 22:29:40.257194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30752 22:29:40.257614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30754 22:29:40.315607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30755 22:29:40.316061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30757 22:29:40.357257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30759 22:29:40.357737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30760 22:29:40.397765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30761 22:29:40.398164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30763 22:29:40.441844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30765 22:29:40.442318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30766 22:29:40.478864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30767 22:29:40.479238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30769 22:29:40.514558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30771 22:29:40.515023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30772 22:29:40.550968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30773 22:29:40.551459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30775 22:29:40.586409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30777 22:29:40.586862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30778 22:29:40.623140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30780 22:29:40.623604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30781 22:29:40.659545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30782 22:29:40.659967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30784 22:29:40.697530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30785 22:29:40.697917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30787 22:29:40.739569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30788 22:29:40.740017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30790 22:29:40.800385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30791 22:29:40.800849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30793 22:29:40.851703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30794 22:29:40.852172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30796 22:29:40.888727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30797 22:29:40.889147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30799 22:29:40.925885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30800 22:29:40.926312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30802 22:29:40.964477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30804 22:29:40.964929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30805 22:29:41.012254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30807 22:29:41.013768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30808 22:29:41.052757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30809 22:29:41.053174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30811 22:29:41.095195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30812 22:29:41.095645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30814 22:29:41.132070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30815 22:29:41.132500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30817 22:29:41.168217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30818 22:29:41.168662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30820 22:29:41.204530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30821 22:29:41.204977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30823 22:29:41.251598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30824 22:29:41.252063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30826 22:29:41.301085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30827 22:29:41.301617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30829 22:29:41.338915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30830 22:29:41.339388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30832 22:29:41.374936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
30834 22:29:41.375681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
30835 22:29:41.408818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
30836 22:29:41.409269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
30838 22:29:41.443913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
30839 22:29:41.444378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
30841 22:29:41.479680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
30842 22:29:41.480072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
30844 22:29:41.515748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
30845 22:29:41.516195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
30847 22:29:41.551194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
30849 22:29:41.551619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
30850 22:29:41.586966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
30851 22:29:41.587449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
30853 22:29:41.621836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
30854 22:29:41.622363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
30856 22:29:41.669374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
30857 22:29:41.669918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
30859 22:29:41.708031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
30860 22:29:41.708469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
30862 22:29:41.744438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
30863 22:29:41.745005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
30865 22:29:41.779797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
30866 22:29:41.780236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
30868 22:29:41.814962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
30870 22:29:41.815426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
30871 22:29:41.847617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
30872 22:29:41.848029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
30874 22:29:41.880303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
30876 22:29:41.880738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
30877 22:29:41.913716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
30878 22:29:41.914247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
30880 22:29:41.947169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
30882 22:29:41.947948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
30883 22:29:41.987784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
30885 22:29:41.988386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
30886 22:29:42.031819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
30887 22:29:42.032263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
30889 22:29:42.066388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
30891 22:29:42.066870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
30892 22:29:42.108232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
30893 22:29:42.108675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
30895 22:29:42.159178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
30897 22:29:42.159650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
30898 22:29:42.194394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
30900 22:29:42.194877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
30901 22:29:42.232192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
30902 22:29:42.232611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
30904 22:29:42.285335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
30905 22:29:42.285811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
30907 22:29:42.338294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
30909 22:29:42.338712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
30910 22:29:42.375756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
30912 22:29:42.376216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
30913 22:29:42.417310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
30914 22:29:42.417748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
30916 22:29:42.456211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
30917 22:29:42.456653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
30919 22:29:42.489952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
30921 22:29:42.490397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
30922 22:29:42.526256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
30924 22:29:42.526689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
30925 22:29:42.579870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
30926 22:29:42.580315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
30928 22:29:42.621860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
30929 22:29:42.622263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
30931 22:29:42.661117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
30932 22:29:42.661615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
30934 22:29:42.694717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
30935 22:29:42.695169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
30937 22:29:42.739397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
30939 22:29:42.740098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
30940 22:29:42.775798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
30942 22:29:42.776262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
30943 22:29:42.813761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
30944 22:29:42.814183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
30946 22:29:42.851721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
30948 22:29:42.852175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
30949 22:29:42.896266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
30950 22:29:42.896703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
30952 22:29:42.932456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
30953 22:29:42.932892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
30955 22:29:42.971542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
30957 22:29:42.972120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
30958 22:29:43.013280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
30960 22:29:43.013941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
30961 22:29:43.066467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
30963 22:29:43.067032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
30964 22:29:43.123197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
30965 22:29:43.123574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
30967 22:29:43.156853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
30968 22:29:43.157268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
30970 22:29:43.191252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
30972 22:29:43.191709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
30973 22:29:43.226769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
30974 22:29:43.227207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
30976 22:29:43.263325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
30977 22:29:43.263835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
30979 22:29:43.299910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
30980 22:29:43.300395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
30982 22:29:43.340706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
30983 22:29:43.341125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
30985 22:29:43.375606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
30986 22:29:43.375999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
30988 22:29:43.409671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
30989 22:29:43.410168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
30991 22:29:43.445194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
30992 22:29:43.445693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
30994 22:29:43.479636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
30995 22:29:43.480113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
30997 22:29:43.513922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
30998 22:29:43.514496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31000 22:29:43.548920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31001 22:29:43.549345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31003 22:29:43.588339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31004 22:29:43.588770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31006 22:29:43.628168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31007 22:29:43.628571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31009 22:29:43.672131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31010 22:29:43.672513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31012 22:29:43.717883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31013 22:29:43.718314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31015 22:29:43.766040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31016 22:29:43.766536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31018 22:29:43.807590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31019 22:29:43.808098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31021 22:29:43.849556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31022 22:29:43.850064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31024 22:29:43.892689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31025 22:29:43.893135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31027 22:29:43.933975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31028 22:29:43.934428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31030 22:29:43.969412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31031 22:29:43.969796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31033 22:29:44.009720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31034 22:29:44.010133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31036 22:29:44.047771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31037 22:29:44.048205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31039 22:29:44.087611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31040 22:29:44.088046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31042 22:29:44.125715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31043 22:29:44.126090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31045 22:29:44.159559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31046 22:29:44.159933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31048 22:29:44.194237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31050 22:29:44.194621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31051 22:29:44.240654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31052 22:29:44.241087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31054 22:29:44.278967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31055 22:29:44.279405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31057 22:29:44.316305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31058 22:29:44.316734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31060 22:29:44.351672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31061 22:29:44.352117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31063 22:29:44.387829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31064 22:29:44.388392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31066 22:29:44.423221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31067 22:29:44.423582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31069 22:29:44.458761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31070 22:29:44.459257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31072 22:29:44.492492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31074 22:29:44.493087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31075 22:29:44.527231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31076 22:29:44.527700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31078 22:29:44.577528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31080 22:29:44.578090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31081 22:29:44.615410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31082 22:29:44.615875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31084 22:29:44.659261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31085 22:29:44.659828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31087 22:29:44.708114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31089 22:29:44.708700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31090 22:29:44.758034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31091 22:29:44.758481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31093 22:29:44.802860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31095 22:29:44.803436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31096 22:29:44.841472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31098 22:29:44.841942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31099 22:29:44.890119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31101 22:29:44.890591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31102 22:29:44.934437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31104 22:29:44.934906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31105 22:29:44.981256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31106 22:29:44.981690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31108 22:29:45.025003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31109 22:29:45.025463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31111 22:29:45.073266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31112 22:29:45.073761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31114 22:29:45.108910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31115 22:29:45.109359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31117 22:29:45.143710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31118 22:29:45.144211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31120 22:29:45.180535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31121 22:29:45.181019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31123 22:29:45.215678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31124 22:29:45.216234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31126 22:29:45.252418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31127 22:29:45.252863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31129 22:29:45.293624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31130 22:29:45.294085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31132 22:29:45.351958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31134 22:29:45.352329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31135 22:29:45.392027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31136 22:29:45.392422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31138 22:29:45.424729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31139 22:29:45.425189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31141 22:29:45.460828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31143 22:29:45.461259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31144 22:29:45.496056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31145 22:29:45.496513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31147 22:29:45.539630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31148 22:29:45.540018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31150 22:29:45.572944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31151 22:29:45.573353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31153 22:29:45.607868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31154 22:29:45.608250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31156 22:29:45.653718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31157 22:29:45.654168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31159 22:29:45.705059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31160 22:29:45.705459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31162 22:29:45.741822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31163 22:29:45.742223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31165 22:29:45.781682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31166 22:29:45.782097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31168 22:29:45.817082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31169 22:29:45.817498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31171 22:29:45.852274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31172 22:29:45.852685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31174 22:29:45.889495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31175 22:29:45.889936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31177 22:29:45.949871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31178 22:29:45.950312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31180 22:29:45.985704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31181 22:29:45.986135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31183 22:29:46.025958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31185 22:29:46.026449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31186 22:29:46.059026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31187 22:29:46.059427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31189 22:29:46.093308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31190 22:29:46.093704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31192 22:29:46.128753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31193 22:29:46.129202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31195 22:29:46.166383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31197 22:29:46.167015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31198 22:29:46.204122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31199 22:29:46.204548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31201 22:29:46.244172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31202 22:29:46.244587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31204 22:29:46.289027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31206 22:29:46.289446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31207 22:29:46.324030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31208 22:29:46.324531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31210 22:29:46.359517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31211 22:29:46.359945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31213 22:29:46.393918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31214 22:29:46.394449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31216 22:29:46.435676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31217 22:29:46.436207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31219 22:29:46.472379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31220 22:29:46.472803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31222 22:29:46.506779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31224 22:29:46.507232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31225 22:29:46.547194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31226 22:29:46.547692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31228 22:29:46.584743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31229 22:29:46.585211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31231 22:29:46.623981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31232 22:29:46.624386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31234 22:29:46.663417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31236 22:29:46.663845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31237 22:29:46.705629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31238 22:29:46.706287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31240 22:29:46.741184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31241 22:29:46.741609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31243 22:29:46.785794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31245 22:29:46.786510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31246 22:29:46.840214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31248 22:29:46.840783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31249 22:29:46.881426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31250 22:29:46.881916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31252 22:29:46.917840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31253 22:29:46.918412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31255 22:29:46.953321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31256 22:29:46.953688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31258 22:29:46.992066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31259 22:29:46.992420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31261 22:29:47.032319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31262 22:29:47.032732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31264 22:29:47.071848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31266 22:29:47.072275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31267 22:29:47.108688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31268 22:29:47.109045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31270 22:29:47.154786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31271 22:29:47.155133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31273 22:29:47.189019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31275 22:29:47.189490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31276 22:29:47.228124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31277 22:29:47.228518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31279 22:29:47.274021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31280 22:29:47.274434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31282 22:29:47.312425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31284 22:29:47.312876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31285 22:29:47.351944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31287 22:29:47.352393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31288 22:29:47.394072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31289 22:29:47.394473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31291 22:29:47.431169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31292 22:29:47.431555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31294 22:29:47.477733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31295 22:29:47.478152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31297 22:29:47.523829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31298 22:29:47.524309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31300 22:29:47.569595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31301 22:29:47.570156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31303 22:29:47.612851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31305 22:29:47.613264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31306 22:29:47.652451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31307 22:29:47.652840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31309 22:29:47.694903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31310 22:29:47.695316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31312 22:29:47.740112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31314 22:29:47.740523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31315 22:29:47.800150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31316 22:29:47.800610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31318 22:29:47.859980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31319 22:29:47.860363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31321 22:29:47.917591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31322 22:29:47.918154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31324 22:29:47.965785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31326 22:29:47.966250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31327 22:29:48.002388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31329 22:29:48.003507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31330 22:29:48.038342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31332 22:29:48.038813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31333 22:29:48.075925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31334 22:29:48.076425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31336 22:29:48.110829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31337 22:29:48.111273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31339 22:29:48.145489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31341 22:29:48.145971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31342 22:29:48.181857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31344 22:29:48.182621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31345 22:29:48.220151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31346 22:29:48.220575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31348 22:29:48.254738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31349 22:29:48.255253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31351 22:29:48.299642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31352 22:29:48.300170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31354 22:29:48.345805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31356 22:29:48.346373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31357 22:29:48.383065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31358 22:29:48.383466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31360 22:29:48.416647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31362 22:29:48.417079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31363 22:29:48.460113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31365 22:29:48.460605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31366 22:29:48.508954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31367 22:29:48.509404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31369 22:29:48.554332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31371 22:29:48.554807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31372 22:29:48.592939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31374 22:29:48.593420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31375 22:29:48.628113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31376 22:29:48.628563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31378 22:29:48.664218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31379 22:29:48.664673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31381 22:29:48.711494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31382 22:29:48.712033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31384 22:29:48.749321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31386 22:29:48.749799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31387 22:29:48.785506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31389 22:29:48.785985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31390 22:29:48.824618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31391 22:29:48.825040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31393 22:29:48.861966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31394 22:29:48.862393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31396 22:29:48.900473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31397 22:29:48.900902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31399 22:29:48.940929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31400 22:29:48.941343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31402 22:29:48.978885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31403 22:29:48.979310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31405 22:29:49.023131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31407 22:29:49.023615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31408 22:29:49.065807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31409 22:29:49.066271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31411 22:29:49.105343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31412 22:29:49.105908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31414 22:29:49.141701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31415 22:29:49.142170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31417 22:29:49.179387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31419 22:29:49.179855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31420 22:29:49.215747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31421 22:29:49.216199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31423 22:29:49.256498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31424 22:29:49.256938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31426 22:29:49.294400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31428 22:29:49.294857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31429 22:29:49.331932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31431 22:29:49.332394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31432 22:29:49.367962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31434 22:29:49.368418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31435 22:29:49.405428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31436 22:29:49.405864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31438 22:29:49.443955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31439 22:29:49.444352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31441 22:29:49.487754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31442 22:29:49.488171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31444 22:29:49.533298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31445 22:29:49.533688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31447 22:29:49.573573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31448 22:29:49.574019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31450 22:29:49.618405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31452 22:29:49.618819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31453 22:29:49.674018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31455 22:29:49.674828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31456 22:29:49.728543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31457 22:29:49.728967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31459 22:29:49.783794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31460 22:29:49.784240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31462 22:29:49.839083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31463 22:29:49.839512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31465 22:29:49.893266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31467 22:29:49.893718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31468 22:29:49.936784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31470 22:29:49.937308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31471 22:29:49.971193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31472 22:29:49.971635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31474 22:29:50.007346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31475 22:29:50.007875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31477 22:29:50.046113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31479 22:29:50.046768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31480 22:29:50.087117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31481 22:29:50.087505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31483 22:29:50.124725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31484 22:29:50.125112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31486 22:29:50.168892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31487 22:29:50.169294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31489 22:29:50.211144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31490 22:29:50.211632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31492 22:29:50.248388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31493 22:29:50.248806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31495 22:29:50.288415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31496 22:29:50.288860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31498 22:29:50.328639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31499 22:29:50.329155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31501 22:29:50.365880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31502 22:29:50.366310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31504 22:29:50.410528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31506 22:29:50.411018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31507 22:29:50.451521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31508 22:29:50.451941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31510 22:29:50.488114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31512 22:29:50.488566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31513 22:29:50.524948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31514 22:29:50.525370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31516 22:29:50.561933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31517 22:29:50.562377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31519 22:29:50.616931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31521 22:29:50.617380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31522 22:29:50.667589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31523 22:29:50.668044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31525 22:29:50.704609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31527 22:29:50.705075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31528 22:29:50.740108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31529 22:29:50.740672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31531 22:29:50.778426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31533 22:29:50.778833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31534 22:29:50.823870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31535 22:29:50.824287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31537 22:29:50.859331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31539 22:29:50.859820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31540 22:29:50.907662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31541 22:29:50.908234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31543 22:29:50.963007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31544 22:29:50.963392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31546 22:29:51.011295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31547 22:29:51.011681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31549 22:29:51.070012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31550 22:29:51.070420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31552 22:29:51.115852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31553 22:29:51.116283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31555 22:29:51.169147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31557 22:29:51.169602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31558 22:29:51.212855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31560 22:29:51.213326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31561 22:29:51.252843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31563 22:29:51.253322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31564 22:29:51.292444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31565 22:29:51.292889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31567 22:29:51.331358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31568 22:29:51.331802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31570 22:29:51.369441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31571 22:29:51.369848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31573 22:29:51.404203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31574 22:29:51.404598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31576 22:29:51.439897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31578 22:29:51.440278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31579 22:29:51.475430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31580 22:29:51.475885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31582 22:29:51.523820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31584 22:29:51.524419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31585 22:29:51.560772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31586 22:29:51.561188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31588 22:29:51.599711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31589 22:29:51.600166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31591 22:29:51.640685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31592 22:29:51.641099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31594 22:29:51.678872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31596 22:29:51.679450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31597 22:29:51.714723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31598 22:29:51.715137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31600 22:29:51.751125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31601 22:29:51.751558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31603 22:29:51.800035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31604 22:29:51.800484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31606 22:29:51.837162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31607 22:29:51.837603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31609 22:29:51.871485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31610 22:29:51.871959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31612 22:29:51.908387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31613 22:29:51.908835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31615 22:29:51.945670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31616 22:29:51.946200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31618 22:29:51.991707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31619 22:29:51.992054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31621 22:29:52.042828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31622 22:29:52.043326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31624 22:29:52.082189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31626 22:29:52.082667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31627 22:29:52.129134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31629 22:29:52.129892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31630 22:29:52.178304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31632 22:29:52.178968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31633 22:29:52.229186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31634 22:29:52.229715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31636 22:29:52.275822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31637 22:29:52.276227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31639 22:29:52.312416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31641 22:29:52.312800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31642 22:29:52.353998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31643 22:29:52.354501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31645 22:29:52.407645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31647 22:29:52.408249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31648 22:29:52.444022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31649 22:29:52.444456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31651 22:29:52.485574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31652 22:29:52.486193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31654 22:29:52.521848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31655 22:29:52.522424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31657 22:29:52.561299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31659 22:29:52.561770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31660 22:29:52.603262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31661 22:29:52.603682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31663 22:29:52.660395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31665 22:29:52.660859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31666 22:29:52.708226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31668 22:29:52.708699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31669 22:29:52.760299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31671 22:29:52.760773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31672 22:29:52.813847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31673 22:29:52.814251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31675 22:29:52.872647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31677 22:29:52.873130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31678 22:29:52.924961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31679 22:29:52.925374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31681 22:29:52.976123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31682 22:29:52.976523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31684 22:29:53.015857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31686 22:29:53.016250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31687 22:29:53.060129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31688 22:29:53.060555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31690 22:29:53.112267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31691 22:29:53.112689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31693 22:29:53.155553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31694 22:29:53.156018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31696 22:29:53.197124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31697 22:29:53.197560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31699 22:29:53.239021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31700 22:29:53.239418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31702 22:29:53.279357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31703 22:29:53.279792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31705 22:29:53.315332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31706 22:29:53.315771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31708 22:29:53.352463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31709 22:29:53.352876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31711 22:29:53.389729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31712 22:29:53.390248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31714 22:29:53.433760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31716 22:29:53.434193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31717 22:29:53.478713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31718 22:29:53.479160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31720 22:29:53.520175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31721 22:29:53.520528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31723 22:29:53.570623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31725 22:29:53.571297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31726 22:29:53.628760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31728 22:29:53.629281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31729 22:29:53.681876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31730 22:29:53.682311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31732 22:29:53.718995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31733 22:29:53.719428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31735 22:29:53.755876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31736 22:29:53.756324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31738 22:29:53.793390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31739 22:29:53.793764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31741 22:29:53.835596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31742 22:29:53.836025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31744 22:29:53.881323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31746 22:29:53.881810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31747 22:29:53.926051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31749 22:29:53.926543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31750 22:29:53.982422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31752 22:29:53.983912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31753 22:29:54.024589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31754 22:29:54.024979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31756 22:29:54.066499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31758 22:29:54.066964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31759 22:29:54.106272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31761 22:29:54.106756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31762 22:29:54.144016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31763 22:29:54.144526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31765 22:29:54.183451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31766 22:29:54.183936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31768 22:29:54.227012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31769 22:29:54.227431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31771 22:29:54.270158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31773 22:29:54.270615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31774 22:29:54.316461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31775 22:29:54.316885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31777 22:29:54.357626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31779 22:29:54.358110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31780 22:29:54.395813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31781 22:29:54.396232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31783 22:29:54.435866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31785 22:29:54.436292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31786 22:29:54.476573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31788 22:29:54.476996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31789 22:29:54.519873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31791 22:29:54.520346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31792 22:29:54.575218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31793 22:29:54.575605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31795 22:29:54.633408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31797 22:29:54.634139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31798 22:29:54.676888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31800 22:29:54.677361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31801 22:29:54.720062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31803 22:29:54.720540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31804 22:29:54.771562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31805 22:29:54.771966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31807 22:29:54.823346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31808 22:29:54.823795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31810 22:29:54.873301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31811 22:29:54.873735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31813 22:29:54.911237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31814 22:29:54.911632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31816 22:29:54.945065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31817 22:29:54.945488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31819 22:29:54.979631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31820 22:29:54.980058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31822 22:29:55.016053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31824 22:29:55.016541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31825 22:29:55.051507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31826 22:29:55.052058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31828 22:29:55.086939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31830 22:29:55.087340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31831 22:29:55.123192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31832 22:29:55.123707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
31834 22:29:55.159465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
31835 22:29:55.159822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
31837 22:29:55.195761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
31839 22:29:55.196500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
31840 22:29:55.239613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
31841 22:29:55.240009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
31843 22:29:55.283301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
31845 22:29:55.283900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
31846 22:29:55.320513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
31847 22:29:55.321028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
31849 22:29:55.357857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
31851 22:29:55.358307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
31852 22:29:55.392768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
31853 22:29:55.393215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
31855 22:29:55.435128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
31856 22:29:55.435571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
31858 22:29:55.477464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
31859 22:29:55.477913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
31861 22:29:55.517162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
31862 22:29:55.517587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
31864 22:29:55.562850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
31865 22:29:55.563279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
31867 22:29:55.612232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
31868 22:29:55.612691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
31870 22:29:55.647849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
31871 22:29:55.648388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
31873 22:29:55.684063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
31874 22:29:55.684590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
31876 22:29:55.732220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
31877 22:29:55.732800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
31879 22:29:55.776210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
31880 22:29:55.776670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
31882 22:29:55.820564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
31883 22:29:55.821108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
31885 22:29:55.863865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
31886 22:29:55.864236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
31888 22:29:55.904983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
31890 22:29:55.905422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
31891 22:29:55.946392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
31893 22:29:55.946815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
31894 22:29:55.997243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
31895 22:29:55.997768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
31897 22:29:56.048150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
31898 22:29:56.048580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
31900 22:29:56.089972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
31901 22:29:56.090384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
31903 22:29:56.132369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
31904 22:29:56.132774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
31906 22:29:56.215706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
31908 22:29:56.216162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
31909 22:29:56.256531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
31910 22:29:56.256970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
31912 22:29:56.301759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
31913 22:29:56.302211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
31915 22:29:56.339008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
31917 22:29:56.339471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
31918 22:29:56.380174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
31920 22:29:56.380593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
31921 22:29:56.423695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
31923 22:29:56.424151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
31924 22:29:56.472106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
31926 22:29:56.472584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
31927 22:29:56.528943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
31928 22:29:56.529322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
31930 22:29:56.568205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
31931 22:29:56.568621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
31933 22:29:56.606225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
31935 22:29:56.606704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
31936 22:29:56.653818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
31937 22:29:56.654258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
31939 22:29:56.704275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
31940 22:29:56.704736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
31942 22:29:56.750126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
31943 22:29:56.750518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
31945 22:29:56.806175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
31947 22:29:56.806794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
31948 22:29:56.863766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
31949 22:29:56.864173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
31951 22:29:56.914039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
31952 22:29:56.914497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
31954 22:29:56.953426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
31956 22:29:56.953913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
31957 22:29:56.995966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
31958 22:29:56.996371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
31960 22:29:57.043918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
31962 22:29:57.044291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
31963 22:29:57.088298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
31964 22:29:57.088758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
31966 22:29:57.127729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
31968 22:29:57.128181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
31969 22:29:57.165914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
31970 22:29:57.166341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
31972 22:29:57.211080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
31973 22:29:57.211517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
31975 22:29:57.255659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
31976 22:29:57.256110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
31978 22:29:57.296810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
31979 22:29:57.297273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
31981 22:29:57.335954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
31982 22:29:57.336405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
31984 22:29:57.377129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
31985 22:29:57.377588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
31987 22:29:57.424735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
31988 22:29:57.425182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
31990 22:29:57.458891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
31992 22:29:57.459375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
31993 22:29:57.499588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
31994 22:29:57.499999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
31996 22:29:57.540181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
31997 22:29:57.540597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
31999 22:29:57.577059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32001 22:29:57.577512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32002 22:29:57.612832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32003 22:29:57.613231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32005 22:29:57.649822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32006 22:29:57.650247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32008 22:29:57.684825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32009 22:29:57.685227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32011 22:29:57.723704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32012 22:29:57.724115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32014 22:29:57.769098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32015 22:29:57.769481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32017 22:29:57.821993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32019 22:29:57.822483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32020 22:29:57.874850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32021 22:29:57.875214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32023 22:29:57.921694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32024 22:29:57.922122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32026 22:29:57.973041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32027 22:29:57.973460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32029 22:29:58.009433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32030 22:29:58.009884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32032 22:29:58.050161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32033 22:29:58.050574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32035 22:29:58.092159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32036 22:29:58.092560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32038 22:29:58.126676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32039 22:29:58.127153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32041 22:29:58.160289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32043 22:29:58.160913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32044 22:29:58.193732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32045 22:29:58.194320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32047 22:29:58.228111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32049 22:29:58.228699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32050 22:29:58.261269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32051 22:29:58.261688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32053 22:29:58.296084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32054 22:29:58.296460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32056 22:29:58.332321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32058 22:29:58.332777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32059 22:29:58.372092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32061 22:29:58.372875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32062 22:29:58.407935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32064 22:29:58.408402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32065 22:29:58.444610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32067 22:29:58.445068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32068 22:29:58.479234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32070 22:29:58.479589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32071 22:29:58.518442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32073 22:29:58.518845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32074 22:29:58.551618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32075 22:29:58.552017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32077 22:29:58.584952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32078 22:29:58.585404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32080 22:29:58.619464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32081 22:29:58.619884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32083 22:29:58.662369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32085 22:29:58.662856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32086 22:29:58.699823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32088 22:29:58.700398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32089 22:29:58.754570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32091 22:29:58.755196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32092 22:29:58.795678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32093 22:29:58.796181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32095 22:29:58.850955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32096 22:29:58.851349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32098 22:29:58.908529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32100 22:29:58.909020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32101 22:29:58.952077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32102 22:29:58.952461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32104 22:29:58.987807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32106 22:29:58.988217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32107 22:29:59.022371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32109 22:29:59.022769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32110 22:29:59.060335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32111 22:29:59.060773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32113 22:29:59.097862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32114 22:29:59.098310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32116 22:29:59.147713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32117 22:29:59.148098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32119 22:29:59.191711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32121 22:29:59.192189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32122 22:29:59.229931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32124 22:29:59.230383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32125 22:29:59.263911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32126 22:29:59.264290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32128 22:29:59.307784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32129 22:29:59.308206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32131 22:29:59.350440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32133 22:29:59.350844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32134 22:29:59.400476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32136 22:29:59.400914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32137 22:29:59.434328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32139 22:29:59.434744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32140 22:29:59.468045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32141 22:29:59.468465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32143 22:29:59.512491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32144 22:29:59.512902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32146 22:29:59.557183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32148 22:29:59.557555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32149 22:29:59.595436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32150 22:29:59.595806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32152 22:29:59.629105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32153 22:29:59.629672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32155 22:29:59.669897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32156 22:29:59.670409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32158 22:29:59.705531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32159 22:29:59.706011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32161 22:29:59.750894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32163 22:29:59.751376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32164 22:29:59.799245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32165 22:29:59.799698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32167 22:29:59.838922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32168 22:29:59.839474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32170 22:29:59.872918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32171 22:29:59.873420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32173 22:29:59.906942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32174 22:29:59.907384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32176 22:29:59.947397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32177 22:29:59.947831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32179 22:29:59.985297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32181 22:29:59.985859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32182 22:30:00.022951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32184 22:30:00.023519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32185 22:30:00.056570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32186 22:30:00.057027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32188 22:30:00.092670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32190 22:30:00.093333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32191 22:30:00.132237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32192 22:30:00.132651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32194 22:30:00.171082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32195 22:30:00.171546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32197 22:30:00.207545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32199 22:30:00.208007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32200 22:30:00.249977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32201 22:30:00.250417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32203 22:30:00.289655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32205 22:30:00.290125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32206 22:30:00.328370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32207 22:30:00.328749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32209 22:30:00.368517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32210 22:30:00.368943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32212 22:30:00.407257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32213 22:30:00.407706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32215 22:30:00.448214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32216 22:30:00.448722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32218 22:30:00.488917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32220 22:30:00.489392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32221 22:30:00.526162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32223 22:30:00.526946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32224 22:30:00.560767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32225 22:30:00.561270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32227 22:30:00.595463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32228 22:30:00.595951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32230 22:30:00.629521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32231 22:30:00.629986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32233 22:30:00.665815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32234 22:30:00.666397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32236 22:30:00.708442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32238 22:30:00.708926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32239 22:30:00.744296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32241 22:30:00.744767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32242 22:30:00.781854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32243 22:30:00.782358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32245 22:30:00.823386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32247 22:30:00.823786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32248 22:30:00.859280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32249 22:30:00.859700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32251 22:30:00.895589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32253 22:30:00.896059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32254 22:30:00.929757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32255 22:30:00.930307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32257 22:30:00.964355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32259 22:30:00.964818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32260 22:30:00.998728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32261 22:30:00.999134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32263 22:30:01.048294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32265 22:30:01.048750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32266 22:30:01.089977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32268 22:30:01.090645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32269 22:30:01.136368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32271 22:30:01.136782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32272 22:30:01.185668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32273 22:30:01.186080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32275 22:30:01.233046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32277 22:30:01.233554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32278 22:30:01.312265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32279 22:30:01.312706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32281 22:30:01.359639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32283 22:30:01.360079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32284 22:30:01.399978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32285 22:30:01.400395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32287 22:30:01.451649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32288 22:30:01.452109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32290 22:30:01.507496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32291 22:30:01.507884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32293 22:30:01.561658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32295 22:30:01.562116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32296 22:30:01.618555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32298 22:30:01.618973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32299 22:30:01.664809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32300 22:30:01.665205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32302 22:30:01.718012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32303 22:30:01.718420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32305 22:30:01.767715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32306 22:30:01.768146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32308 22:30:01.805562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32309 22:30:01.806030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32311 22:30:01.844671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32312 22:30:01.845094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32314 22:30:01.882003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32315 22:30:01.882457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32317 22:30:01.936268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32318 22:30:01.936683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32320 22:30:01.989797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32321 22:30:01.990201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32323 22:30:02.040241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32324 22:30:02.040680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32326 22:30:02.081849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32327 22:30:02.082253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32329 22:30:02.123659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32331 22:30:02.124207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32332 22:30:02.180377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32333 22:30:02.180912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32335 22:30:02.224099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32337 22:30:02.224526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32338 22:30:02.269937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32339 22:30:02.270329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32341 22:30:02.321150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32343 22:30:02.321553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32344 22:30:02.369898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32345 22:30:02.370365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32347 22:30:02.414456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32349 22:30:02.414909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32350 22:30:02.459716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32351 22:30:02.460145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32353 22:30:02.504344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32355 22:30:02.504823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32356 22:30:02.546706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32358 22:30:02.547162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32359 22:30:02.590470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32361 22:30:02.590975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32362 22:30:02.634997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32363 22:30:02.635394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32365 22:30:02.677983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32366 22:30:02.678478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32368 22:30:02.728186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32369 22:30:02.728607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32371 22:30:02.770469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32373 22:30:02.770970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32374 22:30:02.832657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32375 22:30:02.833097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32377 22:30:02.891890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32379 22:30:02.892362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32380 22:30:02.945259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32382 22:30:02.945636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32383 22:30:02.996975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32384 22:30:02.997414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32386 22:30:03.052272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32387 22:30:03.052831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32389 22:30:03.104952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32390 22:30:03.105333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32392 22:30:03.145744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32393 22:30:03.146225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32395 22:30:03.196063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32396 22:30:03.196480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32398 22:30:03.244697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32400 22:30:03.245163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32401 22:30:03.297473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32402 22:30:03.297879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32404 22:30:03.336554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32405 22:30:03.336992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32407 22:30:03.375280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32408 22:30:03.375706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32410 22:30:03.419563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32411 22:30:03.420131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32413 22:30:03.462784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32415 22:30:03.463428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32416 22:30:03.504567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32417 22:30:03.505003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32419 22:30:03.544701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32420 22:30:03.545077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32422 22:30:03.589794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32423 22:30:03.590247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32425 22:30:03.636388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32427 22:30:03.636870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32428 22:30:03.692344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32429 22:30:03.692777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32431 22:30:03.737028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32432 22:30:03.737440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32434 22:30:03.773659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32435 22:30:03.774096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32437 22:30:03.811413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32438 22:30:03.811834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32440 22:30:03.847289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32441 22:30:03.847714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32443 22:30:03.884003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32444 22:30:03.884423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32446 22:30:03.920801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32447 22:30:03.921219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32449 22:30:03.957507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32450 22:30:03.957944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32452 22:30:03.993806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32453 22:30:03.994250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32455 22:30:04.031255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32456 22:30:04.031745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32458 22:30:04.073828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32460 22:30:04.074256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32461 22:30:04.111926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32463 22:30:04.112394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32464 22:30:04.149134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32465 22:30:04.149543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32467 22:30:04.197994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32468 22:30:04.198452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32470 22:30:04.241767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32471 22:30:04.242199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32473 22:30:04.281194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32475 22:30:04.281727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32476 22:30:04.328121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32477 22:30:04.328552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32479 22:30:04.376037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32480 22:30:04.376525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32482 22:30:04.420146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32483 22:30:04.420624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32485 22:30:04.463881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32487 22:30:04.464266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32488 22:30:04.521938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32489 22:30:04.522327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32491 22:30:04.563560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32492 22:30:04.563953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32494 22:30:04.614157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32495 22:30:04.614568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32497 22:30:04.663997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32498 22:30:04.664423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32500 22:30:04.705506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32502 22:30:04.705989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32503 22:30:04.751147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32504 22:30:04.751579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32506 22:30:04.799302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32507 22:30:04.799734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32509 22:30:04.848258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32510 22:30:04.848646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32512 22:30:04.899414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32513 22:30:04.899809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32515 22:30:04.955627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32517 22:30:04.956077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32518 22:30:05.005101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32519 22:30:05.005527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32521 22:30:05.050418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32523 22:30:05.050877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32524 22:30:05.090852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32526 22:30:05.091321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32527 22:30:05.141000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32529 22:30:05.141473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32530 22:30:05.188422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32531 22:30:05.188852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32533 22:30:05.237934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32534 22:30:05.238407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32536 22:30:05.289324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32537 22:30:05.289684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32539 22:30:05.337918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32540 22:30:05.338317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32542 22:30:05.393384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32543 22:30:05.393828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32545 22:30:05.445110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32546 22:30:05.445690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32548 22:30:05.488389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32549 22:30:05.488812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32551 22:30:05.531595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32552 22:30:05.532028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32554 22:30:05.585321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32555 22:30:05.585767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32557 22:30:05.629971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32558 22:30:05.630478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32560 22:30:05.674066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32561 22:30:05.674525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32563 22:30:05.728877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32564 22:30:05.729313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32566 22:30:05.785356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32567 22:30:05.785766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32569 22:30:05.842356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32571 22:30:05.843079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32572 22:30:05.884798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32573 22:30:05.885235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32575 22:30:05.928647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32576 22:30:05.929093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32578 22:30:05.978060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32579 22:30:05.978500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32581 22:30:06.016485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32582 22:30:06.016914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32584 22:30:06.060048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32585 22:30:06.060437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32587 22:30:06.116686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32588 22:30:06.117086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32590 22:30:06.164848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32591 22:30:06.165240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32593 22:30:06.204695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32594 22:30:06.205096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32596 22:30:06.243796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32598 22:30:06.244185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32599 22:30:06.293533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32600 22:30:06.293996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32602 22:30:06.332840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32604 22:30:06.333223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32605 22:30:06.370533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32607 22:30:06.370949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32608 22:30:06.428135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32609 22:30:06.428641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32611 22:30:06.467902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32612 22:30:06.468330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32614 22:30:06.513736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32615 22:30:06.514171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32617 22:30:06.560543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32618 22:30:06.560973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32620 22:30:06.601462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32621 22:30:06.601916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32623 22:30:06.647764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32624 22:30:06.648190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32626 22:30:06.691971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32628 22:30:06.692447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32629 22:30:06.742525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32631 22:30:06.743013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32632 22:30:06.791871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32633 22:30:06.792309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32635 22:30:06.830372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32637 22:30:06.830845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32638 22:30:06.871052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32639 22:30:06.871506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32641 22:30:06.926107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32643 22:30:06.926579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32644 22:30:06.970869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32646 22:30:06.971366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32647 22:30:07.009535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32648 22:30:07.009993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32650 22:30:07.047674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32651 22:30:07.048106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32653 22:30:07.083316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32654 22:30:07.083753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32656 22:30:07.124694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32657 22:30:07.125100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32659 22:30:07.171308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32660 22:30:07.171698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32662 22:30:07.209423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32663 22:30:07.209883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32665 22:30:07.268872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32666 22:30:07.269285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32668 22:30:07.322031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32669 22:30:07.322527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32671 22:30:07.369244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32672 22:30:07.369689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32674 22:30:07.427997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32675 22:30:07.428450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32677 22:30:07.476886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32679 22:30:07.477394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32680 22:30:07.522156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32681 22:30:07.525750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32683 22:30:07.563128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32684 22:30:07.563505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32686 22:30:07.599435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32687 22:30:07.599808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32689 22:30:07.653751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32690 22:30:07.654226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32692 22:30:07.691986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32694 22:30:07.692455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32695 22:30:07.740574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32696 22:30:07.740951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32698 22:30:07.788242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32699 22:30:07.788614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32701 22:30:07.850304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32703 22:30:07.850781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32704 22:30:07.911959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32706 22:30:07.912385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32707 22:30:07.957330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32708 22:30:07.957736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32710 22:30:08.007829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32712 22:30:08.008291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32713 22:30:08.064534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32714 22:30:08.064972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32716 22:30:08.113768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32717 22:30:08.114191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32719 22:30:08.159697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32721 22:30:08.160171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32722 22:30:08.200254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32724 22:30:08.200716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32725 22:30:08.240819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32727 22:30:08.241303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32728 22:30:08.283254 <47>[ 397.633943] systemd-journald[105]: Sent WATCHDOG=1 notification.
32729 22:30:08.309921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32730 22:30:08.310379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32732 22:30:08.360346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32733 22:30:08.360751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32735 22:30:08.404975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32737 22:30:08.405423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32738 22:30:08.457280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32739 22:30:08.457692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32741 22:30:08.508392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32742 22:30:08.508824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32744 22:30:08.550041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32746 22:30:08.550525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32747 22:30:08.606912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32748 22:30:08.607340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32750 22:30:08.657313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32751 22:30:08.657773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32753 22:30:08.702934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32754 22:30:08.703385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32756 22:30:08.738438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32758 22:30:08.738959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32759 22:30:08.792013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32760 22:30:08.792413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32762 22:30:08.848114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32763 22:30:08.848556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32765 22:30:08.903671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32767 22:30:08.904126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32768 22:30:08.957542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32769 22:30:08.958027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32771 22:30:09.012740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32773 22:30:09.013224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32774 22:30:09.071235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32775 22:30:09.071677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32777 22:30:09.129354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32778 22:30:09.129766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32780 22:30:09.187521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32781 22:30:09.187955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32783 22:30:09.244964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32785 22:30:09.245378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32786 22:30:09.303710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32787 22:30:09.304160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32789 22:30:09.356030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32791 22:30:09.356452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32792 22:30:09.411502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32793 22:30:09.411947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32795 22:30:09.469062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32796 22:30:09.469516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32798 22:30:09.525636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32799 22:30:09.526109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32801 22:30:09.577180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32803 22:30:09.577663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32804 22:30:09.628740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32805 22:30:09.629167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32807 22:30:09.680142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32808 22:30:09.680585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32810 22:30:09.720788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32811 22:30:09.721198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32813 22:30:09.772634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32815 22:30:09.773066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32816 22:30:09.832027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32817 22:30:09.832535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32819 22:30:09.887521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32821 22:30:09.887991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32822 22:30:09.930498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32824 22:30:09.931122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32825 22:30:09.969806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32826 22:30:09.970266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32828 22:30:10.009989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32829 22:30:10.010426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32831 22:30:10.048788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32832 22:30:10.049189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
32834 22:30:10.093245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
32835 22:30:10.093698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
32837 22:30:10.131786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
32838 22:30:10.132207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
32840 22:30:10.170178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
32841 22:30:10.170633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
32843 22:30:10.207935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
32844 22:30:10.208404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
32846 22:30:10.252468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
32848 22:30:10.252948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
32849 22:30:10.295681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
32850 22:30:10.296136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
32852 22:30:10.337530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
32853 22:30:10.337940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
32855 22:30:10.377150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
32857 22:30:10.377645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
32858 22:30:10.417344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
32859 22:30:10.417778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
32861 22:30:10.463342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
32863 22:30:10.463818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
32864 22:30:10.504633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
32865 22:30:10.505061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
32867 22:30:10.548369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
32868 22:30:10.548815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
32870 22:30:10.592325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
32871 22:30:10.592745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
32873 22:30:10.641625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
32874 22:30:10.642080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
32876 22:30:10.688288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
32877 22:30:10.688750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
32879 22:30:10.733815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
32880 22:30:10.734261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
32882 22:30:10.781106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
32884 22:30:10.781512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
32885 22:30:10.826334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
32887 22:30:10.826823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
32888 22:30:10.874824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
32889 22:30:10.875290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
32891 22:30:10.924397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
32893 22:30:10.924898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
32894 22:30:10.977491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
32895 22:30:10.977976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
32897 22:30:11.024308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
32898 22:30:11.024740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
32900 22:30:11.068113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
32902 22:30:11.068583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
32903 22:30:11.109559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
32904 22:30:11.110019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
32906 22:30:11.161842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
32907 22:30:11.162299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
32909 22:30:11.203834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
32910 22:30:11.204304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
32912 22:30:11.245784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
32913 22:30:11.246214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
32915 22:30:11.289781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
32916 22:30:11.290224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
32918 22:30:11.347267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
32919 22:30:11.347714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
32921 22:30:11.396905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
32923 22:30:11.397409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
32924 22:30:11.458859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
32926 22:30:11.459301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
32927 22:30:11.515930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
32928 22:30:11.516396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
32930 22:30:11.582368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
32932 22:30:11.583153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
32933 22:30:11.633191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
32934 22:30:11.633708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
32936 22:30:11.685255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
32937 22:30:11.685704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
32939 22:30:11.737913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
32940 22:30:11.738324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
32942 22:30:11.789878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
32943 22:30:11.790317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
32945 22:30:11.844110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
32947 22:30:11.844618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
32948 22:30:11.899247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
32949 22:30:11.899682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
32951 22:30:11.952718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
32952 22:30:11.953136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
32954 22:30:12.009530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
32955 22:30:12.009967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
32957 22:30:12.063230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
32959 22:30:12.063735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
32960 22:30:12.117258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
32961 22:30:12.117689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
32963 22:30:12.159105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
32964 22:30:12.159519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
32966 22:30:12.201207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
32967 22:30:12.201619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
32969 22:30:12.240694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
32970 22:30:12.241138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
32972 22:30:12.287781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
32973 22:30:12.288212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
32975 22:30:12.340744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
32976 22:30:12.341125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
32978 22:30:12.382384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
32980 22:30:12.382959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
32981 22:30:12.437130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
32983 22:30:12.437589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
32984 22:30:12.481363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
32986 22:30:12.481877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
32987 22:30:12.521116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
32989 22:30:12.521503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
32990 22:30:12.561866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
32992 22:30:12.562386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
32993 22:30:12.604127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
32994 22:30:12.604565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
32996 22:30:12.658903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
32997 22:30:12.659342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
32999 22:30:12.702665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33001 22:30:12.703187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33002 22:30:12.748945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33003 22:30:12.749390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33005 22:30:12.808910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33007 22:30:12.809415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33008 22:30:12.871662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33010 22:30:12.872128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33011 22:30:12.932877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33013 22:30:12.933292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33014 22:30:12.993022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33016 22:30:12.993435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33017 22:30:13.053133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33018 22:30:13.053556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33020 22:30:13.091900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33021 22:30:13.092360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33023 22:30:13.132154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33024 22:30:13.132579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33026 22:30:13.168288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33027 22:30:13.168715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33029 22:30:13.211769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33031 22:30:13.212177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33032 22:30:13.270309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33034 22:30:13.270845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33035 22:30:13.333734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33036 22:30:13.334171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33038 22:30:13.393811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33040 22:30:13.394269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33041 22:30:13.451788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33042 22:30:13.452194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33044 22:30:13.501046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33045 22:30:13.501471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33047 22:30:13.544427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33048 22:30:13.544862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33050 22:30:13.588611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33052 22:30:13.589149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33053 22:30:13.639889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33055 22:30:13.640392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33056 22:30:13.689570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33057 22:30:13.689995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33059 22:30:13.741044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33060 22:30:13.741443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33062 22:30:13.792508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33064 22:30:13.792999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33065 22:30:13.841501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33066 22:30:13.841932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33068 22:30:13.887594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33069 22:30:13.888048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33071 22:30:13.942533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33073 22:30:13.943057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33074 22:30:13.991900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33075 22:30:13.992326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33077 22:30:14.033256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33078 22:30:14.033693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33080 22:30:14.074809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33081 22:30:14.075233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33083 22:30:14.113152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33084 22:30:14.113548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33086 22:30:14.158024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33087 22:30:14.158430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33089 22:30:14.202465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33091 22:30:14.202880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33092 22:30:14.247607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33093 22:30:14.248081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33095 22:30:14.291668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33096 22:30:14.292057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33098 22:30:14.333595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33099 22:30:14.334028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33101 22:30:14.375546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33102 22:30:14.375952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33104 22:30:14.429479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33106 22:30:14.429991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33107 22:30:14.490556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33109 22:30:14.491033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33110 22:30:14.550200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33111 22:30:14.550646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33113 22:30:14.600768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33114 22:30:14.601175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33116 22:30:14.641627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33117 22:30:14.642083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33119 22:30:14.683864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33121 22:30:14.684327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33122 22:30:14.739657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33123 22:30:14.740097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33125 22:30:14.789810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33126 22:30:14.790253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33128 22:30:14.831119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33129 22:30:14.831544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33131 22:30:14.871509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33132 22:30:14.872006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33134 22:30:14.919622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33135 22:30:14.920016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33137 22:30:14.965238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33138 22:30:14.965620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33140 22:30:15.003713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33141 22:30:15.004224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33143 22:30:15.042090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33145 22:30:15.042476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33146 22:30:15.082359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33148 22:30:15.082909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33149 22:30:15.119885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33150 22:30:15.120305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33152 22:30:15.157381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33153 22:30:15.157809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33155 22:30:15.196004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33157 22:30:15.196460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33158 22:30:15.236535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33159 22:30:15.236969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33161 22:30:15.282511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33163 22:30:15.282986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33164 22:30:15.323048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33166 22:30:15.323702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33167 22:30:15.367885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33168 22:30:15.368265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33170 22:30:15.415528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33171 22:30:15.416097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33173 22:30:15.452794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33175 22:30:15.453269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33176 22:30:15.501914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33177 22:30:15.502359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33179 22:30:15.560687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33181 22:30:15.561360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33182 22:30:15.609413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33183 22:30:15.609831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33185 22:30:15.649599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33186 22:30:15.650037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33188 22:30:15.693145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33189 22:30:15.693548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33191 22:30:15.733062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33192 22:30:15.733467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33194 22:30:15.775699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33196 22:30:15.776205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33197 22:30:15.816358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33198 22:30:15.816762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33200 22:30:15.860144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33201 22:30:15.861380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33203 22:30:15.902271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33205 22:30:15.902751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33206 22:30:15.942380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33208 22:30:15.942855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33209 22:30:15.980831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33210 22:30:15.981260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33212 22:30:16.033048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33214 22:30:16.033457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33215 22:30:16.089041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33216 22:30:16.089473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33218 22:30:16.129027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33219 22:30:16.129454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33221 22:30:16.170092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33222 22:30:16.170547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33224 22:30:16.210065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33226 22:30:16.210553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33227 22:30:16.250064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33228 22:30:16.250632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33230 22:30:16.292855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33231 22:30:16.293312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33233 22:30:16.333705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33234 22:30:16.334098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33236 22:30:16.373172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33237 22:30:16.373590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33239 22:30:16.412446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33241 22:30:16.412898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33242 22:30:16.452851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33244 22:30:16.453330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33245 22:30:16.493462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33246 22:30:16.493882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33248 22:30:16.533720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33250 22:30:16.534198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33251 22:30:16.573610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33252 22:30:16.574027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33254 22:30:16.613946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33256 22:30:16.614464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33257 22:30:16.695724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33258 22:30:16.696109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33260 22:30:16.736343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33261 22:30:16.736743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33263 22:30:16.793200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33264 22:30:16.793672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33266 22:30:16.846533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33268 22:30:16.847014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33269 22:30:16.886490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33271 22:30:16.886966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33272 22:30:16.926346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33274 22:30:16.926828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33275 22:30:16.967510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33276 22:30:16.967939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33278 22:30:17.008079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33279 22:30:17.008535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33281 22:30:17.048092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33282 22:30:17.048556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33284 22:30:17.097965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33285 22:30:17.098449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33287 22:30:17.143428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33289 22:30:17.143918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33290 22:30:17.205054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33292 22:30:17.205453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33293 22:30:17.255595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33294 22:30:17.256055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33296 22:30:17.295594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33297 22:30:17.296029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33299 22:30:17.335149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33301 22:30:17.335628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33302 22:30:17.373025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33304 22:30:17.373392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33305 22:30:17.412616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33306 22:30:17.413048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33308 22:30:17.452356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33310 22:30:17.452991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33311 22:30:17.490384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33313 22:30:17.490860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33314 22:30:17.529779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33315 22:30:17.530200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33317 22:30:17.572119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33318 22:30:17.572541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33320 22:30:17.625348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33321 22:30:17.625796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33323 22:30:17.666403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33325 22:30:17.666861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33326 22:30:17.704537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33328 22:30:17.705014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33329 22:30:17.748900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33331 22:30:17.749382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33332 22:30:17.795511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33333 22:30:17.795956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33335 22:30:17.840009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33336 22:30:17.840467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33338 22:30:17.889824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33339 22:30:17.890265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33341 22:30:17.938501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33343 22:30:17.938913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33344 22:30:17.984255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33345 22:30:17.984635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33347 22:30:18.030150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33349 22:30:18.030577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33350 22:30:18.069501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33351 22:30:18.069951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33353 22:30:18.120711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33354 22:30:18.121153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33356 22:30:18.169352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33357 22:30:18.169884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33359 22:30:18.215003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33361 22:30:18.215867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33362 22:30:18.256761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33363 22:30:18.257217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33365 22:30:18.295865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33366 22:30:18.296293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33368 22:30:18.335749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33370 22:30:18.336340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33371 22:30:18.373351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33372 22:30:18.373837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33374 22:30:18.412433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33375 22:30:18.412885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33377 22:30:18.457489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33378 22:30:18.457921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33380 22:30:18.496622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33381 22:30:18.497068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33383 22:30:18.536544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33385 22:30:18.537026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33386 22:30:18.579391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33387 22:30:18.579840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33389 22:30:18.616140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33391 22:30:18.616614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33392 22:30:18.652444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33393 22:30:18.652869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33395 22:30:18.689236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33396 22:30:18.689679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33398 22:30:18.725627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33400 22:30:18.726108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33401 22:30:18.761917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33402 22:30:18.762365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33404 22:30:18.805935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33405 22:30:18.806392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33407 22:30:18.849067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33408 22:30:18.849504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33410 22:30:18.891989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33411 22:30:18.892436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33413 22:30:18.935366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33414 22:30:18.935766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33416 22:30:18.987192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33418 22:30:18.987655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33419 22:30:19.028680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33421 22:30:19.029452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33422 22:30:19.068445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33423 22:30:19.068868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33425 22:30:19.108141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33426 22:30:19.108576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33428 22:30:19.163841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33430 22:30:19.164235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33431 22:30:19.212978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33432 22:30:19.213481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33434 22:30:19.264368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33435 22:30:19.264799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33437 22:30:19.309828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33438 22:30:19.310231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33440 22:30:19.351917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33441 22:30:19.352289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33443 22:30:19.389164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33444 22:30:19.389514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33446 22:30:19.432122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33447 22:30:19.432549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33449 22:30:19.474940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33450 22:30:19.475294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33452 22:30:19.519579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33453 22:30:19.519936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33455 22:30:19.569691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33456 22:30:19.570101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33458 22:30:19.606390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33460 22:30:19.606819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33461 22:30:19.644915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33462 22:30:19.645307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33464 22:30:19.682952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33465 22:30:19.683315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33467 22:30:19.725529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33468 22:30:19.725943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33470 22:30:19.771488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33472 22:30:19.771806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33473 22:30:19.828857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33475 22:30:19.829157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33476 22:30:19.875503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33477 22:30:19.875887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33479 22:30:19.933380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33480 22:30:19.933726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33482 22:30:19.972785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33483 22:30:19.973162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33485 22:30:20.009771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33486 22:30:20.010192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33488 22:30:20.046874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33490 22:30:20.047323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33491 22:30:20.084450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33492 22:30:20.084873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33494 22:30:20.123691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33496 22:30:20.124317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33497 22:30:20.161691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33498 22:30:20.162100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33500 22:30:20.200696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33501 22:30:20.201106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33503 22:30:20.247547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33504 22:30:20.247968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33506 22:30:20.286509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33508 22:30:20.286985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33509 22:30:20.329189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33510 22:30:20.329608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33512 22:30:20.365585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33514 22:30:20.366045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33515 22:30:20.402486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33517 22:30:20.402944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33518 22:30:20.448001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33519 22:30:20.448357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33521 22:30:20.495930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33522 22:30:20.496261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33524 22:30:20.537979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33525 22:30:20.538407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33527 22:30:20.576207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33528 22:30:20.576753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33530 22:30:20.619250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33531 22:30:20.619673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33533 22:30:20.656687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33534 22:30:20.657081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33536 22:30:20.693793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33537 22:30:20.694333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33539 22:30:20.732740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33541 22:30:20.733195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33542 22:30:20.785259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33543 22:30:20.785656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33545 22:30:20.835639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33547 22:30:20.836038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33548 22:30:20.880771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33549 22:30:20.881137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33551 22:30:20.920793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33552 22:30:20.921162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33554 22:30:20.959527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33556 22:30:20.960034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33557 22:30:21.005390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33558 22:30:21.005808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33560 22:30:21.060272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33562 22:30:21.060694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33563 22:30:21.095768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33565 22:30:21.096375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33566 22:30:21.136800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33567 22:30:21.137158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33569 22:30:21.189642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33570 22:30:21.190040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33572 22:30:21.242001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33573 22:30:21.242423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33575 22:30:21.285474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33576 22:30:21.285886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33578 22:30:21.321411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33580 22:30:21.321838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33581 22:30:21.357880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33582 22:30:21.358290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33584 22:30:21.396887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33585 22:30:21.397312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33587 22:30:21.436839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33589 22:30:21.437289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33590 22:30:21.477079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33592 22:30:21.477755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33593 22:30:21.515198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33595 22:30:21.515665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33596 22:30:21.553009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33598 22:30:21.553467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33599 22:30:21.604283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33600 22:30:21.604675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33602 22:30:21.656465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33603 22:30:21.656953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33605 22:30:21.706611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33607 22:30:21.707211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33608 22:30:21.741879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33609 22:30:21.742423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33611 22:30:21.808721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33612 22:30:21.809118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33614 22:30:21.859223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33615 22:30:21.859700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33617 22:30:21.902446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33619 22:30:21.902970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33620 22:30:21.943485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33622 22:30:21.944083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33623 22:30:21.981414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33624 22:30:21.981797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33626 22:30:22.017562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33627 22:30:22.018051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33629 22:30:22.054928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33630 22:30:22.055380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33632 22:30:22.087139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33634 22:30:22.087705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33635 22:30:22.120036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33636 22:30:22.120502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33638 22:30:22.152794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33639 22:30:22.153245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33641 22:30:22.186766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33643 22:30:22.187361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33644 22:30:22.224522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33645 22:30:22.224965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33647 22:30:22.261844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33648 22:30:22.262308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33650 22:30:22.300955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33652 22:30:22.301566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33653 22:30:22.338011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33654 22:30:22.338416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33656 22:30:22.377478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33657 22:30:22.378008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33659 22:30:22.417049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33660 22:30:22.417489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33662 22:30:22.452952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33663 22:30:22.453333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33665 22:30:22.493992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33666 22:30:22.494406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33668 22:30:22.547935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33670 22:30:22.548506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33671 22:30:22.584187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33673 22:30:22.584757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33674 22:30:22.620201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33675 22:30:22.620738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33677 22:30:22.655631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33679 22:30:22.656363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33680 22:30:22.691054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33682 22:30:22.691663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33683 22:30:22.730740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33684 22:30:22.731222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33686 22:30:22.767050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33687 22:30:22.767547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33689 22:30:22.803025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33690 22:30:22.803504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33692 22:30:22.848058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33693 22:30:22.848670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33695 22:30:22.891091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33696 22:30:22.891658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33698 22:30:22.945824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33699 22:30:22.946197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33701 22:30:22.992622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33702 22:30:22.993030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33704 22:30:23.030022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33705 22:30:23.030462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33707 22:30:23.069443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33708 22:30:23.069870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33710 22:30:23.103692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33712 22:30:23.104146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33713 22:30:23.140436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33715 22:30:23.140909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33716 22:30:23.188684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33717 22:30:23.189147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33719 22:30:23.225545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33721 22:30:23.226131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33722 22:30:23.272240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33724 22:30:23.272811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33725 22:30:23.312822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33726 22:30:23.313238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33728 22:30:23.360891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33730 22:30:23.361684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33731 22:30:23.403085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33733 22:30:23.403656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33734 22:30:23.439053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33736 22:30:23.439684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33737 22:30:23.475448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33739 22:30:23.475921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33740 22:30:23.510726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33741 22:30:23.511168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33743 22:30:23.546832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33744 22:30:23.547253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33746 22:30:23.582749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33747 22:30:23.583310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33749 22:30:23.620573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33750 22:30:23.621028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33752 22:30:23.665931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33753 22:30:23.666437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33755 22:30:23.700483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33757 22:30:23.701020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33758 22:30:23.736414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33759 22:30:23.736849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33761 22:30:23.780092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33762 22:30:23.780514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33764 22:30:23.831810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33765 22:30:23.832243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33767 22:30:23.875458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33768 22:30:23.875856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33770 22:30:23.920830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33771 22:30:23.921266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33773 22:30:23.963810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33774 22:30:23.964218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33776 22:30:24.003291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33777 22:30:24.003786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33779 22:30:24.039921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33780 22:30:24.040378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33782 22:30:24.081308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33783 22:30:24.081672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33785 22:30:24.120006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33786 22:30:24.120426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33788 22:30:24.163549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33789 22:30:24.163979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33791 22:30:24.200857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33792 22:30:24.201296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33794 22:30:24.237303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33795 22:30:24.237740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33797 22:30:24.274857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33798 22:30:24.275298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33800 22:30:24.318273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33802 22:30:24.318750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33803 22:30:24.361594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33804 22:30:24.362149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33806 22:30:24.410026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33808 22:30:24.410682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33809 22:30:24.464334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33810 22:30:24.464816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33812 22:30:24.509824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33813 22:30:24.510263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33815 22:30:24.549756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33816 22:30:24.550261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33818 22:30:24.585492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33819 22:30:24.585896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33821 22:30:24.620981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33823 22:30:24.621381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33824 22:30:24.656415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33826 22:30:24.656803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33827 22:30:24.693925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33828 22:30:24.694353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33830 22:30:24.729391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33831 22:30:24.729786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33833 22:30:24.764514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
33835 22:30:24.764960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33836 22:30:24.799239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33837 22:30:24.799644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33839 22:30:24.833385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33841 22:30:24.833999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33842 22:30:24.881800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33843 22:30:24.882306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
33845 22:30:24.920423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33847 22:30:24.921001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33848 22:30:24.960723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33850 22:30:24.961185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33851 22:30:24.996296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
33853 22:30:24.996762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33854 22:30:25.032726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33856 22:30:25.033145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33857 22:30:25.074177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33859 22:30:25.074618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33860 22:30:25.119949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33861 22:30:25.120370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
33863 22:30:25.173580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33864 22:30:25.174000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33866 22:30:25.220929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33867 22:30:25.221351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33869 22:30:25.256933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33870 22:30:25.257331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
33872 22:30:25.299738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33874 22:30:25.300167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33875 22:30:25.353878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
33877 22:30:25.354272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
33878 22:30:25.406407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33880 22:30:25.406835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33881 22:30:25.448890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33882 22:30:25.449311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
33884 22:30:25.496992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33885 22:30:25.497374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33887 22:30:25.540017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33889 22:30:25.540395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33890 22:30:25.594989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33891 22:30:25.595393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
33893 22:30:25.641942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33895 22:30:25.642550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33896 22:30:25.685671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33897 22:30:25.686098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33899 22:30:25.723824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33900 22:30:25.724273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
33902 22:30:25.763115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33903 22:30:25.763617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33905 22:30:25.800363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33907 22:30:25.800789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33908 22:30:25.835728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33909 22:30:25.836230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
33911 22:30:25.869818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33913 22:30:25.870469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33914 22:30:25.905349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33915 22:30:25.905770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33917 22:30:25.941789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33918 22:30:25.942216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
33920 22:30:25.977557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33921 22:30:25.977978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33923 22:30:26.012756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
33924 22:30:26.013193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
33926 22:30:26.053722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33927 22:30:26.054145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33929 22:30:26.091208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
33931 22:30:26.091786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33932 22:30:26.147336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33933 22:30:26.147836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33935 22:30:26.191050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33936 22:30:26.191566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33938 22:30:26.235284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
33940 22:30:26.236028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33941 22:30:26.282310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33943 22:30:26.282803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33944 22:30:26.332521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33945 22:30:26.332908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33947 22:30:26.368604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33948 22:30:26.369012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
33950 22:30:26.422520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33952 22:30:26.422978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33953 22:30:26.457837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33954 22:30:26.458246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33956 22:30:26.492528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33957 22:30:26.492902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
33959 22:30:26.529442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33960 22:30:26.529865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33962 22:30:26.579428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33964 22:30:26.580054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33965 22:30:26.635814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33966 22:30:26.636343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
33968 22:30:26.672266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33969 22:30:26.672683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33971 22:30:26.712257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
33972 22:30:26.712701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
33974 22:30:26.746880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33975 22:30:26.747300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33977 22:30:26.785698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33978 22:30:26.786130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
33980 22:30:26.830120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33981 22:30:26.830570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33983 22:30:26.904919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33984 22:30:26.905357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33986 22:30:26.941134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
33988 22:30:26.941588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33989 22:30:26.979508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33991 22:30:26.979971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33992 22:30:27.017531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33993 22:30:27.018139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33995 22:30:27.060577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33996 22:30:27.060971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
33998 22:30:27.095984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34000 22:30:27.096379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34001 22:30:27.132850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34003 22:30:27.133427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34004 22:30:27.175386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34005 22:30:27.175858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34007 22:30:27.215153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34008 22:30:27.215653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34010 22:30:27.252159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34012 22:30:27.252650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34013 22:30:27.288155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34014 22:30:27.288603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34016 22:30:27.323797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34017 22:30:27.324202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34019 22:30:27.359625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34020 22:30:27.360013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34022 22:30:27.400770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34023 22:30:27.401167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34025 22:30:27.441012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34027 22:30:27.441478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34028 22:30:27.480857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34029 22:30:27.481299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34031 22:30:27.515953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34032 22:30:27.516413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34034 22:30:27.552100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34035 22:30:27.552487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34037 22:30:27.586918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34038 22:30:27.587294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34040 22:30:27.620217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34042 22:30:27.620677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34043 22:30:27.653572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34044 22:30:27.654136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34046 22:30:27.688445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34047 22:30:27.688866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34049 22:30:27.724310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34050 22:30:27.724732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34052 22:30:27.760099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34054 22:30:27.760543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34055 22:30:27.799651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34056 22:30:27.800194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34058 22:30:27.842321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34060 22:30:27.842787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34061 22:30:27.881901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34062 22:30:27.882349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34064 22:30:27.919839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34065 22:30:27.920274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34067 22:30:27.959422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34068 22:30:27.959840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34070 22:30:28.000080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34071 22:30:28.000496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34073 22:30:28.060703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34074 22:30:28.061121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34076 22:30:28.104974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34077 22:30:28.105362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34079 22:30:28.147069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34080 22:30:28.147480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34082 22:30:28.184572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34083 22:30:28.184916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34085 22:30:28.223031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34086 22:30:28.223455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34088 22:30:28.270635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34090 22:30:28.271202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34091 22:30:28.324802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34092 22:30:28.325230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34094 22:30:28.365233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34095 22:30:28.365608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34097 22:30:28.409310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34098 22:30:28.409691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34100 22:30:28.454034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34102 22:30:28.454779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34103 22:30:28.497313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34105 22:30:28.498029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34106 22:30:28.539852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34107 22:30:28.540414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34109 22:30:28.584390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34111 22:30:28.584846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34112 22:30:28.625256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34114 22:30:28.625852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34115 22:30:28.681150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34116 22:30:28.681570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34118 22:30:28.726486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34120 22:30:28.726947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34121 22:30:28.780810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34123 22:30:28.781273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34124 22:30:28.833237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34125 22:30:28.833704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34127 22:30:28.881006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34129 22:30:28.881438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34130 22:30:28.930066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34132 22:30:28.930718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34133 22:30:28.984971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34135 22:30:28.985451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34136 22:30:29.038198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34137 22:30:29.038647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34139 22:30:29.080157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34140 22:30:29.080584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34142 22:30:29.119236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34143 22:30:29.119620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34145 22:30:29.157545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34146 22:30:29.158119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34148 22:30:29.202352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34150 22:30:29.202944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34151 22:30:29.245675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34152 22:30:29.246102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34154 22:30:29.283504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34155 22:30:29.283907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34157 22:30:29.333617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34158 22:30:29.334065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34160 22:30:29.373300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34161 22:30:29.373748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34163 22:30:29.414048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34165 22:30:29.414527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34166 22:30:29.452819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34168 22:30:29.453283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34169 22:30:29.492863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34170 22:30:29.493308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34172 22:30:29.534413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34174 22:30:29.534811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34175 22:30:29.590311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34177 22:30:29.590973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34178 22:30:29.636129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34180 22:30:29.636581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34181 22:30:29.675925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34182 22:30:29.676488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34184 22:30:29.711726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34185 22:30:29.712155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34187 22:30:29.755119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34188 22:30:29.755657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34190 22:30:29.796381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34191 22:30:29.796838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34193 22:30:29.835598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34194 22:30:29.836024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34196 22:30:29.876792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34197 22:30:29.877227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34199 22:30:29.920411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34200 22:30:29.920888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34202 22:30:29.958905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34204 22:30:29.959387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34205 22:30:30.000263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34207 22:30:30.000726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34208 22:30:30.051856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34209 22:30:30.052280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34211 22:30:30.095267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34213 22:30:30.095980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34214 22:30:30.144821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34215 22:30:30.145368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34217 22:30:30.189960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34219 22:30:30.190397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34220 22:30:30.234575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34222 22:30:30.235039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34223 22:30:30.273695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34225 22:30:30.274391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34226 22:30:30.313886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34227 22:30:30.314348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34229 22:30:30.355287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34230 22:30:30.355695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34232 22:30:30.393422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34234 22:30:30.393894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34235 22:30:30.433939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34237 22:30:30.434425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34238 22:30:30.478381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34240 22:30:30.478858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34241 22:30:30.528375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34243 22:30:30.528960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34244 22:30:30.575291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34246 22:30:30.575752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34247 22:30:30.611948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34248 22:30:30.612424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34250 22:30:30.650021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34251 22:30:30.650579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34253 22:30:30.685173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34254 22:30:30.685663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34256 22:30:30.729312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34257 22:30:30.729788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34259 22:30:30.764729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34260 22:30:30.765286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34262 22:30:30.807642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34263 22:30:30.808130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34265 22:30:30.843831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34266 22:30:30.844224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34268 22:30:30.878472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34270 22:30:30.878957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34271 22:30:30.914001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34273 22:30:30.914467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34274 22:30:30.949587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34275 22:30:30.950124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34277 22:30:30.988941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34279 22:30:30.989386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34280 22:30:31.032071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34282 22:30:31.032547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34283 22:30:31.073517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34284 22:30:31.073956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34286 22:30:31.115261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34288 22:30:31.115740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34289 22:30:31.154385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34291 22:30:31.154834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34292 22:30:31.195501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34294 22:30:31.195964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34295 22:30:31.235977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34297 22:30:31.236432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34298 22:30:31.275183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34299 22:30:31.275596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34301 22:30:31.311754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34302 22:30:31.312206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34304 22:30:31.349485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34305 22:30:31.349927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34307 22:30:31.387736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34308 22:30:31.388119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34310 22:30:31.423582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34311 22:30:31.424066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34313 22:30:31.460792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34314 22:30:31.461247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34316 22:30:31.504002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34317 22:30:31.504438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34319 22:30:31.539237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34320 22:30:31.539645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34322 22:30:31.574763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34324 22:30:31.575224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34325 22:30:31.608945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34327 22:30:31.609702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34328 22:30:31.643862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34329 22:30:31.644285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34331 22:30:31.680361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34332 22:30:31.680808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34334 22:30:31.719580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34336 22:30:31.720047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34337 22:30:31.754811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34338 22:30:31.755282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34340 22:30:31.790736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34341 22:30:31.791205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34343 22:30:31.824566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34344 22:30:31.825023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34346 22:30:31.859457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34347 22:30:31.859871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34349 22:30:31.891800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34350 22:30:31.892161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34352 22:30:31.924394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34353 22:30:31.924828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34355 22:30:31.956817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34356 22:30:31.957233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34358 22:30:32.007748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34359 22:30:32.008177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34361 22:30:32.041273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34363 22:30:32.041759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34364 22:30:32.080326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34366 22:30:32.080804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34367 22:30:32.121082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34368 22:30:32.121463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34370 22:30:32.155578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34371 22:30:32.155955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34373 22:30:32.188072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34374 22:30:32.188459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34376 22:30:32.221255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34377 22:30:32.221638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34379 22:30:32.253483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34381 22:30:32.253968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34382 22:30:32.285115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34383 22:30:32.285542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34385 22:30:32.316864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34386 22:30:32.317291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34388 22:30:32.347959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34389 22:30:32.348412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34391 22:30:32.379292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34392 22:30:32.379740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34394 22:30:32.412868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34395 22:30:32.413316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34397 22:30:32.444476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34398 22:30:32.444912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34400 22:30:32.476949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34401 22:30:32.477448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34403 22:30:32.508486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34404 22:30:32.508962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34406 22:30:32.540757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34407 22:30:32.541215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34409 22:30:32.575560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34410 22:30:32.576043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34412 22:30:32.607393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34413 22:30:32.607867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34415 22:30:32.639035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34416 22:30:32.639485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34418 22:30:32.670530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34419 22:30:32.671018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34421 22:30:32.702150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34423 22:30:32.702702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34424 22:30:32.733730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34425 22:30:32.734202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34427 22:30:32.765436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34428 22:30:32.765899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34430 22:30:32.797588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34431 22:30:32.798018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34433 22:30:32.829879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34434 22:30:32.830354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34436 22:30:32.875558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34437 22:30:32.876000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34439 22:30:32.911376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34441 22:30:32.911840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34442 22:30:32.947506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34443 22:30:32.947954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34445 22:30:32.999403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34446 22:30:32.999892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34448 22:30:33.039731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34450 22:30:33.040146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34451 22:30:33.071702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34452 22:30:33.072061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34454 22:30:33.103450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34455 22:30:33.103887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34457 22:30:33.134595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34458 22:30:33.134972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34460 22:30:33.165849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34462 22:30:33.166453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34463 22:30:33.196633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34465 22:30:33.197261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34466 22:30:33.227767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34467 22:30:33.228252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34469 22:30:33.259881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34470 22:30:33.260371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34472 22:30:33.262818 + set +x
34473 22:30:33.263026 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 566066_1.1.3.5>
34474 22:30:33.263392 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 566066_1.1.3.5
34475 22:30:33.263547 Ending use of test pattern.
34476 22:30:33.263690 Ending test lava.1_kselftest-arm64_qemu (566066_1.1.3.5), duration 400.25
34478 22:30:33.265690 <LAVA_TEST_RUNNER EXIT>
34479 22:30:33.266156 ok: lava_test_shell seems to have completed
34480 22:30:33.351547 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34481 22:30:33.354704 end: 3.1 lava-test-shell (duration 00:06:42) [common]
34482 22:30:33.354802 end: 3 lava-test-retry (duration 00:06:42) [common]
34483 22:30:33.354897 start: 4 finalize (timeout 00:02:12) [common]
34484 22:30:33.354993 start: 4.1 power-off (timeout 00:00:30) [common]
34485 22:30:33.355080 end: 4.1 power-off (duration 00:00:00) [common]
34486 22:30:33.355162 start: 4.2 read-feedback (timeout 00:02:12) [common]
34487 22:30:33.355342 Listened to connection for namespace 'common' for up to 1s
34488 22:30:33.355617 Listened to connection for namespace 'common' for up to 1s
34489 22:30:34.360376 Finalising connection for namespace 'common'
34491 22:30:34.461426 / # poweroff
34492 22:30:34.462003 Already disconnected
34493 22:30:34.462172 poweroff
34494 22:30:34.563052 end: 4.2 read-feedback (duration 00:00:01) [common]
34495 22:30:34.563338 Already disconnected
34496 22:30:34.563524 end: 4 finalize (duration 00:00:01) [common]
34497 22:30:34.563741 Cleaning after the job
34498 22:30:34.563933 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566066/deployimages-i6fbuh2_/kernel
34499 22:30:34.572143 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566066/deployimages-i6fbuh2_/ramdisk
34500 22:30:34.589918 Stopping the qemu container lava-docker-qemu-566066-2.1.1-0qo7n8jgwe
34501 22:30:35.501678 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/566066
34502 22:30:35.596020 Job finished correctly