Boot log: mt8192-asurada-spherion-r0
- Warnings: 1
- Kernel Warnings: 19
- Kernel Errors: 33
- Errors: 0
- Boot result: PASS
1 19:59:02.693832 lava-dispatcher, installed at version: 2023.08
2 19:59:02.694039 start: 0 validate
3 19:59:02.694169 Start time: 2023-10-28 19:59:02.694161+00:00 (UTC)
4 19:59:02.694289 Using caching service: 'http://localhost/cache/?uri=%s'
5 19:59:02.694429 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230623.0%2Farm64%2Frootfs.cpio.gz exists
6 19:59:02.962376 Using caching service: 'http://localhost/cache/?uri=%s'
7 19:59:02.962551 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.59-cip8-106-g65bd536c294e%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 19:59:03.230797 Using caching service: 'http://localhost/cache/?uri=%s'
9 19:59:03.230994 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.59-cip8-106-g65bd536c294e%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
10 19:59:03.496106 Using caching service: 'http://localhost/cache/?uri=%s'
11 19:59:03.496337 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.59-cip8-106-g65bd536c294e%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 19:59:03.762318 validate duration: 1.07
14 19:59:03.762610 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 19:59:03.762707 start: 1.1 download-retry (timeout 00:10:00) [common]
16 19:59:03.762797 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 19:59:03.762924 Not decompressing ramdisk as can be used compressed.
18 19:59:03.763013 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230623.0/arm64/rootfs.cpio.gz
19 19:59:03.763079 saving as /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/ramdisk/rootfs.cpio.gz
20 19:59:03.763143 total size: 43284872 (41 MB)
21 19:59:03.764208 progress 0 % (0 MB)
22 19:59:03.775752 progress 5 % (2 MB)
23 19:59:03.786943 progress 10 % (4 MB)
24 19:59:03.798203 progress 15 % (6 MB)
25 19:59:03.809676 progress 20 % (8 MB)
26 19:59:03.821103 progress 25 % (10 MB)
27 19:59:03.832357 progress 30 % (12 MB)
28 19:59:03.843633 progress 35 % (14 MB)
29 19:59:03.854926 progress 40 % (16 MB)
30 19:59:03.866233 progress 45 % (18 MB)
31 19:59:03.877478 progress 50 % (20 MB)
32 19:59:03.888776 progress 55 % (22 MB)
33 19:59:03.900113 progress 60 % (24 MB)
34 19:59:03.911400 progress 65 % (26 MB)
35 19:59:03.922826 progress 70 % (28 MB)
36 19:59:03.934075 progress 75 % (30 MB)
37 19:59:03.945334 progress 80 % (33 MB)
38 19:59:03.956622 progress 85 % (35 MB)
39 19:59:03.967820 progress 90 % (37 MB)
40 19:59:03.978957 progress 95 % (39 MB)
41 19:59:03.990078 progress 100 % (41 MB)
42 19:59:03.990332 41 MB downloaded in 0.23 s (181.70 MB/s)
43 19:59:03.990494 end: 1.1.1 http-download (duration 00:00:00) [common]
45 19:59:03.990737 end: 1.1 download-retry (duration 00:00:00) [common]
46 19:59:03.990824 start: 1.2 download-retry (timeout 00:10:00) [common]
47 19:59:03.990908 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 19:59:03.991048 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.59-cip8-106-g65bd536c294e/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 19:59:03.991117 saving as /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/kernel/Image
50 19:59:03.991178 total size: 49304064 (47 MB)
51 19:59:03.991243 No compression specified
52 19:59:03.992445 progress 0 % (0 MB)
53 19:59:04.005284 progress 5 % (2 MB)
54 19:59:04.018233 progress 10 % (4 MB)
55 19:59:04.031007 progress 15 % (7 MB)
56 19:59:04.043875 progress 20 % (9 MB)
57 19:59:04.056671 progress 25 % (11 MB)
58 19:59:04.069468 progress 30 % (14 MB)
59 19:59:04.082339 progress 35 % (16 MB)
60 19:59:04.095164 progress 40 % (18 MB)
61 19:59:04.108212 progress 45 % (21 MB)
62 19:59:04.121150 progress 50 % (23 MB)
63 19:59:04.133978 progress 55 % (25 MB)
64 19:59:04.146753 progress 60 % (28 MB)
65 19:59:04.159591 progress 65 % (30 MB)
66 19:59:04.172335 progress 70 % (32 MB)
67 19:59:04.185174 progress 75 % (35 MB)
68 19:59:04.198003 progress 80 % (37 MB)
69 19:59:04.210927 progress 85 % (39 MB)
70 19:59:04.224037 progress 90 % (42 MB)
71 19:59:04.236663 progress 95 % (44 MB)
72 19:59:04.249170 progress 100 % (47 MB)
73 19:59:04.249381 47 MB downloaded in 0.26 s (182.11 MB/s)
74 19:59:04.249534 end: 1.2.1 http-download (duration 00:00:00) [common]
76 19:59:04.249768 end: 1.2 download-retry (duration 00:00:00) [common]
77 19:59:04.249856 start: 1.3 download-retry (timeout 00:10:00) [common]
78 19:59:04.249946 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 19:59:04.250090 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.59-cip8-106-g65bd536c294e/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
80 19:59:04.250161 saving as /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/dtb/mt8192-asurada-spherion-r0.dtb
81 19:59:04.250226 total size: 47278 (0 MB)
82 19:59:04.250288 No compression specified
83 19:59:04.251431 progress 69 % (0 MB)
84 19:59:04.251722 progress 100 % (0 MB)
85 19:59:04.251882 0 MB downloaded in 0.00 s (27.26 MB/s)
86 19:59:04.252005 end: 1.3.1 http-download (duration 00:00:00) [common]
88 19:59:04.252227 end: 1.3 download-retry (duration 00:00:00) [common]
89 19:59:04.252312 start: 1.4 download-retry (timeout 00:10:00) [common]
90 19:59:04.252395 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 19:59:04.252509 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.59-cip8-106-g65bd536c294e/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 19:59:04.252576 saving as /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/modules/modules.tar
93 19:59:04.252636 total size: 8635496 (8 MB)
94 19:59:04.252698 Using unxz to decompress xz
95 19:59:04.256958 progress 0 % (0 MB)
96 19:59:04.278344 progress 5 % (0 MB)
97 19:59:04.300593 progress 10 % (0 MB)
98 19:59:04.326740 progress 15 % (1 MB)
99 19:59:04.352034 progress 20 % (1 MB)
100 19:59:04.377491 progress 25 % (2 MB)
101 19:59:04.405413 progress 30 % (2 MB)
102 19:59:04.431300 progress 35 % (2 MB)
103 19:59:04.455875 progress 40 % (3 MB)
104 19:59:04.479965 progress 45 % (3 MB)
105 19:59:04.506192 progress 50 % (4 MB)
106 19:59:04.532343 progress 55 % (4 MB)
107 19:59:04.559131 progress 60 % (4 MB)
108 19:59:04.582471 progress 65 % (5 MB)
109 19:59:04.607528 progress 70 % (5 MB)
110 19:59:04.631931 progress 75 % (6 MB)
111 19:59:04.658117 progress 80 % (6 MB)
112 19:59:04.690922 progress 85 % (7 MB)
113 19:59:04.717118 progress 90 % (7 MB)
114 19:59:04.741364 progress 95 % (7 MB)
115 19:59:04.764481 progress 100 % (8 MB)
116 19:59:04.770064 8 MB downloaded in 0.52 s (15.92 MB/s)
117 19:59:04.770307 end: 1.4.1 http-download (duration 00:00:01) [common]
119 19:59:04.770566 end: 1.4 download-retry (duration 00:00:01) [common]
120 19:59:04.770662 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 19:59:04.770759 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 19:59:04.770842 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 19:59:04.770928 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 19:59:04.771166 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro
125 19:59:04.771317 makedir: /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin
126 19:59:04.771423 makedir: /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/tests
127 19:59:04.771525 makedir: /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/results
128 19:59:04.771670 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-add-keys
129 19:59:04.771840 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-add-sources
130 19:59:04.771974 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-background-process-start
131 19:59:04.772109 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-background-process-stop
132 19:59:04.772239 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-common-functions
133 19:59:04.772367 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-echo-ipv4
134 19:59:04.772582 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-install-packages
135 19:59:04.772756 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-installed-packages
136 19:59:04.772890 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-os-build
137 19:59:04.773020 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-probe-channel
138 19:59:04.773149 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-probe-ip
139 19:59:04.773279 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-target-ip
140 19:59:04.773407 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-target-mac
141 19:59:04.773534 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-target-storage
142 19:59:04.773665 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-case
143 19:59:04.773793 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-event
144 19:59:04.773919 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-feedback
145 19:59:04.774046 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-raise
146 19:59:04.774174 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-reference
147 19:59:04.774302 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-runner
148 19:59:04.774429 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-set
149 19:59:04.774558 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-test-shell
150 19:59:04.774689 Updating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-install-packages (oe)
151 19:59:04.774869 Updating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/bin/lava-installed-packages (oe)
152 19:59:04.774998 Creating /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/environment
153 19:59:04.775101 LAVA metadata
154 19:59:04.775175 - LAVA_JOB_ID=11899592
155 19:59:04.775240 - LAVA_DISPATCHER_IP=192.168.201.1
156 19:59:04.775341 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 19:59:04.775409 skipped lava-vland-overlay
158 19:59:04.775484 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 19:59:04.775568 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 19:59:04.775630 skipped lava-multinode-overlay
161 19:59:04.775753 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 19:59:04.775840 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 19:59:04.775915 Loading test definitions
164 19:59:04.776006 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 19:59:04.776080 Using /lava-11899592 at stage 0
166 19:59:04.776402 uuid=11899592_1.5.2.3.1 testdef=None
167 19:59:04.776491 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 19:59:04.776579 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 19:59:04.777110 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 19:59:04.777328 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 19:59:04.777955 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 19:59:04.778191 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 19:59:04.778820 runner path: /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/0/tests/0_igt-kms-mediatek test_uuid 11899592_1.5.2.3.1
176 19:59:04.778986 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 19:59:04.779194 Creating lava-test-runner.conf files
179 19:59:04.779257 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11899592/lava-overlay-9m9aguro/lava-11899592/0 for stage 0
180 19:59:04.779346 - 0_igt-kms-mediatek
181 19:59:04.779444 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 19:59:04.779535 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 19:59:04.786493 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 19:59:04.786603 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 19:59:04.786691 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 19:59:04.786776 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 19:59:04.786864 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 19:59:06.184615 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 19:59:06.185009 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 19:59:06.185149 extracting modules file /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11899592/extract-overlay-ramdisk-pwburpi3/ramdisk
191 19:59:06.414199 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 19:59:06.414373 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 19:59:06.414486 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11899592/compress-overlay-qm57x6ez/overlay-1.5.2.4.tar.gz to ramdisk
194 19:59:06.414571 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11899592/compress-overlay-qm57x6ez/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11899592/extract-overlay-ramdisk-pwburpi3/ramdisk
195 19:59:06.421431 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 19:59:06.421554 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 19:59:06.421658 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 19:59:06.421765 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 19:59:06.421857 Building ramdisk /var/lib/lava/dispatcher/tmp/11899592/extract-overlay-ramdisk-pwburpi3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11899592/extract-overlay-ramdisk-pwburpi3/ramdisk
200 19:59:07.416853 >> 369954 blocks
201 19:59:13.202789 rename /var/lib/lava/dispatcher/tmp/11899592/extract-overlay-ramdisk-pwburpi3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/ramdisk/ramdisk.cpio.gz
202 19:59:13.203243 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 19:59:13.203380 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 19:59:13.203526 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 19:59:13.203689 Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/kernel/Image'
206 19:59:25.497045 Returned 0 in 12 seconds
207 19:59:25.598048 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/kernel/image.itb
208 19:59:26.433127 output: FIT description: Kernel Image image with one or more FDT blobs
209 19:59:26.433494 output: Created: Sat Oct 28 20:59:26 2023
210 19:59:26.433570 output: Image 0 (kernel-1)
211 19:59:26.433637 output: Description:
212 19:59:26.433697 output: Created: Sat Oct 28 20:59:26 2023
213 19:59:26.433758 output: Type: Kernel Image
214 19:59:26.433819 output: Compression: lzma compressed
215 19:59:26.433876 output: Data Size: 11047522 Bytes = 10788.60 KiB = 10.54 MiB
216 19:59:26.433935 output: Architecture: AArch64
217 19:59:26.433994 output: OS: Linux
218 19:59:26.434050 output: Load Address: 0x00000000
219 19:59:26.434109 output: Entry Point: 0x00000000
220 19:59:26.434166 output: Hash algo: crc32
221 19:59:26.434220 output: Hash value: da40eda2
222 19:59:26.434275 output: Image 1 (fdt-1)
223 19:59:26.434329 output: Description: mt8192-asurada-spherion-r0
224 19:59:26.434381 output: Created: Sat Oct 28 20:59:26 2023
225 19:59:26.434433 output: Type: Flat Device Tree
226 19:59:26.434484 output: Compression: uncompressed
227 19:59:26.434535 output: Data Size: 47278 Bytes = 46.17 KiB = 0.05 MiB
228 19:59:26.434586 output: Architecture: AArch64
229 19:59:26.434637 output: Hash algo: crc32
230 19:59:26.434688 output: Hash value: cc4352de
231 19:59:26.434739 output: Image 2 (ramdisk-1)
232 19:59:26.434790 output: Description: unavailable
233 19:59:26.434841 output: Created: Sat Oct 28 20:59:26 2023
234 19:59:26.434892 output: Type: RAMDisk Image
235 19:59:26.434943 output: Compression: Unknown Compression
236 19:59:26.434994 output: Data Size: 56423353 Bytes = 55100.93 KiB = 53.81 MiB
237 19:59:26.435045 output: Architecture: AArch64
238 19:59:26.435095 output: OS: Linux
239 19:59:26.435146 output: Load Address: unavailable
240 19:59:26.435197 output: Entry Point: unavailable
241 19:59:26.435247 output: Hash algo: crc32
242 19:59:26.435297 output: Hash value: c919d97b
243 19:59:26.435348 output: Default Configuration: 'conf-1'
244 19:59:26.435398 output: Configuration 0 (conf-1)
245 19:59:26.435449 output: Description: mt8192-asurada-spherion-r0
246 19:59:26.435500 output: Kernel: kernel-1
247 19:59:26.435551 output: Init Ramdisk: ramdisk-1
248 19:59:26.435602 output: FDT: fdt-1
249 19:59:26.435683 output: Loadables: kernel-1
250 19:59:26.435749 output:
251 19:59:26.435944 end: 1.5.8.1 prepare-fit (duration 00:00:13) [common]
252 19:59:26.436040 end: 1.5.8 prepare-kernel (duration 00:00:13) [common]
253 19:59:26.436146 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 19:59:26.436244 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
255 19:59:26.436320 No LXC device requested
256 19:59:26.436399 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 19:59:26.436481 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
258 19:59:26.436557 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 19:59:26.436626 Checking files for TFTP limit of 4294967296 bytes.
260 19:59:26.437109 end: 1 tftp-deploy (duration 00:00:23) [common]
261 19:59:26.437210 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 19:59:26.437298 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 19:59:26.437415 substitutions:
264 19:59:26.437480 - {DTB}: 11899592/tftp-deploy-pu673ckw/dtb/mt8192-asurada-spherion-r0.dtb
265 19:59:26.437547 - {INITRD}: 11899592/tftp-deploy-pu673ckw/ramdisk/ramdisk.cpio.gz
266 19:59:26.437604 - {KERNEL}: 11899592/tftp-deploy-pu673ckw/kernel/Image
267 19:59:26.437659 - {LAVA_MAC}: None
268 19:59:26.437714 - {PRESEED_CONFIG}: None
269 19:59:26.437766 - {PRESEED_LOCAL}: None
270 19:59:26.437819 - {RAMDISK}: 11899592/tftp-deploy-pu673ckw/ramdisk/ramdisk.cpio.gz
271 19:59:26.437873 - {ROOT_PART}: None
272 19:59:26.437926 - {ROOT}: None
273 19:59:26.437979 - {SERVER_IP}: 192.168.201.1
274 19:59:26.438032 - {TEE}: None
275 19:59:26.438085 Parsed boot commands:
276 19:59:26.438138 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 19:59:26.438316 Parsed boot commands: tftpboot 192.168.201.1 11899592/tftp-deploy-pu673ckw/kernel/image.itb 11899592/tftp-deploy-pu673ckw/kernel/cmdline
278 19:59:26.438402 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 19:59:26.438487 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 19:59:26.438578 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 19:59:26.438662 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 19:59:26.438729 Not connected, no need to disconnect.
283 19:59:26.438801 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 19:59:26.438879 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 19:59:26.438942 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8192-asurada-spherion-r0-cbg-0'
286 19:59:26.443023 Setting prompt string to ['lava-test: # ']
287 19:59:26.443407 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 19:59:26.443566 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 19:59:26.443702 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 19:59:26.443820 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 19:59:26.444018 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-0' '--port=1' '--command=reboot'
292 19:59:31.591218 >> Command sent successfully.
293 19:59:31.601524 Returned 0 in 5 seconds
294 19:59:31.702670 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
296 19:59:31.704147 end: 2.2.2 reset-device (duration 00:00:05) [common]
297 19:59:31.704645 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
298 19:59:31.705080 Setting prompt string to 'Starting depthcharge on Spherion...'
299 19:59:31.705426 Changing prompt to 'Starting depthcharge on Spherion...'
300 19:59:31.705765 depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
301 19:59:31.707038 [Enter `^Ec?' for help]
302 19:59:31.867579
303 19:59:31.868182
304 19:59:31.868637 F0: 102B 0000
305 19:59:31.869126
306 19:59:31.869554 F3: 1001 0000 [0200]
307 19:59:31.869959
308 19:59:31.871218 F3: 1001 0000
309 19:59:31.871684
310 19:59:31.872194 F7: 102D 0000
311 19:59:31.872537
312 19:59:31.872842 F1: 0000 0000
313 19:59:31.873208
314 19:59:31.874702 V0: 0000 0000 [0001]
315 19:59:31.875325
316 19:59:31.875818 00: 0007 8000
317 19:59:31.876193
318 19:59:31.879105 01: 0000 0000
319 19:59:31.879614
320 19:59:31.880009 BP: 0C00 0209 [0000]
321 19:59:31.880444
322 19:59:31.880759 G0: 1182 0000
323 19:59:31.881057
324 19:59:31.882680 EC: 0000 0021 [4000]
325 19:59:31.883157
326 19:59:31.883495 S7: 0000 0000 [0000]
327 19:59:31.883894
328 19:59:31.886133 CC: 0000 0000 [0001]
329 19:59:31.886556
330 19:59:31.886892 T0: 0000 0040 [010F]
331 19:59:31.889522
332 19:59:31.889995 Jump to BL
333 19:59:31.890331
334 19:59:31.913856
335 19:59:31.914540
336 19:59:31.915004
337 19:59:31.921576 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...
338 19:59:31.925126 ARM64: Exception handlers installed.
339 19:59:31.929158 ARM64: Testing exception
340 19:59:31.932569 ARM64: Done test exception
341 19:59:31.940323 Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000
342 19:59:31.947278 Mapping address range [0x00000000:0x200000000) as cacheable | read-write | secure | device
343 19:59:31.953922 Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000
344 19:59:31.965213 Mapping address range [0x00100000:0x00120000) as cacheable | read-write | secure | normal
345 19:59:31.971226 Backing address range [0x00000000:0x40000000) with new page table @0x0010f000
346 19:59:31.981884 Backing address range [0x00000000:0x00200000) with new page table @0x00110000
347 19:59:31.991988 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | normal
348 19:59:31.998884 Backing address range [0x00200000:0x00400000) with new page table @0x00111000
349 19:59:32.016929 Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write | secure | normal
350 19:59:32.020434 WDT: Last reset was cold boot
351 19:59:32.023827 SPI1(PAD0) initialized at 2873684 Hz
352 19:59:32.026912 SPI5(PAD0) initialized at 992727 Hz
353 19:59:32.030107 VBOOT: Loading verstage.
354 19:59:32.037006 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
355 19:59:32.041817 FMAP: Found "FLASH" version 1.1 at 0x20000.
356 19:59:32.044636 FMAP: base = 0x0 size = 0x800000 #areas = 25
357 19:59:32.048487 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
358 19:59:32.054785 CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes
359 19:59:32.061737 CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150
360 19:59:32.072065 read SPI 0x96554 0xa1eb: 4591 us, 9028 KB/s, 72.224 Mbps
361 19:59:32.072600
362 19:59:32.073047
363 19:59:32.082488 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...
364 19:59:32.086457 ARM64: Exception handlers installed.
365 19:59:32.086979 ARM64: Testing exception
366 19:59:32.089111 ARM64: Done test exception
367 19:59:32.092797 FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)
368 19:59:32.099545 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
369 19:59:32.112999 Probing TPM: . done!
370 19:59:32.113522 TPM ready after 0 ms
371 19:59:32.120258 Connected to device vid:did:rid of 1ae0:0028:00
372 19:59:32.126254 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
373 19:59:32.187035 Initialized TPM device CR50 revision 0
374 19:59:32.199354 tlcl_send_startup: Startup return code is 0
375 19:59:32.199936 TPM: setup succeeded
376 19:59:32.211094 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 19:59:32.219784 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 19:59:32.232014 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
379 19:59:32.241203 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
380 19:59:32.245790 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
381 19:59:32.249198 in-header: 03 07 00 00 08 00 00 00
382 19:59:32.252426 in-data: aa e4 47 04 13 02 00 00
383 19:59:32.255719 Chrome EC: UHEPI supported
384 19:59:32.259474 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
385 19:59:32.264913 in-header: 03 95 00 00 08 00 00 00
386 19:59:32.268754 in-data: 18 20 20 08 00 00 00 00
387 19:59:32.269267 Phase 1
388 19:59:32.272425 FMAP: area GBB found @ 3f5000 (12032 bytes)
389 19:59:32.279453 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
390 19:59:32.286989 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
391 19:59:32.287512 Recovery requested (1009000e)
392 19:59:32.300110 TPM: Extending digest for VBOOT: boot mode into PCR 0
393 19:59:32.303265 tlcl_extend: response is 0
394 19:59:32.312943 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
395 19:59:32.318098 tlcl_extend: response is 0
396 19:59:32.325144 CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c
397 19:59:32.345082 read SPI 0x210d4 0x2173b: 15137 us, 9051 KB/s, 72.408 Mbps
398 19:59:32.351931 BS: bootblock times (exec / console): total (unknown) / 148 ms
399 19:59:32.352490
400 19:59:32.352936
401 19:59:32.361547 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...
402 19:59:32.365368 ARM64: Exception handlers installed.
403 19:59:32.368435 ARM64: Testing exception
404 19:59:32.368988 ARM64: Done test exception
405 19:59:32.391129 pmic_efuse_setting: Set efuses in 11 msecs
406 19:59:32.394179 pmwrap_interface_init: Select PMIF_VLD_RDY
407 19:59:32.400566 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a
408 19:59:32.404085 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a
409 19:59:32.408001 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a
410 19:59:32.415416 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a
411 19:59:32.418821 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a
412 19:59:32.422212 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a
413 19:59:32.430327 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a
414 19:59:32.433496 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a
415 19:59:32.437392 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c
416 19:59:32.441066 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a
417 19:59:32.448994 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a
418 19:59:32.452659 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c
419 19:59:32.456595 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c
420 19:59:32.464215 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a
421 19:59:32.468287 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a
422 19:59:32.475339 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a
423 19:59:32.478480 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a
424 19:59:32.485934 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a
425 19:59:32.489940 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a
426 19:59:32.496957 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a
427 19:59:32.500605 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c
428 19:59:32.508490 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a
429 19:59:32.512059 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a
430 19:59:32.518973 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c
431 19:59:32.522957 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c
432 19:59:32.530748 [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa
433 19:59:32.534084 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92
434 19:59:32.541274 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2
435 19:59:32.544870 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82
436 19:59:32.548525 [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10
437 19:59:32.556083 [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425
438 19:59:32.559952 [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010
439 19:59:32.563586 [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f
440 19:59:32.570496 [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000
441 19:59:32.575058 [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8
442 19:59:32.577985 [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb
443 19:59:32.585736 [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698
444 19:59:32.589179 [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3
445 19:59:32.593153 [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92
446 19:59:32.596964 [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a
447 19:59:32.603898 [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2
448 19:59:32.607624 [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a
449 19:59:32.611444 [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a
450 19:59:32.615393 [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a
451 19:59:32.619422 [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a
452 19:59:32.626066 [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82
453 19:59:32.630064 [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c
454 19:59:32.633414 [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a
455 19:59:32.637541 [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a
456 19:59:32.641373 [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c
457 19:59:32.644774 [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c
458 19:59:32.652505 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248
459 19:59:32.663443 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1
460 19:59:32.667481 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
461 19:59:32.674624 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248
462 19:59:32.682150 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0
463 19:59:32.689733 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
464 19:59:32.692936 [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
465 19:59:32.696451 [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
466 19:59:32.704447 [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde70, sec=0x0
467 19:59:32.708087 [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2
468 19:59:32.715849 [RTC]rtc_osc_init,62: osc32con val = 0xde70
469 19:59:32.719041 [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a
470 19:59:32.728316 [RTC]rtc_get_frequency_meter,154: input=15, output=759
471 19:59:32.738548 [RTC]rtc_get_frequency_meter,154: input=23, output=943
472 19:59:32.747158 [RTC]rtc_get_frequency_meter,154: input=19, output=850
473 19:59:32.756021 [RTC]rtc_get_frequency_meter,154: input=17, output=804
474 19:59:32.767035 [RTC]rtc_get_frequency_meter,154: input=16, output=782
475 19:59:32.775296 [RTC]rtc_get_frequency_meter,154: input=16, output=780
476 19:59:32.785761 [RTC]rtc_get_frequency_meter,154: input=17, output=803
477 19:59:32.789325 [RTC]rtc_eosc_cali,47: left: 16, middle: 16, right: 17
478 19:59:32.793280 [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde71
479 19:59:32.797284 [RTC]rtc_boot_common,202: RTC_STATE_REBOOT
480 19:59:32.804347 [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486
481 19:59:32.807839 [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1
482 19:59:32.811757 [RTC]rtc_bbpu_power_on,300: done BBPU=0x81
483 19:59:32.815517 ADC[4]: Raw value=905465 ID=7
484 19:59:32.816062 ADC[3]: Raw value=213441 ID=1
485 19:59:32.818797 RAM Code: 0x71
486 19:59:32.822638 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
487 19:59:32.826454 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
488 19:59:32.837900 CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE' @0x75280 size 0x8 in mcache @0x00108014
489 19:59:32.841484 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
490 19:59:32.845179 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
491 19:59:32.848928 in-header: 03 07 00 00 08 00 00 00
492 19:59:32.852601 in-data: aa e4 47 04 13 02 00 00
493 19:59:32.856820 Chrome EC: UHEPI supported
494 19:59:32.860575 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
495 19:59:32.864382 in-header: 03 95 00 00 08 00 00 00
496 19:59:32.868055 in-data: 18 20 20 08 00 00 00 00
497 19:59:32.871857 MRC: failed to locate region type 0.
498 19:59:32.879199 DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)
499 19:59:32.882555 DRAM-K: Running full calibration
500 19:59:32.886688 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
501 19:59:32.890389 header.status = 0x0
502 19:59:32.894196 header.version = 0x6 (expected: 0x6)
503 19:59:32.897707 header.size = 0xd00 (expected: 0xd00)
504 19:59:32.898123 header.flags = 0x0
505 19:59:32.904624 CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40
506 19:59:32.922740 read SPI 0x72590 0x1c583: 12499 us, 9288 KB/s, 74.304 Mbps
507 19:59:32.930011 dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6
508 19:59:32.934020 dram_init: ddr_geometry: 2
509 19:59:32.934439 [EMI] MDL number = 2
510 19:59:32.937226 [EMI] Get MDL freq = 0
511 19:59:32.937643 dram_init: ddr_type: 0
512 19:59:32.941119 is_discrete_lpddr4: 1
513 19:59:32.944863 [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0
514 19:59:32.945281
515 19:59:32.945612
516 19:59:32.945922 [Bian_co] ETT version 0.0.0.1
517 19:59:32.952633 dram_type 6, R0 cbt_mode 1, R1 cbt_mode 1 VENDOR=6
518 19:59:32.953142
519 19:59:32.955803 dramc_set_vcore_voltage set vcore to 650000
520 19:59:32.956320 Read voltage for 800, 4
521 19:59:32.959407 Vio18 = 0
522 19:59:32.960082 Vcore = 650000
523 19:59:32.960491 Vdram = 0
524 19:59:32.960827 Vddq = 0
525 19:59:32.963809 Vmddr = 0
526 19:59:32.964332 dram_init: config_dvfs: 1
527 19:59:32.970776 [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0
528 19:59:32.974631 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
529 19:59:32.978076 [SwImpedanceCal] DRVP=10, DRVN=16, ODTN=9
530 19:59:32.982191 freq_region=0, Reg: DRVP=10, DRVN=16, ODTN=9
531 19:59:32.985626 [SwImpedanceCal] DRVP=16, DRVN=24, ODTN=9
532 19:59:32.988761 freq_region=1, Reg: DRVP=16, DRVN=24, ODTN=9
533 19:59:32.992213 MEM_TYPE=3, freq_sel=18
534 19:59:32.995727 sv_algorithm_assistance_LP4_1600
535 19:59:32.999210 ============ PULL DRAM RESETB DOWN ============
536 19:59:33.002706 ========== PULL DRAM RESETB DOWN end =========
537 19:59:33.009522 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
538 19:59:33.013607 ===================================
539 19:59:33.014141 LPDDR4 DRAM CONFIGURATION
540 19:59:33.017322 ===================================
541 19:59:33.021180 EX_ROW_EN[0] = 0x0
542 19:59:33.021709 EX_ROW_EN[1] = 0x0
543 19:59:33.024085 LP4Y_EN = 0x0
544 19:59:33.024506 WORK_FSP = 0x0
545 19:59:33.027850 WL = 0x2
546 19:59:33.028269 RL = 0x2
547 19:59:33.030924 BL = 0x2
548 19:59:33.031343 RPST = 0x0
549 19:59:33.034065 RD_PRE = 0x0
550 19:59:33.034489 WR_PRE = 0x1
551 19:59:33.037554 WR_PST = 0x0
552 19:59:33.037977 DBI_WR = 0x0
553 19:59:33.040914 DBI_RD = 0x0
554 19:59:33.041335 OTF = 0x1
555 19:59:33.044876 ===================================
556 19:59:33.048684 ===================================
557 19:59:33.049376 ANA top config
558 19:59:33.052082 ===================================
559 19:59:33.055698 DLL_ASYNC_EN = 0
560 19:59:33.058816 ALL_SLAVE_EN = 1
561 19:59:33.061678 NEW_RANK_MODE = 1
562 19:59:33.062101 DLL_IDLE_MODE = 1
563 19:59:33.066193 LP45_APHY_COMB_EN = 1
564 19:59:33.069213 TX_ODT_DIS = 1
565 19:59:33.073075 NEW_8X_MODE = 1
566 19:59:33.073611 ===================================
567 19:59:33.076748 ===================================
568 19:59:33.080032 data_rate = 1600
569 19:59:33.083155 CKR = 1
570 19:59:33.086252 DQ_P2S_RATIO = 8
571 19:59:33.089974 ===================================
572 19:59:33.093076 CA_P2S_RATIO = 8
573 19:59:33.096649 DQ_CA_OPEN = 0
574 19:59:33.097068 DQ_SEMI_OPEN = 0
575 19:59:33.099983 CA_SEMI_OPEN = 0
576 19:59:33.103206 CA_FULL_RATE = 0
577 19:59:33.106895 DQ_CKDIV4_EN = 1
578 19:59:33.109501 CA_CKDIV4_EN = 1
579 19:59:33.113111 CA_PREDIV_EN = 0
580 19:59:33.113632 PH8_DLY = 0
581 19:59:33.116268 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
582 19:59:33.120183 DQ_AAMCK_DIV = 4
583 19:59:33.122996 CA_AAMCK_DIV = 4
584 19:59:33.126142 CA_ADMCK_DIV = 4
585 19:59:33.129913 DQ_TRACK_CA_EN = 0
586 19:59:33.130336 CA_PICK = 800
587 19:59:33.133307 CA_MCKIO = 800
588 19:59:33.137061 MCKIO_SEMI = 0
589 19:59:33.140676 PLL_FREQ = 3068
590 19:59:33.144471 DQ_UI_PI_RATIO = 32
591 19:59:33.144891 CA_UI_PI_RATIO = 0
592 19:59:33.148185 ===================================
593 19:59:33.151767 ===================================
594 19:59:33.155407 memory_type:LPDDR4
595 19:59:33.155928 GP_NUM : 10
596 19:59:33.159598 SRAM_EN : 1
597 19:59:33.160194 MD32_EN : 0
598 19:59:33.163183 ===================================
599 19:59:33.166708 [ANA_INIT] >>>>>>>>>>>>>>
600 19:59:33.170358 <<<<<< [CONFIGURE PHASE]: ANA_TX
601 19:59:33.173816 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
602 19:59:33.177617 ===================================
603 19:59:33.178137 data_rate = 1600,PCW = 0X7600
604 19:59:33.180641 ===================================
605 19:59:33.183695 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
606 19:59:33.190923 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
607 19:59:33.197379 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
608 19:59:33.200471 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
609 19:59:33.204348 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
610 19:59:33.207530 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
611 19:59:33.210905 [ANA_INIT] flow start
612 19:59:33.211442 [ANA_INIT] PLL >>>>>>>>
613 19:59:33.213981 [ANA_INIT] PLL <<<<<<<<
614 19:59:33.217107 [ANA_INIT] MIDPI >>>>>>>>
615 19:59:33.220903 [ANA_INIT] MIDPI <<<<<<<<
616 19:59:33.221495 [ANA_INIT] DLL >>>>>>>>
617 19:59:33.224345 [ANA_INIT] flow end
618 19:59:33.227528 ============ LP4 DIFF to SE enter ============
619 19:59:33.230705 ============ LP4 DIFF to SE exit ============
620 19:59:33.234128 [ANA_INIT] <<<<<<<<<<<<<
621 19:59:33.237408 [Flow] Enable top DCM control >>>>>
622 19:59:33.241137 [Flow] Enable top DCM control <<<<<
623 19:59:33.244630 Enable DLL master slave shuffle
624 19:59:33.248017 ==============================================================
625 19:59:33.251076 Gating Mode config
626 19:59:33.257961 ==============================================================
627 19:59:33.258482 Config description:
628 19:59:33.268002 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
629 19:59:33.274573 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
630 19:59:33.277694 SELPH_MODE 0: By rank 1: By Phase
631 19:59:33.284326 ==============================================================
632 19:59:33.287546 GAT_TRACK_EN = 1
633 19:59:33.291444 RX_GATING_MODE = 2
634 19:59:33.294987 RX_GATING_TRACK_MODE = 2
635 19:59:33.297880 SELPH_MODE = 1
636 19:59:33.300950 PICG_EARLY_EN = 1
637 19:59:33.304755 VALID_LAT_VALUE = 1
638 19:59:33.308407 ==============================================================
639 19:59:33.311188 Enter into Gating configuration >>>>
640 19:59:33.314492 Exit from Gating configuration <<<<
641 19:59:33.318331 Enter into DVFS_PRE_config >>>>>
642 19:59:33.327932 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
643 19:59:33.331041 Exit from DVFS_PRE_config <<<<<
644 19:59:33.334678 Enter into PICG configuration >>>>
645 19:59:33.337569 Exit from PICG configuration <<<<
646 19:59:33.340986 [RX_INPUT] configuration >>>>>
647 19:59:33.344468 [RX_INPUT] configuration <<<<<
648 19:59:33.347696 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
649 19:59:33.354436 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
650 19:59:33.361119 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
651 19:59:33.368265 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
652 19:59:33.374630 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
653 19:59:33.378322 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
654 19:59:33.384641 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
655 19:59:33.388558 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
656 19:59:33.391571 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
657 19:59:33.395038 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
658 19:59:33.398214 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
659 19:59:33.404855 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
660 19:59:33.407910 ===================================
661 19:59:33.411225 LPDDR4 DRAM CONFIGURATION
662 19:59:33.415135 ===================================
663 19:59:33.415720 EX_ROW_EN[0] = 0x0
664 19:59:33.418362 EX_ROW_EN[1] = 0x0
665 19:59:33.418887 LP4Y_EN = 0x0
666 19:59:33.421527 WORK_FSP = 0x0
667 19:59:33.422047 WL = 0x2
668 19:59:33.424833 RL = 0x2
669 19:59:33.425251 BL = 0x2
670 19:59:33.427735 RPST = 0x0
671 19:59:33.428258 RD_PRE = 0x0
672 19:59:33.431672 WR_PRE = 0x1
673 19:59:33.432202 WR_PST = 0x0
674 19:59:33.434785 DBI_WR = 0x0
675 19:59:33.435204 DBI_RD = 0x0
676 19:59:33.437905 OTF = 0x1
677 19:59:33.441525 ===================================
678 19:59:33.444916 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
679 19:59:33.447965 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
680 19:59:33.455110 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
681 19:59:33.458228 ===================================
682 19:59:33.458744 LPDDR4 DRAM CONFIGURATION
683 19:59:33.461435 ===================================
684 19:59:33.464983 EX_ROW_EN[0] = 0x10
685 19:59:33.468615 EX_ROW_EN[1] = 0x0
686 19:59:33.469131 LP4Y_EN = 0x0
687 19:59:33.471806 WORK_FSP = 0x0
688 19:59:33.472219 WL = 0x2
689 19:59:33.475328 RL = 0x2
690 19:59:33.475970 BL = 0x2
691 19:59:33.478441 RPST = 0x0
692 19:59:33.478960 RD_PRE = 0x0
693 19:59:33.482326 WR_PRE = 0x1
694 19:59:33.482845 WR_PST = 0x0
695 19:59:33.485539 DBI_WR = 0x0
696 19:59:33.486061 DBI_RD = 0x0
697 19:59:33.488428 OTF = 0x1
698 19:59:33.491682 ===================================
699 19:59:33.498548 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
700 19:59:33.501848 nWR fixed to 40
701 19:59:33.502380 [ModeRegInit_LP4] CH0 RK0
702 19:59:33.505106 [ModeRegInit_LP4] CH0 RK1
703 19:59:33.508123 [ModeRegInit_LP4] CH1 RK0
704 19:59:33.508542 [ModeRegInit_LP4] CH1 RK1
705 19:59:33.511627 match AC timing 13
706 19:59:33.515107 dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 1
707 19:59:33.518736 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
708 19:59:33.524903 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
709 19:59:33.528096 [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17
710 19:59:33.535206 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
711 19:59:33.535758 [EMI DOE] emi_dcm 0
712 19:59:33.538566 [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600
713 19:59:33.541637 ==
714 19:59:33.542064 Dram Type= 6, Freq= 0, CH_0, rank 0
715 19:59:33.548984 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
716 19:59:33.549655 ==
717 19:59:33.552177 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
718 19:59:33.558191 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
719 19:59:33.568275 [CA 0] Center 36 (6~67) winsize 62
720 19:59:33.571505 [CA 1] Center 36 (6~67) winsize 62
721 19:59:33.575472 [CA 2] Center 34 (4~65) winsize 62
722 19:59:33.578644 [CA 3] Center 34 (4~64) winsize 61
723 19:59:33.581616 [CA 4] Center 33 (3~64) winsize 62
724 19:59:33.584748 [CA 5] Center 32 (2~62) winsize 61
725 19:59:33.585299
726 19:59:33.588486 [CmdBusTrainingLP45] Vref(ca) range 1: 34
727 19:59:33.588915
728 19:59:33.591626 [CATrainingPosCal] consider 1 rank data
729 19:59:33.595147 u2DelayCellTimex100 = 270/100 ps
730 19:59:33.598108 CA0 delay=36 (6~67),Diff = 4 PI (28 cell)
731 19:59:33.601694 CA1 delay=36 (6~67),Diff = 4 PI (28 cell)
732 19:59:33.604927 CA2 delay=34 (4~65),Diff = 2 PI (14 cell)
733 19:59:33.611517 CA3 delay=34 (4~64),Diff = 2 PI (14 cell)
734 19:59:33.614784 CA4 delay=33 (3~64),Diff = 1 PI (7 cell)
735 19:59:33.618520 CA5 delay=32 (2~62),Diff = 0 PI (0 cell)
736 19:59:33.618948
737 19:59:33.621669 CA PerBit enable=1, Macro0, CA PI delay=32
738 19:59:33.622098
739 19:59:33.625286 [CBTSetCACLKResult] CA Dly = 32
740 19:59:33.625710 CS Dly: 5 (0~36)
741 19:59:33.626048 ==
742 19:59:33.628224 Dram Type= 6, Freq= 0, CH_0, rank 1
743 19:59:33.635159 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
744 19:59:33.635936 ==
745 19:59:33.638283 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
746 19:59:33.645052 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
747 19:59:33.654498 [CA 0] Center 36 (6~67) winsize 62
748 19:59:33.658026 [CA 1] Center 36 (6~67) winsize 62
749 19:59:33.661297 [CA 2] Center 34 (3~65) winsize 63
750 19:59:33.664472 [CA 3] Center 33 (3~64) winsize 62
751 19:59:33.667559 [CA 4] Center 33 (3~63) winsize 61
752 19:59:33.670691 [CA 5] Center 33 (3~63) winsize 61
753 19:59:33.671117
754 19:59:33.674713 [CmdBusTrainingLP45] Vref(ca) range 1: 32
755 19:59:33.675247
756 19:59:33.677886 [CATrainingPosCal] consider 2 rank data
757 19:59:33.681078 u2DelayCellTimex100 = 270/100 ps
758 19:59:33.684317 CA0 delay=36 (6~67),Diff = 4 PI (28 cell)
759 19:59:33.687674 CA1 delay=36 (6~67),Diff = 4 PI (28 cell)
760 19:59:33.694492 CA2 delay=34 (4~65),Diff = 2 PI (14 cell)
761 19:59:33.698034 CA3 delay=34 (4~64),Diff = 2 PI (14 cell)
762 19:59:33.701383 CA4 delay=33 (3~63),Diff = 1 PI (7 cell)
763 19:59:33.704646 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
764 19:59:33.705161
765 19:59:33.708324 CA PerBit enable=1, Macro0, CA PI delay=32
766 19:59:33.708878
767 19:59:33.711510 [CBTSetCACLKResult] CA Dly = 32
768 19:59:33.712096 CS Dly: 5 (0~36)
769 19:59:33.712438
770 19:59:33.715003 ----->DramcWriteLeveling(PI) begin...
771 19:59:33.715559 ==
772 19:59:33.718933 Dram Type= 6, Freq= 0, CH_0, rank 0
773 19:59:33.722699 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
774 19:59:33.725625 ==
775 19:59:33.726064 Write leveling (Byte 0): 32 => 32
776 19:59:33.730034 Write leveling (Byte 1): 30 => 30
777 19:59:33.733569 DramcWriteLeveling(PI) end<-----
778 19:59:33.733984
779 19:59:33.734315 ==
780 19:59:33.736784 Dram Type= 6, Freq= 0, CH_0, rank 0
781 19:59:33.740014 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
782 19:59:33.740437 ==
783 19:59:33.744091 [Gating] SW mode calibration
784 19:59:33.751279 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
785 19:59:33.757990 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
786 19:59:33.760421 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
787 19:59:33.763982 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
788 19:59:33.770973 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
789 19:59:33.774480 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
790 19:59:33.777521 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
791 19:59:33.784226 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
792 19:59:33.787589 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
793 19:59:33.790578 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
794 19:59:33.794311 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
795 19:59:33.800626 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
796 19:59:33.803977 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
797 19:59:33.807486 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
798 19:59:33.813806 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
799 19:59:33.817892 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
800 19:59:33.821032 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
801 19:59:33.828083 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
802 19:59:33.831124 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
803 19:59:33.834194 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
804 19:59:33.840664 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)
805 19:59:33.844007 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
806 19:59:33.847785 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
807 19:59:33.854420 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
808 19:59:33.857420 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
809 19:59:33.860573 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
810 19:59:33.867722 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
811 19:59:33.870948 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
812 19:59:33.874043 0 9 8 | B1->B0 | 2323 3333 | 0 0 | (0 0) (0 0)
813 19:59:33.877661 0 9 12 | B1->B0 | 3232 3434 | 1 1 | (0 0) (1 1)
814 19:59:33.883830 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
815 19:59:33.887411 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
816 19:59:33.890471 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
817 19:59:33.897697 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
818 19:59:33.900534 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
819 19:59:33.904297 0 10 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
820 19:59:33.911130 0 10 8 | B1->B0 | 2f2f 2323 | 0 0 | (0 0) (0 0)
821 19:59:33.914122 0 10 12 | B1->B0 | 2727 2323 | 0 0 | (0 0) (0 0)
822 19:59:33.918232 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
823 19:59:33.924446 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
824 19:59:33.927895 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
825 19:59:33.930698 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
826 19:59:33.937723 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
827 19:59:33.940750 0 11 4 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
828 19:59:33.944396 0 11 8 | B1->B0 | 2e2e 3e3d | 0 1 | (0 0) (0 0)
829 19:59:33.947530 0 11 12 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)
830 19:59:33.954481 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
831 19:59:33.957519 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
832 19:59:33.961409 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
833 19:59:33.968212 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
834 19:59:33.971255 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
835 19:59:33.974327 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
836 19:59:33.981605 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
837 19:59:33.984516 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
838 19:59:33.988040 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
839 19:59:33.994994 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
840 19:59:33.998105 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
841 19:59:34.002219 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
842 19:59:34.005114 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
843 19:59:34.011506 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
844 19:59:34.014852 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
845 19:59:34.018717 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
846 19:59:34.025404 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
847 19:59:34.028295 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
848 19:59:34.031355 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
849 19:59:34.038482 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
850 19:59:34.041537 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
851 19:59:34.044752 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
852 19:59:34.051844 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
853 19:59:34.052398 Total UI for P1: 0, mck2ui 16
854 19:59:34.058993 best dqsien dly found for B0: ( 0, 14, 6)
855 19:59:34.061382 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
856 19:59:34.064567 Total UI for P1: 0, mck2ui 16
857 19:59:34.068500 best dqsien dly found for B1: ( 0, 14, 10)
858 19:59:34.072564 best DQS0 dly(MCK, UI, PI) = (0, 14, 6)
859 19:59:34.076158 best DQS1 dly(MCK, UI, PI) = (0, 14, 10)
860 19:59:34.076671
861 19:59:34.079340 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 6)
862 19:59:34.082469 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 10)
863 19:59:34.085546 [Gating] SW calibration Done
864 19:59:34.086065 ==
865 19:59:34.089093 Dram Type= 6, Freq= 0, CH_0, rank 0
866 19:59:34.092107 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
867 19:59:34.092526 ==
868 19:59:34.095581 RX Vref Scan: 0
869 19:59:34.096084
870 19:59:34.096593 RX Vref 0 -> 0, step: 1
871 19:59:34.096930
872 19:59:34.098976 RX Delay -130 -> 252, step: 16
873 19:59:34.102440 iDelay=206, Bit 0, Center 93 (-18 ~ 205) 224
874 19:59:34.108768 iDelay=206, Bit 1, Center 93 (-18 ~ 205) 224
875 19:59:34.112394 iDelay=206, Bit 2, Center 85 (-34 ~ 205) 240
876 19:59:34.115916 iDelay=206, Bit 3, Center 85 (-34 ~ 205) 240
877 19:59:34.118907 iDelay=206, Bit 4, Center 93 (-18 ~ 205) 224
878 19:59:34.122669 iDelay=206, Bit 5, Center 77 (-34 ~ 189) 224
879 19:59:34.128926 iDelay=206, Bit 6, Center 93 (-18 ~ 205) 224
880 19:59:34.132379 iDelay=206, Bit 7, Center 93 (-18 ~ 205) 224
881 19:59:34.135737 iDelay=206, Bit 8, Center 69 (-50 ~ 189) 240
882 19:59:34.139001 iDelay=206, Bit 9, Center 69 (-50 ~ 189) 240
883 19:59:34.142118 iDelay=206, Bit 10, Center 77 (-34 ~ 189) 224
884 19:59:34.148968 iDelay=206, Bit 11, Center 69 (-50 ~ 189) 240
885 19:59:34.152610 iDelay=206, Bit 12, Center 93 (-18 ~ 205) 224
886 19:59:34.155757 iDelay=206, Bit 13, Center 93 (-18 ~ 205) 224
887 19:59:34.159589 iDelay=206, Bit 14, Center 93 (-18 ~ 205) 224
888 19:59:34.162551 iDelay=206, Bit 15, Center 93 (-18 ~ 205) 224
889 19:59:34.166319 ==
890 19:59:34.166864 Dram Type= 6, Freq= 0, CH_0, rank 0
891 19:59:34.172725 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
892 19:59:34.173254 ==
893 19:59:34.173591 DQS Delay:
894 19:59:34.176138 DQS0 = 0, DQS1 = 0
895 19:59:34.176657 DQM Delay:
896 19:59:34.179782 DQM0 = 89, DQM1 = 82
897 19:59:34.180306 DQ Delay:
898 19:59:34.182859 DQ0 =93, DQ1 =93, DQ2 =85, DQ3 =85
899 19:59:34.186010 DQ4 =93, DQ5 =77, DQ6 =93, DQ7 =93
900 19:59:34.188860 DQ8 =69, DQ9 =69, DQ10 =77, DQ11 =69
901 19:59:34.193057 DQ12 =93, DQ13 =93, DQ14 =93, DQ15 =93
902 19:59:34.193577
903 19:59:34.193909
904 19:59:34.194215 ==
905 19:59:34.195942 Dram Type= 6, Freq= 0, CH_0, rank 0
906 19:59:34.199187 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
907 19:59:34.199762 ==
908 19:59:34.200108
909 19:59:34.200417
910 19:59:34.202810 TX Vref Scan disable
911 19:59:34.203361 == TX Byte 0 ==
912 19:59:34.209756 Update DQ dly =583 (2 ,1, 39) DQ OEN =(1 ,6)
913 19:59:34.212969 Update DQM dly =583 (2 ,1, 39) DQM OEN =(1 ,6)
914 19:59:34.213392 == TX Byte 1 ==
915 19:59:34.219874 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
916 19:59:34.223119 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
917 19:59:34.223729 ==
918 19:59:34.226282 Dram Type= 6, Freq= 0, CH_0, rank 0
919 19:59:34.229754 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
920 19:59:34.230221 ==
921 19:59:34.243387 TX Vref=22, minBit 9, minWin=27, winSum=450
922 19:59:34.246776 TX Vref=24, minBit 10, minWin=27, winSum=453
923 19:59:34.250458 TX Vref=26, minBit 10, minWin=27, winSum=452
924 19:59:34.253916 TX Vref=28, minBit 8, minWin=28, winSum=457
925 19:59:34.256933 TX Vref=30, minBit 0, minWin=28, winSum=459
926 19:59:34.260762 TX Vref=32, minBit 6, minWin=28, winSum=457
927 19:59:34.266862 [TxChooseVref] Worse bit 0, Min win 28, Win sum 459, Final Vref 30
928 19:59:34.267393
929 19:59:34.270548 Final TX Range 1 Vref 30
930 19:59:34.271079
931 19:59:34.271420 ==
932 19:59:34.274028 Dram Type= 6, Freq= 0, CH_0, rank 0
933 19:59:34.276817 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
934 19:59:34.277249 ==
935 19:59:34.277652
936 19:59:34.280475
937 19:59:34.281008 TX Vref Scan disable
938 19:59:34.284030 == TX Byte 0 ==
939 19:59:34.286595 Update DQ dly =583 (2 ,1, 39) DQ OEN =(1 ,6)
940 19:59:34.290317 Update DQM dly =583 (2 ,1, 39) DQM OEN =(1 ,6)
941 19:59:34.293794 == TX Byte 1 ==
942 19:59:34.297521 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
943 19:59:34.300390 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
944 19:59:34.303438
945 19:59:34.303923 [DATLAT]
946 19:59:34.304375 Freq=800, CH0 RK0
947 19:59:34.304807
948 19:59:34.307421 DATLAT Default: 0xa
949 19:59:34.308024 0, 0xFFFF, sum = 0
950 19:59:34.310148 1, 0xFFFF, sum = 0
951 19:59:34.310573 2, 0xFFFF, sum = 0
952 19:59:34.313974 3, 0xFFFF, sum = 0
953 19:59:34.314417 4, 0xFFFF, sum = 0
954 19:59:34.317427 5, 0xFFFF, sum = 0
955 19:59:34.317867 6, 0xFFFF, sum = 0
956 19:59:34.320422 7, 0xFFFF, sum = 0
957 19:59:34.320978 8, 0xFFFF, sum = 0
958 19:59:34.323865 9, 0x0, sum = 1
959 19:59:34.324312 10, 0x0, sum = 2
960 19:59:34.327569 11, 0x0, sum = 3
961 19:59:34.328167 12, 0x0, sum = 4
962 19:59:34.330549 best_step = 10
963 19:59:34.330986
964 19:59:34.331442 ==
965 19:59:34.333702 Dram Type= 6, Freq= 0, CH_0, rank 0
966 19:59:34.337774 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
967 19:59:34.338326 ==
968 19:59:34.340623 RX Vref Scan: 1
969 19:59:34.341149
970 19:59:34.341601 Set Vref Range= 32 -> 127
971 19:59:34.342025
972 19:59:34.344243 RX Vref 32 -> 127, step: 1
973 19:59:34.344684
974 19:59:34.347043 RX Delay -95 -> 252, step: 8
975 19:59:34.347480
976 19:59:34.350740 Set Vref, RX VrefLevel [Byte0]: 32
977 19:59:34.354445 [Byte1]: 32
978 19:59:34.354991
979 19:59:34.357491 Set Vref, RX VrefLevel [Byte0]: 33
980 19:59:34.360296 [Byte1]: 33
981 19:59:34.364080
982 19:59:34.364521 Set Vref, RX VrefLevel [Byte0]: 34
983 19:59:34.367556 [Byte1]: 34
984 19:59:34.372115
985 19:59:34.372660 Set Vref, RX VrefLevel [Byte0]: 35
986 19:59:34.375107 [Byte1]: 35
987 19:59:34.379539
988 19:59:34.380137 Set Vref, RX VrefLevel [Byte0]: 36
989 19:59:34.383190 [Byte1]: 36
990 19:59:34.387426
991 19:59:34.388016 Set Vref, RX VrefLevel [Byte0]: 37
992 19:59:34.390544 [Byte1]: 37
993 19:59:34.394483
994 19:59:34.394900 Set Vref, RX VrefLevel [Byte0]: 38
995 19:59:34.397790 [Byte1]: 38
996 19:59:34.402177
997 19:59:34.402687 Set Vref, RX VrefLevel [Byte0]: 39
998 19:59:34.405678 [Byte1]: 39
999 19:59:34.409436
1000 19:59:34.409889 Set Vref, RX VrefLevel [Byte0]: 40
1001 19:59:34.413029 [Byte1]: 40
1002 19:59:34.416794
1003 19:59:34.417208 Set Vref, RX VrefLevel [Byte0]: 41
1004 19:59:34.420692 [Byte1]: 41
1005 19:59:34.424299
1006 19:59:34.424712 Set Vref, RX VrefLevel [Byte0]: 42
1007 19:59:34.428199 [Byte1]: 42
1008 19:59:34.432061
1009 19:59:34.432489 Set Vref, RX VrefLevel [Byte0]: 43
1010 19:59:34.435542 [Byte1]: 43
1011 19:59:34.440096
1012 19:59:34.440627 Set Vref, RX VrefLevel [Byte0]: 44
1013 19:59:34.443038 [Byte1]: 44
1014 19:59:34.447608
1015 19:59:34.448185 Set Vref, RX VrefLevel [Byte0]: 45
1016 19:59:34.451034 [Byte1]: 45
1017 19:59:34.455384
1018 19:59:34.455985 Set Vref, RX VrefLevel [Byte0]: 46
1019 19:59:34.458280 [Byte1]: 46
1020 19:59:34.462592
1021 19:59:34.463136 Set Vref, RX VrefLevel [Byte0]: 47
1022 19:59:34.465909 [Byte1]: 47
1023 19:59:34.470761
1024 19:59:34.471268 Set Vref, RX VrefLevel [Byte0]: 48
1025 19:59:34.473683 [Byte1]: 48
1026 19:59:34.478368
1027 19:59:34.478869 Set Vref, RX VrefLevel [Byte0]: 49
1028 19:59:34.481507 [Byte1]: 49
1029 19:59:34.485987
1030 19:59:34.486499 Set Vref, RX VrefLevel [Byte0]: 50
1031 19:59:34.489061 [Byte1]: 50
1032 19:59:34.493137
1033 19:59:34.493569 Set Vref, RX VrefLevel [Byte0]: 51
1034 19:59:34.496456 [Byte1]: 51
1035 19:59:34.500408
1036 19:59:34.500838 Set Vref, RX VrefLevel [Byte0]: 52
1037 19:59:34.506830 [Byte1]: 52
1038 19:59:34.507254
1039 19:59:34.510419 Set Vref, RX VrefLevel [Byte0]: 53
1040 19:59:34.513984 [Byte1]: 53
1041 19:59:34.514494
1042 19:59:34.517055 Set Vref, RX VrefLevel [Byte0]: 54
1043 19:59:34.520235 [Byte1]: 54
1044 19:59:34.520742
1045 19:59:34.523871 Set Vref, RX VrefLevel [Byte0]: 55
1046 19:59:34.526867 [Byte1]: 55
1047 19:59:34.530858
1048 19:59:34.531270 Set Vref, RX VrefLevel [Byte0]: 56
1049 19:59:34.534020 [Byte1]: 56
1050 19:59:34.538946
1051 19:59:34.539483 Set Vref, RX VrefLevel [Byte0]: 57
1052 19:59:34.541937 [Byte1]: 57
1053 19:59:34.546050
1054 19:59:34.546455 Set Vref, RX VrefLevel [Byte0]: 58
1055 19:59:34.549281 [Byte1]: 58
1056 19:59:34.553572
1057 19:59:34.553976 Set Vref, RX VrefLevel [Byte0]: 59
1058 19:59:34.557707 [Byte1]: 59
1059 19:59:34.561679
1060 19:59:34.562206 Set Vref, RX VrefLevel [Byte0]: 60
1061 19:59:34.564498 [Byte1]: 60
1062 19:59:34.569385
1063 19:59:34.569946 Set Vref, RX VrefLevel [Byte0]: 61
1064 19:59:34.572404 [Byte1]: 61
1065 19:59:34.576906
1066 19:59:34.577435 Set Vref, RX VrefLevel [Byte0]: 62
1067 19:59:34.580162 [Byte1]: 62
1068 19:59:34.584339
1069 19:59:34.584873 Set Vref, RX VrefLevel [Byte0]: 63
1070 19:59:34.588036 [Byte1]: 63
1071 19:59:34.591496
1072 19:59:34.591948 Set Vref, RX VrefLevel [Byte0]: 64
1073 19:59:34.595791 [Byte1]: 64
1074 19:59:34.599524
1075 19:59:34.600104 Set Vref, RX VrefLevel [Byte0]: 65
1076 19:59:34.602716 [Byte1]: 65
1077 19:59:34.607143
1078 19:59:34.607712 Set Vref, RX VrefLevel [Byte0]: 66
1079 19:59:34.610840 [Byte1]: 66
1080 19:59:34.614596
1081 19:59:34.615130 Set Vref, RX VrefLevel [Byte0]: 67
1082 19:59:34.617792 [Byte1]: 67
1083 19:59:34.622574
1084 19:59:34.623108 Set Vref, RX VrefLevel [Byte0]: 68
1085 19:59:34.625729 [Byte1]: 68
1086 19:59:34.630168
1087 19:59:34.630710 Set Vref, RX VrefLevel [Byte0]: 69
1088 19:59:34.633030 [Byte1]: 69
1089 19:59:34.637304
1090 19:59:34.637730 Set Vref, RX VrefLevel [Byte0]: 70
1091 19:59:34.640395 [Byte1]: 70
1092 19:59:34.644715
1093 19:59:34.645128 Set Vref, RX VrefLevel [Byte0]: 71
1094 19:59:34.648362 [Byte1]: 71
1095 19:59:34.652423
1096 19:59:34.653178 Set Vref, RX VrefLevel [Byte0]: 72
1097 19:59:34.655823 [Byte1]: 72
1098 19:59:34.659793
1099 19:59:34.660209 Set Vref, RX VrefLevel [Byte0]: 73
1100 19:59:34.663453 [Byte1]: 73
1101 19:59:34.668198
1102 19:59:34.668608 Set Vref, RX VrefLevel [Byte0]: 74
1103 19:59:34.671567 [Byte1]: 74
1104 19:59:34.676057
1105 19:59:34.676561 Set Vref, RX VrefLevel [Byte0]: 75
1106 19:59:34.679224 [Byte1]: 75
1107 19:59:34.683383
1108 19:59:34.683952 Set Vref, RX VrefLevel [Byte0]: 76
1109 19:59:34.686777 [Byte1]: 76
1110 19:59:34.690417
1111 19:59:34.690848 Set Vref, RX VrefLevel [Byte0]: 77
1112 19:59:34.694142 [Byte1]: 77
1113 19:59:34.698267
1114 19:59:34.698785 Final RX Vref Byte 0 = 56 to rank0
1115 19:59:34.702122 Final RX Vref Byte 1 = 61 to rank0
1116 19:59:34.705302 Final RX Vref Byte 0 = 56 to rank1
1117 19:59:34.708173 Final RX Vref Byte 1 = 61 to rank1==
1118 19:59:34.711730 Dram Type= 6, Freq= 0, CH_0, rank 0
1119 19:59:34.718351 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1120 19:59:34.718846 ==
1121 19:59:34.719323 DQS Delay:
1122 19:59:34.719836 DQS0 = 0, DQS1 = 0
1123 19:59:34.721659 DQM Delay:
1124 19:59:34.722181 DQM0 = 92, DQM1 = 85
1125 19:59:34.725104 DQ Delay:
1126 19:59:34.728286 DQ0 =92, DQ1 =96, DQ2 =88, DQ3 =88
1127 19:59:34.728719 DQ4 =92, DQ5 =80, DQ6 =100, DQ7 =100
1128 19:59:34.731417 DQ8 =76, DQ9 =76, DQ10 =84, DQ11 =76
1129 19:59:34.735001 DQ12 =92, DQ13 =92, DQ14 =92, DQ15 =92
1130 19:59:34.738149
1131 19:59:34.738577
1132 19:59:34.745118 [DQSOSCAuto] RK0, (LSB)MR18= 0x4d43, (MSB)MR19= 0x606, tDQSOscB0 = 393 ps tDQSOscB1 = 390 ps
1133 19:59:34.748329 CH0 RK0: MR19=606, MR18=4D43
1134 19:59:34.755128 CH0_RK0: MR19=0x606, MR18=0x4D43, DQSOSC=390, MR23=63, INC=97, DEC=64
1135 19:59:34.755632
1136 19:59:34.758505 ----->DramcWriteLeveling(PI) begin...
1137 19:59:34.759011 ==
1138 19:59:34.761607 Dram Type= 6, Freq= 0, CH_0, rank 1
1139 19:59:34.764836 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1140 19:59:34.765312 ==
1141 19:59:34.768198 Write leveling (Byte 0): 35 => 35
1142 19:59:34.771609 Write leveling (Byte 1): 30 => 30
1143 19:59:34.775230 DramcWriteLeveling(PI) end<-----
1144 19:59:34.775833
1145 19:59:34.776278 ==
1146 19:59:34.778563 Dram Type= 6, Freq= 0, CH_0, rank 1
1147 19:59:34.781839 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1148 19:59:34.782346 ==
1149 19:59:34.784970 [Gating] SW mode calibration
1150 19:59:34.832647 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1151 19:59:34.833569 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1152 19:59:34.834057 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1153 19:59:34.834409 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1154 19:59:34.834819 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1155 19:59:34.835211 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1156 19:59:34.835747 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1157 19:59:34.836067 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1158 19:59:34.836361 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1159 19:59:34.836646 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1160 19:59:34.876816 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1161 19:59:34.877445 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1162 19:59:34.877798 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1163 19:59:34.878112 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1164 19:59:34.878414 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1165 19:59:34.879041 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1166 19:59:34.879360 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1167 19:59:34.879693 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1168 19:59:34.879996 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1169 19:59:34.880282 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1170 19:59:34.904227 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)
1171 19:59:34.905239 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1172 19:59:34.905603 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1173 19:59:34.905920 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1174 19:59:34.906290 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1175 19:59:34.906586 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1176 19:59:34.908727 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1177 19:59:34.911970 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1178 19:59:34.915093 0 9 8 | B1->B0 | 2b2b 2a2a | 0 0 | (1 1) (0 0)
1179 19:59:34.921999 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1180 19:59:34.925445 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1181 19:59:34.928387 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1182 19:59:34.932183 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1183 19:59:34.939141 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1184 19:59:34.941657 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1185 19:59:34.945500 0 10 4 | B1->B0 | 3232 3434 | 1 1 | (1 1) (1 1)
1186 19:59:34.952286 0 10 8 | B1->B0 | 2929 2828 | 0 0 | (0 0) (0 0)
1187 19:59:34.955449 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1188 19:59:34.958701 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1189 19:59:34.966287 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1190 19:59:34.969990 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1191 19:59:34.973890 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1192 19:59:34.977643 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1193 19:59:34.981053 0 11 4 | B1->B0 | 2424 2a2a | 1 1 | (0 0) (0 0)
1194 19:59:34.988074 0 11 8 | B1->B0 | 3939 3a3a | 1 0 | (0 0) (0 0)
1195 19:59:34.991493 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1196 19:59:34.994807 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1197 19:59:34.998151 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1198 19:59:35.004799 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1199 19:59:35.008123 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1200 19:59:35.012234 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1201 19:59:35.018359 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1202 19:59:35.021452 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1203 19:59:35.025343 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1204 19:59:35.032150 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1205 19:59:35.034875 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1206 19:59:35.038301 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1207 19:59:35.041774 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1208 19:59:35.048616 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1209 19:59:35.051575 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1210 19:59:35.055410 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1211 19:59:35.062042 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1212 19:59:35.064827 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1213 19:59:35.068644 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1214 19:59:35.075147 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1215 19:59:35.078459 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1216 19:59:35.082097 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1217 19:59:35.088510 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1218 19:59:35.091768 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1219 19:59:35.095510 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1220 19:59:35.098965 Total UI for P1: 0, mck2ui 16
1221 19:59:35.102037 best dqsien dly found for B0: ( 0, 14, 8)
1222 19:59:35.104943 Total UI for P1: 0, mck2ui 16
1223 19:59:35.108725 best dqsien dly found for B1: ( 0, 14, 8)
1224 19:59:35.111849 best DQS0 dly(MCK, UI, PI) = (0, 14, 8)
1225 19:59:35.115570 best DQS1 dly(MCK, UI, PI) = (0, 14, 8)
1226 19:59:35.116152
1227 19:59:35.118880 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)
1228 19:59:35.125313 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 8)
1229 19:59:35.125838 [Gating] SW calibration Done
1230 19:59:35.126282 ==
1231 19:59:35.128280 Dram Type= 6, Freq= 0, CH_0, rank 1
1232 19:59:35.135183 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1233 19:59:35.135777 ==
1234 19:59:35.136224 RX Vref Scan: 0
1235 19:59:35.136637
1236 19:59:35.138225 RX Vref 0 -> 0, step: 1
1237 19:59:35.138658
1238 19:59:35.141564 RX Delay -130 -> 252, step: 16
1239 19:59:35.144771 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1240 19:59:35.148465 iDelay=222, Bit 1, Center 93 (-18 ~ 205) 224
1241 19:59:35.151713 iDelay=222, Bit 2, Center 93 (-18 ~ 205) 224
1242 19:59:35.158555 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
1243 19:59:35.162049 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1244 19:59:35.164904 iDelay=222, Bit 5, Center 85 (-34 ~ 205) 240
1245 19:59:35.168986 iDelay=222, Bit 6, Center 93 (-18 ~ 205) 224
1246 19:59:35.172125 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
1247 19:59:35.178365 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
1248 19:59:35.181768 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
1249 19:59:35.185267 iDelay=222, Bit 10, Center 77 (-34 ~ 189) 224
1250 19:59:35.188088 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
1251 19:59:35.191789 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1252 19:59:35.199040 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1253 19:59:35.202116 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
1254 19:59:35.205447 iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224
1255 19:59:35.205973 ==
1256 19:59:35.208431 Dram Type= 6, Freq= 0, CH_0, rank 1
1257 19:59:35.212215 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1258 19:59:35.212744 ==
1259 19:59:35.215014 DQS Delay:
1260 19:59:35.215439 DQS0 = 0, DQS1 = 0
1261 19:59:35.218775 DQM Delay:
1262 19:59:35.219363 DQM0 = 92, DQM1 = 82
1263 19:59:35.219743 DQ Delay:
1264 19:59:35.222490 DQ0 =93, DQ1 =93, DQ2 =93, DQ3 =85
1265 19:59:35.225247 DQ4 =93, DQ5 =85, DQ6 =93, DQ7 =101
1266 19:59:35.228385 DQ8 =69, DQ9 =77, DQ10 =77, DQ11 =77
1267 19:59:35.231471 DQ12 =85, DQ13 =85, DQ14 =93, DQ15 =93
1268 19:59:35.231913
1269 19:59:35.232246
1270 19:59:35.232556 ==
1271 19:59:35.235245 Dram Type= 6, Freq= 0, CH_0, rank 1
1272 19:59:35.241526 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1273 19:59:35.241947 ==
1274 19:59:35.242276
1275 19:59:35.242581
1276 19:59:35.242964 TX Vref Scan disable
1277 19:59:35.245521 == TX Byte 0 ==
1278 19:59:35.249407 Update DQ dly =586 (2 ,2, 10) DQ OEN =(1 ,7)
1279 19:59:35.252589 Update DQM dly =586 (2 ,2, 10) DQM OEN =(1 ,7)
1280 19:59:35.255776 == TX Byte 1 ==
1281 19:59:35.259411 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1282 19:59:35.265424 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1283 19:59:35.265861 ==
1284 19:59:35.269196 Dram Type= 6, Freq= 0, CH_0, rank 1
1285 19:59:35.272081 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1286 19:59:35.272503 ==
1287 19:59:35.285879 TX Vref=22, minBit 5, minWin=27, winSum=447
1288 19:59:35.288895 TX Vref=24, minBit 1, minWin=28, winSum=452
1289 19:59:35.292372 TX Vref=26, minBit 1, minWin=28, winSum=455
1290 19:59:35.295456 TX Vref=28, minBit 1, minWin=28, winSum=458
1291 19:59:35.298949 TX Vref=30, minBit 2, minWin=28, winSum=452
1292 19:59:35.302120 TX Vref=32, minBit 10, minWin=27, winSum=452
1293 19:59:35.308921 [TxChooseVref] Worse bit 1, Min win 28, Win sum 458, Final Vref 28
1294 19:59:35.309339
1295 19:59:35.312299 Final TX Range 1 Vref 28
1296 19:59:35.312713
1297 19:59:35.313039 ==
1298 19:59:35.315360 Dram Type= 6, Freq= 0, CH_0, rank 1
1299 19:59:35.318470 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1300 19:59:35.318886 ==
1301 19:59:35.319213
1302 19:59:35.321992
1303 19:59:35.322402 TX Vref Scan disable
1304 19:59:35.325325 == TX Byte 0 ==
1305 19:59:35.328669 Update DQ dly =586 (2 ,2, 10) DQ OEN =(1 ,7)
1306 19:59:35.332056 Update DQM dly =586 (2 ,2, 10) DQM OEN =(1 ,7)
1307 19:59:35.335789 == TX Byte 1 ==
1308 19:59:35.338686 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1309 19:59:35.341768 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1310 19:59:35.344969
1311 19:59:35.345352 [DATLAT]
1312 19:59:35.345711 Freq=800, CH0 RK1
1313 19:59:35.346036
1314 19:59:35.349034 DATLAT Default: 0xa
1315 19:59:35.349415 0, 0xFFFF, sum = 0
1316 19:59:35.351917 1, 0xFFFF, sum = 0
1317 19:59:35.352217 2, 0xFFFF, sum = 0
1318 19:59:35.355123 3, 0xFFFF, sum = 0
1319 19:59:35.355504 4, 0xFFFF, sum = 0
1320 19:59:35.358489 5, 0xFFFF, sum = 0
1321 19:59:35.362236 6, 0xFFFF, sum = 0
1322 19:59:35.362663 7, 0xFFFF, sum = 0
1323 19:59:35.365533 8, 0xFFFF, sum = 0
1324 19:59:35.365832 9, 0x0, sum = 1
1325 19:59:35.366102 10, 0x0, sum = 2
1326 19:59:35.368896 11, 0x0, sum = 3
1327 19:59:35.369285 12, 0x0, sum = 4
1328 19:59:35.372414 best_step = 10
1329 19:59:35.372708
1330 19:59:35.372940 ==
1331 19:59:35.375515 Dram Type= 6, Freq= 0, CH_0, rank 1
1332 19:59:35.379195 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1333 19:59:35.379598 ==
1334 19:59:35.382792 RX Vref Scan: 0
1335 19:59:35.383170
1336 19:59:35.383405 RX Vref 0 -> 0, step: 1
1337 19:59:35.383631
1338 19:59:35.385432 RX Delay -95 -> 252, step: 8
1339 19:59:35.392212 iDelay=209, Bit 0, Center 92 (-15 ~ 200) 216
1340 19:59:35.395376 iDelay=209, Bit 1, Center 96 (-7 ~ 200) 208
1341 19:59:35.398875 iDelay=209, Bit 2, Center 88 (-23 ~ 200) 224
1342 19:59:35.402356 iDelay=209, Bit 3, Center 88 (-23 ~ 200) 224
1343 19:59:35.405329 iDelay=209, Bit 4, Center 96 (-15 ~ 208) 224
1344 19:59:35.412235 iDelay=209, Bit 5, Center 88 (-23 ~ 200) 224
1345 19:59:35.415559 iDelay=209, Bit 6, Center 100 (-7 ~ 208) 216
1346 19:59:35.419004 iDelay=209, Bit 7, Center 100 (-7 ~ 208) 216
1347 19:59:35.422777 iDelay=209, Bit 8, Center 76 (-31 ~ 184) 216
1348 19:59:35.425515 iDelay=209, Bit 9, Center 72 (-31 ~ 176) 208
1349 19:59:35.432002 iDelay=209, Bit 10, Center 84 (-23 ~ 192) 216
1350 19:59:35.435795 iDelay=209, Bit 11, Center 76 (-31 ~ 184) 216
1351 19:59:35.439120 iDelay=209, Bit 12, Center 88 (-23 ~ 200) 224
1352 19:59:35.442027 iDelay=209, Bit 13, Center 84 (-23 ~ 192) 216
1353 19:59:35.445608 iDelay=209, Bit 14, Center 92 (-15 ~ 200) 216
1354 19:59:35.452346 iDelay=209, Bit 15, Center 92 (-15 ~ 200) 216
1355 19:59:35.452848 ==
1356 19:59:35.456260 Dram Type= 6, Freq= 0, CH_0, rank 1
1357 19:59:35.459374 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1358 19:59:35.459940 ==
1359 19:59:35.460340 DQS Delay:
1360 19:59:35.462391 DQS0 = 0, DQS1 = 0
1361 19:59:35.462894 DQM Delay:
1362 19:59:35.465563 DQM0 = 93, DQM1 = 83
1363 19:59:35.465976 DQ Delay:
1364 19:59:35.469264 DQ0 =92, DQ1 =96, DQ2 =88, DQ3 =88
1365 19:59:35.472499 DQ4 =96, DQ5 =88, DQ6 =100, DQ7 =100
1366 19:59:35.475316 DQ8 =76, DQ9 =72, DQ10 =84, DQ11 =76
1367 19:59:35.478935 DQ12 =88, DQ13 =84, DQ14 =92, DQ15 =92
1368 19:59:35.479438
1369 19:59:35.479811
1370 19:59:35.485619 [DQSOSCAuto] RK1, (LSB)MR18= 0x4112, (MSB)MR19= 0x606, tDQSOscB0 = 405 ps tDQSOscB1 = 393 ps
1371 19:59:35.488800 CH0 RK1: MR19=606, MR18=4112
1372 19:59:35.495937 CH0_RK1: MR19=0x606, MR18=0x4112, DQSOSC=393, MR23=63, INC=95, DEC=63
1373 19:59:35.499191 [RxdqsGatingPostProcess] freq 800
1374 19:59:35.505292 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1375 19:59:35.508747 Pre-setting of DQS Precalculation
1376 19:59:35.512442 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
1377 19:59:35.512977 ==
1378 19:59:35.516039 Dram Type= 6, Freq= 0, CH_1, rank 0
1379 19:59:35.519231 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1380 19:59:35.519809 ==
1381 19:59:35.525914 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1382 19:59:35.532063 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1383 19:59:35.540696 [CA 0] Center 36 (6~67) winsize 62
1384 19:59:35.544047 [CA 1] Center 36 (6~67) winsize 62
1385 19:59:35.546962 [CA 2] Center 34 (4~65) winsize 62
1386 19:59:35.550784 [CA 3] Center 34 (4~65) winsize 62
1387 19:59:35.553764 [CA 4] Center 34 (4~65) winsize 62
1388 19:59:35.557859 [CA 5] Center 34 (4~64) winsize 61
1389 19:59:35.558381
1390 19:59:35.560668 [CmdBusTrainingLP45] Vref(ca) range 1: 32
1391 19:59:35.561082
1392 19:59:35.564230 [CATrainingPosCal] consider 1 rank data
1393 19:59:35.567094 u2DelayCellTimex100 = 270/100 ps
1394 19:59:35.570595 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1395 19:59:35.573712 CA1 delay=36 (6~67),Diff = 2 PI (14 cell)
1396 19:59:35.580423 CA2 delay=34 (4~65),Diff = 0 PI (0 cell)
1397 19:59:35.584215 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
1398 19:59:35.587414 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1399 19:59:35.590876 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
1400 19:59:35.591391
1401 19:59:35.593902 CA PerBit enable=1, Macro0, CA PI delay=34
1402 19:59:35.594320
1403 19:59:35.596791 [CBTSetCACLKResult] CA Dly = 34
1404 19:59:35.597238 CS Dly: 6 (0~37)
1405 19:59:35.597573 ==
1406 19:59:35.600609 Dram Type= 6, Freq= 0, CH_1, rank 1
1407 19:59:35.607728 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1408 19:59:35.608241 ==
1409 19:59:35.610629 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1410 19:59:35.617369 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1411 19:59:35.627434 [CA 0] Center 36 (6~67) winsize 62
1412 19:59:35.630804 [CA 1] Center 36 (6~67) winsize 62
1413 19:59:35.634298 [CA 2] Center 35 (4~66) winsize 63
1414 19:59:35.638076 [CA 3] Center 34 (4~65) winsize 62
1415 19:59:35.641967 [CA 4] Center 34 (4~65) winsize 62
1416 19:59:35.645716 [CA 5] Center 34 (4~65) winsize 62
1417 19:59:35.646134
1418 19:59:35.649212 [CmdBusTrainingLP45] Vref(ca) range 1: 32
1419 19:59:35.649748
1420 19:59:35.652764 [CATrainingPosCal] consider 2 rank data
1421 19:59:35.653322 u2DelayCellTimex100 = 270/100 ps
1422 19:59:35.656546 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1423 19:59:35.659666 CA1 delay=36 (6~67),Diff = 2 PI (14 cell)
1424 19:59:35.666512 CA2 delay=34 (4~65),Diff = 0 PI (0 cell)
1425 19:59:35.669411 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
1426 19:59:35.672779 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1427 19:59:35.676413 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
1428 19:59:35.676829
1429 19:59:35.679764 CA PerBit enable=1, Macro0, CA PI delay=34
1430 19:59:35.680265
1431 19:59:35.683208 [CBTSetCACLKResult] CA Dly = 34
1432 19:59:35.683626 CS Dly: 6 (0~38)
1433 19:59:35.684012
1434 19:59:35.686168 ----->DramcWriteLeveling(PI) begin...
1435 19:59:35.689616 ==
1436 19:59:35.693210 Dram Type= 6, Freq= 0, CH_1, rank 0
1437 19:59:35.696114 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1438 19:59:35.696720 ==
1439 19:59:35.700103 Write leveling (Byte 0): 27 => 27
1440 19:59:35.703184 Write leveling (Byte 1): 30 => 30
1441 19:59:35.706204 DramcWriteLeveling(PI) end<-----
1442 19:59:35.706746
1443 19:59:35.707207 ==
1444 19:59:35.709687 Dram Type= 6, Freq= 0, CH_1, rank 0
1445 19:59:35.713092 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1446 19:59:35.713508 ==
1447 19:59:35.716214 [Gating] SW mode calibration
1448 19:59:35.723241 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1449 19:59:35.726206 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1450 19:59:35.733157 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1451 19:59:35.736657 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1452 19:59:35.739462 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1453 19:59:35.746348 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1454 19:59:35.749661 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1455 19:59:35.753334 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1456 19:59:35.759891 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1457 19:59:35.763226 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1458 19:59:35.766251 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1459 19:59:35.773059 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1460 19:59:35.776292 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1461 19:59:35.779535 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1462 19:59:35.786202 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1463 19:59:35.789690 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1464 19:59:35.793043 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1465 19:59:35.796555 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1466 19:59:35.802952 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
1467 19:59:35.806388 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1468 19:59:35.810083 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1469 19:59:35.816776 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1470 19:59:35.820096 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1471 19:59:35.823169 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1472 19:59:35.830072 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1473 19:59:35.833705 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1474 19:59:35.836940 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1475 19:59:35.843069 0 9 4 | B1->B0 | 2323 2525 | 0 1 | (0 0) (1 1)
1476 19:59:35.846192 0 9 8 | B1->B0 | 3131 3434 | 1 1 | (1 1) (1 1)
1477 19:59:35.849916 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1478 19:59:35.856737 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1479 19:59:35.859929 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1480 19:59:35.863126 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1481 19:59:35.870038 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1482 19:59:35.873258 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 1)
1483 19:59:35.876519 0 10 4 | B1->B0 | 3131 2e2e | 1 1 | (1 0) (1 0)
1484 19:59:35.883295 0 10 8 | B1->B0 | 2525 2323 | 0 0 | (0 0) (1 0)
1485 19:59:35.886789 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1486 19:59:35.889687 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1487 19:59:35.893453 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1488 19:59:35.900225 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1489 19:59:35.903047 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1490 19:59:35.906492 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1491 19:59:35.913202 0 11 4 | B1->B0 | 2a2a 3333 | 0 1 | (0 0) (0 0)
1492 19:59:35.916453 0 11 8 | B1->B0 | 4343 4646 | 1 0 | (0 0) (0 0)
1493 19:59:35.919972 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1494 19:59:35.926188 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1495 19:59:35.930030 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1496 19:59:35.932931 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1497 19:59:35.939714 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1498 19:59:35.943346 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1499 19:59:35.946571 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
1500 19:59:35.952922 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1501 19:59:35.956673 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1502 19:59:35.959840 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1503 19:59:35.966495 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1504 19:59:35.969973 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1505 19:59:35.973131 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1506 19:59:35.979768 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1507 19:59:35.983029 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1508 19:59:35.986224 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1509 19:59:35.989793 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1510 19:59:35.996163 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1511 19:59:35.999398 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1512 19:59:36.003182 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1513 19:59:36.009494 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1514 19:59:36.013334 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1515 19:59:36.016500 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1516 19:59:36.023014 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
1517 19:59:36.023222 Total UI for P1: 0, mck2ui 16
1518 19:59:36.030002 best dqsien dly found for B1: ( 0, 14, 4)
1519 19:59:36.033095 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1520 19:59:36.036414 Total UI for P1: 0, mck2ui 16
1521 19:59:36.039614 best dqsien dly found for B0: ( 0, 14, 6)
1522 19:59:36.042900 best DQS0 dly(MCK, UI, PI) = (0, 14, 6)
1523 19:59:36.046688 best DQS1 dly(MCK, UI, PI) = (0, 14, 4)
1524 19:59:36.047065
1525 19:59:36.049829 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 6)
1526 19:59:36.053314 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 4)
1527 19:59:36.056343 [Gating] SW calibration Done
1528 19:59:36.056717 ==
1529 19:59:36.060122 Dram Type= 6, Freq= 0, CH_1, rank 0
1530 19:59:36.063137 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1531 19:59:36.063217 ==
1532 19:59:36.066297 RX Vref Scan: 0
1533 19:59:36.066377
1534 19:59:36.070539 RX Vref 0 -> 0, step: 1
1535 19:59:36.071034
1536 19:59:36.071349 RX Delay -130 -> 252, step: 16
1537 19:59:36.076506 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1538 19:59:36.080150 iDelay=222, Bit 1, Center 85 (-18 ~ 189) 208
1539 19:59:36.083202 iDelay=222, Bit 2, Center 77 (-34 ~ 189) 224
1540 19:59:36.087009 iDelay=222, Bit 3, Center 93 (-18 ~ 205) 224
1541 19:59:36.090193 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1542 19:59:36.096889 iDelay=222, Bit 5, Center 109 (-2 ~ 221) 224
1543 19:59:36.100443 iDelay=222, Bit 6, Center 93 (-18 ~ 205) 224
1544 19:59:36.103271 iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224
1545 19:59:36.106976 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
1546 19:59:36.110018 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
1547 19:59:36.116952 iDelay=222, Bit 10, Center 85 (-18 ~ 189) 208
1548 19:59:36.119989 iDelay=222, Bit 11, Center 85 (-18 ~ 189) 208
1549 19:59:36.123721 iDelay=222, Bit 12, Center 93 (-18 ~ 205) 224
1550 19:59:36.126411 iDelay=222, Bit 13, Center 93 (-18 ~ 205) 224
1551 19:59:36.130257 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
1552 19:59:36.136930 iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224
1553 19:59:36.137025 ==
1554 19:59:36.139896 Dram Type= 6, Freq= 0, CH_1, rank 0
1555 19:59:36.143508 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1556 19:59:36.143589 ==
1557 19:59:36.143662 DQS Delay:
1558 19:59:36.146547 DQS0 = 0, DQS1 = 0
1559 19:59:36.146626 DQM Delay:
1560 19:59:36.150270 DQM0 = 92, DQM1 = 87
1561 19:59:36.150354 DQ Delay:
1562 19:59:36.153185 DQ0 =93, DQ1 =85, DQ2 =77, DQ3 =93
1563 19:59:36.156714 DQ4 =93, DQ5 =109, DQ6 =93, DQ7 =93
1564 19:59:36.159975 DQ8 =77, DQ9 =77, DQ10 =85, DQ11 =85
1565 19:59:36.163222 DQ12 =93, DQ13 =93, DQ14 =93, DQ15 =93
1566 19:59:36.163306
1567 19:59:36.163372
1568 19:59:36.163434 ==
1569 19:59:36.166741 Dram Type= 6, Freq= 0, CH_1, rank 0
1570 19:59:36.169868 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1571 19:59:36.169947 ==
1572 19:59:36.170009
1573 19:59:36.170067
1574 19:59:36.173548 TX Vref Scan disable
1575 19:59:36.176961 == TX Byte 0 ==
1576 19:59:36.180283 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1577 19:59:36.183531 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1578 19:59:36.186907 == TX Byte 1 ==
1579 19:59:36.190338 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1580 19:59:36.193648 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1581 19:59:36.194019 ==
1582 19:59:36.196906 Dram Type= 6, Freq= 0, CH_1, rank 0
1583 19:59:36.200464 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1584 19:59:36.203675 ==
1585 19:59:36.215532 TX Vref=22, minBit 0, minWin=26, winSum=434
1586 19:59:36.219455 TX Vref=24, minBit 1, minWin=27, winSum=440
1587 19:59:36.222736 TX Vref=26, minBit 1, minWin=27, winSum=444
1588 19:59:36.225945 TX Vref=28, minBit 0, minWin=27, winSum=445
1589 19:59:36.228897 TX Vref=30, minBit 1, minWin=27, winSum=446
1590 19:59:36.232435 TX Vref=32, minBit 2, minWin=26, winSum=444
1591 19:59:36.239429 [TxChooseVref] Worse bit 1, Min win 27, Win sum 446, Final Vref 30
1592 19:59:36.240089
1593 19:59:36.242408 Final TX Range 1 Vref 30
1594 19:59:36.242914
1595 19:59:36.243257 ==
1596 19:59:36.245314 Dram Type= 6, Freq= 0, CH_1, rank 0
1597 19:59:36.248761 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1598 19:59:36.249195 ==
1599 19:59:36.249518
1600 19:59:36.249819
1601 19:59:36.252385 TX Vref Scan disable
1602 19:59:36.255774 == TX Byte 0 ==
1603 19:59:36.259683 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1604 19:59:36.262282 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1605 19:59:36.265511 == TX Byte 1 ==
1606 19:59:36.269025 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
1607 19:59:36.272694 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
1608 19:59:36.273203
1609 19:59:36.276022 [DATLAT]
1610 19:59:36.276524 Freq=800, CH1 RK0
1611 19:59:36.276850
1612 19:59:36.278821 DATLAT Default: 0xa
1613 19:59:36.279225 0, 0xFFFF, sum = 0
1614 19:59:36.282879 1, 0xFFFF, sum = 0
1615 19:59:36.283390 2, 0xFFFF, sum = 0
1616 19:59:36.285864 3, 0xFFFF, sum = 0
1617 19:59:36.286381 4, 0xFFFF, sum = 0
1618 19:59:36.288868 5, 0xFFFF, sum = 0
1619 19:59:36.289280 6, 0xFFFF, sum = 0
1620 19:59:36.292768 7, 0xFFFF, sum = 0
1621 19:59:36.293283 8, 0xFFFF, sum = 0
1622 19:59:36.295885 9, 0x0, sum = 1
1623 19:59:36.296406 10, 0x0, sum = 2
1624 19:59:36.299285 11, 0x0, sum = 3
1625 19:59:36.299911 12, 0x0, sum = 4
1626 19:59:36.301951 best_step = 10
1627 19:59:36.302426
1628 19:59:36.302746 ==
1629 19:59:36.305430 Dram Type= 6, Freq= 0, CH_1, rank 0
1630 19:59:36.309259 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1631 19:59:36.309671 ==
1632 19:59:36.312362 RX Vref Scan: 1
1633 19:59:36.312771
1634 19:59:36.313090 Set Vref Range= 32 -> 127
1635 19:59:36.313392
1636 19:59:36.315808 RX Vref 32 -> 127, step: 1
1637 19:59:36.316420
1638 19:59:36.319555 RX Delay -79 -> 252, step: 8
1639 19:59:36.320164
1640 19:59:36.322125 Set Vref, RX VrefLevel [Byte0]: 32
1641 19:59:36.325818 [Byte1]: 32
1642 19:59:36.326297
1643 19:59:36.329032 Set Vref, RX VrefLevel [Byte0]: 33
1644 19:59:36.332308 [Byte1]: 33
1645 19:59:36.335473
1646 19:59:36.336023 Set Vref, RX VrefLevel [Byte0]: 34
1647 19:59:36.339127 [Byte1]: 34
1648 19:59:36.342884
1649 19:59:36.343287 Set Vref, RX VrefLevel [Byte0]: 35
1650 19:59:36.346614 [Byte1]: 35
1651 19:59:36.350432
1652 19:59:36.350859 Set Vref, RX VrefLevel [Byte0]: 36
1653 19:59:36.353763 [Byte1]: 36
1654 19:59:36.358039
1655 19:59:36.358495 Set Vref, RX VrefLevel [Byte0]: 37
1656 19:59:36.361953 [Byte1]: 37
1657 19:59:36.365724
1658 19:59:36.366128 Set Vref, RX VrefLevel [Byte0]: 38
1659 19:59:36.368921 [Byte1]: 38
1660 19:59:36.373337
1661 19:59:36.373742 Set Vref, RX VrefLevel [Byte0]: 39
1662 19:59:36.376071 [Byte1]: 39
1663 19:59:36.380392
1664 19:59:36.380470 Set Vref, RX VrefLevel [Byte0]: 40
1665 19:59:36.383739 [Byte1]: 40
1666 19:59:36.388152
1667 19:59:36.388231 Set Vref, RX VrefLevel [Byte0]: 41
1668 19:59:36.391194 [Byte1]: 41
1669 19:59:36.395290
1670 19:59:36.395368 Set Vref, RX VrefLevel [Byte0]: 42
1671 19:59:36.399015 [Byte1]: 42
1672 19:59:36.403294
1673 19:59:36.403372 Set Vref, RX VrefLevel [Byte0]: 43
1674 19:59:36.406188 [Byte1]: 43
1675 19:59:36.410711
1676 19:59:36.410790 Set Vref, RX VrefLevel [Byte0]: 44
1677 19:59:36.413808 [Byte1]: 44
1678 19:59:36.418176
1679 19:59:36.418282 Set Vref, RX VrefLevel [Byte0]: 45
1680 19:59:36.421394 [Byte1]: 45
1681 19:59:36.425500
1682 19:59:36.425573 Set Vref, RX VrefLevel [Byte0]: 46
1683 19:59:36.428801 [Byte1]: 46
1684 19:59:36.433518
1685 19:59:36.433596 Set Vref, RX VrefLevel [Byte0]: 47
1686 19:59:36.436572 [Byte1]: 47
1687 19:59:36.441007
1688 19:59:36.441097 Set Vref, RX VrefLevel [Byte0]: 48
1689 19:59:36.444077 [Byte1]: 48
1690 19:59:36.448631
1691 19:59:36.449065 Set Vref, RX VrefLevel [Byte0]: 49
1692 19:59:36.451746 [Byte1]: 49
1693 19:59:36.456117
1694 19:59:36.456484 Set Vref, RX VrefLevel [Byte0]: 50
1695 19:59:36.459695 [Byte1]: 50
1696 19:59:36.463619
1697 19:59:36.464040 Set Vref, RX VrefLevel [Byte0]: 51
1698 19:59:36.467126 [Byte1]: 51
1699 19:59:36.471130
1700 19:59:36.471496 Set Vref, RX VrefLevel [Byte0]: 52
1701 19:59:36.475094 [Byte1]: 52
1702 19:59:36.478898
1703 19:59:36.479269 Set Vref, RX VrefLevel [Byte0]: 53
1704 19:59:36.482156 [Byte1]: 53
1705 19:59:36.486461
1706 19:59:36.489310 Set Vref, RX VrefLevel [Byte0]: 54
1707 19:59:36.489389 [Byte1]: 54
1708 19:59:36.493792
1709 19:59:36.493870 Set Vref, RX VrefLevel [Byte0]: 55
1710 19:59:36.497037 [Byte1]: 55
1711 19:59:36.501398
1712 19:59:36.501768 Set Vref, RX VrefLevel [Byte0]: 56
1713 19:59:36.504607 [Byte1]: 56
1714 19:59:36.509024
1715 19:59:36.509458 Set Vref, RX VrefLevel [Byte0]: 57
1716 19:59:36.512704 [Byte1]: 57
1717 19:59:36.516995
1718 19:59:36.517361 Set Vref, RX VrefLevel [Byte0]: 58
1719 19:59:36.519685 [Byte1]: 58
1720 19:59:36.523861
1721 19:59:36.524229 Set Vref, RX VrefLevel [Byte0]: 59
1722 19:59:36.527303 [Byte1]: 59
1723 19:59:36.531509
1724 19:59:36.531957 Set Vref, RX VrefLevel [Byte0]: 60
1725 19:59:36.535041 [Byte1]: 60
1726 19:59:36.538964
1727 19:59:36.539476 Set Vref, RX VrefLevel [Byte0]: 61
1728 19:59:36.542736 [Byte1]: 61
1729 19:59:36.547023
1730 19:59:36.547149 Set Vref, RX VrefLevel [Byte0]: 62
1731 19:59:36.549781 [Byte1]: 62
1732 19:59:36.553976
1733 19:59:36.554055 Set Vref, RX VrefLevel [Byte0]: 63
1734 19:59:36.557331 [Byte1]: 63
1735 19:59:36.561652
1736 19:59:36.561731 Set Vref, RX VrefLevel [Byte0]: 64
1737 19:59:36.564772 [Byte1]: 64
1738 19:59:36.568936
1739 19:59:36.569014 Set Vref, RX VrefLevel [Byte0]: 65
1740 19:59:36.572541 [Byte1]: 65
1741 19:59:36.576896
1742 19:59:36.577271 Set Vref, RX VrefLevel [Byte0]: 66
1743 19:59:36.580764 [Byte1]: 66
1744 19:59:36.584506
1745 19:59:36.584885 Set Vref, RX VrefLevel [Byte0]: 67
1746 19:59:36.587749 [Byte1]: 67
1747 19:59:36.591772
1748 19:59:36.591852 Set Vref, RX VrefLevel [Byte0]: 68
1749 19:59:36.595037 [Byte1]: 68
1750 19:59:36.599373
1751 19:59:36.599487 Set Vref, RX VrefLevel [Byte0]: 69
1752 19:59:36.602695 [Byte1]: 69
1753 19:59:36.607062
1754 19:59:36.607195 Set Vref, RX VrefLevel [Byte0]: 70
1755 19:59:36.610450 [Byte1]: 70
1756 19:59:36.614489
1757 19:59:36.614894 Set Vref, RX VrefLevel [Byte0]: 71
1758 19:59:36.618291 [Byte1]: 71
1759 19:59:36.622277
1760 19:59:36.622700 Set Vref, RX VrefLevel [Byte0]: 72
1761 19:59:36.625543 [Byte1]: 72
1762 19:59:36.629708
1763 19:59:36.630092 Final RX Vref Byte 0 = 57 to rank0
1764 19:59:36.633226 Final RX Vref Byte 1 = 58 to rank0
1765 19:59:36.636484 Final RX Vref Byte 0 = 57 to rank1
1766 19:59:36.639837 Final RX Vref Byte 1 = 58 to rank1==
1767 19:59:36.643304 Dram Type= 6, Freq= 0, CH_1, rank 0
1768 19:59:36.649949 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1769 19:59:36.650484 ==
1770 19:59:36.650942 DQS Delay:
1771 19:59:36.651392 DQS0 = 0, DQS1 = 0
1772 19:59:36.653554 DQM Delay:
1773 19:59:36.654024 DQM0 = 95, DQM1 = 89
1774 19:59:36.656823 DQ Delay:
1775 19:59:36.659778 DQ0 =96, DQ1 =88, DQ2 =84, DQ3 =92
1776 19:59:36.663516 DQ4 =92, DQ5 =108, DQ6 =108, DQ7 =92
1777 19:59:36.663983 DQ8 =80, DQ9 =80, DQ10 =88, DQ11 =84
1778 19:59:36.666681 DQ12 =96, DQ13 =96, DQ14 =96, DQ15 =96
1779 19:59:36.669974
1780 19:59:36.670349
1781 19:59:36.676661 [DQSOSCAuto] RK0, (LSB)MR18= 0x2e49, (MSB)MR19= 0x606, tDQSOscB0 = 391 ps tDQSOscB1 = 398 ps
1782 19:59:36.680142 CH1 RK0: MR19=606, MR18=2E49
1783 19:59:36.686752 CH1_RK0: MR19=0x606, MR18=0x2E49, DQSOSC=391, MR23=63, INC=96, DEC=64
1784 19:59:36.687133
1785 19:59:36.689897 ----->DramcWriteLeveling(PI) begin...
1786 19:59:36.690283 ==
1787 19:59:36.693026 Dram Type= 6, Freq= 0, CH_1, rank 1
1788 19:59:36.696185 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1789 19:59:36.696590 ==
1790 19:59:36.700023 Write leveling (Byte 0): 26 => 26
1791 19:59:36.703225 Write leveling (Byte 1): 31 => 31
1792 19:59:36.706374 DramcWriteLeveling(PI) end<-----
1793 19:59:36.706756
1794 19:59:36.707101 ==
1795 19:59:36.710258 Dram Type= 6, Freq= 0, CH_1, rank 1
1796 19:59:36.713412 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1797 19:59:36.713844 ==
1798 19:59:36.716596 [Gating] SW mode calibration
1799 19:59:36.723534 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1800 19:59:36.729845 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1801 19:59:36.733240 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1802 19:59:36.736378 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1803 19:59:36.743159 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1804 19:59:36.746893 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1805 19:59:36.749651 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1806 19:59:36.756401 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1807 19:59:36.759690 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1808 19:59:36.763293 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1809 19:59:36.769555 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1810 19:59:36.773326 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1811 19:59:36.777370 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1812 19:59:36.783147 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1813 19:59:36.786640 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1814 19:59:36.790245 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1815 19:59:36.796440 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1816 19:59:36.800521 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1817 19:59:36.803242 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 0)
1818 19:59:36.806475 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)
1819 19:59:36.813455 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1820 19:59:36.816853 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1821 19:59:36.820115 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1822 19:59:36.826515 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1823 19:59:36.829620 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1824 19:59:36.833564 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1825 19:59:36.839773 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1826 19:59:36.843455 0 9 4 | B1->B0 | 2c2c 2322 | 0 1 | (0 0) (0 0)
1827 19:59:36.846861 0 9 8 | B1->B0 | 3434 3232 | 1 0 | (1 1) (0 0)
1828 19:59:36.853777 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1829 19:59:36.857066 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1830 19:59:36.860627 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1831 19:59:36.866946 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1832 19:59:36.870088 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1833 19:59:36.873748 0 10 0 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
1834 19:59:36.876706 0 10 4 | B1->B0 | 2b2b 3232 | 0 0 | (1 0) (0 1)
1835 19:59:36.883415 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1836 19:59:36.887189 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1837 19:59:36.890571 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1838 19:59:36.896627 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1839 19:59:36.900564 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1840 19:59:36.903599 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1841 19:59:36.910497 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1842 19:59:36.913881 0 11 4 | B1->B0 | 3c3c 2b2b | 0 1 | (0 0) (0 0)
1843 19:59:36.917103 0 11 8 | B1->B0 | 4646 4545 | 0 0 | (0 0) (0 0)
1844 19:59:36.923775 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1845 19:59:36.926310 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1846 19:59:36.930352 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1847 19:59:36.936626 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1848 19:59:36.939955 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1849 19:59:36.943816 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1850 19:59:36.949962 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1851 19:59:36.953203 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1852 19:59:36.956894 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1853 19:59:36.963342 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1854 19:59:36.966601 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1855 19:59:36.970206 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1856 19:59:36.973458 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1857 19:59:36.980305 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1858 19:59:36.983729 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1859 19:59:36.987191 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1860 19:59:36.993706 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1861 19:59:36.997022 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1862 19:59:37.000593 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1863 19:59:37.006742 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1864 19:59:37.010327 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1865 19:59:37.013733 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1866 19:59:37.020094 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1867 19:59:37.023177 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1868 19:59:37.027120 Total UI for P1: 0, mck2ui 16
1869 19:59:37.030240 best dqsien dly found for B0: ( 0, 14, 4)
1870 19:59:37.033581 Total UI for P1: 0, mck2ui 16
1871 19:59:37.036672 best dqsien dly found for B1: ( 0, 14, 4)
1872 19:59:37.040524 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
1873 19:59:37.043672 best DQS1 dly(MCK, UI, PI) = (0, 14, 4)
1874 19:59:37.044069
1875 19:59:37.046803 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
1876 19:59:37.049978 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 4)
1877 19:59:37.053177 [Gating] SW calibration Done
1878 19:59:37.053637 ==
1879 19:59:37.057060 Dram Type= 6, Freq= 0, CH_1, rank 1
1880 19:59:37.060169 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1881 19:59:37.060751 ==
1882 19:59:37.063328 RX Vref Scan: 0
1883 19:59:37.063791
1884 19:59:37.066709 RX Vref 0 -> 0, step: 1
1885 19:59:37.067217
1886 19:59:37.067550 RX Delay -130 -> 252, step: 16
1887 19:59:37.073305 iDelay=222, Bit 0, Center 101 (-2 ~ 205) 208
1888 19:59:37.076868 iDelay=222, Bit 1, Center 93 (-2 ~ 189) 192
1889 19:59:37.080103 iDelay=222, Bit 2, Center 77 (-34 ~ 189) 224
1890 19:59:37.083561 iDelay=222, Bit 3, Center 93 (-2 ~ 189) 192
1891 19:59:37.086680 iDelay=222, Bit 4, Center 93 (-2 ~ 189) 192
1892 19:59:37.093523 iDelay=222, Bit 5, Center 109 (-2 ~ 221) 224
1893 19:59:37.096639 iDelay=222, Bit 6, Center 101 (-2 ~ 205) 208
1894 19:59:37.099923 iDelay=222, Bit 7, Center 101 (-2 ~ 205) 208
1895 19:59:37.103382 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
1896 19:59:37.106718 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
1897 19:59:37.110352 iDelay=222, Bit 10, Center 93 (-2 ~ 189) 192
1898 19:59:37.116622 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
1899 19:59:37.120422 iDelay=222, Bit 12, Center 101 (-2 ~ 205) 208
1900 19:59:37.123442 iDelay=222, Bit 13, Center 101 (-2 ~ 205) 208
1901 19:59:37.126741 iDelay=222, Bit 14, Center 101 (-2 ~ 205) 208
1902 19:59:37.133467 iDelay=222, Bit 15, Center 101 (-2 ~ 205) 208
1903 19:59:37.134027 ==
1904 19:59:37.136707 Dram Type= 6, Freq= 0, CH_1, rank 1
1905 19:59:37.140350 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1906 19:59:37.140905 ==
1907 19:59:37.141296 DQS Delay:
1908 19:59:37.143495 DQS0 = 0, DQS1 = 0
1909 19:59:37.144124 DQM Delay:
1910 19:59:37.146616 DQM0 = 96, DQM1 = 91
1911 19:59:37.147171 DQ Delay:
1912 19:59:37.150537 DQ0 =101, DQ1 =93, DQ2 =77, DQ3 =93
1913 19:59:37.153691 DQ4 =93, DQ5 =109, DQ6 =101, DQ7 =101
1914 19:59:37.156878 DQ8 =77, DQ9 =77, DQ10 =93, DQ11 =77
1915 19:59:37.159993 DQ12 =101, DQ13 =101, DQ14 =101, DQ15 =101
1916 19:59:37.160447
1917 19:59:37.160832
1918 19:59:37.161189 ==
1919 19:59:37.163189 Dram Type= 6, Freq= 0, CH_1, rank 1
1920 19:59:37.166971 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1921 19:59:37.170158 ==
1922 19:59:37.170571
1923 19:59:37.170901
1924 19:59:37.171207 TX Vref Scan disable
1925 19:59:37.173829 == TX Byte 0 ==
1926 19:59:37.176824 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1927 19:59:37.179938 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1928 19:59:37.183755 == TX Byte 1 ==
1929 19:59:37.186766 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1930 19:59:37.190228 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1931 19:59:37.190790 ==
1932 19:59:37.193481 Dram Type= 6, Freq= 0, CH_1, rank 1
1933 19:59:37.200199 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1934 19:59:37.200668 ==
1935 19:59:37.212509 TX Vref=22, minBit 1, minWin=26, winSum=439
1936 19:59:37.216207 TX Vref=24, minBit 1, minWin=26, winSum=444
1937 19:59:37.219363 TX Vref=26, minBit 0, minWin=27, winSum=445
1938 19:59:37.222323 TX Vref=28, minBit 1, minWin=27, winSum=446
1939 19:59:37.225930 TX Vref=30, minBit 2, minWin=27, winSum=450
1940 19:59:37.229277 TX Vref=32, minBit 0, minWin=27, winSum=447
1941 19:59:37.235749 [TxChooseVref] Worse bit 2, Min win 27, Win sum 450, Final Vref 30
1942 19:59:37.236168
1943 19:59:37.239218 Final TX Range 1 Vref 30
1944 19:59:37.239630
1945 19:59:37.240002 ==
1946 19:59:37.242549 Dram Type= 6, Freq= 0, CH_1, rank 1
1947 19:59:37.246133 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1948 19:59:37.246548 ==
1949 19:59:37.246877
1950 19:59:37.247196
1951 19:59:37.249659 TX Vref Scan disable
1952 19:59:37.252852 == TX Byte 0 ==
1953 19:59:37.256131 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1954 19:59:37.259270 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1955 19:59:37.262639 == TX Byte 1 ==
1956 19:59:37.266365 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1957 19:59:37.269214 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1958 19:59:37.269631
1959 19:59:37.272852 [DATLAT]
1960 19:59:37.273263 Freq=800, CH1 RK1
1961 19:59:37.273593
1962 19:59:37.276351 DATLAT Default: 0xa
1963 19:59:37.276765 0, 0xFFFF, sum = 0
1964 19:59:37.279271 1, 0xFFFF, sum = 0
1965 19:59:37.279722 2, 0xFFFF, sum = 0
1966 19:59:37.283239 3, 0xFFFF, sum = 0
1967 19:59:37.283793 4, 0xFFFF, sum = 0
1968 19:59:37.286174 5, 0xFFFF, sum = 0
1969 19:59:37.286591 6, 0xFFFF, sum = 0
1970 19:59:37.289807 7, 0xFFFF, sum = 0
1971 19:59:37.290227 8, 0xFFFF, sum = 0
1972 19:59:37.292880 9, 0x0, sum = 1
1973 19:59:37.293301 10, 0x0, sum = 2
1974 19:59:37.296007 11, 0x0, sum = 3
1975 19:59:37.296437 12, 0x0, sum = 4
1976 19:59:37.299541 best_step = 10
1977 19:59:37.300030
1978 19:59:37.300408 ==
1979 19:59:37.302554 Dram Type= 6, Freq= 0, CH_1, rank 1
1980 19:59:37.305909 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1981 19:59:37.306482 ==
1982 19:59:37.309452 RX Vref Scan: 0
1983 19:59:37.310015
1984 19:59:37.310514 RX Vref 0 -> 0, step: 1
1985 19:59:37.310936
1986 19:59:37.313025 RX Delay -79 -> 252, step: 8
1987 19:59:37.316518 iDelay=209, Bit 0, Center 104 (9 ~ 200) 192
1988 19:59:37.322889 iDelay=209, Bit 1, Center 92 (-7 ~ 192) 200
1989 19:59:37.326413 iDelay=209, Bit 2, Center 84 (-15 ~ 184) 200
1990 19:59:37.329532 iDelay=209, Bit 3, Center 92 (-7 ~ 192) 200
1991 19:59:37.333111 iDelay=209, Bit 4, Center 92 (-7 ~ 192) 200
1992 19:59:37.336691 iDelay=209, Bit 5, Center 108 (9 ~ 208) 200
1993 19:59:37.339528 iDelay=209, Bit 6, Center 108 (9 ~ 208) 200
1994 19:59:37.346458 iDelay=209, Bit 7, Center 96 (-7 ~ 200) 208
1995 19:59:37.349705 iDelay=209, Bit 8, Center 80 (-23 ~ 184) 208
1996 19:59:37.353517 iDelay=209, Bit 9, Center 80 (-23 ~ 184) 208
1997 19:59:37.356362 iDelay=209, Bit 10, Center 92 (-7 ~ 192) 200
1998 19:59:37.359633 iDelay=209, Bit 11, Center 88 (-15 ~ 192) 208
1999 19:59:37.366294 iDelay=209, Bit 12, Center 100 (-7 ~ 208) 216
2000 19:59:37.370009 iDelay=209, Bit 13, Center 96 (-7 ~ 200) 208
2001 19:59:37.373369 iDelay=209, Bit 14, Center 96 (-7 ~ 200) 208
2002 19:59:37.376570 iDelay=209, Bit 15, Center 96 (-7 ~ 200) 208
2003 19:59:37.376990 ==
2004 19:59:37.379631 Dram Type= 6, Freq= 0, CH_1, rank 1
2005 19:59:37.383466 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2006 19:59:37.386521 ==
2007 19:59:37.386933 DQS Delay:
2008 19:59:37.387262 DQS0 = 0, DQS1 = 0
2009 19:59:37.389739 DQM Delay:
2010 19:59:37.390151 DQM0 = 97, DQM1 = 91
2011 19:59:37.393537 DQ Delay:
2012 19:59:37.396734 DQ0 =104, DQ1 =92, DQ2 =84, DQ3 =92
2013 19:59:37.400270 DQ4 =92, DQ5 =108, DQ6 =108, DQ7 =96
2014 19:59:37.403432 DQ8 =80, DQ9 =80, DQ10 =92, DQ11 =88
2015 19:59:37.406681 DQ12 =100, DQ13 =96, DQ14 =96, DQ15 =96
2016 19:59:37.407096
2017 19:59:37.407422
2018 19:59:37.413272 [DQSOSCAuto] RK1, (LSB)MR18= 0x430d, (MSB)MR19= 0x606, tDQSOscB0 = 406 ps tDQSOscB1 = 393 ps
2019 19:59:37.416194 CH1 RK1: MR19=606, MR18=430D
2020 19:59:37.423419 CH1_RK1: MR19=0x606, MR18=0x430D, DQSOSC=393, MR23=63, INC=95, DEC=63
2021 19:59:37.426623 [RxdqsGatingPostProcess] freq 800
2022 19:59:37.429674 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
2023 19:59:37.433036 Pre-setting of DQS Precalculation
2024 19:59:37.440052 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
2025 19:59:37.446016 sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4
2026 19:59:37.453410 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
2027 19:59:37.453964
2028 19:59:37.454300
2029 19:59:37.456480 [Calibration Summary] 1600 Mbps
2030 19:59:37.456892 CH 0, Rank 0
2031 19:59:37.459665 SW Impedance : PASS
2032 19:59:37.463106 DUTY Scan : NO K
2033 19:59:37.463621 ZQ Calibration : PASS
2034 19:59:37.466579 Jitter Meter : NO K
2035 19:59:37.469475 CBT Training : PASS
2036 19:59:37.469917 Write leveling : PASS
2037 19:59:37.473455 RX DQS gating : PASS
2038 19:59:37.476080 RX DQ/DQS(RDDQC) : PASS
2039 19:59:37.476496 TX DQ/DQS : PASS
2040 19:59:37.480047 RX DATLAT : PASS
2041 19:59:37.480566 RX DQ/DQS(Engine): PASS
2042 19:59:37.483317 TX OE : NO K
2043 19:59:37.483862 All Pass.
2044 19:59:37.484193
2045 19:59:37.486490 CH 0, Rank 1
2046 19:59:37.487005 SW Impedance : PASS
2047 19:59:37.490166 DUTY Scan : NO K
2048 19:59:37.493307 ZQ Calibration : PASS
2049 19:59:37.493826 Jitter Meter : NO K
2050 19:59:37.496296 CBT Training : PASS
2051 19:59:37.499806 Write leveling : PASS
2052 19:59:37.500316 RX DQS gating : PASS
2053 19:59:37.503006 RX DQ/DQS(RDDQC) : PASS
2054 19:59:37.506239 TX DQ/DQS : PASS
2055 19:59:37.506659 RX DATLAT : PASS
2056 19:59:37.509459 RX DQ/DQS(Engine): PASS
2057 19:59:37.513520 TX OE : NO K
2058 19:59:37.514042 All Pass.
2059 19:59:37.514372
2060 19:59:37.514680 CH 1, Rank 0
2061 19:59:37.516346 SW Impedance : PASS
2062 19:59:37.519476 DUTY Scan : NO K
2063 19:59:37.519928 ZQ Calibration : PASS
2064 19:59:37.522843 Jitter Meter : NO K
2065 19:59:37.523377 CBT Training : PASS
2066 19:59:37.526630 Write leveling : PASS
2067 19:59:37.529423 RX DQS gating : PASS
2068 19:59:37.529878 RX DQ/DQS(RDDQC) : PASS
2069 19:59:37.533156 TX DQ/DQS : PASS
2070 19:59:37.536074 RX DATLAT : PASS
2071 19:59:37.536487 RX DQ/DQS(Engine): PASS
2072 19:59:37.539615 TX OE : NO K
2073 19:59:37.540065 All Pass.
2074 19:59:37.540394
2075 19:59:37.542948 CH 1, Rank 1
2076 19:59:37.543362 SW Impedance : PASS
2077 19:59:37.546519 DUTY Scan : NO K
2078 19:59:37.549824 ZQ Calibration : PASS
2079 19:59:37.550238 Jitter Meter : NO K
2080 19:59:37.552934 CBT Training : PASS
2081 19:59:37.556625 Write leveling : PASS
2082 19:59:37.557072 RX DQS gating : PASS
2083 19:59:37.559819 RX DQ/DQS(RDDQC) : PASS
2084 19:59:37.563009 TX DQ/DQS : PASS
2085 19:59:37.563434 RX DATLAT : PASS
2086 19:59:37.566136 RX DQ/DQS(Engine): PASS
2087 19:59:37.566578 TX OE : NO K
2088 19:59:37.569644 All Pass.
2089 19:59:37.570074
2090 19:59:37.570462 DramC Write-DBI off
2091 19:59:37.572913 PER_BANK_REFRESH: Hybrid Mode
2092 19:59:37.576520 TX_TRACKING: ON
2093 19:59:37.579896 [GetDramInforAfterCalByMRR] Vendor 6.
2094 19:59:37.582875 [GetDramInforAfterCalByMRR] Revision 606.
2095 19:59:37.586704 [GetDramInforAfterCalByMRR] Revision 2 0.
2096 19:59:37.587168 MR0 0x3b3b
2097 19:59:37.587603 MR8 0x5151
2098 19:59:37.593291 RK0, DieNum 2, Density 16Gb, RKsize 32Gb.
2099 19:59:37.593754
2100 19:59:37.594146 MR0 0x3b3b
2101 19:59:37.594488 MR8 0x5151
2102 19:59:37.596372 RK1, DieNum 2, Density 16Gb, RKsize 32Gb.
2103 19:59:37.596842
2104 19:59:37.606447 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
2105 19:59:37.609645 [FAST_K] Save calibration result to emmc
2106 19:59:37.613185 [FAST_K] Save calibration result to emmc
2107 19:59:37.616301 dram_init: config_dvfs: 1
2108 19:59:37.619471 dramc_set_vcore_voltage set vcore to 662500
2109 19:59:37.623421 Read voltage for 1200, 2
2110 19:59:37.623886 Vio18 = 0
2111 19:59:37.624220 Vcore = 662500
2112 19:59:37.626474 Vdram = 0
2113 19:59:37.626888 Vddq = 0
2114 19:59:37.627214 Vmddr = 0
2115 19:59:37.632962 [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0
2116 19:59:37.636395 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
2117 19:59:37.639770 MEM_TYPE=3, freq_sel=15
2118 19:59:37.642959 sv_algorithm_assistance_LP4_1600
2119 19:59:37.646524 ============ PULL DRAM RESETB DOWN ============
2120 19:59:37.649861 ========== PULL DRAM RESETB DOWN end =========
2121 19:59:37.656464 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2122 19:59:37.659952 ===================================
2123 19:59:37.660367 LPDDR4 DRAM CONFIGURATION
2124 19:59:37.663058 ===================================
2125 19:59:37.666477 EX_ROW_EN[0] = 0x0
2126 19:59:37.669732 EX_ROW_EN[1] = 0x0
2127 19:59:37.670280 LP4Y_EN = 0x0
2128 19:59:37.673387 WORK_FSP = 0x0
2129 19:59:37.673797 WL = 0x4
2130 19:59:37.676602 RL = 0x4
2131 19:59:37.677121 BL = 0x2
2132 19:59:37.680234 RPST = 0x0
2133 19:59:37.680670 RD_PRE = 0x0
2134 19:59:37.683376 WR_PRE = 0x1
2135 19:59:37.683924 WR_PST = 0x0
2136 19:59:37.686430 DBI_WR = 0x0
2137 19:59:37.686965 DBI_RD = 0x0
2138 19:59:37.690034 OTF = 0x1
2139 19:59:37.693485 ===================================
2140 19:59:37.696543 ===================================
2141 19:59:37.696978 ANA top config
2142 19:59:37.700029 ===================================
2143 19:59:37.703334 DLL_ASYNC_EN = 0
2144 19:59:37.706817 ALL_SLAVE_EN = 0
2145 19:59:37.707437 NEW_RANK_MODE = 1
2146 19:59:37.709762 DLL_IDLE_MODE = 1
2147 19:59:37.713051 LP45_APHY_COMB_EN = 1
2148 19:59:37.716806 TX_ODT_DIS = 1
2149 19:59:37.719892 NEW_8X_MODE = 1
2150 19:59:37.723716 ===================================
2151 19:59:37.726821 ===================================
2152 19:59:37.727233 data_rate = 2400
2153 19:59:37.730315 CKR = 1
2154 19:59:37.733145 DQ_P2S_RATIO = 8
2155 19:59:37.736719 ===================================
2156 19:59:37.740274 CA_P2S_RATIO = 8
2157 19:59:37.743929 DQ_CA_OPEN = 0
2158 19:59:37.747016 DQ_SEMI_OPEN = 0
2159 19:59:37.747530 CA_SEMI_OPEN = 0
2160 19:59:37.749925 CA_FULL_RATE = 0
2161 19:59:37.754034 DQ_CKDIV4_EN = 0
2162 19:59:37.756834 CA_CKDIV4_EN = 0
2163 19:59:37.760379 CA_PREDIV_EN = 0
2164 19:59:37.763458 PH8_DLY = 17
2165 19:59:37.764060 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
2166 19:59:37.767099 DQ_AAMCK_DIV = 4
2167 19:59:37.770091 CA_AAMCK_DIV = 4
2168 19:59:37.773353 CA_ADMCK_DIV = 4
2169 19:59:37.776988 DQ_TRACK_CA_EN = 0
2170 19:59:37.780466 CA_PICK = 1200
2171 19:59:37.781140 CA_MCKIO = 1200
2172 19:59:37.783598 MCKIO_SEMI = 0
2173 19:59:37.787384 PLL_FREQ = 2366
2174 19:59:37.790389 DQ_UI_PI_RATIO = 32
2175 19:59:37.793429 CA_UI_PI_RATIO = 0
2176 19:59:37.797251 ===================================
2177 19:59:37.800149 ===================================
2178 19:59:37.800565 memory_type:LPDDR4
2179 19:59:37.804342 GP_NUM : 10
2180 19:59:37.807078 SRAM_EN : 1
2181 19:59:37.807621 MD32_EN : 0
2182 19:59:37.811078 ===================================
2183 19:59:37.813763 [ANA_INIT] >>>>>>>>>>>>>>
2184 19:59:37.817231 <<<<<< [CONFIGURE PHASE]: ANA_TX
2185 19:59:37.820618 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
2186 19:59:37.823869 ===================================
2187 19:59:37.827180 data_rate = 2400,PCW = 0X5b00
2188 19:59:37.830951 ===================================
2189 19:59:37.833818 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
2190 19:59:37.837103 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2191 19:59:37.843891 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2192 19:59:37.847531 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
2193 19:59:37.850490 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
2194 19:59:37.854397 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
2195 19:59:37.857214 [ANA_INIT] flow start
2196 19:59:37.861355 [ANA_INIT] PLL >>>>>>>>
2197 19:59:37.861875 [ANA_INIT] PLL <<<<<<<<
2198 19:59:37.864183 [ANA_INIT] MIDPI >>>>>>>>
2199 19:59:37.867618 [ANA_INIT] MIDPI <<<<<<<<
2200 19:59:37.868170 [ANA_INIT] DLL >>>>>>>>
2201 19:59:37.871273 [ANA_INIT] DLL <<<<<<<<
2202 19:59:37.874537 [ANA_INIT] flow end
2203 19:59:37.877871 ============ LP4 DIFF to SE enter ============
2204 19:59:37.881331 ============ LP4 DIFF to SE exit ============
2205 19:59:37.884050 [ANA_INIT] <<<<<<<<<<<<<
2206 19:59:37.887798 [Flow] Enable top DCM control >>>>>
2207 19:59:37.891537 [Flow] Enable top DCM control <<<<<
2208 19:59:37.894566 Enable DLL master slave shuffle
2209 19:59:37.898143 ==============================================================
2210 19:59:37.900884 Gating Mode config
2211 19:59:37.907913 ==============================================================
2212 19:59:37.908615 Config description:
2213 19:59:37.918355 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
2214 19:59:37.925133 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
2215 19:59:37.927999 SELPH_MODE 0: By rank 1: By Phase
2216 19:59:37.934835 ==============================================================
2217 19:59:37.937844 GAT_TRACK_EN = 1
2218 19:59:37.940992 RX_GATING_MODE = 2
2219 19:59:37.944738 RX_GATING_TRACK_MODE = 2
2220 19:59:37.948274 SELPH_MODE = 1
2221 19:59:37.948698 PICG_EARLY_EN = 1
2222 19:59:37.951070 VALID_LAT_VALUE = 1
2223 19:59:37.958046 ==============================================================
2224 19:59:37.961196 Enter into Gating configuration >>>>
2225 19:59:37.964608 Exit from Gating configuration <<<<
2226 19:59:37.968611 Enter into DVFS_PRE_config >>>>>
2227 19:59:37.978259 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
2228 19:59:37.982121 Exit from DVFS_PRE_config <<<<<
2229 19:59:37.985099 Enter into PICG configuration >>>>
2230 19:59:37.987967 Exit from PICG configuration <<<<
2231 19:59:37.991978 [RX_INPUT] configuration >>>>>
2232 19:59:37.995002 [RX_INPUT] configuration <<<<<
2233 19:59:37.998812 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
2234 19:59:38.005256 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
2235 19:59:38.011255 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
2236 19:59:38.018594 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
2237 19:59:38.021731 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
2238 19:59:38.028326 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
2239 19:59:38.032280 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
2240 19:59:38.038569 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
2241 19:59:38.041531 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
2242 19:59:38.045163 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
2243 19:59:38.048112 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
2244 19:59:38.055090 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2245 19:59:38.058476 ===================================
2246 19:59:38.058983 LPDDR4 DRAM CONFIGURATION
2247 19:59:38.061792 ===================================
2248 19:59:38.065089 EX_ROW_EN[0] = 0x0
2249 19:59:38.068142 EX_ROW_EN[1] = 0x0
2250 19:59:38.068741 LP4Y_EN = 0x0
2251 19:59:38.071950 WORK_FSP = 0x0
2252 19:59:38.072365 WL = 0x4
2253 19:59:38.075359 RL = 0x4
2254 19:59:38.075894 BL = 0x2
2255 19:59:38.079101 RPST = 0x0
2256 19:59:38.079609 RD_PRE = 0x0
2257 19:59:38.082044 WR_PRE = 0x1
2258 19:59:38.082563 WR_PST = 0x0
2259 19:59:38.084993 DBI_WR = 0x0
2260 19:59:38.085408 DBI_RD = 0x0
2261 19:59:38.088198 OTF = 0x1
2262 19:59:38.092368 ===================================
2263 19:59:38.095194 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
2264 19:59:38.098693 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
2265 19:59:38.105657 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2266 19:59:38.108474 ===================================
2267 19:59:38.109065 LPDDR4 DRAM CONFIGURATION
2268 19:59:38.112148 ===================================
2269 19:59:38.115252 EX_ROW_EN[0] = 0x10
2270 19:59:38.115693 EX_ROW_EN[1] = 0x0
2271 19:59:38.118783 LP4Y_EN = 0x0
2272 19:59:38.119300 WORK_FSP = 0x0
2273 19:59:38.121948 WL = 0x4
2274 19:59:38.125602 RL = 0x4
2275 19:59:38.126123 BL = 0x2
2276 19:59:38.128725 RPST = 0x0
2277 19:59:38.129137 RD_PRE = 0x0
2278 19:59:38.131883 WR_PRE = 0x1
2279 19:59:38.132295 WR_PST = 0x0
2280 19:59:38.135486 DBI_WR = 0x0
2281 19:59:38.135935 DBI_RD = 0x0
2282 19:59:38.138831 OTF = 0x1
2283 19:59:38.142001 ===================================
2284 19:59:38.145197 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
2285 19:59:38.148267 ==
2286 19:59:38.148691 Dram Type= 6, Freq= 0, CH_0, rank 0
2287 19:59:38.155662 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2288 19:59:38.156177 ==
2289 19:59:38.156509 [Duty_Offset_Calibration]
2290 19:59:38.158417 B0:2 B1:1 CA:1
2291 19:59:38.158831
2292 19:59:38.162113 [DutyScan_Calibration_Flow] k_type=0
2293 19:59:38.171401
2294 19:59:38.171840 ==CLK 0==
2295 19:59:38.174474 Final CLK duty delay cell = 0
2296 19:59:38.177857 [0] MAX Duty = 5156%(X100), DQS PI = 22
2297 19:59:38.181094 [0] MIN Duty = 4875%(X100), DQS PI = 0
2298 19:59:38.181388 [0] AVG Duty = 5015%(X100)
2299 19:59:38.181617
2300 19:59:38.184214 CH0 CLK Duty spec in!! Max-Min= 281%
2301 19:59:38.191607 [DutyScan_Calibration_Flow] ====Done====
2302 19:59:38.192019
2303 19:59:38.194877 [DutyScan_Calibration_Flow] k_type=1
2304 19:59:38.208919
2305 19:59:38.209381 ==DQS 0 ==
2306 19:59:38.212107 Final DQS duty delay cell = -4
2307 19:59:38.215739 [-4] MAX Duty = 5124%(X100), DQS PI = 22
2308 19:59:38.218893 [-4] MIN Duty = 4751%(X100), DQS PI = 0
2309 19:59:38.222469 [-4] AVG Duty = 4937%(X100)
2310 19:59:38.222971
2311 19:59:38.223298 ==DQS 1 ==
2312 19:59:38.226211 Final DQS duty delay cell = -4
2313 19:59:38.229402 [-4] MAX Duty = 5000%(X100), DQS PI = 62
2314 19:59:38.232486 [-4] MIN Duty = 4844%(X100), DQS PI = 32
2315 19:59:38.235886 [-4] AVG Duty = 4922%(X100)
2316 19:59:38.236386
2317 19:59:38.239410 CH0 DQS 0 Duty spec in!! Max-Min= 373%
2318 19:59:38.240014
2319 19:59:38.242170 CH0 DQS 1 Duty spec in!! Max-Min= 156%
2320 19:59:38.246007 [DutyScan_Calibration_Flow] ====Done====
2321 19:59:38.246514
2322 19:59:38.248724 [DutyScan_Calibration_Flow] k_type=3
2323 19:59:38.266887
2324 19:59:38.267385 ==DQM 0 ==
2325 19:59:38.269441 Final DQM duty delay cell = 0
2326 19:59:38.273472 [0] MAX Duty = 5156%(X100), DQS PI = 30
2327 19:59:38.276691 [0] MIN Duty = 4906%(X100), DQS PI = 50
2328 19:59:38.277195 [0] AVG Duty = 5031%(X100)
2329 19:59:38.280023
2330 19:59:38.280521 ==DQM 1 ==
2331 19:59:38.283210 Final DQM duty delay cell = 0
2332 19:59:38.286430 [0] MAX Duty = 5156%(X100), DQS PI = 58
2333 19:59:38.289296 [0] MIN Duty = 5031%(X100), DQS PI = 18
2334 19:59:38.289704 [0] AVG Duty = 5093%(X100)
2335 19:59:38.292904
2336 19:59:38.296758 CH0 DQM 0 Duty spec in!! Max-Min= 250%
2337 19:59:38.297296
2338 19:59:38.299682 CH0 DQM 1 Duty spec in!! Max-Min= 125%
2339 19:59:38.302895 [DutyScan_Calibration_Flow] ====Done====
2340 19:59:38.303393
2341 19:59:38.306068 [DutyScan_Calibration_Flow] k_type=2
2342 19:59:38.322955
2343 19:59:38.323454 ==DQ 0 ==
2344 19:59:38.326455 Final DQ duty delay cell = 0
2345 19:59:38.329959 [0] MAX Duty = 5031%(X100), DQS PI = 24
2346 19:59:38.333231 [0] MIN Duty = 4906%(X100), DQS PI = 0
2347 19:59:38.333737 [0] AVG Duty = 4968%(X100)
2348 19:59:38.334063
2349 19:59:38.336824 ==DQ 1 ==
2350 19:59:38.337374 Final DQ duty delay cell = 0
2351 19:59:38.343003 [0] MAX Duty = 5093%(X100), DQS PI = 10
2352 19:59:38.346982 [0] MIN Duty = 4907%(X100), DQS PI = 36
2353 19:59:38.347491 [0] AVG Duty = 5000%(X100)
2354 19:59:38.347934
2355 19:59:38.349659 CH0 DQ 0 Duty spec in!! Max-Min= 125%
2356 19:59:38.350067
2357 19:59:38.353415 CH0 DQ 1 Duty spec in!! Max-Min= 186%
2358 19:59:38.359707 [DutyScan_Calibration_Flow] ====Done====
2359 19:59:38.360208 ==
2360 19:59:38.363201 Dram Type= 6, Freq= 0, CH_1, rank 0
2361 19:59:38.366238 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2362 19:59:38.366745 ==
2363 19:59:38.369484 [Duty_Offset_Calibration]
2364 19:59:38.369892 B0:1 B1:0 CA:0
2365 19:59:38.370216
2366 19:59:38.372685 [DutyScan_Calibration_Flow] k_type=0
2367 19:59:38.382155
2368 19:59:38.382635 ==CLK 0==
2369 19:59:38.385554 Final CLK duty delay cell = -4
2370 19:59:38.389066 [-4] MAX Duty = 5031%(X100), DQS PI = 20
2371 19:59:38.392349 [-4] MIN Duty = 4907%(X100), DQS PI = 2
2372 19:59:38.395473 [-4] AVG Duty = 4969%(X100)
2373 19:59:38.396052
2374 19:59:38.398518 CH1 CLK Duty spec in!! Max-Min= 124%
2375 19:59:38.401891 [DutyScan_Calibration_Flow] ====Done====
2376 19:59:38.402398
2377 19:59:38.404846 [DutyScan_Calibration_Flow] k_type=1
2378 19:59:38.421643
2379 19:59:38.422152 ==DQS 0 ==
2380 19:59:38.424973 Final DQS duty delay cell = 0
2381 19:59:38.428340 [0] MAX Duty = 5094%(X100), DQS PI = 24
2382 19:59:38.431536 [0] MIN Duty = 4875%(X100), DQS PI = 0
2383 19:59:38.432015 [0] AVG Duty = 4984%(X100)
2384 19:59:38.432352
2385 19:59:38.435365 ==DQS 1 ==
2386 19:59:38.438725 Final DQS duty delay cell = 0
2387 19:59:38.441419 [0] MAX Duty = 5187%(X100), DQS PI = 18
2388 19:59:38.445124 [0] MIN Duty = 4969%(X100), DQS PI = 10
2389 19:59:38.445537 [0] AVG Duty = 5078%(X100)
2390 19:59:38.448201
2391 19:59:38.451815 CH1 DQS 0 Duty spec in!! Max-Min= 219%
2392 19:59:38.452228
2393 19:59:38.454861 CH1 DQS 1 Duty spec in!! Max-Min= 218%
2394 19:59:38.458541 [DutyScan_Calibration_Flow] ====Done====
2395 19:59:38.459120
2396 19:59:38.461888 [DutyScan_Calibration_Flow] k_type=3
2397 19:59:38.478440
2398 19:59:38.478953 ==DQM 0 ==
2399 19:59:38.481363 Final DQM duty delay cell = 0
2400 19:59:38.485200 [0] MAX Duty = 5156%(X100), DQS PI = 6
2401 19:59:38.488280 [0] MIN Duty = 5031%(X100), DQS PI = 0
2402 19:59:38.488808 [0] AVG Duty = 5093%(X100)
2403 19:59:38.491830
2404 19:59:38.492479 ==DQM 1 ==
2405 19:59:38.494955 Final DQM duty delay cell = 0
2406 19:59:38.497799 [0] MAX Duty = 5031%(X100), DQS PI = 16
2407 19:59:38.501973 [0] MIN Duty = 4907%(X100), DQS PI = 36
2408 19:59:38.502492 [0] AVG Duty = 4969%(X100)
2409 19:59:38.505125
2410 19:59:38.508033 CH1 DQM 0 Duty spec in!! Max-Min= 125%
2411 19:59:38.508450
2412 19:59:38.511689 CH1 DQM 1 Duty spec in!! Max-Min= 124%
2413 19:59:38.514777 [DutyScan_Calibration_Flow] ====Done====
2414 19:59:38.515187
2415 19:59:38.518305 [DutyScan_Calibration_Flow] k_type=2
2416 19:59:38.534167
2417 19:59:38.534694 ==DQ 0 ==
2418 19:59:38.537692 Final DQ duty delay cell = -4
2419 19:59:38.540461 [-4] MAX Duty = 5062%(X100), DQS PI = 8
2420 19:59:38.544276 [-4] MIN Duty = 4938%(X100), DQS PI = 0
2421 19:59:38.544804 [-4] AVG Duty = 5000%(X100)
2422 19:59:38.547095
2423 19:59:38.547507 ==DQ 1 ==
2424 19:59:38.550471 Final DQ duty delay cell = 0
2425 19:59:38.554034 [0] MAX Duty = 5125%(X100), DQS PI = 20
2426 19:59:38.557685 [0] MIN Duty = 4969%(X100), DQS PI = 12
2427 19:59:38.558134 [0] AVG Duty = 5047%(X100)
2428 19:59:38.558479
2429 19:59:38.561214 CH1 DQ 0 Duty spec in!! Max-Min= 124%
2430 19:59:38.564329
2431 19:59:38.564743 CH1 DQ 1 Duty spec in!! Max-Min= 156%
2432 19:59:38.570766 [DutyScan_Calibration_Flow] ====Done====
2433 19:59:38.574233 nWR fixed to 30
2434 19:59:38.574670 [ModeRegInit_LP4] CH0 RK0
2435 19:59:38.577611 [ModeRegInit_LP4] CH0 RK1
2436 19:59:38.580576 [ModeRegInit_LP4] CH1 RK0
2437 19:59:38.580988 [ModeRegInit_LP4] CH1 RK1
2438 19:59:38.584362 match AC timing 7
2439 19:59:38.587825 dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 1
2440 19:59:38.590933 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
2441 19:59:38.597132 [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12
2442 19:59:38.601032 [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25
2443 19:59:38.607800 [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)
2444 19:59:38.608329 ==
2445 19:59:38.611122 Dram Type= 6, Freq= 0, CH_0, rank 0
2446 19:59:38.614041 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2447 19:59:38.614440 ==
2448 19:59:38.621219 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2449 19:59:38.624360 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2450 19:59:38.634200 [CA 0] Center 39 (8~70) winsize 63
2451 19:59:38.637875 [CA 1] Center 39 (8~70) winsize 63
2452 19:59:38.640647 [CA 2] Center 35 (5~66) winsize 62
2453 19:59:38.643982 [CA 3] Center 34 (4~65) winsize 62
2454 19:59:38.648022 [CA 4] Center 33 (3~64) winsize 62
2455 19:59:38.650901 [CA 5] Center 32 (3~62) winsize 60
2456 19:59:38.651317
2457 19:59:38.654487 [CmdBusTrainingLP45] Vref(ca) range 1: 37
2458 19:59:38.654996
2459 19:59:38.657226 [CATrainingPosCal] consider 1 rank data
2460 19:59:38.661195 u2DelayCellTimex100 = 270/100 ps
2461 19:59:38.663977 CA0 delay=39 (8~70),Diff = 7 PI (33 cell)
2462 19:59:38.667337 CA1 delay=39 (8~70),Diff = 7 PI (33 cell)
2463 19:59:38.674280 CA2 delay=35 (5~66),Diff = 3 PI (14 cell)
2464 19:59:38.677133 CA3 delay=34 (4~65),Diff = 2 PI (9 cell)
2465 19:59:38.680595 CA4 delay=33 (3~64),Diff = 1 PI (4 cell)
2466 19:59:38.684146 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
2467 19:59:38.684579
2468 19:59:38.687453 CA PerBit enable=1, Macro0, CA PI delay=32
2469 19:59:38.688018
2470 19:59:38.691194 [CBTSetCACLKResult] CA Dly = 32
2471 19:59:38.691757 CS Dly: 6 (0~37)
2472 19:59:38.694582 ==
2473 19:59:38.695090 Dram Type= 6, Freq= 0, CH_0, rank 1
2474 19:59:38.701180 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2475 19:59:38.701690 ==
2476 19:59:38.704140 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2477 19:59:38.711177 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
2478 19:59:38.720021 [CA 0] Center 38 (8~69) winsize 62
2479 19:59:38.722898 [CA 1] Center 38 (8~69) winsize 62
2480 19:59:38.726194 [CA 2] Center 35 (4~66) winsize 63
2481 19:59:38.730358 [CA 3] Center 34 (4~65) winsize 62
2482 19:59:38.733493 [CA 4] Center 33 (3~64) winsize 62
2483 19:59:38.736616 [CA 5] Center 32 (3~62) winsize 60
2484 19:59:38.737128
2485 19:59:38.739760 [CmdBusTrainingLP45] Vref(ca) range 1: 35
2486 19:59:38.740167
2487 19:59:38.743119 [CATrainingPosCal] consider 2 rank data
2488 19:59:38.746385 u2DelayCellTimex100 = 270/100 ps
2489 19:59:38.749548 CA0 delay=38 (8~69),Diff = 6 PI (28 cell)
2490 19:59:38.752595 CA1 delay=38 (8~69),Diff = 6 PI (28 cell)
2491 19:59:38.759618 CA2 delay=35 (5~66),Diff = 3 PI (14 cell)
2492 19:59:38.763337 CA3 delay=34 (4~65),Diff = 2 PI (9 cell)
2493 19:59:38.767113 CA4 delay=33 (3~64),Diff = 1 PI (4 cell)
2494 19:59:38.769774 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
2495 19:59:38.770189
2496 19:59:38.773142 CA PerBit enable=1, Macro0, CA PI delay=32
2497 19:59:38.773696
2498 19:59:38.776230 [CBTSetCACLKResult] CA Dly = 32
2499 19:59:38.776642 CS Dly: 6 (0~38)
2500 19:59:38.776973
2501 19:59:38.779955 ----->DramcWriteLeveling(PI) begin...
2502 19:59:38.783018 ==
2503 19:59:38.787056 Dram Type= 6, Freq= 0, CH_0, rank 0
2504 19:59:38.789997 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2505 19:59:38.790506 ==
2506 19:59:38.793301 Write leveling (Byte 0): 33 => 33
2507 19:59:38.796588 Write leveling (Byte 1): 29 => 29
2508 19:59:38.799572 DramcWriteLeveling(PI) end<-----
2509 19:59:38.800299
2510 19:59:38.800728 ==
2511 19:59:38.803251 Dram Type= 6, Freq= 0, CH_0, rank 0
2512 19:59:38.806294 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2513 19:59:38.806942 ==
2514 19:59:38.809667 [Gating] SW mode calibration
2515 19:59:38.816519 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2516 19:59:38.820082 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2517 19:59:38.826288 0 15 0 | B1->B0 | 2323 3333 | 1 1 | (0 0) (1 1)
2518 19:59:38.829795 0 15 4 | B1->B0 | 3333 3434 | 0 1 | (0 0) (1 1)
2519 19:59:38.833723 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2520 19:59:38.839583 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2521 19:59:38.843207 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2522 19:59:38.846456 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2523 19:59:38.853128 0 15 24 | B1->B0 | 3434 3333 | 1 0 | (1 1) (0 0)
2524 19:59:38.856655 0 15 28 | B1->B0 | 3434 2424 | 1 0 | (1 1) (1 0)
2525 19:59:38.859537 1 0 0 | B1->B0 | 2828 2323 | 0 0 | (0 1) (0 0)
2526 19:59:38.866665 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2527 19:59:38.869705 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2528 19:59:38.873418 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2529 19:59:38.880025 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2530 19:59:38.883625 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2531 19:59:38.886760 1 0 24 | B1->B0 | 2323 2e2d | 0 1 | (0 0) (0 0)
2532 19:59:38.893180 1 0 28 | B1->B0 | 2727 4444 | 0 0 | (0 0) (1 1)
2533 19:59:38.896378 1 1 0 | B1->B0 | 3232 4646 | 1 0 | (0 0) (0 0)
2534 19:59:38.900270 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2535 19:59:38.903159 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2536 19:59:38.910577 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2537 19:59:38.913456 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2538 19:59:38.916614 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2539 19:59:38.923290 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2540 19:59:38.926445 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2541 19:59:38.930198 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2542 19:59:38.937010 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2543 19:59:38.940043 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2544 19:59:38.943331 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2545 19:59:38.949824 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2546 19:59:38.952938 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2547 19:59:38.956321 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2548 19:59:38.963694 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2549 19:59:38.966466 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2550 19:59:38.970002 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2551 19:59:38.976981 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2552 19:59:38.980232 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2553 19:59:38.983049 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2554 19:59:38.990365 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2555 19:59:38.993589 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2556 19:59:38.996564 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2557 19:59:39.000301 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2558 19:59:39.002964 Total UI for P1: 0, mck2ui 16
2559 19:59:39.006622 best dqsien dly found for B0: ( 1, 3, 28)
2560 19:59:39.013413 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2561 19:59:39.016565 Total UI for P1: 0, mck2ui 16
2562 19:59:39.019614 best dqsien dly found for B1: ( 1, 4, 0)
2563 19:59:39.023433 best DQS0 dly(MCK, UI, PI) = (1, 3, 28)
2564 19:59:39.027002 best DQS1 dly(MCK, UI, PI) = (1, 4, 0)
2565 19:59:39.027521
2566 19:59:39.030395 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)
2567 19:59:39.033800 best DQS1 P1 dly(MCK, UI, PI) = (1, 8, 0)
2568 19:59:39.036727 [Gating] SW calibration Done
2569 19:59:39.037232 ==
2570 19:59:39.039734 Dram Type= 6, Freq= 0, CH_0, rank 0
2571 19:59:39.043346 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2572 19:59:39.043805 ==
2573 19:59:39.046388 RX Vref Scan: 0
2574 19:59:39.046805
2575 19:59:39.047229 RX Vref 0 -> 0, step: 1
2576 19:59:39.047750
2577 19:59:39.050075 RX Delay -40 -> 252, step: 8
2578 19:59:39.053108 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
2579 19:59:39.059803 iDelay=200, Bit 1, Center 123 (48 ~ 199) 152
2580 19:59:39.063586 iDelay=200, Bit 2, Center 119 (48 ~ 191) 144
2581 19:59:39.066673 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
2582 19:59:39.069943 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
2583 19:59:39.073196 iDelay=200, Bit 5, Center 115 (48 ~ 183) 136
2584 19:59:39.080290 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2585 19:59:39.083317 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2586 19:59:39.086835 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
2587 19:59:39.090510 iDelay=200, Bit 9, Center 107 (40 ~ 175) 136
2588 19:59:39.093854 iDelay=200, Bit 10, Center 111 (48 ~ 175) 128
2589 19:59:39.097016 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
2590 19:59:39.104337 iDelay=200, Bit 12, Center 115 (48 ~ 183) 136
2591 19:59:39.107766 iDelay=200, Bit 13, Center 123 (56 ~ 191) 136
2592 19:59:39.110390 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
2593 19:59:39.113822 iDelay=200, Bit 15, Center 119 (48 ~ 191) 144
2594 19:59:39.114233 ==
2595 19:59:39.116879 Dram Type= 6, Freq= 0, CH_0, rank 0
2596 19:59:39.123672 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2597 19:59:39.124189 ==
2598 19:59:39.124518 DQS Delay:
2599 19:59:39.124821 DQS0 = 0, DQS1 = 0
2600 19:59:39.127211 DQM Delay:
2601 19:59:39.127699 DQM0 = 121, DQM1 = 113
2602 19:59:39.130550 DQ Delay:
2603 19:59:39.134131 DQ0 =119, DQ1 =123, DQ2 =119, DQ3 =119
2604 19:59:39.137238 DQ4 =119, DQ5 =115, DQ6 =127, DQ7 =127
2605 19:59:39.140338 DQ8 =99, DQ9 =107, DQ10 =111, DQ11 =107
2606 19:59:39.143621 DQ12 =115, DQ13 =123, DQ14 =123, DQ15 =119
2607 19:59:39.144065
2608 19:59:39.144394
2609 19:59:39.144695 ==
2610 19:59:39.147582 Dram Type= 6, Freq= 0, CH_0, rank 0
2611 19:59:39.150331 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2612 19:59:39.150737 ==
2613 19:59:39.153521
2614 19:59:39.153921
2615 19:59:39.154243 TX Vref Scan disable
2616 19:59:39.157317 == TX Byte 0 ==
2617 19:59:39.160381 Update DQ dly =851 (3 ,2, 19) DQ OEN =(2 ,7)
2618 19:59:39.164204 Update DQM dly =851 (3 ,2, 19) DQM OEN =(2 ,7)
2619 19:59:39.166927 == TX Byte 1 ==
2620 19:59:39.170872 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
2621 19:59:39.173897 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
2622 19:59:39.174307 ==
2623 19:59:39.177159 Dram Type= 6, Freq= 0, CH_0, rank 0
2624 19:59:39.184018 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2625 19:59:39.184524 ==
2626 19:59:39.194927 TX Vref=22, minBit 0, minWin=25, winSum=412
2627 19:59:39.197877 TX Vref=24, minBit 0, minWin=25, winSum=418
2628 19:59:39.201421 TX Vref=26, minBit 0, minWin=26, winSum=423
2629 19:59:39.205098 TX Vref=28, minBit 4, minWin=26, winSum=427
2630 19:59:39.208596 TX Vref=30, minBit 0, minWin=26, winSum=427
2631 19:59:39.211790 TX Vref=32, minBit 0, minWin=26, winSum=429
2632 19:59:39.217878 [TxChooseVref] Worse bit 0, Min win 26, Win sum 429, Final Vref 32
2633 19:59:39.218377
2634 19:59:39.221432 Final TX Range 1 Vref 32
2635 19:59:39.221959
2636 19:59:39.222286 ==
2637 19:59:39.225238 Dram Type= 6, Freq= 0, CH_0, rank 0
2638 19:59:39.228132 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2639 19:59:39.228541 ==
2640 19:59:39.228864
2641 19:59:39.229164
2642 19:59:39.231316 TX Vref Scan disable
2643 19:59:39.234307 == TX Byte 0 ==
2644 19:59:39.238095 Update DQ dly =851 (3 ,2, 19) DQ OEN =(2 ,7)
2645 19:59:39.241065 Update DQM dly =851 (3 ,2, 19) DQM OEN =(2 ,7)
2646 19:59:39.244782 == TX Byte 1 ==
2647 19:59:39.247818 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
2648 19:59:39.251556 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
2649 19:59:39.251992
2650 19:59:39.255094 [DATLAT]
2651 19:59:39.255710 Freq=1200, CH0 RK0
2652 19:59:39.256055
2653 19:59:39.258438 DATLAT Default: 0xd
2654 19:59:39.258941 0, 0xFFFF, sum = 0
2655 19:59:39.261417 1, 0xFFFF, sum = 0
2656 19:59:39.261827 2, 0xFFFF, sum = 0
2657 19:59:39.264595 3, 0xFFFF, sum = 0
2658 19:59:39.265108 4, 0xFFFF, sum = 0
2659 19:59:39.268362 5, 0xFFFF, sum = 0
2660 19:59:39.268772 6, 0xFFFF, sum = 0
2661 19:59:39.271301 7, 0xFFFF, sum = 0
2662 19:59:39.271745 8, 0xFFFF, sum = 0
2663 19:59:39.275043 9, 0xFFFF, sum = 0
2664 19:59:39.275552 10, 0xFFFF, sum = 0
2665 19:59:39.278134 11, 0xFFFF, sum = 0
2666 19:59:39.278543 12, 0x0, sum = 1
2667 19:59:39.281769 13, 0x0, sum = 2
2668 19:59:39.282281 14, 0x0, sum = 3
2669 19:59:39.284725 15, 0x0, sum = 4
2670 19:59:39.285235 best_step = 13
2671 19:59:39.285562
2672 19:59:39.285856 ==
2673 19:59:39.288609 Dram Type= 6, Freq= 0, CH_0, rank 0
2674 19:59:39.295263 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2675 19:59:39.295817 ==
2676 19:59:39.296146 RX Vref Scan: 1
2677 19:59:39.296447
2678 19:59:39.298672 Set Vref Range= 32 -> 127
2679 19:59:39.299193
2680 19:59:39.301822 RX Vref 32 -> 127, step: 1
2681 19:59:39.302336
2682 19:59:39.302662 RX Delay -13 -> 252, step: 4
2683 19:59:39.305302
2684 19:59:39.305803 Set Vref, RX VrefLevel [Byte0]: 32
2685 19:59:39.308334 [Byte1]: 32
2686 19:59:39.313078
2687 19:59:39.313587 Set Vref, RX VrefLevel [Byte0]: 33
2688 19:59:39.315879 [Byte1]: 33
2689 19:59:39.320943
2690 19:59:39.321631 Set Vref, RX VrefLevel [Byte0]: 34
2691 19:59:39.324244 [Byte1]: 34
2692 19:59:39.328824
2693 19:59:39.329328 Set Vref, RX VrefLevel [Byte0]: 35
2694 19:59:39.331870 [Byte1]: 35
2695 19:59:39.337091
2696 19:59:39.337593 Set Vref, RX VrefLevel [Byte0]: 36
2697 19:59:39.340104 [Byte1]: 36
2698 19:59:39.344387
2699 19:59:39.344793 Set Vref, RX VrefLevel [Byte0]: 37
2700 19:59:39.347729 [Byte1]: 37
2701 19:59:39.352470
2702 19:59:39.352942 Set Vref, RX VrefLevel [Byte0]: 38
2703 19:59:39.355425 [Byte1]: 38
2704 19:59:39.360042
2705 19:59:39.360540 Set Vref, RX VrefLevel [Byte0]: 39
2706 19:59:39.363892 [Byte1]: 39
2707 19:59:39.368206
2708 19:59:39.368699 Set Vref, RX VrefLevel [Byte0]: 40
2709 19:59:39.371348 [Byte1]: 40
2710 19:59:39.375963
2711 19:59:39.376482 Set Vref, RX VrefLevel [Byte0]: 41
2712 19:59:39.379218 [Byte1]: 41
2713 19:59:39.383604
2714 19:59:39.384063 Set Vref, RX VrefLevel [Byte0]: 42
2715 19:59:39.387402 [Byte1]: 42
2716 19:59:39.391960
2717 19:59:39.392464 Set Vref, RX VrefLevel [Byte0]: 43
2718 19:59:39.395100 [Byte1]: 43
2719 19:59:39.399579
2720 19:59:39.400121 Set Vref, RX VrefLevel [Byte0]: 44
2721 19:59:39.403244 [Byte1]: 44
2722 19:59:39.407876
2723 19:59:39.408386 Set Vref, RX VrefLevel [Byte0]: 45
2724 19:59:39.410528 [Byte1]: 45
2725 19:59:39.415708
2726 19:59:39.416246 Set Vref, RX VrefLevel [Byte0]: 46
2727 19:59:39.418964 [Byte1]: 46
2728 19:59:39.423177
2729 19:59:39.423583 Set Vref, RX VrefLevel [Byte0]: 47
2730 19:59:39.426704 [Byte1]: 47
2731 19:59:39.431227
2732 19:59:39.431789 Set Vref, RX VrefLevel [Byte0]: 48
2733 19:59:39.434675 [Byte1]: 48
2734 19:59:39.438829
2735 19:59:39.439239 Set Vref, RX VrefLevel [Byte0]: 49
2736 19:59:39.441886 [Byte1]: 49
2737 19:59:39.447155
2738 19:59:39.447703 Set Vref, RX VrefLevel [Byte0]: 50
2739 19:59:39.450134 [Byte1]: 50
2740 19:59:39.454920
2741 19:59:39.455421 Set Vref, RX VrefLevel [Byte0]: 51
2742 19:59:39.458232 [Byte1]: 51
2743 19:59:39.462694
2744 19:59:39.463194 Set Vref, RX VrefLevel [Byte0]: 52
2745 19:59:39.465989 [Byte1]: 52
2746 19:59:39.470902
2747 19:59:39.471413 Set Vref, RX VrefLevel [Byte0]: 53
2748 19:59:39.473681 [Byte1]: 53
2749 19:59:39.478844
2750 19:59:39.479342 Set Vref, RX VrefLevel [Byte0]: 54
2751 19:59:39.482064 [Byte1]: 54
2752 19:59:39.486035
2753 19:59:39.486483 Set Vref, RX VrefLevel [Byte0]: 55
2754 19:59:39.490112 [Byte1]: 55
2755 19:59:39.494525
2756 19:59:39.495030 Set Vref, RX VrefLevel [Byte0]: 56
2757 19:59:39.497733 [Byte1]: 56
2758 19:59:39.502447
2759 19:59:39.502949 Set Vref, RX VrefLevel [Byte0]: 57
2760 19:59:39.505921 [Byte1]: 57
2761 19:59:39.510030
2762 19:59:39.510441 Set Vref, RX VrefLevel [Byte0]: 58
2763 19:59:39.513489 [Byte1]: 58
2764 19:59:39.517876
2765 19:59:39.518370 Set Vref, RX VrefLevel [Byte0]: 59
2766 19:59:39.521207 [Byte1]: 59
2767 19:59:39.525676
2768 19:59:39.526179 Set Vref, RX VrefLevel [Byte0]: 60
2769 19:59:39.529480 [Byte1]: 60
2770 19:59:39.533687
2771 19:59:39.534188 Set Vref, RX VrefLevel [Byte0]: 61
2772 19:59:39.536701 [Byte1]: 61
2773 19:59:39.541813
2774 19:59:39.542374 Set Vref, RX VrefLevel [Byte0]: 62
2775 19:59:39.544704 [Byte1]: 62
2776 19:59:39.549379
2777 19:59:39.549791 Set Vref, RX VrefLevel [Byte0]: 63
2778 19:59:39.552567 [Byte1]: 63
2779 19:59:39.557911
2780 19:59:39.558414 Set Vref, RX VrefLevel [Byte0]: 64
2781 19:59:39.560756 [Byte1]: 64
2782 19:59:39.565460
2783 19:59:39.565962 Set Vref, RX VrefLevel [Byte0]: 65
2784 19:59:39.568574 [Byte1]: 65
2785 19:59:39.573557
2786 19:59:39.574068 Set Vref, RX VrefLevel [Byte0]: 66
2787 19:59:39.576627 [Byte1]: 66
2788 19:59:39.581054
2789 19:59:39.581569 Set Vref, RX VrefLevel [Byte0]: 67
2790 19:59:39.584886 [Byte1]: 67
2791 19:59:39.589126
2792 19:59:39.589626 Set Vref, RX VrefLevel [Byte0]: 68
2793 19:59:39.592467 [Byte1]: 68
2794 19:59:39.597383
2795 19:59:39.597885 Set Vref, RX VrefLevel [Byte0]: 69
2796 19:59:39.600469 [Byte1]: 69
2797 19:59:39.604476
2798 19:59:39.604978 Final RX Vref Byte 0 = 54 to rank0
2799 19:59:39.607985 Final RX Vref Byte 1 = 45 to rank0
2800 19:59:39.611812 Final RX Vref Byte 0 = 54 to rank1
2801 19:59:39.614834 Final RX Vref Byte 1 = 45 to rank1==
2802 19:59:39.618160 Dram Type= 6, Freq= 0, CH_0, rank 0
2803 19:59:39.624645 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2804 19:59:39.625056 ==
2805 19:59:39.625381 DQS Delay:
2806 19:59:39.625682 DQS0 = 0, DQS1 = 0
2807 19:59:39.627784 DQM Delay:
2808 19:59:39.628190 DQM0 = 120, DQM1 = 110
2809 19:59:39.631154 DQ Delay:
2810 19:59:39.634800 DQ0 =120, DQ1 =120, DQ2 =118, DQ3 =118
2811 19:59:39.638496 DQ4 =122, DQ5 =112, DQ6 =126, DQ7 =128
2812 19:59:39.641338 DQ8 =96, DQ9 =98, DQ10 =112, DQ11 =102
2813 19:59:39.645119 DQ12 =116, DQ13 =116, DQ14 =124, DQ15 =120
2814 19:59:39.645625
2815 19:59:39.645951
2816 19:59:39.651129 [DQSOSCAuto] RK0, (LSB)MR18= 0x160f, (MSB)MR19= 0x404, tDQSOscB0 = 404 ps tDQSOscB1 = 401 ps
2817 19:59:39.654925 CH0 RK0: MR19=404, MR18=160F
2818 19:59:39.661758 CH0_RK0: MR19=0x404, MR18=0x160F, DQSOSC=401, MR23=63, INC=40, DEC=27
2819 19:59:39.662436
2820 19:59:39.664617 ----->DramcWriteLeveling(PI) begin...
2821 19:59:39.665071 ==
2822 19:59:39.668597 Dram Type= 6, Freq= 0, CH_0, rank 1
2823 19:59:39.671788 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2824 19:59:39.672345 ==
2825 19:59:39.675018 Write leveling (Byte 0): 35 => 35
2826 19:59:39.678048 Write leveling (Byte 1): 28 => 28
2827 19:59:39.681820 DramcWriteLeveling(PI) end<-----
2828 19:59:39.682321
2829 19:59:39.682649 ==
2830 19:59:39.685050 Dram Type= 6, Freq= 0, CH_0, rank 1
2831 19:59:39.691514 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2832 19:59:39.692048 ==
2833 19:59:39.692380 [Gating] SW mode calibration
2834 19:59:39.701824 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2835 19:59:39.705061 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2836 19:59:39.708287 0 15 0 | B1->B0 | 3434 2f2e | 0 1 | (0 0) (0 0)
2837 19:59:39.715351 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2838 19:59:39.718084 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2839 19:59:39.721594 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2840 19:59:39.727924 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2841 19:59:39.731564 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2842 19:59:39.734681 0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2843 19:59:39.741784 0 15 28 | B1->B0 | 3232 2d2d | 0 1 | (0 1) (1 0)
2844 19:59:39.745183 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
2845 19:59:39.748077 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2846 19:59:39.754621 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2847 19:59:39.758386 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2848 19:59:39.761847 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2849 19:59:39.768271 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2850 19:59:39.771734 1 0 24 | B1->B0 | 2727 2726 | 0 1 | (0 0) (0 0)
2851 19:59:39.775155 1 0 28 | B1->B0 | 3636 3c3c | 0 1 | (0 0) (0 0)
2852 19:59:39.778412 1 1 0 | B1->B0 | 4646 4545 | 0 0 | (0 0) (0 0)
2853 19:59:39.784960 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2854 19:59:39.788704 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2855 19:59:39.792021 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2856 19:59:39.798772 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2857 19:59:39.801741 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2858 19:59:39.804708 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2859 19:59:39.811749 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2860 19:59:39.815003 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2861 19:59:39.817846 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2862 19:59:39.824923 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2863 19:59:39.828023 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2864 19:59:39.831573 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2865 19:59:39.838296 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2866 19:59:39.841392 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2867 19:59:39.844692 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2868 19:59:39.851513 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2869 19:59:39.854607 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2870 19:59:39.858394 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2871 19:59:39.865002 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2872 19:59:39.867928 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2873 19:59:39.872029 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2874 19:59:39.875211 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2875 19:59:39.881754 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2876 19:59:39.885293 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
2877 19:59:39.888381 Total UI for P1: 0, mck2ui 16
2878 19:59:39.891932 best dqsien dly found for B1: ( 1, 3, 28)
2879 19:59:39.895131 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2880 19:59:39.898048 Total UI for P1: 0, mck2ui 16
2881 19:59:39.901579 best dqsien dly found for B0: ( 1, 3, 30)
2882 19:59:39.904714 best DQS0 dly(MCK, UI, PI) = (1, 3, 30)
2883 19:59:39.908476 best DQS1 dly(MCK, UI, PI) = (1, 3, 28)
2884 19:59:39.908991
2885 19:59:39.915758 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 30)
2886 19:59:39.918793 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 28)
2887 19:59:39.919503 [Gating] SW calibration Done
2888 19:59:39.922064 ==
2889 19:59:39.924864 Dram Type= 6, Freq= 0, CH_0, rank 1
2890 19:59:39.928721 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2891 19:59:39.929132 ==
2892 19:59:39.929453 RX Vref Scan: 0
2893 19:59:39.929751
2894 19:59:39.931880 RX Vref 0 -> 0, step: 1
2895 19:59:39.932288
2896 19:59:39.935167 RX Delay -40 -> 252, step: 8
2897 19:59:39.938894 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
2898 19:59:39.942277 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2899 19:59:39.944942 iDelay=200, Bit 2, Center 119 (48 ~ 191) 144
2900 19:59:39.951677 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
2901 19:59:39.955290 iDelay=200, Bit 4, Center 127 (56 ~ 199) 144
2902 19:59:39.958719 iDelay=200, Bit 5, Center 119 (48 ~ 191) 144
2903 19:59:39.961863 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2904 19:59:39.965681 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2905 19:59:39.971886 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
2906 19:59:39.974991 iDelay=200, Bit 9, Center 103 (32 ~ 175) 144
2907 19:59:39.978562 iDelay=200, Bit 10, Center 111 (48 ~ 175) 128
2908 19:59:39.981632 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
2909 19:59:39.984990 iDelay=200, Bit 12, Center 115 (48 ~ 183) 136
2910 19:59:39.992285 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
2911 19:59:39.995000 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
2912 19:59:39.998761 iDelay=200, Bit 15, Center 119 (56 ~ 183) 128
2913 19:59:39.999271 ==
2914 19:59:40.002137 Dram Type= 6, Freq= 0, CH_0, rank 1
2915 19:59:40.005258 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2916 19:59:40.005766 ==
2917 19:59:40.008801 DQS Delay:
2918 19:59:40.009270 DQS0 = 0, DQS1 = 0
2919 19:59:40.012223 DQM Delay:
2920 19:59:40.012727 DQM0 = 122, DQM1 = 112
2921 19:59:40.013055 DQ Delay:
2922 19:59:40.015659 DQ0 =119, DQ1 =119, DQ2 =119, DQ3 =119
2923 19:59:40.018447 DQ4 =127, DQ5 =119, DQ6 =127, DQ7 =127
2924 19:59:40.025183 DQ8 =99, DQ9 =103, DQ10 =111, DQ11 =107
2925 19:59:40.028400 DQ12 =115, DQ13 =119, DQ14 =123, DQ15 =119
2926 19:59:40.028806
2927 19:59:40.029125
2928 19:59:40.029426 ==
2929 19:59:40.032169 Dram Type= 6, Freq= 0, CH_0, rank 1
2930 19:59:40.035355 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2931 19:59:40.035809 ==
2932 19:59:40.036138
2933 19:59:40.036441
2934 19:59:40.038544 TX Vref Scan disable
2935 19:59:40.041897 == TX Byte 0 ==
2936 19:59:40.045171 Update DQ dly =854 (3 ,2, 22) DQ OEN =(2 ,7)
2937 19:59:40.048774 Update DQM dly =854 (3 ,2, 22) DQM OEN =(2 ,7)
2938 19:59:40.051869 == TX Byte 1 ==
2939 19:59:40.055140 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
2940 19:59:40.058949 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
2941 19:59:40.059454 ==
2942 19:59:40.061618 Dram Type= 6, Freq= 0, CH_0, rank 1
2943 19:59:40.065567 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2944 19:59:40.066072 ==
2945 19:59:40.079259 TX Vref=22, minBit 5, minWin=24, winSum=417
2946 19:59:40.082500 TX Vref=24, minBit 1, minWin=25, winSum=419
2947 19:59:40.085574 TX Vref=26, minBit 1, minWin=26, winSum=424
2948 19:59:40.089165 TX Vref=28, minBit 5, minWin=25, winSum=425
2949 19:59:40.092224 TX Vref=30, minBit 5, minWin=25, winSum=426
2950 19:59:40.095754 TX Vref=32, minBit 5, minWin=25, winSum=426
2951 19:59:40.102936 [TxChooseVref] Worse bit 1, Min win 26, Win sum 424, Final Vref 26
2952 19:59:40.103457
2953 19:59:40.105839 Final TX Range 1 Vref 26
2954 19:59:40.106259
2955 19:59:40.106581 ==
2956 19:59:40.108965 Dram Type= 6, Freq= 0, CH_0, rank 1
2957 19:59:40.113078 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2958 19:59:40.113582 ==
2959 19:59:40.113910
2960 19:59:40.114207
2961 19:59:40.115731 TX Vref Scan disable
2962 19:59:40.118786 == TX Byte 0 ==
2963 19:59:40.122648 Update DQ dly =854 (3 ,2, 22) DQ OEN =(2 ,7)
2964 19:59:40.125886 Update DQM dly =854 (3 ,2, 22) DQM OEN =(2 ,7)
2965 19:59:40.129169 == TX Byte 1 ==
2966 19:59:40.132315 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
2967 19:59:40.135994 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
2968 19:59:40.136400
2969 19:59:40.139570 [DATLAT]
2970 19:59:40.140005 Freq=1200, CH0 RK1
2971 19:59:40.140329
2972 19:59:40.143017 DATLAT Default: 0xd
2973 19:59:40.143523 0, 0xFFFF, sum = 0
2974 19:59:40.145962 1, 0xFFFF, sum = 0
2975 19:59:40.146374 2, 0xFFFF, sum = 0
2976 19:59:40.148899 3, 0xFFFF, sum = 0
2977 19:59:40.149310 4, 0xFFFF, sum = 0
2978 19:59:40.152377 5, 0xFFFF, sum = 0
2979 19:59:40.152863 6, 0xFFFF, sum = 0
2980 19:59:40.155978 7, 0xFFFF, sum = 0
2981 19:59:40.156391 8, 0xFFFF, sum = 0
2982 19:59:40.159461 9, 0xFFFF, sum = 0
2983 19:59:40.162232 10, 0xFFFF, sum = 0
2984 19:59:40.162646 11, 0xFFFF, sum = 0
2985 19:59:40.166119 12, 0x0, sum = 1
2986 19:59:40.166641 13, 0x0, sum = 2
2987 19:59:40.166974 14, 0x0, sum = 3
2988 19:59:40.169109 15, 0x0, sum = 4
2989 19:59:40.169522 best_step = 13
2990 19:59:40.169925
2991 19:59:40.170232 ==
2992 19:59:40.172962 Dram Type= 6, Freq= 0, CH_0, rank 1
2993 19:59:40.179389 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2994 19:59:40.179833 ==
2995 19:59:40.180158 RX Vref Scan: 0
2996 19:59:40.180460
2997 19:59:40.182898 RX Vref 0 -> 0, step: 1
2998 19:59:40.183403
2999 19:59:40.186205 RX Delay -13 -> 252, step: 4
3000 19:59:40.189494 iDelay=195, Bit 0, Center 120 (51 ~ 190) 140
3001 19:59:40.192300 iDelay=195, Bit 1, Center 122 (55 ~ 190) 136
3002 19:59:40.199223 iDelay=195, Bit 2, Center 118 (51 ~ 186) 136
3003 19:59:40.202254 iDelay=195, Bit 3, Center 118 (51 ~ 186) 136
3004 19:59:40.205979 iDelay=195, Bit 4, Center 122 (55 ~ 190) 136
3005 19:59:40.209622 iDelay=195, Bit 5, Center 116 (51 ~ 182) 132
3006 19:59:40.212741 iDelay=195, Bit 6, Center 128 (63 ~ 194) 132
3007 19:59:40.219814 iDelay=195, Bit 7, Center 128 (63 ~ 194) 132
3008 19:59:40.222533 iDelay=195, Bit 8, Center 100 (35 ~ 166) 132
3009 19:59:40.225577 iDelay=195, Bit 9, Center 96 (31 ~ 162) 132
3010 19:59:40.229404 iDelay=195, Bit 10, Center 110 (47 ~ 174) 128
3011 19:59:40.232879 iDelay=195, Bit 11, Center 100 (35 ~ 166) 132
3012 19:59:40.239458 iDelay=195, Bit 12, Center 114 (51 ~ 178) 128
3013 19:59:40.242672 iDelay=195, Bit 13, Center 116 (55 ~ 178) 124
3014 19:59:40.246006 iDelay=195, Bit 14, Center 120 (59 ~ 182) 124
3015 19:59:40.249855 iDelay=195, Bit 15, Center 118 (55 ~ 182) 128
3016 19:59:40.250362 ==
3017 19:59:40.252789 Dram Type= 6, Freq= 0, CH_0, rank 1
3018 19:59:40.255960 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3019 19:59:40.259526 ==
3020 19:59:40.260126 DQS Delay:
3021 19:59:40.260461 DQS0 = 0, DQS1 = 0
3022 19:59:40.263034 DQM Delay:
3023 19:59:40.263717 DQM0 = 121, DQM1 = 109
3024 19:59:40.265924 DQ Delay:
3025 19:59:40.269706 DQ0 =120, DQ1 =122, DQ2 =118, DQ3 =118
3026 19:59:40.272477 DQ4 =122, DQ5 =116, DQ6 =128, DQ7 =128
3027 19:59:40.276235 DQ8 =100, DQ9 =96, DQ10 =110, DQ11 =100
3028 19:59:40.279458 DQ12 =114, DQ13 =116, DQ14 =120, DQ15 =118
3029 19:59:40.279893
3030 19:59:40.280224
3031 19:59:40.286193 [DQSOSCAuto] RK1, (LSB)MR18= 0xff1, (MSB)MR19= 0x403, tDQSOscB0 = 416 ps tDQSOscB1 = 404 ps
3032 19:59:40.289254 CH0 RK1: MR19=403, MR18=FF1
3033 19:59:40.295708 CH0_RK1: MR19=0x403, MR18=0xFF1, DQSOSC=404, MR23=63, INC=40, DEC=26
3034 19:59:40.299491 [RxdqsGatingPostProcess] freq 1200
3035 19:59:40.306453 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3036 19:59:40.306962 best DQS0 dly(2T, 0.5T) = (0, 11)
3037 19:59:40.309279 best DQS1 dly(2T, 0.5T) = (0, 12)
3038 19:59:40.312411 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3039 19:59:40.316193 best DQS1 P1 dly(2T, 0.5T) = (1, 0)
3040 19:59:40.319197 best DQS0 dly(2T, 0.5T) = (0, 11)
3041 19:59:40.322679 best DQS1 dly(2T, 0.5T) = (0, 11)
3042 19:59:40.326359 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3043 19:59:40.329479 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3044 19:59:40.332757 Pre-setting of DQS Precalculation
3045 19:59:40.336481 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3046 19:59:40.339308 ==
3047 19:59:40.339767 Dram Type= 6, Freq= 0, CH_1, rank 0
3048 19:59:40.346289 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3049 19:59:40.346700 ==
3050 19:59:40.349109 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3051 19:59:40.356369 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
3052 19:59:40.364569 [CA 0] Center 37 (7~68) winsize 62
3053 19:59:40.368147 [CA 1] Center 37 (7~68) winsize 62
3054 19:59:40.371066 [CA 2] Center 35 (5~65) winsize 61
3055 19:59:40.374758 [CA 3] Center 34 (5~64) winsize 60
3056 19:59:40.377607 [CA 4] Center 34 (4~64) winsize 61
3057 19:59:40.381162 [CA 5] Center 33 (3~63) winsize 61
3058 19:59:40.381310
3059 19:59:40.384343 [CmdBusTrainingLP45] Vref(ca) range 1: 37
3060 19:59:40.384489
3061 19:59:40.388049 [CATrainingPosCal] consider 1 rank data
3062 19:59:40.390961 u2DelayCellTimex100 = 270/100 ps
3063 19:59:40.394267 CA0 delay=37 (7~68),Diff = 4 PI (19 cell)
3064 19:59:40.397602 CA1 delay=37 (7~68),Diff = 4 PI (19 cell)
3065 19:59:40.404357 CA2 delay=35 (5~65),Diff = 2 PI (9 cell)
3066 19:59:40.407513 CA3 delay=34 (5~64),Diff = 1 PI (4 cell)
3067 19:59:40.411388 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
3068 19:59:40.414468 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
3069 19:59:40.414566
3070 19:59:40.417589 CA PerBit enable=1, Macro0, CA PI delay=33
3071 19:59:40.417687
3072 19:59:40.420783 [CBTSetCACLKResult] CA Dly = 33
3073 19:59:40.420883 CS Dly: 7 (0~38)
3074 19:59:40.424432 ==
3075 19:59:40.424534 Dram Type= 6, Freq= 0, CH_1, rank 1
3076 19:59:40.431350 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3077 19:59:40.431475 ==
3078 19:59:40.434344 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3079 19:59:40.440922 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
3080 19:59:40.450301 [CA 0] Center 37 (7~68) winsize 62
3081 19:59:40.453551 [CA 1] Center 38 (8~68) winsize 61
3082 19:59:40.457015 [CA 2] Center 35 (5~65) winsize 61
3083 19:59:40.459982 [CA 3] Center 34 (4~65) winsize 62
3084 19:59:40.463663 [CA 4] Center 34 (4~65) winsize 62
3085 19:59:40.466903 [CA 5] Center 34 (4~64) winsize 61
3086 19:59:40.466995
3087 19:59:40.470065 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3088 19:59:40.470154
3089 19:59:40.473840 [CATrainingPosCal] consider 2 rank data
3090 19:59:40.476649 u2DelayCellTimex100 = 270/100 ps
3091 19:59:40.479865 CA0 delay=37 (7~68),Diff = 4 PI (19 cell)
3092 19:59:40.483634 CA1 delay=38 (8~68),Diff = 5 PI (24 cell)
3093 19:59:40.490053 CA2 delay=35 (5~65),Diff = 2 PI (9 cell)
3094 19:59:40.493558 CA3 delay=34 (5~64),Diff = 1 PI (4 cell)
3095 19:59:40.496944 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
3096 19:59:40.500316 CA5 delay=33 (4~63),Diff = 0 PI (0 cell)
3097 19:59:40.500405
3098 19:59:40.503824 CA PerBit enable=1, Macro0, CA PI delay=33
3099 19:59:40.503914
3100 19:59:40.507110 [CBTSetCACLKResult] CA Dly = 33
3101 19:59:40.507198 CS Dly: 8 (0~40)
3102 19:59:40.507268
3103 19:59:40.510301 ----->DramcWriteLeveling(PI) begin...
3104 19:59:40.510391 ==
3105 19:59:40.514021 Dram Type= 6, Freq= 0, CH_1, rank 0
3106 19:59:40.520306 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3107 19:59:40.520402 ==
3108 19:59:40.523486 Write leveling (Byte 0): 25 => 25
3109 19:59:40.527351 Write leveling (Byte 1): 27 => 27
3110 19:59:40.527448 DramcWriteLeveling(PI) end<-----
3111 19:59:40.527525
3112 19:59:40.530495 ==
3113 19:59:40.534002 Dram Type= 6, Freq= 0, CH_1, rank 0
3114 19:59:40.537181 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3115 19:59:40.537279 ==
3116 19:59:40.540425 [Gating] SW mode calibration
3117 19:59:40.546997 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3118 19:59:40.550358 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3119 19:59:40.557332 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3120 19:59:40.560536 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3121 19:59:40.564286 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3122 19:59:40.570765 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3123 19:59:40.574224 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3124 19:59:40.577538 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3125 19:59:40.583926 0 15 24 | B1->B0 | 3333 2d2d | 1 0 | (1 1) (0 0)
3126 19:59:40.587096 0 15 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
3127 19:59:40.590985 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3128 19:59:40.594234 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3129 19:59:40.600964 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3130 19:59:40.604079 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3131 19:59:40.607627 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3132 19:59:40.614123 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3133 19:59:40.617475 1 0 24 | B1->B0 | 3030 4040 | 0 1 | (0 0) (0 0)
3134 19:59:40.620997 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3135 19:59:40.627733 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3136 19:59:40.630907 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3137 19:59:40.634175 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3138 19:59:40.640913 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3139 19:59:40.644311 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3140 19:59:40.647364 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3141 19:59:40.654252 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3142 19:59:40.657768 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3143 19:59:40.661026 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3144 19:59:40.668130 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3145 19:59:40.671197 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3146 19:59:40.674703 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3147 19:59:40.678173 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3148 19:59:40.684453 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3149 19:59:40.688264 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3150 19:59:40.691806 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3151 19:59:40.697712 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3152 19:59:40.700921 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3153 19:59:40.704751 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3154 19:59:40.711573 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3155 19:59:40.714637 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3156 19:59:40.717806 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3157 19:59:40.724699 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3158 19:59:40.728315 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
3159 19:59:40.731186 Total UI for P1: 0, mck2ui 16
3160 19:59:40.734845 best dqsien dly found for B1: ( 1, 3, 24)
3161 19:59:40.738394 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3162 19:59:40.741416 Total UI for P1: 0, mck2ui 16
3163 19:59:40.744420 best dqsien dly found for B0: ( 1, 3, 26)
3164 19:59:40.748423 best DQS0 dly(MCK, UI, PI) = (1, 3, 26)
3165 19:59:40.751671 best DQS1 dly(MCK, UI, PI) = (1, 3, 24)
3166 19:59:40.752172
3167 19:59:40.754596 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 26)
3168 19:59:40.761525 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 24)
3169 19:59:40.761950 [Gating] SW calibration Done
3170 19:59:40.762380 ==
3171 19:59:40.764568 Dram Type= 6, Freq= 0, CH_1, rank 0
3172 19:59:40.771398 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3173 19:59:40.771957 ==
3174 19:59:40.772389 RX Vref Scan: 0
3175 19:59:40.772796
3176 19:59:40.774447 RX Vref 0 -> 0, step: 1
3177 19:59:40.774883
3178 19:59:40.778496 RX Delay -40 -> 252, step: 8
3179 19:59:40.781383 iDelay=200, Bit 0, Center 123 (56 ~ 191) 136
3180 19:59:40.784844 iDelay=200, Bit 1, Center 115 (48 ~ 183) 136
3181 19:59:40.788262 iDelay=200, Bit 2, Center 107 (40 ~ 175) 136
3182 19:59:40.791464 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
3183 19:59:40.798769 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
3184 19:59:40.801607 iDelay=200, Bit 5, Center 127 (56 ~ 199) 144
3185 19:59:40.804743 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
3186 19:59:40.808665 iDelay=200, Bit 7, Center 119 (48 ~ 191) 144
3187 19:59:40.811705 iDelay=200, Bit 8, Center 103 (40 ~ 167) 128
3188 19:59:40.818165 iDelay=200, Bit 9, Center 103 (40 ~ 167) 128
3189 19:59:40.821335 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
3190 19:59:40.824975 iDelay=200, Bit 11, Center 111 (48 ~ 175) 128
3191 19:59:40.828102 iDelay=200, Bit 12, Center 123 (56 ~ 191) 136
3192 19:59:40.831938 iDelay=200, Bit 13, Center 127 (64 ~ 191) 128
3193 19:59:40.838125 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
3194 19:59:40.841629 iDelay=200, Bit 15, Center 123 (56 ~ 191) 136
3195 19:59:40.841933 ==
3196 19:59:40.844968 Dram Type= 6, Freq= 0, CH_1, rank 0
3197 19:59:40.848142 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3198 19:59:40.848448 ==
3199 19:59:40.851737 DQS Delay:
3200 19:59:40.851991 DQS0 = 0, DQS1 = 0
3201 19:59:40.852259 DQM Delay:
3202 19:59:40.855109 DQM0 = 119, DQM1 = 116
3203 19:59:40.855286 DQ Delay:
3204 19:59:40.858043 DQ0 =123, DQ1 =115, DQ2 =107, DQ3 =119
3205 19:59:40.861608 DQ4 =119, DQ5 =127, DQ6 =127, DQ7 =119
3206 19:59:40.864941 DQ8 =103, DQ9 =103, DQ10 =115, DQ11 =111
3207 19:59:40.871169 DQ12 =123, DQ13 =127, DQ14 =123, DQ15 =123
3208 19:59:40.871445
3209 19:59:40.871680
3210 19:59:40.871901 ==
3211 19:59:40.874962 Dram Type= 6, Freq= 0, CH_1, rank 0
3212 19:59:40.878238 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3213 19:59:40.878493 ==
3214 19:59:40.878688
3215 19:59:40.878908
3216 19:59:40.881556 TX Vref Scan disable
3217 19:59:40.881794 == TX Byte 0 ==
3218 19:59:40.888184 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
3219 19:59:40.891205 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
3220 19:59:40.891382 == TX Byte 1 ==
3221 19:59:40.898197 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3222 19:59:40.901400 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3223 19:59:40.901579 ==
3224 19:59:40.905092 Dram Type= 6, Freq= 0, CH_1, rank 0
3225 19:59:40.908385 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3226 19:59:40.908563 ==
3227 19:59:40.920957 TX Vref=22, minBit 10, minWin=24, winSum=412
3228 19:59:40.924061 TX Vref=24, minBit 9, minWin=25, winSum=417
3229 19:59:40.927158 TX Vref=26, minBit 1, minWin=26, winSum=425
3230 19:59:40.930509 TX Vref=28, minBit 9, minWin=25, winSum=428
3231 19:59:40.934261 TX Vref=30, minBit 2, minWin=26, winSum=428
3232 19:59:40.937154 TX Vref=32, minBit 2, minWin=26, winSum=428
3233 19:59:40.943602 [TxChooseVref] Worse bit 2, Min win 26, Win sum 428, Final Vref 30
3234 19:59:40.943854
3235 19:59:40.947342 Final TX Range 1 Vref 30
3236 19:59:40.947549
3237 19:59:40.947799 ==
3238 19:59:40.950524 Dram Type= 6, Freq= 0, CH_1, rank 0
3239 19:59:40.954389 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3240 19:59:40.954597 ==
3241 19:59:40.954762
3242 19:59:40.957421
3243 19:59:40.957679 TX Vref Scan disable
3244 19:59:40.960542 == TX Byte 0 ==
3245 19:59:40.964343 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
3246 19:59:40.967473 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
3247 19:59:40.970564 == TX Byte 1 ==
3248 19:59:40.974077 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3249 19:59:40.977767 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3250 19:59:40.978178
3251 19:59:40.981090 [DATLAT]
3252 19:59:40.981496 Freq=1200, CH1 RK0
3253 19:59:40.981826
3254 19:59:40.984115 DATLAT Default: 0xd
3255 19:59:40.984522 0, 0xFFFF, sum = 0
3256 19:59:40.987510 1, 0xFFFF, sum = 0
3257 19:59:40.987961 2, 0xFFFF, sum = 0
3258 19:59:40.990950 3, 0xFFFF, sum = 0
3259 19:59:40.991541 4, 0xFFFF, sum = 0
3260 19:59:40.994523 5, 0xFFFF, sum = 0
3261 19:59:40.995026 6, 0xFFFF, sum = 0
3262 19:59:40.997740 7, 0xFFFF, sum = 0
3263 19:59:40.998296 8, 0xFFFF, sum = 0
3264 19:59:41.001191 9, 0xFFFF, sum = 0
3265 19:59:41.001615 10, 0xFFFF, sum = 0
3266 19:59:41.004730 11, 0xFFFF, sum = 0
3267 19:59:41.005151 12, 0x0, sum = 1
3268 19:59:41.007909 13, 0x0, sum = 2
3269 19:59:41.008468 14, 0x0, sum = 3
3270 19:59:41.011147 15, 0x0, sum = 4
3271 19:59:41.011711 best_step = 13
3272 19:59:41.012203
3273 19:59:41.012656 ==
3274 19:59:41.014254 Dram Type= 6, Freq= 0, CH_1, rank 0
3275 19:59:41.021427 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3276 19:59:41.021848 ==
3277 19:59:41.022179 RX Vref Scan: 1
3278 19:59:41.022539
3279 19:59:41.024305 Set Vref Range= 32 -> 127
3280 19:59:41.024874
3281 19:59:41.027956 RX Vref 32 -> 127, step: 1
3282 19:59:41.028464
3283 19:59:41.028979 RX Delay -5 -> 252, step: 4
3284 19:59:41.031229
3285 19:59:41.031601 Set Vref, RX VrefLevel [Byte0]: 32
3286 19:59:41.034423 [Byte1]: 32
3287 19:59:41.039196
3288 19:59:41.039581 Set Vref, RX VrefLevel [Byte0]: 33
3289 19:59:41.041919 [Byte1]: 33
3290 19:59:41.046952
3291 19:59:41.047255 Set Vref, RX VrefLevel [Byte0]: 34
3292 19:59:41.050147 [Byte1]: 34
3293 19:59:41.054357
3294 19:59:41.054667 Set Vref, RX VrefLevel [Byte0]: 35
3295 19:59:41.057563 [Byte1]: 35
3296 19:59:41.062613
3297 19:59:41.062924 Set Vref, RX VrefLevel [Byte0]: 36
3298 19:59:41.065678 [Byte1]: 36
3299 19:59:41.070179
3300 19:59:41.070466 Set Vref, RX VrefLevel [Byte0]: 37
3301 19:59:41.073305 [Byte1]: 37
3302 19:59:41.077747
3303 19:59:41.078036 Set Vref, RX VrefLevel [Byte0]: 38
3304 19:59:41.081407 [Byte1]: 38
3305 19:59:41.085997
3306 19:59:41.086388 Set Vref, RX VrefLevel [Byte0]: 39
3307 19:59:41.088904 [Byte1]: 39
3308 19:59:41.093662
3309 19:59:41.093961 Set Vref, RX VrefLevel [Byte0]: 40
3310 19:59:41.097022 [Byte1]: 40
3311 19:59:41.101551
3312 19:59:41.101837 Set Vref, RX VrefLevel [Byte0]: 41
3313 19:59:41.104886 [Byte1]: 41
3314 19:59:41.109662
3315 19:59:41.110034 Set Vref, RX VrefLevel [Byte0]: 42
3316 19:59:41.113023 [Byte1]: 42
3317 19:59:41.117258
3318 19:59:41.117701 Set Vref, RX VrefLevel [Byte0]: 43
3319 19:59:41.120510 [Byte1]: 43
3320 19:59:41.124956
3321 19:59:41.125495 Set Vref, RX VrefLevel [Byte0]: 44
3322 19:59:41.128894 [Byte1]: 44
3323 19:59:41.133110
3324 19:59:41.133512 Set Vref, RX VrefLevel [Byte0]: 45
3325 19:59:41.135977 [Byte1]: 45
3326 19:59:41.140840
3327 19:59:41.141246 Set Vref, RX VrefLevel [Byte0]: 46
3328 19:59:41.144168 [Byte1]: 46
3329 19:59:41.148990
3330 19:59:41.149392 Set Vref, RX VrefLevel [Byte0]: 47
3331 19:59:41.152196 [Byte1]: 47
3332 19:59:41.156447
3333 19:59:41.156888 Set Vref, RX VrefLevel [Byte0]: 48
3334 19:59:41.160107 [Byte1]: 48
3335 19:59:41.164610
3336 19:59:41.165052 Set Vref, RX VrefLevel [Byte0]: 49
3337 19:59:41.167817 [Byte1]: 49
3338 19:59:41.172354
3339 19:59:41.172757 Set Vref, RX VrefLevel [Byte0]: 50
3340 19:59:41.175439 [Byte1]: 50
3341 19:59:41.179969
3342 19:59:41.180373 Set Vref, RX VrefLevel [Byte0]: 51
3343 19:59:41.183188 [Byte1]: 51
3344 19:59:41.187835
3345 19:59:41.188241 Set Vref, RX VrefLevel [Byte0]: 52
3346 19:59:41.191314 [Byte1]: 52
3347 19:59:41.196121
3348 19:59:41.196539 Set Vref, RX VrefLevel [Byte0]: 53
3349 19:59:41.199212 [Byte1]: 53
3350 19:59:41.203845
3351 19:59:41.204249 Set Vref, RX VrefLevel [Byte0]: 54
3352 19:59:41.207236 [Byte1]: 54
3353 19:59:41.211492
3354 19:59:41.211905 Set Vref, RX VrefLevel [Byte0]: 55
3355 19:59:41.215138 [Byte1]: 55
3356 19:59:41.219745
3357 19:59:41.220211 Set Vref, RX VrefLevel [Byte0]: 56
3358 19:59:41.222779 [Byte1]: 56
3359 19:59:41.227531
3360 19:59:41.228001 Set Vref, RX VrefLevel [Byte0]: 57
3361 19:59:41.230818 [Byte1]: 57
3362 19:59:41.235579
3363 19:59:41.235994 Set Vref, RX VrefLevel [Byte0]: 58
3364 19:59:41.239046 [Byte1]: 58
3365 19:59:41.242926
3366 19:59:41.243334 Set Vref, RX VrefLevel [Byte0]: 59
3367 19:59:41.246329 [Byte1]: 59
3368 19:59:41.250955
3369 19:59:41.251459 Set Vref, RX VrefLevel [Byte0]: 60
3370 19:59:41.254664 [Byte1]: 60
3371 19:59:41.259282
3372 19:59:41.259807 Set Vref, RX VrefLevel [Byte0]: 61
3373 19:59:41.262501 [Byte1]: 61
3374 19:59:41.266814
3375 19:59:41.267319 Set Vref, RX VrefLevel [Byte0]: 62
3376 19:59:41.270424 [Byte1]: 62
3377 19:59:41.274923
3378 19:59:41.275423 Set Vref, RX VrefLevel [Byte0]: 63
3379 19:59:41.277941 [Byte1]: 63
3380 19:59:41.282629
3381 19:59:41.283130 Set Vref, RX VrefLevel [Byte0]: 64
3382 19:59:41.286081 [Byte1]: 64
3383 19:59:41.290984
3384 19:59:41.291481 Set Vref, RX VrefLevel [Byte0]: 65
3385 19:59:41.294164 [Byte1]: 65
3386 19:59:41.298559
3387 19:59:41.299059 Set Vref, RX VrefLevel [Byte0]: 66
3388 19:59:41.301748 [Byte1]: 66
3389 19:59:41.306253
3390 19:59:41.306751 Set Vref, RX VrefLevel [Byte0]: 67
3391 19:59:41.309357 [Byte1]: 67
3392 19:59:41.314472
3393 19:59:41.314973 Set Vref, RX VrefLevel [Byte0]: 68
3394 19:59:41.317434 [Byte1]: 68
3395 19:59:41.321670
3396 19:59:41.322177 Final RX Vref Byte 0 = 55 to rank0
3397 19:59:41.325500 Final RX Vref Byte 1 = 48 to rank0
3398 19:59:41.328197 Final RX Vref Byte 0 = 55 to rank1
3399 19:59:41.332016 Final RX Vref Byte 1 = 48 to rank1==
3400 19:59:41.335701 Dram Type= 6, Freq= 0, CH_1, rank 0
3401 19:59:41.338773 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3402 19:59:41.341916 ==
3403 19:59:41.342416 DQS Delay:
3404 19:59:41.342741 DQS0 = 0, DQS1 = 0
3405 19:59:41.345212 DQM Delay:
3406 19:59:41.345714 DQM0 = 119, DQM1 = 116
3407 19:59:41.348103 DQ Delay:
3408 19:59:41.351433 DQ0 =124, DQ1 =114, DQ2 =110, DQ3 =116
3409 19:59:41.354990 DQ4 =118, DQ5 =128, DQ6 =128, DQ7 =120
3410 19:59:41.358321 DQ8 =102, DQ9 =106, DQ10 =118, DQ11 =108
3411 19:59:41.361604 DQ12 =122, DQ13 =124, DQ14 =124, DQ15 =126
3412 19:59:41.362014
3413 19:59:41.362340
3414 19:59:41.368705 [DQSOSCAuto] RK0, (LSB)MR18= 0x315, (MSB)MR19= 0x404, tDQSOscB0 = 401 ps tDQSOscB1 = 408 ps
3415 19:59:41.371294 CH1 RK0: MR19=404, MR18=315
3416 19:59:41.377804 CH1_RK0: MR19=0x404, MR18=0x315, DQSOSC=401, MR23=63, INC=40, DEC=27
3417 19:59:41.378362
3418 19:59:41.381740 ----->DramcWriteLeveling(PI) begin...
3419 19:59:41.382155 ==
3420 19:59:41.384831 Dram Type= 6, Freq= 0, CH_1, rank 1
3421 19:59:41.388629 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3422 19:59:41.389283 ==
3423 19:59:41.391578 Write leveling (Byte 0): 26 => 26
3424 19:59:41.394845 Write leveling (Byte 1): 27 => 27
3425 19:59:41.398284 DramcWriteLeveling(PI) end<-----
3426 19:59:41.398699
3427 19:59:41.399028 ==
3428 19:59:41.401510 Dram Type= 6, Freq= 0, CH_1, rank 1
3429 19:59:41.408268 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3430 19:59:41.408776 ==
3431 19:59:41.409265 [Gating] SW mode calibration
3432 19:59:41.419000 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3433 19:59:41.421561 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3434 19:59:41.424909 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3435 19:59:41.431435 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3436 19:59:41.435150 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3437 19:59:41.438223 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3438 19:59:41.444973 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3439 19:59:41.447961 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3440 19:59:41.451513 0 15 24 | B1->B0 | 2d2d 3434 | 0 0 | (1 0) (0 1)
3441 19:59:41.458480 0 15 28 | B1->B0 | 2323 2727 | 0 0 | (0 0) (1 0)
3442 19:59:41.461555 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3443 19:59:41.464922 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3444 19:59:41.471752 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3445 19:59:41.474616 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3446 19:59:41.478134 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3447 19:59:41.485548 1 0 20 | B1->B0 | 2b2b 2323 | 1 0 | (0 0) (0 0)
3448 19:59:41.488251 1 0 24 | B1->B0 | 4343 2727 | 0 0 | (0 0) (0 0)
3449 19:59:41.491265 1 0 28 | B1->B0 | 4646 4444 | 0 0 | (0 0) (0 0)
3450 19:59:41.498241 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3451 19:59:41.501529 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3452 19:59:41.505462 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3453 19:59:41.508580 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3454 19:59:41.514536 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3455 19:59:41.517900 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3456 19:59:41.521488 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
3457 19:59:41.527990 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
3458 19:59:41.531739 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3459 19:59:41.534768 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3460 19:59:41.541303 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3461 19:59:41.544206 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3462 19:59:41.547856 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3463 19:59:41.554648 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3464 19:59:41.558136 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3465 19:59:41.561719 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3466 19:59:41.568408 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3467 19:59:41.571720 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3468 19:59:41.575384 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3469 19:59:41.581153 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3470 19:59:41.584372 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3471 19:59:41.588095 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
3472 19:59:41.594651 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3473 19:59:41.597866 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3474 19:59:41.601560 Total UI for P1: 0, mck2ui 16
3475 19:59:41.604630 best dqsien dly found for B0: ( 1, 3, 24)
3476 19:59:41.607980 Total UI for P1: 0, mck2ui 16
3477 19:59:41.611210 best dqsien dly found for B1: ( 1, 3, 22)
3478 19:59:41.614781 best DQS0 dly(MCK, UI, PI) = (1, 3, 24)
3479 19:59:41.617812 best DQS1 dly(MCK, UI, PI) = (1, 3, 22)
3480 19:59:41.618232
3481 19:59:41.620856 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 24)
3482 19:59:41.624680 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 22)
3483 19:59:41.627620 [Gating] SW calibration Done
3484 19:59:41.628067 ==
3485 19:59:41.631052 Dram Type= 6, Freq= 0, CH_1, rank 1
3486 19:59:41.634392 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3487 19:59:41.637377 ==
3488 19:59:41.637792 RX Vref Scan: 0
3489 19:59:41.638120
3490 19:59:41.640575 RX Vref 0 -> 0, step: 1
3491 19:59:41.640990
3492 19:59:41.644541 RX Delay -40 -> 252, step: 8
3493 19:59:41.647663 iDelay=200, Bit 0, Center 123 (56 ~ 191) 136
3494 19:59:41.650665 iDelay=200, Bit 1, Center 115 (48 ~ 183) 136
3495 19:59:41.653694 iDelay=200, Bit 2, Center 107 (40 ~ 175) 136
3496 19:59:41.657427 iDelay=200, Bit 3, Center 119 (56 ~ 183) 128
3497 19:59:41.664043 iDelay=200, Bit 4, Center 115 (48 ~ 183) 136
3498 19:59:41.667074 iDelay=200, Bit 5, Center 131 (64 ~ 199) 136
3499 19:59:41.670927 iDelay=200, Bit 6, Center 131 (64 ~ 199) 136
3500 19:59:41.674322 iDelay=200, Bit 7, Center 123 (56 ~ 191) 136
3501 19:59:41.677306 iDelay=200, Bit 8, Center 107 (40 ~ 175) 136
3502 19:59:41.684316 iDelay=200, Bit 9, Center 107 (40 ~ 175) 136
3503 19:59:41.687062 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
3504 19:59:41.690767 iDelay=200, Bit 11, Center 115 (48 ~ 183) 136
3505 19:59:41.693721 iDelay=200, Bit 12, Center 127 (56 ~ 199) 144
3506 19:59:41.697241 iDelay=200, Bit 13, Center 127 (64 ~ 191) 128
3507 19:59:41.703902 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
3508 19:59:41.707046 iDelay=200, Bit 15, Center 123 (56 ~ 191) 136
3509 19:59:41.707558 ==
3510 19:59:41.710083 Dram Type= 6, Freq= 0, CH_1, rank 1
3511 19:59:41.713535 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3512 19:59:41.713947 ==
3513 19:59:41.716846 DQS Delay:
3514 19:59:41.717413 DQS0 = 0, DQS1 = 0
3515 19:59:41.717763 DQM Delay:
3516 19:59:41.720806 DQM0 = 120, DQM1 = 118
3517 19:59:41.721217 DQ Delay:
3518 19:59:41.724346 DQ0 =123, DQ1 =115, DQ2 =107, DQ3 =119
3519 19:59:41.727251 DQ4 =115, DQ5 =131, DQ6 =131, DQ7 =123
3520 19:59:41.730211 DQ8 =107, DQ9 =107, DQ10 =115, DQ11 =115
3521 19:59:41.737253 DQ12 =127, DQ13 =127, DQ14 =123, DQ15 =123
3522 19:59:41.737746
3523 19:59:41.738118
3524 19:59:41.738425 ==
3525 19:59:41.740453 Dram Type= 6, Freq= 0, CH_1, rank 1
3526 19:59:41.743620 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3527 19:59:41.744059 ==
3528 19:59:41.744383
3529 19:59:41.744678
3530 19:59:41.747500 TX Vref Scan disable
3531 19:59:41.747975 == TX Byte 0 ==
3532 19:59:41.753557 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3533 19:59:41.757185 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3534 19:59:41.757594 == TX Byte 1 ==
3535 19:59:41.764006 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3536 19:59:41.767015 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3537 19:59:41.767440 ==
3538 19:59:41.770671 Dram Type= 6, Freq= 0, CH_1, rank 1
3539 19:59:41.773846 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3540 19:59:41.774285 ==
3541 19:59:41.786484 TX Vref=22, minBit 0, minWin=26, winSum=420
3542 19:59:41.789607 TX Vref=24, minBit 9, minWin=25, winSum=426
3543 19:59:41.792858 TX Vref=26, minBit 2, minWin=26, winSum=426
3544 19:59:41.796044 TX Vref=28, minBit 2, minWin=26, winSum=433
3545 19:59:41.799346 TX Vref=30, minBit 10, minWin=25, winSum=429
3546 19:59:41.806005 TX Vref=32, minBit 9, minWin=26, winSum=434
3547 19:59:41.809152 [TxChooseVref] Worse bit 9, Min win 26, Win sum 434, Final Vref 32
3548 19:59:41.809604
3549 19:59:41.812714 Final TX Range 1 Vref 32
3550 19:59:41.813137
3551 19:59:41.813566 ==
3552 19:59:41.816046 Dram Type= 6, Freq= 0, CH_1, rank 1
3553 19:59:41.819411 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3554 19:59:41.822371 ==
3555 19:59:41.822790
3556 19:59:41.823263
3557 19:59:41.823700 TX Vref Scan disable
3558 19:59:41.825837 == TX Byte 0 ==
3559 19:59:41.829071 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3560 19:59:41.832485 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3561 19:59:41.836111 == TX Byte 1 ==
3562 19:59:41.839087 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3563 19:59:41.845920 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3564 19:59:41.846577
3565 19:59:41.846970 [DATLAT]
3566 19:59:41.847282 Freq=1200, CH1 RK1
3567 19:59:41.847579
3568 19:59:41.849641 DATLAT Default: 0xd
3569 19:59:41.850047 0, 0xFFFF, sum = 0
3570 19:59:41.852698 1, 0xFFFF, sum = 0
3571 19:59:41.853162 2, 0xFFFF, sum = 0
3572 19:59:41.855914 3, 0xFFFF, sum = 0
3573 19:59:41.859181 4, 0xFFFF, sum = 0
3574 19:59:41.859770 5, 0xFFFF, sum = 0
3575 19:59:41.862506 6, 0xFFFF, sum = 0
3576 19:59:41.862949 7, 0xFFFF, sum = 0
3577 19:59:41.866150 8, 0xFFFF, sum = 0
3578 19:59:41.866560 9, 0xFFFF, sum = 0
3579 19:59:41.869061 10, 0xFFFF, sum = 0
3580 19:59:41.869617 11, 0xFFFF, sum = 0
3581 19:59:41.872666 12, 0x0, sum = 1
3582 19:59:41.873074 13, 0x0, sum = 2
3583 19:59:41.875678 14, 0x0, sum = 3
3584 19:59:41.876110 15, 0x0, sum = 4
3585 19:59:41.876635 best_step = 13
3586 19:59:41.879414
3587 19:59:41.879863 ==
3588 19:59:41.882512 Dram Type= 6, Freq= 0, CH_1, rank 1
3589 19:59:41.885753 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3590 19:59:41.886278 ==
3591 19:59:41.886717 RX Vref Scan: 0
3592 19:59:41.887121
3593 19:59:41.889222 RX Vref 0 -> 0, step: 1
3594 19:59:41.889640
3595 19:59:41.892515 RX Delay -5 -> 252, step: 4
3596 19:59:41.896269 iDelay=195, Bit 0, Center 122 (59 ~ 186) 128
3597 19:59:41.902560 iDelay=195, Bit 1, Center 116 (55 ~ 178) 124
3598 19:59:41.906005 iDelay=195, Bit 2, Center 110 (51 ~ 170) 120
3599 19:59:41.909138 iDelay=195, Bit 3, Center 116 (59 ~ 174) 116
3600 19:59:41.912323 iDelay=195, Bit 4, Center 118 (59 ~ 178) 120
3601 19:59:41.916468 iDelay=195, Bit 5, Center 130 (67 ~ 194) 128
3602 19:59:41.918962 iDelay=195, Bit 6, Center 130 (67 ~ 194) 128
3603 19:59:41.925883 iDelay=195, Bit 7, Center 120 (59 ~ 182) 124
3604 19:59:41.929253 iDelay=195, Bit 8, Center 106 (47 ~ 166) 120
3605 19:59:41.932108 iDelay=195, Bit 9, Center 106 (47 ~ 166) 120
3606 19:59:41.935851 iDelay=195, Bit 10, Center 116 (55 ~ 178) 124
3607 19:59:41.942686 iDelay=195, Bit 11, Center 110 (51 ~ 170) 120
3608 19:59:41.945713 iDelay=195, Bit 12, Center 126 (63 ~ 190) 128
3609 19:59:41.948993 iDelay=195, Bit 13, Center 124 (67 ~ 182) 116
3610 19:59:41.952443 iDelay=195, Bit 14, Center 122 (63 ~ 182) 120
3611 19:59:41.955761 iDelay=195, Bit 15, Center 126 (67 ~ 186) 120
3612 19:59:41.956179 ==
3613 19:59:41.958844 Dram Type= 6, Freq= 0, CH_1, rank 1
3614 19:59:41.965948 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3615 19:59:41.966359 ==
3616 19:59:41.966685 DQS Delay:
3617 19:59:41.969121 DQS0 = 0, DQS1 = 0
3618 19:59:41.969531 DQM Delay:
3619 19:59:41.972181 DQM0 = 120, DQM1 = 117
3620 19:59:41.972587 DQ Delay:
3621 19:59:41.975542 DQ0 =122, DQ1 =116, DQ2 =110, DQ3 =116
3622 19:59:41.979149 DQ4 =118, DQ5 =130, DQ6 =130, DQ7 =120
3623 19:59:41.982739 DQ8 =106, DQ9 =106, DQ10 =116, DQ11 =110
3624 19:59:41.985962 DQ12 =126, DQ13 =124, DQ14 =122, DQ15 =126
3625 19:59:41.986476
3626 19:59:41.986908
3627 19:59:41.995834 [DQSOSCAuto] RK1, (LSB)MR18= 0x10ed, (MSB)MR19= 0x403, tDQSOscB0 = 417 ps tDQSOscB1 = 403 ps
3628 19:59:41.996284 CH1 RK1: MR19=403, MR18=10ED
3629 19:59:42.002852 CH1_RK1: MR19=0x403, MR18=0x10ED, DQSOSC=403, MR23=63, INC=40, DEC=26
3630 19:59:42.005608 [RxdqsGatingPostProcess] freq 1200
3631 19:59:42.012347 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3632 19:59:42.015422 best DQS0 dly(2T, 0.5T) = (0, 11)
3633 19:59:42.019417 best DQS1 dly(2T, 0.5T) = (0, 11)
3634 19:59:42.022625 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3635 19:59:42.026045 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3636 19:59:42.028872 best DQS0 dly(2T, 0.5T) = (0, 11)
3637 19:59:42.032406 best DQS1 dly(2T, 0.5T) = (0, 11)
3638 19:59:42.032868 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3639 19:59:42.035398 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3640 19:59:42.039004 Pre-setting of DQS Precalculation
3641 19:59:42.045548 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3642 19:59:42.052350 sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2
3643 19:59:42.058926 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
3644 19:59:42.059351
3645 19:59:42.059867
3646 19:59:42.062480 [Calibration Summary] 2400 Mbps
3647 19:59:42.065482 CH 0, Rank 0
3648 19:59:42.065905 SW Impedance : PASS
3649 19:59:42.069157 DUTY Scan : NO K
3650 19:59:42.072434 ZQ Calibration : PASS
3651 19:59:42.072851 Jitter Meter : NO K
3652 19:59:42.075570 CBT Training : PASS
3653 19:59:42.076028 Write leveling : PASS
3654 19:59:42.079130 RX DQS gating : PASS
3655 19:59:42.081917 RX DQ/DQS(RDDQC) : PASS
3656 19:59:42.082333 TX DQ/DQS : PASS
3657 19:59:42.085464 RX DATLAT : PASS
3658 19:59:42.088720 RX DQ/DQS(Engine): PASS
3659 19:59:42.089144 TX OE : NO K
3660 19:59:42.091930 All Pass.
3661 19:59:42.092350
3662 19:59:42.092777 CH 0, Rank 1
3663 19:59:42.095877 SW Impedance : PASS
3664 19:59:42.096295 DUTY Scan : NO K
3665 19:59:42.099068 ZQ Calibration : PASS
3666 19:59:42.102168 Jitter Meter : NO K
3667 19:59:42.102595 CBT Training : PASS
3668 19:59:42.105185 Write leveling : PASS
3669 19:59:42.108654 RX DQS gating : PASS
3670 19:59:42.108966 RX DQ/DQS(RDDQC) : PASS
3671 19:59:42.111530 TX DQ/DQS : PASS
3672 19:59:42.115120 RX DATLAT : PASS
3673 19:59:42.115375 RX DQ/DQS(Engine): PASS
3674 19:59:42.118408 TX OE : NO K
3675 19:59:42.118584 All Pass.
3676 19:59:42.118723
3677 19:59:42.121667 CH 1, Rank 0
3678 19:59:42.121842 SW Impedance : PASS
3679 19:59:42.125670 DUTY Scan : NO K
3680 19:59:42.125896 ZQ Calibration : PASS
3681 19:59:42.128506 Jitter Meter : NO K
3682 19:59:42.131663 CBT Training : PASS
3683 19:59:42.131812 Write leveling : PASS
3684 19:59:42.135050 RX DQS gating : PASS
3685 19:59:42.138180 RX DQ/DQS(RDDQC) : PASS
3686 19:59:42.138327 TX DQ/DQS : PASS
3687 19:59:42.141389 RX DATLAT : PASS
3688 19:59:42.145009 RX DQ/DQS(Engine): PASS
3689 19:59:42.145155 TX OE : NO K
3690 19:59:42.148048 All Pass.
3691 19:59:42.148194
3692 19:59:42.148310 CH 1, Rank 1
3693 19:59:42.151343 SW Impedance : PASS
3694 19:59:42.151489 DUTY Scan : NO K
3695 19:59:42.155032 ZQ Calibration : PASS
3696 19:59:42.158131 Jitter Meter : NO K
3697 19:59:42.158258 CBT Training : PASS
3698 19:59:42.161120 Write leveling : PASS
3699 19:59:42.164773 RX DQS gating : PASS
3700 19:59:42.164899 RX DQ/DQS(RDDQC) : PASS
3701 19:59:42.167889 TX DQ/DQS : PASS
3702 19:59:42.171510 RX DATLAT : PASS
3703 19:59:42.171646 RX DQ/DQS(Engine): PASS
3704 19:59:42.174695 TX OE : NO K
3705 19:59:42.174877 All Pass.
3706 19:59:42.174984
3707 19:59:42.178558 DramC Write-DBI off
3708 19:59:42.181110 PER_BANK_REFRESH: Hybrid Mode
3709 19:59:42.181268 TX_TRACKING: ON
3710 19:59:42.191477 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1
3711 19:59:42.194615 [FAST_K] Save calibration result to emmc
3712 19:59:42.197654 dramc_set_vcore_voltage set vcore to 650000
3713 19:59:42.201539 Read voltage for 600, 5
3714 19:59:42.201648 Vio18 = 0
3715 19:59:42.201737 Vcore = 650000
3716 19:59:42.204805 Vdram = 0
3717 19:59:42.204915 Vddq = 0
3718 19:59:42.205002 Vmddr = 0
3719 19:59:42.211168 [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0
3720 19:59:42.214232 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
3721 19:59:42.217728 MEM_TYPE=3, freq_sel=19
3722 19:59:42.221235 sv_algorithm_assistance_LP4_1600
3723 19:59:42.224239 ============ PULL DRAM RESETB DOWN ============
3724 19:59:42.227456 ========== PULL DRAM RESETB DOWN end =========
3725 19:59:42.234563 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3726 19:59:42.237777 ===================================
3727 19:59:42.237888 LPDDR4 DRAM CONFIGURATION
3728 19:59:42.240991 ===================================
3729 19:59:42.244151 EX_ROW_EN[0] = 0x0
3730 19:59:42.247979 EX_ROW_EN[1] = 0x0
3731 19:59:42.248093 LP4Y_EN = 0x0
3732 19:59:42.251162 WORK_FSP = 0x0
3733 19:59:42.251276 WL = 0x2
3734 19:59:42.254810 RL = 0x2
3735 19:59:42.254924 BL = 0x2
3736 19:59:42.257855 RPST = 0x0
3737 19:59:42.257968 RD_PRE = 0x0
3738 19:59:42.260973 WR_PRE = 0x1
3739 19:59:42.261086 WR_PST = 0x0
3740 19:59:42.264611 DBI_WR = 0x0
3741 19:59:42.264737 DBI_RD = 0x0
3742 19:59:42.268066 OTF = 0x1
3743 19:59:42.271104 ===================================
3744 19:59:42.275035 ===================================
3745 19:59:42.275282 ANA top config
3746 19:59:42.278117 ===================================
3747 19:59:42.281463 DLL_ASYNC_EN = 0
3748 19:59:42.285272 ALL_SLAVE_EN = 1
3749 19:59:42.285574 NEW_RANK_MODE = 1
3750 19:59:42.287914 DLL_IDLE_MODE = 1
3751 19:59:42.291380 LP45_APHY_COMB_EN = 1
3752 19:59:42.294331 TX_ODT_DIS = 1
3753 19:59:42.297795 NEW_8X_MODE = 1
3754 19:59:42.300915 ===================================
3755 19:59:42.304191 ===================================
3756 19:59:42.304273 data_rate = 1200
3757 19:59:42.307817 CKR = 1
3758 19:59:42.311037 DQ_P2S_RATIO = 8
3759 19:59:42.314131 ===================================
3760 19:59:42.317369 CA_P2S_RATIO = 8
3761 19:59:42.320674 DQ_CA_OPEN = 0
3762 19:59:42.324280 DQ_SEMI_OPEN = 0
3763 19:59:42.324362 CA_SEMI_OPEN = 0
3764 19:59:42.327618 CA_FULL_RATE = 0
3765 19:59:42.330909 DQ_CKDIV4_EN = 1
3766 19:59:42.334173 CA_CKDIV4_EN = 1
3767 19:59:42.337984 CA_PREDIV_EN = 0
3768 19:59:42.341362 PH8_DLY = 0
3769 19:59:42.341448 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
3770 19:59:42.344464 DQ_AAMCK_DIV = 4
3771 19:59:42.347854 CA_AAMCK_DIV = 4
3772 19:59:42.350986 CA_ADMCK_DIV = 4
3773 19:59:42.354083 DQ_TRACK_CA_EN = 0
3774 19:59:42.357784 CA_PICK = 600
3775 19:59:42.357866 CA_MCKIO = 600
3776 19:59:42.360923 MCKIO_SEMI = 0
3777 19:59:42.364445 PLL_FREQ = 2288
3778 19:59:42.367655 DQ_UI_PI_RATIO = 32
3779 19:59:42.370774 CA_UI_PI_RATIO = 0
3780 19:59:42.374513 ===================================
3781 19:59:42.377484 ===================================
3782 19:59:42.381206 memory_type:LPDDR4
3783 19:59:42.381288 GP_NUM : 10
3784 19:59:42.384518 SRAM_EN : 1
3785 19:59:42.384600 MD32_EN : 0
3786 19:59:42.387674 ===================================
3787 19:59:42.391118 [ANA_INIT] >>>>>>>>>>>>>>
3788 19:59:42.394359 <<<<<< [CONFIGURE PHASE]: ANA_TX
3789 19:59:42.397567 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
3790 19:59:42.400575 ===================================
3791 19:59:42.404019 data_rate = 1200,PCW = 0X5800
3792 19:59:42.407722 ===================================
3793 19:59:42.411038 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
3794 19:59:42.414301 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3795 19:59:42.420911 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3796 19:59:42.427988 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
3797 19:59:42.430974 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
3798 19:59:42.434656 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
3799 19:59:42.434847 [ANA_INIT] flow start
3800 19:59:42.437618 [ANA_INIT] PLL >>>>>>>>
3801 19:59:42.440841 [ANA_INIT] PLL <<<<<<<<
3802 19:59:42.441040 [ANA_INIT] MIDPI >>>>>>>>
3803 19:59:42.444441 [ANA_INIT] MIDPI <<<<<<<<
3804 19:59:42.447716 [ANA_INIT] DLL >>>>>>>>
3805 19:59:42.447944 [ANA_INIT] flow end
3806 19:59:42.454539 ============ LP4 DIFF to SE enter ============
3807 19:59:42.457544 ============ LP4 DIFF to SE exit ============
3808 19:59:42.457822 [ANA_INIT] <<<<<<<<<<<<<
3809 19:59:42.460739 [Flow] Enable top DCM control >>>>>
3810 19:59:42.464519 [Flow] Enable top DCM control <<<<<
3811 19:59:42.467630 Enable DLL master slave shuffle
3812 19:59:42.474484 ==============================================================
3813 19:59:42.477738 Gating Mode config
3814 19:59:42.480574 ==============================================================
3815 19:59:42.484221 Config description:
3816 19:59:42.495128 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
3817 19:59:42.501276 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
3818 19:59:42.504505 SELPH_MODE 0: By rank 1: By Phase
3819 19:59:42.511041 ==============================================================
3820 19:59:42.514550 GAT_TRACK_EN = 1
3821 19:59:42.517389 RX_GATING_MODE = 2
3822 19:59:42.517808 RX_GATING_TRACK_MODE = 2
3823 19:59:42.520988 SELPH_MODE = 1
3824 19:59:42.524165 PICG_EARLY_EN = 1
3825 19:59:42.527681 VALID_LAT_VALUE = 1
3826 19:59:42.533919 ==============================================================
3827 19:59:42.537976 Enter into Gating configuration >>>>
3828 19:59:42.541057 Exit from Gating configuration <<<<
3829 19:59:42.543829 Enter into DVFS_PRE_config >>>>>
3830 19:59:42.554230 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
3831 19:59:42.557391 Exit from DVFS_PRE_config <<<<<
3832 19:59:42.560386 Enter into PICG configuration >>>>
3833 19:59:42.563590 Exit from PICG configuration <<<<
3834 19:59:42.567721 [RX_INPUT] configuration >>>>>
3835 19:59:42.571038 [RX_INPUT] configuration <<<<<
3836 19:59:42.573901 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
3837 19:59:42.580846 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
3838 19:59:42.587763 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
3839 19:59:42.593938 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
3840 19:59:42.597349 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
3841 19:59:42.603783 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
3842 19:59:42.607453 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
3843 19:59:42.613890 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
3844 19:59:42.617406 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
3845 19:59:42.620533 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
3846 19:59:42.623679 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
3847 19:59:42.629996 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3848 19:59:42.633465 ===================================
3849 19:59:42.637151 LPDDR4 DRAM CONFIGURATION
3850 19:59:42.639938 ===================================
3851 19:59:42.640363 EX_ROW_EN[0] = 0x0
3852 19:59:42.643350 EX_ROW_EN[1] = 0x0
3853 19:59:42.643803 LP4Y_EN = 0x0
3854 19:59:42.646502 WORK_FSP = 0x0
3855 19:59:42.646920 WL = 0x2
3856 19:59:42.649802 RL = 0x2
3857 19:59:42.650224 BL = 0x2
3858 19:59:42.653606 RPST = 0x0
3859 19:59:42.654025 RD_PRE = 0x0
3860 19:59:42.656699 WR_PRE = 0x1
3861 19:59:42.657118 WR_PST = 0x0
3862 19:59:42.660282 DBI_WR = 0x0
3863 19:59:42.660701 DBI_RD = 0x0
3864 19:59:42.663527 OTF = 0x1
3865 19:59:42.666676 ===================================
3866 19:59:42.669860 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
3867 19:59:42.673073 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
3868 19:59:42.679869 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3869 19:59:42.683579 ===================================
3870 19:59:42.684167 LPDDR4 DRAM CONFIGURATION
3871 19:59:42.686683 ===================================
3872 19:59:42.690260 EX_ROW_EN[0] = 0x10
3873 19:59:42.693296 EX_ROW_EN[1] = 0x0
3874 19:59:42.693821 LP4Y_EN = 0x0
3875 19:59:42.696332 WORK_FSP = 0x0
3876 19:59:42.696752 WL = 0x2
3877 19:59:42.700512 RL = 0x2
3878 19:59:42.701032 BL = 0x2
3879 19:59:42.703694 RPST = 0x0
3880 19:59:42.704214 RD_PRE = 0x0
3881 19:59:42.706607 WR_PRE = 0x1
3882 19:59:42.707125 WR_PST = 0x0
3883 19:59:42.710155 DBI_WR = 0x0
3884 19:59:42.710675 DBI_RD = 0x0
3885 19:59:42.713087 OTF = 0x1
3886 19:59:42.716720 ===================================
3887 19:59:42.723074 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
3888 19:59:42.727106 nWR fixed to 30
3889 19:59:42.727626 [ModeRegInit_LP4] CH0 RK0
3890 19:59:42.729836 [ModeRegInit_LP4] CH0 RK1
3891 19:59:42.733576 [ModeRegInit_LP4] CH1 RK0
3892 19:59:42.736880 [ModeRegInit_LP4] CH1 RK1
3893 19:59:42.737403 match AC timing 17
3894 19:59:42.743508 dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 1
3895 19:59:42.746347 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3896 19:59:42.749438 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
3897 19:59:42.756079 [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17
3898 19:59:42.759923 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
3899 19:59:42.760331 ==
3900 19:59:42.763059 Dram Type= 6, Freq= 0, CH_0, rank 0
3901 19:59:42.766350 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3902 19:59:42.766775 ==
3903 19:59:42.772746 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3904 19:59:42.779606 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
3905 19:59:42.783382 [CA 0] Center 35 (5~66) winsize 62
3906 19:59:42.786615 [CA 1] Center 35 (5~66) winsize 62
3907 19:59:42.789808 [CA 2] Center 33 (3~64) winsize 62
3908 19:59:42.792734 [CA 3] Center 33 (2~64) winsize 63
3909 19:59:42.795831 [CA 4] Center 33 (2~64) winsize 63
3910 19:59:42.798967 [CA 5] Center 32 (2~63) winsize 62
3911 19:59:42.799388
3912 19:59:42.802681 [CmdBusTrainingLP45] Vref(ca) range 1: 37
3913 19:59:42.803175
3914 19:59:42.806009 [CATrainingPosCal] consider 1 rank data
3915 19:59:42.808886 u2DelayCellTimex100 = 270/100 ps
3916 19:59:42.812753 CA0 delay=35 (5~66),Diff = 3 PI (28 cell)
3917 19:59:42.815799 CA1 delay=35 (5~66),Diff = 3 PI (28 cell)
3918 19:59:42.819345 CA2 delay=33 (3~64),Diff = 1 PI (9 cell)
3919 19:59:42.822165 CA3 delay=33 (2~64),Diff = 1 PI (9 cell)
3920 19:59:42.825625 CA4 delay=33 (2~64),Diff = 1 PI (9 cell)
3921 19:59:42.829719 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
3922 19:59:42.830096
3923 19:59:42.835614 CA PerBit enable=1, Macro0, CA PI delay=32
3924 19:59:42.835934
3925 19:59:42.836164 [CBTSetCACLKResult] CA Dly = 32
3926 19:59:42.839377 CS Dly: 5 (0~36)
3927 19:59:42.839836 ==
3928 19:59:42.842601 Dram Type= 6, Freq= 0, CH_0, rank 1
3929 19:59:42.845832 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3930 19:59:42.846217 ==
3931 19:59:42.852364 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3932 19:59:42.859179 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
3933 19:59:42.862048 [CA 0] Center 35 (5~66) winsize 62
3934 19:59:42.865734 [CA 1] Center 35 (5~66) winsize 62
3935 19:59:42.868896 [CA 2] Center 34 (3~65) winsize 63
3936 19:59:42.872297 [CA 3] Center 33 (3~64) winsize 62
3937 19:59:42.876359 [CA 4] Center 32 (2~63) winsize 62
3938 19:59:42.879416 [CA 5] Center 32 (2~63) winsize 62
3939 19:59:42.879967
3940 19:59:42.882737 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3941 19:59:42.883248
3942 19:59:42.885921 [CATrainingPosCal] consider 2 rank data
3943 19:59:42.888799 u2DelayCellTimex100 = 270/100 ps
3944 19:59:42.892408 CA0 delay=35 (5~66),Diff = 3 PI (28 cell)
3945 19:59:42.895837 CA1 delay=35 (5~66),Diff = 3 PI (28 cell)
3946 19:59:42.899409 CA2 delay=33 (3~64),Diff = 1 PI (9 cell)
3947 19:59:42.902689 CA3 delay=33 (3~64),Diff = 1 PI (9 cell)
3948 19:59:42.905892 CA4 delay=32 (2~63),Diff = 0 PI (0 cell)
3949 19:59:42.912470 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
3950 19:59:42.912880
3951 19:59:42.915879 CA PerBit enable=1, Macro0, CA PI delay=32
3952 19:59:42.916391
3953 19:59:42.918988 [CBTSetCACLKResult] CA Dly = 32
3954 19:59:42.919508 CS Dly: 5 (0~36)
3955 19:59:42.919886
3956 19:59:42.922182 ----->DramcWriteLeveling(PI) begin...
3957 19:59:42.922597 ==
3958 19:59:42.925142 Dram Type= 6, Freq= 0, CH_0, rank 0
3959 19:59:42.928898 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3960 19:59:42.932436 ==
3961 19:59:42.932964 Write leveling (Byte 0): 36 => 36
3962 19:59:42.935841 Write leveling (Byte 1): 29 => 29
3963 19:59:42.938910 DramcWriteLeveling(PI) end<-----
3964 19:59:42.939391
3965 19:59:42.939777 ==
3966 19:59:42.942131 Dram Type= 6, Freq= 0, CH_0, rank 0
3967 19:59:42.948551 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3968 19:59:42.948962 ==
3969 19:59:42.949290 [Gating] SW mode calibration
3970 19:59:42.958724 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
3971 19:59:42.962019 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
3972 19:59:42.965437 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3973 19:59:42.972033 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3974 19:59:42.975457 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3975 19:59:42.978539 0 9 12 | B1->B0 | 3434 2f2f | 1 0 | (1 1) (0 0)
3976 19:59:42.985456 0 9 16 | B1->B0 | 3030 2323 | 0 0 | (0 0) (0 0)
3977 19:59:42.988735 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3978 19:59:42.992015 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3979 19:59:42.998415 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3980 19:59:43.002170 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3981 19:59:43.005347 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3982 19:59:43.011820 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3983 19:59:43.015738 0 10 12 | B1->B0 | 2323 3a3a | 0 1 | (0 0) (0 0)
3984 19:59:43.018103 0 10 16 | B1->B0 | 3737 4646 | 0 0 | (0 0) (0 0)
3985 19:59:43.024821 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3986 19:59:43.028023 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3987 19:59:43.031189 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3988 19:59:43.037911 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3989 19:59:43.041103 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3990 19:59:43.044297 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3991 19:59:43.051270 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3992 19:59:43.054463 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
3993 19:59:43.057852 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3994 19:59:43.064339 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3995 19:59:43.067568 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3996 19:59:43.070952 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3997 19:59:43.077487 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3998 19:59:43.080918 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3999 19:59:43.083820 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4000 19:59:43.090762 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4001 19:59:43.093939 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4002 19:59:43.097231 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4003 19:59:43.104356 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4004 19:59:43.107602 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4005 19:59:43.110854 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4006 19:59:43.117030 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4007 19:59:43.120860 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4008 19:59:43.124128 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
4009 19:59:43.127154 Total UI for P1: 0, mck2ui 16
4010 19:59:43.130867 best dqsien dly found for B0: ( 0, 13, 12)
4011 19:59:43.137197 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4012 19:59:43.137299 Total UI for P1: 0, mck2ui 16
4013 19:59:43.140682 best dqsien dly found for B1: ( 0, 13, 18)
4014 19:59:43.147223 best DQS0 dly(MCK, UI, PI) = (0, 13, 12)
4015 19:59:43.150405 best DQS1 dly(MCK, UI, PI) = (0, 13, 18)
4016 19:59:43.150517
4017 19:59:43.153502 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 12)
4018 19:59:43.157141 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 18)
4019 19:59:43.160157 [Gating] SW calibration Done
4020 19:59:43.160257 ==
4021 19:59:43.163482 Dram Type= 6, Freq= 0, CH_0, rank 0
4022 19:59:43.166735 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4023 19:59:43.166837 ==
4024 19:59:43.170528 RX Vref Scan: 0
4025 19:59:43.170627
4026 19:59:43.170705 RX Vref 0 -> 0, step: 1
4027 19:59:43.170777
4028 19:59:43.173712 RX Delay -230 -> 252, step: 16
4029 19:59:43.180141 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4030 19:59:43.183394 iDelay=218, Bit 1, Center 57 (-102 ~ 217) 320
4031 19:59:43.186886 iDelay=218, Bit 2, Center 49 (-102 ~ 201) 304
4032 19:59:43.189797 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4033 19:59:43.193303 iDelay=218, Bit 4, Center 57 (-102 ~ 217) 320
4034 19:59:43.200249 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
4035 19:59:43.203458 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4036 19:59:43.206701 iDelay=218, Bit 7, Center 57 (-102 ~ 217) 320
4037 19:59:43.209890 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4038 19:59:43.217065 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4039 19:59:43.220286 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4040 19:59:43.223378 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4041 19:59:43.227111 iDelay=218, Bit 12, Center 49 (-102 ~ 201) 304
4042 19:59:43.230340 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4043 19:59:43.236563 iDelay=218, Bit 14, Center 57 (-102 ~ 217) 320
4044 19:59:43.239787 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4045 19:59:43.239896 ==
4046 19:59:43.243489 Dram Type= 6, Freq= 0, CH_0, rank 0
4047 19:59:43.247006 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4048 19:59:43.247140 ==
4049 19:59:43.250203 DQS Delay:
4050 19:59:43.250350 DQS0 = 0, DQS1 = 0
4051 19:59:43.253425 DQM Delay:
4052 19:59:43.253622 DQM0 = 52, DQM1 = 46
4053 19:59:43.253784 DQ Delay:
4054 19:59:43.256495 DQ0 =49, DQ1 =57, DQ2 =49, DQ3 =49
4055 19:59:43.260279 DQ4 =57, DQ5 =41, DQ6 =57, DQ7 =57
4056 19:59:43.263448 DQ8 =33, DQ9 =33, DQ10 =49, DQ11 =41
4057 19:59:43.266658 DQ12 =49, DQ13 =49, DQ14 =57, DQ15 =57
4058 19:59:43.266828
4059 19:59:43.266962
4060 19:59:43.267088 ==
4061 19:59:43.270411 Dram Type= 6, Freq= 0, CH_0, rank 0
4062 19:59:43.276571 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4063 19:59:43.276796 ==
4064 19:59:43.276989
4065 19:59:43.277172
4066 19:59:43.277353 TX Vref Scan disable
4067 19:59:43.280631 == TX Byte 0 ==
4068 19:59:43.283814 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4069 19:59:43.287544 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4070 19:59:43.290652 == TX Byte 1 ==
4071 19:59:43.293926 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4072 19:59:43.297649 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4073 19:59:43.300456 ==
4074 19:59:43.303951 Dram Type= 6, Freq= 0, CH_0, rank 0
4075 19:59:43.307020 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4076 19:59:43.307278 ==
4077 19:59:43.307464
4078 19:59:43.307680
4079 19:59:43.310917 TX Vref Scan disable
4080 19:59:43.314000 == TX Byte 0 ==
4081 19:59:43.317318 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4082 19:59:43.320372 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4083 19:59:43.323731 == TX Byte 1 ==
4084 19:59:43.327372 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4085 19:59:43.330580 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4086 19:59:43.330752
4087 19:59:43.330888 [DATLAT]
4088 19:59:43.333578 Freq=600, CH0 RK0
4089 19:59:43.333748
4090 19:59:43.333882 DATLAT Default: 0x9
4091 19:59:43.337469 0, 0xFFFF, sum = 0
4092 19:59:43.340658 1, 0xFFFF, sum = 0
4093 19:59:43.340804 2, 0xFFFF, sum = 0
4094 19:59:43.343601 3, 0xFFFF, sum = 0
4095 19:59:43.343764 4, 0xFFFF, sum = 0
4096 19:59:43.346836 5, 0xFFFF, sum = 0
4097 19:59:43.346967 6, 0xFFFF, sum = 0
4098 19:59:43.350108 7, 0xFFFF, sum = 0
4099 19:59:43.350219 8, 0x0, sum = 1
4100 19:59:43.354025 9, 0x0, sum = 2
4101 19:59:43.354136 10, 0x0, sum = 3
4102 19:59:43.354224 11, 0x0, sum = 4
4103 19:59:43.356927 best_step = 9
4104 19:59:43.357051
4105 19:59:43.357163 ==
4106 19:59:43.360436 Dram Type= 6, Freq= 0, CH_0, rank 0
4107 19:59:43.363498 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4108 19:59:43.363586 ==
4109 19:59:43.366703 RX Vref Scan: 1
4110 19:59:43.366791
4111 19:59:43.366861 RX Vref 0 -> 0, step: 1
4112 19:59:43.370095
4113 19:59:43.370183 RX Delay -163 -> 252, step: 8
4114 19:59:43.370253
4115 19:59:43.373889 Set Vref, RX VrefLevel [Byte0]: 54
4116 19:59:43.376974 [Byte1]: 45
4117 19:59:43.381402
4118 19:59:43.381517 Final RX Vref Byte 0 = 54 to rank0
4119 19:59:43.384621 Final RX Vref Byte 1 = 45 to rank0
4120 19:59:43.387535 Final RX Vref Byte 0 = 54 to rank1
4121 19:59:43.391128 Final RX Vref Byte 1 = 45 to rank1==
4122 19:59:43.394249 Dram Type= 6, Freq= 0, CH_0, rank 0
4123 19:59:43.400912 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4124 19:59:43.401007 ==
4125 19:59:43.401079 DQS Delay:
4126 19:59:43.401144 DQS0 = 0, DQS1 = 0
4127 19:59:43.404788 DQM Delay:
4128 19:59:43.404875 DQM0 = 53, DQM1 = 46
4129 19:59:43.407754 DQ Delay:
4130 19:59:43.410790 DQ0 =52, DQ1 =56, DQ2 =48, DQ3 =48
4131 19:59:43.410877 DQ4 =52, DQ5 =44, DQ6 =64, DQ7 =60
4132 19:59:43.414265 DQ8 =36, DQ9 =36, DQ10 =48, DQ11 =40
4133 19:59:43.421078 DQ12 =52, DQ13 =48, DQ14 =56, DQ15 =52
4134 19:59:43.421169
4135 19:59:43.421239
4136 19:59:43.428061 [DQSOSCAuto] RK0, (LSB)MR18= 0x7467, (MSB)MR19= 0x808, tDQSOscB0 = 390 ps tDQSOscB1 = 388 ps
4137 19:59:43.431418 CH0 RK0: MR19=808, MR18=7467
4138 19:59:43.437748 CH0_RK0: MR19=0x808, MR18=0x7467, DQSOSC=388, MR23=63, INC=174, DEC=116
4139 19:59:43.437838
4140 19:59:43.440948 ----->DramcWriteLeveling(PI) begin...
4141 19:59:43.441038 ==
4142 19:59:43.444574 Dram Type= 6, Freq= 0, CH_0, rank 1
4143 19:59:43.447833 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4144 19:59:43.447921 ==
4145 19:59:43.451009 Write leveling (Byte 0): 36 => 36
4146 19:59:43.454482 Write leveling (Byte 1): 31 => 31
4147 19:59:43.457888 DramcWriteLeveling(PI) end<-----
4148 19:59:43.457975
4149 19:59:43.458045 ==
4150 19:59:43.461132 Dram Type= 6, Freq= 0, CH_0, rank 1
4151 19:59:43.464512 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4152 19:59:43.464601 ==
4153 19:59:43.467630 [Gating] SW mode calibration
4154 19:59:43.474535 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4155 19:59:43.481150 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4156 19:59:43.484061 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4157 19:59:43.487664 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4158 19:59:43.494523 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4159 19:59:43.497854 0 9 12 | B1->B0 | 3434 3030 | 1 1 | (1 1) (1 1)
4160 19:59:43.501001 0 9 16 | B1->B0 | 2d2d 2424 | 1 0 | (0 0) (0 0)
4161 19:59:43.507386 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4162 19:59:43.511055 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4163 19:59:43.514539 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4164 19:59:43.520972 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4165 19:59:43.524336 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4166 19:59:43.527443 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4167 19:59:43.534103 0 10 12 | B1->B0 | 2727 2828 | 0 0 | (0 0) (0 0)
4168 19:59:43.537457 0 10 16 | B1->B0 | 3c3c 4040 | 0 1 | (0 0) (0 0)
4169 19:59:43.541006 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4170 19:59:43.547183 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4171 19:59:43.550386 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4172 19:59:43.554362 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4173 19:59:43.560799 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4174 19:59:43.563979 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4175 19:59:43.567149 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4176 19:59:43.573726 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4177 19:59:43.577098 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4178 19:59:43.580996 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4179 19:59:43.587268 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4180 19:59:43.590465 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4181 19:59:43.594028 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4182 19:59:43.600208 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4183 19:59:43.603564 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4184 19:59:43.607132 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4185 19:59:43.610498 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4186 19:59:43.617277 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4187 19:59:43.620269 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4188 19:59:43.623841 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4189 19:59:43.630581 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4190 19:59:43.633653 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4191 19:59:43.637216 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4192 19:59:43.643680 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4193 19:59:43.647263 Total UI for P1: 0, mck2ui 16
4194 19:59:43.650615 best dqsien dly found for B0: ( 0, 13, 12)
4195 19:59:43.650703 Total UI for P1: 0, mck2ui 16
4196 19:59:43.656923 best dqsien dly found for B1: ( 0, 13, 14)
4197 19:59:43.660684 best DQS0 dly(MCK, UI, PI) = (0, 13, 12)
4198 19:59:43.663841 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4199 19:59:43.663929
4200 19:59:43.667053 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 12)
4201 19:59:43.670321 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4202 19:59:43.673693 [Gating] SW calibration Done
4203 19:59:43.673780 ==
4204 19:59:43.677628 Dram Type= 6, Freq= 0, CH_0, rank 1
4205 19:59:43.680555 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4206 19:59:43.680710 ==
4207 19:59:43.683969 RX Vref Scan: 0
4208 19:59:43.684141
4209 19:59:43.684229 RX Vref 0 -> 0, step: 1
4210 19:59:43.687123
4211 19:59:43.687301 RX Delay -230 -> 252, step: 16
4212 19:59:43.693605 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4213 19:59:43.697440 iDelay=218, Bit 1, Center 49 (-102 ~ 201) 304
4214 19:59:43.700447 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4215 19:59:43.703332 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4216 19:59:43.710116 iDelay=218, Bit 4, Center 57 (-102 ~ 217) 320
4217 19:59:43.713983 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
4218 19:59:43.717657 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4219 19:59:43.720092 iDelay=218, Bit 7, Center 57 (-102 ~ 217) 320
4220 19:59:43.723386 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4221 19:59:43.730172 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4222 19:59:43.733491 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4223 19:59:43.736732 iDelay=218, Bit 11, Center 33 (-118 ~ 185) 304
4224 19:59:43.740163 iDelay=218, Bit 12, Center 49 (-102 ~ 201) 304
4225 19:59:43.747025 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4226 19:59:43.750358 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4227 19:59:43.753245 iDelay=218, Bit 15, Center 49 (-102 ~ 201) 304
4228 19:59:43.753568 ==
4229 19:59:43.756922 Dram Type= 6, Freq= 0, CH_0, rank 1
4230 19:59:43.760498 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4231 19:59:43.763485 ==
4232 19:59:43.763823 DQS Delay:
4233 19:59:43.764078 DQS0 = 0, DQS1 = 0
4234 19:59:43.767088 DQM Delay:
4235 19:59:43.767399 DQM0 = 49, DQM1 = 43
4236 19:59:43.770452 DQ Delay:
4237 19:59:43.770868 DQ0 =49, DQ1 =49, DQ2 =41, DQ3 =41
4238 19:59:43.773756 DQ4 =57, DQ5 =41, DQ6 =57, DQ7 =57
4239 19:59:43.777669 DQ8 =33, DQ9 =33, DQ10 =49, DQ11 =33
4240 19:59:43.780378 DQ12 =49, DQ13 =49, DQ14 =49, DQ15 =49
4241 19:59:43.780786
4242 19:59:43.781105
4243 19:59:43.783980 ==
4244 19:59:43.786963 Dram Type= 6, Freq= 0, CH_0, rank 1
4245 19:59:43.790465 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4246 19:59:43.790993 ==
4247 19:59:43.791323
4248 19:59:43.791625
4249 19:59:43.793431 TX Vref Scan disable
4250 19:59:43.793843 == TX Byte 0 ==
4251 19:59:43.800242 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4252 19:59:43.803521 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4253 19:59:43.803961 == TX Byte 1 ==
4254 19:59:43.810675 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4255 19:59:43.813303 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4256 19:59:43.813724 ==
4257 19:59:43.817038 Dram Type= 6, Freq= 0, CH_0, rank 1
4258 19:59:43.820228 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4259 19:59:43.820647 ==
4260 19:59:43.820976
4261 19:59:43.821280
4262 19:59:43.823344 TX Vref Scan disable
4263 19:59:43.826433 == TX Byte 0 ==
4264 19:59:43.830275 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4265 19:59:43.833668 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4266 19:59:43.836925 == TX Byte 1 ==
4267 19:59:43.839803 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4268 19:59:43.842972 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4269 19:59:43.843385
4270 19:59:43.846535 [DATLAT]
4271 19:59:43.847005 Freq=600, CH0 RK1
4272 19:59:43.847340
4273 19:59:43.849991 DATLAT Default: 0x9
4274 19:59:43.850402 0, 0xFFFF, sum = 0
4275 19:59:43.853002 1, 0xFFFF, sum = 0
4276 19:59:43.853423 2, 0xFFFF, sum = 0
4277 19:59:43.856597 3, 0xFFFF, sum = 0
4278 19:59:43.857029 4, 0xFFFF, sum = 0
4279 19:59:43.859591 5, 0xFFFF, sum = 0
4280 19:59:43.860076 6, 0xFFFF, sum = 0
4281 19:59:43.862979 7, 0xFFFF, sum = 0
4282 19:59:43.863467 8, 0x0, sum = 1
4283 19:59:43.866739 9, 0x0, sum = 2
4284 19:59:43.867154 10, 0x0, sum = 3
4285 19:59:43.869588 11, 0x0, sum = 4
4286 19:59:43.869996 best_step = 9
4287 19:59:43.870344
4288 19:59:43.870684 ==
4289 19:59:43.873302 Dram Type= 6, Freq= 0, CH_0, rank 1
4290 19:59:43.879885 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4291 19:59:43.880390 ==
4292 19:59:43.880720 RX Vref Scan: 0
4293 19:59:43.881026
4294 19:59:43.882874 RX Vref 0 -> 0, step: 1
4295 19:59:43.883284
4296 19:59:43.886123 RX Delay -163 -> 252, step: 8
4297 19:59:43.889960 iDelay=205, Bit 0, Center 52 (-91 ~ 196) 288
4298 19:59:43.893116 iDelay=205, Bit 1, Center 56 (-83 ~ 196) 280
4299 19:59:43.899532 iDelay=205, Bit 2, Center 52 (-91 ~ 196) 288
4300 19:59:43.902850 iDelay=205, Bit 3, Center 52 (-91 ~ 196) 288
4301 19:59:43.906381 iDelay=205, Bit 4, Center 60 (-83 ~ 204) 288
4302 19:59:43.910025 iDelay=205, Bit 5, Center 44 (-99 ~ 188) 288
4303 19:59:43.912883 iDelay=205, Bit 6, Center 56 (-83 ~ 196) 280
4304 19:59:43.919572 iDelay=205, Bit 7, Center 56 (-83 ~ 196) 280
4305 19:59:43.923282 iDelay=205, Bit 8, Center 40 (-99 ~ 180) 280
4306 19:59:43.926443 iDelay=205, Bit 9, Center 32 (-107 ~ 172) 280
4307 19:59:43.929117 iDelay=205, Bit 10, Center 48 (-91 ~ 188) 280
4308 19:59:43.932884 iDelay=205, Bit 11, Center 40 (-99 ~ 180) 280
4309 19:59:43.938964 iDelay=205, Bit 12, Center 48 (-91 ~ 188) 280
4310 19:59:43.942513 iDelay=205, Bit 13, Center 48 (-91 ~ 188) 280
4311 19:59:43.946069 iDelay=205, Bit 14, Center 56 (-83 ~ 196) 280
4312 19:59:43.949053 iDelay=205, Bit 15, Center 56 (-83 ~ 196) 280
4313 19:59:43.949467 ==
4314 19:59:43.952788 Dram Type= 6, Freq= 0, CH_0, rank 1
4315 19:59:43.959449 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4316 19:59:43.959975 ==
4317 19:59:43.960310 DQS Delay:
4318 19:59:43.962606 DQS0 = 0, DQS1 = 0
4319 19:59:43.963013 DQM Delay:
4320 19:59:43.966534 DQM0 = 53, DQM1 = 46
4321 19:59:43.967039 DQ Delay:
4322 19:59:43.969064 DQ0 =52, DQ1 =56, DQ2 =52, DQ3 =52
4323 19:59:43.972270 DQ4 =60, DQ5 =44, DQ6 =56, DQ7 =56
4324 19:59:43.975625 DQ8 =40, DQ9 =32, DQ10 =48, DQ11 =40
4325 19:59:43.979118 DQ12 =48, DQ13 =48, DQ14 =56, DQ15 =56
4326 19:59:43.979527
4327 19:59:43.979908
4328 19:59:43.985926 [DQSOSCAuto] RK1, (LSB)MR18= 0x6021, (MSB)MR19= 0x808, tDQSOscB0 = 403 ps tDQSOscB1 = 391 ps
4329 19:59:43.989151 CH0 RK1: MR19=808, MR18=6021
4330 19:59:43.995688 CH0_RK1: MR19=0x808, MR18=0x6021, DQSOSC=391, MR23=63, INC=171, DEC=114
4331 19:59:43.998739 [RxdqsGatingPostProcess] freq 600
4332 19:59:44.005709 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4333 19:59:44.006128 Pre-setting of DQS Precalculation
4334 19:59:44.011983 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4335 19:59:44.012279 ==
4336 19:59:44.015623 Dram Type= 6, Freq= 0, CH_1, rank 0
4337 19:59:44.018902 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4338 19:59:44.019124 ==
4339 19:59:44.025506 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4340 19:59:44.031858 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
4341 19:59:44.035371 [CA 0] Center 35 (5~66) winsize 62
4342 19:59:44.038942 [CA 1] Center 35 (5~66) winsize 62
4343 19:59:44.042487 [CA 2] Center 34 (4~65) winsize 62
4344 19:59:44.045774 [CA 3] Center 34 (4~65) winsize 62
4345 19:59:44.048528 [CA 4] Center 34 (4~65) winsize 62
4346 19:59:44.052485 [CA 5] Center 33 (3~64) winsize 62
4347 19:59:44.052998
4348 19:59:44.055820 [CmdBusTrainingLP45] Vref(ca) range 1: 37
4349 19:59:44.056232
4350 19:59:44.058894 [CATrainingPosCal] consider 1 rank data
4351 19:59:44.062241 u2DelayCellTimex100 = 270/100 ps
4352 19:59:44.065228 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4353 19:59:44.068403 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4354 19:59:44.072177 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
4355 19:59:44.075382 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
4356 19:59:44.078429 CA4 delay=34 (4~65),Diff = 1 PI (9 cell)
4357 19:59:44.081879 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4358 19:59:44.082382
4359 19:59:44.088237 CA PerBit enable=1, Macro0, CA PI delay=33
4360 19:59:44.088728
4361 19:59:44.092335 [CBTSetCACLKResult] CA Dly = 33
4362 19:59:44.092836 CS Dly: 5 (0~36)
4363 19:59:44.093164 ==
4364 19:59:44.095419 Dram Type= 6, Freq= 0, CH_1, rank 1
4365 19:59:44.098787 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4366 19:59:44.099307 ==
4367 19:59:44.105119 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4368 19:59:44.112186 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
4369 19:59:44.115101 [CA 0] Center 36 (5~67) winsize 63
4370 19:59:44.118286 [CA 1] Center 36 (5~67) winsize 63
4371 19:59:44.121854 [CA 2] Center 34 (4~65) winsize 62
4372 19:59:44.125523 [CA 3] Center 34 (3~65) winsize 63
4373 19:59:44.128599 [CA 4] Center 35 (4~66) winsize 63
4374 19:59:44.131690 [CA 5] Center 34 (3~65) winsize 63
4375 19:59:44.132220
4376 19:59:44.135107 [CmdBusTrainingLP45] Vref(ca) range 1: 35
4377 19:59:44.135613
4378 19:59:44.138090 [CATrainingPosCal] consider 2 rank data
4379 19:59:44.141605 u2DelayCellTimex100 = 270/100 ps
4380 19:59:44.145419 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4381 19:59:44.148375 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4382 19:59:44.151757 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
4383 19:59:44.154993 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
4384 19:59:44.158482 CA4 delay=34 (4~65),Diff = 1 PI (9 cell)
4385 19:59:44.164608 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4386 19:59:44.165010
4387 19:59:44.168194 CA PerBit enable=1, Macro0, CA PI delay=33
4388 19:59:44.168716
4389 19:59:44.171588 [CBTSetCACLKResult] CA Dly = 33
4390 19:59:44.172137 CS Dly: 6 (0~38)
4391 19:59:44.172466
4392 19:59:44.174578 ----->DramcWriteLeveling(PI) begin...
4393 19:59:44.175001 ==
4394 19:59:44.177938 Dram Type= 6, Freq= 0, CH_1, rank 0
4395 19:59:44.181222 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4396 19:59:44.185210 ==
4397 19:59:44.187996 Write leveling (Byte 0): 31 => 31
4398 19:59:44.188402 Write leveling (Byte 1): 30 => 30
4399 19:59:44.192052 DramcWriteLeveling(PI) end<-----
4400 19:59:44.192562
4401 19:59:44.192887 ==
4402 19:59:44.194943 Dram Type= 6, Freq= 0, CH_1, rank 0
4403 19:59:44.201523 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4404 19:59:44.202035 ==
4405 19:59:44.204944 [Gating] SW mode calibration
4406 19:59:44.211293 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4407 19:59:44.214643 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4408 19:59:44.221525 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4409 19:59:44.224636 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4410 19:59:44.228050 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4411 19:59:44.234422 0 9 12 | B1->B0 | 2e2e 3030 | 1 1 | (1 1) (1 1)
4412 19:59:44.237970 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4413 19:59:44.241435 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4414 19:59:44.244892 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4415 19:59:44.251894 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4416 19:59:44.255126 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4417 19:59:44.258272 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4418 19:59:44.264376 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4419 19:59:44.267737 0 10 12 | B1->B0 | 3737 3b3b | 0 0 | (1 1) (0 0)
4420 19:59:44.271502 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4421 19:59:44.277843 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4422 19:59:44.280983 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4423 19:59:44.284342 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4424 19:59:44.291025 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4425 19:59:44.293851 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4426 19:59:44.297333 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
4427 19:59:44.304375 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4428 19:59:44.307713 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4429 19:59:44.310827 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4430 19:59:44.317828 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4431 19:59:44.321256 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4432 19:59:44.324476 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4433 19:59:44.330763 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4434 19:59:44.334434 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4435 19:59:44.337045 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4436 19:59:44.343841 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4437 19:59:44.347313 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4438 19:59:44.350555 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4439 19:59:44.357666 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4440 19:59:44.360639 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4441 19:59:44.363794 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4442 19:59:44.371054 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4443 19:59:44.374205 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4444 19:59:44.377357 Total UI for P1: 0, mck2ui 16
4445 19:59:44.380462 best dqsien dly found for B0: ( 0, 13, 10)
4446 19:59:44.384167 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
4447 19:59:44.390130 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4448 19:59:44.390632 Total UI for P1: 0, mck2ui 16
4449 19:59:44.394203 best dqsien dly found for B1: ( 0, 13, 14)
4450 19:59:44.400301 best DQS0 dly(MCK, UI, PI) = (0, 13, 10)
4451 19:59:44.403703 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4452 19:59:44.404211
4453 19:59:44.407325 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)
4454 19:59:44.410403 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4455 19:59:44.414176 [Gating] SW calibration Done
4456 19:59:44.414698 ==
4457 19:59:44.416895 Dram Type= 6, Freq= 0, CH_1, rank 0
4458 19:59:44.420537 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4459 19:59:44.420967 ==
4460 19:59:44.423728 RX Vref Scan: 0
4461 19:59:44.424243
4462 19:59:44.424682 RX Vref 0 -> 0, step: 1
4463 19:59:44.425103
4464 19:59:44.426856 RX Delay -230 -> 252, step: 16
4465 19:59:44.430448 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4466 19:59:44.436878 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4467 19:59:44.440077 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4468 19:59:44.443603 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4469 19:59:44.447015 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4470 19:59:44.453218 iDelay=218, Bit 5, Center 57 (-102 ~ 217) 320
4471 19:59:44.457102 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4472 19:59:44.460405 iDelay=218, Bit 7, Center 41 (-118 ~ 201) 320
4473 19:59:44.463745 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4474 19:59:44.466753 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4475 19:59:44.473986 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4476 19:59:44.477214 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4477 19:59:44.480494 iDelay=218, Bit 12, Center 57 (-102 ~ 217) 320
4478 19:59:44.484116 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4479 19:59:44.490700 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4480 19:59:44.493584 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4481 19:59:44.494003 ==
4482 19:59:44.496822 Dram Type= 6, Freq= 0, CH_1, rank 0
4483 19:59:44.500291 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4484 19:59:44.500798 ==
4485 19:59:44.503731 DQS Delay:
4486 19:59:44.504245 DQS0 = 0, DQS1 = 0
4487 19:59:44.504579 DQM Delay:
4488 19:59:44.506927 DQM0 = 47, DQM1 = 46
4489 19:59:44.507441 DQ Delay:
4490 19:59:44.510187 DQ0 =49, DQ1 =41, DQ2 =41, DQ3 =41
4491 19:59:44.514069 DQ4 =49, DQ5 =57, DQ6 =57, DQ7 =41
4492 19:59:44.516848 DQ8 =33, DQ9 =33, DQ10 =49, DQ11 =41
4493 19:59:44.520100 DQ12 =57, DQ13 =49, DQ14 =49, DQ15 =57
4494 19:59:44.520602
4495 19:59:44.520934
4496 19:59:44.521240 ==
4497 19:59:44.523972 Dram Type= 6, Freq= 0, CH_1, rank 0
4498 19:59:44.530059 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4499 19:59:44.530569 ==
4500 19:59:44.530901
4501 19:59:44.531208
4502 19:59:44.531499 TX Vref Scan disable
4503 19:59:44.533638 == TX Byte 0 ==
4504 19:59:44.537201 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4505 19:59:44.540199 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4506 19:59:44.543482 == TX Byte 1 ==
4507 19:59:44.546783 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4508 19:59:44.553285 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4509 19:59:44.553777 ==
4510 19:59:44.556780 Dram Type= 6, Freq= 0, CH_1, rank 0
4511 19:59:44.559978 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4512 19:59:44.560511 ==
4513 19:59:44.561086
4514 19:59:44.561557
4515 19:59:44.563230 TX Vref Scan disable
4516 19:59:44.566544 == TX Byte 0 ==
4517 19:59:44.570258 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4518 19:59:44.573468 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4519 19:59:44.576642 == TX Byte 1 ==
4520 19:59:44.580378 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4521 19:59:44.583527 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4522 19:59:44.584008
4523 19:59:44.584342 [DATLAT]
4524 19:59:44.586927 Freq=600, CH1 RK0
4525 19:59:44.587344
4526 19:59:44.587909 DATLAT Default: 0x9
4527 19:59:44.590067 0, 0xFFFF, sum = 0
4528 19:59:44.593174 1, 0xFFFF, sum = 0
4529 19:59:44.593593 2, 0xFFFF, sum = 0
4530 19:59:44.596545 3, 0xFFFF, sum = 0
4531 19:59:44.596965 4, 0xFFFF, sum = 0
4532 19:59:44.600390 5, 0xFFFF, sum = 0
4533 19:59:44.600812 6, 0xFFFF, sum = 0
4534 19:59:44.603589 7, 0xFFFF, sum = 0
4535 19:59:44.604075 8, 0x0, sum = 1
4536 19:59:44.604416 9, 0x0, sum = 2
4537 19:59:44.606683 10, 0x0, sum = 3
4538 19:59:44.607099 11, 0x0, sum = 4
4539 19:59:44.609716 best_step = 9
4540 19:59:44.610128
4541 19:59:44.610458 ==
4542 19:59:44.613076 Dram Type= 6, Freq= 0, CH_1, rank 0
4543 19:59:44.616787 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4544 19:59:44.617202 ==
4545 19:59:44.619897 RX Vref Scan: 1
4546 19:59:44.620310
4547 19:59:44.620642 RX Vref 0 -> 0, step: 1
4548 19:59:44.620953
4549 19:59:44.623152 RX Delay -163 -> 252, step: 8
4550 19:59:44.623564
4551 19:59:44.626782 Set Vref, RX VrefLevel [Byte0]: 55
4552 19:59:44.630029 [Byte1]: 48
4553 19:59:44.634055
4554 19:59:44.634457 Final RX Vref Byte 0 = 55 to rank0
4555 19:59:44.637241 Final RX Vref Byte 1 = 48 to rank0
4556 19:59:44.640835 Final RX Vref Byte 0 = 55 to rank1
4557 19:59:44.643833 Final RX Vref Byte 1 = 48 to rank1==
4558 19:59:44.647709 Dram Type= 6, Freq= 0, CH_1, rank 0
4559 19:59:44.651018 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4560 19:59:44.654200 ==
4561 19:59:44.654697 DQS Delay:
4562 19:59:44.655129 DQS0 = 0, DQS1 = 0
4563 19:59:44.657760 DQM Delay:
4564 19:59:44.658166 DQM0 = 49, DQM1 = 46
4565 19:59:44.660984 DQ Delay:
4566 19:59:44.661390 DQ0 =52, DQ1 =44, DQ2 =40, DQ3 =48
4567 19:59:44.663811 DQ4 =48, DQ5 =56, DQ6 =56, DQ7 =48
4568 19:59:44.667454 DQ8 =32, DQ9 =36, DQ10 =44, DQ11 =40
4569 19:59:44.670954 DQ12 =52, DQ13 =52, DQ14 =52, DQ15 =60
4570 19:59:44.674201
4571 19:59:44.674717
4572 19:59:44.680960 [DQSOSCAuto] RK0, (LSB)MR18= 0x486d, (MSB)MR19= 0x808, tDQSOscB0 = 389 ps tDQSOscB1 = 396 ps
4573 19:59:44.684199 CH1 RK0: MR19=808, MR18=486D
4574 19:59:44.691149 CH1_RK0: MR19=0x808, MR18=0x486D, DQSOSC=389, MR23=63, INC=173, DEC=115
4575 19:59:44.691708
4576 19:59:44.693963 ----->DramcWriteLeveling(PI) begin...
4577 19:59:44.694489 ==
4578 19:59:44.697905 Dram Type= 6, Freq= 0, CH_1, rank 1
4579 19:59:44.701124 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4580 19:59:44.701647 ==
4581 19:59:44.704309 Write leveling (Byte 0): 29 => 29
4582 19:59:44.707535 Write leveling (Byte 1): 30 => 30
4583 19:59:44.710571 DramcWriteLeveling(PI) end<-----
4584 19:59:44.711085
4585 19:59:44.711531 ==
4586 19:59:44.713796 Dram Type= 6, Freq= 0, CH_1, rank 1
4587 19:59:44.717854 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4588 19:59:44.718378 ==
4589 19:59:44.720994 [Gating] SW mode calibration
4590 19:59:44.727263 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4591 19:59:44.733683 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4592 19:59:44.737617 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4593 19:59:44.740613 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4594 19:59:44.747700 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4595 19:59:44.750724 0 9 12 | B1->B0 | 2f2f 3030 | 0 0 | (0 0) (0 0)
4596 19:59:44.753887 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4597 19:59:44.760159 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4598 19:59:44.763967 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4599 19:59:44.767465 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4600 19:59:44.774080 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4601 19:59:44.777742 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4602 19:59:44.780565 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4603 19:59:44.787245 0 10 12 | B1->B0 | 3939 3838 | 0 0 | (0 0) (0 0)
4604 19:59:44.790312 0 10 16 | B1->B0 | 4646 4545 | 0 0 | (0 0) (0 0)
4605 19:59:44.793722 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4606 19:59:44.800624 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4607 19:59:44.803625 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4608 19:59:44.807503 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4609 19:59:44.813601 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4610 19:59:44.816920 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
4611 19:59:44.820574 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4612 19:59:44.827191 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4613 19:59:44.830349 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4614 19:59:44.833337 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4615 19:59:44.840164 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4616 19:59:44.843607 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4617 19:59:44.847065 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4618 19:59:44.853797 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4619 19:59:44.856867 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4620 19:59:44.859995 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4621 19:59:44.863095 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4622 19:59:44.870090 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4623 19:59:44.873137 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4624 19:59:44.876609 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4625 19:59:44.883630 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4626 19:59:44.886888 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4627 19:59:44.889797 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4628 19:59:44.893044 Total UI for P1: 0, mck2ui 16
4629 19:59:44.896676 best dqsien dly found for B0: ( 0, 13, 10)
4630 19:59:44.899760 Total UI for P1: 0, mck2ui 16
4631 19:59:44.903078 best dqsien dly found for B1: ( 0, 13, 10)
4632 19:59:44.906624 best DQS0 dly(MCK, UI, PI) = (0, 13, 10)
4633 19:59:44.913301 best DQS1 dly(MCK, UI, PI) = (0, 13, 10)
4634 19:59:44.913821
4635 19:59:44.916818 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)
4636 19:59:44.920121 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 10)
4637 19:59:44.922676 [Gating] SW calibration Done
4638 19:59:44.923088 ==
4639 19:59:44.926486 Dram Type= 6, Freq= 0, CH_1, rank 1
4640 19:59:44.929666 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4641 19:59:44.930085 ==
4642 19:59:44.930415 RX Vref Scan: 0
4643 19:59:44.932785
4644 19:59:44.933196 RX Vref 0 -> 0, step: 1
4645 19:59:44.933527
4646 19:59:44.936673 RX Delay -230 -> 252, step: 16
4647 19:59:44.940183 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4648 19:59:44.946569 iDelay=218, Bit 1, Center 49 (-102 ~ 201) 304
4649 19:59:44.949639 iDelay=218, Bit 2, Center 33 (-118 ~ 185) 304
4650 19:59:44.952979 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4651 19:59:44.956086 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4652 19:59:44.959867 iDelay=218, Bit 5, Center 65 (-86 ~ 217) 304
4653 19:59:44.966463 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4654 19:59:44.969331 iDelay=218, Bit 7, Center 49 (-102 ~ 201) 304
4655 19:59:44.973153 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4656 19:59:44.976345 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4657 19:59:44.982919 iDelay=218, Bit 10, Center 41 (-118 ~ 201) 320
4658 19:59:44.986547 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4659 19:59:44.989244 iDelay=218, Bit 12, Center 57 (-102 ~ 217) 320
4660 19:59:44.993031 iDelay=218, Bit 13, Center 57 (-102 ~ 217) 320
4661 19:59:44.999782 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4662 19:59:45.002483 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4663 19:59:45.002990 ==
4664 19:59:45.006438 Dram Type= 6, Freq= 0, CH_1, rank 1
4665 19:59:45.009295 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4666 19:59:45.009826 ==
4667 19:59:45.010404 DQS Delay:
4668 19:59:45.012484 DQS0 = 0, DQS1 = 0
4669 19:59:45.012898 DQM Delay:
4670 19:59:45.016024 DQM0 = 50, DQM1 = 46
4671 19:59:45.016531 DQ Delay:
4672 19:59:45.019269 DQ0 =49, DQ1 =49, DQ2 =33, DQ3 =49
4673 19:59:45.022539 DQ4 =49, DQ5 =65, DQ6 =57, DQ7 =49
4674 19:59:45.025978 DQ8 =33, DQ9 =33, DQ10 =41, DQ11 =41
4675 19:59:45.029465 DQ12 =57, DQ13 =57, DQ14 =49, DQ15 =57
4676 19:59:45.029883
4677 19:59:45.030290
4678 19:59:45.030677 ==
4679 19:59:45.032778 Dram Type= 6, Freq= 0, CH_1, rank 1
4680 19:59:45.035745 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4681 19:59:45.039518 ==
4682 19:59:45.040102
4683 19:59:45.040618
4684 19:59:45.041073 TX Vref Scan disable
4685 19:59:45.042701 == TX Byte 0 ==
4686 19:59:45.046019 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4687 19:59:45.049215 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4688 19:59:45.052400 == TX Byte 1 ==
4689 19:59:45.056026 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4690 19:59:45.059394 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4691 19:59:45.062850 ==
4692 19:59:45.066349 Dram Type= 6, Freq= 0, CH_1, rank 1
4693 19:59:45.069141 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4694 19:59:45.069570 ==
4695 19:59:45.070005
4696 19:59:45.070418
4697 19:59:45.072847 TX Vref Scan disable
4698 19:59:45.073270 == TX Byte 0 ==
4699 19:59:45.079271 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4700 19:59:45.083177 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4701 19:59:45.083755 == TX Byte 1 ==
4702 19:59:45.089451 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4703 19:59:45.092781 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4704 19:59:45.093305
4705 19:59:45.093746 [DATLAT]
4706 19:59:45.096016 Freq=600, CH1 RK1
4707 19:59:45.096538
4708 19:59:45.096977 DATLAT Default: 0x9
4709 19:59:45.099825 0, 0xFFFF, sum = 0
4710 19:59:45.100350 1, 0xFFFF, sum = 0
4711 19:59:45.102733 2, 0xFFFF, sum = 0
4712 19:59:45.103257 3, 0xFFFF, sum = 0
4713 19:59:45.106428 4, 0xFFFF, sum = 0
4714 19:59:45.106970 5, 0xFFFF, sum = 0
4715 19:59:45.109290 6, 0xFFFF, sum = 0
4716 19:59:45.112524 7, 0xFFFF, sum = 0
4717 19:59:45.113050 8, 0x0, sum = 1
4718 19:59:45.113501 9, 0x0, sum = 2
4719 19:59:45.116270 10, 0x0, sum = 3
4720 19:59:45.116787 11, 0x0, sum = 4
4721 19:59:45.119446 best_step = 9
4722 19:59:45.120120
4723 19:59:45.120630 ==
4724 19:59:45.122504 Dram Type= 6, Freq= 0, CH_1, rank 1
4725 19:59:45.125908 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4726 19:59:45.126325 ==
4727 19:59:45.128964 RX Vref Scan: 0
4728 19:59:45.129389
4729 19:59:45.129815 RX Vref 0 -> 0, step: 1
4730 19:59:45.130179
4731 19:59:45.132598 RX Delay -163 -> 252, step: 8
4732 19:59:45.139787 iDelay=205, Bit 0, Center 52 (-91 ~ 196) 288
4733 19:59:45.142444 iDelay=205, Bit 1, Center 44 (-99 ~ 188) 288
4734 19:59:45.145901 iDelay=205, Bit 2, Center 36 (-107 ~ 180) 288
4735 19:59:45.149594 iDelay=205, Bit 3, Center 44 (-99 ~ 188) 288
4736 19:59:45.153006 iDelay=205, Bit 4, Center 44 (-99 ~ 188) 288
4737 19:59:45.159994 iDelay=205, Bit 5, Center 60 (-83 ~ 204) 288
4738 19:59:45.162846 iDelay=205, Bit 6, Center 60 (-83 ~ 204) 288
4739 19:59:45.166336 iDelay=205, Bit 7, Center 48 (-99 ~ 196) 296
4740 19:59:45.169026 iDelay=205, Bit 8, Center 32 (-115 ~ 180) 296
4741 19:59:45.175871 iDelay=205, Bit 9, Center 36 (-107 ~ 180) 288
4742 19:59:45.179629 iDelay=205, Bit 10, Center 48 (-99 ~ 196) 296
4743 19:59:45.182971 iDelay=205, Bit 11, Center 40 (-107 ~ 188) 296
4744 19:59:45.186219 iDelay=205, Bit 12, Center 52 (-99 ~ 204) 304
4745 19:59:45.189075 iDelay=205, Bit 13, Center 52 (-91 ~ 196) 288
4746 19:59:45.196406 iDelay=205, Bit 14, Center 48 (-99 ~ 196) 296
4747 19:59:45.199320 iDelay=205, Bit 15, Center 52 (-91 ~ 196) 288
4748 19:59:45.199872 ==
4749 19:59:45.202662 Dram Type= 6, Freq= 0, CH_1, rank 1
4750 19:59:45.206435 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4751 19:59:45.206943 ==
4752 19:59:45.209497 DQS Delay:
4753 19:59:45.210005 DQS0 = 0, DQS1 = 0
4754 19:59:45.210328 DQM Delay:
4755 19:59:45.212701 DQM0 = 48, DQM1 = 45
4756 19:59:45.213113 DQ Delay:
4757 19:59:45.216240 DQ0 =52, DQ1 =44, DQ2 =36, DQ3 =44
4758 19:59:45.219486 DQ4 =44, DQ5 =60, DQ6 =60, DQ7 =48
4759 19:59:45.222789 DQ8 =32, DQ9 =36, DQ10 =48, DQ11 =40
4760 19:59:45.225443 DQ12 =52, DQ13 =52, DQ14 =48, DQ15 =52
4761 19:59:45.225852
4762 19:59:45.226174
4763 19:59:45.235555 [DQSOSCAuto] RK1, (LSB)MR18= 0x6e25, (MSB)MR19= 0x808, tDQSOscB0 = 402 ps tDQSOscB1 = 389 ps
4764 19:59:45.235994 CH1 RK1: MR19=808, MR18=6E25
4765 19:59:45.242361 CH1_RK1: MR19=0x808, MR18=0x6E25, DQSOSC=389, MR23=63, INC=173, DEC=115
4766 19:59:45.245759 [RxdqsGatingPostProcess] freq 600
4767 19:59:45.252141 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4768 19:59:45.255504 Pre-setting of DQS Precalculation
4769 19:59:45.259262 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4770 19:59:45.266075 sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5
4771 19:59:45.275817 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
4772 19:59:45.276313
4773 19:59:45.276649
4774 19:59:45.279209 [Calibration Summary] 1200 Mbps
4775 19:59:45.279757 CH 0, Rank 0
4776 19:59:45.282105 SW Impedance : PASS
4777 19:59:45.282515 DUTY Scan : NO K
4778 19:59:45.285102 ZQ Calibration : PASS
4779 19:59:45.289209 Jitter Meter : NO K
4780 19:59:45.289717 CBT Training : PASS
4781 19:59:45.292415 Write leveling : PASS
4782 19:59:45.295457 RX DQS gating : PASS
4783 19:59:45.295989 RX DQ/DQS(RDDQC) : PASS
4784 19:59:45.298812 TX DQ/DQS : PASS
4785 19:59:45.299316 RX DATLAT : PASS
4786 19:59:45.302356 RX DQ/DQS(Engine): PASS
4787 19:59:45.305281 TX OE : NO K
4788 19:59:45.305695 All Pass.
4789 19:59:45.306020
4790 19:59:45.306325 CH 0, Rank 1
4791 19:59:45.308540 SW Impedance : PASS
4792 19:59:45.312157 DUTY Scan : NO K
4793 19:59:45.312664 ZQ Calibration : PASS
4794 19:59:45.315458 Jitter Meter : NO K
4795 19:59:45.318726 CBT Training : PASS
4796 19:59:45.319232 Write leveling : PASS
4797 19:59:45.321811 RX DQS gating : PASS
4798 19:59:45.325383 RX DQ/DQS(RDDQC) : PASS
4799 19:59:45.325886 TX DQ/DQS : PASS
4800 19:59:45.328400 RX DATLAT : PASS
4801 19:59:45.332384 RX DQ/DQS(Engine): PASS
4802 19:59:45.332888 TX OE : NO K
4803 19:59:45.335433 All Pass.
4804 19:59:45.335980
4805 19:59:45.336314 CH 1, Rank 0
4806 19:59:45.338883 SW Impedance : PASS
4807 19:59:45.339294 DUTY Scan : NO K
4808 19:59:45.342116 ZQ Calibration : PASS
4809 19:59:45.345095 Jitter Meter : NO K
4810 19:59:45.345505 CBT Training : PASS
4811 19:59:45.348890 Write leveling : PASS
4812 19:59:45.349394 RX DQS gating : PASS
4813 19:59:45.351670 RX DQ/DQS(RDDQC) : PASS
4814 19:59:45.355360 TX DQ/DQS : PASS
4815 19:59:45.356021 RX DATLAT : PASS
4816 19:59:45.358751 RX DQ/DQS(Engine): PASS
4817 19:59:45.361830 TX OE : NO K
4818 19:59:45.362210 All Pass.
4819 19:59:45.362523
4820 19:59:45.362818 CH 1, Rank 1
4821 19:59:45.364927 SW Impedance : PASS
4822 19:59:45.368346 DUTY Scan : NO K
4823 19:59:45.368761 ZQ Calibration : PASS
4824 19:59:45.372268 Jitter Meter : NO K
4825 19:59:45.375348 CBT Training : PASS
4826 19:59:45.375804 Write leveling : PASS
4827 19:59:45.378786 RX DQS gating : PASS
4828 19:59:45.381822 RX DQ/DQS(RDDQC) : PASS
4829 19:59:45.382235 TX DQ/DQS : PASS
4830 19:59:45.384752 RX DATLAT : PASS
4831 19:59:45.388480 RX DQ/DQS(Engine): PASS
4832 19:59:45.388984 TX OE : NO K
4833 19:59:45.391784 All Pass.
4834 19:59:45.392293
4835 19:59:45.392619 DramC Write-DBI off
4836 19:59:45.395107 PER_BANK_REFRESH: Hybrid Mode
4837 19:59:45.395516 TX_TRACKING: ON
4838 19:59:45.405031 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1
4839 19:59:45.408071 [FAST_K] Save calibration result to emmc
4840 19:59:45.412191 dramc_set_vcore_voltage set vcore to 662500
4841 19:59:45.415316 Read voltage for 933, 3
4842 19:59:45.415846 Vio18 = 0
4843 19:59:45.418520 Vcore = 662500
4844 19:59:45.419020 Vdram = 0
4845 19:59:45.419348 Vddq = 0
4846 19:59:45.421793 Vmddr = 0
4847 19:59:45.424389 [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0
4848 19:59:45.430993 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
4849 19:59:45.431488 MEM_TYPE=3, freq_sel=17
4850 19:59:45.434981 sv_algorithm_assistance_LP4_1600
4851 19:59:45.438254 ============ PULL DRAM RESETB DOWN ============
4852 19:59:45.444316 ========== PULL DRAM RESETB DOWN end =========
4853 19:59:45.447411 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4854 19:59:45.451056 ===================================
4855 19:59:45.454677 LPDDR4 DRAM CONFIGURATION
4856 19:59:45.457875 ===================================
4857 19:59:45.458297 EX_ROW_EN[0] = 0x0
4858 19:59:45.461220 EX_ROW_EN[1] = 0x0
4859 19:59:45.464002 LP4Y_EN = 0x0
4860 19:59:45.464465 WORK_FSP = 0x0
4861 19:59:45.467710 WL = 0x3
4862 19:59:45.468219 RL = 0x3
4863 19:59:45.470640 BL = 0x2
4864 19:59:45.471050 RPST = 0x0
4865 19:59:45.474776 RD_PRE = 0x0
4866 19:59:45.475284 WR_PRE = 0x1
4867 19:59:45.477570 WR_PST = 0x0
4868 19:59:45.478073 DBI_WR = 0x0
4869 19:59:45.481106 DBI_RD = 0x0
4870 19:59:45.481566 OTF = 0x1
4871 19:59:45.483997 ===================================
4872 19:59:45.487170 ===================================
4873 19:59:45.490761 ANA top config
4874 19:59:45.493718 ===================================
4875 19:59:45.494136 DLL_ASYNC_EN = 0
4876 19:59:45.497294 ALL_SLAVE_EN = 1
4877 19:59:45.500432 NEW_RANK_MODE = 1
4878 19:59:45.503958 DLL_IDLE_MODE = 1
4879 19:59:45.507102 LP45_APHY_COMB_EN = 1
4880 19:59:45.507508 TX_ODT_DIS = 1
4881 19:59:45.510288 NEW_8X_MODE = 1
4882 19:59:45.513604 ===================================
4883 19:59:45.517452 ===================================
4884 19:59:45.520645 data_rate = 1866
4885 19:59:45.523767 CKR = 1
4886 19:59:45.526976 DQ_P2S_RATIO = 8
4887 19:59:45.530626 ===================================
4888 19:59:45.531036 CA_P2S_RATIO = 8
4889 19:59:45.533672 DQ_CA_OPEN = 0
4890 19:59:45.537152 DQ_SEMI_OPEN = 0
4891 19:59:45.540451 CA_SEMI_OPEN = 0
4892 19:59:45.543832 CA_FULL_RATE = 0
4893 19:59:45.546928 DQ_CKDIV4_EN = 1
4894 19:59:45.547338 CA_CKDIV4_EN = 1
4895 19:59:45.550794 CA_PREDIV_EN = 0
4896 19:59:45.554014 PH8_DLY = 0
4897 19:59:45.557123 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
4898 19:59:45.560697 DQ_AAMCK_DIV = 4
4899 19:59:45.563383 CA_AAMCK_DIV = 4
4900 19:59:45.563851 CA_ADMCK_DIV = 4
4901 19:59:45.567212 DQ_TRACK_CA_EN = 0
4902 19:59:45.570080 CA_PICK = 933
4903 19:59:45.573500 CA_MCKIO = 933
4904 19:59:45.577039 MCKIO_SEMI = 0
4905 19:59:45.580295 PLL_FREQ = 3732
4906 19:59:45.583416 DQ_UI_PI_RATIO = 32
4907 19:59:45.583879 CA_UI_PI_RATIO = 0
4908 19:59:45.587297 ===================================
4909 19:59:45.590124 ===================================
4910 19:59:45.593825 memory_type:LPDDR4
4911 19:59:45.597225 GP_NUM : 10
4912 19:59:45.597735 SRAM_EN : 1
4913 19:59:45.600651 MD32_EN : 0
4914 19:59:45.603558 ===================================
4915 19:59:45.606874 [ANA_INIT] >>>>>>>>>>>>>>
4916 19:59:45.610265 <<<<<< [CONFIGURE PHASE]: ANA_TX
4917 19:59:45.613643 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
4918 19:59:45.617012 ===================================
4919 19:59:45.617420 data_rate = 1866,PCW = 0X8f00
4920 19:59:45.620714 ===================================
4921 19:59:45.623793 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
4922 19:59:45.630152 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4923 19:59:45.637151 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4924 19:59:45.640310 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
4925 19:59:45.643450 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
4926 19:59:45.647449 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
4927 19:59:45.649965 [ANA_INIT] flow start
4928 19:59:45.650373 [ANA_INIT] PLL >>>>>>>>
4929 19:59:45.653456 [ANA_INIT] PLL <<<<<<<<
4930 19:59:45.656682 [ANA_INIT] MIDPI >>>>>>>>
4931 19:59:45.660361 [ANA_INIT] MIDPI <<<<<<<<
4932 19:59:45.660768 [ANA_INIT] DLL >>>>>>>>
4933 19:59:45.663523 [ANA_INIT] flow end
4934 19:59:45.666558 ============ LP4 DIFF to SE enter ============
4935 19:59:45.669991 ============ LP4 DIFF to SE exit ============
4936 19:59:45.673712 [ANA_INIT] <<<<<<<<<<<<<
4937 19:59:45.677201 [Flow] Enable top DCM control >>>>>
4938 19:59:45.679929 [Flow] Enable top DCM control <<<<<
4939 19:59:45.683301 Enable DLL master slave shuffle
4940 19:59:45.690550 ==============================================================
4941 19:59:45.691155 Gating Mode config
4942 19:59:45.696672 ==============================================================
4943 19:59:45.697175 Config description:
4944 19:59:45.706617 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
4945 19:59:45.713631 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
4946 19:59:45.719887 SELPH_MODE 0: By rank 1: By Phase
4947 19:59:45.722929 ==============================================================
4948 19:59:45.726726 GAT_TRACK_EN = 1
4949 19:59:45.729409 RX_GATING_MODE = 2
4950 19:59:45.733237 RX_GATING_TRACK_MODE = 2
4951 19:59:45.736455 SELPH_MODE = 1
4952 19:59:45.739721 PICG_EARLY_EN = 1
4953 19:59:45.743740 VALID_LAT_VALUE = 1
4954 19:59:45.746538 ==============================================================
4955 19:59:45.752995 Enter into Gating configuration >>>>
4956 19:59:45.753495 Exit from Gating configuration <<<<
4957 19:59:45.756705 Enter into DVFS_PRE_config >>>>>
4958 19:59:45.769809 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
4959 19:59:45.773273 Exit from DVFS_PRE_config <<<<<
4960 19:59:45.776148 Enter into PICG configuration >>>>
4961 19:59:45.779543 Exit from PICG configuration <<<<
4962 19:59:45.779988 [RX_INPUT] configuration >>>>>
4963 19:59:45.783030 [RX_INPUT] configuration <<<<<
4964 19:59:45.790073 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
4965 19:59:45.792682 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
4966 19:59:45.799846 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
4967 19:59:45.806256 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
4968 19:59:45.812747 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
4969 19:59:45.819732 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
4970 19:59:45.822650 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
4971 19:59:45.826566 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
4972 19:59:45.832984 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
4973 19:59:45.836192 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
4974 19:59:45.839398 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
4975 19:59:45.842958 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4976 19:59:45.846002 ===================================
4977 19:59:45.849148 LPDDR4 DRAM CONFIGURATION
4978 19:59:45.852976 ===================================
4979 19:59:45.856405 EX_ROW_EN[0] = 0x0
4980 19:59:45.857168 EX_ROW_EN[1] = 0x0
4981 19:59:45.859386 LP4Y_EN = 0x0
4982 19:59:45.859824 WORK_FSP = 0x0
4983 19:59:45.862408 WL = 0x3
4984 19:59:45.862815 RL = 0x3
4985 19:59:45.865689 BL = 0x2
4986 19:59:45.866099 RPST = 0x0
4987 19:59:45.869417 RD_PRE = 0x0
4988 19:59:45.869829 WR_PRE = 0x1
4989 19:59:45.872498 WR_PST = 0x0
4990 19:59:45.875970 DBI_WR = 0x0
4991 19:59:45.876416 DBI_RD = 0x0
4992 19:59:45.879477 OTF = 0x1
4993 19:59:45.882490 ===================================
4994 19:59:45.885934 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
4995 19:59:45.889253 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
4996 19:59:45.892281 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4997 19:59:45.896172 ===================================
4998 19:59:45.899103 LPDDR4 DRAM CONFIGURATION
4999 19:59:45.902300 ===================================
5000 19:59:45.906184 EX_ROW_EN[0] = 0x10
5001 19:59:45.906696 EX_ROW_EN[1] = 0x0
5002 19:59:45.909088 LP4Y_EN = 0x0
5003 19:59:45.909498 WORK_FSP = 0x0
5004 19:59:45.912087 WL = 0x3
5005 19:59:45.912496 RL = 0x3
5006 19:59:45.915845 BL = 0x2
5007 19:59:45.916358 RPST = 0x0
5008 19:59:45.919111 RD_PRE = 0x0
5009 19:59:45.919710 WR_PRE = 0x1
5010 19:59:45.921854 WR_PST = 0x0
5011 19:59:45.925914 DBI_WR = 0x0
5012 19:59:45.926431 DBI_RD = 0x0
5013 19:59:45.928659 OTF = 0x1
5014 19:59:45.932343 ===================================
5015 19:59:45.935431 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
5016 19:59:45.940796 nWR fixed to 30
5017 19:59:45.943933 [ModeRegInit_LP4] CH0 RK0
5018 19:59:45.944447 [ModeRegInit_LP4] CH0 RK1
5019 19:59:45.947157 [ModeRegInit_LP4] CH1 RK0
5020 19:59:45.950893 [ModeRegInit_LP4] CH1 RK1
5021 19:59:45.951412 match AC timing 9
5022 19:59:45.957089 dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 1
5023 19:59:45.960490 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
5024 19:59:45.963964 [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10
5025 19:59:45.970466 [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21
5026 19:59:45.973867 [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)
5027 19:59:45.974373 ==
5028 19:59:45.976758 Dram Type= 6, Freq= 0, CH_0, rank 0
5029 19:59:45.980595 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5030 19:59:45.981003 ==
5031 19:59:45.986905 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5032 19:59:45.993478 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
5033 19:59:45.996675 [CA 0] Center 37 (6~68) winsize 63
5034 19:59:46.000362 [CA 1] Center 37 (6~68) winsize 63
5035 19:59:46.003450 [CA 2] Center 34 (4~65) winsize 62
5036 19:59:46.006797 [CA 3] Center 34 (3~65) winsize 63
5037 19:59:46.010305 [CA 4] Center 33 (3~64) winsize 62
5038 19:59:46.013404 [CA 5] Center 32 (2~62) winsize 61
5039 19:59:46.013826
5040 19:59:46.017111 [CmdBusTrainingLP45] Vref(ca) range 1: 37
5041 19:59:46.017686
5042 19:59:46.020297 [CATrainingPosCal] consider 1 rank data
5043 19:59:46.023266 u2DelayCellTimex100 = 270/100 ps
5044 19:59:46.027201 CA0 delay=37 (6~68),Diff = 5 PI (31 cell)
5045 19:59:46.029883 CA1 delay=37 (6~68),Diff = 5 PI (31 cell)
5046 19:59:46.033775 CA2 delay=34 (4~65),Diff = 2 PI (12 cell)
5047 19:59:46.036680 CA3 delay=34 (3~65),Diff = 2 PI (12 cell)
5048 19:59:46.040284 CA4 delay=33 (3~64),Diff = 1 PI (6 cell)
5049 19:59:46.043719 CA5 delay=32 (2~62),Diff = 0 PI (0 cell)
5050 19:59:46.046479
5051 19:59:46.050013 CA PerBit enable=1, Macro0, CA PI delay=32
5052 19:59:46.050424
5053 19:59:46.053473 [CBTSetCACLKResult] CA Dly = 32
5054 19:59:46.053880 CS Dly: 5 (0~36)
5055 19:59:46.054206 ==
5056 19:59:46.056902 Dram Type= 6, Freq= 0, CH_0, rank 1
5057 19:59:46.060073 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5058 19:59:46.060486 ==
5059 19:59:46.066548 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5060 19:59:46.073005 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5061 19:59:46.076634 [CA 0] Center 37 (6~68) winsize 63
5062 19:59:46.079884 [CA 1] Center 37 (6~68) winsize 63
5063 19:59:46.083754 [CA 2] Center 34 (4~65) winsize 62
5064 19:59:46.086890 [CA 3] Center 34 (3~65) winsize 63
5065 19:59:46.090447 [CA 4] Center 32 (2~63) winsize 62
5066 19:59:46.093414 [CA 5] Center 32 (2~62) winsize 61
5067 19:59:46.093830
5068 19:59:46.096383 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5069 19:59:46.096793
5070 19:59:46.100343 [CATrainingPosCal] consider 2 rank data
5071 19:59:46.103605 u2DelayCellTimex100 = 270/100 ps
5072 19:59:46.107135 CA0 delay=37 (6~68),Diff = 5 PI (31 cell)
5073 19:59:46.109725 CA1 delay=37 (6~68),Diff = 5 PI (31 cell)
5074 19:59:46.113085 CA2 delay=34 (4~65),Diff = 2 PI (12 cell)
5075 19:59:46.116430 CA3 delay=34 (3~65),Diff = 2 PI (12 cell)
5076 19:59:46.123335 CA4 delay=33 (3~63),Diff = 1 PI (6 cell)
5077 19:59:46.126485 CA5 delay=32 (2~62),Diff = 0 PI (0 cell)
5078 19:59:46.126909
5079 19:59:46.129829 CA PerBit enable=1, Macro0, CA PI delay=32
5080 19:59:46.130247
5081 19:59:46.132826 [CBTSetCACLKResult] CA Dly = 32
5082 19:59:46.133248 CS Dly: 5 (0~37)
5083 19:59:46.133689
5084 19:59:46.136648 ----->DramcWriteLeveling(PI) begin...
5085 19:59:46.137179 ==
5086 19:59:46.140077 Dram Type= 6, Freq= 0, CH_0, rank 0
5087 19:59:46.146418 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5088 19:59:46.147143 ==
5089 19:59:46.149343 Write leveling (Byte 0): 33 => 33
5090 19:59:46.152628 Write leveling (Byte 1): 29 => 29
5091 19:59:46.153037 DramcWriteLeveling(PI) end<-----
5092 19:59:46.155690
5093 19:59:46.156111 ==
5094 19:59:46.159100 Dram Type= 6, Freq= 0, CH_0, rank 0
5095 19:59:46.162767 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5096 19:59:46.163176 ==
5097 19:59:46.165894 [Gating] SW mode calibration
5098 19:59:46.172556 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5099 19:59:46.176000 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5100 19:59:46.182971 0 14 0 | B1->B0 | 2727 3434 | 0 1 | (0 0) (1 1)
5101 19:59:46.186118 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5102 19:59:46.189355 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5103 19:59:46.195792 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5104 19:59:46.198988 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5105 19:59:46.202819 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5106 19:59:46.209192 0 14 24 | B1->B0 | 3434 3232 | 1 0 | (1 1) (0 0)
5107 19:59:46.212361 0 14 28 | B1->B0 | 3333 2424 | 1 0 | (1 0) (0 0)
5108 19:59:46.215970 0 15 0 | B1->B0 | 2f2f 2323 | 0 0 | (1 0) (0 0)
5109 19:59:46.222166 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5110 19:59:46.226028 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5111 19:59:46.228775 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5112 19:59:46.235063 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5113 19:59:46.238646 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5114 19:59:46.242066 0 15 24 | B1->B0 | 2323 2b2a | 0 1 | (0 0) (0 0)
5115 19:59:46.248528 0 15 28 | B1->B0 | 2424 4242 | 0 1 | (0 0) (1 1)
5116 19:59:46.251323 1 0 0 | B1->B0 | 3838 4646 | 0 0 | (1 1) (0 0)
5117 19:59:46.255259 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5118 19:59:46.262002 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5119 19:59:46.264931 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5120 19:59:46.268752 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5121 19:59:46.275067 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5122 19:59:46.278477 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5123 19:59:46.281448 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
5124 19:59:46.288478 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5125 19:59:46.292014 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5126 19:59:46.295213 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5127 19:59:46.301606 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5128 19:59:46.305406 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5129 19:59:46.308584 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5130 19:59:46.315469 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5131 19:59:46.318495 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5132 19:59:46.321733 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5133 19:59:46.328599 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5134 19:59:46.331746 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5135 19:59:46.334803 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5136 19:59:46.338523 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5137 19:59:46.345059 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5138 19:59:46.348424 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5139 19:59:46.351398 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5140 19:59:46.358358 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5141 19:59:46.361304 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5142 19:59:46.364803 Total UI for P1: 0, mck2ui 16
5143 19:59:46.368213 best dqsien dly found for B0: ( 1, 2, 28)
5144 19:59:46.371705 Total UI for P1: 0, mck2ui 16
5145 19:59:46.375269 best dqsien dly found for B1: ( 1, 3, 0)
5146 19:59:46.378047 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5147 19:59:46.381629 best DQS1 dly(MCK, UI, PI) = (1, 3, 0)
5148 19:59:46.382040
5149 19:59:46.384706 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5150 19:59:46.388497 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 0)
5151 19:59:46.391958 [Gating] SW calibration Done
5152 19:59:46.392473 ==
5153 19:59:46.395085 Dram Type= 6, Freq= 0, CH_0, rank 0
5154 19:59:46.398218 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5155 19:59:46.401455 ==
5156 19:59:46.401974 RX Vref Scan: 0
5157 19:59:46.402303
5158 19:59:46.404409 RX Vref 0 -> 0, step: 1
5159 19:59:46.404820
5160 19:59:46.408583 RX Delay -80 -> 252, step: 8
5161 19:59:46.411815 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5162 19:59:46.414753 iDelay=208, Bit 1, Center 107 (16 ~ 199) 184
5163 19:59:46.418037 iDelay=208, Bit 2, Center 99 (8 ~ 191) 184
5164 19:59:46.421850 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5165 19:59:46.427733 iDelay=208, Bit 4, Center 107 (16 ~ 199) 184
5166 19:59:46.431720 iDelay=208, Bit 5, Center 99 (8 ~ 191) 184
5167 19:59:46.434637 iDelay=208, Bit 6, Center 115 (24 ~ 207) 184
5168 19:59:46.438009 iDelay=208, Bit 7, Center 115 (24 ~ 207) 184
5169 19:59:46.441134 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5170 19:59:46.444195 iDelay=208, Bit 9, Center 87 (0 ~ 175) 176
5171 19:59:46.447888 iDelay=208, Bit 10, Center 95 (8 ~ 183) 176
5172 19:59:46.454430 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5173 19:59:46.457741 iDelay=208, Bit 12, Center 99 (8 ~ 191) 184
5174 19:59:46.461067 iDelay=208, Bit 13, Center 99 (8 ~ 191) 184
5175 19:59:46.464690 iDelay=208, Bit 14, Center 99 (8 ~ 191) 184
5176 19:59:46.467786 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5177 19:59:46.468200 ==
5178 19:59:46.470973 Dram Type= 6, Freq= 0, CH_0, rank 0
5179 19:59:46.477945 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5180 19:59:46.478446 ==
5181 19:59:46.478777 DQS Delay:
5182 19:59:46.481129 DQS0 = 0, DQS1 = 0
5183 19:59:46.481557 DQM Delay:
5184 19:59:46.481886 DQM0 = 105, DQM1 = 94
5185 19:59:46.483962 DQ Delay:
5186 19:59:46.487572 DQ0 =103, DQ1 =107, DQ2 =99, DQ3 =99
5187 19:59:46.491120 DQ4 =107, DQ5 =99, DQ6 =115, DQ7 =115
5188 19:59:46.494583 DQ8 =87, DQ9 =87, DQ10 =95, DQ11 =91
5189 19:59:46.497664 DQ12 =99, DQ13 =99, DQ14 =99, DQ15 =99
5190 19:59:46.498073
5191 19:59:46.498401
5192 19:59:46.498699 ==
5193 19:59:46.501083 Dram Type= 6, Freq= 0, CH_0, rank 0
5194 19:59:46.504360 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5195 19:59:46.504774 ==
5196 19:59:46.505098
5197 19:59:46.505400
5198 19:59:46.507549 TX Vref Scan disable
5199 19:59:46.511127 == TX Byte 0 ==
5200 19:59:46.514562 Update DQ dly =717 (2 ,6, 13) DQ OEN =(2 ,3)
5201 19:59:46.517790 Update DQM dly =717 (2 ,6, 13) DQM OEN =(2 ,3)
5202 19:59:46.521192 == TX Byte 1 ==
5203 19:59:46.524263 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5204 19:59:46.527876 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5205 19:59:46.528291 ==
5206 19:59:46.531244 Dram Type= 6, Freq= 0, CH_0, rank 0
5207 19:59:46.534177 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5208 19:59:46.537822 ==
5209 19:59:46.538334
5210 19:59:46.538657
5211 19:59:46.538960 TX Vref Scan disable
5212 19:59:46.540894 == TX Byte 0 ==
5213 19:59:46.544844 Update DQ dly =716 (2 ,6, 12) DQ OEN =(2 ,3)
5214 19:59:46.551264 Update DQM dly =716 (2 ,6, 12) DQM OEN =(2 ,3)
5215 19:59:46.551810 == TX Byte 1 ==
5216 19:59:46.554129 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5217 19:59:46.561469 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5218 19:59:46.561998
5219 19:59:46.562331 [DATLAT]
5220 19:59:46.562637 Freq=933, CH0 RK0
5221 19:59:46.562939
5222 19:59:46.564496 DATLAT Default: 0xd
5223 19:59:46.564954 0, 0xFFFF, sum = 0
5224 19:59:46.567436 1, 0xFFFF, sum = 0
5225 19:59:46.567908 2, 0xFFFF, sum = 0
5226 19:59:46.570859 3, 0xFFFF, sum = 0
5227 19:59:46.574759 4, 0xFFFF, sum = 0
5228 19:59:46.575281 5, 0xFFFF, sum = 0
5229 19:59:46.577827 6, 0xFFFF, sum = 0
5230 19:59:46.578355 7, 0xFFFF, sum = 0
5231 19:59:46.580752 8, 0xFFFF, sum = 0
5232 19:59:46.581174 9, 0xFFFF, sum = 0
5233 19:59:46.584523 10, 0x0, sum = 1
5234 19:59:46.584946 11, 0x0, sum = 2
5235 19:59:46.588086 12, 0x0, sum = 3
5236 19:59:46.588625 13, 0x0, sum = 4
5237 19:59:46.588963 best_step = 11
5238 19:59:46.589270
5239 19:59:46.590917 ==
5240 19:59:46.593928 Dram Type= 6, Freq= 0, CH_0, rank 0
5241 19:59:46.597602 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5242 19:59:46.598017 ==
5243 19:59:46.598349 RX Vref Scan: 1
5244 19:59:46.598675
5245 19:59:46.601060 RX Vref 0 -> 0, step: 1
5246 19:59:46.601475
5247 19:59:46.604273 RX Delay -45 -> 252, step: 4
5248 19:59:46.604688
5249 19:59:46.608029 Set Vref, RX VrefLevel [Byte0]: 54
5250 19:59:46.610873 [Byte1]: 45
5251 19:59:46.611390
5252 19:59:46.614264 Final RX Vref Byte 0 = 54 to rank0
5253 19:59:46.617771 Final RX Vref Byte 1 = 45 to rank0
5254 19:59:46.620676 Final RX Vref Byte 0 = 54 to rank1
5255 19:59:46.624301 Final RX Vref Byte 1 = 45 to rank1==
5256 19:59:46.627676 Dram Type= 6, Freq= 0, CH_0, rank 0
5257 19:59:46.630656 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5258 19:59:46.634137 ==
5259 19:59:46.634582 DQS Delay:
5260 19:59:46.634928 DQS0 = 0, DQS1 = 0
5261 19:59:46.637438 DQM Delay:
5262 19:59:46.638021 DQM0 = 104, DQM1 = 95
5263 19:59:46.640441 DQ Delay:
5264 19:59:46.644382 DQ0 =104, DQ1 =104, DQ2 =102, DQ3 =102
5265 19:59:46.647625 DQ4 =106, DQ5 =96, DQ6 =110, DQ7 =110
5266 19:59:46.650371 DQ8 =84, DQ9 =84, DQ10 =98, DQ11 =88
5267 19:59:46.654011 DQ12 =100, DQ13 =100, DQ14 =104, DQ15 =102
5268 19:59:46.654426
5269 19:59:46.654755
5270 19:59:46.660649 [DQSOSCAuto] RK0, (LSB)MR18= 0x2e26, (MSB)MR19= 0x505, tDQSOscB0 = 409 ps tDQSOscB1 = 407 ps
5271 19:59:46.663566 CH0 RK0: MR19=505, MR18=2E26
5272 19:59:46.670503 CH0_RK0: MR19=0x505, MR18=0x2E26, DQSOSC=407, MR23=63, INC=65, DEC=43
5273 19:59:46.671026
5274 19:59:46.673337 ----->DramcWriteLeveling(PI) begin...
5275 19:59:46.673758 ==
5276 19:59:46.676868 Dram Type= 6, Freq= 0, CH_0, rank 1
5277 19:59:46.680549 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5278 19:59:46.681087 ==
5279 19:59:46.683589 Write leveling (Byte 0): 34 => 34
5280 19:59:46.687102 Write leveling (Byte 1): 28 => 28
5281 19:59:46.690951 DramcWriteLeveling(PI) end<-----
5282 19:59:46.691600
5283 19:59:46.692005 ==
5284 19:59:46.693966 Dram Type= 6, Freq= 0, CH_0, rank 1
5285 19:59:46.697100 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5286 19:59:46.700337 ==
5287 19:59:46.700863 [Gating] SW mode calibration
5288 19:59:46.707264 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5289 19:59:46.713762 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5290 19:59:46.716938 0 14 0 | B1->B0 | 3232 3434 | 1 0 | (1 1) (0 0)
5291 19:59:46.724018 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5292 19:59:46.727020 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5293 19:59:46.730180 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5294 19:59:46.736775 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5295 19:59:46.740500 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5296 19:59:46.743363 0 14 24 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
5297 19:59:46.750281 0 14 28 | B1->B0 | 2a2a 2a2a | 0 0 | (0 0) (0 0)
5298 19:59:46.753419 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5299 19:59:46.756992 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5300 19:59:46.760115 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5301 19:59:46.766692 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5302 19:59:46.770593 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5303 19:59:46.773792 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5304 19:59:46.780777 0 15 24 | B1->B0 | 2626 2323 | 0 0 | (0 0) (0 0)
5305 19:59:46.783512 0 15 28 | B1->B0 | 3535 3433 | 0 1 | (0 0) (0 0)
5306 19:59:46.786912 1 0 0 | B1->B0 | 4545 4545 | 0 0 | (0 0) (1 1)
5307 19:59:46.793972 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5308 19:59:46.797103 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5309 19:59:46.800220 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5310 19:59:46.806967 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5311 19:59:46.810750 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5312 19:59:46.813953 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5313 19:59:46.820520 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5314 19:59:46.823849 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
5315 19:59:46.827233 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5316 19:59:46.834052 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5317 19:59:46.836870 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5318 19:59:46.839907 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5319 19:59:46.846984 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5320 19:59:46.850090 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5321 19:59:46.853707 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5322 19:59:46.860021 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5323 19:59:46.863312 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5324 19:59:46.867041 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5325 19:59:46.873644 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5326 19:59:46.877212 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5327 19:59:46.879750 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5328 19:59:46.886722 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5329 19:59:46.890090 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5330 19:59:46.893752 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5331 19:59:46.896578 Total UI for P1: 0, mck2ui 16
5332 19:59:46.900273 best dqsien dly found for B0: ( 1, 2, 28)
5333 19:59:46.903099 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5334 19:59:46.906543 Total UI for P1: 0, mck2ui 16
5335 19:59:46.910213 best dqsien dly found for B1: ( 1, 2, 30)
5336 19:59:46.916627 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5337 19:59:46.919797 best DQS1 dly(MCK, UI, PI) = (1, 2, 30)
5338 19:59:46.920313
5339 19:59:46.922821 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5340 19:59:46.926330 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 30)
5341 19:59:46.930129 [Gating] SW calibration Done
5342 19:59:46.930644 ==
5343 19:59:46.932940 Dram Type= 6, Freq= 0, CH_0, rank 1
5344 19:59:46.936538 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5345 19:59:46.937062 ==
5346 19:59:46.939717 RX Vref Scan: 0
5347 19:59:46.940244
5348 19:59:46.940578 RX Vref 0 -> 0, step: 1
5349 19:59:46.940888
5350 19:59:46.943491 RX Delay -80 -> 252, step: 8
5351 19:59:46.946663 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5352 19:59:46.949756 iDelay=208, Bit 1, Center 107 (16 ~ 199) 184
5353 19:59:46.956299 iDelay=208, Bit 2, Center 99 (8 ~ 191) 184
5354 19:59:46.959740 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5355 19:59:46.963066 iDelay=208, Bit 4, Center 107 (16 ~ 199) 184
5356 19:59:46.966112 iDelay=208, Bit 5, Center 95 (0 ~ 191) 192
5357 19:59:46.969792 iDelay=208, Bit 6, Center 111 (24 ~ 199) 176
5358 19:59:46.972854 iDelay=208, Bit 7, Center 115 (24 ~ 207) 184
5359 19:59:46.979754 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5360 19:59:46.982598 iDelay=208, Bit 9, Center 83 (-8 ~ 175) 184
5361 19:59:46.986237 iDelay=208, Bit 10, Center 95 (8 ~ 183) 176
5362 19:59:46.989601 iDelay=208, Bit 11, Center 87 (0 ~ 175) 176
5363 19:59:46.992852 iDelay=208, Bit 12, Center 95 (8 ~ 183) 176
5364 19:59:46.996583 iDelay=208, Bit 13, Center 99 (8 ~ 191) 184
5365 19:59:47.003193 iDelay=208, Bit 14, Center 103 (16 ~ 191) 176
5366 19:59:47.006306 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5367 19:59:47.006861 ==
5368 19:59:47.009834 Dram Type= 6, Freq= 0, CH_0, rank 1
5369 19:59:47.012814 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5370 19:59:47.013338 ==
5371 19:59:47.016235 DQS Delay:
5372 19:59:47.016645 DQS0 = 0, DQS1 = 0
5373 19:59:47.016980 DQM Delay:
5374 19:59:47.019740 DQM0 = 104, DQM1 = 93
5375 19:59:47.020249 DQ Delay:
5376 19:59:47.022711 DQ0 =103, DQ1 =107, DQ2 =99, DQ3 =99
5377 19:59:47.026324 DQ4 =107, DQ5 =95, DQ6 =111, DQ7 =115
5378 19:59:47.029281 DQ8 =87, DQ9 =83, DQ10 =95, DQ11 =87
5379 19:59:47.032366 DQ12 =95, DQ13 =99, DQ14 =103, DQ15 =99
5380 19:59:47.032877
5381 19:59:47.036335
5382 19:59:47.036838 ==
5383 19:59:47.039473 Dram Type= 6, Freq= 0, CH_0, rank 1
5384 19:59:47.042667 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5385 19:59:47.043178 ==
5386 19:59:47.043515
5387 19:59:47.043940
5388 19:59:47.045806 TX Vref Scan disable
5389 19:59:47.046311 == TX Byte 0 ==
5390 19:59:47.052344 Update DQ dly =719 (2 ,6, 15) DQ OEN =(2 ,3)
5391 19:59:47.055761 Update DQM dly =719 (2 ,6, 15) DQM OEN =(2 ,3)
5392 19:59:47.056280 == TX Byte 1 ==
5393 19:59:47.062925 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5394 19:59:47.065695 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5395 19:59:47.066128 ==
5396 19:59:47.068933 Dram Type= 6, Freq= 0, CH_0, rank 1
5397 19:59:47.072316 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5398 19:59:47.072854 ==
5399 19:59:47.073301
5400 19:59:47.073714
5401 19:59:47.075575 TX Vref Scan disable
5402 19:59:47.079068 == TX Byte 0 ==
5403 19:59:47.082341 Update DQ dly =718 (2 ,6, 14) DQ OEN =(2 ,3)
5404 19:59:47.085740 Update DQM dly =718 (2 ,6, 14) DQM OEN =(2 ,3)
5405 19:59:47.088749 == TX Byte 1 ==
5406 19:59:47.092191 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5407 19:59:47.095215 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5408 19:59:47.095668
5409 19:59:47.098351 [DATLAT]
5410 19:59:47.099007 Freq=933, CH0 RK1
5411 19:59:47.099498
5412 19:59:47.102046 DATLAT Default: 0xb
5413 19:59:47.102473 0, 0xFFFF, sum = 0
5414 19:59:47.105153 1, 0xFFFF, sum = 0
5415 19:59:47.105572 2, 0xFFFF, sum = 0
5416 19:59:47.108262 3, 0xFFFF, sum = 0
5417 19:59:47.108680 4, 0xFFFF, sum = 0
5418 19:59:47.111900 5, 0xFFFF, sum = 0
5419 19:59:47.112318 6, 0xFFFF, sum = 0
5420 19:59:47.115290 7, 0xFFFF, sum = 0
5421 19:59:47.115890 8, 0xFFFF, sum = 0
5422 19:59:47.118319 9, 0xFFFF, sum = 0
5423 19:59:47.118738 10, 0x0, sum = 1
5424 19:59:47.121641 11, 0x0, sum = 2
5425 19:59:47.122058 12, 0x0, sum = 3
5426 19:59:47.125495 13, 0x0, sum = 4
5427 19:59:47.125913 best_step = 11
5428 19:59:47.126238
5429 19:59:47.126540 ==
5430 19:59:47.128322 Dram Type= 6, Freq= 0, CH_0, rank 1
5431 19:59:47.135225 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5432 19:59:47.135668 ==
5433 19:59:47.136009 RX Vref Scan: 0
5434 19:59:47.136314
5435 19:59:47.138581 RX Vref 0 -> 0, step: 1
5436 19:59:47.139008
5437 19:59:47.141713 RX Delay -53 -> 252, step: 4
5438 19:59:47.145272 iDelay=199, Bit 0, Center 102 (15 ~ 190) 176
5439 19:59:47.149022 iDelay=199, Bit 1, Center 108 (23 ~ 194) 172
5440 19:59:47.155173 iDelay=199, Bit 2, Center 102 (15 ~ 190) 176
5441 19:59:47.158709 iDelay=199, Bit 3, Center 102 (15 ~ 190) 176
5442 19:59:47.161522 iDelay=199, Bit 4, Center 106 (19 ~ 194) 176
5443 19:59:47.165353 iDelay=199, Bit 5, Center 98 (11 ~ 186) 176
5444 19:59:47.168370 iDelay=199, Bit 6, Center 108 (23 ~ 194) 172
5445 19:59:47.175411 iDelay=199, Bit 7, Center 112 (27 ~ 198) 172
5446 19:59:47.178403 iDelay=199, Bit 8, Center 84 (3 ~ 166) 164
5447 19:59:47.181988 iDelay=199, Bit 9, Center 82 (-1 ~ 166) 168
5448 19:59:47.185200 iDelay=199, Bit 10, Center 94 (11 ~ 178) 168
5449 19:59:47.188339 iDelay=199, Bit 11, Center 88 (7 ~ 170) 164
5450 19:59:47.192198 iDelay=199, Bit 12, Center 100 (19 ~ 182) 164
5451 19:59:47.198572 iDelay=199, Bit 13, Center 98 (15 ~ 182) 168
5452 19:59:47.202183 iDelay=199, Bit 14, Center 102 (19 ~ 186) 168
5453 19:59:47.204762 iDelay=199, Bit 15, Center 102 (19 ~ 186) 168
5454 19:59:47.205177 ==
5455 19:59:47.208541 Dram Type= 6, Freq= 0, CH_0, rank 1
5456 19:59:47.211477 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5457 19:59:47.215341 ==
5458 19:59:47.215910 DQS Delay:
5459 19:59:47.216246 DQS0 = 0, DQS1 = 0
5460 19:59:47.218378 DQM Delay:
5461 19:59:47.218905 DQM0 = 104, DQM1 = 93
5462 19:59:47.222068 DQ Delay:
5463 19:59:47.224825 DQ0 =102, DQ1 =108, DQ2 =102, DQ3 =102
5464 19:59:47.228256 DQ4 =106, DQ5 =98, DQ6 =108, DQ7 =112
5465 19:59:47.231732 DQ8 =84, DQ9 =82, DQ10 =94, DQ11 =88
5466 19:59:47.235237 DQ12 =100, DQ13 =98, DQ14 =102, DQ15 =102
5467 19:59:47.235791
5468 19:59:47.236126
5469 19:59:47.241119 [DQSOSCAuto] RK1, (LSB)MR18= 0x2e06, (MSB)MR19= 0x505, tDQSOscB0 = 420 ps tDQSOscB1 = 407 ps
5470 19:59:47.245140 CH0 RK1: MR19=505, MR18=2E06
5471 19:59:47.251911 CH0_RK1: MR19=0x505, MR18=0x2E06, DQSOSC=407, MR23=63, INC=65, DEC=43
5472 19:59:47.254752 [RxdqsGatingPostProcess] freq 933
5473 19:59:47.257897 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5474 19:59:47.261095 best DQS0 dly(2T, 0.5T) = (0, 10)
5475 19:59:47.265117 best DQS1 dly(2T, 0.5T) = (0, 11)
5476 19:59:47.268120 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5477 19:59:47.271439 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
5478 19:59:47.274836 best DQS0 dly(2T, 0.5T) = (0, 10)
5479 19:59:47.277730 best DQS1 dly(2T, 0.5T) = (0, 10)
5480 19:59:47.281489 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5481 19:59:47.284545 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5482 19:59:47.288108 Pre-setting of DQS Precalculation
5483 19:59:47.291795 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5484 19:59:47.294939 ==
5485 19:59:47.297967 Dram Type= 6, Freq= 0, CH_1, rank 0
5486 19:59:47.301663 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5487 19:59:47.302191 ==
5488 19:59:47.304990 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5489 19:59:47.311411 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
5490 19:59:47.315084 [CA 0] Center 36 (6~67) winsize 62
5491 19:59:47.318070 [CA 1] Center 36 (6~67) winsize 62
5492 19:59:47.321971 [CA 2] Center 34 (4~65) winsize 62
5493 19:59:47.324887 [CA 3] Center 34 (4~65) winsize 62
5494 19:59:47.327985 [CA 4] Center 34 (4~64) winsize 61
5495 19:59:47.331502 [CA 5] Center 33 (3~64) winsize 62
5496 19:59:47.332062
5497 19:59:47.334960 [CmdBusTrainingLP45] Vref(ca) range 1: 37
5498 19:59:47.335475
5499 19:59:47.338221 [CATrainingPosCal] consider 1 rank data
5500 19:59:47.341426 u2DelayCellTimex100 = 270/100 ps
5501 19:59:47.344576 CA0 delay=36 (6~67),Diff = 3 PI (18 cell)
5502 19:59:47.351151 CA1 delay=36 (6~67),Diff = 3 PI (18 cell)
5503 19:59:47.354317 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5504 19:59:47.357898 CA3 delay=34 (4~65),Diff = 1 PI (6 cell)
5505 19:59:47.360957 CA4 delay=34 (4~64),Diff = 1 PI (6 cell)
5506 19:59:47.364349 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5507 19:59:47.364944
5508 19:59:47.368018 CA PerBit enable=1, Macro0, CA PI delay=33
5509 19:59:47.368428
5510 19:59:47.371028 [CBTSetCACLKResult] CA Dly = 33
5511 19:59:47.371533 CS Dly: 7 (0~38)
5512 19:59:47.374714 ==
5513 19:59:47.378191 Dram Type= 6, Freq= 0, CH_1, rank 1
5514 19:59:47.381424 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5515 19:59:47.381931 ==
5516 19:59:47.384395 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5517 19:59:47.391406 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5518 19:59:47.394828 [CA 0] Center 37 (6~68) winsize 63
5519 19:59:47.398094 [CA 1] Center 37 (7~68) winsize 62
5520 19:59:47.402167 [CA 2] Center 35 (4~66) winsize 63
5521 19:59:47.405031 [CA 3] Center 34 (4~65) winsize 62
5522 19:59:47.408232 [CA 4] Center 34 (4~65) winsize 62
5523 19:59:47.411987 [CA 5] Center 34 (4~64) winsize 61
5524 19:59:47.412505
5525 19:59:47.415242 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5526 19:59:47.415796
5527 19:59:47.418210 [CATrainingPosCal] consider 2 rank data
5528 19:59:47.421760 u2DelayCellTimex100 = 270/100 ps
5529 19:59:47.425086 CA0 delay=36 (6~67),Diff = 2 PI (12 cell)
5530 19:59:47.428260 CA1 delay=37 (7~67),Diff = 3 PI (18 cell)
5531 19:59:47.434307 CA2 delay=34 (4~65),Diff = 0 PI (0 cell)
5532 19:59:47.438313 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
5533 19:59:47.441173 CA4 delay=34 (4~64),Diff = 0 PI (0 cell)
5534 19:59:47.445086 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
5535 19:59:47.445612
5536 19:59:47.448229 CA PerBit enable=1, Macro0, CA PI delay=34
5537 19:59:47.448747
5538 19:59:47.451402 [CBTSetCACLKResult] CA Dly = 34
5539 19:59:47.451968 CS Dly: 8 (0~40)
5540 19:59:47.452304
5541 19:59:47.454902 ----->DramcWriteLeveling(PI) begin...
5542 19:59:47.458071 ==
5543 19:59:47.461267 Dram Type= 6, Freq= 0, CH_1, rank 0
5544 19:59:47.464597 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5545 19:59:47.465128 ==
5546 19:59:47.467483 Write leveling (Byte 0): 23 => 23
5547 19:59:47.471212 Write leveling (Byte 1): 26 => 26
5548 19:59:47.474564 DramcWriteLeveling(PI) end<-----
5549 19:59:47.475074
5550 19:59:47.475406 ==
5551 19:59:47.477820 Dram Type= 6, Freq= 0, CH_1, rank 0
5552 19:59:47.481173 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5553 19:59:47.481697 ==
5554 19:59:47.484361 [Gating] SW mode calibration
5555 19:59:47.491228 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5556 19:59:47.498315 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5557 19:59:47.501141 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5558 19:59:47.504807 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5559 19:59:47.508299 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5560 19:59:47.514706 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5561 19:59:47.518009 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5562 19:59:47.521157 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5563 19:59:47.528204 0 14 24 | B1->B0 | 3434 3030 | 0 0 | (0 1) (0 1)
5564 19:59:47.531517 0 14 28 | B1->B0 | 2525 2323 | 1 0 | (0 0) (0 0)
5565 19:59:47.534714 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5566 19:59:47.540982 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5567 19:59:47.544513 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5568 19:59:47.548177 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5569 19:59:47.554316 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5570 19:59:47.557414 0 15 20 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
5571 19:59:47.560641 0 15 24 | B1->B0 | 2323 3333 | 0 0 | (0 0) (0 0)
5572 19:59:47.567586 0 15 28 | B1->B0 | 3838 4545 | 1 0 | (0 0) (0 0)
5573 19:59:47.571106 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5574 19:59:47.574388 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5575 19:59:47.581414 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5576 19:59:47.584334 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5577 19:59:47.587544 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5578 19:59:47.593818 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5579 19:59:47.597694 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5580 19:59:47.600616 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5581 19:59:47.607891 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5582 19:59:47.610675 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5583 19:59:47.614443 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5584 19:59:47.621029 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5585 19:59:47.624425 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5586 19:59:47.627434 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5587 19:59:47.634305 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5588 19:59:47.637389 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5589 19:59:47.640440 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5590 19:59:47.644046 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5591 19:59:47.650789 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5592 19:59:47.654376 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5593 19:59:47.656990 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5594 19:59:47.663742 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5595 19:59:47.667087 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5596 19:59:47.671132 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5597 19:59:47.677626 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5598 19:59:47.680523 Total UI for P1: 0, mck2ui 16
5599 19:59:47.684063 best dqsien dly found for B0: ( 1, 2, 26)
5600 19:59:47.687203 Total UI for P1: 0, mck2ui 16
5601 19:59:47.690349 best dqsien dly found for B1: ( 1, 2, 26)
5602 19:59:47.694261 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5603 19:59:47.697453 best DQS1 dly(MCK, UI, PI) = (1, 2, 26)
5604 19:59:47.697958
5605 19:59:47.700354 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5606 19:59:47.703813 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)
5607 19:59:47.707578 [Gating] SW calibration Done
5608 19:59:47.708127 ==
5609 19:59:47.710442 Dram Type= 6, Freq= 0, CH_1, rank 0
5610 19:59:47.713709 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5611 19:59:47.714218 ==
5612 19:59:47.716858 RX Vref Scan: 0
5613 19:59:47.717372
5614 19:59:47.717711 RX Vref 0 -> 0, step: 1
5615 19:59:47.720317
5616 19:59:47.720731 RX Delay -80 -> 252, step: 8
5617 19:59:47.727488 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5618 19:59:47.730390 iDelay=208, Bit 1, Center 99 (8 ~ 191) 184
5619 19:59:47.733512 iDelay=208, Bit 2, Center 91 (0 ~ 183) 184
5620 19:59:47.737142 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5621 19:59:47.740169 iDelay=208, Bit 4, Center 99 (8 ~ 191) 184
5622 19:59:47.743611 iDelay=208, Bit 5, Center 111 (16 ~ 207) 192
5623 19:59:47.750080 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5624 19:59:47.753768 iDelay=208, Bit 7, Center 103 (8 ~ 199) 192
5625 19:59:47.756716 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5626 19:59:47.759992 iDelay=208, Bit 9, Center 87 (0 ~ 175) 176
5627 19:59:47.763417 iDelay=208, Bit 10, Center 99 (8 ~ 191) 184
5628 19:59:47.766780 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5629 19:59:47.773293 iDelay=208, Bit 12, Center 107 (16 ~ 199) 184
5630 19:59:47.777114 iDelay=208, Bit 13, Center 103 (16 ~ 191) 176
5631 19:59:47.779976 iDelay=208, Bit 14, Center 103 (16 ~ 191) 176
5632 19:59:47.783882 iDelay=208, Bit 15, Center 107 (16 ~ 199) 184
5633 19:59:47.784497 ==
5634 19:59:47.786655 Dram Type= 6, Freq= 0, CH_1, rank 0
5635 19:59:47.789802 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5636 19:59:47.793878 ==
5637 19:59:47.794383 DQS Delay:
5638 19:59:47.794713 DQS0 = 0, DQS1 = 0
5639 19:59:47.796765 DQM Delay:
5640 19:59:47.797175 DQM0 = 102, DQM1 = 98
5641 19:59:47.799880 DQ Delay:
5642 19:59:47.803371 DQ0 =107, DQ1 =99, DQ2 =91, DQ3 =99
5643 19:59:47.807181 DQ4 =99, DQ5 =111, DQ6 =111, DQ7 =103
5644 19:59:47.810342 DQ8 =87, DQ9 =87, DQ10 =99, DQ11 =91
5645 19:59:47.813134 DQ12 =107, DQ13 =103, DQ14 =103, DQ15 =107
5646 19:59:47.813549
5647 19:59:47.813878
5648 19:59:47.814183 ==
5649 19:59:47.816839 Dram Type= 6, Freq= 0, CH_1, rank 0
5650 19:59:47.820013 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5651 19:59:47.820524 ==
5652 19:59:47.820857
5653 19:59:47.821164
5654 19:59:47.823298 TX Vref Scan disable
5655 19:59:47.826821 == TX Byte 0 ==
5656 19:59:47.829858 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5657 19:59:47.833569 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5658 19:59:47.836621 == TX Byte 1 ==
5659 19:59:47.839709 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5660 19:59:47.843564 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5661 19:59:47.844120 ==
5662 19:59:47.846870 Dram Type= 6, Freq= 0, CH_1, rank 0
5663 19:59:47.850137 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5664 19:59:47.850644 ==
5665 19:59:47.853358
5666 19:59:47.853855
5667 19:59:47.854188 TX Vref Scan disable
5668 19:59:47.856318 == TX Byte 0 ==
5669 19:59:47.859389 Update DQ dly =707 (2 ,5, 35) DQ OEN =(2 ,2)
5670 19:59:47.866338 Update DQM dly =707 (2 ,5, 35) DQM OEN =(2 ,2)
5671 19:59:47.866754 == TX Byte 1 ==
5672 19:59:47.869896 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5673 19:59:47.876531 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5674 19:59:47.877014
5675 19:59:47.877347 [DATLAT]
5676 19:59:47.877656 Freq=933, CH1 RK0
5677 19:59:47.877956
5678 19:59:47.879608 DATLAT Default: 0xd
5679 19:59:47.880169 0, 0xFFFF, sum = 0
5680 19:59:47.883260 1, 0xFFFF, sum = 0
5681 19:59:47.883851 2, 0xFFFF, sum = 0
5682 19:59:47.886565 3, 0xFFFF, sum = 0
5683 19:59:47.889813 4, 0xFFFF, sum = 0
5684 19:59:47.890234 5, 0xFFFF, sum = 0
5685 19:59:47.893145 6, 0xFFFF, sum = 0
5686 19:59:47.893720 7, 0xFFFF, sum = 0
5687 19:59:47.896409 8, 0xFFFF, sum = 0
5688 19:59:47.897073 9, 0xFFFF, sum = 0
5689 19:59:47.900174 10, 0x0, sum = 1
5690 19:59:47.900686 11, 0x0, sum = 2
5691 19:59:47.902921 12, 0x0, sum = 3
5692 19:59:47.903341 13, 0x0, sum = 4
5693 19:59:47.903711 best_step = 11
5694 19:59:47.904025
5695 19:59:47.906643 ==
5696 19:59:47.907183 Dram Type= 6, Freq= 0, CH_1, rank 0
5697 19:59:47.913258 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5698 19:59:47.913769 ==
5699 19:59:47.914101 RX Vref Scan: 1
5700 19:59:47.914406
5701 19:59:47.916866 RX Vref 0 -> 0, step: 1
5702 19:59:47.917278
5703 19:59:47.920222 RX Delay -45 -> 252, step: 4
5704 19:59:47.920729
5705 19:59:47.922871 Set Vref, RX VrefLevel [Byte0]: 55
5706 19:59:47.926935 [Byte1]: 48
5707 19:59:47.927446
5708 19:59:47.929694 Final RX Vref Byte 0 = 55 to rank0
5709 19:59:47.933384 Final RX Vref Byte 1 = 48 to rank0
5710 19:59:47.936560 Final RX Vref Byte 0 = 55 to rank1
5711 19:59:47.939585 Final RX Vref Byte 1 = 48 to rank1==
5712 19:59:47.943161 Dram Type= 6, Freq= 0, CH_1, rank 0
5713 19:59:47.946589 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5714 19:59:47.947031 ==
5715 19:59:47.949512 DQS Delay:
5716 19:59:47.949925 DQS0 = 0, DQS1 = 0
5717 19:59:47.953215 DQM Delay:
5718 19:59:47.953627 DQM0 = 103, DQM1 = 99
5719 19:59:47.953954 DQ Delay:
5720 19:59:47.956362 DQ0 =106, DQ1 =98, DQ2 =94, DQ3 =98
5721 19:59:47.959561 DQ4 =102, DQ5 =112, DQ6 =110, DQ7 =106
5722 19:59:47.962704 DQ8 =88, DQ9 =88, DQ10 =100, DQ11 =96
5723 19:59:47.969157 DQ12 =106, DQ13 =104, DQ14 =106, DQ15 =108
5724 19:59:47.969571
5725 19:59:47.969950
5726 19:59:47.975947 [DQSOSCAuto] RK0, (LSB)MR18= 0x162d, (MSB)MR19= 0x505, tDQSOscB0 = 407 ps tDQSOscB1 = 414 ps
5727 19:59:47.978979 CH1 RK0: MR19=505, MR18=162D
5728 19:59:47.985893 CH1_RK0: MR19=0x505, MR18=0x162D, DQSOSC=407, MR23=63, INC=65, DEC=43
5729 19:59:47.986358
5730 19:59:47.989532 ----->DramcWriteLeveling(PI) begin...
5731 19:59:47.989959 ==
5732 19:59:47.992463 Dram Type= 6, Freq= 0, CH_1, rank 1
5733 19:59:47.996008 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5734 19:59:47.996518 ==
5735 19:59:47.999690 Write leveling (Byte 0): 28 => 28
5736 19:59:48.002690 Write leveling (Byte 1): 28 => 28
5737 19:59:48.006022 DramcWriteLeveling(PI) end<-----
5738 19:59:48.006540
5739 19:59:48.006871 ==
5740 19:59:48.009499 Dram Type= 6, Freq= 0, CH_1, rank 1
5741 19:59:48.013008 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5742 19:59:48.013518 ==
5743 19:59:48.016580 [Gating] SW mode calibration
5744 19:59:48.022810 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5745 19:59:48.029455 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5746 19:59:48.032594 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5747 19:59:48.039006 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5748 19:59:48.042772 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5749 19:59:48.045985 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5750 19:59:48.052692 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5751 19:59:48.056402 0 14 20 | B1->B0 | 3434 3434 | 0 1 | (0 1) (1 0)
5752 19:59:48.059107 0 14 24 | B1->B0 | 2d2d 3030 | 0 1 | (0 1) (1 0)
5753 19:59:48.065490 0 14 28 | B1->B0 | 2323 2626 | 0 0 | (0 0) (1 0)
5754 19:59:48.069262 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5755 19:59:48.072486 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5756 19:59:48.075799 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5757 19:59:48.082919 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5758 19:59:48.086088 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5759 19:59:48.089283 0 15 20 | B1->B0 | 2323 2323 | 1 0 | (0 0) (0 0)
5760 19:59:48.095998 0 15 24 | B1->B0 | 3737 2d2d | 0 0 | (0 0) (0 0)
5761 19:59:48.099197 0 15 28 | B1->B0 | 4646 3d3d | 0 0 | (0 0) (0 0)
5762 19:59:48.103040 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5763 19:59:48.109058 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5764 19:59:48.112614 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5765 19:59:48.115685 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5766 19:59:48.122761 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5767 19:59:48.126388 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5768 19:59:48.128931 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5769 19:59:48.135677 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5770 19:59:48.139098 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5771 19:59:48.142526 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5772 19:59:48.149188 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5773 19:59:48.152059 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5774 19:59:48.155341 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5775 19:59:48.162274 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5776 19:59:48.165747 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5777 19:59:48.168971 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5778 19:59:48.173068 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5779 19:59:48.179449 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5780 19:59:48.182109 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5781 19:59:48.186102 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5782 19:59:48.192629 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5783 19:59:48.195881 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5784 19:59:48.199041 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5785 19:59:48.206253 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5786 19:59:48.209421 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5787 19:59:48.212575 Total UI for P1: 0, mck2ui 16
5788 19:59:48.216090 best dqsien dly found for B0: ( 1, 2, 26)
5789 19:59:48.219562 Total UI for P1: 0, mck2ui 16
5790 19:59:48.223013 best dqsien dly found for B1: ( 1, 2, 26)
5791 19:59:48.226147 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5792 19:59:48.229226 best DQS1 dly(MCK, UI, PI) = (1, 2, 26)
5793 19:59:48.229750
5794 19:59:48.232548 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5795 19:59:48.236019 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)
5796 19:59:48.239161 [Gating] SW calibration Done
5797 19:59:48.239706 ==
5798 19:59:48.242625 Dram Type= 6, Freq= 0, CH_1, rank 1
5799 19:59:48.245579 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5800 19:59:48.249301 ==
5801 19:59:48.249808 RX Vref Scan: 0
5802 19:59:48.250135
5803 19:59:48.252497 RX Vref 0 -> 0, step: 1
5804 19:59:48.252999
5805 19:59:48.255669 RX Delay -80 -> 252, step: 8
5806 19:59:48.258883 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5807 19:59:48.262057 iDelay=208, Bit 1, Center 99 (8 ~ 191) 184
5808 19:59:48.265811 iDelay=208, Bit 2, Center 91 (0 ~ 183) 184
5809 19:59:48.268583 iDelay=208, Bit 3, Center 95 (8 ~ 183) 176
5810 19:59:48.272180 iDelay=208, Bit 4, Center 95 (8 ~ 183) 176
5811 19:59:48.278568 iDelay=208, Bit 5, Center 115 (24 ~ 207) 184
5812 19:59:48.281978 iDelay=208, Bit 6, Center 115 (24 ~ 207) 184
5813 19:59:48.285561 iDelay=208, Bit 7, Center 99 (8 ~ 191) 184
5814 19:59:48.288690 iDelay=208, Bit 8, Center 91 (0 ~ 183) 184
5815 19:59:48.291619 iDelay=208, Bit 9, Center 91 (0 ~ 183) 184
5816 19:59:48.295732 iDelay=208, Bit 10, Center 99 (8 ~ 191) 184
5817 19:59:48.302003 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5818 19:59:48.305706 iDelay=208, Bit 12, Center 103 (8 ~ 199) 192
5819 19:59:48.308734 iDelay=208, Bit 13, Center 103 (16 ~ 191) 176
5820 19:59:48.312110 iDelay=208, Bit 14, Center 103 (16 ~ 191) 176
5821 19:59:48.315171 iDelay=208, Bit 15, Center 107 (16 ~ 199) 184
5822 19:59:48.318134 ==
5823 19:59:48.321577 Dram Type= 6, Freq= 0, CH_1, rank 1
5824 19:59:48.324549 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5825 19:59:48.325059 ==
5826 19:59:48.325391 DQS Delay:
5827 19:59:48.328536 DQS0 = 0, DQS1 = 0
5828 19:59:48.329039 DQM Delay:
5829 19:59:48.331582 DQM0 = 102, DQM1 = 98
5830 19:59:48.332130 DQ Delay:
5831 19:59:48.334837 DQ0 =107, DQ1 =99, DQ2 =91, DQ3 =95
5832 19:59:48.338332 DQ4 =95, DQ5 =115, DQ6 =115, DQ7 =99
5833 19:59:48.341126 DQ8 =91, DQ9 =91, DQ10 =99, DQ11 =91
5834 19:59:48.345212 DQ12 =103, DQ13 =103, DQ14 =103, DQ15 =107
5835 19:59:48.345718
5836 19:59:48.346044
5837 19:59:48.346346 ==
5838 19:59:48.348376 Dram Type= 6, Freq= 0, CH_1, rank 1
5839 19:59:48.351742 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5840 19:59:48.354824 ==
5841 19:59:48.355328
5842 19:59:48.355688
5843 19:59:48.356002 TX Vref Scan disable
5844 19:59:48.357907 == TX Byte 0 ==
5845 19:59:48.361175 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5846 19:59:48.364675 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5847 19:59:48.367610 == TX Byte 1 ==
5848 19:59:48.371160 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5849 19:59:48.374345 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5850 19:59:48.377837 ==
5851 19:59:48.380917 Dram Type= 6, Freq= 0, CH_1, rank 1
5852 19:59:48.384175 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5853 19:59:48.384588 ==
5854 19:59:48.384911
5855 19:59:48.385215
5856 19:59:48.387594 TX Vref Scan disable
5857 19:59:48.388040 == TX Byte 0 ==
5858 19:59:48.394567 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5859 19:59:48.397303 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5860 19:59:48.397714 == TX Byte 1 ==
5861 19:59:48.404463 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5862 19:59:48.407798 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5863 19:59:48.408340
5864 19:59:48.408671 [DATLAT]
5865 19:59:48.410993 Freq=933, CH1 RK1
5866 19:59:48.411416
5867 19:59:48.411780 DATLAT Default: 0xb
5868 19:59:48.414257 0, 0xFFFF, sum = 0
5869 19:59:48.414771 1, 0xFFFF, sum = 0
5870 19:59:48.418084 2, 0xFFFF, sum = 0
5871 19:59:48.418608 3, 0xFFFF, sum = 0
5872 19:59:48.421213 4, 0xFFFF, sum = 0
5873 19:59:48.421735 5, 0xFFFF, sum = 0
5874 19:59:48.424233 6, 0xFFFF, sum = 0
5875 19:59:48.427625 7, 0xFFFF, sum = 0
5876 19:59:48.428180 8, 0xFFFF, sum = 0
5877 19:59:48.431422 9, 0xFFFF, sum = 0
5878 19:59:48.431981 10, 0x0, sum = 1
5879 19:59:48.432321 11, 0x0, sum = 2
5880 19:59:48.434588 12, 0x0, sum = 3
5881 19:59:48.435118 13, 0x0, sum = 4
5882 19:59:48.437539 best_step = 11
5883 19:59:48.438052
5884 19:59:48.438379 ==
5885 19:59:48.440928 Dram Type= 6, Freq= 0, CH_1, rank 1
5886 19:59:48.444061 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5887 19:59:48.444572 ==
5888 19:59:48.447763 RX Vref Scan: 0
5889 19:59:48.448408
5890 19:59:48.448750 RX Vref 0 -> 0, step: 1
5891 19:59:48.449059
5892 19:59:48.450310 RX Delay -45 -> 252, step: 4
5893 19:59:48.458378 iDelay=203, Bit 0, Center 110 (27 ~ 194) 168
5894 19:59:48.461302 iDelay=203, Bit 1, Center 102 (19 ~ 186) 168
5895 19:59:48.464463 iDelay=203, Bit 2, Center 94 (11 ~ 178) 168
5896 19:59:48.468173 iDelay=203, Bit 3, Center 100 (19 ~ 182) 164
5897 19:59:48.471025 iDelay=203, Bit 4, Center 100 (19 ~ 182) 164
5898 19:59:48.477803 iDelay=203, Bit 5, Center 118 (35 ~ 202) 168
5899 19:59:48.481801 iDelay=203, Bit 6, Center 112 (27 ~ 198) 172
5900 19:59:48.484849 iDelay=203, Bit 7, Center 104 (19 ~ 190) 172
5901 19:59:48.487936 iDelay=203, Bit 8, Center 86 (-1 ~ 174) 176
5902 19:59:48.491104 iDelay=203, Bit 9, Center 88 (3 ~ 174) 172
5903 19:59:48.495333 iDelay=203, Bit 10, Center 100 (15 ~ 186) 172
5904 19:59:48.501213 iDelay=203, Bit 11, Center 92 (7 ~ 178) 172
5905 19:59:48.504504 iDelay=203, Bit 12, Center 110 (23 ~ 198) 176
5906 19:59:48.508053 iDelay=203, Bit 13, Center 106 (23 ~ 190) 168
5907 19:59:48.511690 iDelay=203, Bit 14, Center 104 (23 ~ 186) 164
5908 19:59:48.517918 iDelay=203, Bit 15, Center 110 (27 ~ 194) 168
5909 19:59:48.518424 ==
5910 19:59:48.520882 Dram Type= 6, Freq= 0, CH_1, rank 1
5911 19:59:48.524745 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5912 19:59:48.525156 ==
5913 19:59:48.525484 DQS Delay:
5914 19:59:48.527603 DQS0 = 0, DQS1 = 0
5915 19:59:48.528056 DQM Delay:
5916 19:59:48.531477 DQM0 = 105, DQM1 = 99
5917 19:59:48.532031 DQ Delay:
5918 19:59:48.534349 DQ0 =110, DQ1 =102, DQ2 =94, DQ3 =100
5919 19:59:48.538402 DQ4 =100, DQ5 =118, DQ6 =112, DQ7 =104
5920 19:59:48.541367 DQ8 =86, DQ9 =88, DQ10 =100, DQ11 =92
5921 19:59:48.544593 DQ12 =110, DQ13 =106, DQ14 =104, DQ15 =110
5922 19:59:48.545098
5923 19:59:48.545430
5924 19:59:48.554911 [DQSOSCAuto] RK1, (LSB)MR18= 0x2afe, (MSB)MR19= 0x504, tDQSOscB0 = 422 ps tDQSOscB1 = 408 ps
5925 19:59:48.555453 CH1 RK1: MR19=504, MR18=2AFE
5926 19:59:48.561017 CH1_RK1: MR19=0x504, MR18=0x2AFE, DQSOSC=408, MR23=63, INC=65, DEC=43
5927 19:59:48.564164 [RxdqsGatingPostProcess] freq 933
5928 19:59:48.571165 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5929 19:59:48.574610 best DQS0 dly(2T, 0.5T) = (0, 10)
5930 19:59:48.577959 best DQS1 dly(2T, 0.5T) = (0, 10)
5931 19:59:48.581061 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5932 19:59:48.584811 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5933 19:59:48.587952 best DQS0 dly(2T, 0.5T) = (0, 10)
5934 19:59:48.591359 best DQS1 dly(2T, 0.5T) = (0, 10)
5935 19:59:48.591920 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5936 19:59:48.594407 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5937 19:59:48.598038 Pre-setting of DQS Precalculation
5938 19:59:48.604564 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5939 19:59:48.611196 sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3
5940 19:59:48.618016 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
5941 19:59:48.618525
5942 19:59:48.618848
5943 19:59:48.620990 [Calibration Summary] 1866 Mbps
5944 19:59:48.624008 CH 0, Rank 0
5945 19:59:48.624417 SW Impedance : PASS
5946 19:59:48.628012 DUTY Scan : NO K
5947 19:59:48.628520 ZQ Calibration : PASS
5948 19:59:48.630745 Jitter Meter : NO K
5949 19:59:48.634269 CBT Training : PASS
5950 19:59:48.634681 Write leveling : PASS
5951 19:59:48.637843 RX DQS gating : PASS
5952 19:59:48.641025 RX DQ/DQS(RDDQC) : PASS
5953 19:59:48.641555 TX DQ/DQS : PASS
5954 19:59:48.644134 RX DATLAT : PASS
5955 19:59:48.648072 RX DQ/DQS(Engine): PASS
5956 19:59:48.648579 TX OE : NO K
5957 19:59:48.651479 All Pass.
5958 19:59:48.652024
5959 19:59:48.652362 CH 0, Rank 1
5960 19:59:48.654411 SW Impedance : PASS
5961 19:59:48.654863 DUTY Scan : NO K
5962 19:59:48.657869 ZQ Calibration : PASS
5963 19:59:48.660855 Jitter Meter : NO K
5964 19:59:48.661299 CBT Training : PASS
5965 19:59:48.664099 Write leveling : PASS
5966 19:59:48.667804 RX DQS gating : PASS
5967 19:59:48.668212 RX DQ/DQS(RDDQC) : PASS
5968 19:59:48.671000 TX DQ/DQS : PASS
5969 19:59:48.671407 RX DATLAT : PASS
5970 19:59:48.674154 RX DQ/DQS(Engine): PASS
5971 19:59:48.678108 TX OE : NO K
5972 19:59:48.678605 All Pass.
5973 19:59:48.678937
5974 19:59:48.679240 CH 1, Rank 0
5975 19:59:48.681082 SW Impedance : PASS
5976 19:59:48.684095 DUTY Scan : NO K
5977 19:59:48.684509 ZQ Calibration : PASS
5978 19:59:48.687709 Jitter Meter : NO K
5979 19:59:48.690862 CBT Training : PASS
5980 19:59:48.691267 Write leveling : PASS
5981 19:59:48.694791 RX DQS gating : PASS
5982 19:59:48.697591 RX DQ/DQS(RDDQC) : PASS
5983 19:59:48.698001 TX DQ/DQS : PASS
5984 19:59:48.700473 RX DATLAT : PASS
5985 19:59:48.704605 RX DQ/DQS(Engine): PASS
5986 19:59:48.705114 TX OE : NO K
5987 19:59:48.707527 All Pass.
5988 19:59:48.707957
5989 19:59:48.708284 CH 1, Rank 1
5990 19:59:48.710848 SW Impedance : PASS
5991 19:59:48.711260 DUTY Scan : NO K
5992 19:59:48.714002 ZQ Calibration : PASS
5993 19:59:48.717357 Jitter Meter : NO K
5994 19:59:48.717784 CBT Training : PASS
5995 19:59:48.720648 Write leveling : PASS
5996 19:59:48.721059 RX DQS gating : PASS
5997 19:59:48.723861 RX DQ/DQS(RDDQC) : PASS
5998 19:59:48.727974 TX DQ/DQS : PASS
5999 19:59:48.728485 RX DATLAT : PASS
6000 19:59:48.730650 RX DQ/DQS(Engine): PASS
6001 19:59:48.733813 TX OE : NO K
6002 19:59:48.734223 All Pass.
6003 19:59:48.734553
6004 19:59:48.737995 DramC Write-DBI off
6005 19:59:48.738500 PER_BANK_REFRESH: Hybrid Mode
6006 19:59:48.740963 TX_TRACKING: ON
6007 19:59:48.747598 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0
6008 19:59:48.754084 [FAST_K] Save calibration result to emmc
6009 19:59:48.757355 dramc_set_vcore_voltage set vcore to 650000
6010 19:59:48.757764 Read voltage for 400, 6
6011 19:59:48.760875 Vio18 = 0
6012 19:59:48.761355 Vcore = 650000
6013 19:59:48.761710 Vdram = 0
6014 19:59:48.764131 Vddq = 0
6015 19:59:48.764539 Vmddr = 0
6016 19:59:48.767211 [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0
6017 19:59:48.774162 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
6018 19:59:48.777210 MEM_TYPE=3, freq_sel=20
6019 19:59:48.780560 sv_algorithm_assistance_LP4_800
6020 19:59:48.784415 ============ PULL DRAM RESETB DOWN ============
6021 19:59:48.787588 ========== PULL DRAM RESETB DOWN end =========
6022 19:59:48.791008 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6023 19:59:48.794205 ===================================
6024 19:59:48.797407 LPDDR4 DRAM CONFIGURATION
6025 19:59:48.800514 ===================================
6026 19:59:48.804388 EX_ROW_EN[0] = 0x0
6027 19:59:48.804798 EX_ROW_EN[1] = 0x0
6028 19:59:48.807334 LP4Y_EN = 0x0
6029 19:59:48.807765 WORK_FSP = 0x0
6030 19:59:48.810535 WL = 0x2
6031 19:59:48.810942 RL = 0x2
6032 19:59:48.813778 BL = 0x2
6033 19:59:48.814155 RPST = 0x0
6034 19:59:48.817550 RD_PRE = 0x0
6035 19:59:48.817928 WR_PRE = 0x1
6036 19:59:48.820725 WR_PST = 0x0
6037 19:59:48.824248 DBI_WR = 0x0
6038 19:59:48.824765 DBI_RD = 0x0
6039 19:59:48.827070 OTF = 0x1
6040 19:59:48.830652 ===================================
6041 19:59:48.834152 ===================================
6042 19:59:48.834530 ANA top config
6043 19:59:48.837114 ===================================
6044 19:59:48.840301 DLL_ASYNC_EN = 0
6045 19:59:48.840677 ALL_SLAVE_EN = 1
6046 19:59:48.844542 NEW_RANK_MODE = 1
6047 19:59:48.847589 DLL_IDLE_MODE = 1
6048 19:59:48.850664 LP45_APHY_COMB_EN = 1
6049 19:59:48.853871 TX_ODT_DIS = 1
6050 19:59:48.854345 NEW_8X_MODE = 1
6051 19:59:48.857175 ===================================
6052 19:59:48.860684 ===================================
6053 19:59:48.863593 data_rate = 800
6054 19:59:48.866771 CKR = 1
6055 19:59:48.870093 DQ_P2S_RATIO = 4
6056 19:59:48.873735 ===================================
6057 19:59:48.876653 CA_P2S_RATIO = 4
6058 19:59:48.879960 DQ_CA_OPEN = 0
6059 19:59:48.880389 DQ_SEMI_OPEN = 1
6060 19:59:48.883380 CA_SEMI_OPEN = 1
6061 19:59:48.886706 CA_FULL_RATE = 0
6062 19:59:48.890324 DQ_CKDIV4_EN = 0
6063 19:59:48.893376 CA_CKDIV4_EN = 1
6064 19:59:48.896847 CA_PREDIV_EN = 0
6065 19:59:48.897226 PH8_DLY = 0
6066 19:59:48.900056 SEMI_OPEN_CA_PICK_MCK_RATIO= 4
6067 19:59:48.903356 DQ_AAMCK_DIV = 0
6068 19:59:48.906642 CA_AAMCK_DIV = 0
6069 19:59:48.910118 CA_ADMCK_DIV = 4
6070 19:59:48.913253 DQ_TRACK_CA_EN = 0
6071 19:59:48.913632 CA_PICK = 800
6072 19:59:48.917149 CA_MCKIO = 400
6073 19:59:48.920017 MCKIO_SEMI = 400
6074 19:59:48.923187 PLL_FREQ = 3016
6075 19:59:48.926337 DQ_UI_PI_RATIO = 32
6076 19:59:48.930164 CA_UI_PI_RATIO = 32
6077 19:59:48.933519 ===================================
6078 19:59:48.936235 ===================================
6079 19:59:48.940019 memory_type:LPDDR4
6080 19:59:48.940489 GP_NUM : 10
6081 19:59:48.943611 SRAM_EN : 1
6082 19:59:48.944022 MD32_EN : 0
6083 19:59:48.946953 ===================================
6084 19:59:48.950267 [ANA_INIT] >>>>>>>>>>>>>>
6085 19:59:48.953431 <<<<<< [CONFIGURE PHASE]: ANA_TX
6086 19:59:48.956312 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
6087 19:59:48.960210 ===================================
6088 19:59:48.963121 data_rate = 800,PCW = 0X7400
6089 19:59:48.966583 ===================================
6090 19:59:48.970006 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
6091 19:59:48.973574 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6092 19:59:48.986683 WARN: tr->DQ_AAMCK_DIV= 0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6093 19:59:48.989810 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
6094 19:59:48.993437 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
6095 19:59:48.996350 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
6096 19:59:48.999505 [ANA_INIT] flow start
6097 19:59:49.003481 [ANA_INIT] PLL >>>>>>>>
6098 19:59:49.003995 [ANA_INIT] PLL <<<<<<<<
6099 19:59:49.006748 [ANA_INIT] MIDPI >>>>>>>>
6100 19:59:49.009818 [ANA_INIT] MIDPI <<<<<<<<
6101 19:59:49.010196 [ANA_INIT] DLL >>>>>>>>
6102 19:59:49.013206 [ANA_INIT] flow end
6103 19:59:49.016491 ============ LP4 DIFF to SE enter ============
6104 19:59:49.023217 ============ LP4 DIFF to SE exit ============
6105 19:59:49.023753 [ANA_INIT] <<<<<<<<<<<<<
6106 19:59:49.026872 [Flow] Enable top DCM control >>>>>
6107 19:59:49.029735 [Flow] Enable top DCM control <<<<<
6108 19:59:49.033720 Enable DLL master slave shuffle
6109 19:59:49.040069 ==============================================================
6110 19:59:49.040550 Gating Mode config
6111 19:59:49.046353 ==============================================================
6112 19:59:49.049584 Config description:
6113 19:59:49.056585 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
6114 19:59:49.063296 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
6115 19:59:49.069734 SELPH_MODE 0: By rank 1: By Phase
6116 19:59:49.072796 ==============================================================
6117 19:59:49.076384 GAT_TRACK_EN = 0
6118 19:59:49.079695 RX_GATING_MODE = 2
6119 19:59:49.082487 RX_GATING_TRACK_MODE = 2
6120 19:59:49.086428 SELPH_MODE = 1
6121 19:59:49.089868 PICG_EARLY_EN = 1
6122 19:59:49.093063 VALID_LAT_VALUE = 1
6123 19:59:49.099409 ==============================================================
6124 19:59:49.103173 Enter into Gating configuration >>>>
6125 19:59:49.105975 Exit from Gating configuration <<<<
6126 19:59:49.109630 Enter into DVFS_PRE_config >>>>>
6127 19:59:49.119154 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
6128 19:59:49.123248 Exit from DVFS_PRE_config <<<<<
6129 19:59:49.126082 Enter into PICG configuration >>>>
6130 19:59:49.129030 Exit from PICG configuration <<<<
6131 19:59:49.132640 [RX_INPUT] configuration >>>>>
6132 19:59:49.133155 [RX_INPUT] configuration <<<<<
6133 19:59:49.139448 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
6134 19:59:49.146000 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
6135 19:59:49.149766 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
6136 19:59:49.155850 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
6137 19:59:49.162863 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
6138 19:59:49.169440 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
6139 19:59:49.172585 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
6140 19:59:49.175769 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
6141 19:59:49.182660 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
6142 19:59:49.185580 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
6143 19:59:49.189051 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
6144 19:59:49.196305 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6145 19:59:49.199326 ===================================
6146 19:59:49.199877 LPDDR4 DRAM CONFIGURATION
6147 19:59:49.202947 ===================================
6148 19:59:49.206521 EX_ROW_EN[0] = 0x0
6149 19:59:49.207027 EX_ROW_EN[1] = 0x0
6150 19:59:49.209643 LP4Y_EN = 0x0
6151 19:59:49.210152 WORK_FSP = 0x0
6152 19:59:49.212919 WL = 0x2
6153 19:59:49.213335 RL = 0x2
6154 19:59:49.215697 BL = 0x2
6155 19:59:49.216131 RPST = 0x0
6156 19:59:49.219708 RD_PRE = 0x0
6157 19:59:49.222430 WR_PRE = 0x1
6158 19:59:49.222842 WR_PST = 0x0
6159 19:59:49.226655 DBI_WR = 0x0
6160 19:59:49.227163 DBI_RD = 0x0
6161 19:59:49.229566 OTF = 0x1
6162 19:59:49.232788 ===================================
6163 19:59:49.235946 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
6164 19:59:49.239277 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
6165 19:59:49.243121 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6166 19:59:49.246026 ===================================
6167 19:59:49.249458 LPDDR4 DRAM CONFIGURATION
6168 19:59:49.253233 ===================================
6169 19:59:49.256108 EX_ROW_EN[0] = 0x10
6170 19:59:49.256520 EX_ROW_EN[1] = 0x0
6171 19:59:49.259424 LP4Y_EN = 0x0
6172 19:59:49.260019 WORK_FSP = 0x0
6173 19:59:49.262453 WL = 0x2
6174 19:59:49.262931 RL = 0x2
6175 19:59:49.265970 BL = 0x2
6176 19:59:49.266560 RPST = 0x0
6177 19:59:49.269423 RD_PRE = 0x0
6178 19:59:49.269834 WR_PRE = 0x1
6179 19:59:49.272482 WR_PST = 0x0
6180 19:59:49.272896 DBI_WR = 0x0
6181 19:59:49.275801 DBI_RD = 0x0
6182 19:59:49.276217 OTF = 0x1
6183 19:59:49.278915 ===================================
6184 19:59:49.286417 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
6185 19:59:49.290802 nWR fixed to 30
6186 19:59:49.294440 [ModeRegInit_LP4] CH0 RK0
6187 19:59:49.294950 [ModeRegInit_LP4] CH0 RK1
6188 19:59:49.297931 [ModeRegInit_LP4] CH1 RK0
6189 19:59:49.301069 [ModeRegInit_LP4] CH1 RK1
6190 19:59:49.301610 match AC timing 19
6191 19:59:49.307239 dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 1
6192 19:59:49.310648 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
6193 19:59:49.313884 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
6194 19:59:49.320470 [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17
6195 19:59:49.324195 [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)
6196 19:59:49.324706 ==
6197 19:59:49.327400 Dram Type= 6, Freq= 0, CH_0, rank 0
6198 19:59:49.330419 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6199 19:59:49.330930 ==
6200 19:59:49.337264 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6201 19:59:49.343479 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
6202 19:59:49.347327 [CA 0] Center 36 (8~64) winsize 57
6203 19:59:49.350889 [CA 1] Center 36 (8~64) winsize 57
6204 19:59:49.354030 [CA 2] Center 36 (8~64) winsize 57
6205 19:59:49.354542 [CA 3] Center 36 (8~64) winsize 57
6206 19:59:49.356884 [CA 4] Center 36 (8~64) winsize 57
6207 19:59:49.360799 [CA 5] Center 36 (8~64) winsize 57
6208 19:59:49.361305
6209 19:59:49.367428 [CmdBusTrainingLP45] Vref(ca) range 1: 37
6210 19:59:49.367995
6211 19:59:49.370344 [CATrainingPosCal] consider 1 rank data
6212 19:59:49.370758 u2DelayCellTimex100 = 270/100 ps
6213 19:59:49.377547 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6214 19:59:49.380474 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6215 19:59:49.383836 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6216 19:59:49.387227 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6217 19:59:49.390728 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6218 19:59:49.393804 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6219 19:59:49.394221
6220 19:59:49.396829 CA PerBit enable=1, Macro0, CA PI delay=36
6221 19:59:49.397246
6222 19:59:49.400813 [CBTSetCACLKResult] CA Dly = 36
6223 19:59:49.403619 CS Dly: 1 (0~32)
6224 19:59:49.404081 ==
6225 19:59:49.407246 Dram Type= 6, Freq= 0, CH_0, rank 1
6226 19:59:49.410425 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6227 19:59:49.410929 ==
6228 19:59:49.417358 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6229 19:59:49.420529 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6230 19:59:49.424193 [CA 0] Center 36 (8~64) winsize 57
6231 19:59:49.427249 [CA 1] Center 36 (8~64) winsize 57
6232 19:59:49.430092 [CA 2] Center 36 (8~64) winsize 57
6233 19:59:49.434208 [CA 3] Center 36 (8~64) winsize 57
6234 19:59:49.436950 [CA 4] Center 36 (8~64) winsize 57
6235 19:59:49.440540 [CA 5] Center 36 (8~64) winsize 57
6236 19:59:49.441052
6237 19:59:49.444276 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6238 19:59:49.444778
6239 19:59:49.447025 [CATrainingPosCal] consider 2 rank data
6240 19:59:49.450309 u2DelayCellTimex100 = 270/100 ps
6241 19:59:49.454175 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6242 19:59:49.456978 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6243 19:59:49.460197 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6244 19:59:49.466514 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6245 19:59:49.470322 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6246 19:59:49.473355 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6247 19:59:49.473769
6248 19:59:49.476464 CA PerBit enable=1, Macro0, CA PI delay=36
6249 19:59:49.476875
6250 19:59:49.480507 [CBTSetCACLKResult] CA Dly = 36
6251 19:59:49.481011 CS Dly: 1 (0~32)
6252 19:59:49.481335
6253 19:59:49.483698 ----->DramcWriteLeveling(PI) begin...
6254 19:59:49.484213 ==
6255 19:59:49.487457 Dram Type= 6, Freq= 0, CH_0, rank 0
6256 19:59:49.493793 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6257 19:59:49.494307 ==
6258 19:59:49.496796 Write leveling (Byte 0): 40 => 8
6259 19:59:49.499910 Write leveling (Byte 1): 40 => 8
6260 19:59:49.500414 DramcWriteLeveling(PI) end<-----
6261 19:59:49.500748
6262 19:59:49.503553 ==
6263 19:59:49.506940 Dram Type= 6, Freq= 0, CH_0, rank 0
6264 19:59:49.510654 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6265 19:59:49.511166 ==
6266 19:59:49.513209 [Gating] SW mode calibration
6267 19:59:49.520365 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6268 19:59:49.523020 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6269 19:59:49.530252 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6270 19:59:49.533636 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6271 19:59:49.536838 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6272 19:59:49.543378 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6273 19:59:49.546410 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6274 19:59:49.549787 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6275 19:59:49.556568 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6276 19:59:49.559900 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6277 19:59:49.563318 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6278 19:59:49.566675 Total UI for P1: 0, mck2ui 16
6279 19:59:49.569777 best dqsien dly found for B0: ( 0, 14, 24)
6280 19:59:49.573611 Total UI for P1: 0, mck2ui 16
6281 19:59:49.576625 best dqsien dly found for B1: ( 0, 14, 24)
6282 19:59:49.580316 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6283 19:59:49.583744 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6284 19:59:49.584244
6285 19:59:49.586988 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6286 19:59:49.593623 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6287 19:59:49.594230 [Gating] SW calibration Done
6288 19:59:49.594651 ==
6289 19:59:49.596653 Dram Type= 6, Freq= 0, CH_0, rank 0
6290 19:59:49.603675 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6291 19:59:49.604130 ==
6292 19:59:49.604463 RX Vref Scan: 0
6293 19:59:49.604916
6294 19:59:49.606666 RX Vref 0 -> 0, step: 1
6295 19:59:49.607103
6296 19:59:49.610275 RX Delay -410 -> 252, step: 16
6297 19:59:49.613418 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6298 19:59:49.616609 iDelay=230, Bit 1, Center -11 (-250 ~ 229) 480
6299 19:59:49.622947 iDelay=230, Bit 2, Center -19 (-250 ~ 213) 464
6300 19:59:49.626460 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6301 19:59:49.629978 iDelay=230, Bit 4, Center -11 (-250 ~ 229) 480
6302 19:59:49.633345 iDelay=230, Bit 5, Center -27 (-266 ~ 213) 480
6303 19:59:49.639515 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6304 19:59:49.643330 iDelay=230, Bit 7, Center -3 (-234 ~ 229) 464
6305 19:59:49.646550 iDelay=230, Bit 8, Center -35 (-266 ~ 197) 464
6306 19:59:49.649812 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6307 19:59:49.656338 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6308 19:59:49.659717 iDelay=230, Bit 11, Center -27 (-266 ~ 213) 480
6309 19:59:49.663207 iDelay=230, Bit 12, Center -19 (-250 ~ 213) 464
6310 19:59:49.666530 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6311 19:59:49.673170 iDelay=230, Bit 14, Center -11 (-250 ~ 229) 480
6312 19:59:49.676187 iDelay=230, Bit 15, Center -19 (-250 ~ 213) 464
6313 19:59:49.676689 ==
6314 19:59:49.679909 Dram Type= 6, Freq= 0, CH_0, rank 0
6315 19:59:49.683056 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6316 19:59:49.683557 ==
6317 19:59:49.686894 DQS Delay:
6318 19:59:49.687389 DQS0 = 27, DQS1 = 35
6319 19:59:49.687774 DQM Delay:
6320 19:59:49.690189 DQM0 = 12, DQM1 = 12
6321 19:59:49.690733 DQ Delay:
6322 19:59:49.692941 DQ0 =8, DQ1 =16, DQ2 =8, DQ3 =8
6323 19:59:49.696660 DQ4 =16, DQ5 =0, DQ6 =16, DQ7 =24
6324 19:59:49.699829 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6325 19:59:49.703009 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =16
6326 19:59:49.703415
6327 19:59:49.703783
6328 19:59:49.704089 ==
6329 19:59:49.706600 Dram Type= 6, Freq= 0, CH_0, rank 0
6330 19:59:49.709815 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6331 19:59:49.713455 ==
6332 19:59:49.713949
6333 19:59:49.714280
6334 19:59:49.714579 TX Vref Scan disable
6335 19:59:49.716339 == TX Byte 0 ==
6336 19:59:49.719501 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6337 19:59:49.723622 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6338 19:59:49.726715 == TX Byte 1 ==
6339 19:59:49.729931 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6340 19:59:49.733071 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6341 19:59:49.733579 ==
6342 19:59:49.736099 Dram Type= 6, Freq= 0, CH_0, rank 0
6343 19:59:49.743454 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6344 19:59:49.743989 ==
6345 19:59:49.744321
6346 19:59:49.744622
6347 19:59:49.744908 TX Vref Scan disable
6348 19:59:49.746378 == TX Byte 0 ==
6349 19:59:49.749675 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6350 19:59:49.753133 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6351 19:59:49.756497 == TX Byte 1 ==
6352 19:59:49.760028 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6353 19:59:49.763226 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6354 19:59:49.763799
6355 19:59:49.765958 [DATLAT]
6356 19:59:49.766428 Freq=400, CH0 RK0
6357 19:59:49.766757
6358 19:59:49.769797 DATLAT Default: 0xf
6359 19:59:49.770207 0, 0xFFFF, sum = 0
6360 19:59:49.772751 1, 0xFFFF, sum = 0
6361 19:59:49.773194 2, 0xFFFF, sum = 0
6362 19:59:49.776347 3, 0xFFFF, sum = 0
6363 19:59:49.776855 4, 0xFFFF, sum = 0
6364 19:59:49.780138 5, 0xFFFF, sum = 0
6365 19:59:49.780675 6, 0xFFFF, sum = 0
6366 19:59:49.782919 7, 0xFFFF, sum = 0
6367 19:59:49.783428 8, 0xFFFF, sum = 0
6368 19:59:49.786598 9, 0xFFFF, sum = 0
6369 19:59:49.787106 10, 0xFFFF, sum = 0
6370 19:59:49.789683 11, 0xFFFF, sum = 0
6371 19:59:49.790198 12, 0xFFFF, sum = 0
6372 19:59:49.792856 13, 0x0, sum = 1
6373 19:59:49.793323 14, 0x0, sum = 2
6374 19:59:49.796572 15, 0x0, sum = 3
6375 19:59:49.797084 16, 0x0, sum = 4
6376 19:59:49.799686 best_step = 14
6377 19:59:49.800197
6378 19:59:49.800525 ==
6379 19:59:49.802827 Dram Type= 6, Freq= 0, CH_0, rank 0
6380 19:59:49.806336 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6381 19:59:49.806843 ==
6382 19:59:49.809343 RX Vref Scan: 1
6383 19:59:49.809751
6384 19:59:49.810070 RX Vref 0 -> 0, step: 1
6385 19:59:49.810438
6386 19:59:49.812821 RX Delay -311 -> 252, step: 8
6387 19:59:49.813330
6388 19:59:49.816259 Set Vref, RX VrefLevel [Byte0]: 54
6389 19:59:49.819519 [Byte1]: 45
6390 19:59:49.824426
6391 19:59:49.824942 Final RX Vref Byte 0 = 54 to rank0
6392 19:59:49.827407 Final RX Vref Byte 1 = 45 to rank0
6393 19:59:49.830635 Final RX Vref Byte 0 = 54 to rank1
6394 19:59:49.834383 Final RX Vref Byte 1 = 45 to rank1==
6395 19:59:49.837299 Dram Type= 6, Freq= 0, CH_0, rank 0
6396 19:59:49.844333 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6397 19:59:49.844840 ==
6398 19:59:49.845167 DQS Delay:
6399 19:59:49.847778 DQS0 = 28, DQS1 = 36
6400 19:59:49.848288 DQM Delay:
6401 19:59:49.848620 DQM0 = 11, DQM1 = 12
6402 19:59:49.850847 DQ Delay:
6403 19:59:49.854451 DQ0 =8, DQ1 =16, DQ2 =8, DQ3 =8
6404 19:59:49.854956 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =16
6405 19:59:49.857490 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =8
6406 19:59:49.860919 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =20
6407 19:59:49.861481
6408 19:59:49.861810
6409 19:59:49.870641 [DQSOSCAuto] RK0, (LSB)MR18= 0xc8b5, (MSB)MR19= 0xc0c, tDQSOscB0 = 387 ps tDQSOscB1 = 385 ps
6410 19:59:49.873732 CH0 RK0: MR19=C0C, MR18=C8B5
6411 19:59:49.880450 CH0_RK0: MR19=0xC0C, MR18=0xC8B5, DQSOSC=385, MR23=63, INC=398, DEC=265
6412 19:59:49.880960 ==
6413 19:59:49.883794 Dram Type= 6, Freq= 0, CH_0, rank 1
6414 19:59:49.887703 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6415 19:59:49.888327 ==
6416 19:59:49.890302 [Gating] SW mode calibration
6417 19:59:49.897170 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6418 19:59:49.900391 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6419 19:59:49.907493 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6420 19:59:49.910583 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6421 19:59:49.913456 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6422 19:59:49.920805 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6423 19:59:49.923895 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6424 19:59:49.927415 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6425 19:59:49.933888 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6426 19:59:49.937189 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6427 19:59:49.940519 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6428 19:59:49.943514 Total UI for P1: 0, mck2ui 16
6429 19:59:49.947434 best dqsien dly found for B0: ( 0, 14, 24)
6430 19:59:49.950585 Total UI for P1: 0, mck2ui 16
6431 19:59:49.953966 best dqsien dly found for B1: ( 0, 14, 24)
6432 19:59:49.957098 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6433 19:59:49.960362 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6434 19:59:49.963868
6435 19:59:49.966661 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6436 19:59:49.969882 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6437 19:59:49.973560 [Gating] SW calibration Done
6438 19:59:49.973985 ==
6439 19:59:49.977045 Dram Type= 6, Freq= 0, CH_0, rank 1
6440 19:59:49.980095 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6441 19:59:49.980525 ==
6442 19:59:49.980862 RX Vref Scan: 0
6443 19:59:49.983189
6444 19:59:49.983594 RX Vref 0 -> 0, step: 1
6445 19:59:49.983974
6446 19:59:49.986951 RX Delay -410 -> 252, step: 16
6447 19:59:49.990323 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6448 19:59:49.996591 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6449 19:59:50.000216 iDelay=230, Bit 2, Center -19 (-250 ~ 213) 464
6450 19:59:50.003460 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6451 19:59:50.006886 iDelay=230, Bit 4, Center -11 (-250 ~ 229) 480
6452 19:59:50.013767 iDelay=230, Bit 5, Center -27 (-266 ~ 213) 480
6453 19:59:50.016469 iDelay=230, Bit 6, Center -3 (-234 ~ 229) 464
6454 19:59:50.020300 iDelay=230, Bit 7, Center -3 (-234 ~ 229) 464
6455 19:59:50.023795 iDelay=230, Bit 8, Center -35 (-266 ~ 197) 464
6456 19:59:50.029678 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6457 19:59:50.033245 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6458 19:59:50.036956 iDelay=230, Bit 11, Center -27 (-250 ~ 197) 448
6459 19:59:50.039867 iDelay=230, Bit 12, Center -19 (-250 ~ 213) 464
6460 19:59:50.046829 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6461 19:59:50.050613 iDelay=230, Bit 14, Center -11 (-234 ~ 213) 448
6462 19:59:50.053036 iDelay=230, Bit 15, Center -19 (-250 ~ 213) 464
6463 19:59:50.053544 ==
6464 19:59:50.056602 Dram Type= 6, Freq= 0, CH_0, rank 1
6465 19:59:50.060063 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6466 19:59:50.063459 ==
6467 19:59:50.064003 DQS Delay:
6468 19:59:50.064335 DQS0 = 27, DQS1 = 35
6469 19:59:50.066321 DQM Delay:
6470 19:59:50.066735 DQM0 = 12, DQM1 = 12
6471 19:59:50.070000 DQ Delay:
6472 19:59:50.070587 DQ0 =8, DQ1 =8, DQ2 =8, DQ3 =8
6473 19:59:50.073211 DQ4 =16, DQ5 =0, DQ6 =24, DQ7 =24
6474 19:59:50.076236 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6475 19:59:50.080177 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =16
6476 19:59:50.080685
6477 19:59:50.081013
6478 19:59:50.083262 ==
6479 19:59:50.083690 Dram Type= 6, Freq= 0, CH_0, rank 1
6480 19:59:50.090263 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6481 19:59:50.090781 ==
6482 19:59:50.091111
6483 19:59:50.091419
6484 19:59:50.093006 TX Vref Scan disable
6485 19:59:50.093420 == TX Byte 0 ==
6486 19:59:50.096369 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6487 19:59:50.102705 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6488 19:59:50.103121 == TX Byte 1 ==
6489 19:59:50.106738 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6490 19:59:50.109986 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6491 19:59:50.113244 ==
6492 19:59:50.116417 Dram Type= 6, Freq= 0, CH_0, rank 1
6493 19:59:50.119684 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6494 19:59:50.120201 ==
6495 19:59:50.120534
6496 19:59:50.120841
6497 19:59:50.123379 TX Vref Scan disable
6498 19:59:50.123926 == TX Byte 0 ==
6499 19:59:50.126401 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6500 19:59:50.133221 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6501 19:59:50.133725 == TX Byte 1 ==
6502 19:59:50.136159 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6503 19:59:50.140012 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6504 19:59:50.143042
6505 19:59:50.143454 [DATLAT]
6506 19:59:50.143823 Freq=400, CH0 RK1
6507 19:59:50.144176
6508 19:59:50.146089 DATLAT Default: 0xe
6509 19:59:50.146605 0, 0xFFFF, sum = 0
6510 19:59:50.149261 1, 0xFFFF, sum = 0
6511 19:59:50.149707 2, 0xFFFF, sum = 0
6512 19:59:50.152961 3, 0xFFFF, sum = 0
6513 19:59:50.153382 4, 0xFFFF, sum = 0
6514 19:59:50.156293 5, 0xFFFF, sum = 0
6515 19:59:50.159627 6, 0xFFFF, sum = 0
6516 19:59:50.160203 7, 0xFFFF, sum = 0
6517 19:59:50.162924 8, 0xFFFF, sum = 0
6518 19:59:50.163344 9, 0xFFFF, sum = 0
6519 19:59:50.165971 10, 0xFFFF, sum = 0
6520 19:59:50.166391 11, 0xFFFF, sum = 0
6521 19:59:50.169113 12, 0xFFFF, sum = 0
6522 19:59:50.169665 13, 0x0, sum = 1
6523 19:59:50.172731 14, 0x0, sum = 2
6524 19:59:50.173147 15, 0x0, sum = 3
6525 19:59:50.175928 16, 0x0, sum = 4
6526 19:59:50.176349 best_step = 14
6527 19:59:50.176675
6528 19:59:50.176979 ==
6529 19:59:50.179634 Dram Type= 6, Freq= 0, CH_0, rank 1
6530 19:59:50.182878 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6531 19:59:50.183291 ==
6532 19:59:50.186382 RX Vref Scan: 0
6533 19:59:50.186891
6534 19:59:50.189298 RX Vref 0 -> 0, step: 1
6535 19:59:50.189723
6536 19:59:50.190053 RX Delay -311 -> 252, step: 8
6537 19:59:50.198046 iDelay=217, Bit 0, Center -16 (-239 ~ 208) 448
6538 19:59:50.201376 iDelay=217, Bit 1, Center -12 (-231 ~ 208) 440
6539 19:59:50.204380 iDelay=217, Bit 2, Center -20 (-247 ~ 208) 456
6540 19:59:50.210957 iDelay=217, Bit 3, Center -16 (-239 ~ 208) 448
6541 19:59:50.214530 iDelay=217, Bit 4, Center -16 (-239 ~ 208) 448
6542 19:59:50.217947 iDelay=217, Bit 5, Center -24 (-247 ~ 200) 448
6543 19:59:50.221099 iDelay=217, Bit 6, Center -12 (-231 ~ 208) 440
6544 19:59:50.224346 iDelay=217, Bit 7, Center -8 (-231 ~ 216) 448
6545 19:59:50.231548 iDelay=217, Bit 8, Center -32 (-247 ~ 184) 432
6546 19:59:50.234592 iDelay=217, Bit 9, Center -36 (-255 ~ 184) 440
6547 19:59:50.237641 iDelay=217, Bit 10, Center -24 (-239 ~ 192) 432
6548 19:59:50.240993 iDelay=217, Bit 11, Center -28 (-247 ~ 192) 440
6549 19:59:50.248350 iDelay=217, Bit 12, Center -20 (-239 ~ 200) 440
6550 19:59:50.251361 iDelay=217, Bit 13, Center -20 (-239 ~ 200) 440
6551 19:59:50.254415 iDelay=217, Bit 14, Center -12 (-231 ~ 208) 440
6552 19:59:50.260829 iDelay=217, Bit 15, Center -16 (-239 ~ 208) 448
6553 19:59:50.261323 ==
6554 19:59:50.264585 Dram Type= 6, Freq= 0, CH_0, rank 1
6555 19:59:50.267403 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6556 19:59:50.267929 ==
6557 19:59:50.268260 DQS Delay:
6558 19:59:50.270793 DQS0 = 24, DQS1 = 36
6559 19:59:50.271365 DQM Delay:
6560 19:59:50.274727 DQM0 = 8, DQM1 = 12
6561 19:59:50.275143 DQ Delay:
6562 19:59:50.277883 DQ0 =8, DQ1 =12, DQ2 =4, DQ3 =8
6563 19:59:50.281102 DQ4 =8, DQ5 =0, DQ6 =12, DQ7 =16
6564 19:59:50.284322 DQ8 =4, DQ9 =0, DQ10 =12, DQ11 =8
6565 19:59:50.288387 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =20
6566 19:59:50.288895
6567 19:59:50.289219
6568 19:59:50.294767 [DQSOSCAuto] RK1, (LSB)MR18= 0xbd5c, (MSB)MR19= 0xc0c, tDQSOscB0 = 398 ps tDQSOscB1 = 386 ps
6569 19:59:50.297963 CH0 RK1: MR19=C0C, MR18=BD5C
6570 19:59:50.304658 CH0_RK1: MR19=0xC0C, MR18=0xBD5C, DQSOSC=386, MR23=63, INC=396, DEC=264
6571 19:59:50.308048 [RxdqsGatingPostProcess] freq 400
6572 19:59:50.311230 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6573 19:59:50.314985 best DQS0 dly(2T, 0.5T) = (0, 10)
6574 19:59:50.317991 best DQS1 dly(2T, 0.5T) = (0, 10)
6575 19:59:50.321347 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6576 19:59:50.324369 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6577 19:59:50.328117 best DQS0 dly(2T, 0.5T) = (0, 10)
6578 19:59:50.331433 best DQS1 dly(2T, 0.5T) = (0, 10)
6579 19:59:50.334354 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6580 19:59:50.338041 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6581 19:59:50.341328 Pre-setting of DQS Precalculation
6582 19:59:50.344609 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6583 19:59:50.345117 ==
6584 19:59:50.348079 Dram Type= 6, Freq= 0, CH_1, rank 0
6585 19:59:50.354893 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6586 19:59:50.355403 ==
6587 19:59:50.357921 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6588 19:59:50.364693 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
6589 19:59:50.367747 [CA 0] Center 36 (8~64) winsize 57
6590 19:59:50.370922 [CA 1] Center 36 (8~64) winsize 57
6591 19:59:50.374725 [CA 2] Center 36 (8~64) winsize 57
6592 19:59:50.377883 [CA 3] Center 36 (8~64) winsize 57
6593 19:59:50.381299 [CA 4] Center 36 (8~64) winsize 57
6594 19:59:50.384471 [CA 5] Center 36 (8~64) winsize 57
6595 19:59:50.384878
6596 19:59:50.387571 [CmdBusTrainingLP45] Vref(ca) range 1: 37
6597 19:59:50.388032
6598 19:59:50.391315 [CATrainingPosCal] consider 1 rank data
6599 19:59:50.394828 u2DelayCellTimex100 = 270/100 ps
6600 19:59:50.398087 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6601 19:59:50.401433 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6602 19:59:50.404182 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6603 19:59:50.408258 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6604 19:59:50.411230 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6605 19:59:50.414386 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6606 19:59:50.414891
6607 19:59:50.421452 CA PerBit enable=1, Macro0, CA PI delay=36
6608 19:59:50.421957
6609 19:59:50.422281 [CBTSetCACLKResult] CA Dly = 36
6610 19:59:50.424329 CS Dly: 1 (0~32)
6611 19:59:50.424738 ==
6612 19:59:50.427508 Dram Type= 6, Freq= 0, CH_1, rank 1
6613 19:59:50.431497 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6614 19:59:50.432044 ==
6615 19:59:50.437823 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6616 19:59:50.444211 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6617 19:59:50.447613 [CA 0] Center 36 (8~64) winsize 57
6618 19:59:50.451062 [CA 1] Center 36 (8~64) winsize 57
6619 19:59:50.454412 [CA 2] Center 36 (8~64) winsize 57
6620 19:59:50.457956 [CA 3] Center 36 (8~64) winsize 57
6621 19:59:50.458503 [CA 4] Center 36 (8~64) winsize 57
6622 19:59:50.461154 [CA 5] Center 36 (8~64) winsize 57
6623 19:59:50.461565
6624 19:59:50.467767 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6625 19:59:50.468350
6626 19:59:50.471122 [CATrainingPosCal] consider 2 rank data
6627 19:59:50.474262 u2DelayCellTimex100 = 270/100 ps
6628 19:59:50.478132 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6629 19:59:50.480963 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6630 19:59:50.484021 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6631 19:59:50.487475 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6632 19:59:50.490868 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6633 19:59:50.494686 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6634 19:59:50.495189
6635 19:59:50.497593 CA PerBit enable=1, Macro0, CA PI delay=36
6636 19:59:50.498006
6637 19:59:50.501026 [CBTSetCACLKResult] CA Dly = 36
6638 19:59:50.504370 CS Dly: 1 (0~32)
6639 19:59:50.504780
6640 19:59:50.507958 ----->DramcWriteLeveling(PI) begin...
6641 19:59:50.508468 ==
6642 19:59:50.510975 Dram Type= 6, Freq= 0, CH_1, rank 0
6643 19:59:50.514349 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6644 19:59:50.514859 ==
6645 19:59:50.518157 Write leveling (Byte 0): 40 => 8
6646 19:59:50.521099 Write leveling (Byte 1): 40 => 8
6647 19:59:50.524692 DramcWriteLeveling(PI) end<-----
6648 19:59:50.525197
6649 19:59:50.525534 ==
6650 19:59:50.528010 Dram Type= 6, Freq= 0, CH_1, rank 0
6651 19:59:50.531062 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6652 19:59:50.531570 ==
6653 19:59:50.534171 [Gating] SW mode calibration
6654 19:59:50.541134 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6655 19:59:50.547741 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6656 19:59:50.550978 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6657 19:59:50.554151 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6658 19:59:50.560773 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6659 19:59:50.564181 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6660 19:59:50.567616 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6661 19:59:50.573783 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6662 19:59:50.577581 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6663 19:59:50.580993 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6664 19:59:50.587345 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6665 19:59:50.587971 Total UI for P1: 0, mck2ui 16
6666 19:59:50.593908 best dqsien dly found for B0: ( 0, 14, 24)
6667 19:59:50.594439 Total UI for P1: 0, mck2ui 16
6668 19:59:50.600372 best dqsien dly found for B1: ( 0, 14, 24)
6669 19:59:50.603975 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6670 19:59:50.607779 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6671 19:59:50.608284
6672 19:59:50.610463 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6673 19:59:50.613930 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6674 19:59:50.617199 [Gating] SW calibration Done
6675 19:59:50.617608 ==
6676 19:59:50.620482 Dram Type= 6, Freq= 0, CH_1, rank 0
6677 19:59:50.623897 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6678 19:59:50.624411 ==
6679 19:59:50.626964 RX Vref Scan: 0
6680 19:59:50.627380
6681 19:59:50.627764 RX Vref 0 -> 0, step: 1
6682 19:59:50.628078
6683 19:59:50.630805 RX Delay -410 -> 252, step: 16
6684 19:59:50.637281 iDelay=230, Bit 0, Center -11 (-250 ~ 229) 480
6685 19:59:50.641057 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6686 19:59:50.644286 iDelay=230, Bit 2, Center -35 (-266 ~ 197) 464
6687 19:59:50.647180 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6688 19:59:50.654240 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6689 19:59:50.657304 iDelay=230, Bit 5, Center -3 (-234 ~ 229) 464
6690 19:59:50.660967 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6691 19:59:50.664317 iDelay=230, Bit 7, Center -19 (-250 ~ 213) 464
6692 19:59:50.667475 iDelay=230, Bit 8, Center -35 (-266 ~ 197) 464
6693 19:59:50.673853 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6694 19:59:50.677265 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6695 19:59:50.680446 iDelay=230, Bit 11, Center -27 (-266 ~ 213) 480
6696 19:59:50.687255 iDelay=230, Bit 12, Center -11 (-250 ~ 229) 480
6697 19:59:50.690363 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6698 19:59:50.693536 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6699 19:59:50.696832 iDelay=230, Bit 15, Center -11 (-250 ~ 229) 480
6700 19:59:50.697297 ==
6701 19:59:50.700077 Dram Type= 6, Freq= 0, CH_1, rank 0
6702 19:59:50.706838 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6703 19:59:50.707466 ==
6704 19:59:50.708006 DQS Delay:
6705 19:59:50.710370 DQS0 = 35, DQS1 = 35
6706 19:59:50.711025 DQM Delay:
6707 19:59:50.711516 DQM0 = 18, DQM1 = 13
6708 19:59:50.713279 DQ Delay:
6709 19:59:50.716833 DQ0 =24, DQ1 =16, DQ2 =0, DQ3 =16
6710 19:59:50.720293 DQ4 =16, DQ5 =32, DQ6 =24, DQ7 =16
6711 19:59:50.723825 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6712 19:59:50.726981 DQ12 =24, DQ13 =16, DQ14 =16, DQ15 =24
6713 19:59:50.727565
6714 19:59:50.728015
6715 19:59:50.728374 ==
6716 19:59:50.730010 Dram Type= 6, Freq= 0, CH_1, rank 0
6717 19:59:50.733523 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6718 19:59:50.734187 ==
6719 19:59:50.734684
6720 19:59:50.735112
6721 19:59:50.736358 TX Vref Scan disable
6722 19:59:50.736860 == TX Byte 0 ==
6723 19:59:50.743528 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6724 19:59:50.746629 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6725 19:59:50.747189 == TX Byte 1 ==
6726 19:59:50.749895 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6727 19:59:50.756754 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6728 19:59:50.757164 ==
6729 19:59:50.759948 Dram Type= 6, Freq= 0, CH_1, rank 0
6730 19:59:50.763042 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6731 19:59:50.763454 ==
6732 19:59:50.763839
6733 19:59:50.764152
6734 19:59:50.766878 TX Vref Scan disable
6735 19:59:50.767289 == TX Byte 0 ==
6736 19:59:50.773428 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6737 19:59:50.776487 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6738 19:59:50.776899 == TX Byte 1 ==
6739 19:59:50.783507 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6740 19:59:50.786609 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6741 19:59:50.786987
6742 19:59:50.787281 [DATLAT]
6743 19:59:50.790107 Freq=400, CH1 RK0
6744 19:59:50.790485
6745 19:59:50.790784 DATLAT Default: 0xf
6746 19:59:50.793232 0, 0xFFFF, sum = 0
6747 19:59:50.793615 1, 0xFFFF, sum = 0
6748 19:59:50.796538 2, 0xFFFF, sum = 0
6749 19:59:50.796916 3, 0xFFFF, sum = 0
6750 19:59:50.800294 4, 0xFFFF, sum = 0
6751 19:59:50.800677 5, 0xFFFF, sum = 0
6752 19:59:50.803279 6, 0xFFFF, sum = 0
6753 19:59:50.803702 7, 0xFFFF, sum = 0
6754 19:59:50.806914 8, 0xFFFF, sum = 0
6755 19:59:50.807295 9, 0xFFFF, sum = 0
6756 19:59:50.809972 10, 0xFFFF, sum = 0
6757 19:59:50.810518 11, 0xFFFF, sum = 0
6758 19:59:50.813416 12, 0xFFFF, sum = 0
6759 19:59:50.813964 13, 0x0, sum = 1
6760 19:59:50.816327 14, 0x0, sum = 2
6761 19:59:50.816881 15, 0x0, sum = 3
6762 19:59:50.820145 16, 0x0, sum = 4
6763 19:59:50.820614 best_step = 14
6764 19:59:50.821107
6765 19:59:50.821566 ==
6766 19:59:50.823003 Dram Type= 6, Freq= 0, CH_1, rank 0
6767 19:59:50.829693 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6768 19:59:50.829803 ==
6769 19:59:50.829897 RX Vref Scan: 1
6770 19:59:50.829990
6771 19:59:50.833101 RX Vref 0 -> 0, step: 1
6772 19:59:50.833199
6773 19:59:50.836068 RX Delay -311 -> 252, step: 8
6774 19:59:50.836147
6775 19:59:50.839098 Set Vref, RX VrefLevel [Byte0]: 55
6776 19:59:50.842901 [Byte1]: 48
6777 19:59:50.842981
6778 19:59:50.846010 Final RX Vref Byte 0 = 55 to rank0
6779 19:59:50.849582 Final RX Vref Byte 1 = 48 to rank0
6780 19:59:50.852985 Final RX Vref Byte 0 = 55 to rank1
6781 19:59:50.855796 Final RX Vref Byte 1 = 48 to rank1==
6782 19:59:50.859458 Dram Type= 6, Freq= 0, CH_1, rank 0
6783 19:59:50.862619 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6784 19:59:50.865991 ==
6785 19:59:50.866100 DQS Delay:
6786 19:59:50.866187 DQS0 = 32, DQS1 = 32
6787 19:59:50.869256 DQM Delay:
6788 19:59:50.869375 DQM0 = 14, DQM1 = 11
6789 19:59:50.872501 DQ Delay:
6790 19:59:50.872621 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =16
6791 19:59:50.875632 DQ4 =16, DQ5 =24, DQ6 =20, DQ7 =12
6792 19:59:50.878929 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =4
6793 19:59:50.882722 DQ12 =20, DQ13 =16, DQ14 =16, DQ15 =24
6794 19:59:50.882915
6795 19:59:50.883096
6796 19:59:50.892376 [DQSOSCAuto] RK0, (LSB)MR18= 0x90c7, (MSB)MR19= 0xc0c, tDQSOscB0 = 385 ps tDQSOscB1 = 391 ps
6797 19:59:50.896048 CH1 RK0: MR19=C0C, MR18=90C7
6798 19:59:50.902329 CH1_RK0: MR19=0xC0C, MR18=0x90C7, DQSOSC=385, MR23=63, INC=398, DEC=265
6799 19:59:50.902644 ==
6800 19:59:50.906240 Dram Type= 6, Freq= 0, CH_1, rank 1
6801 19:59:50.909389 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6802 19:59:50.909768 ==
6803 19:59:50.912482 [Gating] SW mode calibration
6804 19:59:50.919187 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6805 19:59:50.922515 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6806 19:59:50.929581 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6807 19:59:50.932546 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6808 19:59:50.936223 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6809 19:59:50.942635 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6810 19:59:50.946080 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6811 19:59:50.949459 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6812 19:59:50.956270 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6813 19:59:50.959625 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6814 19:59:50.962421 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6815 19:59:50.965934 Total UI for P1: 0, mck2ui 16
6816 19:59:50.969254 best dqsien dly found for B0: ( 0, 14, 24)
6817 19:59:50.972386 Total UI for P1: 0, mck2ui 16
6818 19:59:50.975622 best dqsien dly found for B1: ( 0, 14, 24)
6819 19:59:50.978807 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6820 19:59:50.985693 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6821 19:59:50.986071
6822 19:59:50.988702 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6823 19:59:50.991989 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6824 19:59:50.995753 [Gating] SW calibration Done
6825 19:59:50.996282 ==
6826 19:59:50.998768 Dram Type= 6, Freq= 0, CH_1, rank 1
6827 19:59:51.002311 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6828 19:59:51.002886 ==
6829 19:59:51.005347 RX Vref Scan: 0
6830 19:59:51.005824
6831 19:59:51.006207 RX Vref 0 -> 0, step: 1
6832 19:59:51.006587
6833 19:59:51.009029 RX Delay -410 -> 252, step: 16
6834 19:59:51.011970 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6835 19:59:51.018838 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6836 19:59:51.022008 iDelay=230, Bit 2, Center -35 (-266 ~ 197) 464
6837 19:59:51.025930 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6838 19:59:51.028977 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6839 19:59:51.035343 iDelay=230, Bit 5, Center -3 (-234 ~ 229) 464
6840 19:59:51.038544 iDelay=230, Bit 6, Center -3 (-234 ~ 229) 464
6841 19:59:51.041582 iDelay=230, Bit 7, Center -19 (-250 ~ 213) 464
6842 19:59:51.045344 iDelay=230, Bit 8, Center -35 (-266 ~ 197) 464
6843 19:59:51.051625 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6844 19:59:51.055330 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6845 19:59:51.058984 iDelay=230, Bit 11, Center -27 (-266 ~ 213) 480
6846 19:59:51.061756 iDelay=230, Bit 12, Center -11 (-250 ~ 229) 480
6847 19:59:51.068298 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6848 19:59:51.072329 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6849 19:59:51.075310 iDelay=230, Bit 15, Center -11 (-250 ~ 229) 480
6850 19:59:51.075746 ==
6851 19:59:51.078624 Dram Type= 6, Freq= 0, CH_1, rank 1
6852 19:59:51.082189 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6853 19:59:51.085508 ==
6854 19:59:51.085886 DQS Delay:
6855 19:59:51.086185 DQS0 = 35, DQS1 = 35
6856 19:59:51.088958 DQM Delay:
6857 19:59:51.089339 DQM0 = 18, DQM1 = 13
6858 19:59:51.091625 DQ Delay:
6859 19:59:51.095362 DQ0 =16, DQ1 =16, DQ2 =0, DQ3 =16
6860 19:59:51.095798 DQ4 =16, DQ5 =32, DQ6 =32, DQ7 =16
6861 19:59:51.098567 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6862 19:59:51.101697 DQ12 =24, DQ13 =16, DQ14 =16, DQ15 =24
6863 19:59:51.102075
6864 19:59:51.105363
6865 19:59:51.105780 ==
6866 19:59:51.108488 Dram Type= 6, Freq= 0, CH_1, rank 1
6867 19:59:51.112165 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6868 19:59:51.112542 ==
6869 19:59:51.112873
6870 19:59:51.113180
6871 19:59:51.115146 TX Vref Scan disable
6872 19:59:51.115541 == TX Byte 0 ==
6873 19:59:51.118734 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6874 19:59:51.125388 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6875 19:59:51.125785 == TX Byte 1 ==
6876 19:59:51.128399 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6877 19:59:51.135418 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6878 19:59:51.135967 ==
6879 19:59:51.138725 Dram Type= 6, Freq= 0, CH_1, rank 1
6880 19:59:51.141763 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6881 19:59:51.142274 ==
6882 19:59:51.142587
6883 19:59:51.143069
6884 19:59:51.145027 TX Vref Scan disable
6885 19:59:51.145551 == TX Byte 0 ==
6886 19:59:51.148375 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6887 19:59:51.154923 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6888 19:59:51.155003 == TX Byte 1 ==
6889 19:59:51.158112 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6890 19:59:51.164591 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6891 19:59:51.164703
6892 19:59:51.164768 [DATLAT]
6893 19:59:51.164827 Freq=400, CH1 RK1
6894 19:59:51.164883
6895 19:59:51.168190 DATLAT Default: 0xe
6896 19:59:51.171147 0, 0xFFFF, sum = 0
6897 19:59:51.171254 1, 0xFFFF, sum = 0
6898 19:59:51.175043 2, 0xFFFF, sum = 0
6899 19:59:51.175125 3, 0xFFFF, sum = 0
6900 19:59:51.177727 4, 0xFFFF, sum = 0
6901 19:59:51.177842 5, 0xFFFF, sum = 0
6902 19:59:51.181014 6, 0xFFFF, sum = 0
6903 19:59:51.181132 7, 0xFFFF, sum = 0
6904 19:59:51.184342 8, 0xFFFF, sum = 0
6905 19:59:51.184431 9, 0xFFFF, sum = 0
6906 19:59:51.188190 10, 0xFFFF, sum = 0
6907 19:59:51.188277 11, 0xFFFF, sum = 0
6908 19:59:51.191344 12, 0xFFFF, sum = 0
6909 19:59:51.191478 13, 0x0, sum = 1
6910 19:59:51.194358 14, 0x0, sum = 2
6911 19:59:51.194499 15, 0x0, sum = 3
6912 19:59:51.197981 16, 0x0, sum = 4
6913 19:59:51.198124 best_step = 14
6914 19:59:51.198251
6915 19:59:51.198394 ==
6916 19:59:51.201490 Dram Type= 6, Freq= 0, CH_1, rank 1
6917 19:59:51.204606 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6918 19:59:51.208008 ==
6919 19:59:51.208147 RX Vref Scan: 0
6920 19:59:51.208262
6921 19:59:51.211241 RX Vref 0 -> 0, step: 1
6922 19:59:51.211381
6923 19:59:51.214398 RX Delay -311 -> 252, step: 8
6924 19:59:51.217560 iDelay=217, Bit 0, Center -12 (-231 ~ 208) 440
6925 19:59:51.224175 iDelay=217, Bit 1, Center -20 (-239 ~ 200) 440
6926 19:59:51.227800 iDelay=217, Bit 2, Center -28 (-247 ~ 192) 440
6927 19:59:51.230659 iDelay=217, Bit 3, Center -24 (-247 ~ 200) 448
6928 19:59:51.234414 iDelay=217, Bit 4, Center -20 (-239 ~ 200) 440
6929 19:59:51.240883 iDelay=217, Bit 5, Center -8 (-231 ~ 216) 448
6930 19:59:51.244012 iDelay=217, Bit 6, Center -8 (-231 ~ 216) 448
6931 19:59:51.247898 iDelay=217, Bit 7, Center -16 (-239 ~ 208) 448
6932 19:59:51.250973 iDelay=217, Bit 8, Center -32 (-255 ~ 192) 448
6933 19:59:51.257904 iDelay=217, Bit 9, Center -32 (-255 ~ 192) 448
6934 19:59:51.260912 iDelay=217, Bit 10, Center -20 (-247 ~ 208) 456
6935 19:59:51.264137 iDelay=217, Bit 11, Center -24 (-247 ~ 200) 448
6936 19:59:51.267864 iDelay=217, Bit 12, Center -12 (-239 ~ 216) 456
6937 19:59:51.274171 iDelay=217, Bit 13, Center -16 (-239 ~ 208) 448
6938 19:59:51.278260 iDelay=217, Bit 14, Center -16 (-239 ~ 208) 448
6939 19:59:51.281158 iDelay=217, Bit 15, Center -12 (-239 ~ 216) 456
6940 19:59:51.281258 ==
6941 19:59:51.284437 Dram Type= 6, Freq= 0, CH_1, rank 1
6942 19:59:51.290877 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6943 19:59:51.290950 ==
6944 19:59:51.291012 DQS Delay:
6945 19:59:51.291069 DQS0 = 28, DQS1 = 32
6946 19:59:51.294599 DQM Delay:
6947 19:59:51.294703 DQM0 = 11, DQM1 = 11
6948 19:59:51.297865 DQ Delay:
6949 19:59:51.301178 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =4
6950 19:59:51.301259 DQ4 =8, DQ5 =20, DQ6 =20, DQ7 =12
6951 19:59:51.304521 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =8
6952 19:59:51.307562 DQ12 =20, DQ13 =16, DQ14 =16, DQ15 =20
6953 19:59:51.307685
6954 19:59:51.307761
6955 19:59:51.317363 [DQSOSCAuto] RK1, (LSB)MR18= 0xc152, (MSB)MR19= 0xc0c, tDQSOscB0 = 399 ps tDQSOscB1 = 385 ps
6956 19:59:51.320620 CH1 RK1: MR19=C0C, MR18=C152
6957 19:59:51.327329 CH1_RK1: MR19=0xC0C, MR18=0xC152, DQSOSC=385, MR23=63, INC=398, DEC=265
6958 19:59:51.330683 [RxdqsGatingPostProcess] freq 400
6959 19:59:51.334364 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6960 19:59:51.337352 best DQS0 dly(2T, 0.5T) = (0, 10)
6961 19:59:51.340725 best DQS1 dly(2T, 0.5T) = (0, 10)
6962 19:59:51.344290 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6963 19:59:51.347479 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6964 19:59:51.350691 best DQS0 dly(2T, 0.5T) = (0, 10)
6965 19:59:51.354683 best DQS1 dly(2T, 0.5T) = (0, 10)
6966 19:59:51.357835 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6967 19:59:51.361059 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6968 19:59:51.364614 Pre-setting of DQS Precalculation
6969 19:59:51.367691 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6970 19:59:51.374494 sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6
6971 19:59:51.384511 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
6972 19:59:51.385057
6973 19:59:51.385554
6974 19:59:51.386073 [Calibration Summary] 800 Mbps
6975 19:59:51.387221 CH 0, Rank 0
6976 19:59:51.387773 SW Impedance : PASS
6977 19:59:51.390796 DUTY Scan : NO K
6978 19:59:51.394193 ZQ Calibration : PASS
6979 19:59:51.394700 Jitter Meter : NO K
6980 19:59:51.397245 CBT Training : PASS
6981 19:59:51.401190 Write leveling : PASS
6982 19:59:51.401725 RX DQS gating : PASS
6983 19:59:51.404237 RX DQ/DQS(RDDQC) : PASS
6984 19:59:51.407606 TX DQ/DQS : PASS
6985 19:59:51.408056 RX DATLAT : PASS
6986 19:59:51.410835 RX DQ/DQS(Engine): PASS
6987 19:59:51.414096 TX OE : NO K
6988 19:59:51.414631 All Pass.
6989 19:59:51.415079
6990 19:59:51.415502 CH 0, Rank 1
6991 19:59:51.417335 SW Impedance : PASS
6992 19:59:51.420612 DUTY Scan : NO K
6993 19:59:51.421011 ZQ Calibration : PASS
6994 19:59:51.424364 Jitter Meter : NO K
6995 19:59:51.427387 CBT Training : PASS
6996 19:59:51.427923 Write leveling : NO K
6997 19:59:51.430954 RX DQS gating : PASS
6998 19:59:51.431330 RX DQ/DQS(RDDQC) : PASS
6999 19:59:51.434474 TX DQ/DQS : PASS
7000 19:59:51.437726 RX DATLAT : PASS
7001 19:59:51.438238 RX DQ/DQS(Engine): PASS
7002 19:59:51.440882 TX OE : NO K
7003 19:59:51.441420 All Pass.
7004 19:59:51.441891
7005 19:59:51.444165 CH 1, Rank 0
7006 19:59:51.444601 SW Impedance : PASS
7007 19:59:51.447334 DUTY Scan : NO K
7008 19:59:51.450807 ZQ Calibration : PASS
7009 19:59:51.451315 Jitter Meter : NO K
7010 19:59:51.453991 CBT Training : PASS
7011 19:59:51.457804 Write leveling : PASS
7012 19:59:51.458176 RX DQS gating : PASS
7013 19:59:51.460607 RX DQ/DQS(RDDQC) : PASS
7014 19:59:51.464179 TX DQ/DQS : PASS
7015 19:59:51.464259 RX DATLAT : PASS
7016 19:59:51.467259 RX DQ/DQS(Engine): PASS
7017 19:59:51.467338 TX OE : NO K
7018 19:59:51.470762 All Pass.
7019 19:59:51.470841
7020 19:59:51.470904 CH 1, Rank 1
7021 19:59:51.474027 SW Impedance : PASS
7022 19:59:51.474120 DUTY Scan : NO K
7023 19:59:51.476915 ZQ Calibration : PASS
7024 19:59:51.480936 Jitter Meter : NO K
7025 19:59:51.481016 CBT Training : PASS
7026 19:59:51.484011 Write leveling : NO K
7027 19:59:51.487139 RX DQS gating : PASS
7028 19:59:51.487217 RX DQ/DQS(RDDQC) : PASS
7029 19:59:51.490402 TX DQ/DQS : PASS
7030 19:59:51.493857 RX DATLAT : PASS
7031 19:59:51.493942 RX DQ/DQS(Engine): PASS
7032 19:59:51.497069 TX OE : NO K
7033 19:59:51.497191 All Pass.
7034 19:59:51.497296
7035 19:59:51.500350 DramC Write-DBI off
7036 19:59:51.504085 PER_BANK_REFRESH: Hybrid Mode
7037 19:59:51.504242 TX_TRACKING: ON
7038 19:59:51.513731 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
7039 19:59:51.517012 [FAST_K] Save calibration result to emmc
7040 19:59:51.520183 dramc_set_vcore_voltage set vcore to 725000
7041 19:59:51.523545 Read voltage for 1600, 0
7042 19:59:51.523733 Vio18 = 0
7043 19:59:51.523923 Vcore = 725000
7044 19:59:51.527017 Vdram = 0
7045 19:59:51.527233 Vddq = 0
7046 19:59:51.527442 Vmddr = 0
7047 19:59:51.533662 [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0
7048 19:59:51.536819 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
7049 19:59:51.540578 MEM_TYPE=3, freq_sel=13
7050 19:59:51.543661 sv_algorithm_assistance_LP4_3733
7051 19:59:51.547302 ============ PULL DRAM RESETB DOWN ============
7052 19:59:51.550491 ========== PULL DRAM RESETB DOWN end =========
7053 19:59:51.557401 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7054 19:59:51.560406 ===================================
7055 19:59:51.560557 LPDDR4 DRAM CONFIGURATION
7056 19:59:51.563542 ===================================
7057 19:59:51.566843 EX_ROW_EN[0] = 0x0
7058 19:59:51.570355 EX_ROW_EN[1] = 0x0
7059 19:59:51.570579 LP4Y_EN = 0x0
7060 19:59:51.573506 WORK_FSP = 0x1
7061 19:59:51.573729 WL = 0x5
7062 19:59:51.577029 RL = 0x5
7063 19:59:51.577199 BL = 0x2
7064 19:59:51.580383 RPST = 0x0
7065 19:59:51.580552 RD_PRE = 0x0
7066 19:59:51.583773 WR_PRE = 0x1
7067 19:59:51.583940 WR_PST = 0x1
7068 19:59:51.586847 DBI_WR = 0x0
7069 19:59:51.587017 DBI_RD = 0x0
7070 19:59:51.590596 OTF = 0x1
7071 19:59:51.593828 ===================================
7072 19:59:51.597145 ===================================
7073 19:59:51.597366 ANA top config
7074 19:59:51.600557 ===================================
7075 19:59:51.603567 DLL_ASYNC_EN = 0
7076 19:59:51.607091 ALL_SLAVE_EN = 0
7077 19:59:51.610241 NEW_RANK_MODE = 1
7078 19:59:51.610437 DLL_IDLE_MODE = 1
7079 19:59:51.614243 LP45_APHY_COMB_EN = 1
7080 19:59:51.617300 TX_ODT_DIS = 0
7081 19:59:51.620542 NEW_8X_MODE = 1
7082 19:59:51.624384 ===================================
7083 19:59:51.627650 ===================================
7084 19:59:51.627886 data_rate = 3200
7085 19:59:51.631017 CKR = 1
7086 19:59:51.634189 DQ_P2S_RATIO = 8
7087 19:59:51.637350 ===================================
7088 19:59:51.641081 CA_P2S_RATIO = 8
7089 19:59:51.644247 DQ_CA_OPEN = 0
7090 19:59:51.647573 DQ_SEMI_OPEN = 0
7091 19:59:51.647834 CA_SEMI_OPEN = 0
7092 19:59:51.650710 CA_FULL_RATE = 0
7093 19:59:51.653770 DQ_CKDIV4_EN = 0
7094 19:59:51.657830 CA_CKDIV4_EN = 0
7095 19:59:51.660949 CA_PREDIV_EN = 0
7096 19:59:51.664220 PH8_DLY = 12
7097 19:59:51.664456 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
7098 19:59:51.667500 DQ_AAMCK_DIV = 4
7099 19:59:51.670633 CA_AAMCK_DIV = 4
7100 19:59:51.673697 CA_ADMCK_DIV = 4
7101 19:59:51.677593 DQ_TRACK_CA_EN = 0
7102 19:59:51.680331 CA_PICK = 1600
7103 19:59:51.683527 CA_MCKIO = 1600
7104 19:59:51.683855 MCKIO_SEMI = 0
7105 19:59:51.687402 PLL_FREQ = 3068
7106 19:59:51.690456 DQ_UI_PI_RATIO = 32
7107 19:59:51.693853 CA_UI_PI_RATIO = 0
7108 19:59:51.697123 ===================================
7109 19:59:51.700292 ===================================
7110 19:59:51.703730 memory_type:LPDDR4
7111 19:59:51.704156 GP_NUM : 10
7112 19:59:51.707292 SRAM_EN : 1
7113 19:59:51.710488 MD32_EN : 0
7114 19:59:51.713637 ===================================
7115 19:59:51.714063 [ANA_INIT] >>>>>>>>>>>>>>
7116 19:59:51.717248 <<<<<< [CONFIGURE PHASE]: ANA_TX
7117 19:59:51.720233 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
7118 19:59:51.723850 ===================================
7119 19:59:51.726882 data_rate = 3200,PCW = 0X7600
7120 19:59:51.730196 ===================================
7121 19:59:51.733966 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
7122 19:59:51.740110 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7123 19:59:51.743340 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7124 19:59:51.750444 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
7125 19:59:51.753633 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
7126 19:59:51.756844 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
7127 19:59:51.757281 [ANA_INIT] flow start
7128 19:59:51.760553 [ANA_INIT] PLL >>>>>>>>
7129 19:59:51.763804 [ANA_INIT] PLL <<<<<<<<
7130 19:59:51.764210 [ANA_INIT] MIDPI >>>>>>>>
7131 19:59:51.766849 [ANA_INIT] MIDPI <<<<<<<<
7132 19:59:51.770335 [ANA_INIT] DLL >>>>>>>>
7133 19:59:51.773323 [ANA_INIT] DLL <<<<<<<<
7134 19:59:51.773736 [ANA_INIT] flow end
7135 19:59:51.777083 ============ LP4 DIFF to SE enter ============
7136 19:59:51.783874 ============ LP4 DIFF to SE exit ============
7137 19:59:51.784294 [ANA_INIT] <<<<<<<<<<<<<
7138 19:59:51.786950 [Flow] Enable top DCM control >>>>>
7139 19:59:51.790105 [Flow] Enable top DCM control <<<<<
7140 19:59:51.793361 Enable DLL master slave shuffle
7141 19:59:51.800405 ==============================================================
7142 19:59:51.801010 Gating Mode config
7143 19:59:51.806846 ==============================================================
7144 19:59:51.809960 Config description:
7145 19:59:51.820099 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
7146 19:59:51.823610 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
7147 19:59:51.830158 SELPH_MODE 0: By rank 1: By Phase
7148 19:59:51.836602 ==============================================================
7149 19:59:51.840064 GAT_TRACK_EN = 1
7150 19:59:51.840633 RX_GATING_MODE = 2
7151 19:59:51.843327 RX_GATING_TRACK_MODE = 2
7152 19:59:51.846559 SELPH_MODE = 1
7153 19:59:51.849886 PICG_EARLY_EN = 1
7154 19:59:51.853369 VALID_LAT_VALUE = 1
7155 19:59:51.859754 ==============================================================
7156 19:59:51.863010 Enter into Gating configuration >>>>
7157 19:59:51.866348 Exit from Gating configuration <<<<
7158 19:59:51.869933 Enter into DVFS_PRE_config >>>>>
7159 19:59:51.880153 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
7160 19:59:51.883334 Exit from DVFS_PRE_config <<<<<
7161 19:59:51.886626 Enter into PICG configuration >>>>
7162 19:59:51.889740 Exit from PICG configuration <<<<
7163 19:59:51.892930 [RX_INPUT] configuration >>>>>
7164 19:59:51.896731 [RX_INPUT] configuration <<<<<
7165 19:59:51.899945 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
7166 19:59:51.906326 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
7167 19:59:51.913053 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
7168 19:59:51.916640 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
7169 19:59:51.923020 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
7170 19:59:51.929644 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
7171 19:59:51.932650 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
7172 19:59:51.936342 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
7173 19:59:51.942866 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
7174 19:59:51.946112 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
7175 19:59:51.949859 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
7176 19:59:51.956120 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7177 19:59:51.959835 ===================================
7178 19:59:51.960246 LPDDR4 DRAM CONFIGURATION
7179 19:59:51.962968 ===================================
7180 19:59:51.966032 EX_ROW_EN[0] = 0x0
7181 19:59:51.969680 EX_ROW_EN[1] = 0x0
7182 19:59:51.970131 LP4Y_EN = 0x0
7183 19:59:51.972528 WORK_FSP = 0x1
7184 19:59:51.972966 WL = 0x5
7185 19:59:51.976139 RL = 0x5
7186 19:59:51.976737 BL = 0x2
7187 19:59:51.979304 RPST = 0x0
7188 19:59:51.979831 RD_PRE = 0x0
7189 19:59:51.982571 WR_PRE = 0x1
7190 19:59:51.983097 WR_PST = 0x1
7191 19:59:51.986052 DBI_WR = 0x0
7192 19:59:51.986460 DBI_RD = 0x0
7193 19:59:51.989236 OTF = 0x1
7194 19:59:51.992680 ===================================
7195 19:59:51.995732 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
7196 19:59:51.999543 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
7197 19:59:52.005952 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7198 19:59:52.009260 ===================================
7199 19:59:52.009859 LPDDR4 DRAM CONFIGURATION
7200 19:59:52.012484 ===================================
7201 19:59:52.015761 EX_ROW_EN[0] = 0x10
7202 19:59:52.016382 EX_ROW_EN[1] = 0x0
7203 19:59:52.019486 LP4Y_EN = 0x0
7204 19:59:52.020100 WORK_FSP = 0x1
7205 19:59:52.022430 WL = 0x5
7206 19:59:52.025923 RL = 0x5
7207 19:59:52.026529 BL = 0x2
7208 19:59:52.029228 RPST = 0x0
7209 19:59:52.029822 RD_PRE = 0x0
7210 19:59:52.032779 WR_PRE = 0x1
7211 19:59:52.033308 WR_PST = 0x1
7212 19:59:52.035750 DBI_WR = 0x0
7213 19:59:52.036356 DBI_RD = 0x0
7214 19:59:52.039441 OTF = 0x1
7215 19:59:52.042693 ===================================
7216 19:59:52.045592 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
7217 19:59:52.049206 ==
7218 19:59:52.052056 Dram Type= 6, Freq= 0, CH_0, rank 0
7219 19:59:52.055695 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7220 19:59:52.056017 ==
7221 19:59:52.058912 [Duty_Offset_Calibration]
7222 19:59:52.059180 B0:2 B1:1 CA:1
7223 19:59:52.059359
7224 19:59:52.061972 [DutyScan_Calibration_Flow] k_type=0
7225 19:59:52.072532
7226 19:59:52.072767 ==CLK 0==
7227 19:59:52.075713 Final CLK duty delay cell = 0
7228 19:59:52.078989 [0] MAX Duty = 5156%(X100), DQS PI = 22
7229 19:59:52.082130 [0] MIN Duty = 4907%(X100), DQS PI = 0
7230 19:59:52.082349 [0] AVG Duty = 5031%(X100)
7231 19:59:52.082525
7232 19:59:52.086081 CH0 CLK Duty spec in!! Max-Min= 249%
7233 19:59:52.092096 [DutyScan_Calibration_Flow] ====Done====
7234 19:59:52.092314
7235 19:59:52.095800 [DutyScan_Calibration_Flow] k_type=1
7236 19:59:52.111673
7237 19:59:52.111892 ==DQS 0 ==
7238 19:59:52.114416 Final DQS duty delay cell = -4
7239 19:59:52.117758 [-4] MAX Duty = 5125%(X100), DQS PI = 24
7240 19:59:52.121412 [-4] MIN Duty = 4657%(X100), DQS PI = 0
7241 19:59:52.124683 [-4] AVG Duty = 4891%(X100)
7242 19:59:52.125003
7243 19:59:52.125283 ==DQS 1 ==
7244 19:59:52.127790 Final DQS duty delay cell = 0
7245 19:59:52.131332 [0] MAX Duty = 5187%(X100), DQS PI = 4
7246 19:59:52.134433 [0] MIN Duty = 5031%(X100), DQS PI = 52
7247 19:59:52.138096 [0] AVG Duty = 5109%(X100)
7248 19:59:52.138408
7249 19:59:52.140958 CH0 DQS 0 Duty spec in!! Max-Min= 468%
7250 19:59:52.141249
7251 19:59:52.144597 CH0 DQS 1 Duty spec in!! Max-Min= 156%
7252 19:59:52.148025 [DutyScan_Calibration_Flow] ====Done====
7253 19:59:52.148312
7254 19:59:52.151229 [DutyScan_Calibration_Flow] k_type=3
7255 19:59:52.168274
7256 19:59:52.168608 ==DQM 0 ==
7257 19:59:52.171341 Final DQM duty delay cell = 0
7258 19:59:52.174888 [0] MAX Duty = 5218%(X100), DQS PI = 32
7259 19:59:52.177697 [0] MIN Duty = 4876%(X100), DQS PI = 58
7260 19:59:52.181461 [0] AVG Duty = 5047%(X100)
7261 19:59:52.181829
7262 19:59:52.182073 ==DQM 1 ==
7263 19:59:52.184903 Final DQM duty delay cell = -4
7264 19:59:52.188156 [-4] MAX Duty = 4969%(X100), DQS PI = 20
7265 19:59:52.191280 [-4] MIN Duty = 4844%(X100), DQS PI = 14
7266 19:59:52.194547 [-4] AVG Duty = 4906%(X100)
7267 19:59:52.194912
7268 19:59:52.197585 CH0 DQM 0 Duty spec in!! Max-Min= 342%
7269 19:59:52.197949
7270 19:59:52.201462 CH0 DQM 1 Duty spec in!! Max-Min= 125%
7271 19:59:52.204480 [DutyScan_Calibration_Flow] ====Done====
7272 19:59:52.204854
7273 19:59:52.207741 [DutyScan_Calibration_Flow] k_type=2
7274 19:59:52.225466
7275 19:59:52.225797 ==DQ 0 ==
7276 19:59:52.228814 Final DQ duty delay cell = 0
7277 19:59:52.232033 [0] MAX Duty = 5062%(X100), DQS PI = 26
7278 19:59:52.235680 [0] MIN Duty = 4907%(X100), DQS PI = 0
7279 19:59:52.236017 [0] AVG Duty = 4984%(X100)
7280 19:59:52.236262
7281 19:59:52.238986 ==DQ 1 ==
7282 19:59:52.242382 Final DQ duty delay cell = 0
7283 19:59:52.245192 [0] MAX Duty = 5125%(X100), DQS PI = 6
7284 19:59:52.248940 [0] MIN Duty = 4907%(X100), DQS PI = 34
7285 19:59:52.249216 [0] AVG Duty = 5016%(X100)
7286 19:59:52.249507
7287 19:59:52.252205 CH0 DQ 0 Duty spec in!! Max-Min= 155%
7288 19:59:52.252482
7289 19:59:52.255369 CH0 DQ 1 Duty spec in!! Max-Min= 218%
7290 19:59:52.262182 [DutyScan_Calibration_Flow] ====Done====
7291 19:59:52.262488 ==
7292 19:59:52.265323 Dram Type= 6, Freq= 0, CH_1, rank 0
7293 19:59:52.268814 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7294 19:59:52.269097 ==
7295 19:59:52.272252 [Duty_Offset_Calibration]
7296 19:59:52.272599 B0:1 B1:0 CA:0
7297 19:59:52.272843
7298 19:59:52.275132 [DutyScan_Calibration_Flow] k_type=0
7299 19:59:52.285240
7300 19:59:52.285573 ==CLK 0==
7301 19:59:52.288418 Final CLK duty delay cell = -4
7302 19:59:52.291567 [-4] MAX Duty = 5000%(X100), DQS PI = 24
7303 19:59:52.294689 [-4] MIN Duty = 4875%(X100), DQS PI = 0
7304 19:59:52.298574 [-4] AVG Duty = 4937%(X100)
7305 19:59:52.298914
7306 19:59:52.301824 CH1 CLK Duty spec in!! Max-Min= 125%
7307 19:59:52.305015 [DutyScan_Calibration_Flow] ====Done====
7308 19:59:52.305365
7309 19:59:52.308021 [DutyScan_Calibration_Flow] k_type=1
7310 19:59:52.325104
7311 19:59:52.325373 ==DQS 0 ==
7312 19:59:52.328358 Final DQS duty delay cell = 0
7313 19:59:52.331542 [0] MAX Duty = 5094%(X100), DQS PI = 14
7314 19:59:52.334752 [0] MIN Duty = 4875%(X100), DQS PI = 0
7315 19:59:52.337791 [0] AVG Duty = 4984%(X100)
7316 19:59:52.338062
7317 19:59:52.338374 ==DQS 1 ==
7318 19:59:52.341536 Final DQS duty delay cell = 0
7319 19:59:52.344492 [0] MAX Duty = 5249%(X100), DQS PI = 16
7320 19:59:52.348127 [0] MIN Duty = 4969%(X100), DQS PI = 6
7321 19:59:52.351621 [0] AVG Duty = 5109%(X100)
7322 19:59:52.351925
7323 19:59:52.354588 CH1 DQS 0 Duty spec in!! Max-Min= 219%
7324 19:59:52.354910
7325 19:59:52.357835 CH1 DQS 1 Duty spec in!! Max-Min= 280%
7326 19:59:52.361100 [DutyScan_Calibration_Flow] ====Done====
7327 19:59:52.361180
7328 19:59:52.364106 [DutyScan_Calibration_Flow] k_type=3
7329 19:59:52.381757
7330 19:59:52.381843 ==DQM 0 ==
7331 19:59:52.384542 Final DQM duty delay cell = 0
7332 19:59:52.388143 [0] MAX Duty = 5218%(X100), DQS PI = 20
7333 19:59:52.391598 [0] MIN Duty = 5000%(X100), DQS PI = 48
7334 19:59:52.394935 [0] AVG Duty = 5109%(X100)
7335 19:59:52.395015
7336 19:59:52.395080 ==DQM 1 ==
7337 19:59:52.398160 Final DQM duty delay cell = 0
7338 19:59:52.401236 [0] MAX Duty = 5093%(X100), DQS PI = 16
7339 19:59:52.404961 [0] MIN Duty = 4907%(X100), DQS PI = 32
7340 19:59:52.408262 [0] AVG Duty = 5000%(X100)
7341 19:59:52.408353
7342 19:59:52.411469 CH1 DQM 0 Duty spec in!! Max-Min= 218%
7343 19:59:52.411569
7344 19:59:52.414627 CH1 DQM 1 Duty spec in!! Max-Min= 186%
7345 19:59:52.418005 [DutyScan_Calibration_Flow] ====Done====
7346 19:59:52.418187
7347 19:59:52.421232 [DutyScan_Calibration_Flow] k_type=2
7348 19:59:52.437564
7349 19:59:52.437761 ==DQ 0 ==
7350 19:59:52.441535 Final DQ duty delay cell = -4
7351 19:59:52.444294 [-4] MAX Duty = 5062%(X100), DQS PI = 12
7352 19:59:52.448173 [-4] MIN Duty = 4875%(X100), DQS PI = 46
7353 19:59:52.451487 [-4] AVG Duty = 4968%(X100)
7354 19:59:52.451868
7355 19:59:52.452121 ==DQ 1 ==
7356 19:59:52.454753 Final DQ duty delay cell = 0
7357 19:59:52.457839 [0] MAX Duty = 5124%(X100), DQS PI = 18
7358 19:59:52.461609 [0] MIN Duty = 4938%(X100), DQS PI = 8
7359 19:59:52.462108 [0] AVG Duty = 5031%(X100)
7360 19:59:52.464867
7361 19:59:52.467756 CH1 DQ 0 Duty spec in!! Max-Min= 187%
7362 19:59:52.468247
7363 19:59:52.471322 CH1 DQ 1 Duty spec in!! Max-Min= 186%
7364 19:59:52.474194 [DutyScan_Calibration_Flow] ====Done====
7365 19:59:52.477610 nWR fixed to 30
7366 19:59:52.478160 [ModeRegInit_LP4] CH0 RK0
7367 19:59:52.481214 [ModeRegInit_LP4] CH0 RK1
7368 19:59:52.484543 [ModeRegInit_LP4] CH1 RK0
7369 19:59:52.488106 [ModeRegInit_LP4] CH1 RK1
7370 19:59:52.488535 match AC timing 5
7371 19:59:52.494530 dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 1
7372 19:59:52.498151 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
7373 19:59:52.501191 [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14
7374 19:59:52.507410 [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29
7375 19:59:52.510761 [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)
7376 19:59:52.511142 [MiockJmeterHQA]
7377 19:59:52.511445
7378 19:59:52.514239 [DramcMiockJmeter] u1RxGatingPI = 0
7379 19:59:52.517710 0 : 4255, 4029
7380 19:59:52.518229 4 : 4363, 4138
7381 19:59:52.520655 8 : 4252, 4027
7382 19:59:52.521040 12 : 4253, 4026
7383 19:59:52.521349 16 : 4253, 4027
7384 19:59:52.524414 20 : 4253, 4026
7385 19:59:52.524802 24 : 4255, 4030
7386 19:59:52.527734 28 : 4252, 4027
7387 19:59:52.528122 32 : 4253, 4027
7388 19:59:52.530900 36 : 4366, 4140
7389 19:59:52.531286 40 : 4253, 4026
7390 19:59:52.534155 44 : 4254, 4029
7391 19:59:52.534542 48 : 4253, 4026
7392 19:59:52.534846 52 : 4361, 4138
7393 19:59:52.537407 56 : 4250, 4027
7394 19:59:52.537792 60 : 4361, 4137
7395 19:59:52.540665 64 : 4250, 4027
7396 19:59:52.541052 68 : 4250, 4026
7397 19:59:52.543893 72 : 4252, 4029
7398 19:59:52.544280 76 : 4252, 4030
7399 19:59:52.547069 80 : 4361, 4137
7400 19:59:52.547453 84 : 4250, 4027
7401 19:59:52.547806 88 : 4360, 215
7402 19:59:52.550369 92 : 4361, 0
7403 19:59:52.550755 96 : 4361, 0
7404 19:59:52.554201 100 : 4252, 0
7405 19:59:52.554589 104 : 4249, 0
7406 19:59:52.554896 108 : 4250, 0
7407 19:59:52.557322 112 : 4361, 0
7408 19:59:52.557709 116 : 4361, 0
7409 19:59:52.558017 120 : 4250, 0
7410 19:59:52.560682 124 : 4250, 0
7411 19:59:52.561072 128 : 4250, 0
7412 19:59:52.563797 132 : 4252, 0
7413 19:59:52.564188 136 : 4253, 0
7414 19:59:52.564501 140 : 4250, 0
7415 19:59:52.567487 144 : 4252, 0
7416 19:59:52.567999 148 : 4361, 0
7417 19:59:52.570575 152 : 4251, 0
7418 19:59:52.571070 156 : 4250, 0
7419 19:59:52.571411 160 : 4250, 0
7420 19:59:52.573684 164 : 4360, 0
7421 19:59:52.574187 168 : 4360, 0
7422 19:59:52.577374 172 : 4250, 0
7423 19:59:52.577864 176 : 4250, 0
7424 19:59:52.578223 180 : 4250, 0
7425 19:59:52.580564 184 : 4252, 0
7426 19:59:52.581071 188 : 4250, 0
7427 19:59:52.581432 192 : 4250, 0
7428 19:59:52.583724 196 : 4253, 0
7429 19:59:52.584211 200 : 4363, 0
7430 19:59:52.587538 204 : 4250, 1126
7431 19:59:52.588089 208 : 4250, 4000
7432 19:59:52.590692 212 : 4250, 4027
7433 19:59:52.591195 216 : 4250, 4027
7434 19:59:52.594308 220 : 4249, 4027
7435 19:59:52.594821 224 : 4250, 4026
7436 19:59:52.595170 228 : 4250, 4027
7437 19:59:52.597496 232 : 4252, 4030
7438 19:59:52.597995 236 : 4250, 4027
7439 19:59:52.600747 240 : 4361, 4137
7440 19:59:52.601262 244 : 4361, 4137
7441 19:59:52.603881 248 : 4250, 4027
7442 19:59:52.604381 252 : 4363, 4140
7443 19:59:52.607507 256 : 4361, 4137
7444 19:59:52.608079 260 : 4250, 4026
7445 19:59:52.610437 264 : 4250, 4027
7446 19:59:52.611035 268 : 4252, 4030
7447 19:59:52.613753 272 : 4250, 4026
7448 19:59:52.614365 276 : 4250, 4026
7449 19:59:52.617291 280 : 4250, 4027
7450 19:59:52.617803 284 : 4252, 4030
7451 19:59:52.618352 288 : 4250, 4027
7452 19:59:52.620541 292 : 4361, 4137
7453 19:59:52.621058 296 : 4361, 4137
7454 19:59:52.623677 300 : 4250, 4027
7455 19:59:52.624153 304 : 4364, 4140
7456 19:59:52.627262 308 : 4252, 3978
7457 19:59:52.627622 312 : 4250, 1762
7458 19:59:52.627889
7459 19:59:52.630513 MIOCK jitter meter ch=0
7460 19:59:52.630876
7461 19:59:52.633639 1T = (312-88) = 224 dly cells
7462 19:59:52.640298 Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 290/100 ps
7463 19:59:52.640681 ==
7464 19:59:52.643794 Dram Type= 6, Freq= 0, CH_0, rank 0
7465 19:59:52.646884 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7466 19:59:52.647158 ==
7467 19:59:52.653964 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7468 19:59:52.657156 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7469 19:59:52.660346 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7470 19:59:52.666800 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7471 19:59:52.675495 [CA 0] Center 42 (12~73) winsize 62
7472 19:59:52.678526 [CA 1] Center 42 (12~73) winsize 62
7473 19:59:52.682236 [CA 2] Center 37 (8~67) winsize 60
7474 19:59:52.685621 [CA 3] Center 37 (7~67) winsize 61
7475 19:59:52.688820 [CA 4] Center 36 (6~66) winsize 61
7476 19:59:52.692035 [CA 5] Center 35 (6~64) winsize 59
7477 19:59:52.692311
7478 19:59:52.695167 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7479 19:59:52.695439
7480 19:59:52.698977 [CATrainingPosCal] consider 1 rank data
7481 19:59:52.702311 u2DelayCellTimex100 = 290/100 ps
7482 19:59:52.705553 CA0 delay=42 (12~73),Diff = 7 PI (23 cell)
7483 19:59:52.711863 CA1 delay=42 (12~73),Diff = 7 PI (23 cell)
7484 19:59:52.715152 CA2 delay=37 (8~67),Diff = 2 PI (6 cell)
7485 19:59:52.718412 CA3 delay=37 (7~67),Diff = 2 PI (6 cell)
7486 19:59:52.721989 CA4 delay=36 (6~66),Diff = 1 PI (3 cell)
7487 19:59:52.725466 CA5 delay=35 (6~64),Diff = 0 PI (0 cell)
7488 19:59:52.725740
7489 19:59:52.728346 CA PerBit enable=1, Macro0, CA PI delay=35
7490 19:59:52.728620
7491 19:59:52.732021 [CBTSetCACLKResult] CA Dly = 35
7492 19:59:52.735111 CS Dly: 9 (0~40)
7493 19:59:52.738846 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7494 19:59:52.741967 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7495 19:59:52.742242 ==
7496 19:59:52.745265 Dram Type= 6, Freq= 0, CH_0, rank 1
7497 19:59:52.748319 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7498 19:59:52.748593 ==
7499 19:59:52.755291 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7500 19:59:52.758630 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7501 19:59:52.765129 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7502 19:59:52.768594 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7503 19:59:52.778442 [CA 0] Center 42 (12~72) winsize 61
7504 19:59:52.782015 [CA 1] Center 42 (12~73) winsize 62
7505 19:59:52.785053 [CA 2] Center 37 (8~67) winsize 60
7506 19:59:52.788909 [CA 3] Center 37 (8~67) winsize 60
7507 19:59:52.792070 [CA 4] Center 35 (5~65) winsize 61
7508 19:59:52.795506 [CA 5] Center 35 (5~65) winsize 61
7509 19:59:52.795843
7510 19:59:52.798814 [CmdBusTrainingLP45] Vref(ca) range 0: 30
7511 19:59:52.799088
7512 19:59:52.802346 [CATrainingPosCal] consider 2 rank data
7513 19:59:52.805536 u2DelayCellTimex100 = 290/100 ps
7514 19:59:52.808879 CA0 delay=42 (12~72),Diff = 7 PI (23 cell)
7515 19:59:52.815224 CA1 delay=42 (12~73),Diff = 7 PI (23 cell)
7516 19:59:52.818493 CA2 delay=37 (8~67),Diff = 2 PI (6 cell)
7517 19:59:52.821685 CA3 delay=37 (8~67),Diff = 2 PI (6 cell)
7518 19:59:52.825404 CA4 delay=35 (6~65),Diff = 0 PI (0 cell)
7519 19:59:52.828625 CA5 delay=35 (6~64),Diff = 0 PI (0 cell)
7520 19:59:52.828900
7521 19:59:52.831800 CA PerBit enable=1, Macro0, CA PI delay=35
7522 19:59:52.832090
7523 19:59:52.835322 [CBTSetCACLKResult] CA Dly = 35
7524 19:59:52.838250 CS Dly: 10 (0~42)
7525 19:59:52.841635 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7526 19:59:52.845113 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7527 19:59:52.845385
7528 19:59:52.848800 ----->DramcWriteLeveling(PI) begin...
7529 19:59:52.849118 ==
7530 19:59:52.852136 Dram Type= 6, Freq= 0, CH_0, rank 0
7531 19:59:52.855275 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7532 19:59:52.858595 ==
7533 19:59:52.858862 Write leveling (Byte 0): 35 => 35
7534 19:59:52.861778 Write leveling (Byte 1): 28 => 28
7535 19:59:52.864985 DramcWriteLeveling(PI) end<-----
7536 19:59:52.865258
7537 19:59:52.865475 ==
7538 19:59:52.868772 Dram Type= 6, Freq= 0, CH_0, rank 0
7539 19:59:52.874836 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7540 19:59:52.874943 ==
7541 19:59:52.875035 [Gating] SW mode calibration
7542 19:59:52.884797 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7543 19:59:52.888208 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7544 19:59:52.891504 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7545 19:59:52.898182 1 4 4 | B1->B0 | 2323 2322 | 0 1 | (0 0) (0 0)
7546 19:59:52.901625 1 4 8 | B1->B0 | 2323 2827 | 0 1 | (0 0) (0 0)
7547 19:59:52.904584 1 4 12 | B1->B0 | 2323 3535 | 0 1 | (0 0) (0 0)
7548 19:59:52.911113 1 4 16 | B1->B0 | 2323 3636 | 0 0 | (0 0) (1 1)
7549 19:59:52.914772 1 4 20 | B1->B0 | 3030 3434 | 1 1 | (1 1) (1 1)
7550 19:59:52.917972 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7551 19:59:52.924764 1 4 28 | B1->B0 | 3434 3737 | 1 1 | (1 1) (1 1)
7552 19:59:52.927893 1 5 0 | B1->B0 | 3434 3534 | 1 1 | (1 1) (1 1)
7553 19:59:52.931143 1 5 4 | B1->B0 | 3434 3535 | 1 1 | (1 1) (1 1)
7554 19:59:52.938105 1 5 8 | B1->B0 | 3434 3636 | 1 0 | (1 1) (0 0)
7555 19:59:52.941266 1 5 12 | B1->B0 | 3434 2f2f | 1 0 | (1 1) (0 1)
7556 19:59:52.944935 1 5 16 | B1->B0 | 3434 2828 | 1 0 | (1 0) (0 0)
7557 19:59:52.951515 1 5 20 | B1->B0 | 2525 2424 | 0 0 | (0 1) (0 0)
7558 19:59:52.954474 1 5 24 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7559 19:59:52.957756 1 5 28 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7560 19:59:52.964296 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7561 19:59:52.968070 1 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7562 19:59:52.971353 1 6 8 | B1->B0 | 2323 3434 | 0 1 | (0 0) (0 0)
7563 19:59:52.977594 1 6 12 | B1->B0 | 2323 4444 | 0 0 | (0 0) (0 0)
7564 19:59:52.981508 1 6 16 | B1->B0 | 2f2f 4645 | 1 1 | (0 0) (0 0)
7565 19:59:52.984537 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7566 19:59:52.991473 1 6 24 | B1->B0 | 4646 4645 | 0 1 | (0 0) (0 0)
7567 19:59:52.994599 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7568 19:59:52.997900 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7569 19:59:53.001710 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7570 19:59:53.008261 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7571 19:59:53.011308 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7572 19:59:53.014993 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7573 19:59:53.021369 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7574 19:59:53.024810 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7575 19:59:53.028097 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7576 19:59:53.034908 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7577 19:59:53.038067 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7578 19:59:53.041433 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7579 19:59:53.048065 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7580 19:59:53.051182 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7581 19:59:53.054749 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7582 19:59:53.061374 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7583 19:59:53.064546 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7584 19:59:53.067776 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7585 19:59:53.074293 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7586 19:59:53.077510 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7587 19:59:53.081216 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7588 19:59:53.087530 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7589 19:59:53.087612 Total UI for P1: 0, mck2ui 16
7590 19:59:53.094515 best dqsien dly found for B0: ( 1, 9, 10)
7591 19:59:53.097686 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7592 19:59:53.100891 1 9 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7593 19:59:53.104885 Total UI for P1: 0, mck2ui 16
7594 19:59:53.107957 best dqsien dly found for B1: ( 1, 9, 18)
7595 19:59:53.110911 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
7596 19:59:53.114093 best DQS1 dly(MCK, UI, PI) = (1, 9, 18)
7597 19:59:53.114174
7598 19:59:53.117427 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
7599 19:59:53.124323 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 18)
7600 19:59:53.124403 [Gating] SW calibration Done
7601 19:59:53.127374 ==
7602 19:59:53.130986 Dram Type= 6, Freq= 0, CH_0, rank 0
7603 19:59:53.134219 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7604 19:59:53.134298 ==
7605 19:59:53.134362 RX Vref Scan: 0
7606 19:59:53.134421
7607 19:59:53.137936 RX Vref 0 -> 0, step: 1
7608 19:59:53.138015
7609 19:59:53.141131 RX Delay 0 -> 252, step: 8
7610 19:59:53.144053 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
7611 19:59:53.147521 iDelay=200, Bit 1, Center 143 (88 ~ 199) 112
7612 19:59:53.151067 iDelay=200, Bit 2, Center 131 (80 ~ 183) 104
7613 19:59:53.157970 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
7614 19:59:53.160971 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
7615 19:59:53.164146 iDelay=200, Bit 5, Center 123 (72 ~ 175) 104
7616 19:59:53.167626 iDelay=200, Bit 6, Center 143 (96 ~ 191) 96
7617 19:59:53.170866 iDelay=200, Bit 7, Center 143 (96 ~ 191) 96
7618 19:59:53.173980 iDelay=200, Bit 8, Center 119 (72 ~ 167) 96
7619 19:59:53.180755 iDelay=200, Bit 9, Center 123 (72 ~ 175) 104
7620 19:59:53.183925 iDelay=200, Bit 10, Center 131 (80 ~ 183) 104
7621 19:59:53.187088 iDelay=200, Bit 11, Center 123 (72 ~ 175) 104
7622 19:59:53.190936 iDelay=200, Bit 12, Center 131 (80 ~ 183) 104
7623 19:59:53.197265 iDelay=200, Bit 13, Center 139 (88 ~ 191) 104
7624 19:59:53.200962 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
7625 19:59:53.204253 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
7626 19:59:53.204820 ==
7627 19:59:53.207409 Dram Type= 6, Freq= 0, CH_0, rank 0
7628 19:59:53.211461 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7629 19:59:53.212065 ==
7630 19:59:53.214216 DQS Delay:
7631 19:59:53.214801 DQS0 = 0, DQS1 = 0
7632 19:59:53.218075 DQM Delay:
7633 19:59:53.218660 DQM0 = 136, DQM1 = 130
7634 19:59:53.219149 DQ Delay:
7635 19:59:53.221310 DQ0 =135, DQ1 =143, DQ2 =131, DQ3 =135
7636 19:59:53.224521 DQ4 =139, DQ5 =123, DQ6 =143, DQ7 =143
7637 19:59:53.231203 DQ8 =119, DQ9 =123, DQ10 =131, DQ11 =123
7638 19:59:53.234182 DQ12 =131, DQ13 =139, DQ14 =139, DQ15 =135
7639 19:59:53.234759
7640 19:59:53.235275
7641 19:59:53.235784 ==
7642 19:59:53.237744 Dram Type= 6, Freq= 0, CH_0, rank 0
7643 19:59:53.241207 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7644 19:59:53.241627 ==
7645 19:59:53.241957
7646 19:59:53.242265
7647 19:59:53.244347 TX Vref Scan disable
7648 19:59:53.248174 == TX Byte 0 ==
7649 19:59:53.251332 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
7650 19:59:53.254323 Update DQM dly =991 (3 ,6, 31) DQM OEN =(3 ,3)
7651 19:59:53.254837 == TX Byte 1 ==
7652 19:59:53.261513 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
7653 19:59:53.264249 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
7654 19:59:53.264785 ==
7655 19:59:53.268207 Dram Type= 6, Freq= 0, CH_0, rank 0
7656 19:59:53.271045 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7657 19:59:53.271471 ==
7658 19:59:53.285668
7659 19:59:53.288999 TX Vref early break, caculate TX vref
7660 19:59:53.292338 TX Vref=16, minBit 1, minWin=22, winSum=374
7661 19:59:53.295538 TX Vref=18, minBit 3, minWin=23, winSum=385
7662 19:59:53.299319 TX Vref=20, minBit 0, minWin=24, winSum=399
7663 19:59:53.302499 TX Vref=22, minBit 0, minWin=24, winSum=406
7664 19:59:53.305634 TX Vref=24, minBit 0, minWin=24, winSum=409
7665 19:59:53.312481 TX Vref=26, minBit 2, minWin=24, winSum=422
7666 19:59:53.315711 TX Vref=28, minBit 6, minWin=24, winSum=424
7667 19:59:53.318802 TX Vref=30, minBit 6, minWin=24, winSum=414
7668 19:59:53.322448 TX Vref=32, minBit 1, minWin=24, winSum=406
7669 19:59:53.325726 TX Vref=34, minBit 6, minWin=23, winSum=394
7670 19:59:53.332444 [TxChooseVref] Worse bit 6, Min win 24, Win sum 424, Final Vref 28
7671 19:59:53.332860
7672 19:59:53.335747 Final TX Range 0 Vref 28
7673 19:59:53.336166
7674 19:59:53.336487 ==
7675 19:59:53.338839 Dram Type= 6, Freq= 0, CH_0, rank 0
7676 19:59:53.342272 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7677 19:59:53.342686 ==
7678 19:59:53.343014
7679 19:59:53.343315
7680 19:59:53.346017 TX Vref Scan disable
7681 19:59:53.352398 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =290/100 ps
7682 19:59:53.352822 == TX Byte 0 ==
7683 19:59:53.355750 u2DelayCellOfst[0]=10 cells (3 PI)
7684 19:59:53.359390 u2DelayCellOfst[1]=16 cells (5 PI)
7685 19:59:53.362206 u2DelayCellOfst[2]=13 cells (4 PI)
7686 19:59:53.365943 u2DelayCellOfst[3]=10 cells (3 PI)
7687 19:59:53.369127 u2DelayCellOfst[4]=10 cells (3 PI)
7688 19:59:53.372292 u2DelayCellOfst[5]=0 cells (0 PI)
7689 19:59:53.375482 u2DelayCellOfst[6]=16 cells (5 PI)
7690 19:59:53.375939 u2DelayCellOfst[7]=16 cells (5 PI)
7691 19:59:53.382347 Update DQ dly =989 (3 ,6, 29) DQ OEN =(3 ,3)
7692 19:59:53.385630 Update DQM dly =991 (3 ,6, 31) DQM OEN =(3 ,3)
7693 19:59:53.386061 == TX Byte 1 ==
7694 19:59:53.388917 u2DelayCellOfst[8]=0 cells (0 PI)
7695 19:59:53.392616 u2DelayCellOfst[9]=3 cells (1 PI)
7696 19:59:53.395839 u2DelayCellOfst[10]=10 cells (3 PI)
7697 19:59:53.399124 u2DelayCellOfst[11]=6 cells (2 PI)
7698 19:59:53.402164 u2DelayCellOfst[12]=10 cells (3 PI)
7699 19:59:53.405763 u2DelayCellOfst[13]=13 cells (4 PI)
7700 19:59:53.409436 u2DelayCellOfst[14]=13 cells (4 PI)
7701 19:59:53.412377 u2DelayCellOfst[15]=10 cells (3 PI)
7702 19:59:53.416084 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
7703 19:59:53.422465 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
7704 19:59:53.422891 DramC Write-DBI on
7705 19:59:53.423319 ==
7706 19:59:53.425863 Dram Type= 6, Freq= 0, CH_0, rank 0
7707 19:59:53.429017 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7708 19:59:53.429248 ==
7709 19:59:53.429482
7710 19:59:53.432117
7711 19:59:53.432410 TX Vref Scan disable
7712 19:59:53.435602 == TX Byte 0 ==
7713 19:59:53.438984 Update DQM dly =735 (2 ,6, 31) DQM OEN =(3 ,3)
7714 19:59:53.442150 == TX Byte 1 ==
7715 19:59:53.445520 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
7716 19:59:53.445749 DramC Write-DBI off
7717 19:59:53.445982
7718 19:59:53.449045 [DATLAT]
7719 19:59:53.449272 Freq=1600, CH0 RK0
7720 19:59:53.449505
7721 19:59:53.452660 DATLAT Default: 0xf
7722 19:59:53.452889 0, 0xFFFF, sum = 0
7723 19:59:53.456073 1, 0xFFFF, sum = 0
7724 19:59:53.456304 2, 0xFFFF, sum = 0
7725 19:59:53.459281 3, 0xFFFF, sum = 0
7726 19:59:53.459513 4, 0xFFFF, sum = 0
7727 19:59:53.462695 5, 0xFFFF, sum = 0
7728 19:59:53.462927 6, 0xFFFF, sum = 0
7729 19:59:53.465446 7, 0xFFFF, sum = 0
7730 19:59:53.465676 8, 0xFFFF, sum = 0
7731 19:59:53.468938 9, 0xFFFF, sum = 0
7732 19:59:53.472516 10, 0xFFFF, sum = 0
7733 19:59:53.472749 11, 0xFFFF, sum = 0
7734 19:59:53.475709 12, 0xFFFF, sum = 0
7735 19:59:53.475941 13, 0xFFFF, sum = 0
7736 19:59:53.478955 14, 0x0, sum = 1
7737 19:59:53.479186 15, 0x0, sum = 2
7738 19:59:53.482158 16, 0x0, sum = 3
7739 19:59:53.482388 17, 0x0, sum = 4
7740 19:59:53.482623 best_step = 15
7741 19:59:53.485300
7742 19:59:53.485525 ==
7743 19:59:53.488949 Dram Type= 6, Freq= 0, CH_0, rank 0
7744 19:59:53.491809 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7745 19:59:53.492039 ==
7746 19:59:53.492273 RX Vref Scan: 1
7747 19:59:53.492493
7748 19:59:53.495722 Set Vref Range= 24 -> 127
7749 19:59:53.495951
7750 19:59:53.498694 RX Vref 24 -> 127, step: 1
7751 19:59:53.498901
7752 19:59:53.502139 RX Delay 27 -> 252, step: 4
7753 19:59:53.502367
7754 19:59:53.505965 Set Vref, RX VrefLevel [Byte0]: 24
7755 19:59:53.509106 [Byte1]: 24
7756 19:59:53.509419
7757 19:59:53.512229 Set Vref, RX VrefLevel [Byte0]: 25
7758 19:59:53.515443 [Byte1]: 25
7759 19:59:53.515835
7760 19:59:53.519365 Set Vref, RX VrefLevel [Byte0]: 26
7761 19:59:53.522441 [Byte1]: 26
7762 19:59:53.525583
7763 19:59:53.526008 Set Vref, RX VrefLevel [Byte0]: 27
7764 19:59:53.528893 [Byte1]: 27
7765 19:59:53.533122
7766 19:59:53.533547 Set Vref, RX VrefLevel [Byte0]: 28
7767 19:59:53.536568 [Byte1]: 28
7768 19:59:53.540668
7769 19:59:53.541091 Set Vref, RX VrefLevel [Byte0]: 29
7770 19:59:53.544086 [Byte1]: 29
7771 19:59:53.548190
7772 19:59:53.548611 Set Vref, RX VrefLevel [Byte0]: 30
7773 19:59:53.551335 [Byte1]: 30
7774 19:59:53.556102
7775 19:59:53.556706 Set Vref, RX VrefLevel [Byte0]: 31
7776 19:59:53.562348 [Byte1]: 31
7777 19:59:53.562758
7778 19:59:53.565773 Set Vref, RX VrefLevel [Byte0]: 32
7779 19:59:53.568870 [Byte1]: 32
7780 19:59:53.569282
7781 19:59:53.572330 Set Vref, RX VrefLevel [Byte0]: 33
7782 19:59:53.575396 [Byte1]: 33
7783 19:59:53.575881
7784 19:59:53.579018 Set Vref, RX VrefLevel [Byte0]: 34
7785 19:59:53.582433 [Byte1]: 34
7786 19:59:53.586267
7787 19:59:53.586691 Set Vref, RX VrefLevel [Byte0]: 35
7788 19:59:53.589293 [Byte1]: 35
7789 19:59:53.593207
7790 19:59:53.593627 Set Vref, RX VrefLevel [Byte0]: 36
7791 19:59:53.597000 [Byte1]: 36
7792 19:59:53.601518
7793 19:59:53.602037 Set Vref, RX VrefLevel [Byte0]: 37
7794 19:59:53.604213 [Byte1]: 37
7795 19:59:53.608942
7796 19:59:53.609464 Set Vref, RX VrefLevel [Byte0]: 38
7797 19:59:53.611619 [Byte1]: 38
7798 19:59:53.616373
7799 19:59:53.616889 Set Vref, RX VrefLevel [Byte0]: 39
7800 19:59:53.619623 [Byte1]: 39
7801 19:59:53.624091
7802 19:59:53.624608 Set Vref, RX VrefLevel [Byte0]: 40
7803 19:59:53.627139 [Byte1]: 40
7804 19:59:53.631573
7805 19:59:53.632148 Set Vref, RX VrefLevel [Byte0]: 41
7806 19:59:53.634922 [Byte1]: 41
7807 19:59:53.639156
7808 19:59:53.639712 Set Vref, RX VrefLevel [Byte0]: 42
7809 19:59:53.642402 [Byte1]: 42
7810 19:59:53.646847
7811 19:59:53.647367 Set Vref, RX VrefLevel [Byte0]: 43
7812 19:59:53.649954 [Byte1]: 43
7813 19:59:53.654129
7814 19:59:53.654552 Set Vref, RX VrefLevel [Byte0]: 44
7815 19:59:53.657549 [Byte1]: 44
7816 19:59:53.661851
7817 19:59:53.662373 Set Vref, RX VrefLevel [Byte0]: 45
7818 19:59:53.664834 [Byte1]: 45
7819 19:59:53.669229
7820 19:59:53.669747 Set Vref, RX VrefLevel [Byte0]: 46
7821 19:59:53.672067 [Byte1]: 46
7822 19:59:53.676509
7823 19:59:53.676922 Set Vref, RX VrefLevel [Byte0]: 47
7824 19:59:53.679713 [Byte1]: 47
7825 19:59:53.683669
7826 19:59:53.684087 Set Vref, RX VrefLevel [Byte0]: 48
7827 19:59:53.687195 [Byte1]: 48
7828 19:59:53.691626
7829 19:59:53.692225 Set Vref, RX VrefLevel [Byte0]: 49
7830 19:59:53.694776 [Byte1]: 49
7831 19:59:53.699289
7832 19:59:53.699781 Set Vref, RX VrefLevel [Byte0]: 50
7833 19:59:53.702483 [Byte1]: 50
7834 19:59:53.706757
7835 19:59:53.707301 Set Vref, RX VrefLevel [Byte0]: 51
7836 19:59:53.709960 [Byte1]: 51
7837 19:59:53.714239
7838 19:59:53.714764 Set Vref, RX VrefLevel [Byte0]: 52
7839 19:59:53.717566 [Byte1]: 52
7840 19:59:53.721278
7841 19:59:53.721774 Set Vref, RX VrefLevel [Byte0]: 53
7842 19:59:53.725214 [Byte1]: 53
7843 19:59:53.729347
7844 19:59:53.729754 Set Vref, RX VrefLevel [Byte0]: 54
7845 19:59:53.732533 [Byte1]: 54
7846 19:59:53.736577
7847 19:59:53.737090 Set Vref, RX VrefLevel [Byte0]: 55
7848 19:59:53.740551 [Byte1]: 55
7849 19:59:53.744254
7850 19:59:53.744755 Set Vref, RX VrefLevel [Byte0]: 56
7851 19:59:53.747611 [Byte1]: 56
7852 19:59:53.751835
7853 19:59:53.752342 Set Vref, RX VrefLevel [Byte0]: 57
7854 19:59:53.755094 [Byte1]: 57
7855 19:59:53.759301
7856 19:59:53.759752 Set Vref, RX VrefLevel [Byte0]: 58
7857 19:59:53.762459 [Byte1]: 58
7858 19:59:53.767017
7859 19:59:53.767523 Set Vref, RX VrefLevel [Byte0]: 59
7860 19:59:53.769859 [Byte1]: 59
7861 19:59:53.774251
7862 19:59:53.774767 Set Vref, RX VrefLevel [Byte0]: 60
7863 19:59:53.777433 [Byte1]: 60
7864 19:59:53.781830
7865 19:59:53.782270 Set Vref, RX VrefLevel [Byte0]: 61
7866 19:59:53.784858 [Byte1]: 61
7867 19:59:53.789621
7868 19:59:53.792479 Set Vref, RX VrefLevel [Byte0]: 62
7869 19:59:53.795671 [Byte1]: 62
7870 19:59:53.796089
7871 19:59:53.799727 Set Vref, RX VrefLevel [Byte0]: 63
7872 19:59:53.802834 [Byte1]: 63
7873 19:59:53.803351
7874 19:59:53.805989 Set Vref, RX VrefLevel [Byte0]: 64
7875 19:59:53.809004 [Byte1]: 64
7876 19:59:53.809487
7877 19:59:53.812614 Set Vref, RX VrefLevel [Byte0]: 65
7878 19:59:53.815505 [Byte1]: 65
7879 19:59:53.819767
7880 19:59:53.820266 Set Vref, RX VrefLevel [Byte0]: 66
7881 19:59:53.823274 [Byte1]: 66
7882 19:59:53.826880
7883 19:59:53.827354 Set Vref, RX VrefLevel [Byte0]: 67
7884 19:59:53.830319 [Byte1]: 67
7885 19:59:53.835074
7886 19:59:53.835631 Set Vref, RX VrefLevel [Byte0]: 68
7887 19:59:53.838064 [Byte1]: 68
7888 19:59:53.842190
7889 19:59:53.842696 Set Vref, RX VrefLevel [Byte0]: 69
7890 19:59:53.845500 [Byte1]: 69
7891 19:59:53.850153
7892 19:59:53.850846 Set Vref, RX VrefLevel [Byte0]: 70
7893 19:59:53.852719 [Byte1]: 70
7894 19:59:53.857076
7895 19:59:53.857791 Set Vref, RX VrefLevel [Byte0]: 71
7896 19:59:53.860520 [Byte1]: 71
7897 19:59:53.864374
7898 19:59:53.864909 Set Vref, RX VrefLevel [Byte0]: 72
7899 19:59:53.867945 [Byte1]: 72
7900 19:59:53.872375
7901 19:59:53.872794 Set Vref, RX VrefLevel [Byte0]: 73
7902 19:59:53.875521 [Byte1]: 73
7903 19:59:53.880002
7904 19:59:53.880405 Final RX Vref Byte 0 = 57 to rank0
7905 19:59:53.883122 Final RX Vref Byte 1 = 62 to rank0
7906 19:59:53.886430 Final RX Vref Byte 0 = 57 to rank1
7907 19:59:53.889816 Final RX Vref Byte 1 = 62 to rank1==
7908 19:59:53.893024 Dram Type= 6, Freq= 0, CH_0, rank 0
7909 19:59:53.899527 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7910 19:59:53.900075 ==
7911 19:59:53.900514 DQS Delay:
7912 19:59:53.900921 DQS0 = 0, DQS1 = 0
7913 19:59:53.903189 DQM Delay:
7914 19:59:53.903610 DQM0 = 134, DQM1 = 127
7915 19:59:53.906328 DQ Delay:
7916 19:59:53.909256 DQ0 =134, DQ1 =138, DQ2 =134, DQ3 =130
7917 19:59:53.912894 DQ4 =134, DQ5 =124, DQ6 =138, DQ7 =140
7918 19:59:53.916426 DQ8 =116, DQ9 =118, DQ10 =130, DQ11 =120
7919 19:59:53.919602 DQ12 =132, DQ13 =132, DQ14 =138, DQ15 =136
7920 19:59:53.920210
7921 19:59:53.920749
7922 19:59:53.921238
7923 19:59:53.922699 [DramC_TX_OE_Calibration] TA2
7924 19:59:53.925969 Original DQ_B0 (3 6) =30, OEN = 27
7925 19:59:53.929308 Original DQ_B1 (3 6) =30, OEN = 27
7926 19:59:53.932987 24, 0x0, End_B0=24 End_B1=24
7927 19:59:53.933407 25, 0x0, End_B0=25 End_B1=25
7928 19:59:53.936045 26, 0x0, End_B0=26 End_B1=26
7929 19:59:53.939383 27, 0x0, End_B0=27 End_B1=27
7930 19:59:53.943047 28, 0x0, End_B0=28 End_B1=28
7931 19:59:53.946698 29, 0x0, End_B0=29 End_B1=29
7932 19:59:53.947208 30, 0x0, End_B0=30 End_B1=30
7933 19:59:53.949598 31, 0x4545, End_B0=30 End_B1=30
7934 19:59:53.953195 Byte0 end_step=30 best_step=27
7935 19:59:53.956614 Byte1 end_step=30 best_step=27
7936 19:59:53.960086 Byte0 TX OE(2T, 0.5T) = (3, 3)
7937 19:59:53.963086 Byte1 TX OE(2T, 0.5T) = (3, 3)
7938 19:59:53.963605
7939 19:59:53.964088
7940 19:59:53.969960 [DQSOSCAuto] RK0, (LSB)MR18= 0x2521, (MSB)MR19= 0x303, tDQSOscB0 = 393 ps tDQSOscB1 = 391 ps
7941 19:59:53.972817 CH0 RK0: MR19=303, MR18=2521
7942 19:59:53.978960 CH0_RK0: MR19=0x303, MR18=0x2521, DQSOSC=391, MR23=63, INC=24, DEC=16
7943 19:59:53.979386
7944 19:59:53.982638 ----->DramcWriteLeveling(PI) begin...
7945 19:59:53.983054 ==
7946 19:59:53.985911 Dram Type= 6, Freq= 0, CH_0, rank 1
7947 19:59:53.989093 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7948 19:59:53.989500 ==
7949 19:59:53.993120 Write leveling (Byte 0): 37 => 37
7950 19:59:53.996073 Write leveling (Byte 1): 28 => 28
7951 19:59:53.999302 DramcWriteLeveling(PI) end<-----
7952 19:59:53.999859
7953 19:59:54.000196 ==
7954 19:59:54.003162 Dram Type= 6, Freq= 0, CH_0, rank 1
7955 19:59:54.006216 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7956 19:59:54.006732 ==
7957 19:59:54.009190 [Gating] SW mode calibration
7958 19:59:54.016019 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7959 19:59:54.022653 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7960 19:59:54.026339 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7961 19:59:54.029464 1 4 4 | B1->B0 | 2323 2626 | 0 1 | (0 0) (0 0)
7962 19:59:54.035864 1 4 8 | B1->B0 | 2323 2525 | 0 1 | (0 0) (0 0)
7963 19:59:54.039591 1 4 12 | B1->B0 | 2323 2d2d | 0 0 | (0 0) (0 0)
7964 19:59:54.042775 1 4 16 | B1->B0 | 2e2e 3636 | 0 0 | (0 0) (1 1)
7965 19:59:54.049336 1 4 20 | B1->B0 | 3434 3535 | 1 1 | (1 1) (1 1)
7966 19:59:54.052425 1 4 24 | B1->B0 | 3434 3636 | 1 1 | (1 1) (1 1)
7967 19:59:54.055431 1 4 28 | B1->B0 | 3434 3636 | 1 0 | (1 1) (1 1)
7968 19:59:54.062365 1 5 0 | B1->B0 | 3434 3636 | 1 0 | (1 1) (0 0)
7969 19:59:54.065702 1 5 4 | B1->B0 | 3434 3838 | 1 1 | (1 1) (0 0)
7970 19:59:54.069503 1 5 8 | B1->B0 | 3434 3535 | 1 1 | (1 1) (1 1)
7971 19:59:54.075407 1 5 12 | B1->B0 | 3434 3232 | 1 1 | (1 0) (1 0)
7972 19:59:54.078995 1 5 16 | B1->B0 | 2b2b 2525 | 1 1 | (1 0) (1 0)
7973 19:59:54.082430 1 5 20 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
7974 19:59:54.088911 1 5 24 | B1->B0 | 2323 2c2c | 0 0 | (0 0) (1 1)
7975 19:59:54.092806 1 5 28 | B1->B0 | 2323 2727 | 0 0 | (0 0) (1 1)
7976 19:59:54.096025 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7977 19:59:54.102194 1 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7978 19:59:54.105645 1 6 8 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
7979 19:59:54.108509 1 6 12 | B1->B0 | 2424 3736 | 0 1 | (0 0) (0 0)
7980 19:59:54.115813 1 6 16 | B1->B0 | 3f3f 4646 | 1 0 | (0 0) (0 0)
7981 19:59:54.119071 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7982 19:59:54.122073 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7983 19:59:54.128347 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7984 19:59:54.131805 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7985 19:59:54.135826 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7986 19:59:54.142273 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7987 19:59:54.145256 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
7988 19:59:54.149114 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
7989 19:59:54.155792 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7990 19:59:54.159044 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7991 19:59:54.162131 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7992 19:59:54.168092 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7993 19:59:54.171751 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7994 19:59:54.175135 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7995 19:59:54.178261 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7996 19:59:54.185188 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7997 19:59:54.188391 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7998 19:59:54.192275 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7999 19:59:54.198735 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8000 19:59:54.201970 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8001 19:59:54.205731 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8002 19:59:54.212032 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8003 19:59:54.215251 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8004 19:59:54.218871 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8005 19:59:54.225354 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8006 19:59:54.225896 Total UI for P1: 0, mck2ui 16
8007 19:59:54.231626 best dqsien dly found for B0: ( 1, 9, 14)
8008 19:59:54.232087 Total UI for P1: 0, mck2ui 16
8009 19:59:54.235421 best dqsien dly found for B1: ( 1, 9, 14)
8010 19:59:54.242309 best DQS0 dly(MCK, UI, PI) = (1, 9, 14)
8011 19:59:54.245123 best DQS1 dly(MCK, UI, PI) = (1, 9, 14)
8012 19:59:54.245531
8013 19:59:54.249104 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 14)
8014 19:59:54.252166 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 14)
8015 19:59:54.255478 [Gating] SW calibration Done
8016 19:59:54.256062 ==
8017 19:59:54.259030 Dram Type= 6, Freq= 0, CH_0, rank 1
8018 19:59:54.261860 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8019 19:59:54.262295 ==
8020 19:59:54.265355 RX Vref Scan: 0
8021 19:59:54.265861
8022 19:59:54.266188 RX Vref 0 -> 0, step: 1
8023 19:59:54.266495
8024 19:59:54.268806 RX Delay 0 -> 252, step: 8
8025 19:59:54.272021 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8026 19:59:54.278928 iDelay=200, Bit 1, Center 139 (88 ~ 191) 104
8027 19:59:54.282077 iDelay=200, Bit 2, Center 135 (80 ~ 191) 112
8028 19:59:54.285368 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
8029 19:59:54.288397 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
8030 19:59:54.291511 iDelay=200, Bit 5, Center 127 (72 ~ 183) 112
8031 19:59:54.295443 iDelay=200, Bit 6, Center 143 (88 ~ 199) 112
8032 19:59:54.301840 iDelay=200, Bit 7, Center 143 (88 ~ 199) 112
8033 19:59:54.305675 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
8034 19:59:54.308263 iDelay=200, Bit 9, Center 119 (64 ~ 175) 112
8035 19:59:54.312488 iDelay=200, Bit 10, Center 127 (72 ~ 183) 112
8036 19:59:54.315524 iDelay=200, Bit 11, Center 123 (72 ~ 175) 104
8037 19:59:54.321844 iDelay=200, Bit 12, Center 135 (80 ~ 191) 112
8038 19:59:54.325331 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
8039 19:59:54.328337 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
8040 19:59:54.331491 iDelay=200, Bit 15, Center 139 (88 ~ 191) 104
8041 19:59:54.331925 ==
8042 19:59:54.334825 Dram Type= 6, Freq= 0, CH_0, rank 1
8043 19:59:54.341625 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8044 19:59:54.342039 ==
8045 19:59:54.342367 DQS Delay:
8046 19:59:54.345067 DQS0 = 0, DQS1 = 0
8047 19:59:54.345475 DQM Delay:
8048 19:59:54.348363 DQM0 = 137, DQM1 = 129
8049 19:59:54.348766 DQ Delay:
8050 19:59:54.351445 DQ0 =135, DQ1 =139, DQ2 =135, DQ3 =135
8051 19:59:54.354730 DQ4 =139, DQ5 =127, DQ6 =143, DQ7 =143
8052 19:59:54.358407 DQ8 =119, DQ9 =119, DQ10 =127, DQ11 =123
8053 19:59:54.361516 DQ12 =135, DQ13 =135, DQ14 =139, DQ15 =139
8054 19:59:54.361947
8055 19:59:54.362383
8056 19:59:54.362795 ==
8057 19:59:54.365065 Dram Type= 6, Freq= 0, CH_0, rank 1
8058 19:59:54.371275 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8059 19:59:54.371744 ==
8060 19:59:54.372178
8061 19:59:54.372587
8062 19:59:54.372986 TX Vref Scan disable
8063 19:59:54.375064 == TX Byte 0 ==
8064 19:59:54.378150 Update DQ dly =993 (3 ,6, 33) DQ OEN =(3 ,3)
8065 19:59:54.381298 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
8066 19:59:54.384992 == TX Byte 1 ==
8067 19:59:54.387944 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8068 19:59:54.391334 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8069 19:59:54.394799 ==
8070 19:59:54.398662 Dram Type= 6, Freq= 0, CH_0, rank 1
8071 19:59:54.401902 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8072 19:59:54.402444 ==
8073 19:59:54.414843
8074 19:59:54.418853 TX Vref early break, caculate TX vref
8075 19:59:54.421765 TX Vref=16, minBit 3, minWin=23, winSum=386
8076 19:59:54.424949 TX Vref=18, minBit 1, minWin=24, winSum=397
8077 19:59:54.428564 TX Vref=20, minBit 1, minWin=23, winSum=402
8078 19:59:54.431843 TX Vref=22, minBit 3, minWin=24, winSum=412
8079 19:59:54.435073 TX Vref=24, minBit 1, minWin=25, winSum=418
8080 19:59:54.441892 TX Vref=26, minBit 1, minWin=25, winSum=429
8081 19:59:54.445244 TX Vref=28, minBit 3, minWin=25, winSum=425
8082 19:59:54.448579 TX Vref=30, minBit 3, minWin=25, winSum=416
8083 19:59:54.451719 TX Vref=32, minBit 4, minWin=24, winSum=409
8084 19:59:54.455435 TX Vref=34, minBit 1, minWin=24, winSum=406
8085 19:59:54.461328 [TxChooseVref] Worse bit 1, Min win 25, Win sum 429, Final Vref 26
8086 19:59:54.461860
8087 19:59:54.464632 Final TX Range 0 Vref 26
8088 19:59:54.465129
8089 19:59:54.465476 ==
8090 19:59:54.467951 Dram Type= 6, Freq= 0, CH_0, rank 1
8091 19:59:54.471752 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8092 19:59:54.472264 ==
8093 19:59:54.472595
8094 19:59:54.472895
8095 19:59:54.474464 TX Vref Scan disable
8096 19:59:54.481151 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =290/100 ps
8097 19:59:54.481702 == TX Byte 0 ==
8098 19:59:54.484786 u2DelayCellOfst[0]=13 cells (4 PI)
8099 19:59:54.487876 u2DelayCellOfst[1]=16 cells (5 PI)
8100 19:59:54.491129 u2DelayCellOfst[2]=13 cells (4 PI)
8101 19:59:54.494614 u2DelayCellOfst[3]=10 cells (3 PI)
8102 19:59:54.498316 u2DelayCellOfst[4]=10 cells (3 PI)
8103 19:59:54.501195 u2DelayCellOfst[5]=0 cells (0 PI)
8104 19:59:54.505115 u2DelayCellOfst[6]=16 cells (5 PI)
8105 19:59:54.508410 u2DelayCellOfst[7]=16 cells (5 PI)
8106 19:59:54.511695 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
8107 19:59:54.515184 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
8108 19:59:54.517852 == TX Byte 1 ==
8109 19:59:54.518355 u2DelayCellOfst[8]=3 cells (1 PI)
8110 19:59:54.521278 u2DelayCellOfst[9]=0 cells (0 PI)
8111 19:59:54.525106 u2DelayCellOfst[10]=6 cells (2 PI)
8112 19:59:54.528296 u2DelayCellOfst[11]=3 cells (1 PI)
8113 19:59:54.531248 u2DelayCellOfst[12]=10 cells (3 PI)
8114 19:59:54.534696 u2DelayCellOfst[13]=13 cells (4 PI)
8115 19:59:54.538495 u2DelayCellOfst[14]=16 cells (5 PI)
8116 19:59:54.541657 u2DelayCellOfst[15]=10 cells (3 PI)
8117 19:59:54.544414 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8118 19:59:54.551425 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8119 19:59:54.551986 DramC Write-DBI on
8120 19:59:54.552318 ==
8121 19:59:54.554773 Dram Type= 6, Freq= 0, CH_0, rank 1
8122 19:59:54.557906 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8123 19:59:54.561237 ==
8124 19:59:54.561740
8125 19:59:54.562069
8126 19:59:54.562373 TX Vref Scan disable
8127 19:59:54.564712 == TX Byte 0 ==
8128 19:59:54.568261 Update DQM dly =737 (2 ,6, 33) DQM OEN =(3 ,3)
8129 19:59:54.571529 == TX Byte 1 ==
8130 19:59:54.574576 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8131 19:59:54.578050 DramC Write-DBI off
8132 19:59:54.578459
8133 19:59:54.578786 [DATLAT]
8134 19:59:54.579086 Freq=1600, CH0 RK1
8135 19:59:54.579384
8136 19:59:54.581238 DATLAT Default: 0xf
8137 19:59:54.581649 0, 0xFFFF, sum = 0
8138 19:59:54.584329 1, 0xFFFF, sum = 0
8139 19:59:54.584746 2, 0xFFFF, sum = 0
8140 19:59:54.587627 3, 0xFFFF, sum = 0
8141 19:59:54.590989 4, 0xFFFF, sum = 0
8142 19:59:54.591417 5, 0xFFFF, sum = 0
8143 19:59:54.594691 6, 0xFFFF, sum = 0
8144 19:59:54.595215 7, 0xFFFF, sum = 0
8145 19:59:54.598306 8, 0xFFFF, sum = 0
8146 19:59:54.598825 9, 0xFFFF, sum = 0
8147 19:59:54.601486 10, 0xFFFF, sum = 0
8148 19:59:54.601916 11, 0xFFFF, sum = 0
8149 19:59:54.604244 12, 0xFFFF, sum = 0
8150 19:59:54.604672 13, 0xFFFF, sum = 0
8151 19:59:54.607888 14, 0x0, sum = 1
8152 19:59:54.608437 15, 0x0, sum = 2
8153 19:59:54.611393 16, 0x0, sum = 3
8154 19:59:54.611954 17, 0x0, sum = 4
8155 19:59:54.614481 best_step = 15
8156 19:59:54.614997
8157 19:59:54.615438 ==
8158 19:59:54.617575 Dram Type= 6, Freq= 0, CH_0, rank 1
8159 19:59:54.621625 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8160 19:59:54.622151 ==
8161 19:59:54.622595 RX Vref Scan: 0
8162 19:59:54.624473
8163 19:59:54.624985 RX Vref 0 -> 0, step: 1
8164 19:59:54.625422
8165 19:59:54.627508 RX Delay 19 -> 252, step: 4
8166 19:59:54.631135 iDelay=191, Bit 0, Center 134 (83 ~ 186) 104
8167 19:59:54.637435 iDelay=191, Bit 1, Center 138 (91 ~ 186) 96
8168 19:59:54.641389 iDelay=191, Bit 2, Center 130 (79 ~ 182) 104
8169 19:59:54.644623 iDelay=191, Bit 3, Center 134 (83 ~ 186) 104
8170 19:59:54.647776 iDelay=191, Bit 4, Center 136 (87 ~ 186) 100
8171 19:59:54.650932 iDelay=191, Bit 5, Center 124 (71 ~ 178) 108
8172 19:59:54.657756 iDelay=191, Bit 6, Center 140 (91 ~ 190) 100
8173 19:59:54.660840 iDelay=191, Bit 7, Center 140 (91 ~ 190) 100
8174 19:59:54.664139 iDelay=191, Bit 8, Center 118 (67 ~ 170) 104
8175 19:59:54.667760 iDelay=191, Bit 9, Center 116 (67 ~ 166) 100
8176 19:59:54.671222 iDelay=191, Bit 10, Center 128 (75 ~ 182) 108
8177 19:59:54.677675 iDelay=191, Bit 11, Center 118 (67 ~ 170) 104
8178 19:59:54.680808 iDelay=191, Bit 12, Center 134 (83 ~ 186) 104
8179 19:59:54.684004 iDelay=191, Bit 13, Center 134 (83 ~ 186) 104
8180 19:59:54.687150 iDelay=191, Bit 14, Center 134 (83 ~ 186) 104
8181 19:59:54.690792 iDelay=191, Bit 15, Center 136 (87 ~ 186) 100
8182 19:59:54.694178 ==
8183 19:59:54.697231 Dram Type= 6, Freq= 0, CH_0, rank 1
8184 19:59:54.700862 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8185 19:59:54.701275 ==
8186 19:59:54.701599 DQS Delay:
8187 19:59:54.704016 DQS0 = 0, DQS1 = 0
8188 19:59:54.704423 DQM Delay:
8189 19:59:54.707621 DQM0 = 134, DQM1 = 127
8190 19:59:54.708055 DQ Delay:
8191 19:59:54.710630 DQ0 =134, DQ1 =138, DQ2 =130, DQ3 =134
8192 19:59:54.713778 DQ4 =136, DQ5 =124, DQ6 =140, DQ7 =140
8193 19:59:54.717945 DQ8 =118, DQ9 =116, DQ10 =128, DQ11 =118
8194 19:59:54.720804 DQ12 =134, DQ13 =134, DQ14 =134, DQ15 =136
8195 19:59:54.721234
8196 19:59:54.721666
8197 19:59:54.722078
8198 19:59:54.724181 [DramC_TX_OE_Calibration] TA2
8199 19:59:54.727874 Original DQ_B0 (3 6) =30, OEN = 27
8200 19:59:54.730743 Original DQ_B1 (3 6) =30, OEN = 27
8201 19:59:54.734056 24, 0x0, End_B0=24 End_B1=24
8202 19:59:54.737380 25, 0x0, End_B0=25 End_B1=25
8203 19:59:54.737817 26, 0x0, End_B0=26 End_B1=26
8204 19:59:54.740521 27, 0x0, End_B0=27 End_B1=27
8205 19:59:54.744075 28, 0x0, End_B0=28 End_B1=28
8206 19:59:54.747544 29, 0x0, End_B0=29 End_B1=29
8207 19:59:54.748117 30, 0x0, End_B0=30 End_B1=30
8208 19:59:54.750317 31, 0x4141, End_B0=30 End_B1=30
8209 19:59:54.753622 Byte0 end_step=30 best_step=27
8210 19:59:54.757607 Byte1 end_step=30 best_step=27
8211 19:59:54.760429 Byte0 TX OE(2T, 0.5T) = (3, 3)
8212 19:59:54.764124 Byte1 TX OE(2T, 0.5T) = (3, 3)
8213 19:59:54.764638
8214 19:59:54.765076
8215 19:59:54.770658 [DQSOSCAuto] RK1, (LSB)MR18= 0x2109, (MSB)MR19= 0x303, tDQSOscB0 = 405 ps tDQSOscB1 = 393 ps
8216 19:59:54.774018 CH0 RK1: MR19=303, MR18=2109
8217 19:59:54.780863 CH0_RK1: MR19=0x303, MR18=0x2109, DQSOSC=393, MR23=63, INC=23, DEC=15
8218 19:59:54.783973 [RxdqsGatingPostProcess] freq 1600
8219 19:59:54.787391 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8220 19:59:54.790496 best DQS0 dly(2T, 0.5T) = (1, 1)
8221 19:59:54.794416 best DQS1 dly(2T, 0.5T) = (1, 1)
8222 19:59:54.797225 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8223 19:59:54.800315 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8224 19:59:54.804137 best DQS0 dly(2T, 0.5T) = (1, 1)
8225 19:59:54.806828 best DQS1 dly(2T, 0.5T) = (1, 1)
8226 19:59:54.810404 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8227 19:59:54.813971 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8228 19:59:54.817278 Pre-setting of DQS Precalculation
8229 19:59:54.821012 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
8230 19:59:54.821550 ==
8231 19:59:54.823891 Dram Type= 6, Freq= 0, CH_1, rank 0
8232 19:59:54.827429 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8233 19:59:54.830466 ==
8234 19:59:54.834280 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8235 19:59:54.837525 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8236 19:59:54.844156 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8237 19:59:54.850410 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8238 19:59:54.857960 [CA 0] Center 42 (12~72) winsize 61
8239 19:59:54.860834 [CA 1] Center 42 (12~72) winsize 61
8240 19:59:54.863884 [CA 2] Center 39 (10~68) winsize 59
8241 19:59:54.867697 [CA 3] Center 38 (10~67) winsize 58
8242 19:59:54.870925 [CA 4] Center 38 (9~68) winsize 60
8243 19:59:54.874222 [CA 5] Center 37 (8~67) winsize 60
8244 19:59:54.874747
8245 19:59:54.877578 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8246 19:59:54.878148
8247 19:59:54.880493 [CATrainingPosCal] consider 1 rank data
8248 19:59:54.883989 u2DelayCellTimex100 = 290/100 ps
8249 19:59:54.890677 CA0 delay=42 (12~72),Diff = 5 PI (16 cell)
8250 19:59:54.894271 CA1 delay=42 (12~72),Diff = 5 PI (16 cell)
8251 19:59:54.897244 CA2 delay=39 (10~68),Diff = 2 PI (6 cell)
8252 19:59:54.900455 CA3 delay=38 (10~67),Diff = 1 PI (3 cell)
8253 19:59:54.904460 CA4 delay=38 (9~68),Diff = 1 PI (3 cell)
8254 19:59:54.907549 CA5 delay=37 (8~67),Diff = 0 PI (0 cell)
8255 19:59:54.908021
8256 19:59:54.910879 CA PerBit enable=1, Macro0, CA PI delay=37
8257 19:59:54.911399
8258 19:59:54.913906 [CBTSetCACLKResult] CA Dly = 37
8259 19:59:54.917490 CS Dly: 10 (0~41)
8260 19:59:54.920662 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8261 19:59:54.924100 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8262 19:59:54.924504 ==
8263 19:59:54.927586 Dram Type= 6, Freq= 0, CH_1, rank 1
8264 19:59:54.930826 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8265 19:59:54.934172 ==
8266 19:59:54.937949 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8267 19:59:54.940734 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8268 19:59:54.947479 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8269 19:59:54.951037 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8270 19:59:54.961097 [CA 0] Center 42 (12~72) winsize 61
8271 19:59:54.964610 [CA 1] Center 42 (13~72) winsize 60
8272 19:59:54.967670 [CA 2] Center 39 (10~68) winsize 59
8273 19:59:54.970896 [CA 3] Center 38 (8~68) winsize 61
8274 19:59:54.974738 [CA 4] Center 38 (8~68) winsize 61
8275 19:59:54.977491 [CA 5] Center 37 (8~67) winsize 60
8276 19:59:54.977916
8277 19:59:54.980775 [CmdBusTrainingLP45] Vref(ca) range 0: 30
8278 19:59:54.981277
8279 19:59:54.984638 [CATrainingPosCal] consider 2 rank data
8280 19:59:54.987783 u2DelayCellTimex100 = 290/100 ps
8281 19:59:54.994666 CA0 delay=42 (12~72),Diff = 5 PI (16 cell)
8282 19:59:54.997791 CA1 delay=42 (13~72),Diff = 5 PI (16 cell)
8283 19:59:55.001149 CA2 delay=39 (10~68),Diff = 2 PI (6 cell)
8284 19:59:55.004228 CA3 delay=38 (10~67),Diff = 1 PI (3 cell)
8285 19:59:55.007872 CA4 delay=38 (9~68),Diff = 1 PI (3 cell)
8286 19:59:55.011150 CA5 delay=37 (8~67),Diff = 0 PI (0 cell)
8287 19:59:55.011717
8288 19:59:55.014405 CA PerBit enable=1, Macro0, CA PI delay=37
8289 19:59:55.014812
8290 19:59:55.017792 [CBTSetCACLKResult] CA Dly = 37
8291 19:59:55.021105 CS Dly: 11 (0~44)
8292 19:59:55.024297 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8293 19:59:55.027558 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8294 19:59:55.027996
8295 19:59:55.030935 ----->DramcWriteLeveling(PI) begin...
8296 19:59:55.031342 ==
8297 19:59:55.034388 Dram Type= 6, Freq= 0, CH_1, rank 0
8298 19:59:55.040916 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8299 19:59:55.041325 ==
8300 19:59:55.044063 Write leveling (Byte 0): 25 => 25
8301 19:59:55.044468 Write leveling (Byte 1): 27 => 27
8302 19:59:55.047971 DramcWriteLeveling(PI) end<-----
8303 19:59:55.048472
8304 19:59:55.048792 ==
8305 19:59:55.050696 Dram Type= 6, Freq= 0, CH_1, rank 0
8306 19:59:55.057533 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8307 19:59:55.057942 ==
8308 19:59:55.061393 [Gating] SW mode calibration
8309 19:59:55.067306 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8310 19:59:55.071025 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8311 19:59:55.077768 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8312 19:59:55.080939 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8313 19:59:55.083940 1 4 8 | B1->B0 | 2323 2e2e | 0 0 | (0 0) (0 0)
8314 19:59:55.088178 1 4 12 | B1->B0 | 3131 3434 | 1 1 | (1 1) (1 1)
8315 19:59:55.094750 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8316 19:59:55.097609 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8317 19:59:55.100939 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8318 19:59:55.107411 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8319 19:59:55.111000 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8320 19:59:55.113874 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8321 19:59:55.121122 1 5 8 | B1->B0 | 3434 2f2f | 0 0 | (1 0) (0 1)
8322 19:59:55.124168 1 5 12 | B1->B0 | 2a2a 2323 | 1 0 | (1 0) (0 0)
8323 19:59:55.127787 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8324 19:59:55.133939 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8325 19:59:55.137693 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8326 19:59:55.140710 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8327 19:59:55.147701 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8328 19:59:55.150804 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8329 19:59:55.154255 1 6 8 | B1->B0 | 2a2a 4242 | 0 0 | (0 0) (0 0)
8330 19:59:55.160861 1 6 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8331 19:59:55.164363 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8332 19:59:55.167842 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8333 19:59:55.173629 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8334 19:59:55.177453 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8335 19:59:55.180723 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8336 19:59:55.187870 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8337 19:59:55.190637 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8338 19:59:55.194049 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8339 19:59:55.200261 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
8340 19:59:55.203989 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8341 19:59:55.207467 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8342 19:59:55.213836 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8343 19:59:55.217247 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8344 19:59:55.220107 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8345 19:59:55.227504 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8346 19:59:55.230473 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8347 19:59:55.234096 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8348 19:59:55.236922 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8349 19:59:55.244026 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8350 19:59:55.247281 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8351 19:59:55.250780 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8352 19:59:55.257306 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8353 19:59:55.260520 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8354 19:59:55.264006 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8355 19:59:55.270736 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8356 19:59:55.273758 Total UI for P1: 0, mck2ui 16
8357 19:59:55.276803 best dqsien dly found for B0: ( 1, 9, 10)
8358 19:59:55.277212 Total UI for P1: 0, mck2ui 16
8359 19:59:55.283568 best dqsien dly found for B1: ( 1, 9, 12)
8360 19:59:55.287092 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
8361 19:59:55.290022 best DQS1 dly(MCK, UI, PI) = (1, 9, 12)
8362 19:59:55.290620
8363 19:59:55.293727 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
8364 19:59:55.296798 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 12)
8365 19:59:55.299968 [Gating] SW calibration Done
8366 19:59:55.300455 ==
8367 19:59:55.303834 Dram Type= 6, Freq= 0, CH_1, rank 0
8368 19:59:55.307101 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8369 19:59:55.307625 ==
8370 19:59:55.310229 RX Vref Scan: 0
8371 19:59:55.310749
8372 19:59:55.311188 RX Vref 0 -> 0, step: 1
8373 19:59:55.314106
8374 19:59:55.314628 RX Delay 0 -> 252, step: 8
8375 19:59:55.317202 iDelay=200, Bit 0, Center 139 (88 ~ 191) 104
8376 19:59:55.323811 iDelay=200, Bit 1, Center 131 (80 ~ 183) 104
8377 19:59:55.327017 iDelay=200, Bit 2, Center 123 (72 ~ 175) 104
8378 19:59:55.329999 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
8379 19:59:55.334053 iDelay=200, Bit 4, Center 135 (88 ~ 183) 96
8380 19:59:55.336921 iDelay=200, Bit 5, Center 151 (104 ~ 199) 96
8381 19:59:55.343839 iDelay=200, Bit 6, Center 147 (96 ~ 199) 104
8382 19:59:55.346950 iDelay=200, Bit 7, Center 135 (80 ~ 191) 112
8383 19:59:55.350216 iDelay=200, Bit 8, Center 123 (72 ~ 175) 104
8384 19:59:55.353602 iDelay=200, Bit 9, Center 123 (72 ~ 175) 104
8385 19:59:55.357070 iDelay=200, Bit 10, Center 131 (80 ~ 183) 104
8386 19:59:55.363480 iDelay=200, Bit 11, Center 127 (80 ~ 175) 96
8387 19:59:55.366949 iDelay=200, Bit 12, Center 139 (88 ~ 191) 104
8388 19:59:55.369976 iDelay=200, Bit 13, Center 139 (88 ~ 191) 104
8389 19:59:55.373360 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
8390 19:59:55.376779 iDelay=200, Bit 15, Center 139 (88 ~ 191) 104
8391 19:59:55.380102 ==
8392 19:59:55.383366 Dram Type= 6, Freq= 0, CH_1, rank 0
8393 19:59:55.386401 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8394 19:59:55.386892 ==
8395 19:59:55.387231 DQS Delay:
8396 19:59:55.390079 DQS0 = 0, DQS1 = 0
8397 19:59:55.390660 DQM Delay:
8398 19:59:55.393296 DQM0 = 137, DQM1 = 132
8399 19:59:55.393823 DQ Delay:
8400 19:59:55.396458 DQ0 =139, DQ1 =131, DQ2 =123, DQ3 =135
8401 19:59:55.400027 DQ4 =135, DQ5 =151, DQ6 =147, DQ7 =135
8402 19:59:55.402976 DQ8 =123, DQ9 =123, DQ10 =131, DQ11 =127
8403 19:59:55.406948 DQ12 =139, DQ13 =139, DQ14 =139, DQ15 =139
8404 19:59:55.407356
8405 19:59:55.407739
8406 19:59:55.408054 ==
8407 19:59:55.409955 Dram Type= 6, Freq= 0, CH_1, rank 0
8408 19:59:55.416499 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8409 19:59:55.417002 ==
8410 19:59:55.417328
8411 19:59:55.417629
8412 19:59:55.417917 TX Vref Scan disable
8413 19:59:55.420342 == TX Byte 0 ==
8414 19:59:55.423337 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8415 19:59:55.427384 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8416 19:59:55.430157 == TX Byte 1 ==
8417 19:59:55.433609 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
8418 19:59:55.437124 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8419 19:59:55.440486 ==
8420 19:59:55.443572 Dram Type= 6, Freq= 0, CH_1, rank 0
8421 19:59:55.446744 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8422 19:59:55.447259 ==
8423 19:59:55.460144
8424 19:59:55.462936 TX Vref early break, caculate TX vref
8425 19:59:55.466944 TX Vref=16, minBit 1, minWin=22, winSum=374
8426 19:59:55.470013 TX Vref=18, minBit 1, minWin=23, winSum=386
8427 19:59:55.472971 TX Vref=20, minBit 6, minWin=23, winSum=398
8428 19:59:55.476885 TX Vref=22, minBit 0, minWin=24, winSum=405
8429 19:59:55.479844 TX Vref=24, minBit 0, minWin=25, winSum=416
8430 19:59:55.486730 TX Vref=26, minBit 0, minWin=25, winSum=427
8431 19:59:55.489883 TX Vref=28, minBit 0, minWin=25, winSum=426
8432 19:59:55.493207 TX Vref=30, minBit 2, minWin=25, winSum=420
8433 19:59:55.496316 TX Vref=32, minBit 0, minWin=24, winSum=413
8434 19:59:55.499813 TX Vref=34, minBit 0, minWin=24, winSum=406
8435 19:59:55.503171 TX Vref=36, minBit 2, minWin=23, winSum=391
8436 19:59:55.510091 [TxChooseVref] Worse bit 0, Min win 25, Win sum 427, Final Vref 26
8437 19:59:55.510614
8438 19:59:55.513079 Final TX Range 0 Vref 26
8439 19:59:55.513594
8440 19:59:55.514021 ==
8441 19:59:55.516955 Dram Type= 6, Freq= 0, CH_1, rank 0
8442 19:59:55.519482 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8443 19:59:55.519953 ==
8444 19:59:55.520288
8445 19:59:55.520592
8446 19:59:55.522754 TX Vref Scan disable
8447 19:59:55.530044 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =290/100 ps
8448 19:59:55.530560 == TX Byte 0 ==
8449 19:59:55.533310 u2DelayCellOfst[0]=13 cells (4 PI)
8450 19:59:55.536542 u2DelayCellOfst[1]=6 cells (2 PI)
8451 19:59:55.539991 u2DelayCellOfst[2]=0 cells (0 PI)
8452 19:59:55.542940 u2DelayCellOfst[3]=6 cells (2 PI)
8453 19:59:55.546960 u2DelayCellOfst[4]=6 cells (2 PI)
8454 19:59:55.550183 u2DelayCellOfst[5]=16 cells (5 PI)
8455 19:59:55.553012 u2DelayCellOfst[6]=16 cells (5 PI)
8456 19:59:55.556013 u2DelayCellOfst[7]=6 cells (2 PI)
8457 19:59:55.560000 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
8458 19:59:55.563027 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8459 19:59:55.566553 == TX Byte 1 ==
8460 19:59:55.567055 u2DelayCellOfst[8]=0 cells (0 PI)
8461 19:59:55.569391 u2DelayCellOfst[9]=3 cells (1 PI)
8462 19:59:55.572590 u2DelayCellOfst[10]=13 cells (4 PI)
8463 19:59:55.575993 u2DelayCellOfst[11]=3 cells (1 PI)
8464 19:59:55.579404 u2DelayCellOfst[12]=13 cells (4 PI)
8465 19:59:55.582607 u2DelayCellOfst[13]=16 cells (5 PI)
8466 19:59:55.585739 u2DelayCellOfst[14]=16 cells (5 PI)
8467 19:59:55.589792 u2DelayCellOfst[15]=16 cells (5 PI)
8468 19:59:55.592420 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8469 19:59:55.599154 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8470 19:59:55.599680 DramC Write-DBI on
8471 19:59:55.600020 ==
8472 19:59:55.602716 Dram Type= 6, Freq= 0, CH_1, rank 0
8473 19:59:55.609189 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8474 19:59:55.609704 ==
8475 19:59:55.610032
8476 19:59:55.610333
8477 19:59:55.610623 TX Vref Scan disable
8478 19:59:55.613307 == TX Byte 0 ==
8479 19:59:55.615954 Update DQM dly =721 (2 ,6, 17) DQM OEN =(3 ,3)
8480 19:59:55.619753 == TX Byte 1 ==
8481 19:59:55.623066 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8482 19:59:55.626709 DramC Write-DBI off
8483 19:59:55.627233
8484 19:59:55.627562 [DATLAT]
8485 19:59:55.627935 Freq=1600, CH1 RK0
8486 19:59:55.628239
8487 19:59:55.629454 DATLAT Default: 0xf
8488 19:59:55.629863 0, 0xFFFF, sum = 0
8489 19:59:55.633165 1, 0xFFFF, sum = 0
8490 19:59:55.633581 2, 0xFFFF, sum = 0
8491 19:59:55.636616 3, 0xFFFF, sum = 0
8492 19:59:55.639537 4, 0xFFFF, sum = 0
8493 19:59:55.640088 5, 0xFFFF, sum = 0
8494 19:59:55.643007 6, 0xFFFF, sum = 0
8495 19:59:55.643530 7, 0xFFFF, sum = 0
8496 19:59:55.646504 8, 0xFFFF, sum = 0
8497 19:59:55.647026 9, 0xFFFF, sum = 0
8498 19:59:55.649473 10, 0xFFFF, sum = 0
8499 19:59:55.649891 11, 0xFFFF, sum = 0
8500 19:59:55.652924 12, 0xFFFF, sum = 0
8501 19:59:55.653343 13, 0xFFFF, sum = 0
8502 19:59:55.656208 14, 0x0, sum = 1
8503 19:59:55.656629 15, 0x0, sum = 2
8504 19:59:55.659710 16, 0x0, sum = 3
8505 19:59:55.660238 17, 0x0, sum = 4
8506 19:59:55.663236 best_step = 15
8507 19:59:55.663789
8508 19:59:55.664121 ==
8509 19:59:55.666653 Dram Type= 6, Freq= 0, CH_1, rank 0
8510 19:59:55.669907 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8511 19:59:55.670433 ==
8512 19:59:55.670762 RX Vref Scan: 1
8513 19:59:55.672990
8514 19:59:55.673501 Set Vref Range= 24 -> 127
8515 19:59:55.673830
8516 19:59:55.676124 RX Vref 24 -> 127, step: 1
8517 19:59:55.676538
8518 19:59:55.679573 RX Delay 27 -> 252, step: 4
8519 19:59:55.680018
8520 19:59:55.682774 Set Vref, RX VrefLevel [Byte0]: 24
8521 19:59:55.685945 [Byte1]: 24
8522 19:59:55.686353
8523 19:59:55.690058 Set Vref, RX VrefLevel [Byte0]: 25
8524 19:59:55.693077 [Byte1]: 25
8525 19:59:55.693674
8526 19:59:55.696486 Set Vref, RX VrefLevel [Byte0]: 26
8527 19:59:55.699275 [Byte1]: 26
8528 19:59:55.703260
8529 19:59:55.703823 Set Vref, RX VrefLevel [Byte0]: 27
8530 19:59:55.706795 [Byte1]: 27
8531 19:59:55.710601
8532 19:59:55.711113 Set Vref, RX VrefLevel [Byte0]: 28
8533 19:59:55.714091 [Byte1]: 28
8534 19:59:55.718410
8535 19:59:55.718935 Set Vref, RX VrefLevel [Byte0]: 29
8536 19:59:55.721594 [Byte1]: 29
8537 19:59:55.725948
8538 19:59:55.726473 Set Vref, RX VrefLevel [Byte0]: 30
8539 19:59:55.729319 [Byte1]: 30
8540 19:59:55.733381
8541 19:59:55.733899 Set Vref, RX VrefLevel [Byte0]: 31
8542 19:59:55.736554 [Byte1]: 31
8543 19:59:55.741135
8544 19:59:55.741647 Set Vref, RX VrefLevel [Byte0]: 32
8545 19:59:55.744120 [Byte1]: 32
8546 19:59:55.748438
8547 19:59:55.748959 Set Vref, RX VrefLevel [Byte0]: 33
8548 19:59:55.751783 [Byte1]: 33
8549 19:59:55.755680
8550 19:59:55.756108 Set Vref, RX VrefLevel [Byte0]: 34
8551 19:59:55.759530 [Byte1]: 34
8552 19:59:55.763011
8553 19:59:55.763495 Set Vref, RX VrefLevel [Byte0]: 35
8554 19:59:55.766560 [Byte1]: 35
8555 19:59:55.771218
8556 19:59:55.771746 Set Vref, RX VrefLevel [Byte0]: 36
8557 19:59:55.773920 [Byte1]: 36
8558 19:59:55.778542
8559 19:59:55.779115 Set Vref, RX VrefLevel [Byte0]: 37
8560 19:59:55.781602 [Byte1]: 37
8561 19:59:55.786288
8562 19:59:55.786864 Set Vref, RX VrefLevel [Byte0]: 38
8563 19:59:55.789237 [Byte1]: 38
8564 19:59:55.793479
8565 19:59:55.794044 Set Vref, RX VrefLevel [Byte0]: 39
8566 19:59:55.796366 [Byte1]: 39
8567 19:59:55.801224
8568 19:59:55.801734 Set Vref, RX VrefLevel [Byte0]: 40
8569 19:59:55.804139 [Byte1]: 40
8570 19:59:55.808375
8571 19:59:55.808791 Set Vref, RX VrefLevel [Byte0]: 41
8572 19:59:55.811711 [Byte1]: 41
8573 19:59:55.815948
8574 19:59:55.816354 Set Vref, RX VrefLevel [Byte0]: 42
8575 19:59:55.819573 [Byte1]: 42
8576 19:59:55.823459
8577 19:59:55.823901 Set Vref, RX VrefLevel [Byte0]: 43
8578 19:59:55.826944 [Byte1]: 43
8579 19:59:55.831121
8580 19:59:55.831695 Set Vref, RX VrefLevel [Byte0]: 44
8581 19:59:55.834353 [Byte1]: 44
8582 19:59:55.838271
8583 19:59:55.838682 Set Vref, RX VrefLevel [Byte0]: 45
8584 19:59:55.841721 [Byte1]: 45
8585 19:59:55.846428
8586 19:59:55.846912 Set Vref, RX VrefLevel [Byte0]: 46
8587 19:59:55.849611 [Byte1]: 46
8588 19:59:55.853601
8589 19:59:55.854085 Set Vref, RX VrefLevel [Byte0]: 47
8590 19:59:55.856736 [Byte1]: 47
8591 19:59:55.861212
8592 19:59:55.861691 Set Vref, RX VrefLevel [Byte0]: 48
8593 19:59:55.864317 [Byte1]: 48
8594 19:59:55.868435
8595 19:59:55.868867 Set Vref, RX VrefLevel [Byte0]: 49
8596 19:59:55.872265 [Byte1]: 49
8597 19:59:55.876080
8598 19:59:55.876505 Set Vref, RX VrefLevel [Byte0]: 50
8599 19:59:55.879627 [Byte1]: 50
8600 19:59:55.883678
8601 19:59:55.884115 Set Vref, RX VrefLevel [Byte0]: 51
8602 19:59:55.886892 [Byte1]: 51
8603 19:59:55.891303
8604 19:59:55.891750 Set Vref, RX VrefLevel [Byte0]: 52
8605 19:59:55.894560 [Byte1]: 52
8606 19:59:55.898631
8607 19:59:55.899042 Set Vref, RX VrefLevel [Byte0]: 53
8608 19:59:55.902199 [Byte1]: 53
8609 19:59:55.906243
8610 19:59:55.906688 Set Vref, RX VrefLevel [Byte0]: 54
8611 19:59:55.909638 [Byte1]: 54
8612 19:59:55.913912
8613 19:59:55.914323 Set Vref, RX VrefLevel [Byte0]: 55
8614 19:59:55.917277 [Byte1]: 55
8615 19:59:55.921771
8616 19:59:55.922182 Set Vref, RX VrefLevel [Byte0]: 56
8617 19:59:55.924886 [Byte1]: 56
8618 19:59:55.928627
8619 19:59:55.929034 Set Vref, RX VrefLevel [Byte0]: 57
8620 19:59:55.932425 [Byte1]: 57
8621 19:59:55.936764
8622 19:59:55.937245 Set Vref, RX VrefLevel [Byte0]: 58
8623 19:59:55.940062 [Byte1]: 58
8624 19:59:55.944111
8625 19:59:55.944518 Set Vref, RX VrefLevel [Byte0]: 59
8626 19:59:55.947570 [Byte1]: 59
8627 19:59:55.951713
8628 19:59:55.952126 Set Vref, RX VrefLevel [Byte0]: 60
8629 19:59:55.954793 [Byte1]: 60
8630 19:59:55.959205
8631 19:59:55.959616 Set Vref, RX VrefLevel [Byte0]: 61
8632 19:59:55.962255 [Byte1]: 61
8633 19:59:55.966500
8634 19:59:55.966910 Set Vref, RX VrefLevel [Byte0]: 62
8635 19:59:55.970122 [Byte1]: 62
8636 19:59:55.973741
8637 19:59:55.974151 Set Vref, RX VrefLevel [Byte0]: 63
8638 19:59:55.977516 [Byte1]: 63
8639 19:59:55.981333
8640 19:59:55.981744 Set Vref, RX VrefLevel [Byte0]: 64
8641 19:59:55.984993 [Byte1]: 64
8642 19:59:55.988837
8643 19:59:55.989147 Set Vref, RX VrefLevel [Byte0]: 65
8644 19:59:55.992528 [Byte1]: 65
8645 19:59:55.996169
8646 19:59:55.996347 Set Vref, RX VrefLevel [Byte0]: 66
8647 19:59:56.000048 [Byte1]: 66
8648 19:59:56.003678
8649 19:59:56.003897 Set Vref, RX VrefLevel [Byte0]: 67
8650 19:59:56.007447 [Byte1]: 67
8651 19:59:56.011584
8652 19:59:56.011757 Set Vref, RX VrefLevel [Byte0]: 68
8653 19:59:56.015267 [Byte1]: 68
8654 19:59:56.019180
8655 19:59:56.019386 Set Vref, RX VrefLevel [Byte0]: 69
8656 19:59:56.022694 [Byte1]: 69
8657 19:59:56.026912
8658 19:59:56.027118 Set Vref, RX VrefLevel [Byte0]: 70
8659 19:59:56.029922 [Byte1]: 70
8660 19:59:56.034345
8661 19:59:56.034558 Set Vref, RX VrefLevel [Byte0]: 71
8662 19:59:56.037565 [Byte1]: 71
8663 19:59:56.041719
8664 19:59:56.041932 Set Vref, RX VrefLevel [Byte0]: 72
8665 19:59:56.045111 [Byte1]: 72
8666 19:59:56.049333
8667 19:59:56.049573 Set Vref, RX VrefLevel [Byte0]: 73
8668 19:59:56.052644 [Byte1]: 73
8669 19:59:56.056940
8670 19:59:56.057281 Set Vref, RX VrefLevel [Byte0]: 74
8671 19:59:56.060128 [Byte1]: 74
8672 19:59:56.064819
8673 19:59:56.065315 Set Vref, RX VrefLevel [Byte0]: 75
8674 19:59:56.067512 [Byte1]: 75
8675 19:59:56.072079
8676 19:59:56.072670 Final RX Vref Byte 0 = 57 to rank0
8677 19:59:56.075982 Final RX Vref Byte 1 = 57 to rank0
8678 19:59:56.079174 Final RX Vref Byte 0 = 57 to rank1
8679 19:59:56.082101 Final RX Vref Byte 1 = 57 to rank1==
8680 19:59:56.085838 Dram Type= 6, Freq= 0, CH_1, rank 0
8681 19:59:56.092271 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8682 19:59:56.092716 ==
8683 19:59:56.093049 DQS Delay:
8684 19:59:56.093352 DQS0 = 0, DQS1 = 0
8685 19:59:56.095285 DQM Delay:
8686 19:59:56.095771 DQM0 = 134, DQM1 = 131
8687 19:59:56.098464 DQ Delay:
8688 19:59:56.102717 DQ0 =140, DQ1 =128, DQ2 =124, DQ3 =130
8689 19:59:56.105467 DQ4 =132, DQ5 =144, DQ6 =142, DQ7 =132
8690 19:59:56.109058 DQ8 =116, DQ9 =122, DQ10 =132, DQ11 =124
8691 19:59:56.111802 DQ12 =138, DQ13 =140, DQ14 =140, DQ15 =140
8692 19:59:56.112213
8693 19:59:56.112542
8694 19:59:56.112960
8695 19:59:56.115524 [DramC_TX_OE_Calibration] TA2
8696 19:59:56.118887 Original DQ_B0 (3 6) =30, OEN = 27
8697 19:59:56.121969 Original DQ_B1 (3 6) =30, OEN = 27
8698 19:59:56.125266 24, 0x0, End_B0=24 End_B1=24
8699 19:59:56.125682 25, 0x0, End_B0=25 End_B1=25
8700 19:59:56.128975 26, 0x0, End_B0=26 End_B1=26
8701 19:59:56.131926 27, 0x0, End_B0=27 End_B1=27
8702 19:59:56.135559 28, 0x0, End_B0=28 End_B1=28
8703 19:59:56.136027 29, 0x0, End_B0=29 End_B1=29
8704 19:59:56.138723 30, 0x0, End_B0=30 End_B1=30
8705 19:59:56.142418 31, 0x5151, End_B0=30 End_B1=30
8706 19:59:56.145959 Byte0 end_step=30 best_step=27
8707 19:59:56.148894 Byte1 end_step=30 best_step=27
8708 19:59:56.152365 Byte0 TX OE(2T, 0.5T) = (3, 3)
8709 19:59:56.152880 Byte1 TX OE(2T, 0.5T) = (3, 3)
8710 19:59:56.153214
8711 19:59:56.155584
8712 19:59:56.162564 [DQSOSCAuto] RK0, (LSB)MR18= 0x1522, (MSB)MR19= 0x303, tDQSOscB0 = 392 ps tDQSOscB1 = 399 ps
8713 19:59:56.165661 CH1 RK0: MR19=303, MR18=1522
8714 19:59:56.172441 CH1_RK0: MR19=0x303, MR18=0x1522, DQSOSC=392, MR23=63, INC=24, DEC=16
8715 19:59:56.172959
8716 19:59:56.175772 ----->DramcWriteLeveling(PI) begin...
8717 19:59:56.176319 ==
8718 19:59:56.178667 Dram Type= 6, Freq= 0, CH_1, rank 1
8719 19:59:56.182387 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8720 19:59:56.182798 ==
8721 19:59:56.185381 Write leveling (Byte 0): 25 => 25
8722 19:59:56.188796 Write leveling (Byte 1): 28 => 28
8723 19:59:56.191896 DramcWriteLeveling(PI) end<-----
8724 19:59:56.192308
8725 19:59:56.192637 ==
8726 19:59:56.195464 Dram Type= 6, Freq= 0, CH_1, rank 1
8727 19:59:56.199129 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8728 19:59:56.199779 ==
8729 19:59:56.202346 [Gating] SW mode calibration
8730 19:59:56.208319 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8731 19:59:56.215246 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8732 19:59:56.218577 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8733 19:59:56.222396 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8734 19:59:56.228820 1 4 8 | B1->B0 | 2828 2323 | 1 0 | (1 1) (0 0)
8735 19:59:56.232272 1 4 12 | B1->B0 | 3434 2e2e | 1 1 | (1 1) (1 1)
8736 19:59:56.235259 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8737 19:59:56.242552 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8738 19:59:56.245495 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8739 19:59:56.248977 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8740 19:59:56.255277 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8741 19:59:56.258830 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 1)
8742 19:59:56.261933 1 5 8 | B1->B0 | 3434 3434 | 0 1 | (0 1) (1 0)
8743 19:59:56.268535 1 5 12 | B1->B0 | 2323 2d2d | 0 0 | (0 0) (0 1)
8744 19:59:56.272264 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
8745 19:59:56.275476 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8746 19:59:56.278564 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8747 19:59:56.285073 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8748 19:59:56.288538 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8749 19:59:56.292106 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8750 19:59:56.298583 1 6 8 | B1->B0 | 3131 2323 | 0 0 | (0 0) (0 0)
8751 19:59:56.302379 1 6 12 | B1->B0 | 4646 4545 | 0 0 | (0 0) (0 0)
8752 19:59:56.305032 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8753 19:59:56.311896 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8754 19:59:56.315060 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8755 19:59:56.318164 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8756 19:59:56.325082 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8757 19:59:56.328320 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8758 19:59:56.331549 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
8759 19:59:56.338492 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
8760 19:59:56.342245 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
8761 19:59:56.345472 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8762 19:59:56.351540 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8763 19:59:56.355631 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8764 19:59:56.358359 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8765 19:59:56.365186 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8766 19:59:56.368288 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8767 19:59:56.371924 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8768 19:59:56.378425 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8769 19:59:56.381449 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8770 19:59:56.385305 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8771 19:59:56.388460 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8772 19:59:56.394733 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8773 19:59:56.398068 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
8774 19:59:56.401536 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8775 19:59:56.408244 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
8776 19:59:56.411421 Total UI for P1: 0, mck2ui 16
8777 19:59:56.414578 best dqsien dly found for B1: ( 1, 9, 6)
8778 19:59:56.418178 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8779 19:59:56.421284 Total UI for P1: 0, mck2ui 16
8780 19:59:56.424988 best dqsien dly found for B0: ( 1, 9, 10)
8781 19:59:56.428269 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
8782 19:59:56.431895 best DQS1 dly(MCK, UI, PI) = (1, 9, 6)
8783 19:59:56.432310
8784 19:59:56.435325 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
8785 19:59:56.438934 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 6)
8786 19:59:56.442161 [Gating] SW calibration Done
8787 19:59:56.442670 ==
8788 19:59:56.445606 Dram Type= 6, Freq= 0, CH_1, rank 1
8789 19:59:56.448462 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8790 19:59:56.451884 ==
8791 19:59:56.452296 RX Vref Scan: 0
8792 19:59:56.452621
8793 19:59:56.455230 RX Vref 0 -> 0, step: 1
8794 19:59:56.455669
8795 19:59:56.456006 RX Delay 0 -> 252, step: 8
8796 19:59:56.461619 iDelay=208, Bit 0, Center 139 (88 ~ 191) 104
8797 19:59:56.464700 iDelay=208, Bit 1, Center 135 (80 ~ 191) 112
8798 19:59:56.468530 iDelay=208, Bit 2, Center 123 (72 ~ 175) 104
8799 19:59:56.471665 iDelay=208, Bit 3, Center 131 (80 ~ 183) 104
8800 19:59:56.478109 iDelay=208, Bit 4, Center 131 (80 ~ 183) 104
8801 19:59:56.481322 iDelay=208, Bit 5, Center 151 (96 ~ 207) 112
8802 19:59:56.485036 iDelay=208, Bit 6, Center 143 (88 ~ 199) 112
8803 19:59:56.488155 iDelay=208, Bit 7, Center 135 (80 ~ 191) 112
8804 19:59:56.491726 iDelay=208, Bit 8, Center 119 (64 ~ 175) 112
8805 19:59:56.494632 iDelay=208, Bit 9, Center 119 (64 ~ 175) 112
8806 19:59:56.501491 iDelay=208, Bit 10, Center 135 (80 ~ 191) 112
8807 19:59:56.504792 iDelay=208, Bit 11, Center 127 (72 ~ 183) 112
8808 19:59:56.508196 iDelay=208, Bit 12, Center 143 (88 ~ 199) 112
8809 19:59:56.511634 iDelay=208, Bit 13, Center 143 (88 ~ 199) 112
8810 19:59:56.517946 iDelay=208, Bit 14, Center 139 (88 ~ 191) 104
8811 19:59:56.522112 iDelay=208, Bit 15, Center 143 (88 ~ 199) 112
8812 19:59:56.522634 ==
8813 19:59:56.525198 Dram Type= 6, Freq= 0, CH_1, rank 1
8814 19:59:56.527962 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8815 19:59:56.528385 ==
8816 19:59:56.528714 DQS Delay:
8817 19:59:56.531704 DQS0 = 0, DQS1 = 0
8818 19:59:56.532120 DQM Delay:
8819 19:59:56.534887 DQM0 = 136, DQM1 = 133
8820 19:59:56.535298 DQ Delay:
8821 19:59:56.538021 DQ0 =139, DQ1 =135, DQ2 =123, DQ3 =131
8822 19:59:56.541472 DQ4 =131, DQ5 =151, DQ6 =143, DQ7 =135
8823 19:59:56.545199 DQ8 =119, DQ9 =119, DQ10 =135, DQ11 =127
8824 19:59:56.551340 DQ12 =143, DQ13 =143, DQ14 =139, DQ15 =143
8825 19:59:56.551904
8826 19:59:56.552241
8827 19:59:56.552549 ==
8828 19:59:56.555258 Dram Type= 6, Freq= 0, CH_1, rank 1
8829 19:59:56.558199 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8830 19:59:56.558722 ==
8831 19:59:56.559057
8832 19:59:56.559361
8833 19:59:56.561716 TX Vref Scan disable
8834 19:59:56.562228 == TX Byte 0 ==
8835 19:59:56.568416 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8836 19:59:56.571203 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8837 19:59:56.571854 == TX Byte 1 ==
8838 19:59:56.578278 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8839 19:59:56.581208 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8840 19:59:56.581655 ==
8841 19:59:56.584365 Dram Type= 6, Freq= 0, CH_1, rank 1
8842 19:59:56.588302 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8843 19:59:56.588835 ==
8844 19:59:56.602562
8845 19:59:56.606442 TX Vref early break, caculate TX vref
8846 19:59:56.609386 TX Vref=16, minBit 0, minWin=23, winSum=384
8847 19:59:56.613195 TX Vref=18, minBit 0, minWin=23, winSum=393
8848 19:59:56.615874 TX Vref=20, minBit 0, minWin=23, winSum=400
8849 19:59:56.619311 TX Vref=22, minBit 1, minWin=24, winSum=409
8850 19:59:56.623031 TX Vref=24, minBit 6, minWin=24, winSum=417
8851 19:59:56.629513 TX Vref=26, minBit 6, minWin=25, winSum=424
8852 19:59:56.632387 TX Vref=28, minBit 0, minWin=25, winSum=426
8853 19:59:56.636312 TX Vref=30, minBit 1, minWin=25, winSum=418
8854 19:59:56.639250 TX Vref=32, minBit 0, minWin=24, winSum=409
8855 19:59:56.642311 TX Vref=34, minBit 0, minWin=24, winSum=404
8856 19:59:56.646481 TX Vref=36, minBit 0, minWin=24, winSum=400
8857 19:59:56.652362 [TxChooseVref] Worse bit 0, Min win 25, Win sum 426, Final Vref 28
8858 19:59:56.652775
8859 19:59:56.656414 Final TX Range 0 Vref 28
8860 19:59:56.656924
8861 19:59:56.657257 ==
8862 19:59:56.659220 Dram Type= 6, Freq= 0, CH_1, rank 1
8863 19:59:56.662662 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8864 19:59:56.663173 ==
8865 19:59:56.663507
8866 19:59:56.663854
8867 19:59:56.666443 TX Vref Scan disable
8868 19:59:56.672604 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =290/100 ps
8869 19:59:56.673108 == TX Byte 0 ==
8870 19:59:56.676344 u2DelayCellOfst[0]=16 cells (5 PI)
8871 19:59:56.679088 u2DelayCellOfst[1]=10 cells (3 PI)
8872 19:59:56.682459 u2DelayCellOfst[2]=0 cells (0 PI)
8873 19:59:56.685739 u2DelayCellOfst[3]=6 cells (2 PI)
8874 19:59:56.688974 u2DelayCellOfst[4]=10 cells (3 PI)
8875 19:59:56.692493 u2DelayCellOfst[5]=16 cells (5 PI)
8876 19:59:56.695720 u2DelayCellOfst[6]=16 cells (5 PI)
8877 19:59:56.699017 u2DelayCellOfst[7]=6 cells (2 PI)
8878 19:59:56.702319 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8879 19:59:56.705696 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8880 19:59:56.709354 == TX Byte 1 ==
8881 19:59:56.709856 u2DelayCellOfst[8]=0 cells (0 PI)
8882 19:59:56.712292 u2DelayCellOfst[9]=3 cells (1 PI)
8883 19:59:56.715958 u2DelayCellOfst[10]=10 cells (3 PI)
8884 19:59:56.718995 u2DelayCellOfst[11]=3 cells (1 PI)
8885 19:59:56.722634 u2DelayCellOfst[12]=13 cells (4 PI)
8886 19:59:56.725835 u2DelayCellOfst[13]=16 cells (5 PI)
8887 19:59:56.729357 u2DelayCellOfst[14]=16 cells (5 PI)
8888 19:59:56.732267 u2DelayCellOfst[15]=16 cells (5 PI)
8889 19:59:56.735278 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8890 19:59:56.742085 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8891 19:59:56.742596 DramC Write-DBI on
8892 19:59:56.742923 ==
8893 19:59:56.746084 Dram Type= 6, Freq= 0, CH_1, rank 1
8894 19:59:56.749228 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8895 19:59:56.752399 ==
8896 19:59:56.752905
8897 19:59:56.753233
8898 19:59:56.753533 TX Vref Scan disable
8899 19:59:56.756030 == TX Byte 0 ==
8900 19:59:56.759708 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8901 19:59:56.762987 == TX Byte 1 ==
8902 19:59:56.765865 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8903 19:59:56.769426 DramC Write-DBI off
8904 19:59:56.769929
8905 19:59:56.770254 [DATLAT]
8906 19:59:56.770557 Freq=1600, CH1 RK1
8907 19:59:56.770851
8908 19:59:56.772270 DATLAT Default: 0xf
8909 19:59:56.772680 0, 0xFFFF, sum = 0
8910 19:59:56.775800 1, 0xFFFF, sum = 0
8911 19:59:56.779427 2, 0xFFFF, sum = 0
8912 19:59:56.779995 3, 0xFFFF, sum = 0
8913 19:59:56.782461 4, 0xFFFF, sum = 0
8914 19:59:56.782934 5, 0xFFFF, sum = 0
8915 19:59:56.785628 6, 0xFFFF, sum = 0
8916 19:59:56.786040 7, 0xFFFF, sum = 0
8917 19:59:56.788868 8, 0xFFFF, sum = 0
8918 19:59:56.789382 9, 0xFFFF, sum = 0
8919 19:59:56.792420 10, 0xFFFF, sum = 0
8920 19:59:56.792931 11, 0xFFFF, sum = 0
8921 19:59:56.795550 12, 0xFFFF, sum = 0
8922 19:59:56.796146 13, 0xFFFF, sum = 0
8923 19:59:56.798972 14, 0x0, sum = 1
8924 19:59:56.799515 15, 0x0, sum = 2
8925 19:59:56.802295 16, 0x0, sum = 3
8926 19:59:56.802815 17, 0x0, sum = 4
8927 19:59:56.805901 best_step = 15
8928 19:59:56.806403
8929 19:59:56.806731 ==
8930 19:59:56.808805 Dram Type= 6, Freq= 0, CH_1, rank 1
8931 19:59:56.812476 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8932 19:59:56.812885 ==
8933 19:59:56.813211 RX Vref Scan: 0
8934 19:59:56.815431
8935 19:59:56.816067 RX Vref 0 -> 0, step: 1
8936 19:59:56.816416
8937 19:59:56.818968 RX Delay 19 -> 252, step: 4
8938 19:59:56.822423 iDelay=195, Bit 0, Center 138 (91 ~ 186) 96
8939 19:59:56.829351 iDelay=195, Bit 1, Center 128 (79 ~ 178) 100
8940 19:59:56.832283 iDelay=195, Bit 2, Center 122 (71 ~ 174) 104
8941 19:59:56.835550 iDelay=195, Bit 3, Center 130 (83 ~ 178) 96
8942 19:59:56.838792 iDelay=195, Bit 4, Center 130 (83 ~ 178) 96
8943 19:59:56.842027 iDelay=195, Bit 5, Center 146 (99 ~ 194) 96
8944 19:59:56.848284 iDelay=195, Bit 6, Center 144 (95 ~ 194) 100
8945 19:59:56.852073 iDelay=195, Bit 7, Center 134 (83 ~ 186) 104
8946 19:59:56.855352 iDelay=195, Bit 8, Center 116 (63 ~ 170) 108
8947 19:59:56.858331 iDelay=195, Bit 9, Center 118 (67 ~ 170) 104
8948 19:59:56.862058 iDelay=195, Bit 10, Center 132 (83 ~ 182) 100
8949 19:59:56.868584 iDelay=195, Bit 11, Center 124 (71 ~ 178) 108
8950 19:59:56.871796 iDelay=195, Bit 12, Center 140 (87 ~ 194) 108
8951 19:59:56.875517 iDelay=195, Bit 13, Center 138 (87 ~ 190) 104
8952 19:59:56.878672 iDelay=195, Bit 14, Center 136 (87 ~ 186) 100
8953 19:59:56.881517 iDelay=195, Bit 15, Center 138 (87 ~ 190) 104
8954 19:59:56.885309 ==
8955 19:59:56.888500 Dram Type= 6, Freq= 0, CH_1, rank 1
8956 19:59:56.891948 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8957 19:59:56.892460 ==
8958 19:59:56.892789 DQS Delay:
8959 19:59:56.895695 DQS0 = 0, DQS1 = 0
8960 19:59:56.896394 DQM Delay:
8961 19:59:56.898243 DQM0 = 134, DQM1 = 130
8962 19:59:56.898652 DQ Delay:
8963 19:59:56.901397 DQ0 =138, DQ1 =128, DQ2 =122, DQ3 =130
8964 19:59:56.905137 DQ4 =130, DQ5 =146, DQ6 =144, DQ7 =134
8965 19:59:56.908001 DQ8 =116, DQ9 =118, DQ10 =132, DQ11 =124
8966 19:59:56.911392 DQ12 =140, DQ13 =138, DQ14 =136, DQ15 =138
8967 19:59:56.911947
8968 19:59:56.912277
8969 19:59:56.912584
8970 19:59:56.914979 [DramC_TX_OE_Calibration] TA2
8971 19:59:56.917931 Original DQ_B0 (3 6) =30, OEN = 27
8972 19:59:56.921892 Original DQ_B1 (3 6) =30, OEN = 27
8973 19:59:56.925144 24, 0x0, End_B0=24 End_B1=24
8974 19:59:56.928021 25, 0x0, End_B0=25 End_B1=25
8975 19:59:56.928438 26, 0x0, End_B0=26 End_B1=26
8976 19:59:56.931129 27, 0x0, End_B0=27 End_B1=27
8977 19:59:56.935050 28, 0x0, End_B0=28 End_B1=28
8978 19:59:56.938168 29, 0x0, End_B0=29 End_B1=29
8979 19:59:56.941569 30, 0x0, End_B0=30 End_B1=30
8980 19:59:56.942080 31, 0x4141, End_B0=30 End_B1=30
8981 19:59:56.945207 Byte0 end_step=30 best_step=27
8982 19:59:56.948312 Byte1 end_step=30 best_step=27
8983 19:59:56.951542 Byte0 TX OE(2T, 0.5T) = (3, 3)
8984 19:59:56.955039 Byte1 TX OE(2T, 0.5T) = (3, 3)
8985 19:59:56.955449
8986 19:59:56.955815
8987 19:59:56.961434 [DQSOSCAuto] RK1, (LSB)MR18= 0x2207, (MSB)MR19= 0x303, tDQSOscB0 = 406 ps tDQSOscB1 = 392 ps
8988 19:59:56.964739 CH1 RK1: MR19=303, MR18=2207
8989 19:59:56.971496 CH1_RK1: MR19=0x303, MR18=0x2207, DQSOSC=392, MR23=63, INC=24, DEC=16
8990 19:59:56.974936 [RxdqsGatingPostProcess] freq 1600
8991 19:59:56.981072 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8992 19:59:56.981485 best DQS0 dly(2T, 0.5T) = (1, 1)
8993 19:59:56.984572 best DQS1 dly(2T, 0.5T) = (1, 1)
8994 19:59:56.988295 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8995 19:59:56.991789 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8996 19:59:56.995001 best DQS0 dly(2T, 0.5T) = (1, 1)
8997 19:59:56.997981 best DQS1 dly(2T, 0.5T) = (1, 1)
8998 19:59:57.001361 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8999 19:59:57.004481 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9000 19:59:57.007765 Pre-setting of DQS Precalculation
9001 19:59:57.011305 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
9002 19:59:57.017802 sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0
9003 19:59:57.028107 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9004 19:59:57.028599
9005 19:59:57.028924
9006 19:59:57.031148 [Calibration Summary] 3200 Mbps
9007 19:59:57.031561 CH 0, Rank 0
9008 19:59:57.034678 SW Impedance : PASS
9009 19:59:57.035184 DUTY Scan : NO K
9010 19:59:57.037906 ZQ Calibration : PASS
9011 19:59:57.041739 Jitter Meter : NO K
9012 19:59:57.042246 CBT Training : PASS
9013 19:59:57.044337 Write leveling : PASS
9014 19:59:57.048072 RX DQS gating : PASS
9015 19:59:57.048484 RX DQ/DQS(RDDQC) : PASS
9016 19:59:57.051128 TX DQ/DQS : PASS
9017 19:59:57.051541 RX DATLAT : PASS
9018 19:59:57.054894 RX DQ/DQS(Engine): PASS
9019 19:59:57.057599 TX OE : PASS
9020 19:59:57.058097 All Pass.
9021 19:59:57.058429
9022 19:59:57.058734 CH 0, Rank 1
9023 19:59:57.061584 SW Impedance : PASS
9024 19:59:57.064597 DUTY Scan : NO K
9025 19:59:57.065104 ZQ Calibration : PASS
9026 19:59:57.067880 Jitter Meter : NO K
9027 19:59:57.070991 CBT Training : PASS
9028 19:59:57.071511 Write leveling : PASS
9029 19:59:57.074686 RX DQS gating : PASS
9030 19:59:57.077878 RX DQ/DQS(RDDQC) : PASS
9031 19:59:57.078389 TX DQ/DQS : PASS
9032 19:59:57.080740 RX DATLAT : PASS
9033 19:59:57.084309 RX DQ/DQS(Engine): PASS
9034 19:59:57.084764 TX OE : PASS
9035 19:59:57.087094 All Pass.
9036 19:59:57.087504
9037 19:59:57.087887 CH 1, Rank 0
9038 19:59:57.091105 SW Impedance : PASS
9039 19:59:57.091614 DUTY Scan : NO K
9040 19:59:57.094179 ZQ Calibration : PASS
9041 19:59:57.097148 Jitter Meter : NO K
9042 19:59:57.097561 CBT Training : PASS
9043 19:59:57.100733 Write leveling : PASS
9044 19:59:57.104067 RX DQS gating : PASS
9045 19:59:57.104473 RX DQ/DQS(RDDQC) : PASS
9046 19:59:57.107185 TX DQ/DQS : PASS
9047 19:59:57.107597 RX DATLAT : PASS
9048 19:59:57.110911 RX DQ/DQS(Engine): PASS
9049 19:59:57.114080 TX OE : PASS
9050 19:59:57.114601 All Pass.
9051 19:59:57.114931
9052 19:59:57.115305 CH 1, Rank 1
9053 19:59:57.118120 SW Impedance : PASS
9054 19:59:57.120370 DUTY Scan : NO K
9055 19:59:57.120783 ZQ Calibration : PASS
9056 19:59:57.124358 Jitter Meter : NO K
9057 19:59:57.127081 CBT Training : PASS
9058 19:59:57.127478 Write leveling : PASS
9059 19:59:57.130613 RX DQS gating : PASS
9060 19:59:57.134318 RX DQ/DQS(RDDQC) : PASS
9061 19:59:57.134824 TX DQ/DQS : PASS
9062 19:59:57.137413 RX DATLAT : PASS
9063 19:59:57.140578 RX DQ/DQS(Engine): PASS
9064 19:59:57.140985 TX OE : PASS
9065 19:59:57.144155 All Pass.
9066 19:59:57.144661
9067 19:59:57.144987 DramC Write-DBI on
9068 19:59:57.147260 PER_BANK_REFRESH: Hybrid Mode
9069 19:59:57.147804 TX_TRACKING: ON
9070 19:59:57.157366 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0
9071 19:59:57.167684 sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1
9072 19:59:57.173603 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9073 19:59:57.177463 [FAST_K] Save calibration result to emmc
9074 19:59:57.180400 sync common calibartion params.
9075 19:59:57.180810 sync cbt_mode0:1, 1:1
9076 19:59:57.183386 dram_init: ddr_geometry: 2
9077 19:59:57.187277 dram_init: ddr_geometry: 2
9078 19:59:57.187736 dram_init: ddr_geometry: 2
9079 19:59:57.190395 0:dram_rank_size:100000000
9080 19:59:57.193564 1:dram_rank_size:100000000
9081 19:59:57.200453 sync rank num:2, rank0_size:0x100000000, rank1_size:0x100000000
9082 19:59:57.200974 DFS_SHUFFLE_HW_MODE: ON
9083 19:59:57.203763 dramc_set_vcore_voltage set vcore to 725000
9084 19:59:57.206776 Read voltage for 1600, 0
9085 19:59:57.207188 Vio18 = 0
9086 19:59:57.210311 Vcore = 725000
9087 19:59:57.210719 Vdram = 0
9088 19:59:57.211041 Vddq = 0
9089 19:59:57.213702 Vmddr = 0
9090 19:59:57.214206 switch to 3200 Mbps bootup
9091 19:59:57.217098 [DramcRunTimeConfig]
9092 19:59:57.217609 PHYPLL
9093 19:59:57.220177 DPM_CONTROL_AFTERK: ON
9094 19:59:57.220580 PER_BANK_REFRESH: ON
9095 19:59:57.223915 REFRESH_OVERHEAD_REDUCTION: ON
9096 19:59:57.227310 CMD_PICG_NEW_MODE: OFF
9097 19:59:57.227876 XRTWTW_NEW_MODE: ON
9098 19:59:57.230613 XRTRTR_NEW_MODE: ON
9099 19:59:57.231138 TX_TRACKING: ON
9100 19:59:57.233999 RDSEL_TRACKING: OFF
9101 19:59:57.236878 DQS Precalculation for DVFS: ON
9102 19:59:57.237311 RX_TRACKING: OFF
9103 19:59:57.240190 HW_GATING DBG: ON
9104 19:59:57.240598 ZQCS_ENABLE_LP4: ON
9105 19:59:57.243391 RX_PICG_NEW_MODE: ON
9106 19:59:57.243827 TX_PICG_NEW_MODE: ON
9107 19:59:57.247524 ENABLE_RX_DCM_DPHY: ON
9108 19:59:57.250257 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
9109 19:59:57.253669 DUMMY_READ_FOR_TRACKING: OFF
9110 19:59:57.254174 !!! SPM_CONTROL_AFTERK: OFF
9111 19:59:57.256733 !!! SPM could not control APHY
9112 19:59:57.260601 IMPEDANCE_TRACKING: ON
9113 19:59:57.261106 TEMP_SENSOR: ON
9114 19:59:57.263585 HW_SAVE_FOR_SR: OFF
9115 19:59:57.267556 CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF
9116 19:59:57.270817 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF
9117 19:59:57.271324 Read ODT Tracking: ON
9118 19:59:57.273627 Refresh Rate DeBounce: ON
9119 19:59:57.277660 DFS_NO_QUEUE_FLUSH: ON
9120 19:59:57.280361 DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF
9121 19:59:57.280773 ENABLE_DFS_RUNTIME_MRW: OFF
9122 19:59:57.283317 DDR_RESERVE_NEW_MODE: ON
9123 19:59:57.286604 MR_CBT_SWITCH_FREQ: ON
9124 19:59:57.287009 =========================
9125 19:59:57.306870 [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)
9126 19:59:57.310373 dram_init: ddr_geometry: 2
9127 19:59:57.328568 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
9128 19:59:57.332145 dram_init: dram init end (result: 0)
9129 19:59:57.338872 DRAM-K: Full calibration passed in 24444 msecs
9130 19:59:57.341694 MRC: failed to locate region type 0.
9131 19:59:57.342104 DRAM rank0 size:0x100000000,
9132 19:59:57.345455 DRAM rank1 size=0x100000000
9133 19:59:57.355300 Mapping address range [0x40000000:0x240000000) as cacheable | read-write | non-secure | normal
9134 19:59:57.361854 Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal
9135 19:59:57.368036 Backing address range [0x40000000:0x80000000) with new page table @0x00112000
9136 19:59:57.375262 Backing address range [0x40000000:0x40200000) with new page table @0x00113000
9137 19:59:57.378321 DRAM rank0 size:0x100000000,
9138 19:59:57.381742 DRAM rank1 size=0x100000000
9139 19:59:57.382176 CBMEM:
9140 19:59:57.384832 IMD: root @ 0xfffff000 254 entries.
9141 19:59:57.387942 IMD: root @ 0xffffec00 62 entries.
9142 19:59:57.391998 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
9143 19:59:57.395191 WARNING: RO_VPD is uninitialized or empty.
9144 19:59:57.401390 FMAP: area RW_VPD found @ 577000 (16384 bytes)
9145 19:59:57.408212 CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80
9146 19:59:57.421687 read SPI 0x42894 0xe01e: 6226 us, 9215 KB/s, 73.720 Mbps
9147 19:59:57.432512 BS: romstage times (exec / console): total (unknown) / 23978 ms
9148 19:59:57.433014
9149 19:59:57.433517
9150 19:59:57.442666 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...
9151 19:59:57.446106 ARM64: Exception handlers installed.
9152 19:59:57.449436 ARM64: Testing exception
9153 19:59:57.452477 ARM64: Done test exception
9154 19:59:57.452880 Enumerating buses...
9155 19:59:57.456085 Show all devs... Before device enumeration.
9156 19:59:57.459201 Root Device: enabled 1
9157 19:59:57.462420 CPU_CLUSTER: 0: enabled 1
9158 19:59:57.462824 CPU: 00: enabled 1
9159 19:59:57.466492 Compare with tree...
9160 19:59:57.467004 Root Device: enabled 1
9161 19:59:57.468945 CPU_CLUSTER: 0: enabled 1
9162 19:59:57.472355 CPU: 00: enabled 1
9163 19:59:57.472766 Root Device scanning...
9164 19:59:57.476022 scan_static_bus for Root Device
9165 19:59:57.478764 CPU_CLUSTER: 0 enabled
9166 19:59:57.482229 scan_static_bus for Root Device done
9167 19:59:57.485497 scan_bus: bus Root Device finished in 8 msecs
9168 19:59:57.485906 done
9169 19:59:57.492570 BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms
9170 19:59:57.496248 FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)
9171 19:59:57.502724 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
9172 19:59:57.506153 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms
9173 19:59:57.509064 Allocating resources...
9174 19:59:57.509477 Reading resources...
9175 19:59:57.516084 Root Device read_resources bus 0 link: 0
9176 19:59:57.516586 DRAM rank0 size:0x100000000,
9177 19:59:57.519369 DRAM rank1 size=0x100000000
9178 19:59:57.522747 CPU_CLUSTER: 0 read_resources bus 0 link: 0
9179 19:59:57.526684 CPU: 00 missing read_resources
9180 19:59:57.529840 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
9181 19:59:57.536225 Root Device read_resources bus 0 link: 0 done
9182 19:59:57.536740 Done reading resources.
9183 19:59:57.542549 Show resources in subtree (Root Device)...After reading.
9184 19:59:57.546127 Root Device child on link 0 CPU_CLUSTER: 0
9185 19:59:57.549499 CPU_CLUSTER: 0 child on link 0 CPU: 00
9186 19:59:57.559172 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9187 19:59:57.559817 CPU: 00
9188 19:59:57.562388 Root Device assign_resources, bus 0 link: 0
9189 19:59:57.565899 CPU_CLUSTER: 0 missing set_resources
9190 19:59:57.569268 Root Device assign_resources, bus 0 link: 0 done
9191 19:59:57.572328 Done setting resources.
9192 19:59:57.579313 Show resources in subtree (Root Device)...After assigning values.
9193 19:59:57.582344 Root Device child on link 0 CPU_CLUSTER: 0
9194 19:59:57.585257 CPU_CLUSTER: 0 child on link 0 CPU: 00
9195 19:59:57.595880 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9196 19:59:57.596394 CPU: 00
9197 19:59:57.598650 Done allocating resources.
9198 19:59:57.602411 BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms
9199 19:59:57.605681 Enabling resources...
9200 19:59:57.606095 done.
9201 19:59:57.612267 BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms
9202 19:59:57.612785 Initializing devices...
9203 19:59:57.615744 Root Device init
9204 19:59:57.616158 init hardware done!
9205 19:59:57.618650 0x00000018: ctrlr->caps
9206 19:59:57.622590 52.000 MHz: ctrlr->f_max
9207 19:59:57.623119 0.400 MHz: ctrlr->f_min
9208 19:59:57.625846 0x40ff8080: ctrlr->voltages
9209 19:59:57.626373 sclk: 390625
9210 19:59:57.628666 Bus Width = 1
9211 19:59:57.629082 sclk: 390625
9212 19:59:57.629411 Bus Width = 1
9213 19:59:57.632480 Early init status = 3
9214 19:59:57.639251 out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00
9215 19:59:57.642245 in-header: 03 fc 00 00 01 00 00 00
9216 19:59:57.642658 in-data: 00
9217 19:59:57.648906 out: cmd=0x12d: 03 c8 2d 01 00 00 05 00 01 00 00 00 01
9218 19:59:57.651819 in-header: 03 fd 00 00 00 00 00 00
9219 19:59:57.655977 in-data:
9220 19:59:57.658848 out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00
9221 19:59:57.661678 in-header: 03 fc 00 00 01 00 00 00
9222 19:59:57.665457 in-data: 00
9223 19:59:57.668669 out: cmd=0x12d: 03 c9 2d 01 00 00 05 00 00 00 00 00 01
9224 19:59:57.673025 in-header: 03 fd 00 00 00 00 00 00
9225 19:59:57.676101 in-data:
9226 19:59:57.679319 [SSUSB] Setting up USB HOST controller...
9227 19:59:57.682498 [SSUSB] u3phy_ports_enable u2p:1, u3p:1
9228 19:59:57.685688 [SSUSB] phy power-on done.
9229 19:59:57.689401 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
9230 19:59:57.695683 CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c
9231 19:59:57.699440 mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)
9232 19:59:57.706009 CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c
9233 19:59:57.712371 read SPI 0x50eb0 0x2ad3: 1174 us, 9338 KB/s, 74.704 Mbps
9234 19:59:57.719241 mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)
9235 19:59:57.726206 CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204
9236 19:59:57.732617 read SPI 0x705bc 0x1f6a: 924 us, 8703 KB/s, 69.624 Mbps
9237 19:59:57.733141 SPM: binary array size = 0x9dc
9238 19:59:57.739798 SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)
9239 19:59:57.745955 spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18
9240 19:59:57.752893 mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)
9241 19:59:57.756265 SPM: spm_init done in 34 msecs, spm pc = 0x3f4
9242 19:59:57.759160 configure_display: Starting display init
9243 19:59:57.796308 anx7625_power_on_init: Init interface.
9244 19:59:57.798840 anx7625_disable_pd_protocol: Disabled PD feature.
9245 19:59:57.802403 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
9246 19:59:57.830659 anx7625_start_dp_work: Secure OCM version=00
9247 19:59:57.834145 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
9248 19:59:57.848466 sp_tx_get_edid_block: EDID Block = 1
9249 19:59:57.951054 Extracted contents:
9250 19:59:57.954547 header: 00 ff ff ff ff ff ff 00
9251 19:59:57.957916 serial number: 26 cf 7d 05 00 00 00 00 00 1e
9252 19:59:57.961256 version: 01 04
9253 19:59:57.964154 basic params: 95 1f 11 78 0a
9254 19:59:57.967688 chroma info: 76 90 94 55 54 90 27 21 50 54
9255 19:59:57.971428 established: 00 00 00
9256 19:59:57.977805 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
9257 19:59:57.980761 descriptor 1: 38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19
9258 19:59:57.987670 descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9259 19:59:57.994160 descriptor 3: 00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20
9260 19:59:58.000880 descriptor 4: 00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a
9261 19:59:58.003907 extensions: 00
9262 19:59:58.004436 checksum: fb
9263 19:59:58.004770
9264 19:59:58.007446 Manufacturer: IVO Model 57d Serial Number 0
9265 19:59:58.010869 Made week 0 of 2020
9266 19:59:58.011377 EDID version: 1.4
9267 19:59:58.014126 Digital display
9268 19:59:58.017378 6 bits per primary color channel
9269 19:59:58.017899 DisplayPort interface
9270 19:59:58.020313 Maximum image size: 31 cm x 17 cm
9271 19:59:58.023907 Gamma: 220%
9272 19:59:58.024315 Check DPMS levels
9273 19:59:58.027709 Supported color formats: RGB 4:4:4, YCrCb 4:2:2
9274 19:59:58.030829 First detailed timing is preferred timing
9275 19:59:58.033889 Established timings supported:
9276 19:59:58.036892 Standard timings supported:
9277 19:59:58.040092 Detailed timings
9278 19:59:58.043477 Hex of detail: 383680a07038204018303c0035ae10000019
9279 19:59:58.046820 Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm
9280 19:59:58.053925 0780 0798 07c8 0820 hborder 0
9281 19:59:58.057029 0438 043b 0447 0458 vborder 0
9282 19:59:58.060271 -hsync -vsync
9283 19:59:58.060685 Did detailed timing
9284 19:59:58.067620 Hex of detail: 000000000000000000000000000000000000
9285 19:59:58.068182 Manufacturer-specified data, tag 0
9286 19:59:58.074364 Hex of detail: 000000fe00496e666f566973696f6e0a2020
9287 19:59:58.076614 ASCII string: InfoVision
9288 19:59:58.080334 Hex of detail: 000000fe00523134304e574635205248200a
9289 19:59:58.083754 ASCII string: R140NWF5 RH
9290 19:59:58.084173 Checksum
9291 19:59:58.084506 Checksum: 0xfb (valid)
9292 19:59:58.090439 configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz
9293 19:59:58.093631 DSI data_rate: 832800000 bps
9294 19:59:58.096710 anx7625_parse_edid: detected IVO panel, use k value 0x3b
9295 19:59:58.103481 anx7625_parse_edid: pixelclock(138800).
9296 19:59:58.107166 hactive(1920), hsync(48), hfp(24), hbp(88)
9297 19:59:58.110196 vactive(1080), vsync(12), vfp(3), vbp(17)
9298 19:59:58.113749 anx7625_dsi_config: config dsi.
9299 19:59:58.119905 anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).
9300 19:59:58.132970 anx7625_dsi_config: success to config DSI
9301 19:59:58.136055 anx7625_dp_start: MIPI phy setup OK.
9302 19:59:58.139511 mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4
9303 19:59:58.142502 mtk_ddp_mode_set invalid vrefresh 60
9304 19:59:58.146071 main_disp_path_setup
9305 19:59:58.146541 ovl_layer_smi_id_en
9306 19:59:58.149040 ovl_layer_smi_id_en
9307 19:59:58.149488 ccorr_config
9308 19:59:58.149814 aal_config
9309 19:59:58.153033 gamma_config
9310 19:59:58.153542 postmask_config
9311 19:59:58.156217 dither_config
9312 19:59:58.159197 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
9313 19:59:58.166287 x_res x y_res: 1920 x 1080, size: 8294400 at 0x0
9314 19:59:58.169446 Root Device init finished in 551 msecs
9315 19:59:58.172569 CPU_CLUSTER: 0 init
9316 19:59:58.179494 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | device
9317 19:59:58.182542 INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff
9318 19:59:58.186001 APU_MBOX 0x190000b0 = 0x10001
9319 19:59:58.188903 APU_MBOX 0x190001b0 = 0x10001
9320 19:59:58.192209 APU_MBOX 0x190005b0 = 0x10001
9321 19:59:58.195852 APU_MBOX 0x190006b0 = 0x10001
9322 19:59:58.199340 CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c
9323 19:59:58.211999 read SPI 0x539f4 0xe237: 6248 us, 9268 KB/s, 74.144 Mbps
9324 19:59:58.224676 mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)
9325 19:59:58.231340 CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0
9326 19:59:58.242814 read SPI 0x61c74 0xe8ef: 6409 us, 9304 KB/s, 74.432 Mbps
9327 19:59:58.251627 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)
9328 19:59:58.255046 CPU_CLUSTER: 0 init finished in 81 msecs
9329 19:59:58.258200 Devices initialized
9330 19:59:58.262179 Show all devs... After init.
9331 19:59:58.262693 Root Device: enabled 1
9332 19:59:58.265082 CPU_CLUSTER: 0: enabled 1
9333 19:59:58.268377 CPU: 00: enabled 1
9334 19:59:58.271771 BS: BS_DEV_INIT run times (exec / console): 209 / 447 ms
9335 19:59:58.275085 FMAP: area RW_ELOG found @ 57f000 (4096 bytes)
9336 19:59:58.278495 ELOG: NV offset 0x57f000 size 0x1000
9337 19:59:58.284709 read SPI 0x57f000 0x1000: 487 us, 8410 KB/s, 67.280 Mbps
9338 19:59:58.291876 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
9339 19:59:58.295066 ELOG: Event(17) added with size 13 at 2023-10-28 19:58:23 UTC
9340 19:59:58.301694 ELOG: Event(16) added with size 11 at 2023-10-28 19:58:23 UTC
9341 19:59:58.385540 read SPI 0x57f000 0x1000: 487 us, 8410 KB/s, 67.280 Mbps
9342 19:59:58.388704 out: cmd=0x121: 03 db 21 01 00 00 00 00
9343 19:59:58.392074 in-header: 03 91 00 00 2c 00 00 00
9344 19:59:58.405022 in-data: ce 68 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9345 19:59:58.411906 ELOG: Event(A1) added with size 10 at 2023-10-28 19:58:23 UTC
9346 19:59:58.418875 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
9347 19:59:58.422153 ELOG: Event(A0) added with size 9 at 2023-10-28 19:58:23 UTC
9348 19:59:58.428494 elog_add_boot_reason: Logged dev mode boot
9349 19:59:58.431726 BS: BS_POST_DEVICE entry times (exec / console): 81 / 74 ms
9350 19:59:58.435386 Finalize devices...
9351 19:59:58.435960 Devices finalized
9352 19:59:58.441938 BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
9353 19:59:58.445320 Writing coreboot table at 0xffe64000
9354 19:59:58.448055 0. 000000000010a000-0000000000113fff: RAMSTAGE
9355 19:59:58.451715 1. 0000000040000000-00000000400fffff: RAM
9356 19:59:58.454916 2. 0000000040100000-000000004032afff: RAMSTAGE
9357 19:59:58.461611 3. 000000004032b000-00000000545fffff: RAM
9358 19:59:58.465046 4. 0000000054600000-000000005465ffff: BL31
9359 19:59:58.468299 5. 0000000054660000-00000000ffe63fff: RAM
9360 19:59:58.471707 6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES
9361 19:59:58.478280 7. 0000000100000000-000000023fffffff: RAM
9362 19:59:58.478831 Passing 5 GPIOs to payload:
9363 19:59:58.484492 NAME | PORT | POLARITY | VALUE
9364 19:59:58.488271 EC in RW | 0x000000aa | low | undefined
9365 19:59:58.494559 EC interrupt | 0x00000005 | low | undefined
9366 19:59:58.498724 TPM interrupt | 0x000000ab | high | undefined
9367 19:59:58.501366 SD card detect | 0x00000011 | high | undefined
9368 19:59:58.508277 speaker enable | 0x00000093 | high | undefined
9369 19:59:58.511492 out: cmd=0x6: 03 f7 06 00 00 00 00 00
9370 19:59:58.514945 in-header: 03 f9 00 00 02 00 00 00
9371 19:59:58.515465 in-data: 02 00
9372 19:59:58.517924 ADC[4]: Raw value=904357 ID=7
9373 19:59:58.521972 ADC[3]: Raw value=213441 ID=1
9374 19:59:58.522502 RAM Code: 0x71
9375 19:59:58.525209 ADC[6]: Raw value=75701 ID=0
9376 19:59:58.528441 ADC[5]: Raw value=213072 ID=1
9377 19:59:58.528963 SKU Code: 0x1
9378 19:59:58.535420 Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum b7d7
9379 19:59:58.538471 coreboot table: 964 bytes.
9380 19:59:58.541211 IMD ROOT 0. 0xfffff000 0x00001000
9381 19:59:58.544777 IMD SMALL 1. 0xffffe000 0x00001000
9382 19:59:58.547769 RO MCACHE 2. 0xffffc000 0x00001104
9383 19:59:58.551942 CONSOLE 3. 0xfff7c000 0x00080000
9384 19:59:58.554891 FMAP 4. 0xfff7b000 0x00000452
9385 19:59:58.558336 TIME STAMP 5. 0xfff7a000 0x00000910
9386 19:59:58.561106 VBOOT WORK 6. 0xfff66000 0x00014000
9387 19:59:58.564673 RAMOOPS 7. 0xffe66000 0x00100000
9388 19:59:58.567945 COREBOOT 8. 0xffe64000 0x00002000
9389 19:59:58.568029 IMD small region:
9390 19:59:58.571415 IMD ROOT 0. 0xffffec00 0x00000400
9391 19:59:58.574592 VPD 1. 0xffffeb80 0x0000006c
9392 19:59:58.578022 MMC STATUS 2. 0xffffeb60 0x00000004
9393 19:59:58.584235 BS: BS_WRITE_TABLES run times (exec / console): 1 / 137 ms
9394 19:59:58.584405 Probing TPM: done!
9395 19:59:58.590894 Connected to device vid:did:rid of 1ae0:0028:00
9396 19:59:58.597573 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
9397 19:59:58.600740 Initialized TPM device CR50 revision 0
9398 19:59:58.605060 Checking cr50 for pending updates
9399 19:59:58.610253 Reading cr50 TPM mode
9400 19:59:58.619196 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms
9401 19:59:58.625713 CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098
9402 19:59:58.666165 read SPI 0x3990ec 0x4f1b0: 34848 us, 9297 KB/s, 74.376 Mbps
9403 19:59:58.670256 Checking segment from ROM address 0x40100000
9404 19:59:58.673121 Checking segment from ROM address 0x4010001c
9405 19:59:58.680133 Loading segment from ROM address 0x40100000
9406 19:59:58.680808 code (compression=0)
9407 19:59:58.686721 New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178
9408 19:59:58.696705 Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178
9409 19:59:58.697118 it's not compressed!
9410 19:59:58.703791 [ 0x80000000, 8004f178, 0x821a7280) <- 40100038
9411 19:59:58.706757 Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108
9412 19:59:58.727102 Loading segment from ROM address 0x4010001c
9413 19:59:58.727616 Entry Point 0x80000000
9414 19:59:58.730213 Loaded segments
9415 19:59:58.734034 BS: BS_PAYLOAD_LOAD run times (exec / console): 48 / 61 ms
9416 19:59:58.740121 Jumping to boot code at 0x80000000(0xffe64000)
9417 19:59:58.747413 CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes
9418 19:59:58.753387 CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290
9419 19:59:58.761442 read SPI 0x8eb68 0x74a8: 3224 us, 9263 KB/s, 74.104 Mbps
9420 19:59:58.764692 Checking segment from ROM address 0x40100000
9421 19:59:58.768014 Checking segment from ROM address 0x4010001c
9422 19:59:58.774771 Loading segment from ROM address 0x40100000
9423 19:59:58.775421 code (compression=1)
9424 19:59:58.781579 New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470
9425 19:59:58.791710 Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470
9426 19:59:58.792228 using LZMA
9427 19:59:58.800036 [ 0x54600000, 54614abc, 0x5462e000) <- 40100038
9428 19:59:58.805958 Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544
9429 19:59:58.809342 Loading segment from ROM address 0x4010001c
9430 19:59:58.809773 Entry Point 0x54601000
9431 19:59:58.812880 Loaded segments
9432 19:59:58.816177 NOTICE: MT8192 bl31_setup
9433 19:59:58.823213 NOTICE: BL31: v2.4(debug):v2.4-448-gce3ebc861
9434 19:59:58.826536 NOTICE: BL31: Built : Sat Sep 11 09:59:37 UTC 2021
9435 19:59:58.830288 WARNING: region 0:
9436 19:59:58.833341 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9437 19:59:58.833880 WARNING: region 1:
9438 19:59:58.839779 WARNING: sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d
9439 19:59:58.843573 WARNING: region 2:
9440 19:59:58.846721 WARNING: sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d
9441 19:59:58.849900 WARNING: region 3:
9442 19:59:58.853156 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9443 19:59:58.857118 WARNING: region 4:
9444 19:59:58.860259 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9445 19:59:58.863677 WARNING: region 5:
9446 19:59:58.866760 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9447 19:59:58.870641 WARNING: region 6:
9448 19:59:58.873426 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9449 19:59:58.873943 WARNING: region 7:
9450 19:59:58.880041 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9451 19:59:58.886685 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000
9452 19:59:58.890387 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0
9453 19:59:58.893397 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff
9454 19:59:58.899881 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff
9455 19:59:58.904223 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff
9456 19:59:58.907392 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00
9457 19:59:58.913715 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff
9458 19:59:58.916914 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff
9459 19:59:58.920313 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff
9460 19:59:58.927004 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff
9461 19:59:58.930733 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff
9462 19:59:58.933665 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff
9463 19:59:58.940170 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff
9464 19:59:58.944016 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff
9465 19:59:58.950420 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff
9466 19:59:58.953656 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff
9467 19:59:58.957253 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff
9468 19:59:58.963790 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff
9469 19:59:58.967309 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff
9470 19:59:58.970282 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff
9471 19:59:58.977032 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff
9472 19:59:58.980512 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff
9473 19:59:58.986840 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff
9474 19:59:58.990733 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff
9475 19:59:58.993737 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff
9476 19:59:59.000535 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff
9477 19:59:59.003838 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff
9478 19:59:59.010612 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff
9479 19:59:59.013823 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff
9480 19:59:59.017589 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff
9481 19:59:59.024040 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff
9482 19:59:59.027624 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff
9483 19:59:59.030752 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0
9484 19:59:59.037074 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0
9485 19:59:59.040843 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0
9486 19:59:59.044256 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0
9487 19:59:59.047034 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0
9488 19:59:59.054038 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0
9489 19:59:59.057571 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0
9490 19:59:59.060711 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0
9491 19:59:59.064127 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0
9492 19:59:59.067174 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0
9493 19:59:59.074314 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0
9494 19:59:59.077161 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0
9495 19:59:59.080495 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0
9496 19:59:59.087295 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0
9497 19:59:59.090524 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0
9498 19:59:59.093395 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0
9499 19:59:59.100383 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff
9500 19:59:59.103948 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff
9501 19:59:59.107245 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff
9502 19:59:59.114425 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff
9503 19:59:59.117603 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff
9504 19:59:59.124372 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff
9505 19:59:59.127727 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff
9506 19:59:59.130946 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff
9507 19:59:59.137558 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff
9508 19:59:59.140491 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff
9509 19:59:59.147711 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff
9510 19:59:59.150996 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff
9511 19:59:59.157658 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff
9512 19:59:59.161080 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff
9513 19:59:59.164310 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff
9514 19:59:59.170931 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff
9515 19:59:59.174313 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff
9516 19:59:59.180674 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff
9517 19:59:59.184512 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff
9518 19:59:59.191015 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff
9519 19:59:59.194039 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff
9520 19:59:59.197110 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff
9521 19:59:59.204305 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff
9522 19:59:59.207395 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff
9523 19:59:59.214159 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff
9524 19:59:59.217470 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff
9525 19:59:59.224125 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff
9526 19:59:59.227843 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff
9527 19:59:59.231137 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff
9528 19:59:59.237809 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff
9529 19:59:59.240813 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff
9530 19:59:59.248000 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff
9531 19:59:59.250959 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff
9532 19:59:59.257738 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff
9533 19:59:59.261055 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff
9534 19:59:59.264141 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff
9535 19:59:59.271077 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff
9536 19:59:59.274698 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff
9537 19:59:59.281062 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff
9538 19:59:59.284561 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff
9539 19:59:59.291243 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff
9540 19:59:59.294428 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff
9541 19:59:59.297921 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff
9542 19:59:59.304223 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff
9543 19:59:59.308152 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff
9544 19:59:59.314563 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff
9545 19:59:59.317978 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff
9546 19:59:59.324217 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff
9547 19:59:59.327605 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0
9548 19:59:59.331081 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0
9549 19:59:59.334454 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0
9550 19:59:59.341217 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0
9551 19:59:59.344390 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0
9552 19:59:59.347863 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff
9553 19:59:59.354893 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff
9554 19:59:59.358015 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff
9555 19:59:59.364414 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff
9556 19:59:59.367704 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff
9557 19:59:59.371389 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff
9558 19:59:59.378027 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff
9559 19:59:59.381300 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff
9560 19:59:59.387749 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff
9561 19:59:59.391692 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff
9562 19:59:59.394889 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff
9563 19:59:59.401396 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff
9564 19:59:59.405149 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff
9565 19:59:59.408312 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff
9566 19:59:59.414421 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff
9567 19:59:59.418524 INFO: [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18
9568 19:59:59.421443 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000
9569 19:59:59.427627 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004
9570 19:59:59.430717 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0
9571 19:59:59.434914 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0
9572 19:59:59.438056 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0
9573 19:59:59.444317 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0
9574 19:59:59.447670 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000
9575 19:59:59.450984 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff
9576 19:59:59.457277 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff
9577 19:59:59.461263 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff
9578 19:59:59.467585 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff
9579 19:59:59.470937 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff
9580 19:59:59.474213 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff
9581 19:59:59.480828 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff
9582 19:59:59.484419 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc
9583 19:59:59.487464 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff
9584 19:59:59.494315 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf
9585 19:59:59.497691 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff
9586 19:59:59.504170 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc
9587 19:59:59.507563 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff
9588 19:59:59.510505 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff
9589 19:59:59.517302 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff
9590 19:59:59.520446 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff
9591 19:59:59.524096 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff
9592 19:59:59.531230 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff
9593 19:59:59.534409 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff
9594 19:59:59.541139 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff
9595 19:59:59.544883 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff
9596 19:59:59.547846 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff
9597 19:59:59.554484 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff
9598 19:59:59.558247 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff
9599 19:59:59.561523 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff
9600 19:59:59.567940 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff
9601 19:59:59.571440 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff
9602 19:59:59.578460 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff
9603 19:59:59.582024 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff
9604 19:59:59.584786 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff
9605 19:59:59.591739 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff
9606 19:59:59.594767 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff
9607 19:59:59.598204 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff
9608 19:59:59.605245 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff
9609 19:59:59.608357 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff
9610 19:59:59.615336 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff
9611 19:59:59.618216 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff
9612 19:59:59.621822 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff
9613 19:59:59.628013 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff
9614 19:59:59.631753 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff
9615 19:59:59.638582 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff
9616 19:59:59.641714 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff
9617 19:59:59.645418 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff
9618 19:59:59.651793 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff
9619 19:59:59.655346 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff
9620 19:59:59.658623 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff
9621 19:59:59.664992 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff
9622 19:59:59.668122 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff
9623 19:59:59.674959 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff
9624 19:59:59.678272 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff
9625 19:59:59.681840 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff
9626 19:59:59.687787 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff
9627 19:59:59.691606 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff
9628 19:59:59.698489 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff
9629 19:59:59.700911 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff
9630 19:59:59.704429 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff
9631 19:59:59.711137 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff
9632 19:59:59.714309 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff
9633 19:59:59.721092 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff
9634 19:59:59.724604 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff
9635 19:59:59.727908 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff
9636 19:59:59.734123 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff
9637 19:59:59.737345 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff
9638 19:59:59.744193 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff
9639 19:59:59.747697 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff
9640 19:59:59.750855 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff
9641 19:59:59.757229 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff
9642 19:59:59.760745 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff
9643 19:59:59.767542 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff
9644 19:59:59.770804 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff
9645 19:59:59.774162 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff
9646 19:59:59.780775 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff
9647 19:59:59.784007 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff
9648 19:59:59.790474 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff
9649 19:59:59.794070 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff
9650 19:59:59.800515 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff
9651 19:59:59.803626 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff
9652 19:59:59.806730 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff
9653 19:59:59.813895 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff
9654 19:59:59.817189 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff
9655 19:59:59.823495 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff
9656 19:59:59.827261 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff
9657 19:59:59.833818 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff
9658 19:59:59.836899 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff
9659 19:59:59.840176 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff
9660 19:59:59.846433 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff
9661 19:59:59.850313 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff
9662 19:59:59.856499 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff
9663 19:59:59.859726 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff
9664 19:59:59.863259 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff
9665 19:59:59.869864 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff
9666 19:59:59.872800 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff
9667 19:59:59.880003 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff
9668 19:59:59.883111 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff
9669 19:59:59.889630 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff
9670 19:59:59.892928 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff
9671 19:59:59.896002 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff
9672 19:59:59.902718 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff
9673 19:59:59.906540 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff
9674 19:59:59.912960 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff
9675 19:59:59.916181 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff
9676 19:59:59.919276 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff
9677 19:59:59.926424 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff
9678 19:59:59.929702 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff
9679 19:59:59.936290 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff
9680 19:59:59.939281 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0
9681 19:59:59.942521 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0
9682 19:59:59.945962 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0
9683 19:59:59.952579 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0
9684 19:59:59.955884 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0
9685 19:59:59.959774 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff
9686 19:59:59.966182 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff
9687 19:59:59.969774 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff
9688 19:59:59.972886 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff
9689 19:59:59.979949 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf
9690 19:59:59.982986 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff
9691 19:59:59.986076 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff
9692 19:59:59.993128 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff
9693 19:59:59.996348 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff
9694 19:59:59.999703 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf
9695 20:00:00.006567 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff
9696 20:00:00.009380 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff
9697 20:00:00.016444 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff
9698 20:00:00.019617 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff
9699 20:00:00.022649 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf
9700 20:00:00.029796 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff
9701 20:00:00.032974 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff
9702 20:00:00.036041 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff
9703 20:00:00.042503 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff
9704 20:00:00.046082 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf
9705 20:00:00.049178 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff
9706 20:00:00.055937 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff
9707 20:00:00.059239 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff
9708 20:00:00.066300 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff
9709 20:00:00.069293 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf
9710 20:00:00.072908 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff
9711 20:00:00.079600 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff
9712 20:00:00.082719 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff
9713 20:00:00.085717 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff
9714 20:00:00.092681 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf
9715 20:00:00.095554 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff
9716 20:00:00.102592 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff
9717 20:00:00.105501 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff
9718 20:00:00.109337 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff
9719 20:00:00.115486 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf
9720 20:00:00.118986 INFO: [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0
9721 20:00:00.122255 INFO: [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3
9722 20:00:00.125991 INFO: [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3
9723 20:00:00.129027 INFO: [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3
9724 20:00:00.135474 INFO: [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0
9725 20:00:00.139677 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400
9726 20:00:00.142421 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0
9727 20:00:00.145440 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0
9728 20:00:00.152203 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0
9729 20:00:00.156070 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0
9730 20:00:00.159334 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0
9731 20:00:00.165746 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000
9732 20:00:00.168988 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0
9733 20:00:00.172590 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff
9734 20:00:00.179156 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff
9735 20:00:00.182234 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff
9736 20:00:00.185805 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff
9737 20:00:00.192616 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff
9738 20:00:00.196014 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff
9739 20:00:00.202369 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff
9740 20:00:00.205472 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f
9741 20:00:00.208647 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3
9742 20:00:00.215881 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff
9743 20:00:00.219182 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff
9744 20:00:00.225663 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff
9745 20:00:00.229053 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff
9746 20:00:00.235906 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff
9747 20:00:00.238957 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff
9748 20:00:00.241760 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f
9749 20:00:00.248361 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff
9750 20:00:00.252265 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff
9751 20:00:00.259038 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff
9752 20:00:00.262146 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff
9753 20:00:00.265658 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff
9754 20:00:00.272101 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff
9755 20:00:00.275731 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff
9756 20:00:00.281858 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f
9757 20:00:00.284859 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff
9758 20:00:00.288461 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff
9759 20:00:00.295117 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff
9760 20:00:00.298533 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff
9761 20:00:00.305085 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff
9762 20:00:00.308182 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff
9763 20:00:00.315373 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff
9764 20:00:00.318283 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f
9765 20:00:00.321874 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff
9766 20:00:00.328211 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff
9767 20:00:00.331836 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff
9768 20:00:00.334936 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff
9769 20:00:00.341692 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff
9770 20:00:00.345013 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff
9771 20:00:00.351562 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff
9772 20:00:00.355034 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f
9773 20:00:00.358388 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff
9774 20:00:00.364716 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff
9775 20:00:00.368198 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff
9776 20:00:00.374756 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff
9777 20:00:00.378133 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff
9778 20:00:00.384651 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff
9779 20:00:00.388250 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff
9780 20:00:00.391426 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f
9781 20:00:00.397974 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff
9782 20:00:00.401702 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff
9783 20:00:00.407954 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff
9784 20:00:00.412011 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff
9785 20:00:00.414709 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff
9786 20:00:00.421731 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff
9787 20:00:00.424955 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff
9788 20:00:00.432273 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f
9789 20:00:00.435410 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff
9790 20:00:00.438378 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff
9791 20:00:00.444836 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff
9792 20:00:00.448085 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff
9793 20:00:00.454832 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff
9794 20:00:00.458014 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff
9795 20:00:00.461687 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff
9796 20:00:00.468681 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f
9797 20:00:00.471731 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff
9798 20:00:00.478665 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff
9799 20:00:00.481365 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff
9800 20:00:00.484798 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff
9801 20:00:00.491260 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff
9802 20:00:00.494850 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff
9803 20:00:00.501500 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff
9804 20:00:00.504886 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f
9805 20:00:00.508177 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff
9806 20:00:00.514767 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff
9807 20:00:00.518401 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff
9808 20:00:00.524810 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff
9809 20:00:00.527932 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff
9810 20:00:00.534963 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff
9811 20:00:00.538063 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff
9812 20:00:00.541105 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f
9813 20:00:00.548126 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff
9814 20:00:00.551114 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff
9815 20:00:00.557951 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff
9816 20:00:00.561416 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff
9817 20:00:00.568425 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff
9818 20:00:00.571733 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff
9819 20:00:00.577681 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff
9820 20:00:00.581297 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f
9821 20:00:00.584478 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff
9822 20:00:00.591098 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff
9823 20:00:00.594853 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff
9824 20:00:00.601075 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff
9825 20:00:00.604470 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff
9826 20:00:00.611473 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff
9827 20:00:00.614467 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff
9828 20:00:00.618226 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f
9829 20:00:00.624554 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff
9830 20:00:00.627813 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff
9831 20:00:00.634995 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff
9832 20:00:00.638272 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff
9833 20:00:00.644318 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff
9834 20:00:00.648457 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff
9835 20:00:00.654758 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff
9836 20:00:00.657962 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f
9837 20:00:00.661173 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff
9838 20:00:00.668051 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff
9839 20:00:00.671210 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff
9840 20:00:00.677882 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff
9841 20:00:00.681641 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff
9842 20:00:00.687703 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff
9843 20:00:00.690808 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff
9844 20:00:00.694411 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f
9845 20:00:00.700969 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff
9846 20:00:00.704339 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff
9847 20:00:00.711051 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff
9848 20:00:00.714439 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff
9849 20:00:00.721068 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff
9850 20:00:00.724373 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff
9851 20:00:00.727556 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff
9852 20:00:00.734292 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f
9853 20:00:00.737930 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0
9854 20:00:00.741072 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000
9855 20:00:00.748238 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff
9856 20:00:00.751204 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff
9857 20:00:00.758214 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3
9858 20:00:00.761364 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff
9859 20:00:00.767714 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff
9860 20:00:00.770926 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff
9861 20:00:00.778156 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff
9862 20:00:00.781321 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff
9863 20:00:00.787505 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff
9864 20:00:00.790829 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff
9865 20:00:00.797543 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff
9866 20:00:00.800938 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff
9867 20:00:00.807701 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff
9868 20:00:00.811009 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff
9869 20:00:00.817679 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff
9870 20:00:00.821027 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff
9871 20:00:00.827251 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff
9872 20:00:00.830916 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff
9873 20:00:00.837933 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff
9874 20:00:00.841165 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff
9875 20:00:00.847450 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff
9876 20:00:00.850812 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff
9877 20:00:00.857763 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff
9878 20:00:00.860941 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff
9879 20:00:00.867413 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff
9880 20:00:00.871041 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff
9881 20:00:00.877460 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff
9882 20:00:00.881104 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff
9883 20:00:00.887471 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff
9884 20:00:00.890468 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff
9885 20:00:00.894125 INFO: [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0
9886 20:00:00.897002 INFO: [APUAPC] vio 0
9887 20:00:00.900763 INFO: [APUAPC] set_apusys_ao_apc - SUCCESS!
9888 20:00:00.907353 INFO: [APUAPC] set_apusys_noc_dapc - SUCCESS!
9889 20:00:00.911018 INFO: [APUAPC] D0_APC_0: 0x400510
9890 20:00:00.913769 INFO: [APUAPC] D0_APC_1: 0x0
9891 20:00:00.917285 INFO: [APUAPC] D0_APC_2: 0x1540
9892 20:00:00.917805 INFO: [APUAPC] D0_APC_3: 0x0
9893 20:00:00.923837 INFO: [APUAPC] D1_APC_0: 0xffffffff
9894 20:00:00.927213 INFO: [APUAPC] D1_APC_1: 0xffffffff
9895 20:00:00.930638 INFO: [APUAPC] D1_APC_2: 0x3fffff
9896 20:00:00.931179 INFO: [APUAPC] D1_APC_3: 0x0
9897 20:00:00.933822 INFO: [APUAPC] D2_APC_0: 0xffffffff
9898 20:00:00.937606 INFO: [APUAPC] D2_APC_1: 0xffffffff
9899 20:00:00.940657 INFO: [APUAPC] D2_APC_2: 0x3fffff
9900 20:00:00.944052 INFO: [APUAPC] D2_APC_3: 0x0
9901 20:00:00.947395 INFO: [APUAPC] D3_APC_0: 0xffffffff
9902 20:00:00.950639 INFO: [APUAPC] D3_APC_1: 0xffffffff
9903 20:00:00.953823 INFO: [APUAPC] D3_APC_2: 0x3fffff
9904 20:00:00.957041 INFO: [APUAPC] D3_APC_3: 0x0
9905 20:00:00.960314 INFO: [APUAPC] D4_APC_0: 0xffffffff
9906 20:00:00.963816 INFO: [APUAPC] D4_APC_1: 0xffffffff
9907 20:00:00.967385 INFO: [APUAPC] D4_APC_2: 0x3fffff
9908 20:00:00.970439 INFO: [APUAPC] D4_APC_3: 0x0
9909 20:00:00.973734 INFO: [APUAPC] D5_APC_0: 0xffffffff
9910 20:00:00.976852 INFO: [APUAPC] D5_APC_1: 0xffffffff
9911 20:00:00.980433 INFO: [APUAPC] D5_APC_2: 0x3fffff
9912 20:00:00.983755 INFO: [APUAPC] D5_APC_3: 0x0
9913 20:00:00.986894 INFO: [APUAPC] D6_APC_0: 0xffffffff
9914 20:00:00.990416 INFO: [APUAPC] D6_APC_1: 0xffffffff
9915 20:00:00.993840 INFO: [APUAPC] D6_APC_2: 0x3fffff
9916 20:00:00.996868 INFO: [APUAPC] D6_APC_3: 0x0
9917 20:00:00.999980 INFO: [APUAPC] D7_APC_0: 0xffffffff
9918 20:00:01.003322 INFO: [APUAPC] D7_APC_1: 0xffffffff
9919 20:00:01.006320 INFO: [APUAPC] D7_APC_2: 0x3fffff
9920 20:00:01.010475 INFO: [APUAPC] D7_APC_3: 0x0
9921 20:00:01.013649 INFO: [APUAPC] D8_APC_0: 0xffffffff
9922 20:00:01.016404 INFO: [APUAPC] D8_APC_1: 0xffffffff
9923 20:00:01.019670 INFO: [APUAPC] D8_APC_2: 0x3fffff
9924 20:00:01.023042 INFO: [APUAPC] D8_APC_3: 0x0
9925 20:00:01.026234 INFO: [APUAPC] D9_APC_0: 0xffffffff
9926 20:00:01.029382 INFO: [APUAPC] D9_APC_1: 0xffffffff
9927 20:00:01.033261 INFO: [APUAPC] D9_APC_2: 0x3fffff
9928 20:00:01.036420 INFO: [APUAPC] D9_APC_3: 0x0
9929 20:00:01.039711 INFO: [APUAPC] D10_APC_0: 0xffffffff
9930 20:00:01.042762 INFO: [APUAPC] D10_APC_1: 0xffffffff
9931 20:00:01.045955 INFO: [APUAPC] D10_APC_2: 0x3fffff
9932 20:00:01.049665 INFO: [APUAPC] D10_APC_3: 0x0
9933 20:00:01.053355 INFO: [APUAPC] D11_APC_0: 0xffffffff
9934 20:00:01.056270 INFO: [APUAPC] D11_APC_1: 0xffffffff
9935 20:00:01.059795 INFO: [APUAPC] D11_APC_2: 0x3fffff
9936 20:00:01.062886 INFO: [APUAPC] D11_APC_3: 0x0
9937 20:00:01.066522 INFO: [APUAPC] D12_APC_0: 0xffffffff
9938 20:00:01.069849 INFO: [APUAPC] D12_APC_1: 0xffffffff
9939 20:00:01.072764 INFO: [APUAPC] D12_APC_2: 0x3fffff
9940 20:00:01.076138 INFO: [APUAPC] D12_APC_3: 0x0
9941 20:00:01.079396 INFO: [APUAPC] D13_APC_0: 0xffffffff
9942 20:00:01.082692 INFO: [APUAPC] D13_APC_1: 0xffffffff
9943 20:00:01.086100 INFO: [APUAPC] D13_APC_2: 0x3fffff
9944 20:00:01.089118 INFO: [APUAPC] D13_APC_3: 0x0
9945 20:00:01.092454 INFO: [APUAPC] D14_APC_0: 0xffffffff
9946 20:00:01.095841 INFO: [APUAPC] D14_APC_1: 0xffffffff
9947 20:00:01.099080 INFO: [APUAPC] D14_APC_2: 0x3fffff
9948 20:00:01.102711 INFO: [APUAPC] D14_APC_3: 0x0
9949 20:00:01.106308 INFO: [APUAPC] D15_APC_0: 0xffffffff
9950 20:00:01.109041 INFO: [APUAPC] D15_APC_1: 0xffffffff
9951 20:00:01.112899 INFO: [APUAPC] D15_APC_2: 0x3fffff
9952 20:00:01.115741 INFO: [APUAPC] D15_APC_3: 0x0
9953 20:00:01.119916 INFO: [APUAPC] APC_CON: 0x4
9954 20:00:01.122668 INFO: [NOCDAPC] D0_APC_0: 0x0
9955 20:00:01.125845 INFO: [NOCDAPC] D0_APC_1: 0x0
9956 20:00:01.126252 INFO: [NOCDAPC] D1_APC_0: 0x0
9957 20:00:01.129357 INFO: [NOCDAPC] D1_APC_1: 0xfff
9958 20:00:01.132629 INFO: [NOCDAPC] D2_APC_0: 0x0
9959 20:00:01.136091 INFO: [NOCDAPC] D2_APC_1: 0xfff
9960 20:00:01.139287 INFO: [NOCDAPC] D3_APC_0: 0x0
9961 20:00:01.143052 INFO: [NOCDAPC] D3_APC_1: 0xfff
9962 20:00:01.146164 INFO: [NOCDAPC] D4_APC_0: 0x0
9963 20:00:01.149555 INFO: [NOCDAPC] D4_APC_1: 0xfff
9964 20:00:01.152424 INFO: [NOCDAPC] D5_APC_0: 0x0
9965 20:00:01.155937 INFO: [NOCDAPC] D5_APC_1: 0xfff
9966 20:00:01.159742 INFO: [NOCDAPC] D6_APC_0: 0x0
9967 20:00:01.160270 INFO: [NOCDAPC] D6_APC_1: 0xfff
9968 20:00:01.162936 INFO: [NOCDAPC] D7_APC_0: 0x0
9969 20:00:01.165915 INFO: [NOCDAPC] D7_APC_1: 0xfff
9970 20:00:01.169899 INFO: [NOCDAPC] D8_APC_0: 0x0
9971 20:00:01.173063 INFO: [NOCDAPC] D8_APC_1: 0xfff
9972 20:00:01.176287 INFO: [NOCDAPC] D9_APC_0: 0x0
9973 20:00:01.179511 INFO: [NOCDAPC] D9_APC_1: 0xfff
9974 20:00:01.182640 INFO: [NOCDAPC] D10_APC_0: 0x0
9975 20:00:01.186442 INFO: [NOCDAPC] D10_APC_1: 0xfff
9976 20:00:01.189496 INFO: [NOCDAPC] D11_APC_0: 0x0
9977 20:00:01.192343 INFO: [NOCDAPC] D11_APC_1: 0xfff
9978 20:00:01.195874 INFO: [NOCDAPC] D12_APC_0: 0x0
9979 20:00:01.196393 INFO: [NOCDAPC] D12_APC_1: 0xfff
9980 20:00:01.199275 INFO: [NOCDAPC] D13_APC_0: 0x0
9981 20:00:01.202327 INFO: [NOCDAPC] D13_APC_1: 0xfff
9982 20:00:01.205557 INFO: [NOCDAPC] D14_APC_0: 0x0
9983 20:00:01.208899 INFO: [NOCDAPC] D14_APC_1: 0xfff
9984 20:00:01.212365 INFO: [NOCDAPC] D15_APC_0: 0x0
9985 20:00:01.215700 INFO: [NOCDAPC] D15_APC_1: 0xfff
9986 20:00:01.219385 INFO: [NOCDAPC] APC_CON: 0x4
9987 20:00:01.222400 INFO: [APUAPC] set_apusys_apc done
9988 20:00:01.225465 INFO: [DEVAPC] devapc_init done
9989 20:00:01.229570 INFO: GICv3 without legacy support detected.
9990 20:00:01.232421 INFO: ARM GICv3 driver initialized in EL3
9991 20:00:01.236352 INFO: Maximum SPI INTID supported: 639
9992 20:00:01.242789 INFO: BL31: Initializing runtime services
9993 20:00:01.245757 WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!
9994 20:00:01.249343 INFO: SPM: enable CPC mode
9995 20:00:01.256447 INFO: mcdi ready for mcusys-off-idle and system suspend
9996 20:00:01.259419 INFO: BL31: Preparing for EL3 exit to normal world
9997 20:00:01.262871 INFO: Entry point address = 0x80000000
9998 20:00:01.265959 INFO: SPSR = 0x8
9999 20:00:01.271190
10000 20:00:01.271744
10001 20:00:01.272084
10002 20:00:01.274563 Starting depthcharge on Spherion...
10003 20:00:01.275084
10004 20:00:01.275415 Wipe memory regions:
10005 20:00:01.275763
10006 20:00:01.278323 end: 2.2.3 depthcharge-start (duration 00:00:30) [common]
10007 20:00:01.278819 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
10008 20:00:01.279213 Setting prompt string to ['asurada:']
10009 20:00:01.279585 bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:25)
10010 20:00:01.280279 [0x00000040000000, 0x00000054600000)
10011 20:00:01.400370
10012 20:00:01.400892 [0x00000054660000, 0x00000080000000)
10013 20:00:01.660870
10014 20:00:01.661387 [0x000000821a7280, 0x000000ffe64000)
10015 20:00:02.404567
10016 20:00:02.405087 [0x00000100000000, 0x00000240000000)
10017 20:00:04.294875
10018 20:00:04.297416 Initializing XHCI USB controller at 0x11200000.
10019 20:00:05.336660
10020 20:00:05.340146 [firmware-asurada-13885.B-collabora] Dec 7 2021 09:38:38
10021 20:00:05.340756
10022 20:00:05.341095
10023 20:00:05.341403
10024 20:00:05.342159 Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10026 20:00:05.443482 asurada: tftpboot 192.168.201.1 11899592/tftp-deploy-pu673ckw/kernel/image.itb 11899592/tftp-deploy-pu673ckw/kernel/cmdline
10027 20:00:05.444141 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10028 20:00:05.444589 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:21)
10029 20:00:05.449641 tftpboot 192.168.201.1 11899592/tftp-deploy-pu673ckw/kernel/image.ittp-deploy-pu673ckw/kernel/cmdline
10030 20:00:05.450168
10031 20:00:05.450497 Waiting for link
10032 20:00:05.609701
10033 20:00:05.610215 R8152: Initializing
10034 20:00:05.610588
10035 20:00:05.612572 Version 9 (ocp_data = 6010)
10036 20:00:05.613003
10037 20:00:05.616167 R8152: Done initializing
10038 20:00:05.616597
10039 20:00:05.617037 Adding net device
10040 20:00:07.484613
10041 20:00:07.485155 done.
10042 20:00:07.485611
10043 20:00:07.486032 MAC: 00:e0:4c:78:7a:aa
10044 20:00:07.486568
10045 20:00:07.488052 Sending DHCP discover... done.
10046 20:00:07.488606
10047 20:00:07.491183 Waiting for reply... done.
10048 20:00:07.491819
10049 20:00:07.494728 Sending DHCP request... done.
10050 20:00:07.495142
10051 20:00:07.495599 Waiting for reply... done.
10052 20:00:07.495992
10053 20:00:07.498063 My ip is 192.168.201.12
10054 20:00:07.498477
10055 20:00:07.501403 The DHCP server ip is 192.168.201.1
10056 20:00:07.501818
10057 20:00:07.504669 TFTP server IP predefined by user: 192.168.201.1
10058 20:00:07.505085
10059 20:00:07.511279 Bootfile predefined by user: 11899592/tftp-deploy-pu673ckw/kernel/image.itb
10060 20:00:07.511742
10061 20:00:07.514872 Sending tftp read request... done.
10062 20:00:07.515459
10063 20:00:07.522880 Waiting for the transfer...
10064 20:00:07.523299
10065 20:00:07.877054 00000000 ################################################################
10066 20:00:07.877204
10067 20:00:08.167177 00080000 ################################################################
10068 20:00:08.167342
10069 20:00:08.446275 00100000 ################################################################
10070 20:00:08.446416
10071 20:00:08.728043 00180000 ################################################################
10072 20:00:08.728183
10073 20:00:09.001525 00200000 ################################################################
10074 20:00:09.001667
10075 20:00:09.251552 00280000 ################################################################
10076 20:00:09.251750
10077 20:00:09.502504 00300000 ################################################################
10078 20:00:09.502668
10079 20:00:09.752402 00380000 ################################################################
10080 20:00:09.752567
10081 20:00:10.007588 00400000 ################################################################
10082 20:00:10.007769
10083 20:00:10.257516 00480000 ################################################################
10084 20:00:10.257645
10085 20:00:10.514540 00500000 ################################################################
10086 20:00:10.514679
10087 20:00:10.764968 00580000 ################################################################
10088 20:00:10.765124
10089 20:00:11.014510 00600000 ################################################################
10090 20:00:11.014649
10091 20:00:11.265756 00680000 ################################################################
10092 20:00:11.265921
10093 20:00:11.515993 00700000 ################################################################
10094 20:00:11.516139
10095 20:00:11.766191 00780000 ################################################################
10096 20:00:11.766353
10097 20:00:12.015624 00800000 ################################################################
10098 20:00:12.015797
10099 20:00:12.264701 00880000 ################################################################
10100 20:00:12.264848
10101 20:00:12.530640 00900000 ################################################################
10102 20:00:12.530811
10103 20:00:12.787028 00980000 ################################################################
10104 20:00:12.787177
10105 20:00:13.036850 00a00000 ################################################################
10106 20:00:13.037050
10107 20:00:13.285590 00a80000 ################################################################
10108 20:00:13.285739
10109 20:00:13.535768 00b00000 ################################################################
10110 20:00:13.535912
10111 20:00:13.785859 00b80000 ################################################################
10112 20:00:13.785989
10113 20:00:14.045998 00c00000 ################################################################
10114 20:00:14.046133
10115 20:00:14.310105 00c80000 ################################################################
10116 20:00:14.310256
10117 20:00:14.570893 00d00000 ################################################################
10118 20:00:14.571041
10119 20:00:14.865174 00d80000 ################################################################
10120 20:00:14.865322
10121 20:00:15.160669 00e00000 ################################################################
10122 20:00:15.160813
10123 20:00:15.453141 00e80000 ################################################################
10124 20:00:15.453289
10125 20:00:15.750245 00f00000 ################################################################
10126 20:00:15.750390
10127 20:00:16.041291 00f80000 ################################################################
10128 20:00:16.041438
10129 20:00:16.337758 01000000 ################################################################
10130 20:00:16.337904
10131 20:00:16.598326 01080000 ################################################################
10132 20:00:16.598470
10133 20:00:16.858592 01100000 ################################################################
10134 20:00:16.858723
10135 20:00:17.109351 01180000 ################################################################
10136 20:00:17.109484
10137 20:00:17.358445 01200000 ################################################################
10138 20:00:17.358593
10139 20:00:17.608562 01280000 ################################################################
10140 20:00:17.608702
10141 20:00:17.858495 01300000 ################################################################
10142 20:00:17.858633
10143 20:00:18.108437 01380000 ################################################################
10144 20:00:18.108579
10145 20:00:18.357610 01400000 ################################################################
10146 20:00:18.357756
10147 20:00:18.612216 01480000 ################################################################
10148 20:00:18.612356
10149 20:00:18.902815 01500000 ################################################################
10150 20:00:18.902962
10151 20:00:19.199813 01580000 ################################################################
10152 20:00:19.199961
10153 20:00:19.493062 01600000 ################################################################
10154 20:00:19.493207
10155 20:00:19.767945 01680000 ################################################################
10156 20:00:19.768088
10157 20:00:20.039361 01700000 ################################################################
10158 20:00:20.039510
10159 20:00:20.319014 01780000 ################################################################
10160 20:00:20.319154
10161 20:00:20.599451 01800000 ################################################################
10162 20:00:20.599618
10163 20:00:20.863415 01880000 ################################################################
10164 20:00:20.863569
10165 20:00:21.113689 01900000 ################################################################
10166 20:00:21.113822
10167 20:00:21.364424 01980000 ################################################################
10168 20:00:21.364566
10169 20:00:21.628292 01a00000 ################################################################
10170 20:00:21.628431
10171 20:00:21.879048 01a80000 ################################################################
10172 20:00:21.879218
10173 20:00:22.134600 01b00000 ################################################################
10174 20:00:22.134768
10175 20:00:22.383781 01b80000 ################################################################
10176 20:00:22.383941
10177 20:00:22.634446 01c00000 ################################################################
10178 20:00:22.634609
10179 20:00:22.884835 01c80000 ################################################################
10180 20:00:22.885001
10181 20:00:23.135114 01d00000 ################################################################
10182 20:00:23.135254
10183 20:00:23.385234 01d80000 ################################################################
10184 20:00:23.385408
10185 20:00:23.669879 01e00000 ################################################################
10186 20:00:23.670029
10187 20:00:23.921479 01e80000 ################################################################
10188 20:00:23.921609
10189 20:00:24.178681 01f00000 ################################################################
10190 20:00:24.178812
10191 20:00:24.453381 01f80000 ################################################################
10192 20:00:24.453525
10193 20:00:24.725207 02000000 ################################################################
10194 20:00:24.725359
10195 20:00:24.975338 02080000 ################################################################
10196 20:00:24.975478
10197 20:00:25.234821 02100000 ################################################################
10198 20:00:25.234994
10199 20:00:25.495953 02180000 ################################################################
10200 20:00:25.496136
10201 20:00:25.745870 02200000 ################################################################
10202 20:00:25.746044
10203 20:00:25.996945 02280000 ################################################################
10204 20:00:25.997086
10205 20:00:26.251102 02300000 ################################################################
10206 20:00:26.251238
10207 20:00:26.502251 02380000 ################################################################
10208 20:00:26.502398
10209 20:00:26.752071 02400000 ################################################################
10210 20:00:26.752237
10211 20:00:27.002219 02480000 ################################################################
10212 20:00:27.002365
10213 20:00:27.251864 02500000 ################################################################
10214 20:00:27.252005
10215 20:00:27.501952 02580000 ################################################################
10216 20:00:27.502116
10217 20:00:27.753668 02600000 ################################################################
10218 20:00:27.753801
10219 20:00:28.004770 02680000 ################################################################
10220 20:00:28.004897
10221 20:00:28.254248 02700000 ################################################################
10222 20:00:28.254417
10223 20:00:28.504827 02780000 ################################################################
10224 20:00:28.504973
10225 20:00:28.754250 02800000 ################################################################
10226 20:00:28.754397
10227 20:00:29.004042 02880000 ################################################################
10228 20:00:29.004190
10229 20:00:29.254389 02900000 ################################################################
10230 20:00:29.254529
10231 20:00:29.504512 02980000 ################################################################
10232 20:00:29.504659
10233 20:00:29.754353 02a00000 ################################################################
10234 20:00:29.754554
10235 20:00:30.020004 02a80000 ################################################################
10236 20:00:30.020148
10237 20:00:30.269730 02b00000 ################################################################
10238 20:00:30.269871
10239 20:00:30.520453 02b80000 ################################################################
10240 20:00:30.520604
10241 20:00:30.769061 02c00000 ################################################################
10242 20:00:30.769217
10243 20:00:31.019231 02c80000 ################################################################
10244 20:00:31.019361
10245 20:00:31.269578 02d00000 ################################################################
10246 20:00:31.269716
10247 20:00:31.519887 02d80000 ################################################################
10248 20:00:31.520033
10249 20:00:31.769235 02e00000 ################################################################
10250 20:00:31.769401
10251 20:00:32.022396 02e80000 ################################################################
10252 20:00:32.022540
10253 20:00:32.272554 02f00000 ################################################################
10254 20:00:32.272692
10255 20:00:32.533829 02f80000 ################################################################
10256 20:00:32.533966
10257 20:00:32.782267 03000000 ################################################################
10258 20:00:32.782408
10259 20:00:33.031955 03080000 ################################################################
10260 20:00:33.032090
10261 20:00:33.287455 03100000 ################################################################
10262 20:00:33.287624
10263 20:00:33.543100 03180000 ################################################################
10264 20:00:33.543237
10265 20:00:33.794199 03200000 ################################################################
10266 20:00:33.794347
10267 20:00:34.051057 03280000 ################################################################
10268 20:00:34.051201
10269 20:00:34.324813 03300000 ################################################################
10270 20:00:34.324958
10271 20:00:34.621895 03380000 ################################################################
10272 20:00:34.622045
10273 20:00:34.894046 03400000 ################################################################
10274 20:00:34.894205
10275 20:00:35.168547 03480000 ################################################################
10276 20:00:35.168680
10277 20:00:35.439811 03500000 ################################################################
10278 20:00:35.439958
10279 20:00:35.729793 03580000 ################################################################
10280 20:00:35.729938
10281 20:00:36.009494 03600000 ################################################################
10282 20:00:36.009644
10283 20:00:36.293393 03680000 ################################################################
10284 20:00:36.293538
10285 20:00:36.579379 03700000 ################################################################
10286 20:00:36.579547
10287 20:00:36.861852 03780000 ################################################################
10288 20:00:36.862020
10289 20:00:37.145115 03800000 ################################################################
10290 20:00:37.145258
10291 20:00:37.428033 03880000 ################################################################
10292 20:00:37.428175
10293 20:00:37.711415 03900000 ################################################################
10294 20:00:37.711547
10295 20:00:37.994329 03980000 ################################################################
10296 20:00:37.994475
10297 20:00:38.275882 03a00000 ################################################################
10298 20:00:38.276029
10299 20:00:38.557980 03a80000 ################################################################
10300 20:00:38.558120
10301 20:00:38.839926 03b00000 ################################################################
10302 20:00:38.840069
10303 20:00:39.119124 03b80000 ################################################################
10304 20:00:39.119266
10305 20:00:39.402524 03c00000 ################################################################
10306 20:00:39.402662
10307 20:00:39.681513 03c80000 ################################################################
10308 20:00:39.681655
10309 20:00:39.931956 03d00000 ################################################################
10310 20:00:39.932101
10311 20:00:40.181822 03d80000 ################################################################
10312 20:00:40.181960
10313 20:00:40.439155 03e00000 ################################################################
10314 20:00:40.439320
10315 20:00:40.689838 03e80000 ################################################################
10316 20:00:40.690003
10317 20:00:40.950943 03f00000 ################################################################
10318 20:00:40.951111
10319 20:00:41.200615 03f80000 ################################################################
10320 20:00:41.200781
10321 20:00:41.396290 04000000 ################################################### done.
10322 20:00:41.396421
10323 20:00:41.399652 The bootfile was 67520190 bytes long.
10324 20:00:41.399740
10325 20:00:41.403214 Sending tftp read request... done.
10326 20:00:41.403687
10327 20:00:41.406479 Waiting for the transfer...
10328 20:00:41.407029
10329 20:00:41.407371 00000000 # done.
10330 20:00:41.407736
10331 20:00:41.416372 Command line loaded dynamically from TFTP file: 11899592/tftp-deploy-pu673ckw/kernel/cmdline
10332 20:00:41.416791
10333 20:00:41.430402 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10334 20:00:41.430940
10335 20:00:41.431269 Loading FIT.
10336 20:00:41.431575
10337 20:00:41.433130 Image ramdisk-1 has 56423353 bytes.
10338 20:00:41.433480
10339 20:00:41.436691 Image fdt-1 has 47278 bytes.
10340 20:00:41.437107
10341 20:00:41.439605 Image kernel-1 has 11047522 bytes.
10342 20:00:41.440057
10343 20:00:41.446318 Compat preference: google,spherion-rev2-sku1 google,spherion-rev2 google,spherion-sku1 google,spherion
10344 20:00:41.446736
10345 20:00:41.466088 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 google,spherion-rev2 (match) google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192
10346 20:00:41.466674
10347 20:00:41.469851 Choosing best match conf-1 for compat google,spherion-rev2.
10348 20:00:41.474784
10349 20:00:41.480095 Connected to device vid:did:rid of 1ae0:0028:00
10350 20:00:41.487794
10351 20:00:41.490932 tpm_get_response: command 0x17b, return code 0x0
10352 20:00:41.491491
10353 20:00:41.494711 ec_init: CrosEC protocol v3 supported (256, 248)
10354 20:00:41.498698
10355 20:00:41.502266 tpm_cleanup: add release locality here.
10356 20:00:41.502834
10357 20:00:41.503195 Shutting down all USB controllers.
10358 20:00:41.503533
10359 20:00:41.505289 Removing current net device
10360 20:00:41.505664
10361 20:00:41.511350 Exiting depthcharge with code 4 at timestamp: 69593709
10362 20:00:41.511847
10363 20:00:41.515348 LZMA decompressing kernel-1 to 0x821a6718
10364 20:00:41.516176
10365 20:00:41.518057 LZMA decompressing kernel-1 to 0x40000000
10366 20:00:42.906482
10367 20:00:42.906990 jumping to kernel
10368 20:00:42.908954 end: 2.2.4 bootloader-commands (duration 00:00:42) [common]
10369 20:00:42.909428 start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
10370 20:00:42.909794 Setting prompt string to ['Linux version [0-9]']
10371 20:00:42.910141 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10372 20:00:42.910481 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10373 20:00:42.988294
10374 20:00:42.991696 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
10375 20:00:42.995357 start: 2.2.5.1 login-action (timeout 00:03:43) [common]
10376 20:00:42.995942 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10377 20:00:42.996307 Setting prompt string to []
10378 20:00:42.996736 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10379 20:00:42.997116 Using line separator: #'\n'#
10380 20:00:42.997435 No login prompt set.
10381 20:00:42.997749 Parsing kernel messages
10382 20:00:42.998067 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10383 20:00:42.999123 [login-action] Waiting for messages, (timeout 00:03:43)
10384 20:00:43.014539 [ 0.000000] Linux version 6.1.59-cip8-rt4 (KernelCI@build-j84202-arm64-gcc-10-defconfig-arm64-chromebook-st8dj) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sat Oct 28 19:29:28 UTC 2023
10385 20:00:43.017661 [ 0.000000] random: crng init done
10386 20:00:43.024656 [ 0.000000] Machine model: Google Spherion (rev0 - 3)
10387 20:00:43.027756 [ 0.000000] efi: UEFI not found.
10388 20:00:43.034605 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
10389 20:00:43.044380 [ 0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool
10390 20:00:43.051252 [ 0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB
10391 20:00:43.061314 [ 0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool
10392 20:00:43.068117 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
10393 20:00:43.074142 [ 0.000000] printk: bootconsole [mtk8250] enabled
10394 20:00:43.080756 [ 0.000000] NUMA: No NUMA configuration found
10395 20:00:43.087821 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000023fffffff]
10396 20:00:43.091240 [ 0.000000] NUMA: NODE_DATA [mem 0x23efd0a00-0x23efd2fff]
10397 20:00:43.094568 [ 0.000000] Zone ranges:
10398 20:00:43.101043 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
10399 20:00:43.104255 [ 0.000000] DMA32 empty
10400 20:00:43.111539 [ 0.000000] Normal [mem 0x0000000100000000-0x000000023fffffff]
10401 20:00:43.114313 [ 0.000000] Movable zone start for each node
10402 20:00:43.117929 [ 0.000000] Early memory node ranges
10403 20:00:43.124673 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
10404 20:00:43.131558 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
10405 20:00:43.137919 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
10406 20:00:43.144237 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
10407 20:00:43.148135 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000023fffffff]
10408 20:00:43.157822 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000023fffffff]
10409 20:00:43.213367 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
10410 20:00:43.219685 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
10411 20:00:43.226165 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
10412 20:00:43.229684 [ 0.000000] psci: probing for conduit method from DT.
10413 20:00:43.236087 [ 0.000000] psci: PSCIv1.1 detected in firmware.
10414 20:00:43.239537 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
10415 20:00:43.246395 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
10416 20:00:43.249554 [ 0.000000] psci: SMC Calling Convention v1.2
10417 20:00:43.256482 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
10418 20:00:43.259803 [ 0.000000] Detected VIPT I-cache on CPU0
10419 20:00:43.265788 [ 0.000000] CPU features: detected: GIC system register CPU interface
10420 20:00:43.272718 [ 0.000000] CPU features: detected: Virtualization Host Extensions
10421 20:00:43.279753 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
10422 20:00:43.286200 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
10423 20:00:43.292807 [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
10424 20:00:43.299150 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
10425 20:00:43.306197 [ 0.000000] alternatives: applying boot alternatives
10426 20:00:43.309273 [ 0.000000] Fallback order for Node 0: 0
10427 20:00:43.319238 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2063616
10428 20:00:43.319956 [ 0.000000] Policy zone: Normal
10429 20:00:43.335884 [ 0.000000] Kernel command line: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10430 20:00:43.345598 <5>[ 0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.
10431 20:00:43.357837 <6>[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
10432 20:00:43.367806 <6>[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
10433 20:00:43.373982 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
10434 20:00:43.377353 <6>[ 0.000000] software IO TLB: area num 8.
10435 20:00:43.433654 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
10436 20:00:43.583148 <6>[ 0.000000] Memory: 7914324K/8385536K available (17984K kernel code, 4116K rwdata, 17476K rodata, 8448K init, 615K bss, 438444K reserved, 32768K cma-reserved)
10437 20:00:43.589359 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
10438 20:00:43.596301 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
10439 20:00:43.599469 <6>[ 0.000000] rcu: RCU event tracing is enabled.
10440 20:00:43.606382 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
10441 20:00:43.612972 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
10442 20:00:43.615875 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
10443 20:00:43.626106 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
10444 20:00:43.632470 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
10445 20:00:43.636372 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
10446 20:00:43.643845 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
10447 20:00:43.647050 <6>[ 0.000000] GICv3: 608 SPIs implemented
10448 20:00:43.654093 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
10449 20:00:43.657213 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
10450 20:00:43.660321 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
10451 20:00:43.670385 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000
10452 20:00:43.680704 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
10453 20:00:43.694250 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
10454 20:00:43.700328 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
10455 20:00:43.709315 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
10456 20:00:43.722509 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
10457 20:00:43.728965 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
10458 20:00:43.735841 <6>[ 0.009178] Console: colour dummy device 80x25
10459 20:00:43.745731 <6>[ 0.013904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
10460 20:00:43.752054 <6>[ 0.024346] pid_max: default: 32768 minimum: 301
10461 20:00:43.755202 <6>[ 0.029248] LSM: Security Framework initializing
10462 20:00:43.762307 <6>[ 0.034187] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10463 20:00:43.772181 <6>[ 0.042002] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10464 20:00:43.778450 <6>[ 0.051384] cblist_init_generic: Setting adjustable number of callback queues.
10465 20:00:43.785466 <6>[ 0.058827] cblist_init_generic: Setting shift to 3 and lim to 1.
10466 20:00:43.796005 <6>[ 0.065164] cblist_init_generic: Setting adjustable number of callback queues.
10467 20:00:43.799092 <6>[ 0.072637] cblist_init_generic: Setting shift to 3 and lim to 1.
10468 20:00:43.806028 <6>[ 0.079077] rcu: Hierarchical SRCU implementation.
10469 20:00:43.812230 <6>[ 0.079079] rcu: Max phase no-delay instances is 1000.
10470 20:00:43.819224 <6>[ 0.079104] printk: bootconsole [mtk8250] printing thread started
10471 20:00:43.825407 <6>[ 0.097419] EFI services will not be available.
10472 20:00:43.829158 <6>[ 0.097617] smp: Bringing up secondary CPUs ...
10473 20:00:43.832290 <6>[ 0.097928] Detected VIPT I-cache on CPU1
10474 20:00:43.842680 <6>[ 0.097998] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
10475 20:00:43.848394 <6>[ 0.098031] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
10476 20:00:43.857290 <6>[ 0.125955] Detected VIPT I-cache on CPU2
10477 20:00:43.867032 <6>[ 0.126001] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000
10478 20:00:43.873811 <6>[ 0.126015] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]
10479 20:00:43.877364 <6>[ 0.126271] Detected VIPT I-cache on CPU3
10480 20:00:43.884013 <6>[ 0.126317] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000
10481 20:00:43.890968 <6>[ 0.126330] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]
10482 20:00:43.897105 <6>[ 0.126642] CPU features: detected: Spectre-v4
10483 20:00:43.900213 <6>[ 0.126648] CPU features: detected: Spectre-BHB
10484 20:00:43.904207 <6>[ 0.126653] Detected PIPT I-cache on CPU4
10485 20:00:43.910549 <6>[ 0.126712] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000
10486 20:00:43.916752 <6>[ 0.126728] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]
10487 20:00:43.923207 <6>[ 0.127025] Detected PIPT I-cache on CPU5
10488 20:00:43.930162 <6>[ 0.127088] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000
10489 20:00:43.936307 <6>[ 0.127105] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]
10490 20:00:43.940056 <6>[ 0.127379] Detected PIPT I-cache on CPU6
10491 20:00:43.953015 <6>[ 0.127445] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000
10492 20:00:43.959716 <6>[ 0.127461] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]
10493 20:00:43.962759 <6>[ 0.127755] Detected PIPT I-cache on CPU7
10494 20:00:43.969684 <6>[ 0.127821] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000
10495 20:00:43.976096 <6>[ 0.127838] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]
10496 20:00:43.982782 <6>[ 0.127884] smp: Brought up 1 node, 8 CPUs
10497 20:00:43.985769 <6>[ 0.127889] SMP: Total of 8 processors activated.
10498 20:00:43.992813 <6>[ 0.127892] CPU features: detected: 32-bit EL0 Support
10499 20:00:43.999139 <6>[ 0.127894] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
10500 20:00:44.005646 <6>[ 0.127897] CPU features: detected: Common not Private translations
10501 20:00:44.012423 <6>[ 0.127899] CPU features: detected: CRC32 instructions
10502 20:00:44.019505 <6>[ 0.127901] CPU features: detected: RCpc load-acquire (LDAPR)
10503 20:00:44.022746 <6>[ 0.127903] CPU features: detected: LSE atomic instructions
10504 20:00:44.028939 <6>[ 0.127904] CPU features: detected: Privileged Access Never
10505 20:00:44.035803 <6>[ 0.127906] CPU features: detected: RAS Extension Support
10506 20:00:44.042406 <6>[ 0.127909] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
10507 20:00:44.045290 <6>[ 0.127979] CPU: All CPU(s) started at EL2
10508 20:00:44.052152 <6>[ 0.127981] alternatives: applying system-wide alternatives
10509 20:00:44.055617 <6>[ 0.140975] devtmpfs: initialized
10510 20:00:44.087713 �B�͡�������*��ɥ������Bzɑ�Ɂ�b��ʲ�ѕͥjR�<6>[ 0.359051] printk: consol<e [ttyS0] printing thread started
10511 20:00:44.091438 6<6>[ 0.359082] printk: console [ttyS0] enabled
10512 20:00:44.094768 >[ 0.225910] pnp: PnP ACPI: disabled
10513 20:00:44.101081 <6>[ 0.359087] printk: bootconsole [mtk8250] disabled
10514 20:00:44.108278 <6>[ 0.373063] printk: bootconsole [mtk8250] printing thread stopped
10515 20:00:44.111127 <6>[ 0.374526] SuperH (H)SCI(F) driver initialized
10516 20:00:44.114414 <6>[ 0.375037] msm_serial: driver initialized
10517 20:00:44.124502 <6>[ 0.379867] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000
10518 20:00:44.134405 <6>[ 0.379896] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000
10519 20:00:44.144320 <6>[ 0.379926] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000
10520 20:00:44.150203 <6>[ 0.379956] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000
10521 20:00:44.168754 <6>[ 0.379978] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000
10522 20:00:44.184594 <6>[ 0.380006] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000
10523 20:00:44.185819 <6>[ 0.380033] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000
10524 20:00:44.189318 <6>[ 0.380152] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000
10525 20:00:44.194944 <6>[ 0.380184] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000
10526 20:00:44.199367 <6>[ 0.388740] loop: module loaded
10527 20:00:44.205613 <6>[ 0.391260] vgpu11_sshub: Bringing 400000uV into 575000-575000uV
10528 20:00:44.208653 <4>[ 0.408270] mtk-pmic-keys: Failed to locate of_node [id: -1]
10529 20:00:44.212347 <6>[ 0.409222] megasas: 07.719.03.00-rc1
10530 20:00:44.218840 <6>[ 0.421078] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2
10531 20:00:44.225525 <6>[ 0.421135] spi-nor spi2.0: w25q64jwm (8192 Kbytes)
10532 20:00:44.232277 <6>[ 0.433219] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)
10533 20:00:44.242700 <6>[ 0.486699] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_B:0.6.171/cr50_v3.94_pp.126-3593b
10534 20:00:46.352053 <6>[ 2.624436] Freeing initrd memory: 55100K
10535 20:00:46.360014 <6>[ 2.630522] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz
10536 20:00:46.366733 <6>[ 2.635229] tun: Universal TUN/TAP device driver, 1.6
10537 20:00:46.369955 <6>[ 2.636009] thunder_xcv, ver 1.0
10538 20:00:46.372870 <6>[ 2.636028] thunder_bgx, ver 1.0
10539 20:00:46.376864 <6>[ 2.636043] nicpf, ver 1.0
10540 20:00:46.382817 <6>[ 2.637131] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
10541 20:00:46.389980 <6>[ 2.637134] hns3: Copyright (c) 2017 Huawei Corporation.
10542 20:00:46.393078 <6>[ 2.637162] hclge is initializing
10543 20:00:46.399901 <6>[ 2.637176] e1000: Intel(R) PRO/1000 Network Driver
10544 20:00:46.403351 <6>[ 2.637177] e1000: Copyright (c) 1999-2006 Intel Corporation.
10545 20:00:46.410820 <6>[ 2.637193] e1000e: Intel(R) PRO/1000 Network Driver
10546 20:00:46.414590 <6>[ 2.637195] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
10547 20:00:46.421958 <6>[ 2.637210] igb: Intel(R) Gigabit Ethernet Network Driver
10548 20:00:46.425654 <6>[ 2.637212] igb: Copyright (c) 2007-2014 Intel Corporation.
10549 20:00:46.432262 <6>[ 2.637228] igbvf: Intel(R) Gigabit Virtual Function Network Driver
10550 20:00:46.439299 <6>[ 2.637230] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
10551 20:00:46.442431 <6>[ 2.637527] sky2: driver version 1.30
10552 20:00:46.448887 <6>[ 2.638655] VFIO - User Level meta-driver version: 0.3
10553 20:00:46.456339 <6>[ 2.641601] usbcore: registered new interface driver usb-storage
10554 20:00:46.462692 <6>[ 2.641817] usbcore: registered new device driver onboard-usb-hub
10555 20:00:46.466500 <6>[ 2.644597] mt6397-rtc mt6359-rtc: registered as rtc0
10556 20:00:46.476233 <6>[ 2.644747] mt6397-rtc mt6359-rtc: setting system clock to 2023-10-28T19:59:11 UTC (1698523151)
10557 20:00:46.479140 <6>[ 2.645386] i2c_dev: i2c /dev entries driver
10558 20:00:46.489319 <6>[ 2.652657] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
10559 20:00:46.492513 <6>[ 2.667673] cpu cpu0: EM: created perf domain
10560 20:00:46.499685 <6>[ 2.667982] cpu cpu4: EM: created perf domain
10561 20:00:46.502906 <6>[ 2.671942] sdhci: Secure Digital Host Controller Interface driver
10562 20:00:46.508876 <6>[ 2.671944] sdhci: Copyright(c) Pierre Ossman
10563 20:00:46.515973 <6>[ 2.672309] Synopsys Designware Multimedia Card Interface Driver
10564 20:00:46.522827 <6>[ 2.672682] sdhci-pltfm: SDHCI platform and OF driver helper
10565 20:00:46.525691 <6>[ 2.677288] mmc0: CQHCI version 5.10
10566 20:00:46.532278 <6>[ 2.683291] ledtrig-cpu: registered to indicate activity on CPUs
10567 20:00:46.538898 <6>[ 2.684115] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000
10568 20:00:46.542375 <6>[ 2.684412] usbcore: registered new interface driver usbhid
10569 20:00:46.549066 <6>[ 2.684414] usbhid: USB HID core driver
10570 20:00:46.555716 <6>[ 2.684537] spi_master spi0: will run message pump with realtime priority
10571 20:00:46.569307 <6>[ 2.715332] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0
10572 20:00:46.582015 <6>[ 2.717167] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1
10573 20:00:46.585561 <6>[ 2.719266] cros-ec-spi spi0.0: Chrome EC device registered
10574 20:00:46.595457 <6>[ 2.739060] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)
10575 20:00:46.601816 <6>[ 2.742058] NET: Registered PF_PACKET protocol family
10576 20:00:46.605075 <6>[ 2.742177] 9pnet: Installing 9P2000 support
10577 20:00:46.608608 <5>[ 2.742219] Key type dns_resolver registered
10578 20:00:46.615230 <6>[ 2.742675] registered taskstats version 1
10579 20:00:46.618466 <5>[ 2.742694] Loading compiled-in X.509 certificates
10580 20:00:46.628610 <4>[ 2.758466] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10581 20:00:46.641832 <4>[ 2.758635] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10582 20:00:46.648301 <3>[ 2.758648] debugfs: File 'uA_load' in directory '/' already present!
10583 20:00:46.654849 <3>[ 2.758657] debugfs: File 'min_uV' in directory '/' already present!
10584 20:00:46.661399 <3>[ 2.758661] debugfs: File 'max_uV' in directory '/' already present!
10585 20:00:46.667992 <3>[ 2.758665] debugfs: File 'constraint_flags' in directory '/' already present!
10586 20:00:46.674825 <3>[ 2.760878] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)
10587 20:00:46.681141 <6>[ 2.772391] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102
10588 20:00:46.688079 <6>[ 2.773187] xhci-mtk 11200000.usb: xHCI Host Controller
10589 20:00:46.694581 <6>[ 2.773214] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
10590 20:00:46.704606 <6>[ 2.773506] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
10591 20:00:46.711224 <6>[ 2.773584] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000
10592 20:00:46.718264 <6>[ 2.773816] xhci-mtk 11200000.usb: xHCI Host Controller
10593 20:00:46.724354 <6>[ 2.773831] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
10594 20:00:46.731187 <6>[ 2.773844] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed
10595 20:00:46.734523 <6>[ 2.774591] hub 1-0:1.0: USB hub found
10596 20:00:46.741113 <6>[ 2.774623] hub 1-0:1.0: 1 port detected
10597 20:00:46.747742 <6>[ 2.775030] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
10598 20:00:46.751155 <6>[ 2.775575] hub 2-0:1.0: USB hub found
10599 20:00:46.757261 <6>[ 2.775603] hub 2-0:1.0: 1 port detected
10600 20:00:46.760953 <6>[ 2.776387] mmc0: Command Queue Engine enabled
10601 20:00:46.767601 <6>[ 2.776401] mmc0: new HS400 Enhanced strobe MMC card at address 0001
10602 20:00:46.771264 <6>[ 2.776988] mmcblk0: mmc0:0001 DA4128 116 GiB
10603 20:00:46.777783 <6>[ 2.780051] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
10604 20:00:46.783960 <6>[ 2.781111] mmcblk0boot0: mmc0:0001 DA4128 4.00 MiB
10605 20:00:46.787422 <6>[ 2.781238] mtk-msdc 11f70000.mmc: Got CD GPIO
10606 20:00:46.794199 <6>[ 2.781915] mmcblk0boot1: mmc0:0001 DA4128 4.00 MiB
10607 20:00:46.800868 <6>[ 2.782537] mmcblk0rpmb: mmc0:0001 DA4128 16.0 MiB, chardev (507:0)
10608 20:00:46.807285 <6>[ 2.797004] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()
10609 20:00:46.813608 <6>[ 2.797013] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()
10610 20:00:46.823765 <4>[ 2.797166] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW
10611 20:00:46.833670 <6>[ 2.797830] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()
10612 20:00:46.839919 <6>[ 2.797835] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()
10613 20:00:46.846795 <6>[ 2.797957] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()
10614 20:00:46.856685 <6>[ 2.797968] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()
10615 20:00:46.863683 <6>[ 2.797972] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()
10616 20:00:46.873339 <6>[ 2.797980] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39
10617 20:00:46.879671 <6>[ 2.799404] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)
10618 20:00:46.890378 <6>[ 2.799421] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)
10619 20:00:46.896587 <6>[ 2.799428] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)
10620 20:00:46.907022 <6>[ 2.799434] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)
10621 20:00:46.913170 <6>[ 2.799440] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)
10622 20:00:46.923310 <6>[ 2.799447] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)
10623 20:00:46.930031 <6>[ 2.799453] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)
10624 20:00:46.939494 <6>[ 2.799459] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)
10625 20:00:46.946263 <6>[ 2.799465] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
10626 20:00:46.956150 <6>[ 2.799471] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
10627 20:00:46.965903 <6>[ 2.799477] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)
10628 20:00:46.972790 <6>[ 2.799483] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)
10629 20:00:46.982484 <6>[ 2.799489] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)
10630 20:00:46.989307 <6>[ 2.799495] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)
10631 20:00:46.999622 <6>[ 2.799500] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)
10632 20:00:47.005714 <6>[ 2.799980] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0
10633 20:00:47.012533 <6>[ 2.800809] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0
10634 20:00:47.019596 <6>[ 2.801352] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0
10635 20:00:47.026025 <6>[ 2.801995] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0
10636 20:00:47.032362 <6>[ 2.802650] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0
10637 20:00:47.038929 <6>[ 2.802856] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)
10638 20:00:47.048574 <6>[ 2.802867] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)
10639 20:00:47.058787 <6>[ 2.802872] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)
10640 20:00:47.068677 <6>[ 2.802878] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)
10641 20:00:47.079102 <6>[ 2.802883] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)
10642 20:00:47.084799 <6>[ 2.802894] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)
10643 20:00:47.095529 <6>[ 2.802901] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)
10644 20:00:47.105437 <6>[ 2.802905] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)
10645 20:00:47.115493 <6>[ 2.802909] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)
10646 20:00:47.125236 <6>[ 2.802916] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing
10647 20:00:47.135484 <6>[ 2.802921] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing
10648 20:00:47.141570 <6>[ 2.804043] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0
10649 20:00:47.151614 <6>[ 3.158039] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
10650 20:00:47.154469 <6>[ 3.188742] hub 2-1:1.0: USB hub found
10651 20:00:47.157723 <6>[ 3.189088] hub 2-1:1.0: 3 ports detected
10652 20:00:47.164503 <6>[ 3.309814] usb 1-1: new high-speed USB device number 2 using xhci-mtk
10653 20:00:47.192000 <6>[ 3.462476] hub 1-1:1.0: USB hub found
10654 20:00:47.195492 <6>[ 3.462874] hub 1-1:1.0: 4 ports detected
10655 20:00:47.271247 <6>[ 3.538170] usb 2-1.3: new SuperSpeed USB device number 3 using xhci-mtk
10656 20:00:47.507486 <6>[ 3.773992] usb 1-1.4: new high-speed USB device number 3 using xhci-mtk
10657 20:00:47.632029 <6>[ 3.901816] hub 1-1.4:1.0: USB hub found
10658 20:00:47.635237 <6>[ 3.902284] hub 1-1.4:1.0: 2 ports detected
10659 20:00:47.923101 <6>[ 4.189960] usb 1-1.4.1: new high-speed USB device number 4 using xhci-mtk
10660 20:00:48.107628 <6>[ 4.373966] usb 1-1.4.2: new high-speed USB device number 5 using xhci-mtk
10661 20:00:58.831705 <6>[ 15.106788] ALSA device list:
10662 20:00:58.838553 <6>[ 15.106809] No soundcards found.
10663 20:00:58.841644 <6>[ 15.111239] Freeing unused kernel memory: 8448K
10664 20:00:58.844688 <6>[ 15.111403] Run /init as init process
10665 20:00:58.878907 <6>[ 15.153456] NET: Registered PF_INET6 protocol family
10666 20:00:58.882019 <6>[ 15.154802] Segment Routing with IPv6
10667 20:00:58.888180 <6>[ 15.154817] In-situ OAM (IOAM) with IPv6
10668 20:00:58.893094
10669 20:00:58.916164 Welcome to [1mDebian GNU/Linu<30>[ 15.170590] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
10670 20:00:58.922772 x 11 (bullseye)<30>[ 15.171153] systemd[1]: Detected architecture arm64.
10671 20:00:58.926315 [0m!
10672 20:00:58.926943
10673 20:00:58.942901 <30>[ 15.214141] systemd[1]: Set hostname to <debian-bullseye-arm64>.
10674 20:00:59.058400 <30>[ 15.327476] systemd[1]: Queued start job for default target Graphical Interface.
10675 20:00:59.087358 [[0;32m OK [0m] Created slice [0;1;39msyste<30>[ 15.358869] systemd[1]: Created slice system-getty.slice.
10676 20:00:59.090761 m-getty.slice[0m.
10677 20:00:59.114621 [[0;32m OK [0m] Created slice [0;1;39msyste<30>[ 15.382588] systemd[1]: Created slice system-modprobe.slice.
10678 20:00:59.115154 m-modprobe.slice[0m.
10679 20:00:59.135313 [[0;32m OK [0m] Created slic<30>[ 15.406976] systemd[1]: Created slice system-serial\x2dgetty.slice.
10680 20:00:59.141682 e [0;1;39msystem-serial\x2dgetty.slice[0m.
10681 20:00:59.160280 [[0;32m OK [0m] Created slic<30>[ 15.431628] systemd[1]: Created slice User and Session Slice.
10682 20:00:59.164002 e [0;1;39mUser and Session Slice[0m.
10683 20:00:59.186586 [[0;32m OK [0m] Started [0;1;39mDispatch Pa<30>[ 15.454771] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
10684 20:00:59.190470 ssword …ts to Console Directory Watch[0m.
10685 20:00:59.214356 [[0;32m OK [0m] Started [0;1;39mForward Pas<30>[ 15.482690] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
10686 20:00:59.217576 sword R…uests to Wall Directory Watch[0m.
10687 20:00:59.246018 [[0;32m OK [0m] Reached target [0;1;39mLoca<30>[ 15.510481] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.
10688 20:00:59.255993 l Encrypted Volu<30>[ 15.510770] systemd[1]: Reached target Local Encrypted Volumes.
10689 20:00:59.256507 mes[0m.
10690 20:00:59.274337 [[0;32m OK [0m] Reached target [0;1;39mPath<30>[ 15.546096] systemd[1]: Reached target Paths.
10691 20:00:59.275010 s[0m.
10692 20:00:59.297731 [[0;32m OK [0m] Reached target [0;1;39mRemo<30>[ 15.566355] systemd[1]: Reached target Remote File Systems.
10693 20:00:59.298157 te File Systems[0m.
10694 20:00:59.318375 [[0;32m OK [0m] Reached target [0;1;39mSlic<30>[ 15.589949] systemd[1]: Reached target Slices.
10695 20:00:59.318809 es[0m.
10696 20:00:59.337952 [[0;32m OK [0m] Reached target [0;1;39mSwap<30>[ 15.610003] systemd[1]: Reached target Swap.
10697 20:00:59.338337 [0m.
10698 20:00:59.359190 [[0;32m OK [0m] Listening on<30>[ 15.630865] systemd[1]: Listening on initctl Compatibility Named Pipe.
10699 20:00:59.365989 [0;1;39minitctl Compatibility Named Pipe[0m.
10700 20:00:59.375754 [[0;32m OK [0m] Listening on [0;1;39mJourna<30>[ 15.646273] systemd[1]: Listening on Journal Audit Socket.
10701 20:00:59.379144 l Audit Socket[0m.
10702 20:00:59.402066 [[0;32m OK [0m] Listening on [0;1;39mJourna<30>[ 15.670608] systemd[1]: Listening on Journal Socket (/dev/log).
10703 20:00:59.402459 l Socket (/dev/log)[0m.
10704 20:00:59.423688 [[0;32m OK [0m] Listening on<30>[ 15.695154] systemd[1]: Listening on Journal Socket.
10705 20:00:59.426820 [0;1;39mJournal Socket[0m.
10706 20:00:59.442284 [[0;32m OK [0m] Listening on [0;1;39mudev C<30>[ 15.714549] systemd[1]: Listening on udev Control Socket.
10707 20:00:59.445645 ontrol Socket[0m.
10708 20:00:59.467226 [[0;32m OK [0m] Listening on<30>[ 15.739000] systemd[1]: Listening on udev Kernel Socket.
10709 20:00:59.470318 [0;1;39mudev Kernel Socket[0m.
10710 20:00:59.526572 Mounting [0;1;39mHuge Pages File Syste<30>[ 15.798292] systemd[1]: Mounting Huge Pages File System...
10711 20:00:59.529775 m[0m...
10712 20:00:59.553115 Mounting [0;1;39mPOSIX Message Queue F<30>[ 15.822066] systemd[1]: Mounting POSIX Message Queue File System...
10713 20:00:59.553200 ile System[0m...
10714 20:00:59.581183 Mounting [0;1;39mKernel Debug File Sys<30>[ 15.850071] systemd[1]: Mounting Kernel Debug File System...
10715 20:00:59.581268 tem[0m...
10716 20:00:59.603694 Startin<30>[ 15.870157] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
10717 20:00:59.613798 g [0;1;39mCreat<30>[ 15.872624] systemd[1]: Starting Create list of static device nodes for the current kernel...
10718 20:00:59.616989 e list of st…odes for the current kernel[0m...
10719 20:00:59.641746 Starting [0;1;39mLoad Kernel Module co<30>[ 15.910484] systemd[1]: Starting Load Kernel Module configfs...
10720 20:00:59.642135 nfigfs[0m...
10721 20:00:59.665358 Starting [0;1;39mLoad Kernel Module dr<30>[ 15.933935] systemd[1]: Starting Load Kernel Module drm...
10722 20:00:59.665772 m[0m...
10723 20:00:59.685579 <30>[ 15.954133] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.
10724 20:00:59.699444 Starting [0;1;39mJourn<30>[ 15.970942] systemd[1]: Starting Journal Service...
10725 20:00:59.699866 al Service[0m...
10726 20:00:59.720343 Startin<30>[ 15.992806] systemd[1]: Starting Load Kernel Modules...
10727 20:00:59.723784 g [0;1;39mLoad Kernel Modules[0m...
10728 20:00:59.747353 Starting [0;1;39mRemou<30>[ 16.019103] systemd[1]: Starting Remount Root and Kernel File Systems...
10729 20:00:59.753706 nt Root and Kernel File Systems[0m...
10730 20:00:59.778273 Starting [0;1;39mColdplug All udev Dev<30>[ 16.046276] systemd[1]: Starting Coldplug All udev Devices...
10731 20:00:59.778749 ices[0m...
10732 20:00:59.799873 [[0;32m OK [0m] Started [0;1;39mJournal Ser<30>[ 16.070998] systemd[1]: Started Journal Service.
10733 20:00:59.802568 vice[0m.
10734 20:00:59.819115 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
10735 20:00:59.836041 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
10736 20:00:59.852638 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
10737 20:00:59.871890 [[0;32m OK [0m] Finished [0;1;39mCreate list of st… nodes for the current kernel[0m.
10738 20:00:59.892294 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
10739 20:00:59.913465 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
10740 20:00:59.936019 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
10741 20:00:59.960817 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
10742 20:00:59.978538 See 'systemctl status systemd-remount-fs.service' for details.
10743 20:01:00.033027 Mounting [0;1;39mKernel Configuration File System[0m...
10744 20:01:00.057921 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
10745 20:01:00.073915 <46>[ 16.343344] systemd-journald[194]: Received client request to flush runtime journal.
10746 20:01:00.099939 Starting [0;1;39mLoad/Save Random Seed[0m...
10747 20:01:00.123308 Starting [0;1;39mApply Kernel Variables[0m...
10748 20:01:00.146761 Starting [0;1;39mCreate System Users[0m...
10749 20:01:00.165322 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
10750 20:01:00.183217 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
10751 20:01:00.203507 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
10752 20:01:00.216616 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
10753 20:01:00.236569 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
10754 20:01:00.252338 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
10755 20:01:00.308005 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
10756 20:01:00.340253 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
10757 20:01:00.355603 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
10758 20:01:00.370973 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
10759 20:01:00.435828 Starting [0;1;39mCreate Volatile Files and Directories[0m...
10760 20:01:00.463318 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
10761 20:01:00.485570 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
10762 20:01:00.505082 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
10763 20:01:00.571895 Starting [0;1;39mNetwork Time Synchronization[0m...
10764 20:01:00.591141 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
10765 20:01:00.638811 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
10766 20:01:00.677743 <6>[ 16.949227] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:
10767 20:01:00.684169 <6>[ 16.949272] mtk-pcie-gen3 11230000.pcie: MEM 0x0012000000..0x00127fffff -> 0x0012000000
10768 20:01:00.697545 [[0;32m OK [0m] Created slice [0;1;39msyste<6>[ 16.949282] mtk-pcie-gen3 11230000.pcie: IO 0x0012800000..0x0012ffffff -> 0x0012800000
10769 20:01:00.707629 m-systemd\x2dbac<6>[ 16.978477] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000
10770 20:01:00.707743 klight.slice[0m.
10771 20:01:00.714070 <6>[ 16.989605] remoteproc remoteproc0: scp is available
10772 20:01:00.724125 <3>[ 16.991257] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10773 20:01:00.731250 <3>[ 16.991343] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10774 20:01:00.740965 <3>[ 16.991358] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10775 20:01:00.747436 <6>[ 16.991777] remoteproc remoteproc0: powering up scp
10776 20:01:00.757465 [[0;32m OK [<6>[ 16.991799] remoteproc remoteproc0: Booting fw image mediatek/mt8192/scp.img, size 309164
10777 20:01:00.764227 0m] Reached targ<6>[ 16.991829] mtk-scp 10500000.scp: IPI buf addr 0x000ffdb0
10778 20:01:00.774037 et [0;1;39mSyst<3>[ 16.993203] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10779 20:01:00.784221 em Time Set[0m.<3>[ 16.993217] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10780 20:01:00.790769 <3>[ 16.993225] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10781 20:01:00.791186
10782 20:01:00.801095 <3>[ 16.993235] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10783 20:01:00.807952 <3>[ 16.993242] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10784 20:01:00.817604 <3>[ 16.993289] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10785 20:01:00.824265 <3>[ 16.993352] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10786 20:01:00.834320 <3>[ 16.993360] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10787 20:01:00.841249 <3>[ 16.993366] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10788 20:01:00.847722 <3>[ 16.993421] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10789 20:01:00.858054 <3>[ 16.993429] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10790 20:01:00.864530 <3>[ 16.993435] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10791 20:01:00.875277 <3>[ 16.993442] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10792 20:01:00.881656 <3>[ 16.993449] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10793 20:01:00.888617 <3>[ 16.993486] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10794 20:01:00.898431 <4>[ 17.007292] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator
10795 20:01:00.905607 <4>[ 17.007372] elants_i2c 4-0010: supply vccio not found, using dummy regulator
10796 20:01:00.912109 [[0;32m OK [<6>[ 17.010911] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered
10797 20:01:00.919613 0m] Reached targ<6>[ 17.072141] usbcore: registered new interface driver r8152
10798 20:01:00.926422 <6>[ 17.081277] mc: Linux media interface: v0.10
10799 20:01:00.936350 et [0;1;39mSyst<4>[ 17.081625] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
10800 20:01:00.939800 <4>[ 17.081625] Fallback method does not support PEC.
10801 20:01:00.947249 <6>[ 17.106343] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00
10802 20:01:00.953445 <6>[ 17.106355] pci_bus 0000:00: root bus resource [bus 00-ff]
10803 20:01:00.960549 <6>[ 17.106361] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]
10804 20:01:00.970101 <6>[ 17.106363] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])
10805 20:01:00.976284 em Time Synchron<6>[ 17.106398] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400
10806 20:01:00.983375 <6>[ 17.106411] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]
10807 20:01:00.990104 <6>[ 17.106478] pci 0000:00:00.0: supports D1 D2
10808 20:01:00.997026 <6>[ 17.106479] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10809 20:01:00.997444 ized[0m.
10810 20:01:01.007383 <6>[ 17.107465] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
10811 20:01:01.009844 <6>[ 17.107543] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000
10812 20:01:01.020438 <6>[ 17.107567] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
10813 20:01:01.027171 <6>[ 17.107582] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
10814 20:01:01.034133 <6>[ 17.107597] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
10815 20:01:01.037906 <6>[ 17.107698] pci 0000:01:00.0: supports D1 D2
10816 20:01:01.044677 <6>[ 17.107699] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10817 20:01:01.051349 <6>[ 17.117051] mtk-scp 10500000.scp: creating channel cros-ec-rpmsg addr 0xd
10818 20:01:01.061446 <6>[ 17.117111] mtk-scp 10500000.scp: SCP is ready. FW version asurada_scp_v2.0.20536+a3bcde3e
10819 20:01:01.068655 <6>[ 17.117120] remoteproc remoteproc0: remote processor scp is now up
10820 20:01:01.075625 <6>[ 17.117769] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
10821 20:01:01.082191 <6>[ 17.117806] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]
10822 20:01:01.088795 <6>[ 17.117812] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]
10823 20:01:01.098817 <6>[ 17.117826] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]
10824 20:01:01.105529 <6>[ 17.117842] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]
10825 20:01:01.113170 <6>[ 17.117858] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]
10826 20:01:01.119781 <6>[ 17.117874] pci 0000:00:00.0: PCI bridge to [bus 01]
10827 20:01:01.126631 <6>[ 17.117883] pci 0000:00:00.0: bridge window [mem 0x12000000-0x121fffff 64bit pref]
10828 20:01:01.133395 <6>[ 17.118066] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
10829 20:01:01.140467 <6>[ 17.119381] pcieport 0000:00:00.0: PME: Signaling with IRQ 282
10830 20:01:01.146923 <6>[ 17.119660] pcieport 0000:00:00.0: AER: enabled with IRQ 282
10831 20:01:01.154629 <6>[ 17.125026] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input2
10832 20:01:01.164728 <3>[ 17.151101] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10833 20:01:01.174737 <6>[ 17.178364] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0002, Sample: 0x0004, IAP: 0x0003
10834 20:01:01.181567 <3>[ 17.180030] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10835 20:01:01.191435 <6>[ 17.180551] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input3
10836 20:01:01.198757 <6>[ 17.196635] videodev: Linux video capture interface: v2.00
10837 20:01:01.205525 <3>[ 17.199730] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10838 20:01:01.215567 <3>[ 17.221432] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10839 20:01:01.221953 <6>[ 17.250979] usb 2-1.3: reset SuperSpeed USB device number 3 using xhci-mtk
10840 20:01:01.225597 <6>[ 17.261500] Bluetooth: Core ver 2.22
10841 20:01:01.232197 <6>[ 17.262127] usbcore: registered new interface driver cdc_ether
10842 20:01:01.238876 <6>[ 17.262595] NET: Registered PF_BLUETOOTH protocol family
10843 20:01:01.245061 <6>[ 17.262602] Bluetooth: HCI device and connection manager initialized
10844 20:01:01.248805 <6>[ 17.262650] Bluetooth: HCI socket layer initialized
10845 20:01:01.255342 <6>[ 17.262656] Bluetooth: L2CAP socket layer initialized
10846 20:01:01.258763 <6>[ 17.262680] Bluetooth: SCO socket layer initialized
10847 20:01:01.268779 <3>[ 17.264957] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10848 20:01:01.279007 <4>[ 17.280236] r8152 2-1.3:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
10849 20:01:01.285290 <4>[ 17.280247] r8152 2-1.3:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
10850 20:01:01.291823 <6>[ 17.293282] usbcore: registered new interface driver r8153_ecm
10851 20:01:01.298735 <6>[ 17.308692] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)
10852 20:01:01.312293 <6>[ 17.311391] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4
10853 20:01:01.318589 <6>[ 17.311602] usbcore: registered new interface driver uvcvideo
10854 20:01:01.324986 <3>[ 17.326313] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10855 20:01:01.335318 <6>[ 17.328621] cros-ec-dev cros-ec-dev.10.auto: CrOS System Control Processor MCU detected
10856 20:01:01.341934 <6>[ 17.330479] cros-ec-rpmsg 10500000.scp.cros-ec-rpmsg.13.-1: Chrome EC device registered
10857 20:01:01.348325 <6>[ 17.334737] usbcore: registered new interface driver btusb
10858 20:01:01.355133 <5>[ 17.335746] cfg80211: Loading compiled-in X.509 certificates for regulatory database
10859 20:01:01.368557 <4>[ 17.335980] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2
10860 20:01:01.371803 <3>[ 17.335992] Bluetooth: hci0: Failed to load firmware file (-2)
10861 20:01:01.378849 <3>[ 17.335995] Bluetooth: hci0: Failed to set up firmware (-2)
10862 20:01:01.388187 <4>[ 17.336002] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.
10863 20:01:01.395274 <6>[ 17.337804] r8152 2-1.3:1.0 eth0: v1.12.13
10864 20:01:01.398278 <6>[ 17.345580] r8152 2-1.3:1.0 enx00e04c787aaa: renamed from eth0
10865 20:01:01.405054 <5>[ 17.349770] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
10866 20:01:01.414479 <3>[ 17.356191] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10867 20:01:01.424726 <3>[ 17.357041] power_supply sbs-5-000b: driver failed to report `capacity_error_margin' property: -6
10868 20:01:01.431707 <6>[ 17.357435] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0
10869 20:01:01.437791 <3>[ 17.371008] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10870 20:01:01.447729 <3>[ 17.393176] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10871 20:01:01.458045 <4>[ 17.698532] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
10872 20:01:01.460888 <6>[ 17.698552] cfg80211: failed to load regulatory.db
10873 20:01:01.470650 Starting [0;1;39mLoad/Save Screen …of leds:white:kbd_backlight[0m...
10874 20:01:01.488621 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
10875 20:01:01.501984 <6>[ 17.771558] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000
10876 20:01:01.508565 <6>[ 17.771667] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)
10877 20:01:01.518551 [[0;32m OK [0m] Finished [0;1;39mLoad/Save <6>[ 17.792088] mt7921e 0000:01:00.0: ASIC revision: 79610010
10878 20:01:01.524798 Screen …s of leds:white:kbd_backlight[0m.
10879 20:01:01.549505 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyS0[0m.
10880 20:01:01.617140 <4>[ 17.884963] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10881 20:01:01.684261 [[0;32m OK [0m] Reached target [0;1;39mBluetooth[0m.
10882 20:01:01.699185 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
10883 20:01:01.725155 [[0;32m OK [0m] Started [0;1;39mDiscard unu<4>[ 17.992277] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10884 20:01:01.728680 sed blocks once a week[0m.
10885 20:01:01.745890 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
10886 20:01:01.758231 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
10887 20:01:01.778264 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
10888 20:01:01.790692 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
10889 20:01:01.811025 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
10890 20:01:01.832985 <4>[ 18.099972] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10891 20:01:01.839421 [[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
10892 20:01:01.887953 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
10893 20:01:01.920895 Starting [0;1;39mUser Login Management[0m...
10894 20:01:01.941172 <4>[ 18.209146] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10895 20:01:01.947596 Starting [0;1;39mPermit User Sessions[0m...
10896 20:01:01.969762 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
10897 20:01:01.999171 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
10898 20:01:02.022550 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS0[0m.
10899 20:01:02.040808 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
10900 20:01:02.055361 <4>[ 18.320440] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10901 20:01:02.065121 Starting [0;1;39mLoad/Save RF Kill Switch Status[0m...
10902 20:01:02.084261 [[0;32m OK [0m] Started [0;1;39mLoad/Save RF Kill Switch Status[0m.
10903 20:01:02.104170 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
10904 20:01:02.123691 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
10905 20:01:02.144505 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
10906 20:01:02.163480 <4>[ 18.428448] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10907 20:01:02.203912 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
10908 20:01:02.240165 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
10909 20:01:02.271118 <4>[ 18.536797] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10910 20:01:02.285827
10911 20:01:02.286361
10912 20:01:02.288970 Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0
10913 20:01:02.289511
10914 20:01:02.292233 debian-bullseye-arm64 login: root (automatic login)
10915 20:01:02.292672
10916 20:01:02.293006
10917 20:01:02.317972 Linux debian-bullseye-arm64 6.1.59-cip8-rt4 #1 SMP PREEMPT Sat Oct 28 19:29:28 UTC 2023 aarch64
10918 20:01:02.318481
10919 20:01:02.324308 The programs included with the Debian GNU/Linux system are free software;
10920 20:01:02.331610 the exact distribution terms for each program are described in the
10921 20:01:02.334718 individual files in /usr/share/doc/*/copyright.
10922 20:01:02.335240
10923 20:01:02.341444 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
10924 20:01:02.344586 permitted by applicable law.
10925 20:01:02.346064 Matched prompt #10: / #
10927 20:01:02.347045 Setting prompt string to ['/ #']
10928 20:01:02.347467 end: 2.2.5.1 login-action (duration 00:00:19) [common]
10930 20:01:02.348468 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
10931 20:01:02.348908 start: 2.2.6 expect-shell-connection (timeout 00:03:24) [common]
10932 20:01:02.349255 Setting prompt string to ['/ #']
10933 20:01:02.349563 Forcing a shell prompt, looking for ['/ #']
10935 20:01:02.400428 / #
10936 20:01:02.401046 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
10937 20:01:02.401473 Waiting using forced prompt support (timeout 00:02:30)
10938 20:01:02.401959 <4>[ 18.644655] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10939 20:01:02.406941
10940 20:01:02.407853 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
10941 20:01:02.408321 start: 2.2.7 export-device-env (timeout 00:03:24) [common]
10942 20:01:02.408790 end: 2.2.7 export-device-env (duration 00:00:00) [common]
10943 20:01:02.409209 end: 2.2 depthcharge-retry (duration 00:01:36) [common]
10944 20:01:02.409618 end: 2 depthcharge-action (duration 00:01:36) [common]
10945 20:01:02.410048 start: 3 lava-test-retry (timeout 00:08:01) [common]
10946 20:01:02.410476 start: 3.1 lava-test-shell (timeout 00:08:01) [common]
10947 20:01:02.410841 Using namespace: common
10949 20:01:02.511994 / # #
10950 20:01:02.512601 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
10951 20:01:02.513142 #<4>[ 18.752276] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10952 20:01:02.518740
10953 20:01:02.519566 Using /lava-11899592
10955 20:01:02.620922 / # export SHELL=/bin/sh
10956 20:01:02.621643 export SHELL=/bin/sh<4>[ 18.860055] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10957 20:01:02.626916
10959 20:01:02.728460 / # . /lava-11899592/environment
10960 20:01:02.729254 . /lava-11899592/environment<3>[ 18.965933] mt7921e 0000:01:00.0: hardware init failed
10961 20:01:02.735017
10963 20:01:02.836784 / # /lava-11899592/bin/lava-test-runner /lava-11899592/0
10964 20:01:02.837389 Test shell timeout: 10s (minimum of the action and connection timeout)
10965 20:01:02.843253 /lava-11899592/bin/lava-test-runner /lava-11899592/0
10966 20:01:02.869871 + export TESTRUN_ID=0_igt-kms-mediatek
10967 20:01:02.872809 + cd /lava-11899592/0/tests/0_igt-kms-mediatek
10968 20:01:02.873251 + cat uuid
10969 20:01:02.883018 + UUID=1189959<8>[ 19.147570] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 11899592_1.5.2.3.1>
10970 20:01:02.883554 2_1.5.2.3.1
10971 20:01:02.884052 + set +x
10972 20:01:02.884759 Received signal: <STARTRUN> 0_igt-kms-mediatek 11899592_1.5.2.3.1
10973 20:01:02.885152 Starting test lava.0_igt-kms-mediatek (11899592_1.5.2.3.1)
10974 20:01:02.885687 Skipping test definition patterns.
10975 20:01:02.902988 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats core_getversion core_setmaster_vs_auth drm_read kms_addfb_basic kms_atomic kms_flip_event_leak kms_prop_blob kms_setmode kms_vblank
10976 20:01:02.910519 <8>[ 19.182107] <LAVA_SIGNAL_TESTSET START core_auth>
10977 20:01:02.911334 Received signal: <TESTSET> START core_auth
10978 20:01:02.911857 Starting test_set core_auth
10979 20:01:02.929989 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<14>[ 19.202058] [IGT] core_auth: executing
10980 20:01:02.936564 .1.59-cip8-rt4 a<14>[ 19.202344] [IGT] core_auth: starting subtest getclient-simple
10981 20:01:02.937100 arch64)
10982 20:01:02.946999 Startin<14>[ 19.202527] [IGT] core_auth: finished subtest getclient-simple, SUCCESS
10983 20:01:02.950189 <14>[ 19.202647] [IGT] core_auth: exiting, ret=0
10984 20:01:02.956620 <8>[ 19.208261] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
10985 20:01:02.957420 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
10987 20:01:02.963375 <14>[ 19.231054] [IGT] core_auth: executing
10988 20:01:02.963950 g subtest: getclient-simple
10989 20:01:02.973104 Opened device: /dev<14>[ 19.242692] [IGT] core_auth: starting subtest getclient-master-drop
10990 20:01:02.980137 <14>[ 19.242888] [IGT] core_auth: finished subtest getclient-master-drop, SUCCESS
10991 20:01:02.983277 <14>[ 19.242973] [IGT] core_auth: exiting, ret=0
10992 20:01:02.993019 <8>[ 19.248071] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
10993 20:01:02.993729 /dri/card0
10994 20:01:02.994461 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
10996 20:01:02.996399 [1m<14>[ 19.272940] [IGT] core_auth: executing
10997 20:01:03.003152 <14>[ 19.273352] [IGT] core_auth: starting subtest basic-auth
10998 20:01:03.009835 <14>[ 19.273496] [IGT] core_auth: finished subtest basic-auth, SUCCESS
10999 20:01:03.013209 <14>[ 19.273549] [IGT] core_auth: exiting, ret=0
11000 20:01:03.019374 <8>[ 19.279292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
11001 20:01:03.020142 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
11003 20:01:03.025816 Subtest getclien<14>[ 19.295024] [IGT] core_auth: executing
11004 20:01:03.029398 t-simple: SUCCESS (0.000s)[0m
11005 20:01:03.035791 <14>[ 19.307350] [IGT] core_auth: starting subtest many-magics
11006 20:01:03.043288 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11007 20:01:03.049516 Startin<14>[ 19.317909] [IGT] core_auth: finished subtest many-magics, SUCCESS
11008 20:01:03.052800 <14>[ 19.317963] [IGT] core_auth: exiting, ret=0
11009 20:01:03.059547 <8>[ 19.324712] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
11010 20:01:03.060409 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
11012 20:01:03.063051 <8>[ 19.325828] <LAVA_SIGNAL_TESTSET STOP>
11013 20:01:03.063876 Received signal: <TESTSET> STOP
11014 20:01:03.064277 Closing test_set core_auth
11015 20:01:03.065961 g subtest: getclient-master-drop
11016 20:01:03.069912 Opened device: /dev/dri/card0
11017 20:01:03.075973 [1mSubtest getclient-master-drop: SUCCESS (0.000s)[0m
11018 20:01:03.082393 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11019 20:01:03.082921 Opened device: /dev/dri/card0
11020 20:01:03.086066 Starting subtest: basic-auth
11021 20:01:03.092451 <14>[ 19.363253] [IGT] core_getclient: executing
11022 20:01:03.096222 <14>[ 19.363540] [IGT] core_getclient: exiting, ret=0
11023 20:01:03.102090 <8>[ 19.369774] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
11024 20:01:03.102865 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
11026 20:01:03.106132 [1mSubtest basic-auth: SUCCESS (0.000s)[0m
11027 20:01:03.112464 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11028 20:01:03.115825 Opened device: /dev/dri/card0
11029 20:01:03.121956 Starting subtest: many-mag<14>[ 19.394077] [IGT] core_getstats: executing
11030 20:01:03.122379 ics
11031 20:01:03.128968 Reopening d<14>[ 19.394357] [IGT] core_getstats: exiting, ret=0
11032 20:01:03.138747 evice failed aft<8>[ 19.401884] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
11033 20:01:03.139277 er 1020 opens
11034 20:01:03.139921 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
11036 20:01:03.141977 [1mSubtest many-magics: SUCCESS (0.010s)[0m
11037 20:01:03.148914 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11038 20:01:03.152039 Opened device: /dev/dri/card0
11039 20:01:03.152459 SUCCESS (0.000s)
11040 20:01:03.159019 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11041 20:01:03.162554 Opened device: /dev/dri/card0
11042 20:01:03.169407 <14>[ 19.440278] [IGT] core_getversion: executing
11043 20:01:03.172107 <14>[ 19.440587] [IGT] core_getversion: exiting, ret=0
11044 20:01:03.179070 <8>[ 19.447776] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
11045 20:01:03.179872 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
11047 20:01:03.182228 SUCCESS (0.000s)
11048 20:01:03.188609 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11049 20:01:03.189117 Opened device: /dev/dri/card0
11050 20:01:03.192115 SUCCESS (0.000s)
11051 20:01:03.215159 IGT-Version: 1.27.1-g621c2d3 (aa<14>[ 19.487192] [IGT] core_setmaster_vs_auth: executing
11052 20:01:03.221892 <14>[ 19.487562] [IGT] core_setmaster_vs_auth: exiting, ret=0
11053 20:01:03.228769 <8>[ 19.494637] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
11054 20:01:03.229544 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
11056 20:01:03.232015 rch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11057 20:01:03.235247 Opened device: /dev/dri/card0
11058 20:01:03.235708 SUCCESS (0.000s)
11059 20:01:03.246731 <8>[ 19.520442] <LAVA_SIGNAL_TESTSET START drm_read>
11060 20:01:03.247703 Received signal: <TESTSET> START drm_read
11061 20:01:03.248079 Starting test_set drm_read
11062 20:01:03.261953 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<14>[ 19.534012] [IGT] drm_read: executing
11063 20:01:03.265791 <14>[ 19.534467] [IGT] drm_read: exiting, ret=77
11064 20:01:03.272060 <8>[ 19.541489] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>
11065 20:01:03.272842 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
11067 20:01:03.275132 .1.59-cip8-rt4 aarch64)
11068 20:01:03.282103 Opened device: /dev/dri<14>[ 19.554066] [IGT] drm_read: executing
11069 20:01:03.285240 <14>[ 19.554509] [IGT] drm_read: exiting, ret=77
11070 20:01:03.292006 <8>[ 19.561302] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>
11071 20:01:03.292853 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
11073 20:01:03.295459 /card0
11074 20:01:03.298315 No KMS driver or no outputs, pipes: 8, outputs: 0
11075 20:01:03.301647 [1mS<14>[ 19.573827] [IGT] drm_read: executing
11076 20:01:03.308387 <14>[ 19.574318] [IGT] drm_read: exiting, ret=77
11077 20:01:03.315499 <8>[ 19.580334] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>
11078 20:01:03.316353 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
11080 20:01:03.318524 ubtest invalid-buffer: SKIP (0.000s)[0m
11081 20:01:03.321574 IGT-Ve<14>[ 19.594814] [IGT] drm_read: executing
11082 20:01:03.328703 <14>[ 19.595251] [IGT] drm_read: exiting, ret=77
11083 20:01:03.335235 <8>[ 19.602520] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>
11084 20:01:03.335957 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
11086 20:01:03.341949 rsion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-<14>[ 19.614680] [IGT] drm_read: executing
11087 20:01:03.348356 <14>[ 19.615123] [IGT] drm_read: exiting, ret=77
11088 20:01:03.354944 <8>[ 19.620869] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>
11089 20:01:03.355460 cip8-rt4 aarch64)
11090 20:01:03.356128 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
11092 20:01:03.358294 Opened device: /dev/dri/card0
11093 20:01:03.361509 No KMS driver or no outputs, pipes: 8, outputs: 0
11094 20:01:03.368269 [1mSubtest fault-buffer: SKIP (0.000s)[0m
11095 20:01:03.375017 IGT-Version: 1.27.1-g621c2d3 (<14>[ 19.648130] [IGT] drm_read: executing
11096 20:01:03.377848 <14>[ 19.648719] [IGT] drm_read: exiting, ret=77
11097 20:01:03.385016 <8>[ 19.654034] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>
11098 20:01:03.385804 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
11100 20:01:03.391388 aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11101 20:01:03.394360 Opene<14>[ 19.666503] [IGT] drm_read: executing
11102 20:01:03.398073 <14>[ 19.666928] [IGT] drm_read: exiting, ret=77
11103 20:01:03.404753 <8>[ 19.673304] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>
11104 20:01:03.405536 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
11106 20:01:03.411480 <8>[ 19.674712] <LAVA_SIGNAL_TESTSET STOP>
11107 20:01:03.412310 Received signal: <TESTSET> STOP
11108 20:01:03.412670 Closing test_set drm_read
11109 20:01:03.414188 <8>[ 19.688685] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
11110 20:01:03.414859 Received signal: <TESTSET> START kms_addfb_basic
11111 20:01:03.415211 Starting test_set kms_addfb_basic
11112 20:01:03.417930 d device: /dev/dri/card0
11113 20:01:03.421045 No KMS driver or no outputs, pipes: 8, outputs: 0
11114 20:01:03.427859 [1mSubtest empty-block: SKIP (0.000s)[0m
11115 20:01:03.431048 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11116 20:01:03.434746 Opened device: /dev/dri/card0
11117 20:01:03.441498 No KMS driver or no outputs, pi<14>[ 19.714391] [IGT] kms_addfb_basic: executing
11118 20:01:03.448276 <14>[ 19.719100] [IGT] kms_addfb_basic: starting subtest unused-handle
11119 20:01:03.457702 pes: 8, outputs:<14>[ 19.729645] [IGT] kms_addfb_basic: finished subtest unused-handle, SUCCESS
11120 20:01:03.458237 0
11121 20:01:03.467596 [1mSubtest empty-nonblock: SKIP (0.000s)[0<14>[ 19.738489] [IGT] kms_addfb_basic: exiting, ret=0
11122 20:01:03.474155 <8>[ 19.743758] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
11123 20:01:03.474676 m
11124 20:01:03.475289 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
11126 20:01:03.484259 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<14>[ 19.756125] [IGT] kms_addfb_basic: executing
11127 20:01:03.490965 <14>[ 19.760462] [IGT] kms_addfb_basic: starting subtest unused-pitches
11128 20:01:03.491486 : 6.1.59-cip8-rt4 aarch64)
11129 20:01:03.500850 Opened device: /dev/<14>[ 19.770078] [IGT] kms_addfb_basic: finished subtest unused-pitches, SUCCESS
11130 20:01:03.501364 dri/card0
11131 20:01:03.508087 No KMS driver or no outputs, pipes: 8, outputs: 0
11132 20:01:03.510958 [<14>[ 19.781808] [IGT] kms_addfb_basic: exiting, ret=0
11133 20:01:03.517315 <8>[ 19.786534] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
11134 20:01:03.518009 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
11136 20:01:03.527581 1mSubtest short-buffer-block: SK<14>[ 19.799399] [IGT] kms_addfb_basic: executing
11137 20:01:03.534209 <14>[ 19.803796] [IGT] kms_addfb_basic: starting subtest unused-offsets
11138 20:01:03.534935 IP (0.000s)[0m
11139 20:01:03.540730 <14>[ 19.813538] [IGT] kms_addfb_basic: finished subtest unused-offsets, SUCCESS
11140 20:01:03.541266
11141 20:01:03.550657 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: <14>[ 19.822294] [IGT] kms_addfb_basic: exiting, ret=0
11142 20:01:03.560746 6.1.59-cip8-rt4 <8>[ 19.826628] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
11143 20:01:03.561273 aarch64)
11144 20:01:03.561877 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
11146 20:01:03.563737 Opened device: /dev/dri/card0
11147 20:01:03.567495 No KMS driver or no outputs, pipes: 8, outputs: 0
11148 20:01:03.573817 [1mSubtest short-buffer-nonblock: S<14>[ 19.849510] [IGT] kms_addfb_basic: executing
11149 20:01:03.577709 KIP (0.000s)[0m
11150 20:01:03.587151 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4<14>[ 19.859865] [IGT] kms_addfb_basic: starting subtest unused-modifier
11151 20:01:03.597039 <14>[ 19.859971] [IGT] kms_addfb_basic: finished subtest unused-modifier, SUCCESS
11152 20:01:03.597556 aarch64)
11153 20:01:03.604391 Opene<14>[ 19.876617] [IGT] kms_addfb_basic: exiting, ret=0
11154 20:01:03.604920 d device: /dev/dri/card0
11155 20:01:03.614098 No KMS driver or no ou<8>[ 19.883378] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
11156 20:01:03.614968 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11158 20:01:03.616920 tputs, pipes: 8, outputs: 0
11159 20:01:03.620451 [1mSubtest short-buffer-wakeup: SKIP (0.000s)[0m
11160 20:01:03.627334 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11161 20:01:03.630525 Opened device: /dev/dri/card0
11162 20:01:03.633956 Startin<14>[ 19.906285] [IGT] kms_addfb_basic: executing
11163 20:01:03.643497 <14>[ 19.910757] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
11164 20:01:03.643976 g subtest: unused-handle
11165 20:01:03.653895 [1mSubtest unused-han<14>[ 19.922905] [IGT] kms_addfb_basic: finished subtest clobberred-modifier, SKIP
11166 20:01:03.657552 dle: SUCCESS (0.000s)[0m
11167 20:01:03.663760 Test requirement not <14>[ 19.934614] [IGT] kms_addfb_basic: exiting, ret=77
11168 20:01:03.670804 <8>[ 19.939231] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
11169 20:01:03.671705 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11171 20:01:03.676725 met in function igt_require_i915<14>[ 19.951352] [IGT] kms_addfb_basic: executing
11172 20:01:03.687127 <14>[ 19.955714] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
11173 20:01:03.687697 , file ../lib/drmtest.c:720:
11174 20:01:03.696896 Test requirement: <14>[ 19.966447] [IGT] kms_addfb_basic: finished subtest invalid-smem-bo-on-discrete, SKIP
11175 20:01:03.700263 is_i915_device(fd)
11176 20:01:03.707021 Test requirement not met in <14>[ 19.978990] [IGT] kms_addfb_basic: exiting, ret=77
11177 20:01:03.716402 function igt_req<8>[ 19.983501] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
11178 20:01:03.717235 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11180 20:01:03.719597 uire_i915, file ../lib/drmtest.c:720:
11181 20:01:03.723255 Test requirement: is_i915_device(fd)
11182 20:01:03.729702 No KMS driver or no outputs, pipes: 8, outputs: 0
11183 20:01:03.733153 IGT-Version: 1.2<14>[ 20.006134] [IGT] kms_addfb_basic: executing
11184 20:01:03.739791 <14>[ 20.010711] [IGT] kms_addfb_basic: starting subtest legacy-format
11185 20:01:03.746052 7.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11186 20:01:03.750261 Opened device: /dev/dri/card0
11187 20:01:03.756366 Starting subtest: unused<14>[ 20.027936] [IGT] kms_addfb_basic: finished subtest legacy-format, SUCCESS
11188 20:01:03.759598 -pitches
11189 20:01:03.766506 [1mSubtest unused-pitches: SUCCESS (0<14>[ 20.038458] [IGT] kms_addfb_basic: exiting, ret=0
11190 20:01:03.773233 <8>[ 20.042943] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
11191 20:01:03.774033 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11193 20:01:03.776167 .000s)[0m
11194 20:01:03.782507 Test requirement not met in function<14>[ 20.054624] [IGT] kms_addfb_basic: executing
11195 20:01:03.789655 <14>[ 20.061043] [IGT] kms_addfb_basic: starting subtest no-handle
11196 20:01:03.796195 igt_require_i91<14>[ 20.069532] [IGT] kms_addfb_basic: finished subtest no-handle, SUCCESS
11197 20:01:03.799794 5, file ../lib/drmtest.c:720:
11198 20:01:03.809578 Test requirement: is_i915_device(<14>[ 20.077963] [IGT] kms_addfb_basic: exiting, ret=0
11199 20:01:03.810099 fd)
11200 20:01:03.815797 Test requir<8>[ 20.082551] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
11201 20:01:03.816486 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11203 20:01:03.822139 ement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11204 20:01:03.825672 Test requirement: is_i915_device(fd)
11205 20:01:03.829108 No<14>[ 20.104878] [IGT] kms_addfb_basic: executing
11206 20:01:03.835289 KMS driver or no outputs, pipes: 8, outputs: 0
11207 20:01:03.838810 <14>[ 20.111862] [IGT] kms_addfb_basic: starting subtest basic
11208 20:01:03.845519 <14>[ 20.112022] [IGT] kms_addfb_basic: finished subtest basic, SUCCESS
11209 20:01:03.845946
11210 20:01:03.855533 IGT-Version: 1.27.1-g621c2d3 (a<14>[ 20.127470] [IGT] kms_addfb_basic: exiting, ret=0
11211 20:01:03.862542 <8>[ 20.134571] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11212 20:01:03.863341 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11214 20:01:03.865172 arch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11215 20:01:03.872252 Opened device: /dev/dr<14>[ 20.145405] [IGT] kms_addfb_basic: executing
11216 20:01:03.872768 i/card0
11217 20:01:03.878645 Starting subtest: unuse<14>[ 20.152015] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
11218 20:01:03.888987 <14>[ 20.152105] [IGT] kms_addfb_basic: finished subtest bad-pitch-0, SUCCESS
11219 20:01:03.889509 d-offsets
11220 20:01:03.895277 [1mSubtest unused-of<14>[ 20.168172] [IGT] kms_addfb_basic: exiting, ret=0
11221 20:01:03.902639 <8>[ 20.172435] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
11222 20:01:03.903453 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11224 20:01:03.905463 fsets: SUCCESS (0.000s)[0m
11225 20:01:03.911746 Test requirement no<14>[ 20.182852] [IGT] kms_addfb_basic: executing
11226 20:01:03.918195 <14>[ 20.189180] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
11227 20:01:03.922363 t met in function igt_require_i915, file ../lib/drmtest.c:720:
11228 20:01:03.925529 Test requirement: is_i915_device(fd)
11229 20:01:03.931715 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11230 20:01:03.935402 Test requirement: is_i915_device(fd)
11231 20:01:03.942072 No KMS driver or no outputs, pipes: 8, outputs: 0
11232 20:01:03.948639 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11233 20:01:03.952069 Opened device: /dev/dri/card0
11234 20:01:03.952591 Starting subtest: unused-modifier
11235 20:01:03.958903 [1mSubtest unused-modifier: SUCCESS (0.000s)[0m
11236 20:01:03.965305 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11237 20:01:03.968629 Test requirement: is_i915_device(fd)
11238 20:01:03.975178 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11239 20:01:03.979066 Test requirement: is_i915_device(fd)
11240 20:01:03.981540 No KMS driver or no outputs, pipes: 8, outputs: 0
11241 20:01:03.988537 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11242 20:01:03.992037 Opened device: /dev/dri/card0
11243 20:01:03.995131 Starting subtest: clobberred-modifier
11244 20:01:04.001884 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11245 20:01:04.005528 Test requirement: is_i915_device(fd)
11246 20:01:04.011289 [1mSubtest clobberred-modifier: SKIP (0.000s)[0m
11247 20:01:04.017866 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11248 20:01:04.021508 Test requirement: is_i915_device(fd)
11249 20:01:04.027774 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11250 20:01:04.030930 Test requirement: is_i915_device(fd)
11251 20:01:04.034837 No KMS driver or no outputs, pipes: 8, outputs: 0
11252 20:01:04.041651 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11253 20:01:04.044468 Opened device: /dev/dri/card0
11254 20:01:04.047900 Starting subtest: invalid-smem-bo-on-discrete
11255 20:01:04.058253 Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:715:
11256 20:01:04.061722 Test requirement: is_intel_device(fd)
11257 20:01:04.064555 [1mSubtest invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
11258 20:01:04.071514 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11259 20:01:04.074737 Test requirement: is_i915_device(fd)
11260 20:01:04.081564 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11261 20:01:04.084302 Test requirement: is_i915_device(fd)
11262 20:01:04.091442 No KMS driver or no outputs, pipes: 8, outputs: 0
11263 20:01:04.097667 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11264 20:01:04.098192 Opened device: /dev/dri/card0
11265 20:01:04.101617 Starting subtest: legacy-format
11266 20:01:04.107604 Successfully fuzzed 10000 {bpp, depth} variations
11267 20:01:04.110650 [1mSubtest legacy-format: SUCCESS (0.006s)[0m
11268 20:01:04.117459 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11269 20:01:04.120457 Test requirement: is_i915_device(fd)
11270 20:01:04.127835 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11271 20:01:04.130739 Test requirement: is_i915_device(fd)
11272 20:01:04.137405 No KMS driver or no outputs, pipes: 8, outputs: 0
11273 20:01:04.144359 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11274 20:01:04.144871 Opened device: /dev/dri/card0
11275 20:01:04.147436 Starting subtest: no-handle
11276 20:01:04.150932 [1mSubtest no-handle: SUCCESS (0.000s)[0m
11277 20:01:04.157527 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11278 20:01:04.161029 Test requirement: is_i915_device(fd)
11279 20:01:04.170728 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11280 20:01:04.174053 Test requirement: is_i915_device(fd)
11281 20:01:04.177837 No KMS driver or no outputs, pipes: 8, outputs: 0
11282 20:01:04.184086 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11283 20:01:04.187682 Opened device: /dev/dri/card0
11284 20:01:04.188310 Starting subtest: basic
11285 20:01:04.190703 [1mSubtest basic: SUCCESS (0.000s)[0m
11286 20:01:04.200635 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11287 20:01:04.204033 Test requirement: is_i915_device(fd)
11288 20:01:04.210007 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11289 20:01:04.214082 Test requirement: is_i915_device(fd)
11290 20:01:04.217225 No KMS driver or no outputs, pipes: 8, outputs: 0
11291 20:01:04.223462 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11292 20:01:04.227188 Opened device: /dev/dri/card0
11293 20:01:04.230392 Starting subtest: bad-pitch-0
11294 20:01:04.233576 [1mSubtest bad-pitch-0: SUCCESS (0.000s)[0m
11295 20:01:04.240429 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11296 20:01:04.243780 Test requirement: is_i915_device(fd)
11297 20:01:04.250176 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11298 20:01:04.260468 Test requirement: is_i915_dev<14>[ 20.530082] [IGT] kms_addfb_basic: finished subtest bad-pitch-32, SUCCESS
11299 20:01:04.261005 ice(fd)
11300 20:01:04.266808 No KMS <14>[ 20.541371] [IGT] kms_addfb_basic: exiting, ret=0
11301 20:01:04.277193 driver or no out<8>[ 20.546067] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
11302 20:01:04.277711 puts, pipes: 8, outputs: 0
11303 20:01:04.278347 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11305 20:01:04.283632 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11306 20:01:04.287341 Opened device: /dev/dri/card0
11307 20:01:04.290122 Starting subtest: bad-pitch-32
11308 20:01:04.296869 [1mSubtest <14>[ 20.568821] [IGT] kms_addfb_basic: executing
11309 20:01:04.303616 bad-pitch-32: SUCCESS (0.000s)[<14>[ 20.576044] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
11310 20:01:04.309938 <14>[ 20.576223] [IGT] kms_addfb_basic: finished subtest bad-pitch-63, SUCCESS
11311 20:01:04.313250 0m
11312 20:01:04.319585 Test requirement not met in <14>[ 20.592300] [IGT] kms_addfb_basic: exiting, ret=0
11313 20:01:04.326916 function igt_req<8>[ 20.597741] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
11314 20:01:04.327742 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11316 20:01:04.330258 uire_i915, file ../lib/drmtest.c:720:
11317 20:01:04.333595 Test requirement: is_i915_device(fd)
11318 20:01:04.343339 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11319 20:01:04.346813 <14>[ 20.621295] [IGT] kms_addfb_basic: executing
11320 20:01:04.349847 Test requirement: is_i915_device(fd)
11321 20:01:04.356491 No KMS dri<14>[ 20.628346] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
11322 20:01:04.362610 <14>[ 20.628478] [IGT] kms_addfb_basic: finished subtest bad-pitch-128, SUCCESS
11323 20:01:04.369676 ver or no output<14>[ 20.644921] [IGT] kms_addfb_basic: exiting, ret=0
11324 20:01:04.376383 <8>[ 20.650349] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
11325 20:01:04.377064 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11327 20:01:04.379881 s, pipes: 8, outputs: 0
11328 20:01:04.389374 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)<14>[ 20.663355] [IGT] kms_addfb_basic: executing
11329 20:01:04.396211 <14>[ 20.669993] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
11330 20:01:04.396720
11331 20:01:04.399417 Opened device: /dev/dri/card0
11332 20:01:04.409681 Starting subtes<14>[ 20.677838] [IGT] kms_addfb_basic: finished subtest bad-pitch-256, SUCCESS
11333 20:01:04.410203 t: bad-pitch-63
11334 20:01:04.416725 <14>[ 20.689466] [IGT] kms_addfb_basic: exiting, ret=0
11335 20:01:04.417240
11336 20:01:04.422755 [1mSubtest bad<8>[ 20.694071] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
11337 20:01:04.423508 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11339 20:01:04.426287 -pitch-63: SUCCESS (0.000s)[0m
11340 20:01:04.432413 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11341 20:01:04.436518 Test requirement: is_i915_device(fd)
11342 20:01:04.443003 Test r<14>[ 20.717144] [IGT] kms_addfb_basic: executing
11343 20:01:04.452281 equirement not met in function igt_require_i915,<14>[ 20.724460] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
11344 20:01:04.459355 <14>[ 20.724543] [IGT] kms_addfb_basic: finished subtest bad-pitch-1024, SUCCESS
11345 20:01:04.466221 file ../lib/drm<14>[ 20.740804] [IGT] kms_addfb_basic: exiting, ret=0
11346 20:01:04.469417 test.c:720:
11347 20:01:04.476214 Tes<8>[ 20.745558] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
11348 20:01:04.477000 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11350 20:01:04.482573 t requirement: is_i915_device(fd<14>[ 20.757725] [IGT] kms_addfb_basic: executing
11351 20:01:04.483117 )
11352 20:01:04.485967 No KMS driver or no outputs, pipes: 8, outputs: 0
11353 20:01:04.495783 IGT-Version: 1.27.1-g621c2<14>[ 20.769386] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
11354 20:01:04.502899 <14>[ 20.769483] [IGT] kms_addfb_basic: finished subtest bad-pitch-999, SUCCESS
11355 20:01:04.512142 d3 (aarch64) (Linux: 6.1.59-cip8<14>[ 20.783997] [IGT] kms_addfb_basic: exiting, ret=0
11356 20:01:04.518981 <8>[ 20.788556] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
11357 20:01:04.519524 -rt4 aarch64)
11358 20:01:04.520231 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11360 20:01:04.522404 Opened device: /dev/dri/card0
11361 20:01:04.525863 St<14>[ 20.800352] [IGT] kms_addfb_basic: executing
11362 20:01:04.532428 <14>[ 20.806902] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
11363 20:01:04.535589 arting subtest: bad-pitch-128
11364 20:01:04.545505 [1mSubtest bad-p<14>[ 20.814426] [IGT] kms_addfb_basic: finished subtest bad-pitch-65536, SUCCESS
11365 20:01:04.548951 itch-128: SUCCESS (0.000s)[0m
11366 20:01:04.555598 Test requirement<14>[ 20.826288] [IGT] kms_addfb_basic: exiting, ret=0
11367 20:01:04.562312 <8>[ 20.832002] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
11368 20:01:04.563076 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11370 20:01:04.572364 not met in function igt_require_i915, file ../l<14>[ 20.842963] [IGT] kms_addfb_basic: executing
11371 20:01:04.578826 <14>[ 20.851354] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
11372 20:01:04.579328 ib/drmtest.c:720:
11373 20:01:04.588642 Test requirement: is_i915_dev<14>[ 20.858548] [IGT] kms_addfb_basic: finished subtest invalid-get-prop-any, SUCCESS
11374 20:01:04.592018 ice(fd)
11375 20:01:04.598562 Test requirement not met in function ig<14>[ 20.870703] [IGT] kms_addfb_basic: exiting, ret=0
11376 20:01:04.608353 t_require_i915, <8>[ 20.874932] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11377 20:01:04.609066 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11379 20:01:04.611547 file ../lib/drmtest.c:720:
11380 20:01:04.615229 Test requirement: is_i915_device(fd)
11381 20:01:04.621735 No KMS driver or no outputs, pipes: 8, outputs<14>[ 20.897654] [IGT] kms_addfb_basic: executing
11382 20:01:04.622154 : 0
11383 20:01:04.628426 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11384 20:01:04.631689 Opened device: /dev/dri/card0
11385 20:01:04.641611 Starting subtest: b<14>[ 20.911556] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
11386 20:01:04.648350 <14>[ 20.911653] [IGT] kms_addfb_basic: finished subtest invalid-get-prop, SUCCESS
11387 20:01:04.648773 ad-pitch-256
11388 20:01:04.654934 [<14>[ 20.928561] [IGT] kms_addfb_basic: exiting, ret=0
11389 20:01:04.661119 1mSubtest bad-pi<8>[ 20.933249] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11390 20:01:04.661840 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11392 20:01:04.664860 tch-256: SUCCESS (0.000s)[0m
11393 20:01:04.671153 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11394 20:01:04.674825 Test requirement: is_i915_device(fd)
11395 20:01:04.681503 Test requirement not met<14>[ 20.955785] [IGT] kms_addfb_basic: executing
11396 20:01:04.690971 in function igt_require_i915, f<14>[ 20.964952] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
11397 20:01:04.700937 <14>[ 20.965026] [IGT] kms_addfb_basic: finished subtest invalid-set-prop-any, SUCCESS
11398 20:01:04.707903 ile ../lib/drmte<14>[ 20.981404] [IGT] kms_addfb_basic: exiting, ret=0
11399 20:01:04.708283 st.c:720:
11400 20:01:04.714374 Test <8>[ 20.986204] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11401 20:01:04.715002 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11403 20:01:04.717577 requirement: is_i915_device(fd)
11404 20:01:04.724128 No KMS driver or no outputs, pipes: 8, outputs: 0
11405 20:01:04.731028 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11406 20:01:04.734219 Ope<14>[ 21.009459] [IGT] kms_addfb_basic: executing
11407 20:01:04.737604 ned device: /dev/dri/card0
11408 20:01:04.740681 Starting subtest: bad-pitch-1024
11409 20:01:04.744308 [1mSubtest bad-pitch-1024: SUCCESS (0.000s)[0m
11410 20:01:04.750914 Test requirement<14>[ 21.023899] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
11411 20:01:04.760952 <14>[ 21.024026] [IGT] kms_addfb_basic: finished subtest invalid-set-prop, SUCCESS
11412 20:01:04.767821 not met in func<14>[ 21.040673] [IGT] kms_addfb_basic: exiting, ret=0
11413 20:01:04.773873 <8>[ 21.045548] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11414 20:01:04.774566 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11416 20:01:04.780572 tion igt_require_i915, file ../lib/drmtest.c:720<14>[ 21.057024] [IGT] kms_addfb_basic: executing
11417 20:01:04.784202 :
11418 20:01:04.787742 Test requirement: is_i915_device(fd)
11419 20:01:04.793905 Test requirement not met in function ig<14>[ 21.067516] [IGT] kms_addfb_basic: starting subtest master-rmfb
11420 20:01:04.804327 <14>[ 21.067665] [IGT] kms_addfb_basic: finished subtest master-rmfb, SUCCESS
11421 20:01:04.810969 t_require_i915, file ../lib/drmt<14>[ 21.083567] [IGT] kms_addfb_basic: exiting, ret=0
11422 20:01:04.811484 est.c:720:
11423 20:01:04.817696 Test<8>[ 21.088308] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
11424 20:01:04.818485 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11426 20:01:04.820747 requirement: is_i915_device(fd)
11427 20:01:04.827832 No KMS driver or no outputs, pipes: 8, outputs: 0
11428 20:01:04.833738 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11429 20:01:04.837154 Opened device: /de<14>[ 21.111082] [IGT] kms_addfb_basic: executing
11430 20:01:04.840899 v/dri/card0
11431 20:01:04.843953 Starting subtest: bad-pitch-999
11432 20:01:04.853357 [1mSubtest bad-pitch-999: SUCCESS<14>[ 21.124195] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
11433 20:01:04.860277 <14>[ 21.124314] [IGT] kms_addfb_basic: finished subtest addfb25-modifier-no-flag, SUCCESS
11434 20:01:04.866765 <14>[ 21.124534] [IGT] kms_addfb_basic: exiting, ret=0
11435 20:01:04.873390 <8>[ 21.129512] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
11436 20:01:04.874087 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11438 20:01:04.880564 <14>[ 21.142219] [IGT] kms_addfb_basic: executing
11439 20:01:04.880979 (0.000s)[0m
11440 20:01:04.887044 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11441 20:01:04.890423 Test requirement: is_i915_device(fd)
11442 20:01:04.900323 Test requirement not met in function igt<14>[ 21.171516] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
11443 20:01:04.903727 _require_i915, file ../lib/drmtest.c:720:
11444 20:01:04.907031 Test requirement: is_i915_device(fd)
11445 20:01:04.913552 No KMS driver or no outputs, pipes: 8, outputs: 0
11446 20:01:04.920145 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11447 20:01:04.923552 Opened device: /dev/dri/card0
11448 20:01:04.923979 Starting subtest: bad-pitch-65536
11449 20:01:04.930821 [1mSubtest bad-pitch-65536: SUCCESS (0.000s)[0m
11450 20:01:04.936848 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11451 20:01:04.940151 Test requirement: is_i915_device(fd)
11452 20:01:04.946611 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11453 20:01:04.950225 Test requirement: is_i915_device(fd)
11454 20:01:04.954008 No KMS driver or no outputs, pipes: 8, outputs: 0
11455 20:01:04.960104 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11456 20:01:04.963300 Opened device: /dev/dri/card0
11457 20:01:04.966802 Starting subtest: invalid-get-prop-any
11458 20:01:04.973581 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
11459 20:01:04.980264 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11460 20:01:04.983255 Test requirement: is_i915_device(fd)
11461 20:01:04.989687 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11462 20:01:04.993798 Test requirement: is_i915_device(fd)
11463 20:01:04.996688 No KMS driver or no outputs, pipes: 8, outputs: 0
11464 20:01:05.003390 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11465 20:01:05.006209 Opened device: /dev/dri/card0
11466 20:01:05.010302 Starting subtest: invalid-get-prop
11467 20:01:05.012879 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
11468 20:01:05.022779 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11469 20:01:05.026231 Test requirement: is_i915_device(fd)
11470 20:01:05.032582 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11471 20:01:05.036011 Test requirement: is_i915_device(fd)
11472 20:01:05.039367 No KMS driver or no outputs, pipes: 8, outputs: 0
11473 20:01:05.046437 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11474 20:01:05.049261 Opened device: /dev/dri/card0
11475 20:01:05.052780 Starting subtest: invalid-set-prop-any
11476 20:01:05.056325 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
11477 20:01:05.062611 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11478 20:01:05.066748 Test requirement: is_i915_device(fd)
11479 20:01:05.076246 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11480 20:01:05.079832 Test requirement: is_i915_device(fd)
11481 20:01:05.082650 No KMS driver or no outputs, pipes: 8, outputs: 0
11482 20:01:05.089595 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11483 20:01:05.092274 Opened device: /dev/dri/card0
11484 20:01:05.096096 Starting subtest: invalid-set-prop
11485 20:01:05.099428 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
11486 20:01:05.106225 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11487 20:01:05.109416 Test requirement: is_i915_device(fd)
11488 20:01:05.115675 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11489 20:01:05.119030 Test requirement: is_i915_device(fd)
11490 20:01:05.125959 No KMS driver or no outputs, pipes: 8, outputs: 0
11491 20:01:05.132366 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11492 20:01:05.132882 Opened device: /dev/dri/card0
11493 20:01:05.135098 Starting subtest: master-rmfb
11494 20:01:05.141891 [1mSubtest master-rmfb: SUCCESS (0.000s)[0m
11495 20:01:05.148775 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11496 20:01:05.152013 Test requirement: is_i915_device(fd)
11497 20:01:05.158963 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11498 20:01:05.162236 Test requirement: is_i915_device(fd)
11499 20:01:05.164841 No KMS driver or no outputs, pipes: 8, outputs: 0
11500 20:01:05.171631 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11501 20:01:05.175469 Opened device: /dev/dri/card0
11502 20:01:05.178648 Starting subtest: addfb25-modifier-no-flag
11503 20:01:05.185673 [1mSubtest addfb25-modifier-no-flag: SUCCESS (0.000s)[0m
11504 20:01:05.191479 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11505 20:01:05.194957 Test requirement: is_i915_device(fd)
11506 20:01:05.201638 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11507 20:01:05.205198 Test requirement: is_i915_device(fd)
11508 20:01:05.208244 No KMS driver or no outputs, pipes: 8, outputs: 0
11509 20:01:05.215455 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11510 20:01:05.218717 Opened device: /dev/dri/card0
11511 20:01:05.221504 Starting subtest: addfb25-bad-modifier
11512 20:01:05.232033 (kms_addfb_basic:442) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:662:
11513 20:01:05.245465 (kms_addfb_basic:442) CRITICAL: Failed assertion: igt_ioctl((fd)<14>[ 21.516179] [IGT] kms_addfb_basic: finished subtest addfb25-bad-modifier, FAIL
11514 20:01:05.251594 <14>[ 21.516397] [IGT] kms_addfb_basic: exiting, ret=98
11515 20:01:05.258812 <8>[ 21.521006] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
11516 20:01:05.259620 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11518 20:01:05.268191 , ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0<14>[ 21.538794] [IGT] kms_addfb_basic: executing
11519 20:01:05.278088 +8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))),<14>[ 21.551328] [IGT] kms_addfb_basic: exiting, ret=77
11520 20:01:05.288126 <8>[ 21.555880] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
11521 20:01:05.288629 (&f)) == -1
11522 20:01:05.289219 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11524 20:01:05.294925 (kms_addfb_basic:4<14>[ 21.568442] [IGT] kms_addfb_basic: executing
11525 20:01:05.298043 42) CRITICAL: error: 0 != -1
11526 20:01:05.298460 Stack trace:
11527 20:01:05.308372 #0 ../lib/igt_core.c:1971 __igt_fa<14>[ 21.581023] [IGT] kms_addfb_basic: exiting, ret=77
11528 20:01:05.314840 <8>[ 21.585534] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
11529 20:01:05.315363 il_assert()
11530 20:01:05.316001 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11532 20:01:05.318299 #1 [<unknown>+0xbd0547e0]
11533 20:01:05.321381 #2 [<unknown>+0xbd056278]
11534 20:01:05.327848 #3 [<un<14>[ 21.598067] [IGT] kms_addfb_basic: executing
11535 20:01:05.328385 known>+0xbd05167c]
11536 20:01:05.331806 #4 [__libc_start_main+0xe8]
11537 20:01:05.334615 #5 [<unknown>+0xbd0516b4]
11538 20:01:05.337706 <14>[ 21.610919] [IGT] kms_addfb_basic: exiting, ret=77
11539 20:01:05.347816 <8>[ 21.615457] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
11540 20:01:05.348597 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11542 20:01:05.351339 #6 [<unknown>+0xbd0516b4]
11543 20:01:05.354392 Sub<14>[ 21.628499] [IGT] kms_addfb_basic: executing
11544 20:01:05.357957 test addfb25-bad-modifier failed.
11545 20:01:05.361225 **** DEBUG ****
11546 20:01:05.367924 (kms_addfb_basic:442) ioctl_<14>[ 21.641358] [IGT] kms_addfb_basic: exiting, ret=77
11547 20:01:05.377812 wrappers-DEBUG: <8>[ 21.646208] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
11548 20:01:05.378601 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11550 20:01:05.381179 Test requirement passed: igt_has_fb_modifiers(fd)
11551 20:01:05.394631 (kms_addfb_basic:442) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.<14>[ 21.668831] [IGT] kms_addfb_basic: executing
11552 20:01:05.395145 c:662:
11553 20:01:05.411475 (kms_addfb_basic:442) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (<14>[ 21.682155] [IGT] kms_addfb_basic: exiting, ret=77
11554 20:01:05.420906 ((0xB8)) << 0) |<8>[ 21.686529] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
11555 20:01:05.421676 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11557 20:01:05.427410 ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11558 20:01:05.430701 (kms_addfb_basic:442) CRITICAL: error: 0 != -1
11559 20:01:05.437438 (kms_addfb_basic:442) igt_core-INFO: Stack<14>[ 21.712350] [IGT] kms_addfb_basic: executing
11560 20:01:05.440926 trace:
11561 20:01:05.447537 (kms_addfb_basic:442) igt_core-INFO: #0 ../lib/igt_core.c:1971 __igt_fail_assert()
11562 20:01:05.454057 (kms_addfb_basic:442) igt_core-IN<14>[ 21.726117] [IGT] kms_addfb_basic: exiting, ret=77
11563 20:01:05.463858 FO: #1 [<unkno<8>[ 21.730469] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
11564 20:01:05.464694 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11566 20:01:05.467325 wn>+0xbd0547e0]
11567 20:01:05.470728 (kms_addfb_basic:442) igt_core-INFO: #2 [<unknown>+0xbd056278]
11568 20:01:05.477223 (kms_addfb_basic:442) igt_core-INFO: #3 [<unknown>+0xbd05167c]
11569 20:01:05.487195 (kms_addfb_basic:442) igt_core-INFO: #4 [__libc_start_mai<14>[ 21.758292] [IGT] kms_addfb_basic: executing
11570 20:01:05.487758 n+0xe8]
11571 20:01:05.494096 (kms_addfb_basic:442) igt_core-INFO: #5 [<unknown>+0xbd0516b4]
11572 20:01:05.500185 (kms_<14>[ 21.771789] [IGT] kms_addfb_basic: exiting, ret=77
11573 20:01:05.507033 <8>[ 21.777273] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
11574 20:01:05.507822 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11576 20:01:05.510580 addfb_basic:442) igt_core-INFO: #6 [<unknown>+0xbd0516b4]
11577 20:01:05.513894 **** END ****
11578 20:01:05.516768 [<14>[ 21.790826] [IGT] kms_addfb_basic: executing
11579 20:01:05.523575 1mSubtest addfb25-bad-modifier: FAIL (0.345s)[0m
11580 20:01:05.530317 Test requirement not met in f<14>[ 21.803677] [IGT] kms_addfb_basic: exiting, ret=77
11581 20:01:05.537016 <8>[ 21.808541] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>
11582 20:01:05.537810 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11584 20:01:05.547087 unction igt_require_i915, file ../lib/drmtest.c:<14>[ 21.820987] [IGT] kms_addfb_basic: executing
11585 20:01:05.547627 720:
11586 20:01:05.550159 Test requirement: is_i915_device(fd)
11587 20:01:05.556921 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11588 20:01:05.560632 Test requirement: is_i915_device(fd)
11589 20:01:05.563436 No KMS driver or no outputs, pipes: 8, outputs: 0
11590 20:01:05.570542 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11591 20:01:05.573332 Opened device: /dev/dri/card0
11592 20:01:05.579758 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11593 20:01:05.583766 Test requirement: is_i915_device(fd)
11594 20:01:05.590114 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
11595 20:01:05.596930 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11596 20:01:05.600041 Test requirement: is_i915_device(fd)
11597 20:01:05.606744 No KMS driver or no outputs, pipes: 8, outputs: 0
11598 20:01:05.609507 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11599 20:01:05.613571 Opened device: /dev/dri/card0
11600 20:01:05.619784 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11601 20:01:05.623051 Test requirement: is_i915_device(fd)
11602 20:01:05.629797 [1mSubtest addfb25-x-tiled-legacy: SKIP (0.000s)[0m
11603 20:01:05.636411 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11604 20:01:05.639601 Test requirement: is_i915_device(fd)
11605 20:01:05.643547 No KMS driver or no outputs, pipes: 8, outputs: 0
11606 20:01:05.649706 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11607 20:01:05.653069 Opened device: /dev/dri/card0
11608 20:01:05.659360 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11609 20:01:05.662967 Test requirement: is_i915_device(fd)
11610 20:01:05.669959 [1mSubtest addfb25-framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11611 20:01:05.676648 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11612 20:01:05.679422 Test requirement: is_i915_device(fd)
11613 20:01:05.686500 No KMS driver or no outputs, pipes: 8, outputs: 0
11614 20:01:05.689879 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11615 20:01:05.693386 Opened device: /dev/dri/card0
11616 20:01:05.699319 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11617 20:01:05.702763 Test requirement: is_i915_device(fd)
11618 20:01:05.712620 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11619 20:01:05.715826 Test requirement: is_i915_device(fd)
11620 20:01:05.719679 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
11621 20:01:05.722705 No KMS driver or no outputs, pipes: 8, outputs: 0
11622 20:01:05.729371 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11623 20:01:05.732835 Opened device: /dev/dri/card0
11624 20:01:05.739328 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11625 20:01:05.742644 Test requirement: is_i915_device(fd)
11626 20:01:05.749263 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11627 20:01:05.752961 Test requirement: is_i915_device(fd)
11628 20:01:05.759512 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11629 20:01:05.762486 No KMS driver or no outputs, pipes: 8, outputs: 0
11630 20:01:05.769005 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11631 20:01:05.772553 Opened device: /dev/dri/card0
11632 20:01:05.778760 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11633 20:01:05.782739 Test requirement: is_i915_device(fd)
11634 20:01:05.788911 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11635 20:01:05.792120 Test requirement: is_i915_device(fd)
11636 20:01:05.798527 [1mSubtest tile-pitch-mismatch: SKIP (0.000s)[0m
11637 20:01:05.802370 No KMS driver or no outputs, pipes: 8, outputs: 0
11638 20:01:05.809004 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11639 20:01:05.812342 Opened device: /dev/dri/card0
11640 20:01:05.818944 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11641 20:01:05.822241 Test requirement: is_i915_device(fd)
11642 20:01:05.828568 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11643 20:01:05.832570 Test requirement: is_i915_device(fd)
11644 20:01:05.835537 [1mSubtest basic-y-tiled-legacy: SKIP (0.000s)[0m
11645 20:01:05.842113 No KMS driver or no outputs, pipes: 8, outputs: 0
11646 20:01:05.848971 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11647 20:01:05.849382 Opened device: /dev/dri/card0
11648 20:01:05.858750 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11649 20:01:05.862178 Test requirement: is_i915_device(fd)
11650 20:01:05.868854 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11651 20:01:05.871863 Test requirement: is_i915_device(fd)
11652 20:01:05.875575 No KMS driver or no outputs, pipes: 8, outputs: 0
11653 20:01:05.878616 [1mSubtest size-max: SKIP (0.000s)[0m
11654 20:01:05.885719 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11655 20:01:05.888598 Opened device: /dev/dri/card0
11656 20:01:05.895224 Test requireme<14>[ 22.166452] [IGT] kms_addfb_basic: exiting, ret=77
11657 20:01:05.901917 <8>[ 22.171076] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>
11658 20:01:05.902619 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11660 20:01:05.908441 nt not met in function igt_require_i915, file ..<14>[ 22.182755] [IGT] kms_addfb_basic: executing
11661 20:01:05.911459 /lib/drmtest.c:720:
11662 20:01:05.914746 Test requirement: is_i915_device(fd)
11663 20:01:05.925015 Test requirement not met in function <14>[ 22.195363] [IGT] kms_addfb_basic: exiting, ret=77
11664 20:01:05.928550 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11666 20:01:05.931703 <8>[ 22.200085] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>
11667 20:01:05.938729 igt_require_i915, file ../lib/dr<14>[ 22.212478] [IGT] kms_addfb_basic: executing
11668 20:01:05.939243 mtest.c:720:
11669 20:01:05.941836 Test requirement: is_i915_device(fd)
11670 20:01:05.951896 No KMS driver or no outputs, pipes: 8, outpu<14>[ 22.225234] [IGT] kms_addfb_basic: exiting, ret=77
11671 20:01:05.957902 <8>[ 22.229987] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>
11672 20:01:05.958406 ts: 0
11673 20:01:05.959009 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11675 20:01:05.961786 [1mSubtest too-wide: SKIP (0.000s)[0m
11676 20:01:05.971387 IGT-Version: 1.27.1-g621c2d3 (aa<14>[ 22.242276] [IGT] kms_addfb_basic: executing
11677 20:01:05.975297 rch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11678 20:01:05.975851 Opened device: /dev/dri/card0
11679 20:01:05.985019 Test requirement not met<14>[ 22.255111] [IGT] kms_addfb_basic: exiting, ret=77
11680 20:01:05.991293 in function igt<8>[ 22.259642] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>
11681 20:01:05.992111 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11683 20:01:05.994662 _require_i915, file ../lib/drmtest.c:720:
11684 20:01:05.997666 Test requirement: is_i915_device(fd)
11685 20:01:06.011313 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 22.282682] [IGT] kms_addfb_basic: executing
11686 20:01:06.011978 0:
11687 20:01:06.014544 Test requirement: is_i915_device(fd)
11688 20:01:06.018155 No KMS driver or no outputs, pipes: 8, outputs: 0
11689 20:01:06.024120 [1<14>[ 22.296537] [IGT] kms_addfb_basic: exiting, ret=77
11690 20:01:06.034397 mSubtest too-high: SKIP (0.000s)<8>[ 22.304316] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
11691 20:01:06.034920 [0m
11692 20:01:06.035537 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11694 20:01:06.040636 IGT-Version: 1.27.1-g621c2<14>[ 22.316929] [IGT] kms_addfb_basic: executing
11695 20:01:06.047320 d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11696 20:01:06.047871 Opened device: /dev/dri/card0
11697 20:01:06.060967 Test requirement not met in function igt_require_i915, file ../lib<14>[ 22.329679] [IGT] kms_addfb_basic: exiting, ret=77
11698 20:01:06.067751 <8>[ 22.335962] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
11699 20:01:06.068267 /drmtest.c:720:
11700 20:01:06.068868 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11702 20:01:06.073686 Test requiremen<14>[ 22.348305] [IGT] kms_addfb_basic: executing
11703 20:01:06.077625 t: is_i915_device(fd)
11704 20:01:06.087755 Test requirement not met in function igt_require_i915, fi<14>[ 22.361080] [IGT] kms_addfb_basic: exiting, ret=77
11705 20:01:06.094012 <8>[ 22.365866] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
11706 20:01:06.094776 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11708 20:01:06.097327 le ../lib/drmtest.c:720:
11709 20:01:06.100893 Test requirement: is_i915_device(fd)
11710 20:01:06.107691 No KMS driver or<14>[ 22.378138] [IGT] kms_addfb_basic: executing
11711 20:01:06.110783 no outputs, pipes: 8, outputs: 0
11712 20:01:06.114398 [1mSubtest bo-too-small: SKIP (0.000s)[0m
11713 20:01:06.116960 <14>[ 22.390993] [IGT] kms_addfb_basic: exiting, ret=77
11714 20:01:06.127153 IGT-Version: 1.2<8>[ 22.395672] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
11715 20:01:06.127986 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11717 20:01:06.134142 7.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11718 20:01:06.136893 Opened device: /dev/dri/card0
11719 20:01:06.147275 Test requirement not met in function igt_require_i915, file ../lib/drmte<14>[ 22.418737] [IGT] kms_addfb_basic: executing
11720 20:01:06.147846 st.c:720:
11721 20:01:06.150201 Test requirement: is_i915_device(fd)
11722 20:01:06.160217 Test requirement not met in fun<14>[ 22.432352] [IGT] kms_addfb_basic: exiting, ret=77
11723 20:01:06.170744 ction igt_require_i915, file ../<8>[ 22.440001] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
11724 20:01:06.171584 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11726 20:01:06.173219 <8>[ 22.442887] <LAVA_SIGNAL_TESTSET STOP>
11727 20:01:06.173636 lib/drmtest.c:720:
11728 20:01:06.174213 Received signal: <TESTSET> STOP
11729 20:01:06.174545 Closing test_set kms_addfb_basic
11730 20:01:06.177143 Test requirement: is_i915_device(fd)
11731 20:01:06.186819 No KMS driver or no outputs, pipes: 8,<8>[ 22.458070] <LAVA_SIGNAL_TESTSET START kms_atomic>
11732 20:01:06.187344 outputs: 0
11733 20:01:06.187980 Received signal: <TESTSET> START kms_atomic
11734 20:01:06.188320 Starting test_set kms_atomic
11735 20:01:06.189938 [1mSubtest small-bo: SKIP (0.000s)[0m
11736 20:01:06.196503 IGT-Version: 1.27.1-g621c2<14>[ 22.470596] [IGT] kms_atomic: executing
11737 20:01:06.203285 <14>[ 22.471024] [IGT] kms_atomic: exiting, ret=77
11738 20:01:06.210000 <8>[ 22.476891] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>
11739 20:01:06.210760 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11741 20:01:06.213566 d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11742 20:01:06.220568 O<14>[ 22.491115] [IGT] kms_atomic: executing
11743 20:01:06.222968 pened device: /d<14>[ 22.491549] [IGT] kms_atomic: exiting, ret=77
11744 20:01:06.226586 ev/dri/card0
11745 20:01:06.233407 Te<8>[ 22.496141] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>
11746 20:01:06.234187 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11748 20:01:06.239934 st requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11749 20:01:06.246715 Test requiremen<14>[ 22.519407] [IGT] kms_atomic: executing
11750 20:01:06.249501 <14>[ 22.519995] [IGT] kms_atomic: exiting, ret=77
11751 20:01:06.259771 <8>[ 22.525278] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
11752 20:01:06.260562 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11754 20:01:06.266227 t: is_i915_devic<14>[ 22.540698] [IGT] kms_atomic: executing
11755 20:01:06.266639 e(fd)
11756 20:01:06.273530 Test requ<14>[ 22.541112] [IGT] kms_atomic: exiting, ret=77
11757 20:01:06.279598 <8>[ 22.547760] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
11758 20:01:06.280413 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11760 20:01:06.285858 irement not met in function igt_<14>[ 22.560054] [IGT] kms_atomic: executing
11761 20:01:06.292848 require_i915, fi<14>[ 22.560435] [IGT] kms_atomic: exiting, ret=77
11762 20:01:06.299057 <8>[ 22.567647] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>
11763 20:01:06.299765 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11765 20:01:06.302607 le ../lib/drmtest.c:720:
11766 20:01:06.306067 Test requirement: is_i915_device(fd)
11767 20:01:06.309790 No KMS driver or no outputs, pipes: 8, outputs: 0
11768 20:01:06.312991 [1mSubtest bo-too-small-due-to-tiling: SKIP (0.000s)[0m
11769 20:01:06.319634 IG<14>[ 22.590456] [IGT] kms_atomic: executing
11770 20:01:06.322341 <14>[ 22.591083] [IGT] kms_atomic: exiting, ret=77
11771 20:01:06.328850 <8>[ 22.596605] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>
11772 20:01:06.329532 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11774 20:01:06.339138 T-Version: 1.27.1-g621c2d3 (aarc<14>[ 22.611618] [IGT] kms_atomic: executing
11775 20:01:06.342315 <14>[ 22.612010] [IGT] kms_atomic: exiting, ret=77
11776 20:01:06.348735 <8>[ 22.620396] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>
11777 20:01:06.349531 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
11779 20:01:06.352425 h64) (Linux: 6.1.59-cip8-rt4 aarch64)
11780 20:01:06.358879 Opened de<14>[ 22.631336] [IGT] kms_atomic: executing
11781 20:01:06.365751 vice: /dev/dri/c<14>[ 22.631718] [IGT] kms_atomic: exiting, ret=77
11782 20:01:06.371952 <8>[ 22.636364] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
11783 20:01:06.372479 ard0
11784 20:01:06.373081 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
11786 20:01:06.382150 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11787 20:01:06.385286 Test requirement: is_i915_device(fd)
11788 20:01:06.388850 Test requirement <14>[ 22.662967] [IGT] kms_atomic: executing
11789 20:01:06.395334 <14>[ 22.663529] [IGT] kms_atomic: exiting, ret=77
11790 20:01:06.402083 <8>[ 22.668565] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>
11791 20:01:06.402894 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
11793 20:01:06.408563 not met in function igt_require_i915, file ../li<14>[ 22.682560] [IGT] kms_atomic: executing
11794 20:01:06.415187 <14>[ 22.682955] [IGT] kms_atomic: exiting, ret=77
11795 20:01:06.421902 <8>[ 22.689292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
11796 20:01:06.422692 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
11798 20:01:06.424872 b/drmtest.c:720:
11799 20:01:06.428438 Test requireme<14>[ 22.703758] [IGT] kms_atomic: executing
11800 20:01:06.435128 nt: is_i915_devi<14>[ 22.704148] [IGT] kms_atomic: exiting, ret=77
11801 20:01:06.444681 <8>[ 22.708275] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>
11802 20:01:06.445190 ce(fd)
11803 20:01:06.445780 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
11805 20:01:06.448284 No KMS driver or no outputs, pipes: 8, outputs: 0
11806 20:01:06.458752 [1mSubtest addfb25-y-tiled-legacy: SKIP (0.000s)[0m<14>[ 22.731403] [IGT] kms_atomic: executing
11807 20:01:06.461824 <14>[ 22.731966] [IGT] kms_atomic: exiting, ret=77
11808 20:01:06.468439 Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
11810 20:01:06.471342 <8>[ 22.737259] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>
11811 20:01:06.474870 <8>[ 22.738442] <LAVA_SIGNAL_TESTSET STOP>
11812 20:01:06.475385
11813 20:01:06.476031 Received signal: <TESTSET> STOP
11814 20:01:06.476370 Closing test_set kms_atomic
11815 20:01:06.481559 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11816 20:01:06.488615 Opened device: /dev/d<8>[ 22.760979] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
11817 20:01:06.489138 ri/card0
11818 20:01:06.489735 Received signal: <TESTSET> START kms_flip_event_leak
11819 20:01:06.490072 Starting test_set kms_flip_event_leak
11820 20:01:06.498380 Test requirement not met in function igt_require_i915,<14>[ 22.771324] [IGT] kms_flip_event_leak: executing
11821 20:01:06.504766 <14>[ 22.771688] [IGT] kms_flip_event_leak: exiting, ret=77
11822 20:01:06.511295 <8>[ 22.776044] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11823 20:01:06.512178 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11825 20:01:06.514768 <8>[ 22.778919] <LAVA_SIGNAL_TESTSET STOP>
11826 20:01:06.515547 Received signal: <TESTSET> STOP
11827 20:01:06.515961 Closing test_set kms_flip_event_leak
11828 20:01:06.517542 file ../lib/drmtest.c:720:
11829 20:01:06.521285 Test requirement: is_i915_device(fd)
11830 20:01:06.531007 Test requirement not met in function igt_require_i915, file .<8>[ 22.805373] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
11831 20:01:06.531524 ./lib/drmtest.c:720:
11832 20:01:06.532215 Received signal: <TESTSET> START kms_prop_blob
11833 20:01:06.532739 Starting test_set kms_prop_blob
11834 20:01:06.535063 Test requirement: is_i915_device(fd)
11835 20:01:06.541207 No KMS driver or no <14>[ 22.815829] [IGT] kms_prop_blob: executing
11836 20:01:06.548070 <14>[ 22.816132] [IGT] kms_prop_blob: starting subtest basic
11837 20:01:06.554766 <14>[ 22.816182] [IGT] kms_prop_blob: finished subtest basic, SUCCESS
11838 20:01:06.558070 <14>[ 22.816224] [IGT] kms_prop_blob: exiting, ret=0
11839 20:01:06.560950 outputs, pipes: 8, outputs: 0
11840 20:01:06.567776 <8>[ 22.823108] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11841 20:01:06.568536 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11843 20:01:06.574520 <14>[ 22.839935] [IGT] kms_prop_blob: executing
11844 20:01:06.577692 <14>[ 22.840227] [IGT] kms_prop_blob: starting subtest blob-prop-core
11845 20:01:06.587760 <14>[ 22.840277] [IGT] kms_prop_blob: finished subtest blob-prop-core, SUCCESS
11846 20:01:06.591171 <14>[ 22.840323] [IGT] kms_prop_blob: exiting, ret=0
11847 20:01:06.597849 <8>[ 22.845230] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
11848 20:01:06.598657 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
11850 20:01:06.603886 <14>[ 22.859890] [IGT] kms_prop_blob: executing
11851 20:01:06.607302 [1mSubtest addfb25-yf-tiled-legacy: SKIP (0.000s)[0m
11852 20:01:06.614209 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11853 20:01:06.617109 Opened device: /dev/dri/card0
11854 20:01:06.624320 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11855 20:01:06.627204 Test requirement: is_i915_device(fd)
11856 20:01:06.633809 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11857 20:01:06.637348 Test requirement: is_i915_device(fd)
11858 20:01:06.641073 No KMS driver or no outputs, pipes: 8, outputs: 0
11859 20:01:06.647472 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000s)[0m
11860 20:01:06.653750 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11861 20:01:06.657176 Opened device: /dev/dri/card0
11862 20:01:06.664256 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11863 20:01:06.667407 Test requirement: is_i915_device(fd)
11864 20:01:06.674417 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11865 20:01:06.677601 Test requirement: is_i915_device(fd)
11866 20:01:06.680643 No KMS driver or no outputs, pipes: 8, outputs: 0
11867 20:01:06.687225 [1mSubtest addfb25-4-tiled: SKIP (0.000s)[0m
11868 20:01:06.690230 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11869 20:01:06.693356 Opened device: /dev/dri/card0
11870 20:01:06.700258 No KMS driver or no outputs, pipes: 8, outputs: 0
11871 20:01:06.703746 [1mSubtest plane-overlay-legacy: SKIP (0.000s)[0m
11872 20:01:06.710071 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11873 20:01:06.713562 Opened device: /dev/dri/card0
11874 20:01:06.716470 No KMS driver or no outputs, pipes: 8, outputs: 0
11875 20:01:06.723705 [1mSubtest plane-primary-legacy: SKIP (0.000s)[0m
11876 20:01:06.726684 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11877 20:01:06.729771 Opened device: /dev/dri/card0
11878 20:01:06.736409 No KMS driver or no outputs, pipes: 8, outputs: 0
11879 20:01:06.740030 [1mSubtest plane-primary-overlay-mutable-zpos: SKIP (0.000s)[0m
11880 20:01:06.746292 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11881 20:01:06.749500 Opened device: /dev/dri/card0
11882 20:01:06.752871 No KMS driver or no outputs, pipes: 8, outputs: 0
11883 20:01:06.759984 [1mSubtest plane-immutable-zpos: SKIP (0.000s)[0m
11884 20:01:06.766483 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11885 20:01:06.769633 Opened device: /dev/dri/card0
11886 20:01:06.772721 No KMS driver or no outputs, pipes: 8, outputs: 0
11887 20:01:06.776678 [1mSubtest test-only: SKIP (0.000s)[0m
11888 20:01:06.782976 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11889 20:01:06.786158 Opened device: /dev/dri/card0
11890 20:01:06.789686 No KMS driver or no outputs, pipes: 8, outputs: 0
11891 20:01:06.792559 [1mSubtest plane-cursor-legacy: SKIP (0.000s)[0m
11892 20:01:06.799525 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11893 20:01:06.802768 Opened device: /dev/dri/card0
11894 20:01:06.806192 No KMS driver or no outputs, pipes: 8, outputs: 0
11895 20:01:06.813177 [1mSubtest plane-invalid-params: SKIP (0.000s)[0m
11896 20:01:06.819751 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11897 20:01:06.822803 Opened device: /dev/dri/card0
11898 20:01:06.826153 No KMS driver or no outputs, pipes: 8, outputs: 0
11899 20:01:06.829134 [1mSubtest plane-invalid-params-fence: SKIP (0.000s)[0m
11900 20:01:06.835814 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11901 20:01:06.839750 Opened device: /dev/dri/card0
11902 20:01:06.845685 No KMS driver or no outputs, pipes: 8, outputs: 0
11903 20:01:06.849483 [1mSubtest crtc-invalid-params: SKIP (0.000s)[0m
11904 20:01:06.855818 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11905 20:01:06.859614 Opened device: /dev/dri/card0
11906 20:01:06.862417 No KMS driver or no outputs, pipes: 8, outputs: 0
11907 20:01:06.865920 [1mSubtest crtc-invalid-params-fence: SKIP (0.000s)[0m
11908 20:01:06.872555 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11909 20:01:06.875901 Opened device: /dev/dri/card0
11910 20:01:06.882512 No KMS driver or no outputs, pipes: 8, outputs: 0
11911 20:01:06.885351 [1mSubtest atomic-invalid-params: SKIP (0.000s)[0m
11912 20:01:06.892580 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11913 20:01:06.895738 Opened device: /dev/dri/card0
11914 20:01:06.898672 No KMS driver or no outputs, pipes: 8, outputs: 0
11915 20:01:06.901754 [1mSubtest atomic_plane_damage: SKIP (0.000s)[0m
11916 20:01:06.909228 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11917 20:01:06.912239 Opened device: /dev/dri/card0
11918 20:01:06.915532 No KMS driver or no outputs, pipes: 8, outputs: 0
11919 20:01:06.918670 [1mSubtest basic: SKIP (0.000s)[0m
11920 20:01:06.925479 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11921 20:01:06.928901 Opened device: /dev/dri/card0
11922 20:01:06.932193 Starting subtest: basic
11923 20:01:06.935360 [1mSubtest basic: SUCCESS (0.000s)[0m
11924 20:01:06.944919 IGT-Version: 1.27.1-g621c2d<14>[ 23.217090] [IGT] kms_prop_blob: starting subtest blob-prop-validate
11925 20:01:06.951855 <14>[ 23.217254] [IGT] kms_prop_blob: finished subtest blob-prop-validate, SUCCESS
11926 20:01:06.955042 <14>[ 23.217340] [IGT] kms_prop_blob: exiting, ret=0
11927 20:01:06.964989 <8>[ 23.221612] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
11928 20:01:06.965691 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
11930 20:01:06.968205 <14>[ 23.237254] [IGT] kms_prop_blob: executing
11931 20:01:06.974772 3 (aarch64) (Lin<14>[ 23.249341] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
11932 20:01:06.985049 <14>[ 23.249418] [IGT] kms_prop_blob: finished subtest blob-prop-lifetime, SUCCESS
11933 20:01:06.988204 <14>[ 23.249459] [IGT] kms_prop_blob: exiting, ret=0
11934 20:01:06.994992 <8>[ 23.253541] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
11935 20:01:06.995767 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
11937 20:01:07.001620 ux: 6.1.59-cip8-<14>[ 23.277168] [IGT] kms_prop_blob: executing
11938 20:01:07.008213 <14>[ 23.277454] [IGT] kms_prop_blob: starting subtest blob-multiple
11939 20:01:07.014966 <14>[ 23.277574] [IGT] kms_prop_blob: finished subtest blob-multiple, SUCCESS
11940 20:01:07.020997 <14>[ 23.277611] [IGT] kms_prop_blob: exiting, ret=0
11941 20:01:07.028239 <8>[ 23.281611] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
11942 20:01:07.029037 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
11944 20:01:07.031327 <14>[ 23.296342] [IGT] kms_prop_blob: executing
11945 20:01:07.034363 rt4 aarch64)
11946 20:01:07.041229 Op<14>[ 23.312858] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
11947 20:01:07.047715 <14>[ 23.312903] [IGT] kms_prop_blob: finished subtest invalid-get-prop-any, SUCCESS
11948 20:01:07.051134 <14>[ 23.312940] [IGT] kms_prop_blob: exiting, ret=0
11949 20:01:07.061383 <8>[ 23.319200] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11950 20:01:07.062174 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11952 20:01:07.064237 <14>[ 23.333516] [IGT] kms_prop_blob: executing
11953 20:01:07.067447 ened device: /dev/dri/card0
11954 20:01:07.071142 Starting subtest: blob-prop-core
11955 20:01:07.077881 <14>[ 23.345858] [IGT] kms_prop_blob: starting subtest invalid-get-prop
11956 20:01:07.084120 <14>[ 23.345921] [IGT] kms_prop_blob: finished subtest invalid-get-prop, SUCCESS
11957 20:01:07.088198 <14>[ 23.345958] [IGT] kms_prop_blob: exiting, ret=0
11958 20:01:07.097253 <8>[ 23.349986] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11959 20:01:07.098047 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11961 20:01:07.100771 [1mSubtest blob-<14>[ 23.377242] [IGT] kms_prop_blob: executing
11962 20:01:07.107719 <14>[ 23.377544] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
11963 20:01:07.117486 <14>[ 23.377592] [IGT] kms_prop_blob: finished subtest invalid-set-prop-any, SUCCESS
11964 20:01:07.120497 <14>[ 23.377629] [IGT] kms_prop_blob: exiting, ret=0
11965 20:01:07.130812 <8>[ 23.383994] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11966 20:01:07.131611 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11968 20:01:07.134019 <14>[ 23.402483] [IGT] kms_prop_blob: executing
11969 20:01:07.136975 prop-core: SUCCESS (0.000s)[0m
11970 20:01:07.143804 IGT-Version: 1.<14>[ 23.414756] [IGT] kms_prop_blob: starting subtest invalid-set-prop
11971 20:01:07.150558 <14>[ 23.414805] [IGT] kms_prop_blob: finished subtest invalid-set-prop, SUCCESS
11972 20:01:07.157442 <14>[ 23.414840] [IGT] kms_prop_blob: exiting, ret=0
11973 20:01:07.163463 <8>[ 23.418973] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11974 20:01:07.164317 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11976 20:01:07.167342 <8>[ 23.421150] <LAVA_SIGNAL_TESTSET STOP>
11977 20:01:07.168192 Received signal: <TESTSET> STOP
11978 20:01:07.168551 Closing test_set kms_prop_blob
11979 20:01:07.173671 <8>[ 23.433640] <LAVA_SIGNAL_TESTSET START kms_setmode>
11980 20:01:07.174467 Received signal: <TESTSET> START kms_setmode
11981 20:01:07.174831 Starting test_set kms_setmode
11982 20:01:07.176578 27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
11983 20:01:07.183849 Opened<14>[ 23.453924] [IGT] kms_setmode: executing
11984 20:01:07.187034 <14>[ 23.454258] [IGT] kms_setmode: starting subtest basic
11985 20:01:07.193334 <14>[ 23.454306] [IGT] kms_setmode: finished subtest basic, SKIP
11986 20:01:07.200542 <14>[ 23.454347] [IGT] kms_setmode: exiting, ret=77
11987 20:01:07.206635 <8>[ 23.458568] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11988 20:01:07.207160 device: /dev/dri/card0
11989 20:01:07.207783 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11991 20:01:07.213154 Starting subtest: blob-<14>[ 23.486382] [IGT] kms_setmode: executing
11992 20:01:07.219595 <14>[ 23.486735] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
11993 20:01:07.226195 <14>[ 23.486782] [IGT] kms_setmode: finished subtest basic-clone-single-crtc, SKIP
11994 20:01:07.233469 <14>[ 23.486830] [IGT] kms_setmode: exiting, ret=77
11995 20:01:07.239732 <8>[ 23.491003] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
11996 20:01:07.240514 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
11998 20:01:07.242957 prop-validate
11999 20:01:07.249968 [1mSubtest blob-prop-validate: S<14>[ 23.522044] [IGT] kms_setmode: executing
12000 20:01:07.256473 <14>[ 23.522379] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
12001 20:01:07.265958 UCCESS (0.000s)<14>[ 23.522425] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc, SKIP
12002 20:01:07.269710 <14>[ 23.522466] [IGT] kms_setmode: exiting, ret=77
12003 20:01:07.279928 <8>[ 23.526805] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
12004 20:01:07.280447 [0m
12005 20:01:07.281054 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
12007 20:01:07.286459 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12008 20:01:07.290225 Op<14>[ 23.562773] [IGT] kms_setmode: executing
12009 20:01:07.299455 ened device: /de<14>[ 23.563186] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
12010 20:01:07.305910 <14>[ 23.563261] [IGT] kms_setmode: finished subtest invalid-clone-exclusive-crtc, SKIP
12011 20:01:07.306516 v/dri/card0
12012 20:01:07.312829 Sta<14>[ 23.563340] [IGT] kms_setmode: exiting, ret=77
12013 20:01:07.319276 <8>[ 23.568694] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
12014 20:01:07.320120 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
12016 20:01:07.322849 rting subtest: blob-prop-lifetime
12017 20:01:07.328962 [1mSubtest blob-prop-lifetim<14>[ 23.601732] [IGT] kms_setmode: executing
12018 20:01:07.335933 <14>[ 23.602331] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
12019 20:01:07.345898 <14>[ 23.602377] [IGT] kms_setmode: finished subtest clone-exclusive-crtc, SKIP
12020 20:01:07.349353 <14>[ 23.602416] [IGT] kms_setmode: exiting, ret=77
12021 20:01:07.355318 <8>[ 23.608355] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
12022 20:01:07.356042 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
12024 20:01:07.359018 e: SUCCESS (0.000s)[0m
12025 20:01:07.365750 IGT-Version: 1.27.1-g62<14>[ 23.638061] [IGT] kms_setmode: executing
12026 20:01:07.371954 <14>[ 23.638393] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
12027 20:01:07.382004 <14>[ 23.638443] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc-stealing, SKIP
12028 20:01:07.385168 <14>[ 23.638485] [IGT] kms_setmode: exiting, ret=77
12029 20:01:07.395280 <8>[ 23.645066] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
12030 20:01:07.396130 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
12032 20:01:07.398939 <8>[ 23.647770] <LAVA_SIGNAL_TESTSET STOP>
12033 20:01:07.399607 Received signal: <TESTSET> STOP
12034 20:01:07.400004 Closing test_set kms_setmode
12035 20:01:07.405559 <8>[ 23.675702] <LAVA_SIGNAL_TESTSET START kms_vblank>
12036 20:01:07.406229 Received signal: <TESTSET> START kms_vblank
12037 20:01:07.406643 Starting test_set kms_vblank
12038 20:01:07.408490 1c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12039 20:01:07.415801 Opened device:<14>[ 23.686369] [IGT] kms_vblank: executing
12040 20:01:07.416324 /dev/dri/card0
12041 20:01:07.419090 <14>[ 23.686842] [IGT] kms_vblank: exiting, ret=77
12042 20:01:07.425372 <8>[ 23.695011] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>
12043 20:01:07.425910
12044 20:01:07.426545 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
12046 20:01:07.432199 Starting subtest: blob-multiple<14>[ 23.707759] [IGT] kms_vblank: executing
12047 20:01:07.438775 <14>[ 23.708181] [IGT] kms_vblank: exiting, ret=77
12048 20:01:07.445431 <8>[ 23.713929] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>
12049 20:01:07.445962
12050 20:01:07.446571 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
12052 20:01:07.448474 [1mSubtest blob-multiple: SUCCESS (0.000s)[0m
12053 20:01:07.455599 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12054 20:01:07.461726 Opened device: /dev/<14>[ 23.736870] [IGT] kms_vblank: executing
12055 20:01:07.465644 <14>[ 23.737748] [IGT] kms_vblank: exiting, ret=77
12056 20:01:07.468418 dri/card0
12057 20:01:07.472159 Starting subtest: invalid-get-prop-any
12058 20:01:07.481850 [1mSubtest invalid-get-prop-<8>[ 23.752413] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>
12059 20:01:07.482358 any: SUCCESS (0.000s)[0m
12060 20:01:07.482955 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
12062 20:01:07.488948 IGT-Version: 1.27.1-g<14>[ 23.762704] [IGT] kms_vblank: executing
12063 20:01:07.495474 <14>[ 23.763170] [IGT] kms_vblank: exiting, ret=77
12064 20:01:07.501928 <8>[ 23.769711] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>
12065 20:01:07.502621 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
12067 20:01:07.508350 621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch6<14>[ 23.782559] [IGT] kms_vblank: executing
12068 20:01:07.515412 <14>[ 23.783043] [IGT] kms_vblank: exiting, ret=77
12069 20:01:07.521390 <8>[ 23.788745] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>
12070 20:01:07.521805 4)
12071 20:01:07.522395 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
12073 20:01:07.528228 Opened device: /dev/dri/card<14>[ 23.803494] [IGT] kms_vblank: executing
12074 20:01:07.528643 0
12075 20:01:07.534984 Starting subt<14>[ 23.803959] [IGT] kms_vblank: exiting, ret=77
12076 20:01:07.541788 <8>[ 23.808004] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>
12077 20:01:07.542574 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
12079 20:01:07.544891 est: invalid-get-prop
12080 20:01:07.548349 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
12081 20:01:07.558097 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59<14>[ 23.831020] [IGT] kms_vblank: executing
12082 20:01:07.565085 <14>[ 23.831884] [IGT] kms_vblank: exiting, ret=77
12083 20:01:07.571071 <8>[ 23.837595] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>
12084 20:01:07.571600 -cip8-rt4 aarch64)
12085 20:01:07.572354 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
12087 20:01:07.574887 Opened device: /dev/dri/card0
12088 20:01:07.581318 Starting subtest: invalid-set<14>[ 23.856951] [IGT] kms_vblank: executing
12089 20:01:07.587676 <14>[ 23.857880] [IGT] kms_vblank: exiting, ret=77
12090 20:01:07.588187 -prop-any
12091 20:01:07.591752 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
12092 20:01:07.604228 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt<8>[ 23.874479] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>
12093 20:01:07.605008 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
12095 20:01:07.607723 4 aarch64)
12096 20:01:07.608149 Opened device: /dev/dri/card0
12097 20:01:07.611060 Starting subtest: invalid-set-prop
12098 20:01:07.617571 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
12099 20:01:07.627831 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt<14>[ 23.900041] [IGT] kms_vblank: executing
12100 20:01:07.631275 <14>[ 23.900939] [IGT] kms_vblank: exiting, ret=77
12101 20:01:07.637635 <8>[ 23.906082] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>
12102 20:01:07.638459 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
12104 20:01:07.640520 4 aarch64)
12105 20:01:07.644439 Opened device: /dev/<14>[ 23.919947] [IGT] kms_vblank: executing
12106 20:01:07.647609 dri/card0
12107 20:01:07.650811 Start<14>[ 23.920432] [IGT] kms_vblank: exiting, ret=77
12108 20:01:07.660735 ing subtest: bas<8>[ 23.924756] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>
12109 20:01:07.661253 ic
12110 20:01:07.661853 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12112 20:01:07.664061 No dynamic tests executed.
12113 20:01:07.667202 [1mSubtest basic: SKIP (0.000s)[0m
12114 20:01:07.674504 IGT-Version: 1.27.1-g621c2<14>[ 23.949133] [IGT] kms_vblank: executing
12115 20:01:07.677702 d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12116 20:01:07.683689 O<14>[ 23.950056] [IGT] kms_vblank: exiting, ret=77
12117 20:01:07.691378 <8>[ 23.959915] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>
12118 20:01:07.692217 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12120 20:01:07.694152 pened device: /dev/dri/card0
12121 20:01:07.697612 St<14>[ 23.972245] [IGT] kms_vblank: executing
12122 20:01:07.703615 arting subtest: <14>[ 23.972753] [IGT] kms_vblank: exiting, ret=77
12123 20:01:07.710938 <8>[ 23.979676] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>
12124 20:01:07.711765 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12126 20:01:07.717188 basic-clone-sing<14>[ 23.992635] [IGT] kms_vblank: executing
12127 20:01:07.717727 le-crtc
12128 20:01:07.723762 No dyna<14>[ 23.993108] [IGT] kms_vblank: exiting, ret=77
12129 20:01:07.730042 <8>[ 23.997240] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>
12130 20:01:07.730792 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12132 20:01:07.733461 mic tests executed.
12133 20:01:07.736977 [1mSubtest basic-clone-single-crtc: SKIP (0.000s)[0m
12134 20:01:07.746750 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<14>[ 24.021467] [IGT] kms_vblank: executing
12135 20:01:07.747299 59-cip8-rt4 aarch64)
12136 20:01:07.753672 Opened dev<14>[ 24.027747] [IGT] kms_vblank: exiting, ret=77
12137 20:01:07.760049 <8>[ 24.031978] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>
12138 20:01:07.760741 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12140 20:01:07.763783 ice: /dev/dri/card0
12141 20:01:07.770362 Starting subtest: invalid-c<14>[ 24.042652] [IGT] kms_vblank: executing
12142 20:01:07.776744 lone-single-crtc<14>[ 24.043138] [IGT] kms_vblank: exiting, ret=77
12143 20:01:07.783952 <8>[ 24.049808] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>
12144 20:01:07.784472
12145 20:01:07.785063 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12147 20:01:07.789950 No dynamic tes<14>[ 24.064765] [IGT] kms_vblank: executing
12148 20:01:07.790458 ts executed.
12149 20:01:07.796742 [1mSubtest invalid-clone-single-crtc: SKIP (0.000s)[0m
12150 20:01:07.803511 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12151 20:01:07.803977 Opened device: /dev/dri/card0
12152 20:01:07.809951 Starting subtest: invalid-clone-exclusive-crtc
12153 20:01:07.810473 No dynamic tests executed.
12154 20:01:07.816852 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
12155 20:01:07.822945 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12156 20:01:07.827029 Opened device: /dev/dri/card0
12157 20:01:07.829940 Starting subtest: clone-exclusive-crtc
12158 20:01:07.830359 No dynamic tests executed.
12159 20:01:07.836339 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
12160 20:01:07.843247 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12161 20:01:07.846698 Opened device: /dev/dri/card0
12162 20:01:07.849840 Starting subtest: invalid-clone-single-crtc-stealing
12163 20:01:07.852870 No dynamic tests executed.
12164 20:01:07.859700 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
12165 20:01:07.863116 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12166 20:01:07.866725 Opened device: /dev/dri/card0
12167 20:01:07.873344 No KMS driver or no outputs, pipes: 8, outputs: 0
12168 20:01:07.876322 [1mSubtest invalid: SKIP (0.000s)[0m
12169 20:01:07.879808 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12170 20:01:07.883036 Opened device: /dev/dri/card0
12171 20:01:07.890136 No KMS driver or no outputs, pipes: 8, outputs: 0
12172 20:01:07.893467 [1mSubtest crtc-id: SKIP (0.000s)[0m
12173 20:01:07.899483 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12174 20:01:07.900050 Opened device: /dev/dri/card0
12175 20:01:07.906260 No KMS driver or no outputs, pipes: 8, outputs: 0
12176 20:01:07.909790 [1mSubtest pipe-A-accuracy-idle: SKIP (0.000s)[0m
12177 20:01:07.916366 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12178 20:01:07.919882 Opened device: /dev/dri/card0
12179 20:01:07.922876 No KMS driver or no outputs, pipes: 8, outputs: 0
12180 20:01:07.926289 [1mSubtest pipe-A-query-idle: SKIP (0.000s)[0m
12181 20:01:07.932896 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12182 20:01:07.936295 Opened device: /dev/dri/card0
12183 20:01:07.939741 No KMS driver or no outputs, pipes: 8, outputs: 0
12184 20:01:07.946285 [1mSubtest pipe-A-query-idle-hang: SKIP (0.000s)[0m
12185 20:01:07.953300 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12186 20:01:07.956033 Opened device: /dev/dri/card0
12187 20:01:07.959470 No KMS driver or no outputs, pipes: 8, outputs: 0
12188 20:01:07.962509 [1mSubtest pipe-A-query-forked: SKIP (0.000s)[0m
12189 20:01:07.969888 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12190 20:01:07.972581 Opened device: /dev/dri/card0
12191 20:01:07.976021 No KMS driver or no outputs, pipes: 8, outputs: 0
12192 20:01:07.982644 [1mSubtest pipe-A-query-forked-hang: SKIP (0.000s)[0m
12193 20:01:07.988783 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12194 20:01:07.992140 Opened device: /dev/dri/card0
12195 20:01:07.995783 No KMS driver or no outputs, pipes: 8, outputs: 0
12196 20:01:07.998973 [1mSubtest pipe-A-query-busy: SKIP (0.000s)[0m
12197 20:01:08.005627 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12198 20:01:08.008698 Opened device: /dev/dri/card0
12199 20:01:08.012536 No KMS driver or no outputs, pipes: 8, outputs: 0
12200 20:01:08.019003 [1mSubtest pipe-A-query-busy-hang: SKIP (0.000s)[0m
12201 20:01:08.025748 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12202 20:01:08.029155 Opened device: /dev/dri/card0
12203 20:01:08.032013 No KMS driver or no outputs, pipes: 8, outputs: 0
12204 20:01:08.035526 [1mSubtest pipe-A-query-forked-busy: SKIP (0.000s)[0m
12205 20:01:08.042254 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12206 20:01:08.045903 Opened device: /dev/dri/card0
12207 20:01:08.048877 No KMS driver or no outputs, pipes: 8, outputs: 0
12208 20:01:08.055231 [1mSubtest pipe-A-query-forked-busy-hang: SKIP (0.000s)[0m
12209 20:01:08.062221 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12210 20:01:08.065255 Opened device: /dev/dri/card0
12211 20:01:08.068490 No KMS driver or no outputs, pipes: 8, outputs: 0
12212 20:01:08.071502 [1mSubtest pipe-A-wait-idle: SKIP (0.000s)[0m
12213 20:01:08.078526 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12214 20:01:08.081573 Opened device: /dev/dri/card0
12215 20:01:08.084955 No KMS driver or no outputs, pipes: 8, outputs: 0
12216 20:01:08.091710 [1mSubtest pipe-A-wait-idle-hang: SKIP (0.000s)[0m
12217 20:01:08.098105 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12218 20:01:08.102002 Opened device: /dev/dri/card0
12219 20:01:08.104977 No KMS driver or no outputs, pipes: 8, outputs: 0
12220 20:01:08.108302 [1mSubtest pipe-A-wait-forked: SKIP (0.000s)[0m
12221 20:01:08.115195 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12222 20:01:08.118693 Opened device: /dev/dri/card0
12223 20:01:08.121750 No KMS driver or no outputs, pipes: 8, outputs: 0
12224 20:01:08.131764 [1mSubtest pipe-A-wait-forked-<14>[ 24.402561] [IGT] kms_vblank: exiting, ret=77
12225 20:01:08.137931 <8>[ 24.407179] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>
12226 20:01:08.138426 hang: SKIP (0.000s)[0m
12227 20:01:08.139043 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12229 20:01:08.144726 IGT-Version: 1.27.1-g62<14>[ 24.418468] [IGT] kms_vblank: executing
12230 20:01:08.151372 <14>[ 24.418951] [IGT] kms_vblank: exiting, ret=77
12231 20:01:08.158290 <8>[ 24.424982] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>
12232 20:01:08.159082 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12234 20:01:08.164885 1c2d3 (aarch64) (Linux: 6.1.59-c<14>[ 24.439333] [IGT] kms_vblank: executing
12235 20:01:08.171075 ip8-rt4 aarch64)<14>[ 24.439857] [IGT] kms_vblank: exiting, ret=77
12236 20:01:08.171492
12237 20:01:08.181510 Opened device:<8>[ 24.444943] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>
12238 20:01:08.182096 /dev/dri/card0
12239 20:01:08.182710 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12241 20:01:08.188594 No KMS driver or no outputs, pipes: 8, outputs: 0
12242 20:01:08.194907 [1mSubtest pipe-A-wait-busy<14>[ 24.467918] [IGT] kms_vblank: executing
12243 20:01:08.197914 <14>[ 24.468827] [IGT] kms_vblank: exiting, ret=77
12244 20:01:08.204627 <8>[ 24.474114] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>
12245 20:01:08.205355 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12247 20:01:08.207562 : SKIP (0.000s)[0m
12248 20:01:08.214528 IGT-Version<14>[ 24.487292] [IGT] kms_vblank: executing
12249 20:01:08.218379 <14>[ 24.487839] [IGT] kms_vblank: exiting, ret=77
12250 20:01:08.224494 <8>[ 24.495184] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>
12251 20:01:08.225271 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12253 20:01:08.234400 : 1.27.1-g621c2d3 (aarch64) (Lin<14>[ 24.507256] [IGT] kms_vblank: executing
12254 20:01:08.237809 ux: 6.1.59-cip8-<14>[ 24.507799] [IGT] kms_vblank: exiting, ret=77
12255 20:01:08.247961 <8>[ 24.512341] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>
12256 20:01:08.248470 rt4 aarch64)
12257 20:01:08.249071 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12259 20:01:08.251348 Opened device: /dev/dri/card0
12260 20:01:08.257941 No KMS driver or no outputs, pipes: 8, outputs: 0
12261 20:01:08.261441 [1mSubtest pipe-A-wait-busy-hang: SKIP (0.000s)[0m
12262 20:01:08.264246 IGT-Versio<14>[ 24.537940] [IGT] kms_vblank: executing
12263 20:01:08.270995 <14>[ 24.538799] [IGT] kms_vblank: exiting, ret=77
12264 20:01:08.277464 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12266 20:01:08.281280 <8>[ 24.544148] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>
12267 20:01:08.287567 n: 1.27.1-g621c2d3 (aarch64) (Li<14>[ 24.560421] [IGT] kms_vblank: executing
12268 20:01:08.290851 <14>[ 24.560935] [IGT] kms_vblank: exiting, ret=77
12269 20:01:08.300879 <8>[ 24.567517] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>
12270 20:01:08.301658 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12272 20:01:08.303930 nux: 6.1.59-cip8<14>[ 24.581080] [IGT] kms_vblank: executing
12273 20:01:08.310858 <14>[ 24.581603] [IGT] kms_vblank: exiting, ret=77
12274 20:01:08.317159 <8>[ 24.586190] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>
12275 20:01:08.317839 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12277 20:01:08.320201 -rt4 aarch64)
12278 20:01:08.323785 Opened device: /dev/dri/card0
12279 20:01:08.327400 No KMS driver or no outputs, pipes: 8, outputs: 0
12280 20:01:08.330698 [1mSubtest pipe-A-wait-forked-busy: SKIP (0.000s)[0m
12281 20:01:08.337006 IGT-Version: 1.27.1-g62<14>[ 24.610486] [IGT] kms_vblank: executing
12282 20:01:08.343671 <14>[ 24.611335] [IGT] kms_vblank: exiting, ret=77
12283 20:01:08.349941 <8>[ 24.616654] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>
12284 20:01:08.350719 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12286 20:01:08.356667 1c2d3 (aarch64) <14>[ 24.632610] [IGT] kms_vblank: executing
12287 20:01:08.362904 <14>[ 24.633093] [IGT] kms_vblank: exiting, ret=77
12288 20:01:08.369802 <8>[ 24.640037] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>
12289 20:01:08.370570 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12291 20:01:08.376469 (Linux: 6.1.59-cip8-rt4 aarch64)<14>[ 24.651888] [IGT] kms_vblank: executing
12292 20:01:08.376988
12293 20:01:08.383359 Opened device:<14>[ 24.652379] [IGT] kms_vblank: exiting, ret=77
12294 20:01:08.393579 <8>[ 24.656593] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>
12295 20:01:08.394093 /dev/dri/card0
12296 20:01:08.394694 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12298 20:01:08.399924 No KMS driver or no outputs, pipes: 8, outputs: 0
12299 20:01:08.402737 [1mSubtest pipe-A-wait-forked-busy-hang: SKIP (0.000s)[0m
12300 20:01:08.409322 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12301 20:01:08.413183 Opened device: /dev/dri/card0
12302 20:01:08.416384 No KMS <14>[ 24.690343] [IGT] kms_vblank: executing
12303 20:01:08.422809 <14>[ 24.691130] [IGT] kms_vblank: exiting, ret=77
12304 20:01:08.429713 <8>[ 24.696083] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>
12305 20:01:08.430484 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12307 20:01:08.433208 driver or no outputs, pipes: 8, outputs: 0
12308 20:01:08.439455 [1m<14>[ 24.711204] [IGT] kms_vblank: executing
12309 20:01:08.443045 <14>[ 24.711681] [IGT] kms_vblank: exiting, ret=77
12310 20:01:08.449445 <8>[ 24.719067] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>
12311 20:01:08.450223 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12313 20:01:08.456439 Subtest pipe-A-ts-continuation-i<14>[ 24.731717] [IGT] kms_vblank: executing
12314 20:01:08.462754 <14>[ 24.732207] [IGT] kms_vblank: exiting, ret=77
12315 20:01:08.469515 <8>[ 24.736430] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>
12316 20:01:08.470300 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12318 20:01:08.472457 dle: SKIP (0.000s)[0m
12319 20:01:08.479075 IGT-Version: 1.27.1-g621<14>[ 24.751255] [IGT] kms_vblank: executing
12320 20:01:08.482659 <14>[ 24.751739] [IGT] kms_vblank: exiting, ret=77
12321 20:01:08.489246 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12323 20:01:08.492371 <8>[ 24.758710] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>
12324 20:01:08.498646 c2d3 (aarch64) (Linux: 6.1.59-ci<14>[ 24.771964] [IGT] kms_vblank: executing
12325 20:01:08.501818 <14>[ 24.772431] [IGT] kms_vblank: exiting, ret=77
12326 20:01:08.509098 <8>[ 24.776680] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>
12327 20:01:08.509923 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12329 20:01:08.511894 p8-rt4 aarch64)
12330 20:01:08.518571 Opened device: <14>[ 24.791623] [IGT] kms_vblank: executing
12331 20:01:08.519089 /dev/dri/card0
12332 20:01:08.521961 <14>[ 24.792110] [IGT] kms_vblank: exiting, ret=77
12333 20:01:08.531909 <8>[ 24.798922] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>
12334 20:01:08.532684 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12336 20:01:08.535368 No KMS driver or no outputs, pipes: 8, outputs: 0
12337 20:01:08.542232 [1mSubtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)[0m
12338 20:01:08.545565 IGT-Version:<14>[ 24.821122] [IGT] kms_vblank: executing
12339 20:01:08.555347 1.27.1-g621c2d3 (aarch64) (Linu<14>[ 24.822116] [IGT] kms_vblank: exiting, ret=77
12340 20:01:08.561615 <8>[ 24.832596] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>
12341 20:01:08.562385 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12343 20:01:08.565765 x: 6.1.59-cip8-rt4 aarch64)
12344 20:01:08.568818 Opened device: /dev<14>[ 24.843219] [IGT] kms_vblank: executing
12345 20:01:08.571976 /dri/card0
12346 20:01:08.574940 No K<14>[ 24.843692] [IGT] kms_vblank: exiting, ret=77
12347 20:01:08.584829 <8>[ 24.848935] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>
12348 20:01:08.585590 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12350 20:01:08.588976 MS driver or no <14>[ 24.865317] [IGT] kms_vblank: executing
12351 20:01:08.592303 outputs, pipes: 8, outputs: 0
12352 20:01:08.598373 [1mSubtest pipe-<14>[ 24.865870] [IGT] kms_vblank: exiting, ret=77
12353 20:01:08.608381 <8>[ 24.877684] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>
12354 20:01:08.609162 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12356 20:01:08.611307 A-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12357 20:01:08.618275 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12358 20:01:08.621242 Opened device: /dev/dri/card0
12359 20:01:08.624745 No KMS dr<14>[ 24.899720] [IGT] kms_vblank: executing
12360 20:01:08.631174 iver or no outpu<14>[ 24.900571] [IGT] kms_vblank: exiting, ret=77
12361 20:01:08.638221 <8>[ 24.905616] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>
12362 20:01:08.639005 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12364 20:01:08.641112 ts, pipes: 8, outputs: 0
12365 20:01:08.651453 [1mSubtest pipe-A-ts-continuation-dpms-suspend: SKIP <14>[ 24.924902] [IGT] kms_vblank: executing
12366 20:01:08.654456 <14>[ 24.926103] [IGT] kms_vblank: exiting, ret=77
12367 20:01:08.654875 (0.000s)[0m
12368 20:01:08.660728 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12369 20:01:08.664682 Opened device: /dev/dri/card0
12370 20:01:08.674035 No KMS dri<8>[ 24.942433] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>
12371 20:01:08.674787 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12373 20:01:08.677630 ver or no outputs, pipes: 8, outputs: 0
12374 20:01:08.681133 [1mSub<14>[ 24.954526] [IGT] kms_vblank: executing
12375 20:01:08.687721 <14>[ 24.955005] [IGT] kms_vblank: exiting, ret=77
12376 20:01:08.694285 <8>[ 24.960589] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>
12377 20:01:08.695068 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12379 20:01:08.700987 test pipe-A-ts-continuation-suspend: SKIP (0.000<14>[ 24.975118] [IGT] kms_vblank: executing
12380 20:01:08.704078 s)[0m
12381 20:01:08.707598 IGT-Vers<14>[ 24.975605] [IGT] kms_vblank: exiting, ret=77
12382 20:01:08.717402 <8>[ 24.979947] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>
12383 20:01:08.718195 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12385 20:01:08.720381 ion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12386 20:01:08.724066 Opened device: /dev/dri/card0
12387 20:01:08.730880 No KMS driver or<14>[ 25.002681] [IGT] kms_vblank: executing
12388 20:01:08.737479 no outputs, pip<14>[ 25.003553] [IGT] kms_vblank: exiting, ret=77
12389 20:01:08.743749 <8>[ 25.008827] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>
12390 20:01:08.744250 es: 8, outputs: 0
12391 20:01:08.744848 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12393 20:01:08.754191 [1mSubtest pipe-A-ts-continuation-modeset: S<14>[ 25.027916] [IGT] kms_vblank: executing
12394 20:01:08.757638 <14>[ 25.028802] [IGT] kms_vblank: exiting, ret=77
12395 20:01:08.766907 <8>[ 25.034055] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>
12396 20:01:08.767424 KIP (0.000s)[0m
12397 20:01:08.768085 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12399 20:01:08.773341 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12400 20:01:08.776591 Opene<14>[ 25.053421] [IGT] kms_vblank: executing
12401 20:01:08.780511 d device: /dev/dri/card0
12402 20:01:08.787100 No KMS<14>[ 25.059938] [IGT] kms_vblank: exiting, ret=77
12403 20:01:08.794151 <8>[ 25.064813] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>
12404 20:01:08.794936 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12406 20:01:08.797311 driver or no outputs, pipes: 8, outputs: 0
12407 20:01:08.803195 [1<14>[ 25.075281] [IGT] kms_vblank: executing
12408 20:01:08.806188 mSubtest pipe-A-<14>[ 25.075760] [IGT] kms_vblank: exiting, ret=77
12409 20:01:08.816756 <8>[ 25.079783] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>
12410 20:01:08.817571 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12412 20:01:08.820082 ts-continuation-modeset-hang: SKIP (0.000s)[0m
12413 20:01:08.830002 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: <14>[ 25.102618] [IGT] kms_vblank: executing
12414 20:01:08.833349 <14>[ 25.103495] [IGT] kms_vblank: exiting, ret=77
12415 20:01:08.842844 <8>[ 25.108714] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>
12416 20:01:08.843365 6.1.59-cip8-rt4 aarch64)
12417 20:01:08.844105 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12419 20:01:08.849896 Opened<14>[ 25.123275] [IGT] kms_vblank: executing
12420 20:01:08.852698 device: /dev/dri/card0
12421 20:01:08.856074 No KMS driver or no outputs, pipes: 8, outputs: 0
12422 20:01:08.862891 [1mSubtest pipe-A-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12423 20:01:08.869426 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12424 20:01:08.869932 Opened device: /dev/dri/card0
12425 20:01:08.876237 No KMS driver or no outputs, pipes: 8, outputs: 0
12426 20:01:08.879022 [1mSubtest pipe-B-accuracy-idle: SKIP (0.000s)[0m
12427 20:01:08.885919 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12428 20:01:08.889401 Opened device: /dev/dri/card0
12429 20:01:08.892201 No KMS driver or no outputs, pipes: 8, outputs: 0
12430 20:01:08.896141 [1mSubtest pipe-B-query-idle: SKIP (0.000s)[0m
12431 20:01:08.902943 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12432 20:01:08.905894 Opened device: /dev/dri/card0
12433 20:01:08.912609 No KMS driver or no outputs, pipes: 8, outputs: 0
12434 20:01:08.915666 [1mSubtest pipe-B-query-idle-hang: SKIP (0.000s)[0m
12435 20:01:08.922438 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12436 20:01:08.925399 Opened device: /dev/dri/card0
12437 20:01:08.929359 No KMS driver or no outputs, pipes: 8, outputs: 0
12438 20:01:08.932401 [1mSubtest pipe-B-query-forked: SKIP (0.000s)[0m
12439 20:01:08.939375 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12440 20:01:08.942545 Opened device: /dev/dri/card0
12441 20:01:08.946019 No KMS driver or no outputs, pipes: 8, outputs: 0
12442 20:01:08.952092 [1mSubtest pipe-B-query-forked-hang: SKIP (0.000s)[0m
12443 20:01:08.959100 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12444 20:01:08.962484 Opened device: /dev/dri/card0
12445 20:01:08.965662 No KMS driver or no outputs, pipes: 8, outputs: 0
12446 20:01:08.968919 [1mSubtest pipe-B-query-busy: SKIP (0.000s)[0m
12447 20:01:08.975336 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12448 20:01:08.978575 Opened device: /dev/dri/card0
12449 20:01:08.982640 No KMS driver or no outputs, pipes: 8, outputs: 0
12450 20:01:08.988508 [1mSubtest pipe-B-query-busy-hang: SKIP (0.000s)[0m
12451 20:01:08.995908 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12452 20:01:08.998863 Opened device: /dev/dri/card0
12453 20:01:09.001798 No KMS driver or no outputs, pipes: 8, outputs: 0
12454 20:01:09.004831 [1mSubtest pipe-B-query-forked-busy: SKIP (0.000s)[0m
12455 20:01:09.011632 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12456 20:01:09.014824 Opened device: /dev/dri/card0
12457 20:01:09.018503 No KMS driver or no outputs, pipes: 8, outputs: 0
12458 20:01:09.024849 [1mSubtest pipe-B-query-forked-busy-hang: SKIP (0.000s)[0m
12459 20:01:09.031088 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12460 20:01:09.034911 Opened device: /dev/dri/card0
12461 20:01:09.038183 No KMS driver or no outputs, pipes: 8, outputs: 0
12462 20:01:09.041411 [1mSubtest pipe-B-wait-idle: SKIP (0.000s)[0m
12463 20:01:09.048159 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12464 20:01:09.051110 Opened device: /dev/dri/card0
12465 20:01:09.057684 No KMS driver or no outputs, pipes: 8, outputs: 0
12466 20:01:09.060776 [1mSubtest pipe-B-wait-idle-hang: SKIP (0.000s)[0m
12467 20:01:09.067381 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12468 20:01:09.071047 Opened device: /dev/dri/card0
12469 20:01:09.074408 No KMS driver or no outputs, pipes: 8, outputs: 0
12470 20:01:09.077533 [1mSubtest pipe-B-wait-forked: SKIP (0.000s)[0m
12471 20:01:09.084106 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12472 20:01:09.087230 Opened device: /dev/dri/card0
12473 20:01:09.093885 No KMS driver or no outputs, pipes: 8, outputs: 0
12474 20:01:09.097133 [1mSubtest pipe-B-wait-forked-hang: SKIP (0.000s)[0m
12475 20:01:09.104029 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12476 20:01:09.107342 Opened device: /dev/dri/card0
12477 20:01:09.110356 No KMS driver or no outputs, pipes: 8, outputs: 0
12478 20:01:09.113940 [1mSubtest pipe-B-wait-busy: SKIP (0.000s)[0m
12479 20:01:09.120914 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12480 20:01:09.123674 Opened device: /dev/dri/card0
12481 20:01:09.126915 No KMS driver or no outputs, pipes: 8, outputs: 0
12482 20:01:09.133697 [1mSubtest pipe-B-wait-busy-hang: SKIP (0.000s)[0m
12483 20:01:09.140679 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12484 20:01:09.143793 Opened device: /dev/dri/card0
12485 20:01:09.146904 No KMS driver or no outputs, pipes: 8, outputs: 0
12486 20:01:09.150108 [1mSubtest pipe-B-wait-forked-busy: SKIP (0.000s)[0m
12487 20:01:09.156693 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12488 20:01:09.160137 Opened device: /dev/dri/card0
12489 20:01:09.163612 No KMS driver or no outputs, pipes: 8, outputs: 0
12490 20:01:09.170498 [1mSubtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)[0m
12491 20:01:09.176768 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12492 20:01:09.179886 Opened device: /dev/dri/card0
12493 20:01:09.186661 No KMS driver or no o<14>[ 25.461377] [IGT] kms_vblank: exiting, ret=77
12494 20:01:09.196588 utputs, pipes: 8<8>[ 25.466233] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>
12495 20:01:09.197100 , outputs: 0
12496 20:01:09.197721 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12498 20:01:09.203244 [1mSubtest pipe-B-ts-continuation-idle: SKIP (0.000s)[0m
12499 20:01:09.210223 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12500 20:01:09.213474 Opened device<14>[ 25.488923] [IGT] kms_vblank: executing
12501 20:01:09.220165 <14>[ 25.490098] [IGT] kms_vblank: exiting, ret=77
12502 20:01:09.220586 : /dev/dri/card0
12503 20:01:09.223173 No KMS driver or no outputs, pipes: 8, outputs: 0
12504 20:01:09.233342 [1mSubtest<8>[ 25.504916] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>
12505 20:01:09.233981 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12507 20:01:09.239484 pipe-B-ts-continuation-idle-hang: SKIP (0.000s)[0m
12508 20:01:09.246808 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12509 20:01:09.247327 Opened device: /dev/dri/card0
12510 20:01:09.253073 No KMS driver or no outputs, pipes: 8, outputs: 0
12511 20:01:09.256574 [1mSubtest pip<14>[ 25.531942] [IGT] kms_vblank: executing
12512 20:01:09.263029 <14>[ 25.532799] [IGT] kms_vblank: exiting, ret=77
12513 20:01:09.272673 <8>[ 25.538440] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>
12514 20:01:09.273451 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12516 20:01:09.276225 e-B-ts-continuat<14>[ 25.552819] [IGT] kms_vblank: executing
12517 20:01:09.282869 <14>[ 25.553391] [IGT] kms_vblank: exiting, ret=77
12518 20:01:09.289835 <8>[ 25.558087] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>
12519 20:01:09.290637 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12521 20:01:09.292664 ion-dpms-rpm: SKIP (0.000s)[0m
12522 20:01:09.295846 <14>[ 25.571661] [IGT] kms_vblank: executing
12523 20:01:09.296366
12524 20:01:09.302402 IGT-Version: 1.<14>[ 25.572214] [IGT] kms_vblank: exiting, ret=77
12525 20:01:09.312454 <8>[ 25.578852] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>
12526 20:01:09.313245 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12528 20:01:09.319510 27.1-g621c2d3 (a<14>[ 25.593297] [IGT] kms_vblank: executing
12529 20:01:09.322529 arch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12530 20:01:09.325342 Opened<14>[ 25.593954] [IGT] kms_vblank: exiting, ret=77
12531 20:01:09.335476 device: /dev/dr<8>[ 25.603434] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>
12532 20:01:09.336202 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12534 20:01:09.338812 i/card0
12535 20:01:09.341821 No KMS driver or no outputs, pipes: 8, outputs: 0
12536 20:01:09.349198 [1mSubtest pipe-B-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12537 20:01:09.352369 IGT-Version: 1.2<14>[ 25.626686] [IGT] kms_vblank: executing
12538 20:01:09.358354 7.1-g621c2d3 (aa<14>[ 25.627562] [IGT] kms_vblank: exiting, ret=77
12539 20:01:09.368424 <8>[ 25.632824] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>
12540 20:01:09.369239 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12542 20:01:09.371503 rch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12543 20:01:09.378115 Opened device: /dev/dri<14>[ 25.652328] [IGT] kms_vblank: executing
12544 20:01:09.381505 <14>[ 25.653223] [IGT] kms_vblank: exiting, ret=77
12545 20:01:09.391807 <8>[ 25.658610] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>
12546 20:01:09.392317 /card0
12547 20:01:09.392912 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12549 20:01:09.398821 No KMS driver or no outp<14>[ 25.671882] [IGT] kms_vblank: executing
12550 20:01:09.405268 uts, pipes: 8, o<14>[ 25.672416] [IGT] kms_vblank: exiting, ret=77
12551 20:01:09.411836 <8>[ 25.680030] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>
12552 20:01:09.412348 utputs: 0
12553 20:01:09.412939 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12555 20:01:09.418775 [1mSubtest pipe-B-ts-continuation-suspend: SKIP (0.000s)[0m
12556 20:01:09.424698 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12557 20:01:09.428216 Opened device<14>[ 25.702960] [IGT] kms_vblank: executing
12558 20:01:09.434709 : /dev/dri/card0<14>[ 25.703771] [IGT] kms_vblank: exiting, ret=77
12559 20:01:09.441460 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12561 20:01:09.444753 <8>[ 25.708848] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>
12562 20:01:09.445291
12563 20:01:09.448108 No KMS driver or no outputs, pipes: 8, outputs: 0
12564 20:01:09.455036 [1mSubtest pipe-B-ts-conti<14>[ 25.729372] [IGT] kms_vblank: executing
12565 20:01:09.461253 nuation-modeset: SKIP (0.000s)[<14>[ 25.735812] [IGT] kms_vblank: exiting, ret=77
12566 20:01:09.467713 <8>[ 25.740841] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>
12567 20:01:09.468490 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12569 20:01:09.471152 0m
12570 20:01:09.478259 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linu<14>[ 25.751707] [IGT] kms_vblank: executing
12571 20:01:09.481071 <14>[ 25.752234] [IGT] kms_vblank: exiting, ret=77
12572 20:01:09.491301 <8>[ 25.756676] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>
12573 20:01:09.492137 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12575 20:01:09.494644 x: 6.1.59-cip8-rt4 aarch64)
12576 20:01:09.497839 Ope<14>[ 25.771720] [IGT] kms_vblank: executing
12577 20:01:09.504676 ned device: /dev<14>[ 25.772205] [IGT] kms_vblank: exiting, ret=77
12578 20:01:09.511163 <8>[ 25.776460] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>
12579 20:01:09.511712 /dri/card0
12580 20:01:09.512311 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12582 20:01:09.517243 No KMS driver or no outputs, pipes: 8, outputs: 0
12583 20:01:09.521160 [1mSubtest pipe-B-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12584 20:01:09.528038 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12585 20:01:09.534033 Open<14>[ 25.806067] [IGT] kms_vblank: executing
12586 20:01:09.537721 <14>[ 25.806900] [IGT] kms_vblank: exiting, ret=77
12587 20:01:09.544018 <8>[ 25.812301] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>
12588 20:01:09.544927 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12590 20:01:09.547517 ed device: /dev/dri/card0
12591 20:01:09.553917 No KMS driver or no outputs, pipes: 8, outputs: 0
12592 20:01:09.557514 [<14>[ 25.832637] [IGT] kms_vblank: executing
12593 20:01:09.561008 <14>[ 25.833432] [IGT] kms_vblank: exiting, ret=77
12594 20:01:09.570606 <8>[ 25.838525] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>
12595 20:01:09.571444 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12597 20:01:09.577505 1mSubtest pipe-B-ts-continuation-modeset-rpm: SK<14>[ 25.850819] [IGT] kms_vblank: executing
12598 20:01:09.584017 <14>[ 25.851314] [IGT] kms_vblank: exiting, ret=77
12599 20:01:09.590322 <8>[ 25.856828] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>
12600 20:01:09.591001 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12602 20:01:09.594062 IP (0.000s)[0m
12603 20:01:09.600623 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12604 20:01:09.603869 Opened device: /dev/dr<14>[ 25.879460] [IGT] kms_vblank: executing
12605 20:01:09.610573 <14>[ 25.880231] [IGT] kms_vblank: exiting, ret=77
12606 20:01:09.617229 <8>[ 25.885016] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>
12607 20:01:09.617750 i/card0
12608 20:01:09.618341 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12610 20:01:09.626583 No KMS driver or no outputs, pipes: 8, <14>[ 25.898279] [IGT] kms_vblank: executing
12611 20:01:09.630339 <14>[ 25.898759] [IGT] kms_vblank: exiting, ret=77
12612 20:01:09.637017 <8>[ 25.904476] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>
12613 20:01:09.637804 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12615 20:01:09.639963 outputs: 0
12616 20:01:09.646554 [1mSubtest pipe-C-accuracy-idle: SK<14>[ 25.919123] [IGT] kms_vblank: executing
12617 20:01:09.647066 IP (0.000s)[0m
12618 20:01:09.653128 <14>[ 25.919601] [IGT] kms_vblank: exiting, ret=77
12619 20:01:09.659924 <8>[ 25.923797] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>
12620 20:01:09.660343
12621 20:01:09.660928 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12623 20:01:09.666846 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12624 20:01:09.670198 Opened device: /dev/dri/card0
12625 20:01:09.673263 No KMS <14>[ 25.946880] [IGT] kms_vblank: executing
12626 20:01:09.679800 <14>[ 25.947713] [IGT] kms_vblank: exiting, ret=77
12627 20:01:09.686580 <8>[ 25.952855] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>
12628 20:01:09.687368 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12630 20:01:09.689751 driver or no outputs, pipes: 8, outputs: 0
12631 20:01:09.696507 [1mSubtest pipe-C-query-idle: SKIP <14>[ 25.972009] [IGT] kms_vblank: executing
12632 20:01:09.703073 <14>[ 25.972864] [IGT] kms_vblank: exiting, ret=77
12633 20:01:09.709645 <8>[ 25.978122] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>
12634 20:01:09.710068 (0.000s)[0m
12635 20:01:09.710661 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12637 20:01:09.716611 IGT-Version: 1.27.1-g621c2d3 (aarc<14>[ 25.990758] [IGT] kms_vblank: executing
12638 20:01:09.723771 <14>[ 25.991259] [IGT] kms_vblank: exiting, ret=77
12639 20:01:09.730071 <8>[ 25.999549] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>
12640 20:01:09.730931 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12642 20:01:09.736314 h64) (Linux: 6.1.59-cip8-rt4 aar<14>[ 26.011580] [IGT] kms_vblank: executing
12643 20:01:09.736827 ch64)
12644 20:01:09.743261 Opened de<14>[ 26.012062] [IGT] kms_vblank: exiting, ret=77
12645 20:01:09.749996 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12647 20:01:09.752510 <8>[ 26.016154] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>
12648 20:01:09.752925 vice: /dev/dri/card0
12649 20:01:09.756535 No KMS driver or no outputs, pipes: 8, outputs: 0
12650 20:01:09.763305 [1mSubtest pipe-C-query-idle-hang: SKIP (0.000s)[0m
12651 20:01:09.769807 IGT-Version: 1.27.1-g621c2d3 (aa<14>[ 26.041859] [IGT] kms_vblank: executing
12652 20:01:09.772543 <14>[ 26.042645] [IGT] kms_vblank: exiting, ret=77
12653 20:01:09.783112 <8>[ 26.047757] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>
12654 20:01:09.783900 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12656 20:01:09.789544 rch64) (Linux: 6.1.59-cip8-rt4 a<14>[ 26.063687] [IGT] kms_vblank: executing
12657 20:01:09.790059 arch64)
12658 20:01:09.795847 Opened <14>[ 26.064165] [IGT] kms_vblank: exiting, ret=77
12659 20:01:09.802975 <8>[ 26.068393] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>
12660 20:01:09.803779 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12662 20:01:09.805670 device: /dev/dri/card0
12663 20:01:09.808705 No KMS driver or no outputs, pipes: 8, outputs: 0
12664 20:01:09.818689 [1mSubtest pipe-C-query-forked: SKIP<14>[ 26.091061] [IGT] kms_vblank: executing
12665 20:01:09.822339 <14>[ 26.091948] [IGT] kms_vblank: exiting, ret=77
12666 20:01:09.832017 <8>[ 26.097121] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>
12667 20:01:09.832511 (0.000s)[0m
12668 20:01:09.833142 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12670 20:01:09.838898 IGT-Version: 1.27<14>[ 26.112326] [IGT] kms_vblank: executing
12671 20:01:09.841848 <14>[ 26.112825] [IGT] kms_vblank: exiting, ret=77
12672 20:01:09.852413 <8>[ 26.117108] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>
12673 20:01:09.853200 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12675 20:01:09.855572 .1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12676 20:01:09.858857 Opened device: /dev/dri/card0
12677 20:01:09.865563 No KMS driver or no outpu<14>[ 26.141101] [IGT] kms_vblank: executing
12678 20:01:09.868707 ts, pipes: 8, outputs: 0
12679 20:01:09.875577 [1mSubtest pipe-C-que<14>[ 26.142042] [IGT] kms_vblank: exiting, ret=77
12680 20:01:09.882285 <8>[ 26.151019] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>
12681 20:01:09.883048 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12683 20:01:09.888564 ry-forked-hang: SKIP (0.000s)[0<14>[ 26.164413] [IGT] kms_vblank: executing
12684 20:01:09.895278 <14>[ 26.164890] [IGT] kms_vblank: exiting, ret=77
12685 20:01:09.895851 m
12686 20:01:09.904993 IGT-Version: <8>[ 26.173318] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>
12687 20:01:09.905760 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12689 20:01:09.911794 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt<14>[ 26.186081] [IGT] kms_vblank: executing
12690 20:01:09.918052 <14>[ 26.186567] [IGT] kms_vblank: exiting, ret=77
12691 20:01:09.924942 <8>[ 26.193100] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>
12692 20:01:09.925727 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12694 20:01:09.928089 4 aarch64)
12695 20:01:09.931294 Opened device: /dev/dri/card0
12696 20:01:09.934730 No KMS driver or no outputs, pipes: 8, outputs: 0
12697 20:01:09.941244 [1mSubtest pipe-C-query-busy: SKI<14>[ 26.216661] [IGT] kms_vblank: executing
12698 20:01:09.944815 <14>[ 26.217465] [IGT] kms_vblank: exiting, ret=77
12699 20:01:09.954765 <8>[ 26.222764] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>
12700 20:01:09.955528 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12702 20:01:09.957945 P (0.000s)[0m
12703 20:01:09.961100 <14>[ 26.236657] [IGT] kms_vblank: executing
12704 20:01:09.964607 <14>[ 26.237119] [IGT] kms_vblank: exiting, ret=77
12705 20:01:09.975057 <8>[ 26.241265] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>
12706 20:01:09.975865 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12708 20:01:09.981099 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12709 20:01:09.984484 Opened device: /dev/dri/card0
12710 20:01:09.991390 No KMS driver or no outp<14>[ 26.263512] [IGT] kms_vblank: executing
12711 20:01:09.991968 uts, pipes: 8, outputs: 0
12712 20:01:09.997815 [1mSubtest pipe-C-query-busy-hang: SKIP (0.000s)[0m
12713 20:01:10.004653 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12714 20:01:10.005168 Opened device: /dev/dri/card0
12715 20:01:10.011095 No KMS driver or no outputs, pipes: 8, outputs: 0
12716 20:01:10.014634 [1mSubtest pipe-C-query-forked-busy: SKIP (0.000s)[0m
12717 20:01:10.020920 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12718 20:01:10.024267 Opened device: /dev/dri/card0
12719 20:01:10.027813 No KMS driver or no outputs, pipes: 8, outputs: 0
12720 20:01:10.033912 [1mSubtest pipe-C-query-forked-busy-hang: SKIP (0.000s)[0m
12721 20:01:10.040540 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12722 20:01:10.044243 Opened device: /dev/dri/card0
12723 20:01:10.047015 No KMS driver or no outputs, pipes: 8, outputs: 0
12724 20:01:10.051077 [1mSubtest pipe-C-wait-idle: SKIP (0.000s)[0m
12725 20:01:10.057225 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12726 20:01:10.060138 Opened device: /dev/dri/card0
12727 20:01:10.063758 No KMS driver or no outputs, pipes: 8, outputs: 0
12728 20:01:10.070626 [1mSubtest pipe-C-wait-idle-hang: SKIP (0.000s)[0m
12729 20:01:10.077117 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12730 20:01:10.080521 Opened device: /dev/dri/card0
12731 20:01:10.083586 No KMS driver or no outputs, pipes: 8, outputs: 0
12732 20:01:10.087462 [1mSubtest pipe-C-wait-forked: SKIP (0.000s)[0m
12733 20:01:10.093816 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12734 20:01:10.097661 Opened device: /dev/dri/card0
12735 20:01:10.100073 No KMS driver or no outputs, pipes: 8, outputs: 0
12736 20:01:10.106923 [1mSubtest pipe-C-wait-forked-hang: SKIP (0.000s)[0m
12737 20:01:10.113430 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12738 20:01:10.113851 Opened device: /dev/dri/card0
12739 20:01:10.120239 No KMS driver or no outputs, pipes: 8, outputs: 0
12740 20:01:10.123771 [1mSubtest pipe-C-wait-busy: SKIP (0.000s)[0m
12741 20:01:10.130288 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12742 20:01:10.133248 Opened device: /dev/dri/card0
12743 20:01:10.137293 No KMS driver or no outputs, pipes: 8, outputs: 0
12744 20:01:10.143256 [1mSubtest pipe-C-wait-busy-hang: SKIP (0.000s)[0m
12745 20:01:10.147280 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12746 20:01:10.150331 Opened device: /dev/dri/card0
12747 20:01:10.157237 No KMS driver or no outputs, pipes: 8, outputs: 0
12748 20:01:10.160188 [1mSubtest pipe-C-wait-forked-busy: SKIP (0.000s)[0m
12749 20:01:10.166944 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12750 20:01:10.170306 Opened device: /dev/dri/card0
12751 20:01:10.173199 No KMS driver or no outputs, pipes: 8, outputs: 0
12752 20:01:10.180143 [1mSubtest pipe-C-wait-forked-busy-hang: SKIP (0.000s)[0m
12753 20:01:10.186502 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12754 20:01:10.186928 Opened device: /dev/dri/card0
12755 20:01:10.193478 No KMS driver or no outputs, pipes: 8, outputs: 0
12756 20:01:10.196423 [1mSubtest pipe-C-ts-continuation-idle: SKIP (0.000s)[0m
12757 20:01:10.202900 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12758 20:01:10.206384 Opened device: /dev/dri/card0
12759 20:01:10.209804 No KMS driver or no outputs, pipes: 8, outputs: 0
12760 20:01:10.216283 [1mSubtest pipe-C-ts-continuation-idle-hang: SKIP (0.000s)[0m
12761 20:01:10.223216 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12762 20:01:10.226964 Opened device: /dev/dri/card0
12763 20:01:10.229758 No KMS driver or no outputs, pipes: 8, outputs: 0
12764 20:01:10.236654 [1mSubtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12765 20:01:10.243398 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12766 20:01:10.245970 Opened device: /dev/dri/card0
12767 20:01:10.249958 No KMS driver or no outputs, pipes: 8, outputs: 0
12768 20:01:10.256268 [1mSubtest pipe-C-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12769 20:01:10.263206 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12770 20:01:10.263787 Opened device: /dev/dri/card0
12771 20:01:10.269404 No KMS driver or no outputs, pipes: 8, outputs: 0
12772 20:01:10.272502 [1mSubtest pipe-C-ts-continuation-suspend: SKIP (0.000s)[0m
12773 20:01:10.279582 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12774 20:01:10.282267 Opened device: /dev/dri/card0
12775 20:01:10.289609 No KMS driver or no outputs, pipes: 8, outputs: 0
12776 20:01:10.292222 [1mSubtest pipe-C-ts-continuation-modeset: SKIP (0.000s)[0m
12777 20:01:10.299284 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12778 20:01:10.302509 Opened device: /dev/dri/card0
12779 20:01:10.305400 No KMS driver or no outputs, pipes: 8, outputs: 0
12780 20:01:10.312356 [1mSubtest pipe-C-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12781 20:01:10.318902 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12782 20:01:10.322445 Opened device: /dev/dri/card0
12783 20:01:10.325292 No <14>[ 26.601066] [IGT] kms_vblank: exiting, ret=77
12784 20:01:10.334971 <8>[ 26.606050] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>
12785 20:01:10.335721 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12787 20:01:10.342160 KMS driver or no outputs, pipes:<14>[ 26.616330] [IGT] kms_vblank: executing
12788 20:01:10.345781 <14>[ 26.616854] [IGT] kms_vblank: exiting, ret=77
12789 20:01:10.352101 <8>[ 26.623856] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>
12790 20:01:10.352887 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12792 20:01:10.354758 8, outputs: 0
12793 20:01:10.361737 [1mSubtest pipe-C-ts-continuati<14>[ 26.634921] [IGT] kms_vblank: executing
12794 20:01:10.365513 <14>[ 26.635408] [IGT] kms_vblank: exiting, ret=77
12795 20:01:10.375072 <8>[ 26.639858] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>
12796 20:01:10.375865 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12798 20:01:10.381676 on-modeset-rpm: SKIP (0.000s)[0<14>[ 26.655472] [IGT] kms_vblank: executing
12799 20:01:10.384893 <14>[ 26.655985] [IGT] kms_vblank: exiting, ret=77
12800 20:01:10.394977 <8>[ 26.663054] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>
12801 20:01:10.395491 m
12802 20:01:10.396196 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12804 20:01:10.401537 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12805 20:01:10.402065 Opened device: /dev/dri/card0
12806 20:01:10.407828 No KMS driver or no outputs, pipes: 8, outputs: 0
12807 20:01:10.415025 [1mSubtest pipe-D-accuracy-idle: <14>[ 26.685934] [IGT] kms_vblank: executing
12808 20:01:10.417660 <14>[ 26.686695] [IGT] kms_vblank: exiting, ret=77
12809 20:01:10.428165 <8>[ 26.692433] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>
12810 20:01:10.428708 SKIP (0.000s)[0m
12811 20:01:10.429430 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
12813 20:01:10.437720 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt<14>[ 26.712708] [IGT] kms_vblank: executing
12814 20:01:10.444103 <14>[ 26.713493] [IGT] kms_vblank: exiting, ret=77
12815 20:01:10.450780 <8>[ 26.719385] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>
12816 20:01:10.451309 4 aarch64)
12817 20:01:10.452151 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
12819 20:01:10.457521 Opened device: /dev/<14>[ 26.731580] [IGT] kms_vblank: executing
12820 20:01:10.460817 <14>[ 26.732136] [IGT] kms_vblank: exiting, ret=77
12821 20:01:10.470732 <8>[ 26.740707] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>
12822 20:01:10.471363 dri/card0
12823 20:01:10.472125 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
12825 20:01:10.477023 No KMS driver or no o<14>[ 26.752432] [IGT] kms_vblank: executing
12826 20:01:10.480382 <14>[ 26.752972] [IGT] kms_vblank: exiting, ret=77
12827 20:01:10.491126 <8>[ 26.758919] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>
12828 20:01:10.491681 utputs, pipes: 8, outputs: 0
12829 20:01:10.492480 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
12831 20:01:10.496963 [1mSubtest pipe-D<14>[ 26.770850] [IGT] kms_vblank: executing
12832 20:01:10.503781 <14>[ 26.771380] [IGT] kms_vblank: exiting, ret=77
12833 20:01:10.510961 <8>[ 26.775795] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>
12834 20:01:10.511791 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
12836 20:01:10.513810 -query-idle: SKIP (0.000s)[0m
12837 20:01:10.520219 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12838 20:01:10.524338 Opened <14>[ 26.798706] [IGT] kms_vblank: executing
12839 20:01:10.530316 <14>[ 26.799561] [IGT] kms_vblank: exiting, ret=77
12840 20:01:10.536995 <8>[ 26.804790] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>
12841 20:01:10.537802 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
12843 20:01:10.540237 device: /dev/dri/card0
12844 20:01:10.547447 No KMS driver or no outp<14>[ 26.818514] [IGT] kms_vblank: executing
12845 20:01:10.550552 <14>[ 26.819006] [IGT] kms_vblank: exiting, ret=77
12846 20:01:10.557038 <8>[ 26.826026] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>
12847 20:01:10.557842 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
12849 20:01:10.560415 uts, pipes: 8, outputs: 0
12850 20:01:10.563856 [1mSubtest pipe-D-query-idle-hang: SKIP (0.000s)[0m
12851 20:01:10.573728 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux:<14>[ 26.847774] [IGT] kms_vblank: executing
12852 20:01:10.576819 <14>[ 26.848623] [IGT] kms_vblank: exiting, ret=77
12853 20:01:10.587347 <8>[ 26.853837] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>
12854 20:01:10.587967 6.1.59-cip8-rt4 aarch64)
12855 20:01:10.588586 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
12857 20:01:10.590048 Opened device: /dev/dri/card0
12858 20:01:10.593106 No KMS driver or no outputs, pipes: 8, outputs: 0
12859 20:01:10.603364 [1mSubtest pipe-D-query-forked: SK<14>[ 26.874210] [IGT] kms_vblank: executing
12860 20:01:10.606739 <14>[ 26.874988] [IGT] kms_vblank: exiting, ret=77
12861 20:01:10.613239 <8>[ 26.879908] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>
12862 20:01:10.613929 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
12864 20:01:10.616286 IP (0.000s)[0m
12865 20:01:10.626646 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 <14>[ 26.900835] [IGT] kms_vblank: executing
12866 20:01:10.629814 <14>[ 26.901647] [IGT] kms_vblank: exiting, ret=77
12867 20:01:10.630309 aarch64)
12868 20:01:10.632979 Opened device: /dev/dri/card0
12869 20:01:10.643463 No KMS driver or no outputs, pipes: 8, <8>[ 26.916653] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>
12870 20:01:10.644353 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
12872 20:01:10.646240 outputs: 0
12873 20:01:10.653207 [1mSubtest pipe-D-query-forked-hang<14>[ 26.927928] [IGT] kms_vblank: executing
12874 20:01:10.656367 <14>[ 26.928415] [IGT] kms_vblank: exiting, ret=77
12875 20:01:10.666534 <8>[ 26.933966] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>
12876 20:01:10.667048 : SKIP (0.000s)[0m
12877 20:01:10.667692 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
12879 20:01:10.673047 IGT-Version: 1.27.1-g621c2d<14>[ 26.947034] [IGT] kms_vblank: executing
12880 20:01:10.679369 <14>[ 26.947512] [IGT] kms_vblank: exiting, ret=77
12881 20:01:10.686213 <8>[ 26.954365] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>
12882 20:01:10.687000 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
12884 20:01:10.692879 3 (aarch64) (Linux: 6.1.59-cip8-<14>[ 26.968066] [IGT] kms_vblank: executing
12885 20:01:10.699577 <14>[ 26.968557] [IGT] kms_vblank: exiting, ret=77
12886 20:01:10.705808 <8>[ 26.975380] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>
12887 20:01:10.706601 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
12889 20:01:10.709236 rt4 aarch64)
12890 20:01:10.712953 Opened device: /de<14>[ 26.988107] [IGT] kms_vblank: executing
12891 20:01:10.719186 <14>[ 26.988591] [IGT] kms_vblank: exiting, ret=77
12892 20:01:10.725999 <8>[ 26.994864] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>
12893 20:01:10.726805 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
12895 20:01:10.728884 v/dri/card0
12896 20:01:10.732672 No KMS driver or no outputs, pipes: 8, outputs: 0
12897 20:01:10.735733 [1mSubtest pipe-D-query-busy: SKIP (0.000s)[0m
12898 20:01:10.742487 IGT-Version: 1<14>[ 27.017568] [IGT] kms_vblank: executing
12899 20:01:10.749221 .27.1-g621c2d3 (aarch64) (Linux:<14>[ 27.023948] [IGT] kms_vblank: exiting, ret=77
12900 20:01:10.759320 <8>[ 27.028712] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>
12901 20:01:10.759891 6.1.59-cip8-rt4 aarch64)
12902 20:01:10.760506 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
12904 20:01:10.763206 Opened device: /dev/dri/card0
12905 20:01:10.768884 No KMS driver or no outputs, pipes: 8, outputs: 0
12906 20:01:10.772335 [1mSubtest pipe-D-query-busy-hang: SKIP (0.000s)[0m
12907 20:01:10.779395 IGT-Version:<14>[ 27.050685] [IGT] kms_vblank: executing
12908 20:01:10.782398 <14>[ 27.051582] [IGT] kms_vblank: exiting, ret=77
12909 20:01:10.792241 <8>[ 27.056571] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>
12910 20:01:10.793015 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
12912 20:01:10.799306 1.27.1-g621c2d3 (aarch64) (Linu<14>[ 27.072440] [IGT] kms_vblank: executing
12913 20:01:10.802537 <14>[ 27.072920] [IGT] kms_vblank: exiting, ret=77
12914 20:01:10.811877 <8>[ 27.080244] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>
12915 20:01:10.812559 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
12917 20:01:10.818741 x: 6.1.59-cip8-r<14>[ 27.093084] [IGT] kms_vblank: executing
12918 20:01:10.821881 <14>[ 27.093553] [IGT] kms_vblank: exiting, ret=77
12919 20:01:10.828849 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
12921 20:01:10.832412 <8>[ 27.097716] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>
12922 20:01:10.832939 t4 aarch64)
12923 20:01:10.835173 Opened device: /dev/dri/card0
12924 20:01:10.839154 No KMS driver or no outputs, pipes: 8, outputs: 0
12925 20:01:10.845191 [1mSubtest pipe-D-query-forked-busy: SKIP (0.000s)[0m
12926 20:01:10.848720 IGT-Version: 1.27.1-g621<14>[ 27.121898] [IGT] kms_vblank: executing
12927 20:01:10.855204 <14>[ 27.122783] [IGT] kms_vblank: exiting, ret=77
12928 20:01:10.861893 <8>[ 27.127719] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>
12929 20:01:10.862694 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
12931 20:01:10.868697 c2d3 (aarch64) (<14>[ 27.144648] [IGT] kms_vblank: executing
12932 20:01:10.875255 <14>[ 27.145146] [IGT] kms_vblank: exiting, ret=77
12933 20:01:10.881479 <8>[ 27.152275] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>
12934 20:01:10.882260 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
12936 20:01:10.884700 Linux: 6.1.59-cip8-rt4 aarch64)
12937 20:01:10.888462 <14>[ 27.163919] [IGT] kms_vblank: executing
12938 20:01:10.895079 <14>[ 27.164370] [IGT] kms_vblank: exiting, ret=77
12939 20:01:10.902029 <8>[ 27.172982] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>
12940 20:01:10.902560
12941 20:01:10.903167 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
12943 20:01:10.904775 Opened device: /dev/dri/card0
12944 20:01:10.911453 <14>[ 27.184498] [IGT] kms_vblank: executing
12945 20:01:10.915213 <14>[ 27.184971] [IGT] kms_vblank: exiting, ret=77
12946 20:01:10.921530 <8>[ 27.191639] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>
12947 20:01:10.922210 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
12949 20:01:10.928083 No KMS driver or no outputs, pipes: 8, outputs: 0
12950 20:01:10.931380 [1mSubtest pipe-D-query-forked-busy-hang: SKIP (0.000s)[0m
12951 20:01:10.941641 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 <14>[ 27.216192] [IGT] kms_vblank: executing
12952 20:01:10.948426 <14>[ 27.217045] [IGT] kms_vblank: exiting, ret=77
12953 20:01:10.955435 <8>[ 27.222101] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>
12954 20:01:10.955983 aarch64)
12955 20:01:10.956581 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
12957 20:01:10.961750 Opened device: /dev/dr<14>[ 27.235436] [IGT] kms_vblank: executing
12958 20:01:10.964507 <14>[ 27.235924] [IGT] kms_vblank: exiting, ret=77
12959 20:01:10.974494 <8>[ 27.239995] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>
12960 20:01:10.975010 i/card0
12961 20:01:10.975607 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
12963 20:01:10.977738 No KMS driver or no outputs, pipes: 8, outputs: 0
12964 20:01:10.984841 [1mSubtest pipe-D-wait-idle: SKIP (0.000s)[0m
12965 20:01:10.988112 IGT-Version: 1.27.1<14>[ 27.264466] [IGT] kms_vblank: executing
12966 20:01:10.994313 <14>[ 27.265327] [IGT] kms_vblank: exiting, ret=77
12967 20:01:11.001589 <8>[ 27.270585] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>
12968 20:01:11.002405 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
12970 20:01:11.004535 -g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12971 20:01:11.007808 Opened device: /dev/dri/card0
12972 20:01:11.014295 No KMS driver or no outputs, pipes: 8, outputs: 0
12973 20:01:11.018209 [1mSubt<14>[ 27.290573] [IGT] kms_vblank: executing
12974 20:01:11.021404 est pipe-D-wait-idle-hang: SKIP (0.000s)[0m
12975 20:01:11.027810 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12976 20:01:11.031291 Opened device: /dev/dri/card0
12977 20:01:11.034755 No KMS driver or no outputs, pipes: 8, outputs: 0
12978 20:01:11.041567 [1mSubtest pipe-D-wait-forked: SKIP (0.000s)[0m
12979 20:01:11.044766 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12980 20:01:11.047745 Opened device: /dev/dri/card0
12981 20:01:11.054775 No KMS driver or no outputs, pipes: 8, outputs: 0
12982 20:01:11.057787 [1mSubtest pipe-D-wait-forked-hang: SKIP (0.000s)[0m
12983 20:01:11.064333 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12984 20:01:11.067535 Opened device: /dev/dri/card0
12985 20:01:11.071299 No KMS driver or no outputs, pipes: 8, outputs: 0
12986 20:01:11.074214 [1mSubtest pipe-D-wait-busy: SKIP (0.000s)[0m
12987 20:01:11.081217 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12988 20:01:11.084193 Opened device: /dev/dri/card0
12989 20:01:11.087813 No KMS driver or no outputs, pipes: 8, outputs: 0
12990 20:01:11.094294 [1mSubtest pipe-D-wait-busy-hang: SKIP (0.000s)[0m
12991 20:01:11.100726 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12992 20:01:11.103753 Opened device: /dev/dri/card0
12993 20:01:11.107511 No KMS driver or no outputs, pipes: 8, outputs: 0
12994 20:01:11.110785 [1mSubtest pipe-D-wait-forked-busy: SKIP (0.000s)[0m
12995 20:01:11.117364 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
12996 20:01:11.120943 Opened device: /dev/dri/card0
12997 20:01:11.127071 No KMS driver or no outputs, pipes: 8, outputs: 0
12998 20:01:11.130660 [1mSubtest pipe-D-wait-forked-busy-hang: SKIP (0.000s)[0m
12999 20:01:11.137685 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13000 20:01:11.140994 Opened device: /dev/dri/card0
13001 20:01:11.144040 No KMS driver or no outputs, pipes: 8, outputs: 0
13002 20:01:11.150161 [1mSubtest pipe-D-ts-continuation-idle: SKIP (0.000s)[0m
13003 20:01:11.157467 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13004 20:01:11.157980 Opened device: /dev/dri/card0
13005 20:01:11.164395 No KMS driver or no outputs, pipes: 8, outputs: 0
13006 20:01:11.170706 [1mSubtest pipe-D-ts-continuation-idle-hang: SKIP (0.000s)[0m
13007 20:01:11.173636 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13008 20:01:11.177528 Opened device: /dev/dri/card0
13009 20:01:11.184276 No KMS driver or no outputs, pipes: 8, outputs: 0
13010 20:01:11.187410 [1mSubtest pipe-D-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13011 20:01:11.194179 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13012 20:01:11.197091 Opened device: /dev/dri/card0
13013 20:01:11.200729 No KMS driver or no outputs, pipes: 8, outputs: 0
13014 20:01:11.207272 [1mSubtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13015 20:01:11.213531 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13016 20:01:11.217147 Opened device: /dev/dri/card0
13017 20:01:11.220373 No KMS driver or no outputs, pipes: 8, outputs: 0
13018 20:01:11.227217 [1mSubtest pipe-D-ts-continuation-suspend: SKIP (0.000s)[0m
13019 20:01:11.233580 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13020 20:01:11.236647 Opened device: /dev/dri/card0
13021 20:01:11.239768 No KMS driver or no outputs, pipes: 8, outputs: 0
13022 20:01:11.246369 [1mSubtest pipe-D-ts-continuation-modeset: SKIP (0.000s)[0m
13023 20:01:11.249873 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13024 20:01:11.253475 Opened device: /dev/dri/card0
13025 20:01:11.259728 No KMS driver or no outputs, pipes: 8, outputs: 0
13026 20:01:11.263400 [1mSubtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13027 20:01:11.269571 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13028 20:01:11.273119 Opened device: /dev/dri/card0
13029 20:01:11.276116 No KMS driver or no outputs, pipes: 8, outputs: 0
13030 20:01:11.283292 [1mSubtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13031 20:01:11.289329 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13032 20:01:11.293306 Opened device: /dev/dri/card0
13033 20:01:11.296434 No KMS driver or no outputs, pipes: 8, outputs: 0
13034 20:01:11.303248 [1mSubtest pipe-E-accuracy-idle: SKIP (0.000s)[0m
13035 20:01:11.309487 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13036 20:01:11.309995 Opened device: /dev/dri/card0
13037 20:01:11.316014 No KMS driver or no outputs, pipes: 8, outputs: 0
13038 20:01:11.319985 [1mSubtest pipe-E-query-idle: SKIP (0.000s)[0m
13039 20:01:11.326345 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13040 20:01:11.329070 Opened device: /dev/dri/card0
13041 20:01:11.333169 No KMS driver or no outputs, pipes: 8, outputs: 0
13042 20:01:11.339539 [1mSubtest pipe-E-query-idle-hang: SKIP (0.000s)[0m
13043 20:01:11.342629 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13044 20:01:11.345886 Opened device: /dev/dri/card0
13045 20:01:11.355874 No KMS driver or no outputs, pipes: <14>[ 27.628987] [IGT] kms_vblank: exiting, ret=77
13046 20:01:11.362743 <8>[ 27.634146] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>
13047 20:01:11.363267 8, outputs: 0
13048 20:01:11.363905 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
13050 20:01:11.369178 [1mSubtest pipe-<14>[ 27.644541] [IGT] kms_vblank: executing
13051 20:01:11.375321 <14>[ 27.645001] [IGT] kms_vblank: exiting, ret=77
13052 20:01:11.382142 <8>[ 27.649313] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>
13053 20:01:11.382931 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
13055 20:01:11.385174 E-query-forked: SKIP (0.000s)[0m
13056 20:01:11.392410 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13057 20:01:11.395199 Opened device: /dev/<14>[ 27.673329] [IGT] kms_vblank: executing
13058 20:01:11.398893 dri/card0
13059 20:01:11.405970 No KMS driver or no outputs, pipes: 8<14>[ 27.678785] [IGT] kms_vblank: exiting, ret=77
13060 20:01:11.412119 <8>[ 27.683353] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>
13061 20:01:11.412901 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
13063 20:01:11.415669 , outputs: 0
13064 20:01:11.418905 [1mSubtest pipe-E-query-forked-hang: SKIP (0.000s)[0m
13065 20:01:11.428952 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip<14>[ 27.704245] [IGT] kms_vblank: executing
13066 20:01:11.435254 <14>[ 27.705044] [IGT] kms_vblank: exiting, ret=77
13067 20:01:11.442070 <8>[ 27.710472] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>
13068 20:01:11.442586 8-rt4 aarch64)
13069 20:01:11.443190 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
13071 20:01:11.448791 Opened device: /<14>[ 27.723216] [IGT] kms_vblank: executing
13072 20:01:11.451900 <14>[ 27.723793] [IGT] kms_vblank: exiting, ret=77
13073 20:01:11.461916 <8>[ 27.728256] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>
13074 20:01:11.462429 dev/dri/card0
13075 20:01:11.463060 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
13077 20:01:11.468344 No KMS driver or no outputs, pipes: 8, outputs: 0
13078 20:01:11.472245 [1mSubtest pipe-E-query-busy: SKIP (0.000s)[0m
13079 20:01:11.478594 IGT-Version:<14>[ 27.751217] [IGT] kms_vblank: executing
13080 20:01:11.481627 <14>[ 27.752103] [IGT] kms_vblank: exiting, ret=77
13081 20:01:11.488211 <8>[ 27.757506] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>
13082 20:01:11.488885 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
13084 20:01:11.498482 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-r<14>[ 27.770728] [IGT] kms_vblank: executing
13085 20:01:11.501951 <14>[ 27.771279] [IGT] kms_vblank: exiting, ret=77
13086 20:01:11.511612 <8>[ 27.775918] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>
13087 20:01:11.512214 t4 aarch64)
13088 20:01:11.512822 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
13090 20:01:11.518264 Opened device: /dev<14>[ 27.791622] [IGT] kms_vblank: executing
13091 20:01:11.521258 <14>[ 27.792173] [IGT] kms_vblank: exiting, ret=77
13092 20:01:11.528112 <8>[ 27.798910] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>
13093 20:01:11.528905 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
13095 20:01:11.531532 /dri/card0
13096 20:01:11.538146 No KMS driver or no outputs, pipes: <14>[ 27.810819] [IGT] kms_vblank: executing
13097 20:01:11.541362 <14>[ 27.811359] [IGT] kms_vblank: exiting, ret=77
13098 20:01:11.551523 <8>[ 27.818390] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>
13099 20:01:11.552100 8, outputs: 0
13100 20:01:11.552712 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
13102 20:01:11.557748 [1mSubtest pipe-<14>[ 27.831890] [IGT] kms_vblank: executing
13103 20:01:11.561542 <14>[ 27.832393] [IGT] kms_vblank: exiting, ret=77
13104 20:01:11.567868 <8>[ 27.839460] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>
13105 20:01:11.568669 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
13107 20:01:11.574381 E-query-busy-hang: SKIP (0.000s)[0m
13108 20:01:11.577704 IGT-Versio<14>[ 27.850874] [IGT] kms_vblank: executing
13109 20:01:11.581047 <14>[ 27.851375] [IGT] kms_vblank: exiting, ret=77
13110 20:01:11.590904 <8>[ 27.855846] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>
13111 20:01:11.591727 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
13113 20:01:11.594675 n: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13114 20:01:11.597678 Opened device: /dev/dri/card0
13115 20:01:11.603850 No KMS driver or no outputs, pipes<14>[ 27.878416] [IGT] kms_vblank: executing
13116 20:01:11.610735 <14>[ 27.879282] [IGT] kms_vblank: exiting, ret=77
13117 20:01:11.617286 <8>[ 27.884617] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>
13118 20:01:11.618093 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
13120 20:01:11.620803 : 8, outputs: 0
13121 20:01:11.623942 [1mSubtest pip<14>[ 27.899855] [IGT] kms_vblank: executing
13122 20:01:11.630769 <14>[ 27.900345] [IGT] kms_vblank: exiting, ret=77
13123 20:01:11.637023 <8>[ 27.904503] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>
13124 20:01:11.637808 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
13126 20:01:11.643456 e-E-query-forked-busy: SKIP (0.0<14>[ 27.919721] [IGT] kms_vblank: executing
13127 20:01:11.650331 <14>[ 27.920196] [IGT] kms_vblank: exiting, ret=77
13128 20:01:11.656457 <8>[ 27.926862] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>
13129 20:01:11.657231 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
13131 20:01:11.660097 00s)[0m
13132 20:01:11.666800 IGT-Version: 1.27.1-g6<14>[ 27.939685] [IGT] kms_vblank: executing
13133 20:01:11.669793 <14>[ 27.940174] [IGT] kms_vblank: exiting, ret=77
13134 20:01:11.679845 <8>[ 27.944406] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>
13135 20:01:11.680616 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13137 20:01:11.686486 21c2d3 (aarch64) (Linux: 6.1.59-<14>[ 27.960086] [IGT] kms_vblank: executing
13138 20:01:11.689454 <14>[ 27.960559] [IGT] kms_vblank: exiting, ret=77
13139 20:01:11.699577 <8>[ 27.967328] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>
13140 20:01:11.700143 cip8-rt4 aarch64)
13141 20:01:11.700750 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13143 20:01:11.706124 Opened device<14>[ 27.980409] [IGT] kms_vblank: executing
13144 20:01:11.709790 <14>[ 27.980910] [IGT] kms_vblank: exiting, ret=77
13145 20:01:11.719579 <8>[ 27.989447] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>
13146 20:01:11.720433 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13148 20:01:11.726397 : /dev/dri/card0<14>[ 28.001061] [IGT] kms_vblank: executing
13149 20:01:11.729360 <14>[ 28.001532] [IGT] kms_vblank: exiting, ret=77
13150 20:01:11.739280 <8>[ 28.010178] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>
13151 20:01:11.739862
13152 20:01:11.740477 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13154 20:01:11.742143 No KMS driver or no outputs, pipes: 8, outputs: 0
13155 20:01:11.749096 [1mSubtest pipe-E-query-forked-busy-hang: SKIP (0.000s)[0m
13156 20:01:11.759047 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt<14>[ 28.033726] [IGT] kms_vblank: executing
13157 20:01:11.759579 4 aarch64)
13158 20:01:11.765956 Opened device: /dev/<14>[ 28.040004] [IGT] kms_vblank: exiting, ret=77
13159 20:01:11.771847 <8>[ 28.045056] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>
13160 20:01:11.772541 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13162 20:01:11.775713 dri/card0
13163 20:01:11.782508 No KMS driver or no o<14>[ 28.055573] [IGT] kms_vblank: executing
13164 20:01:11.785369 utputs, pipes: 8<14>[ 28.056044] [IGT] kms_vblank: exiting, ret=77
13165 20:01:11.795848 <8>[ 28.062531] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>
13166 20:01:11.796655 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13168 20:01:11.799135 , outputs: 0
13169 20:01:11.802216 [<14>[ 28.077511] [IGT] kms_vblank: executing
13170 20:01:11.805558 1mSubtest pipe-E-wait-idle: SKIP (0.000s)[0m
13171 20:01:11.812214 I<14>[ 28.083424] [IGT] kms_vblank: exiting, ret=77
13172 20:01:11.821498 GT-Version: 1.27<8>[ 28.087635] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>
13173 20:01:11.822268 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13175 20:01:11.825578 .1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13176 20:01:11.828880 Opened device: /dev/dri/card0
13177 20:01:11.831733 No KMS driver or no outputs, pipes: 8, outputs: 0
13178 20:01:11.838828 [1mSu<14>[ 28.110066] [IGT] kms_vblank: executing
13179 20:01:11.841965 btest pipe-E-wai<14>[ 28.110906] [IGT] kms_vblank: exiting, ret=77
13180 20:01:11.851565 <8>[ 28.116271] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>
13181 20:01:11.852377 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13183 20:01:11.855435 t-idle-hang: SKIP (0.000s)[0m
13184 20:01:11.862077 IGT-Version: 1.27.1-g621c2d3 (aa<14>[ 28.135310] [IGT] kms_vblank: executing
13185 20:01:11.865550 <14>[ 28.136126] [IGT] kms_vblank: exiting, ret=77
13186 20:01:11.871765 <8>[ 28.141432] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>
13187 20:01:11.872579 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13189 20:01:11.875282 rch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13190 20:01:11.881840 Opened <14>[ 28.154534] [IGT] kms_vblank: executing
13191 20:01:11.885340 <14>[ 28.155004] [IGT] kms_vblank: exiting, ret=77
13192 20:01:11.895289 <8>[ 28.161016] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>
13193 20:01:11.895911 device: /dev/dri/card0
13194 20:01:11.896710 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13196 20:01:11.901891 No KMS d<14>[ 28.175465] [IGT] kms_vblank: executing
13197 20:01:11.908247 river or no outp<14>[ 28.175950] [IGT] kms_vblank: exiting, ret=77
13198 20:01:11.914645 <8>[ 28.179940] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>
13199 20:01:11.915464 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13201 20:01:11.918266 uts, pipes: 8, outputs: 0
13202 20:01:11.921377 [1mS<14>[ 28.196123] [IGT] kms_vblank: executing
13203 20:01:11.928105 ubtest pipe-E-wa<14>[ 28.196604] [IGT] kms_vblank: exiting, ret=77
13204 20:01:11.934752 <8>[ 28.200832] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>
13205 20:01:11.935526 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13207 20:01:11.937600 it-forked: SKIP (0.000s)[0m
13208 20:01:11.944399 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13209 20:01:11.951191 Opened de<14>[ 28.223257] [IGT] kms_vblank: executing
13210 20:01:11.954386 <14>[ 28.224124] [IGT] kms_vblank: exiting, ret=77
13211 20:01:11.960643 <8>[ 28.229497] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>
13212 20:01:11.961274 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13214 20:01:11.964425 vice: /dev/dri/card0
13215 20:01:11.971345 No KMS driver or no output<14>[ 28.243183] [IGT] kms_vblank: executing
13216 20:01:11.971887 s, pipes: 8, outputs: 0
13217 20:01:11.977759 [1mSubtest pipe-E-wait-forked-hang: SKIP (0.000s)[0m
13218 20:01:11.984280 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13219 20:01:11.987528 Opened device: /dev/dri/card0
13220 20:01:11.991052 No KMS driver or no outputs, pipes: 8, outputs: 0
13221 20:01:11.994097 [1mSubtest pipe-E-wait-busy: SKIP (0.000s)[0m
13222 20:01:12.000828 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13223 20:01:12.004050 Opened device: /dev/dri/card0
13224 20:01:12.007520 No KMS driver or no outputs, pipes: 8, outputs: 0
13225 20:01:12.014118 [1mSubtest pipe-E-wait-busy-hang: SKIP (0.000s)[0m
13226 20:01:12.020696 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13227 20:01:12.021202 Opened device: /dev/dri/card0
13228 20:01:12.026922 No KMS driver or no outputs, pipes: 8, outputs: 0
13229 20:01:12.031108 [1mSubtest pipe-E-wait-forked-busy: SKIP (0.000s)[0m
13230 20:01:12.037296 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13231 20:01:12.040503 Opened device: /dev/dri/card0
13232 20:01:12.043692 No KMS driver or no outputs, pipes: 8, outputs: 0
13233 20:01:12.050528 [1mSubtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)[0m
13234 20:01:12.057219 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13235 20:01:12.060298 Opened device: /dev/dri/card0
13236 20:01:12.064393 No KMS driver or no outputs, pipes: 8, outputs: 0
13237 20:01:12.070233 [1mSubtest pipe-E-ts-continuation-idle: SKIP (0.000s)[0m
13238 20:01:12.073174 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13239 20:01:12.077133 Opened device: /dev/dri/card0
13240 20:01:12.083791 No KMS driver or no outputs, pipes: 8, outputs: 0
13241 20:01:12.086843 [1mSubtest pipe-E-ts-continuation-idle-hang: SKIP (0.000s)[0m
13242 20:01:12.093710 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13243 20:01:12.097200 Opened device: /dev/dri/card0
13244 20:01:12.099861 No KMS driver or no outputs, pipes: 8, outputs: 0
13245 20:01:12.106509 [1mSubtest pipe-E-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13246 20:01:12.113340 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13247 20:01:12.116466 Opened device: /dev/dri/card0
13248 20:01:12.119950 No KMS driver or no outputs, pipes: 8, outputs: 0
13249 20:01:12.126191 [1mSubtest pipe-E-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13250 20:01:12.133172 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13251 20:01:12.136069 Opened device: /dev/dri/card0
13252 20:01:12.139926 No KMS driver or no outputs, pipes: 8, outputs: 0
13253 20:01:12.146264 [1mSubtest pipe-E-ts-continuation-suspend: SKIP (0.000s)[0m
13254 20:01:12.150029 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13255 20:01:12.153054 Opened device: /dev/dri/card0
13256 20:01:12.159367 No KMS driver or no outputs, pipes: 8, outputs: 0
13257 20:01:12.163009 [1mSubtest pipe-E-ts-continuation-modeset: SKIP (0.000s)[0m
13258 20:01:12.169931 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13259 20:01:12.172717 Opened device: /dev/dri/card0
13260 20:01:12.176450 No KMS driver or no outputs, pipes: 8, outputs: 0
13261 20:01:12.183050 [1mSubtest pipe-E-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13262 20:01:12.189444 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13263 20:01:12.193278 Opened device: /dev/dri/card0
13264 20:01:12.196513 No KMS driver or no outputs, pipes: 8, outputs: 0
13265 20:01:12.202942 [1mSubtest pipe-E-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13266 20:01:12.208989 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13267 20:01:12.212588 Opened device: /dev/dri/card0
13268 20:01:12.216190 No KMS driver or no outputs, pipes: 8, outputs: 0
13269 20:01:12.219344 [1mSubtest pipe-F-accuracy-idle: SKIP (0.000s)[0m
13270 20:01:12.225992 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13271 20:01:12.229246 Opened device: /dev/dri/card0
13272 20:01:12.235674 No KMS driver or no outputs, pipes: 8, outputs: 0
13273 20:01:12.239060 [1mSubtest pipe-F-query-idle: SKIP (0.000s)[0m
13274 20:01:12.246147 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13275 20:01:12.246661 Opened device: /dev/dri/card0
13276 20:01:12.252531 No KMS driver or no outputs, pipes: 8, outputs: 0
13277 20:01:12.255633 [1mSubtest pipe-F-query-idle-hang: SKIP (0.000s)[0m
13278 20:01:12.262463 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13279 20:01:12.265638 Opened device: /dev/dri/card0
13280 20:01:12.269578 No KMS driver or no outputs, pipes: 8, outputs: 0
13281 20:01:12.275796 [1mSubtest pipe-F-query-forked: SKIP (0.000s)[0m
13282 20:01:12.282681 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13283 20:01:12.283175 Opened device: /dev/dri/card0
13284 20:01:12.289327 No KMS driver or no outputs, pipes: 8, outputs: 0
13285 20:01:12.292289 [1mSubtest pipe-F-query-forked-hang: SKIP (0.000s)[0m
13286 20:01:12.299565 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13287 20:01:12.306046 Opened device:<14>[ 28.581277] [IGT] kms_vblank: exiting, ret=77
13288 20:01:12.312114 <8>[ 28.585798] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>
13289 20:01:12.312824 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13291 20:01:12.315927 /dev/dri/card0
13292 20:01:12.322792 No KMS driver or no outputs, pi<14>[ 28.596751] [IGT] kms_vblank: executing
13293 20:01:12.328797 pes: 8, outputs:<14>[ 28.597236] [IGT] kms_vblank: exiting, ret=77
13294 20:01:12.335705 <8>[ 28.601286] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>
13295 20:01:12.336221 0
13296 20:01:12.336837 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13298 20:01:12.338987 [1mSubtest pipe-F-query-busy: SKIP (0.000s)[0m
13299 20:01:12.348867 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8<14>[ 28.623759] [IGT] kms_vblank: executing
13300 20:01:12.355730 <14>[ 28.624643] [IGT] kms_vblank: exiting, ret=77
13301 20:01:12.362515 <8>[ 28.630054] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>
13302 20:01:12.363323 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13304 20:01:12.365243 -rt4 aarch64)
13305 20:01:12.369265 Opened device: /d<14>[ 28.644293] [IGT] kms_vblank: executing
13306 20:01:12.375315 <14>[ 28.644805] [IGT] kms_vblank: exiting, ret=77
13307 20:01:12.382066 <8>[ 28.651422] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>
13308 20:01:12.382563 ev/dri/card0
13309 20:01:12.383147 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13311 20:01:12.388453 No KMS driver or n<14>[ 28.663299] [IGT] kms_vblank: executing
13312 20:01:12.395393 o outputs, pipes<14>[ 28.663813] [IGT] kms_vblank: exiting, ret=77
13313 20:01:12.395971 : 8, outputs: 0
13314 20:01:12.405777 <8>[ 28.668140] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>
13315 20:01:12.406284
13316 20:01:12.406877 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13318 20:01:12.408613 [1mSubtest pipe-F-query-busy-hang: SKIP (0.000s)[0m
13319 20:01:12.419045 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-ci<14>[ 28.693127] [IGT] kms_vblank: executing
13320 20:01:12.419549 p8-rt4 aarch64)
13321 20:01:12.425332 Opened device: <14>[ 28.699495] [IGT] kms_vblank: exiting, ret=77
13322 20:01:12.431957 <8>[ 28.704559] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>
13323 20:01:12.432784 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13325 20:01:12.435106 /dev/dri/card0
13326 20:01:12.442171 No KMS driver or no outputs, pip<14>[ 28.715884] [IGT] kms_vblank: executing
13327 20:01:12.445161 <14>[ 28.716398] [IGT] kms_vblank: exiting, ret=77
13328 20:01:12.454957 <8>[ 28.722925] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>
13329 20:01:12.455465 es: 8, outputs: 0
13330 20:01:12.456121 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13332 20:01:12.461697 [1mSubtest p<14>[ 28.735331] [IGT] kms_vblank: executing
13333 20:01:12.464967 <14>[ 28.735839] [IGT] kms_vblank: exiting, ret=77
13334 20:01:12.471927 <8>[ 28.742670] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>
13335 20:01:12.472718 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13337 20:01:12.478591 ipe-F-query-forked-busy: SKIP (0.000s)[0m
13338 20:01:12.481425 IGT-<14>[ 28.754366] [IGT] kms_vblank: executing
13339 20:01:12.484385 <14>[ 28.754892] [IGT] kms_vblank: exiting, ret=77
13340 20:01:12.495019 <8>[ 28.761878] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>
13341 20:01:12.495815 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13343 20:01:12.501463 Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.5<14>[ 28.775185] [IGT] kms_vblank: executing
13344 20:01:12.508301 <14>[ 28.775671] [IGT] kms_vblank: exiting, ret=77
13345 20:01:12.514616 <8>[ 28.782470] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>
13346 20:01:12.515411 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13348 20:01:12.517973 9-cip8-rt4 aarch64)
13349 20:01:12.518486 Opened device: /dev/dri/card0
13350 20:01:12.524394 No KMS driver or no outputs, pipes: 8, outputs: 0
13351 20:01:12.528410 [1mSubte<14>[ 28.804541] [IGT] kms_vblank: executing
13352 20:01:12.534513 <14>[ 28.805430] [IGT] kms_vblank: exiting, ret=77
13353 20:01:12.541565 <8>[ 28.810681] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>
13354 20:01:12.542354 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13356 20:01:12.547747 st pipe-F-query-forked-busy-hang<14>[ 28.823185] [IGT] kms_vblank: executing
13357 20:01:12.554464 : SKIP (0.000s)<14>[ 28.823666] [IGT] kms_vblank: exiting, ret=77
13358 20:01:12.564508 <8>[ 28.827946] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>
13359 20:01:12.565030 [0m
13360 20:01:12.565649 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13362 20:01:12.571195 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13363 20:01:12.571751 Opened device: /dev/dri/card0
13364 20:01:12.577884 No <14>[ 28.850769] [IGT] kms_vblank: executing
13365 20:01:12.581208 <14>[ 28.851682] [IGT] kms_vblank: exiting, ret=77
13366 20:01:12.590635 <8>[ 28.856908] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>
13367 20:01:12.591316 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13369 20:01:12.594262 KMS driver or no outputs, pipes: 8, outputs: 0
13370 20:01:12.601478 [1mSubtest pipe-F-wait-idle: SK<14>[ 28.876252] [IGT] kms_vblank: executing
13371 20:01:12.607691 <14>[ 28.877112] [IGT] kms_vblank: exiting, ret=77
13372 20:01:12.614080 <8>[ 28.882423] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>
13373 20:01:12.614878 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13375 20:01:12.617793 IP (0.000s)[0m
13376 20:01:12.620908 IGT-Version: 1.<14>[ 28.896335] [IGT] kms_vblank: executing
13377 20:01:12.627316 <14>[ 28.896814] [IGT] kms_vblank: exiting, ret=77
13378 20:01:12.633911 <8>[ 28.903397] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>
13379 20:01:12.634676 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13381 20:01:12.640279 27.1-g621c2d3 (a<14>[ 28.916989] [IGT] kms_vblank: executing
13382 20:01:12.647631 <14>[ 28.917478] [IGT] kms_vblank: exiting, ret=77
13383 20:01:12.653726 <8>[ 28.921717] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>
13384 20:01:12.654503 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13386 20:01:12.660637 arch64) (Linux: 6.1.59-cip8-rt4 <14>[ 28.935844] [IGT] kms_vblank: executing
13387 20:01:12.667138 <14>[ 28.936328] [IGT] kms_vblank: exiting, ret=77
13388 20:01:12.674065 <8>[ 28.940750] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>
13389 20:01:12.674590 aarch64)
13390 20:01:12.675192 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13392 20:01:12.676815 Opened device: /dev/dri/card0
13393 20:01:12.683715 No KMS driver or no outputs, pipes: 8, outputs: 0
13394 20:01:12.690844 [1mSubtest pipe-F-wait-idle-hang: S<14>[ 28.963248] [IGT] kms_vblank: executing
13395 20:01:12.693423 <14>[ 28.964113] [IGT] kms_vblank: exiting, ret=77
13396 20:01:12.703559 <8>[ 28.969290] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>
13397 20:01:12.704119 KIP (0.000s)[0m
13398 20:01:12.704813 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13400 20:01:12.713870 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux:<14>[ 28.988325] [IGT] kms_vblank: executing
13401 20:01:12.717139 <14>[ 28.989165] [IGT] kms_vblank: exiting, ret=77
13402 20:01:12.726916 <8>[ 28.994451] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>
13403 20:01:12.727744 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13405 20:01:12.730530 6.1.59-cip8-rt4 aarch64)
13406 20:01:12.733267 Opene<14>[ 29.008386] [IGT] kms_vblank: executing
13407 20:01:12.739977 <14>[ 29.008841] [IGT] kms_vblank: exiting, ret=77
13408 20:01:12.747285 <8>[ 29.015979] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>
13409 20:01:12.747859 d device: /dev/dri/card0
13410 20:01:12.748524 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13412 20:01:12.753662 No KMS driver or no outputs, pipes: 8, outputs: 0
13413 20:01:12.757804 [1mSubtest pipe-F-wait-forked: SKIP (0.000s)[0m
13414 20:01:12.766888 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<14>[ 29.038544] [IGT] kms_vblank: executing
13415 20:01:12.769828 <14>[ 29.039279] [IGT] kms_vblank: exiting, ret=77
13416 20:01:12.776886 <8>[ 29.045036] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>
13417 20:01:12.777684 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13419 20:01:12.780017 .1.59-cip8-rt4 aarch64)
13420 20:01:12.783087 Opened device: /dev/dri/card0
13421 20:01:12.790410 No KMS driver or no outp<14>[ 29.065416] [IGT] kms_vblank: executing
13422 20:01:12.790936 uts, pipes: 8, outputs: 0
13423 20:01:12.796914 [1mSubtest pipe-F-wa<14>[ 29.070779] [IGT] kms_vblank: exiting, ret=77
13424 20:01:12.806964 <8>[ 29.077542] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>
13425 20:01:12.807771 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13427 20:01:12.812927 it-forked-hang: SKIP (0.000s)[0<14>[ 29.087991] [IGT] kms_vblank: executing
13428 20:01:12.816616 <14>[ 29.088441] [IGT] kms_vblank: exiting, ret=77
13429 20:01:12.823433 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13431 20:01:12.826347 <8>[ 29.093282] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>
13432 20:01:12.826764 m
13433 20:01:12.833173 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13434 20:01:12.833722 Opened device: /dev/dri/card0
13435 20:01:12.843174 No KMS driver or no outputs, pipes: 8<14>[ 29.115166] [IGT] kms_vblank: executing
13436 20:01:12.846221 <14>[ 29.115909] [IGT] kms_vblank: exiting, ret=77
13437 20:01:12.853002 <8>[ 29.121173] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>
13438 20:01:12.853684 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13440 20:01:12.856198 , outputs: 0
13441 20:01:12.862727 [1mSubtest pipe-F<14>[ 29.135912] [IGT] kms_vblank: executing
13442 20:01:12.866211 <14>[ 29.136392] [IGT] kms_vblank: exiting, ret=77
13443 20:01:12.872790 <8>[ 29.140443] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>
13444 20:01:12.873577 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13446 20:01:12.876112 -wait-busy: SKIP (0.000s)[0m
13447 20:01:12.882377 IGT-Version: 1.27<14>[ 29.155043] [IGT] kms_vblank: executing
13448 20:01:12.886192 <14>[ 29.155511] [IGT] kms_vblank: exiting, ret=77
13449 20:01:12.895270 <8>[ 29.161653] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>
13450 20:01:12.895992 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13452 20:01:12.902470 .1-g621c2d3 (aarch64) (Linux: 6.<14>[ 29.176039] [IGT] kms_vblank: executing
13453 20:01:12.906145 <14>[ 29.176530] [IGT] kms_vblank: exiting, ret=77
13454 20:01:12.912238 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13456 20:01:12.915632 <8>[ 29.180588] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>
13457 20:01:12.916113 1.59-cip8-rt4 aarch64)
13458 20:01:12.922530 Opened d<14>[ 29.195751] [IGT] kms_vblank: executing
13459 20:01:12.923038 evice: /dev/dri/card0
13460 20:01:12.928740 No KMS driver or no outputs, pipes: 8, outputs: 0
13461 20:01:12.932261 [1mSubtest pipe-F-wait-busy-hang: SKIP (0.000s)[0m
13462 20:01:12.938496 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13463 20:01:12.942584 Opened device: /dev/dri/card0
13464 20:01:12.945617 No KMS driver or no outputs, pipes: 8, outputs: 0
13465 20:01:12.951937 [1mSubtest pipe-F-wait-forked-busy: SKIP (0.000s)[0m
13466 20:01:12.955568 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13467 20:01:12.958686 Opened device: /dev/dri/card0
13468 20:01:12.965437 No KMS driver or no outputs, pipes: 8, outputs: 0
13469 20:01:12.969145 [1mSubtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)[0m
13470 20:01:12.975464 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13471 20:01:12.978329 Opened device: /dev/dri/card0
13472 20:01:12.982397 No KMS driver or no outputs, pipes: 8, outputs: 0
13473 20:01:12.988298 [1mSubtest pipe-F-ts-continuation-idle: SKIP (0.000s)[0m
13474 20:01:12.995619 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13475 20:01:12.998508 Opened device: /dev/dri/card0
13476 20:01:13.002044 No KMS driver or no outputs, pipes: 8, outputs: 0
13477 20:01:13.008759 [1mSubtest pipe-F-ts-continuation-idle-hang: SKIP (0.000s)[0m
13478 20:01:13.012014 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13479 20:01:13.015250 Opened device: /dev/dri/card0
13480 20:01:13.021883 No KMS driver or no outputs, pipes: 8, outputs: 0
13481 20:01:13.024746 [1mSubtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13482 20:01:13.031422 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13483 20:01:13.035059 Opened device: /dev/dri/card0
13484 20:01:13.038487 No KMS driver or no outputs, pipes: 8, outputs: 0
13485 20:01:13.045495 [1mSubtest pipe-F-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13486 20:01:13.051541 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13487 20:01:13.055038 Opened device: /dev/dri/card0
13488 20:01:13.058260 No KMS driver or no outputs, pipes: 8, outputs: 0
13489 20:01:13.065110 [1mSubtest pipe-F-ts-continuation-suspend: SKIP (0.000s)[0m
13490 20:01:13.071524 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13491 20:01:13.074340 Opened device: /dev/dri/card0
13492 20:01:13.078010 No KMS driver or no outputs, pipes: 8, outputs: 0
13493 20:01:13.084959 [1mSubtest pipe-F-ts-continuation-modeset: SKIP (0.000s)[0m
13494 20:01:13.088144 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13495 20:01:13.091563 Opened device: /dev/dri/card0
13496 20:01:13.097887 No KMS driver or no outputs, pipes: 8, outputs: 0
13497 20:01:13.101654 [1mSubtest pipe-F-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13498 20:01:13.107727 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13499 20:01:13.111176 Opened device: /dev/dri/card0
13500 20:01:13.118058 No KMS driver or no outputs, pipes: 8, outputs: 0
13501 20:01:13.120847 [1mSubtest pipe-F-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13502 20:01:13.127368 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13503 20:01:13.130851 Opened device: /dev/dri/card0
13504 20:01:13.134217 No KMS driver or no outputs, pipes: 8, outputs: 0
13505 20:01:13.140581 [1mSubtest pipe-G-accuracy-idle: SKIP (0.000s)[0m
13506 20:01:13.147307 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13507 20:01:13.147752 Opened device: /dev/dri/card0
13508 20:01:13.153915 No KMS driver or no outputs, pipes: 8, outputs: 0
13509 20:01:13.157889 [1mSubtest pipe-G-query-idle: SKIP (0.000s)[0m
13510 20:01:13.164168 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13511 20:01:13.167607 Opened device: /dev/dri/card0
13512 20:01:13.170715 No KMS driver or no outputs, pipes: 8, outputs: 0
13513 20:01:13.176945 [1mSubtest pipe-G-query-idle-hang: SKIP (0.000s)[0m
13514 20:01:13.183744 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13515 20:01:13.184160 Opened device: /dev/dri/card0
13516 20:01:13.190596 No KMS driver or no outputs, pipes: 8, outputs: 0
13517 20:01:13.193824 [1mSubtest pipe-G-query-forked: SKIP (0.000s)[0m
13518 20:01:13.200216 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13519 20:01:13.203392 Opened device: /dev/dri/card0
13520 20:01:13.206403 No KMS driver or no outputs, pipes: 8, outputs: 0
13521 20:01:13.213617 [1mSubtest pipe-G-query-forked-hang: SKIP (0.000s)[0m
13522 20:01:13.219789 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13523 20:01:13.220170 Opened device: /dev/dri/card0
13524 20:01:13.226940 No KMS driver or no outputs, pipes: 8, outputs: 0
13525 20:01:13.230409 [1mSubtest pipe-G-query-busy: SKIP (0.000s)[0m
13526 20:01:13.236713 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13527 20:01:13.240368 Opened device: /dev/dri/card0
13528 20:01:13.243471 No KMS driver or no outputs, pipes: 8, outputs: 0
13529 20:01:13.246543 [1mSubtest pipe-G-query-busy-hang: SKIP (0.000s)[0m
13530 20:01:13.253693 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13531 20:01:13.263258 Opened device: /dev/dri/card0<14>[ 29.533959] [IGT] kms_vblank: exiting, ret=77
13532 20:01:13.263779
13533 20:01:13.269740 No KMS driver <8>[ 29.538694] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>
13534 20:01:13.270507 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13536 20:01:13.273345 or no outputs, pipes: 8, outputs: 0
13537 20:01:13.279609 [1mSubtest pipe-G-query-forked-busy: SKIP (0.000s)[0m
13538 20:01:13.286098 IGT-Version: 1.27.<14>[ 29.561176] [IGT] kms_vblank: executing
13539 20:01:13.293201 1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aar<14>[ 29.567401] [IGT] kms_vblank: exiting, ret=77
13540 20:01:13.303248 <8>[ 29.572400] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>
13541 20:01:13.303822 ch64)
13542 20:01:13.304545 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13544 20:01:13.305871 Opened device: /dev/dri/card0
13545 20:01:13.309516 No KMS driver or no outputs, pipes: 8, outputs: 0
13546 20:01:13.316312 [1mSubtest pipe-G-query-forked-busy-hang: SKIP (0.000s)[0m
13547 20:01:13.319626 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13548 20:01:13.326337 <14>[ 29.599734] [IGT] kms_vblank: executing
13549 20:01:13.329550 <14>[ 29.600589] [IGT] kms_vblank: exiting, ret=77
13550 20:01:13.336671 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13552 20:01:13.339139 <8>[ 29.606604] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>
13553 20:01:13.339582 Opened device: /dev/dri/card0
13554 20:01:13.346203 No KMS driver or no outputs, pipes: 8, outputs: 0
13555 20:01:13.353228 [1mSubtest pipe-G-wait-idle: SKIP (0.000s)[0<14>[ 29.629271] [IGT] kms_vblank: executing
13556 20:01:13.353753 m
13557 20:01:13.362852 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<14>[ 29.635116] [IGT] kms_vblank: exiting, ret=77
13558 20:01:13.369881 <8>[ 29.640477] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>
13559 20:01:13.370670 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13561 20:01:13.372931 : 6.1.59-cip8-rt4 aarch64)
13562 20:01:13.376302 Open<14>[ 29.653372] [IGT] kms_vblank: executing
13563 20:01:13.379061 ed device: /dev/dri/card0
13564 20:01:13.386525 No KMS driver or no o<14>[ 29.658288] [IGT] kms_vblank: exiting, ret=77
13565 20:01:13.392346 <8>[ 29.662832] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>
13566 20:01:13.393048 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13568 20:01:13.395721 utputs, pipes: 8, outputs: 0
13569 20:01:13.402469 [1mSubtest pipe-G<14>[ 29.675130] [IGT] kms_vblank: executing
13570 20:01:13.406202 <14>[ 29.675689] [IGT] kms_vblank: exiting, ret=77
13571 20:01:13.412479 <8>[ 29.682834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>
13572 20:01:13.413162 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13574 20:01:13.422361 -wait-idle-hang: SKIP (0.000s)[<14>[ 29.695605] [IGT] kms_vblank: executing
13575 20:01:13.425489 <14>[ 29.696159] [IGT] kms_vblank: exiting, ret=77
13576 20:01:13.432467 <8>[ 29.703361] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>
13577 20:01:13.432889 0m
13578 20:01:13.433488 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13580 20:01:13.439103 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13581 20:01:13.442799 Opened device: /dev/dri/card0
13582 20:01:13.445827 No KMS driver or no outputs, pipes: 8, outputs: 0
13583 20:01:13.452453 [1mSubtest pipe-<14>[ 29.726601] [IGT] kms_vblank: executing
13584 20:01:13.459058 <14>[ 29.727440] [IGT] kms_vblank: exiting, ret=77
13585 20:01:13.466000 <8>[ 29.733039] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>
13586 20:01:13.466782 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13588 20:01:13.469108 G-wait-forked: SKIP (0.000s)[0m
13589 20:01:13.475708 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux:<14>[ 29.752768] [IGT] kms_vblank: executing
13590 20:01:13.482209 <14>[ 29.753628] [IGT] kms_vblank: exiting, ret=77
13591 20:01:13.485446 6.1.59-cip8-rt4 aarch64)
13592 20:01:13.485957 Opened device: /dev/dri/card0
13593 20:01:13.491621 No KMS driver or no outputs, pipes: 8, outputs: 0
13594 20:01:13.501838 [1mSubtest pipe-G-<8>[ 29.770212] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>
13595 20:01:13.502635 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13597 20:01:13.505570 wait-forked-hang: SKIP (0.000s)[0m
13598 20:01:13.511608 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13599 20:01:13.512075 Opened device: /dev/dri/card0
13600 20:01:13.518396 No KMS driver or no outputs, pipes: 8, outputs: 0
13601 20:01:13.522027 <14>[ 29.796171] [IGT] kms_vblank: executing
13602 20:01:13.528225 [1mSubtest pipe<14>[ 29.796984] [IGT] kms_vblank: exiting, ret=77
13603 20:01:13.535211 <8>[ 29.803253] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>
13604 20:01:13.536043 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13606 20:01:13.537887 -G-wait-busy: SKIP (0.000s)[0m
13607 20:01:13.544953 IGT-Version: 1.27.1-g621c2d3 (a<14>[ 29.817883] [IGT] kms_vblank: executing
13608 20:01:13.551837 <14>[ 29.818469] [IGT] kms_vblank: exiting, ret=77
13609 20:01:13.558569 <8>[ 29.823056] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>
13610 20:01:13.559357 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13612 20:01:13.564481 arch64) (Linux: <14>[ 29.841056] [IGT] kms_vblank: executing
13613 20:01:13.567846 <14>[ 29.841606] [IGT] kms_vblank: exiting, ret=77
13614 20:01:13.578594 <8>[ 29.847795] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>
13615 20:01:13.579382 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13617 20:01:13.581404 6.1.59-cip8-rt4 aarch64)
13618 20:01:13.584553 Opened<14>[ 29.859966] [IGT] kms_vblank: executing
13619 20:01:13.591694 <14>[ 29.860551] [IGT] kms_vblank: exiting, ret=77
13620 20:01:13.598182 <8>[ 29.865283] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>
13621 20:01:13.598969 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13623 20:01:13.601600 device: /dev/dri/card0
13624 20:01:13.604478 No KMS driver or no outputs, pipes: 8, outputs: 0
13625 20:01:13.611551 [1mSubtest pipe-G-wait-busy-hang: SKIP (0.000s)[0m
13626 20:01:13.618083 IGT-Version: 1.27.1-g621c2d3 (<14>[ 29.889855] [IGT] kms_vblank: executing
13627 20:01:13.621306 <14>[ 29.890723] [IGT] kms_vblank: exiting, ret=77
13628 20:01:13.631760 <8>[ 29.896097] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>
13629 20:01:13.632558 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13631 20:01:13.638223 aarch64) (Linux: 6.1.59-cip8-rt4<14>[ 29.911983] [IGT] kms_vblank: executing
13632 20:01:13.641233 <14>[ 29.912544] [IGT] kms_vblank: exiting, ret=77
13633 20:01:13.651213 <8>[ 29.917179] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>
13634 20:01:13.651782 aarch64)
13635 20:01:13.652388 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13637 20:01:13.654309 Opened device: /dev/dri/card0
13638 20:01:13.657918 No KMS driver or no outputs, pipes: 8, outputs: 0
13639 20:01:13.664145 [1mSubtest pipe-G-wait-forked-busy<14>[ 29.939779] [IGT] kms_vblank: executing
13640 20:01:13.671161 <14>[ 29.940658] [IGT] kms_vblank: exiting, ret=77
13641 20:01:13.678044 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13643 20:01:13.680746 <8>[ 29.946079] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>
13644 20:01:13.684226 : SKIP (0.000s)<14>[ 29.961173] [IGT] kms_vblank: executing
13645 20:01:13.691310 <14>[ 29.961719] [IGT] kms_vblank: exiting, ret=77
13646 20:01:13.691867 [0m
13647 20:01:13.701446 IGT-Version: 1.27.1-g621c2d<8>[ 29.972389] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>
13648 20:01:13.702232 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13650 20:01:13.707788 3 (aarch64) (Linux: 6.1.59-cip8-<14>[ 29.983636] [IGT] kms_vblank: executing
13651 20:01:13.713831 <14>[ 29.984177] [IGT] kms_vblank: exiting, ret=77
13652 20:01:13.720939 <8>[ 29.989065] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>
13653 20:01:13.721353 rt4 aarch64)
13654 20:01:13.721933 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13656 20:01:13.724282 Opened device: /dev/dri/card0
13657 20:01:13.727535 No KMS driver or no outputs, pipes: 8, outputs: 0
13658 20:01:13.737159 [1mSubtest pipe-G-wait-forked-busy-hang: SKIP (<14>[ 30.013210] [IGT] kms_vblank: executing
13659 20:01:13.737667 0.000s)[0m
13660 20:01:13.743779 IGT-Version: 1.27.1<14>[ 30.019533] [IGT] kms_vblank: exiting, ret=77
13661 20:01:13.751495 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13663 20:01:13.754088 <8>[ 30.024727] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>
13664 20:01:13.760456 -g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarc<14>[ 30.036390] [IGT] kms_vblank: executing
13665 20:01:13.763929 <14>[ 30.036883] [IGT] kms_vblank: exiting, ret=77
13666 20:01:13.773887 <8>[ 30.043834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>
13667 20:01:13.774413 h64)
13668 20:01:13.775018 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13670 20:01:13.777621 Opened device: /dev/dri/card0
13671 20:01:13.780534 No KMS driv<14>[ 30.055090] [IGT] kms_vblank: executing
13672 20:01:13.787384 <14>[ 30.055594] [IGT] kms_vblank: exiting, ret=77
13673 20:01:13.794205 <8>[ 30.059978] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>
13674 20:01:13.795021 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13676 20:01:13.797435 er or no outputs, pipes: 8, outputs: 0
13677 20:01:13.804152 [1mSubtest pipe-G-ts-continuation-idle: SKIP (0.000s)[0m
13678 20:01:13.810699 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13679 20:01:13.813653 Ope<14>[ 30.087625] [IGT] kms_vblank: executing
13680 20:01:13.817171 <14>[ 30.088438] [IGT] kms_vblank: exiting, ret=77
13681 20:01:13.827171 <8>[ 30.093411] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>
13682 20:01:13.828024 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13684 20:01:13.830741 ned device: /dev/dri/card0
13685 20:01:13.833686 No K<14>[ 30.107984] [IGT] kms_vblank: executing
13686 20:01:13.836686 <14>[ 30.108459] [IGT] kms_vblank: exiting, ret=77
13687 20:01:13.843750 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13689 20:01:13.846462 <8>[ 30.112844] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>
13690 20:01:13.849974 MS driver or no outputs, pipes: 8, outputs: 0
13691 20:01:13.853409 [1mSubtest pipe-G-ts-continuation-idle-hang: SKIP (0.000s)[0m
13692 20:01:13.860236 IGT-Version: 1.2<14>[ 30.135725] [IGT] kms_vblank: executing
13693 20:01:13.867213 <14>[ 30.136616] [IGT] kms_vblank: exiting, ret=77
13694 20:01:13.873526 <8>[ 30.141551] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>
13695 20:01:13.874379 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13697 20:01:13.876777 7.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13698 20:01:13.879805 Opened device: /dev/dri/card0
13699 20:01:13.886778 No KMS d<14>[ 30.160932] [IGT] kms_vblank: executing
13700 20:01:13.889638 <14>[ 30.161972] [IGT] kms_vblank: exiting, ret=77
13701 20:01:13.893098 river or no outputs, pipes: 8, outputs: 0
13702 20:01:13.899973 [1mSubtest pipe-G-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13703 20:01:13.909627 IGT-Version: 1.27.1-g<8>[ 30.178717] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>
13704 20:01:13.910384 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13706 20:01:13.916144 621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch6<14>[ 30.191395] [IGT] kms_vblank: executing
13707 20:01:13.923154 <14>[ 30.191902] [IGT] kms_vblank: exiting, ret=77
13708 20:01:13.929370 <8>[ 30.197479] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>
13709 20:01:13.930317 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13711 20:01:13.932782 4)
13712 20:01:13.936475 Opened devic<14>[ 30.212952] [IGT] kms_vblank: executing
13713 20:01:13.942343 <14>[ 30.213461] [IGT] kms_vblank: exiting, ret=77
13714 20:01:13.949696 <8>[ 30.218328] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>
13715 20:01:13.950221 e: /dev/dri/card0
13716 20:01:13.950826 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13718 20:01:13.956017 No KMS driver or no outputs, pipes: 8, outputs: 0
13719 20:01:13.960053 [1mSubtest pipe-G-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13720 20:01:13.966390 IGT-Ve<14>[ 30.240282] [IGT] kms_vblank: executing
13721 20:01:13.969520 <14>[ 30.241095] [IGT] kms_vblank: exiting, ret=77
13722 20:01:13.979789 <8>[ 30.246299] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>
13723 20:01:13.980588 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13725 20:01:13.982576 rsion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13726 20:01:13.985870 Opened device: /dev/dri/card0
13727 20:01:13.992302 No KMS driver or no outputs, p<14>[ 30.266278] [IGT] kms_vblank: executing
13728 20:01:13.999202 <14>[ 30.267017] [IGT] kms_vblank: exiting, ret=77
13729 20:01:14.006120 <8>[ 30.272047] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>
13730 20:01:14.006649 ipes: 8, outputs: 0
13731 20:01:14.007259 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13733 20:01:14.016002 [1mSubtest pipe-G-ts-continuation-suspend: SKIP (0.000s)[<14>[ 30.292299] [IGT] kms_vblank: executing
13734 20:01:14.022447 <14>[ 30.293103] [IGT] kms_vblank: exiting, ret=77
13735 20:01:14.029343 <8>[ 30.298926] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>
13736 20:01:14.029877 0m
13737 20:01:14.030491 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13739 20:01:14.039164 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linu<14>[ 30.310980] [IGT] kms_vblank: executing
13740 20:01:14.042271 <14>[ 30.311451] [IGT] kms_vblank: exiting, ret=77
13741 20:01:14.048890 <8>[ 30.318260] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>
13742 20:01:14.049732 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13744 20:01:14.052139 x: 6.1.59-cip8-rt4 aarch64)
13745 20:01:14.055465 Ope<14>[ 30.331403] [IGT] kms_vblank: executing
13746 20:01:14.062069 <14>[ 30.331877] [IGT] kms_vblank: exiting, ret=77
13747 20:01:14.068769 <8>[ 30.338590] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>
13748 20:01:14.069573 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13750 20:01:14.072652 ned device: /dev/dri/card0
13751 20:01:14.078971 No KMS driver or no <14>[ 30.350841] [IGT] kms_vblank: executing
13752 20:01:14.081804 <14>[ 30.351329] [IGT] kms_vblank: exiting, ret=77
13753 20:01:14.088789 <8>[ 30.357760] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>
13754 20:01:14.089468 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
13756 20:01:14.091916 outputs, pipes: 8, outputs: 0
13757 20:01:14.098629 <14>[ 30.371848] [IGT] kms_vblank: executing
13758 20:01:14.102378 <14>[ 30.372316] [IGT] kms_vblank: exiting, ret=77
13759 20:01:14.108399 <8>[ 30.378879] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>
13760 20:01:14.109168 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
13762 20:01:14.118198 [1mSubtest pipe-G-ts-continuatio<14>[ 30.391927] [IGT] kms_vblank: executing
13763 20:01:14.118615 n-modeset: SKIP (0.000s)[0m
13764 20:01:14.125440 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13765 20:01:14.128584 Opened device: /dev/dri/card0
13766 20:01:14.131761 No KMS driver or no outputs, pipes: 8, outputs: 0
13767 20:01:14.138689 [1mSubtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13768 20:01:14.144526 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13769 20:01:14.148564 Opened device: /dev/dri/card0
13770 20:01:14.151791 No KMS driver or no outputs, pipes: 8, outputs: 0
13771 20:01:14.157833 [1mSubtest pipe-G-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13772 20:01:14.164873 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13773 20:01:14.168248 Opened device: /dev/dri/card0
13774 20:01:14.171378 No KMS driver or no outputs, pipes: 8, outputs: 0
13775 20:01:14.178182 [1mSubtest pipe-H-accuracy-idle: SKIP (0.000s)[0m
13776 20:01:14.181405 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13777 20:01:14.184698 Opened device: /dev/dri/card0
13778 20:01:14.191064 No KMS driver or no outputs, pipes: 8, outputs: 0
13779 20:01:14.195085 [1mSubtest pipe-H-query-idle: SKIP (0.000s)[0m
13780 20:01:14.201326 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13781 20:01:14.205103 Opened device: /dev/dri/card0
13782 20:01:14.208216 No KMS driver or no outputs, pipes: 8, outputs: 0
13783 20:01:14.211210 [1mSubtest pipe-H-query-idle-hang: SKIP (0.000s)[0m
13784 20:01:14.217461 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13785 20:01:14.221294 Opened device: /dev/dri/card0
13786 20:01:14.224235 No KMS driver or no outputs, pipes: 8, outputs: 0
13787 20:01:14.231107 [1mSubtest pipe-H-query-forked: SKIP (0.000s)[0m
13788 20:01:14.237597 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13789 20:01:14.240695 Opened device: /dev/dri/card0
13790 20:01:14.244311 No KMS driver or no outputs, pipes: 8, outputs: 0
13791 20:01:14.247439 [1mSubtest pipe-H-query-forked-hang: SKIP (0.000s)[0m
13792 20:01:14.254311 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13793 20:01:14.257787 Opened device: /dev/dri/card0
13794 20:01:14.260849 No KMS driver or no outputs, pipes: 8, outputs: 0
13795 20:01:14.267706 [1mSubtest pipe-H-query-busy: SKIP (0.000s)[0m
13796 20:01:14.274294 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13797 20:01:14.274815 Opened device: /dev/dri/card0
13798 20:01:14.280333 No KMS driver or no outputs, pipes: 8, outputs: 0
13799 20:01:14.284281 [1mSubtest pipe-H-query-busy-hang: SKIP (0.000s)[0m
13800 20:01:14.290567 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13801 20:01:14.294137 Opened device: /dev/dri/card0
13802 20:01:14.297351 No KMS driver or no outputs, pipes: 8, outputs: 0
13803 20:01:14.304258 [1mSubtest pipe-H-query-forked-busy: SKIP (0.000s)[0m
13804 20:01:14.310516 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13805 20:01:14.313648 Opened device: /dev/dri/card0
13806 20:01:14.317334 No KMS driver or no outputs, pipes: 8, outputs: 0
13807 20:01:14.320654 [1mSubtest pipe-H-query-forked-busy-hang: SKIP (0.000s)[0m
13808 20:01:14.327210 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13809 20:01:14.330527 Opened device: /dev/dri/card0
13810 20:01:14.337397 No KMS driver or no outputs, pipes: 8, outputs: 0
13811 20:01:14.340404 [1mSubtest pipe-H-wait-idle: SKIP (0.000s)[0m
13812 20:01:14.347159 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13813 20:01:14.350339 Opened device: /dev/dri/card0
13814 20:01:14.353278 No KMS driver or no outputs, pipes: 8, outputs: 0
13815 20:01:14.356520 [1mSubtest pipe-H-wait-idle-hang: SKIP (0.000s)[0m
13816 20:01:14.363482 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13817 20:01:14.366263 Opened device: /dev/dri/card0
13818 20:01:14.370282 No KMS driver or no outputs, pipes: 8, outputs: 0
13819 20:01:14.377050 [1mSubtest pipe-H-wait-forked: SKIP (0.000s)[0m
13820 20:01:14.383365 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13821 20:01:14.383961 Opened device: /dev/dri/card0
13822 20:01:14.390233 No KMS driver or no outputs, pipes: 8, outputs: 0
13823 20:01:14.393017 [1mSubtest pipe-H-wait-forked-hang: SKIP (0.000s)[0m
13824 20:01:14.400196 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13825 20:01:14.403460 Opened device: /dev/dri/card0
13826 20:01:14.406827 No KMS driver or no outputs, pipes: 8, outputs: 0
13827 20:01:14.413290 [1mSubtest pipe-H-wait-busy: SKIP (0.000s)[0m
13828 20:01:14.419787 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13829 20:01:14.420211 Opened device: /dev/dri/card0
13830 20:01:14.426872 No KMS driver or no outputs, pipes: 8, outputs: 0
13831 20:01:14.430121 [1mSubtest pipe-H-wait-busy-hang: SKIP (0.000s)[0m
13832 20:01:14.436159 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13833 20:01:14.439574 Opened device: /dev/dri/card0
13834 20:01:14.442823 No KMS driver or no outputs, pipes: 8, outputs: 0
13835 20:01:14.449302 [1mSubtest pipe-H-wait-forked-busy: SKIP (0.000s)[0m
13836 20:01:14.458940 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip<14>[ 30.730165] [IGT] kms_vblank: exiting, ret=77
13837 20:01:14.459455 8-rt4 aarch64)
13838 20:01:14.465688 <8>[ 30.734742] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>
13839 20:01:14.466493 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
13841 20:01:14.472853 Opened device: /<14>[ 30.749353] [IGT] kms_vblank: executing
13842 20:01:14.475628 dev/dri/card0
13843 20:01:14.482809 No KMS driver or no outputs, pipe<14>[ 30.754928] [IGT] kms_vblank: exiting, ret=77
13844 20:01:14.492684 s: 8, outputs: 0<8>[ 30.761288] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>
13845 20:01:14.493335
13846 20:01:14.494064 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
13848 20:01:14.498974 [1mSubtest pipe-H-wait-forked-busy-hang: SKIP<14>[ 30.774011] [IGT] kms_vblank: executing
13849 20:01:14.506215 <14>[ 30.774492] [IGT] kms_vblank: exiting, ret=77
13850 20:01:14.512369 <8>[ 30.783266] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>
13851 20:01:14.513170 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
13853 20:01:14.515487 (0.000s)[0m
13854 20:01:14.522725 IGT-Version: 1.27<14>[ 30.795696] [IGT] kms_vblank: executing
13855 20:01:14.526248 <14>[ 30.796239] [IGT] kms_vblank: exiting, ret=77
13856 20:01:14.535873 <8>[ 30.802073] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>
13857 20:01:14.536653 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
13859 20:01:14.541950 .1-g621c2d3 (aarch64) (Linux: 6.<14>[ 30.816393] [IGT] kms_vblank: executing
13860 20:01:14.545541 <14>[ 30.816933] [IGT] kms_vblank: exiting, ret=77
13861 20:01:14.555728 <8>[ 30.823292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>
13862 20:01:14.556523 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
13864 20:01:14.558998 1.59-cip8-rt4 aa<14>[ 30.836623] [IGT] kms_vblank: executing
13865 20:01:14.565931 <14>[ 30.837158] [IGT] kms_vblank: exiting, ret=77
13866 20:01:14.572106 <8>[ 30.843222] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>
13867 20:01:14.572894 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
13869 20:01:14.575282 rch64)
13870 20:01:14.578933 Opened device: /dev/dri/card0
13871 20:01:14.582206 No KMS driver or no outputs, pipes: 8, outputs: 0
13872 20:01:14.588656 [1mSubtest pipe-H-ts-continuation-idl<14>[ 30.865360] [IGT] kms_vblank: executing
13873 20:01:14.591674 e: SKIP (0.000s)[0m
13874 20:01:14.598547 IGT-Version: 1.27.1-g621c2<14>[ 30.871246] [IGT] kms_vblank: exiting, ret=77
13875 20:01:14.605568 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
13877 20:01:14.608070 <8>[ 30.876177] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>
13878 20:01:14.611749 d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13879 20:01:14.614944 Opened device: /dev/dri/card0
13880 20:01:14.618098 No KMS driver or no outputs, pipes: 8, outputs: 0
13881 20:01:14.625157 [1mSubtest pipe-H-ts-continuat<14>[ 30.898999] [IGT] kms_vblank: executing
13882 20:01:14.627945 <14>[ 30.899861] [IGT] kms_vblank: exiting, ret=77
13883 20:01:14.638053 <8>[ 30.905591] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>
13884 20:01:14.638928 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
13886 20:01:14.641021 <8>[ 30.907087] <LAVA_SIGNAL_TESTSET STOP>
13887 20:01:14.641692 Received signal: <TESTSET> STOP
13888 20:01:14.642049 Closing test_set kms_vblank
13889 20:01:14.651243 ion-idle-hang: SKIP (0.000s)[0m<8>[ 30.924361] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 11899592_1.5.2.3.1>
13890 20:01:14.651828
13891 20:01:14.652442 Received signal: <ENDRUN> 0_igt-kms-mediatek 11899592_1.5.2.3.1
13892 20:01:14.652833 Ending use of test pattern.
13893 20:01:14.653144 Ending test lava.0_igt-kms-mediatek (11899592_1.5.2.3.1), duration 11.77
13895 20:01:14.657885 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13896 20:01:14.660874 Opened device: /dev/dri/card0
13897 20:01:14.664777 No KMS driver or no outputs, pipes: 8, outputs: 0
13898 20:01:14.671030 [1mSubtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13899 20:01:14.677483 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13900 20:01:14.681493 Opened device: /dev/dri/card0
13901 20:01:14.684281 No KMS driver or no outputs, pipes: 8, outputs: 0
13902 20:01:14.691071 [1mSubtest pipe-H-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13903 20:01:14.697858 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13904 20:01:14.700921 Opened device: /dev/dri/card0
13905 20:01:14.704248 No KMS driver or no outputs, pipes: 8, outputs: 0
13906 20:01:14.710676 [1mSubtest pipe-H-ts-continuation-suspend: SKIP (0.000s)[0m
13907 20:01:14.717145 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13908 20:01:14.717657 Opened device: /dev/dri/card0
13909 20:01:14.724118 No KMS driver or no outputs, pipes: 8, outputs: 0
13910 20:01:14.727581 [1mSubtest pipe-H-ts-continuation-modeset: SKIP (0.000s)[0m
13911 20:01:14.734031 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13912 20:01:14.736699 Opened device: /dev/dri/card0
13913 20:01:14.740692 No KMS driver or no outputs, pipes: 8, outputs: 0
13914 20:01:14.747015 [1mSubtest pipe-H-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13915 20:01:14.753670 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.59-cip8-rt4 aarch64)
13916 20:01:14.757182 Opened device: /dev/dri/card0
13917 20:01:14.760263 No KMS driver or no outputs, pipes: 8, outputs: 0
13918 20:01:14.767407 [1mSubtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13919 20:01:14.767966 + set +x
13920 20:01:14.770497 <LAVA_TEST_RUNNER EXIT>
13921 20:01:14.771301 ok: lava_test_shell seems to have completed
13922 20:01:14.790681 addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: skip
set: kms_atomic
atomic_plane_damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: skip
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: skip
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: skip
set: kms_vblank
crtc-invalid-params:
result: skip
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: skip
set: drm_read
empty-nonblock:
result: skip
set: drm_read
fault-buffer:
result: skip
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: skip
set: kms_vblank
invalid-buffer:
result: skip
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
pipe-A-accuracy-idle:
result: skip
set: kms_vblank
pipe-A-query-busy:
result: skip
set: kms_vblank
pipe-A-query-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked:
result: skip
set: kms_vblank
pipe-A-query-forked-busy:
result: skip
set: kms_vblank
pipe-A-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked-hang:
result: skip
set: kms_vblank
pipe-A-query-idle:
result: skip
set: kms_vblank
pipe-A-query-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-A-wait-busy:
result: skip
set: kms_vblank
pipe-A-wait-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked-hang:
result: skip
set: kms_vblank
pipe-A-wait-idle:
result: skip
set: kms_vblank
pipe-A-wait-idle-hang:
result: skip
set: kms_vblank
pipe-B-accuracy-idle:
result: skip
set: kms_vblank
pipe-B-query-busy:
result: skip
set: kms_vblank
pipe-B-query-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked:
result: skip
set: kms_vblank
pipe-B-query-forked-busy:
result: skip
set: kms_vblank
pipe-B-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked-hang:
result: skip
set: kms_vblank
pipe-B-query-idle:
result: skip
set: kms_vblank
pipe-B-query-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-B-wait-busy:
result: skip
set: kms_vblank
pipe-B-wait-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked-hang:
result: skip
set: kms_vblank
pipe-B-wait-idle:
result: skip
set: kms_vblank
pipe-B-wait-idle-hang:
result: skip
set: kms_vblank
pipe-C-accuracy-idle:
result: skip
set: kms_vblank
pipe-C-query-busy:
result: skip
set: kms_vblank
pipe-C-query-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked:
result: skip
set: kms_vblank
pipe-C-query-forked-busy:
result: skip
set: kms_vblank
pipe-C-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked-hang:
result: skip
set: kms_vblank
pipe-C-query-idle:
result: skip
set: kms_vblank
pipe-C-query-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-C-wait-busy:
result: skip
set: kms_vblank
pipe-C-wait-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked-hang:
result: skip
set: kms_vblank
pipe-C-wait-idle:
result: skip
set: kms_vblank
pipe-C-wait-idle-hang:
result: skip
set: kms_vblank
pipe-D-accuracy-idle:
result: skip
set: kms_vblank
pipe-D-query-busy:
result: skip
set: kms_vblank
pipe-D-query-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked:
result: skip
set: kms_vblank
pipe-D-query-forked-busy:
result: skip
set: kms_vblank
pipe-D-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked-hang:
result: skip
set: kms_vblank
pipe-D-query-idle:
result: skip
set: kms_vblank
pipe-D-query-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-D-wait-busy:
result: skip
set: kms_vblank
pipe-D-wait-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked-hang:
result: skip
set: kms_vblank
pipe-D-wait-idle:
result: skip
set: kms_vblank
pipe-D-wait-idle-hang:
result: skip
set: kms_vblank
pipe-E-accuracy-idle:
result: skip
set: kms_vblank
pipe-E-query-busy:
result: skip
set: kms_vblank
pipe-E-query-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked:
result: skip
set: kms_vblank
pipe-E-query-forked-busy:
result: skip
set: kms_vblank
pipe-E-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked-hang:
result: skip
set: kms_vblank
pipe-E-query-idle:
result: skip
set: kms_vblank
pipe-E-query-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-E-wait-busy:
result: skip
set: kms_vblank
pipe-E-wait-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked-hang:
result: skip
set: kms_vblank
pipe-E-wait-idle:
result: skip
set: kms_vblank
pipe-E-wait-idle-hang:
result: skip
set: kms_vblank
pipe-F-accuracy-idle:
result: skip
set: kms_vblank
pipe-F-query-busy:
result: skip
set: kms_vblank
pipe-F-query-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked:
result: skip
set: kms_vblank
pipe-F-query-forked-busy:
result: skip
set: kms_vblank
pipe-F-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked-hang:
result: skip
set: kms_vblank
pipe-F-query-idle:
result: skip
set: kms_vblank
pipe-F-query-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-F-wait-busy:
result: skip
set: kms_vblank
pipe-F-wait-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked-hang:
result: skip
set: kms_vblank
pipe-F-wait-idle:
result: skip
set: kms_vblank
pipe-F-wait-idle-hang:
result: skip
set: kms_vblank
pipe-G-accuracy-idle:
result: skip
set: kms_vblank
pipe-G-query-busy:
result: skip
set: kms_vblank
pipe-G-query-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked:
result: skip
set: kms_vblank
pipe-G-query-forked-busy:
result: skip
set: kms_vblank
pipe-G-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked-hang:
result: skip
set: kms_vblank
pipe-G-query-idle:
result: skip
set: kms_vblank
pipe-G-query-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-G-wait-busy:
result: skip
set: kms_vblank
pipe-G-wait-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked-hang:
result: skip
set: kms_vblank
pipe-G-wait-idle:
result: skip
set: kms_vblank
pipe-G-wait-idle-hang:
result: skip
set: kms_vblank
pipe-H-accuracy-idle:
result: skip
set: kms_vblank
pipe-H-query-busy:
result: skip
set: kms_vblank
pipe-H-query-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked:
result: skip
set: kms_vblank
pipe-H-query-forked-busy:
result: skip
set: kms_vblank
pipe-H-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked-hang:
result: skip
set: kms_vblank
pipe-H-query-idle:
result: skip
set: kms_vblank
pipe-H-query-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-H-wait-busy:
result: skip
set: kms_vblank
pipe-H-wait-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked-hang:
result: skip
set: kms_vblank
pipe-H-wait-idle:
result: skip
set: kms_vblank
pipe-H-wait-idle-hang:
result: skip
set: kms_vblank
plane-cursor-legacy:
result: skip
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: skip
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: skip
set: kms_atomic
plane-primary-legacy:
result: skip
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
short-buffer-block:
result: skip
set: drm_read
short-buffer-nonblock:
result: skip
set: drm_read
short-buffer-wakeup:
result: skip
set: drm_read
size-max:
result: skip
set: kms_addfb_basic
small-bo:
result: skip
set: kms_addfb_basic
test-only:
result: skip
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: skip
set: kms_addfb_basic
too-wide:
result: skip
set: kms_addfb_basic
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
13923 20:01:14.791906 end: 3.1 lava-test-shell (duration 00:00:12) [common]
13924 20:01:14.792363 end: 3 lava-test-retry (duration 00:00:12) [common]
13925 20:01:14.792795 start: 4 finalize (timeout 00:07:49) [common]
13926 20:01:14.793240 start: 4.1 power-off (timeout 00:00:30) [common]
13927 20:01:14.793969 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-0' '--port=1' '--command=off'
13928 20:01:14.903288 >> Command sent successfully.
13929 20:01:14.912275 Returned 0 in 0 seconds
13930 20:01:15.013603 end: 4.1 power-off (duration 00:00:00) [common]
13932 20:01:15.015440 start: 4.2 read-feedback (timeout 00:07:49) [common]
13933 20:01:15.016984 Listened to connection for namespace 'common' for up to 1s
13934 20:01:16.017543 Finalising connection for namespace 'common'
13935 20:01:16.018242 Disconnecting from shell: Finalise
13936 20:01:16.018642 / #
13937 20:01:16.119603 end: 4.2 read-feedback (duration 00:00:01) [common]
13938 20:01:16.120342 end: 4 finalize (duration 00:00:01) [common]
13939 20:01:16.120944 Cleaning after the job
13940 20:01:16.121425 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/ramdisk
13941 20:01:16.152337 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/kernel
13942 20:01:16.168138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/dtb
13943 20:01:16.168392 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11899592/tftp-deploy-pu673ckw/modules
13944 20:01:16.177958 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11899592
13945 20:01:16.295488 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11899592
13946 20:01:16.295710 Job finished correctly